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r18404 Wednesday 10th October, 2012 at 10:33:40 UTC by Miodrag Milanović

Refactored the code in jedutil to support the  viewing of a GAL16V8 device and added a new command line option of "-viewlist" which will print out a list of all the devices that can be viewed in human readable logic equations.  Also updated the jedutil regression test to support passing in an additional argument of "debug" to print out a detailed log.  Also moved the jedutil regression test data into separate directories composed of the device's name to make things more organized. [Kevin Eshbach]

[src/regtests/jedutil]	jedtest.wsf
[src/regtests/jedutil/baseline]	pal10h8.txt pal10l8.txt pal12h6.txt pal12l6.txt pal14h4.txt pal14l4.txt pal16h2.txt pal16l2.txt pal16l8.txt pal20l10.txt pal20l8.txt
[src/regtests/jedutil/baseline/gal16v8]	pal10h8-to-gal16v8.txt* pal10l8-to-gal16v8.txt* pal12h6-to-gal16v8.txt* pal12l6-to-gal16v8.txt* pal14h4-to-gal16v8.txt* pal14l4-to-gal16v8.txt* pal16h2-to-gal16v8.txt* pal16l2-to-gal16v8.txt* pal16l8-to-gal16v8.txt* pal16r4-to-gal16v8.txt* pal16r6-to-gal16v8.txt* pal16r8-to-gal16v8.txt*
[src/regtests/jedutil/baseline/pal10h8]	pal10h8.txt*
[src/regtests/jedutil/baseline/pal10l8]	pal10l8.txt*
[src/regtests/jedutil/baseline/pal12h6]	pal12h6.txt*
[src/regtests/jedutil/baseline/pal12l6]	pal12l6.txt*
[src/regtests/jedutil/baseline/pal14h4]	pal14h4.txt*
[src/regtests/jedutil/baseline/pal14l4]	pal14l4.txt*
[src/regtests/jedutil/baseline/pal16c1]	pal16c1.txt*
[src/regtests/jedutil/baseline/pal16h2]	pal16h2.txt*
[src/regtests/jedutil/baseline/pal16l2]	pal16l2.txt*
[src/regtests/jedutil/baseline/pal16l8]	pal16l8.txt*
[src/regtests/jedutil/baseline/pal16r4]	pal16r4.txt*
[src/regtests/jedutil/baseline/pal16r6]	pal16r6.txt*
[src/regtests/jedutil/baseline/pal16r8]	pal16r8.txt*
[src/regtests/jedutil/baseline/pal20l10]	pal20l10.txt*
[src/regtests/jedutil/baseline/pal20l8]	pal20l8.txt*
[src/regtests/jedutil/baseline/pal20r4]	pal20r4.txt*
[src/regtests/jedutil/baseline/pal20r6]	pal20r6.txt*
[src/regtests/jedutil/baseline/pal20r8]	pal20r8.txt*
[src/regtests/jedutil/eqns]	pal10h8.eqn pal10l8.eqn pal12h6.eqn pal12l6.eqn pal14h4.eqn pal14l4.eqn pal16h2.eqn pal16l2.eqn pal16l8.eqn pal20l10.eqn pal20l8.eqn
[src/regtests/jedutil/eqns/pal10h8]	pal10h8.eqn*
[src/regtests/jedutil/eqns/pal10l8]	pal10l8.eqn*
[src/regtests/jedutil/eqns/pal12h6]	pal12h6.eqn*
[src/regtests/jedutil/eqns/pal12l6]	pal12l6.eqn*
[src/regtests/jedutil/eqns/pal14h4]	pal14h4.eqn*
[src/regtests/jedutil/eqns/pal14l4]	pal14l4.eqn*
[src/regtests/jedutil/eqns/pal16c1]	pal16c1.eqn*
[src/regtests/jedutil/eqns/pal16h2]	pal16h2.eqn*
[src/regtests/jedutil/eqns/pal16l2]	pal16l2.eqn*
[src/regtests/jedutil/eqns/pal16l8]	pal16l8.eqn*
[src/regtests/jedutil/eqns/pal16r4]	pal16r4.eqn*
[src/regtests/jedutil/eqns/pal16r6]	pal16r6.eqn*
[src/regtests/jedutil/eqns/pal16r8]	pal16r8.eqn*
[src/regtests/jedutil/eqns/pal20l10]	pal20l10.eqn*
[src/regtests/jedutil/eqns/pal20l8]	pal20l8.eqn*
[src/regtests/jedutil/eqns/pal20r4]	pal20r4.eqn*
[src/regtests/jedutil/eqns/pal20r6]	pal20r6.eqn*
[src/regtests/jedutil/eqns/pal20r8]	pal20r8.eqn*
[src/regtests/jedutil/jeds]	pal10h8.jed pal10l8.jed pal12h6.jed pal12l6.jed pal14h4.jed pal14l4.jed pal16h2.jed pal16l2.jed pal16l8.jed pal20l10.jed pal20l8.jed
[src/regtests/jedutil/jeds/gal16v8]	pal10h8-to-gal16v8.jed* pal10l8-to-gal16v8.jed* pal12h6-to-gal16v8.jed* pal12l6-to-gal16v8.jed* pal14h4-to-gal16v8.jed* pal14l4-to-gal16v8.jed* pal16h2-to-gal16v8.jed* pal16l2-to-gal16v8.jed* pal16l8-to-gal16v8.jed* pal16r4-to-gal16v8.jed* pal16r6-to-gal16v8.jed* pal16r8-to-gal16v8.jed*
[src/regtests/jedutil/jeds/pal10h8]	pal10h8.jed*
[src/regtests/jedutil/jeds/pal10l8]	pal10l8.jed*
[src/regtests/jedutil/jeds/pal12h6]	pal12h6.jed*
[src/regtests/jedutil/jeds/pal12l6]	pal12l6.jed*
[src/regtests/jedutil/jeds/pal14h4]	pal14h4.jed*
[src/regtests/jedutil/jeds/pal14l4]	pal14l4.jed*
[src/regtests/jedutil/jeds/pal16c1]	pal16c1.jed*
[src/regtests/jedutil/jeds/pal16h2]	pal16h2.jed*
[src/regtests/jedutil/jeds/pal16l2]	pal16l2.jed*
[src/regtests/jedutil/jeds/pal16l8]	pal16l8.jed*
[src/regtests/jedutil/jeds/pal16r4]	pal16r4.jed*
[src/regtests/jedutil/jeds/pal16r6]	pal16r6.jed*
[src/regtests/jedutil/jeds/pal16r8]	pal16r8.jed*
[src/regtests/jedutil/jeds/pal20l10]	pal20l10.jed*
[src/regtests/jedutil/jeds/pal20l8]	pal20l8.jed*
[src/regtests/jedutil/jeds/pal20r4]	pal20r4.jed*
[src/regtests/jedutil/jeds/pal20r6]	pal20r6.jed*
[src/regtests/jedutil/jeds/pal20r8]	pal20r8.jed*
[src/tools]	jedutil.c

trunk/src/regtests/jedutil/baseline/pal20l8.txt

r18403	r18404
1		/o15 = /i1 & i2 & /i3 & i4 & i11 +
2		/i1 & i2 & /i3 & /i5 & /i13 +
3		/i1 & i2 & /i3 & i6 & i14 +
4		/i1 & i2 & /i3 & /i7 & /i23 +
5		/i1 & i2 & /i3 & i8 & /i11 +
6		/i1 & i2 & /i3 & /i9 & i13 +
7		/o16
8		o15.oe = o16
9
10		/o16 = i1 & /i2 & /o17 +
11		i3 & /i4 +
12		i5 & /i6 +
13		i7 & /i8 +
14		i3 & i9 & o17 +
15		i1 & /i2 & i3 & /i4 & i5 & /i6 & i7 & /i8 & /i9 +
16		/i8 & /i9
17		o16.oe = vcc
18
19		/o17 = /o18 & /i23 +
20		i10 & o18 +
21		i9 +
22		i8 +
23		/i7 +
24		/i6 +
25		i5
26		o17.oe = i4 & i5
27
28		/o18 = i1 & /i2 & i3 & /i4 & /i8 & i23 +
29		i1 & i2 & i3 & /i4 & /i5 +
30		/i6 & i7 & i8 & i9 & i10 & /o19 +
31		i11 & i13 & i14 & i23 +
32		/i6 & i7 & i8 & i9 & i10 +
33		i3 & i13 & i14 & i23 +
34		i1 & i2 & i3 & /i4 & /i5 & o19
35		o18.oe = i1 & i10 & i23
36
37		/o19 = i9 & /i10 & i11 & i23 +
38		i9 +
39		/i10 +
40		i11 & o20 +
41		i23 +
42		i2 & /i10 & i23 +
43		i9 & i11
44		o19.oe = i8 & /o20
45
46		/o20 = o21 +
47		/i2 +
48		/i3 +
49		/i4 +
50		/i5 +
51		/i6 +
52		/i7 & /o21
53		o20.oe = vcc
54
55		/o21 = i1 & i8 +
56		/i14 +
57		i1 & /i5 & i8 +
58		i23 +
59		i1 & i8 & /i14 +
60		i13 +
61		i1 & i11
62		o21.oe = i5 & i6
63
64		/o22 = i1 & /i8 +
65		/i8 +
66		i1 +
67		/i10 +
68		/i23 +
69		i8 & /i13 +
70		/i11
71		o22.oe = i3 & /i7
72
73

trunk/src/regtests/jedutil/baseline/pal16l8.txt

r18403	r18404
1		/o12 = i3 & i7 & /i9 +
2		i1 & o13 +
3		i3 +
4		/i6 +
5		i8 +
6		/i9 +
7		i7 & /o13
8		o12.oe = vcc
9
10		/o13 = i11 & /o14 +
11		/i9 +
12		i8 +
13		/i7 +
14		/i6 & o14 +
15		i5 +
16		i4
17		o13.oe = i2 & o14
18
19		/o14 = i1 & /o15 +
20		/i8 +
21		i1 & /i8 +
22		i1 & /i2 & /o15 +
23		/i2 +
24		i2 & /i8 & o15 +
25		i3
26		o14.oe = vcc
27
28		/o15 = i3 & i6 & i7 & /i11 +
29		i6 & o16 +
30		i3 & /o16 +
31		i7 +
32		/i11 +
33		i6 & i7 +
34		i7 & /i11
35		o15.oe = vcc
36
37		/o16 = /i3 & /o17 +
38		/i4 & /i11 +
39		/i3 & /i4 +
40		/i3 & i4 +
41		/i7 & o17 +
42		/i7 & /i11 +
43		i4
44		o16.oe = vcc
45
46		/o17 = i2 & i5 & i6 & /i7 +
47		i2 & /o18 +
48		i5 +
49		i6 +
50		/i7 & o18 +
51		i2 & /i7 +
52		i5 & i6
53		o17.oe = /o16
54
55		/o18 = /i2 & i5 & i6 & /i7 +
56		i3 & i6 & i7 & i11 +
57		i3 +
58		/i2 & /i7 +
59		i3 & i11 +
60		i5 & i6 & /i7 +
61		i7 & i11
62		o18.oe = vcc
63
64		/o19 = i5 & i6 & /i7 & i11 +
65		i3 & i6 & i7 +
66		i5 +
67		i6 +
68		i7 +
69		i11 +
70		/i7
71		o19.oe = vcc
72
73

trunk/src/regtests/jedutil/baseline/pal20l10.txt

r18403	r18404
1		/o14 = /i11 +
2		i10 +
3		i9 & /o15
4		o14.oe = o15
5
6		/o15 = /i1 & i2 & /i3 & i4 & i11 +
7		/i1 & i2 & /i3 & /i5 & /i13 & o16 +
8		/i1 & i2 & /i3 & i6
9		o15.oe = /o16
10
11		/o16 = i1 & /i2 & /o17 +
12		i3 & /i4 +
13		i3 & i9 & o17
14		o16.oe = vcc
15
16		/o17 = /o18 +
17		i10 & o18 +
18		i9
19		o17.oe = i4 & i5
20
21		/o18 = i1 & /i2 & i3 & /i4 & /i8 +
22		/i6 & i7 & i8 & i9 & i10 & /o19 +
23		i1 & i2 & i3 & /i4 & /i5 & o19
24		o18.oe = i1 & i10
25
26		/o19 = i11 & o20 +
27		i2 & /i10 +
28		i9 & i11
29		o19.oe = i8 & /o20
30
31		/o20 = o21 +
32		/i6 +
33		/i7 & /o21
34		o20.oe = vcc
35
36		/o21 = i1 & i8 +
37		/i4 & /o22 +
38		o22
39		o21.oe = i5 & i6
40
41		/o22 = i1 & /i8 +
42		/i8 +
43		i1
44		o22.oe = i3 & /i7
45
46		/o23 = i7 +
47		i11 +
48		/i13
49		o23.oe = vcc
50
51

trunk/src/regtests/jedutil/baseline/pal16h2.txt

r18403	r18404
1		o15 = i1 & i2 & i3 & /i4 & i5 & /i6 & i7 & i8 +
2		i9 +
3		/i11 +
4		i12 +
5		/i13 +
6		i14 +
7		/i17 +
8		i18 & /i19
9		o15.oe = vcc
10
11		o16 = i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8 +
12		/i9 +
13		i11 +
14		/i12 +
15		i13 +
16		/i14 +
17		i17 +
18		/i18 & i19
19		o16.oe = vcc
20
21

trunk/src/regtests/jedutil/baseline/pal14h4.txt

r18403	r18404
1		o14 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
2		i9 & i11 +
3		/i12 & /i13 +
4		i18 & /i19
5		o14.oe = vcc
6
7		o15 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
8		i9 & /i11 +
9		i12 & i13 +
10		/i18 & i19
11		o15.oe = vcc
12
13		o16 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
14		/i9 & i11 +
15		i12 & /i13 +
16		/i18 & /i19
17		o16.oe = vcc
18
19		o17 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
20		i9 & i11 +
21		/i12 & i13 +
22		i18 & i19
23		o17.oe = vcc
24
25

trunk/src/regtests/jedutil/baseline/pal12h6.txt

r18403	r18404
1		o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
2		i9 & i11 +
3		/i19 +
4		i12
5		o13.oe = vcc
6
7		o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
8		/i9 & i11
9		o14.oe = vcc
10
11		o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
12		/i9 & /i11
13		o15.oe = vcc
14
15		o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
16		i9 & /i11
17		o16.oe = vcc
18
19		o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
20		/i9 & /i11
21		o17.oe = vcc
22
23		o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
24		/i9 & i11 +
25		i19 +
26		/i12
27		o18.oe = vcc
28
29

trunk/src/regtests/jedutil/baseline/pal10h8.txt

r18403	r18404
1		o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
2		i9 & i11
3		o12.oe = vcc
4
5		o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
6		/i9 & i11
7		o13.oe = vcc
8
9		o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
10		i9 & /i11
11		o14.oe = vcc
12
13		o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
14		/i9 & /i11
15		o15.oe = vcc
16
17		o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
18		/i9 & /i11
19		o16.oe = vcc
20
21		o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
22		i9 & /i11
23		o17.oe = vcc
24
25		o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
26		/i9 & i11
27		o18.oe = vcc
28
29		o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
30		i11
31		o19.oe = vcc
32
33

trunk/src/regtests/jedutil/baseline/pal10l8.txt

r18403	r18404
1		/o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
2		i9 & i11
3		o12.oe = vcc
4
5		/o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
6		/i9 & i11
7		o13.oe = vcc
8
9		/o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
10		i9 & /i11
11		o14.oe = vcc
12
13		/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
14		/i9 & /i11
15		o15.oe = vcc
16
17		/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
18		/i9 & /i11
19		o16.oe = vcc
20
21		/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
22		i9 & /i11
23		o17.oe = vcc
24
25		/o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
26		i11
27		o18.oe = vcc
28
29		/o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
30		/i9
31		o19.oe = vcc
32
33

trunk/src/regtests/jedutil/baseline/pal12l6.txt

r18403	r18404
1		/o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
2		i9 & i11 +
3		/i19 +
4		i12
5		o13.oe = vcc
6
7		/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
8		/i9 & i11
9		o14.oe = vcc
10
11		/o15 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
12		i9 & i11
13		o15.oe = vcc
14
15		/o16 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
16		/i9 & /i11
17		o16.oe = vcc
18
19		/o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
20		/i9 & /i11
21		o17.oe = vcc
22
23		/o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
24		/i9 & i11 +
25		i19 +
26		/i12
27		o18.oe = vcc
28
29

trunk/src/regtests/jedutil/baseline/pal14l4.txt

r18403	r18404
1		/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
2		/i9 & i11 +
3		i12 & /i13 +
4		i18 & i19
5		o14.oe = vcc
6
7		/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
8		/i9 & /i11 +
9		/i12 & i13 +
10		/i18 & i19
11		o15.oe = vcc
12
13		/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
14		/i9 & /i11 +
15		i12 & i13 +
16		i18 & /i19
17		o16.oe = vcc
18
19		/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
20		/i9 & i11 +
21		/i12 & /i13 +
22		/i18 & /i19
23		o17.oe = vcc
24
25

trunk/src/regtests/jedutil/baseline/pal16l2.txt

r18403	r18404
1		/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
2		/i9 +
3		/i11 +
4		/i12 +
5		i13 +
6		i14 +
7		i17 +
8		i18 & i19
9		o15.oe = vcc
10
11		/o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
12		i9 +
13		i11 +
14		i12 +
15		/i13 +
16		/i14 +
17		/i17 +
18		/i18 & /i19
19		o16.oe = vcc
20
21

trunk/src/regtests/jedutil/baseline/gal16v8/pal16l2-to-gal16v8.txt

r0	r18404
	1	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	2	/i9 +
	3	/i11 +
	4	/i12 +
	5	i13 +
	6	i14 +
	7	i17 +
	8	i18 & i19
	9	o15.oe = vcc
	10
	11	/o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	12	i9 +
	13	i11 +
	14	i12 +
	15	/i13 +
	16	/i14 +
	17	/i17 +
	18	/i18 & /i19
	19	o16.oe = vcc
	20

trunk/src/regtests/jedutil/baseline/gal16v8/pal14l4-to-gal16v8.txt

r0	r18404
	1	/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	/i9 & i11 +
	3	i12 & /i13 +
	4	i18 & i19
	5	o14.oe = vcc
	6
	7	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	8	/i9 & /i11 +
	9	/i12 & i13 +
	10	/i18 & i19
	11	o15.oe = vcc
	12
	13	/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	14	/i9 & /i11 +
	15	i12 & i13 +
	16	i18 & /i19
	17	o16.oe = vcc
	18
	19	/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	20	/i9 & i11 +
	21	/i12 & /i13 +
	22	/i18 & /i19
	23	o17.oe = vcc
	24

trunk/src/regtests/jedutil/baseline/gal16v8/pal12l6-to-gal16v8.txt

r0	r18404
	1	/o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11 +
	3	/i19 +
	4	i12
	5	o13.oe = vcc
	6
	7	/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	8	/i9 & i11
	9	o14.oe = vcc
	10
	11	/o15 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	12	i9 & i11
	13	o15.oe = vcc
	14
	15	/o16 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	16	/i9 & /i11
	17	o16.oe = vcc
	18
	19	/o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	20	/i9 & /i11
	21	o17.oe = vcc
	22
	23	/o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	24	/i9 & i11 +
	25	i19 +
	26	/i12
	27	o18.oe = vcc
	28

trunk/src/regtests/jedutil/baseline/gal16v8/pal10l8-to-gal16v8.txt

r0	r18404
	1	/o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11
	3	o12.oe = vcc
	4
	5	/o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	6	/i9 & i11
	7	o13.oe = vcc
	8
	9	/o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	10	i9 & /i11
	11	o14.oe = vcc
	12
	13	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	14	/i9 & /i11
	15	o15.oe = vcc
	16
	17	/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	18	/i9 & /i11
	19	o16.oe = vcc
	20
	21	/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	22	i9 & /i11
	23	o17.oe = vcc
	24
	25	/o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	26	i11
	27	o18.oe = vcc
	28
	29	/o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
	30	/i9
	31	o19.oe = vcc
	32

trunk/src/regtests/jedutil/baseline/gal16v8/pal16l8-to-gal16v8.txt

r0	r18404
	1	/o12 = i3 & i7 & /i9 +
	2	i1 & o13 +
	3	i3 +
	4	/i6 +
	5	i8 +
	6	/i9 +
	7	i7 & /o13
	8	o12.oe = vcc
	9
	10	/o13 = i11 & /o14 +
	11	/i9 +
	12	i8 +
	13	/i7 +
	14	/i6 & o14 +
	15	i5 +
	16	i4
	17	o13.oe = i2 & o14
	18
	19	/o14 = i1 & /o15 +
	20	/i8 +
	21	i1 & /i8 +
	22	i1 & /i2 & /o15 +
	23	/i2 +
	24	i2 & /i8 & o15 +
	25	i3
	26	o14.oe = vcc
	27
	28	/o15 = i3 & i6 & i7 & /i11 +
	29	i6 & o16 +
	30	i3 & /o16 +
	31	i7 +
	32	/i11 +
	33	i6 & i7 +
	34	i7 & /i11
	35	o15.oe = vcc
	36
	37	/o16 = /i3 & /o17 +
	38	/i4 & /i11 +
	39	/i3 & /i4 +
	40	/i3 & i4 +
	41	/i7 & o17 +
	42	/i7 & /i11 +
	43	i4
	44	o16.oe = vcc
	45
	46	/o17 = i2 & i5 & i6 & /i7 +
	47	i2 & /o18 +
	48	i5 +
	49	i6 +
	50	/i7 & o18 +
	51	i2 & /i7 +
	52	i5 & i6
	53	o17.oe = /o16
	54
	55	/o18 = /i2 & i5 & i6 & /i7 +
	56	i3 & i6 & i7 & i11 +
	57	i3 +
	58	/i2 & /i7 +
	59	i3 & i11 +
	60	i5 & i6 & /i7 +
	61	i7 & i11
	62	o18.oe = vcc
	63
	64	/o19 = i5 & i6 & /i7 & i11 +
	65	i3 & i6 & i7 +
	66	i5 +
	67	i6 +
	68	i7 +
	69	i11 +
	70	/i7
	71	o19.oe = vcc
	72

trunk/src/regtests/jedutil/baseline/gal16v8/pal16r4-to-gal16v8.txt

r0	r18404
	1	/o12 = /i2 & /i3 +
	2	i4 & o13 +
	3	i3 +
	4	/i6 +
	5	i8 +
	6	/i9 +
	7	i7 & /o13
	8	o12.oe = rf14
	9
	10	/o13 = /rf14 +
	11	/i9 +
	12	i8 +
	13	/i7 +
	14	/i6 & /rf14 +
	15	i5 +
	16	i4
	17	o13.oe = i2 & rf14
	18
	19	/rf14 := /rf15 +
	20	/i8 +
	21	i8 +
	22	/i2 & /rf15 +
	23	/i2 +
	24	i2 & /i8 & rf15 +
	25	/i4 +
	26	i3
	27	rf14.oe = OE
	28
	29	/rf15 := i3 & i6 & i7 +
	30	i6 & rf16 +
	31	i3 & /rf16 +
	32	i7 +
	33	/i4 +
	34	i6 & i7 +
	35	i4 & i7 +
	36	/i2 & /i7
	37	rf15.oe = OE
	38
	39	/rf16 := /i3 & /rf17 +
	40	/i4 +
	41	/i3 +
	42	/i3 & i4 +
	43	/i7 & rf17 +
	44	/i7 +
	45	i4 +
	46	i2 & i3
	47	rf16.oe = OE
	48
	49	/rf17 := i2 & i5 & i6 & /i7 +
	50	i2 & /o18 +
	51	i5 +
	52	i6 +
	53	/i7 & o18 +
	54	i2 & /i7 +
	55	i5 & i6 +
	56	/i3
	57	rf17.oe = OE
	58
	59	/o18 = /i2 & i5 & i6 & /i7 +
	60	i3 & i6 & i7 +
	61	i3 +
	62	/i2 & /i7 +
	63	/i3 +
	64	i5 & i6 & /i7 +
	65	i7
	66	o18.oe = vcc
	67
	68	/o19 = i5 & i6 & /i7 +
	69	i3 & i6 & i7 +
	70	i5 +
	71	i6 +
	72	i7 +
	73	/i4 +
	74	/i7
	75	o19.oe = vcc
	76

trunk/src/regtests/jedutil/baseline/gal16v8/pal16r6-to-gal16v8.txt

r0	r18404
	1	/o12 = /i2 & /i3 +
	2	i4 & rf13 +
	3	i3 +
	4	/i6 +
	5	i8 +
	6	/i9 +
	7	i7 & /rf13
	8	o12.oe = rf14
	9
	10	/rf13 := /rf14 +
	11	/i9 +
	12	i8 +
	13	/i7 +
	14	/i6 & /rf14 +
	15	i5 & rf14 +
	16	i4 +
	17	/i2
	18	rf13.oe = OE
	19
	20	/rf14 := /rf15 +
	21	/i8 +
	22	i8 +
	23	/i2 & /rf15 +
	24	/i2 +
	25	i2 & /i8 & rf15 +
	26	/i4 +
	27	i3
	28	rf14.oe = OE
	29
	30	/rf15 := i3 & i6 & i7 +
	31	i6 & rf16 +
	32	i3 & /rf16 +
	33	i7 +
	34	/i4 +
	35	i6 & i7 +
	36	i4 & i7 +
	37	/i2 & /i7
	38	rf15.oe = OE
	39
	40	/rf16 := /i3 & /rf17 +
	41	/i4 +
	42	/i3 +
	43	/i3 & i4 +
	44	/i7 & rf17 +
	45	/i7 +
	46	i4 +
	47	i2 & i3
	48	rf16.oe = OE
	49
	50	/rf17 := i2 & i5 & i6 & /i7 +
	51	i2 & /rf18 +
	52	i5 +
	53	i6 +
	54	/i7 & rf18 +
	55	i2 & /i7 +
	56	i5 & i6 +
	57	/i3
	58	rf17.oe = OE
	59
	60	/rf18 := /i2 & i5 & i6 & /i7 +
	61	i3 & i6 & i7 +
	62	i3 +
	63	/i2 & /i7 +
	64	/i3 +
	65	i5 & i6 & /i7 +
	66	i7 +
	67	i4
	68	rf18.oe = OE
	69
	70	/o19 = i5 & i6 & /i7 +
	71	i3 & i6 & i7 +
	72	i5 +
	73	i6 +
	74	i7 +
	75	/i4 +
	76	/i7
	77	o19.oe = vcc
	78

trunk/src/regtests/jedutil/baseline/gal16v8/pal16r8-to-gal16v8.txt

r0	r18404
	1	/rf12 := /i2 & /i3 +
	2	i4 & rf13 +
	3	i3 +
	4	/i6 +
	5	i8 +
	6	/i9 +
	7	i7 & /rf13 +
	8	i5
	9	rf12.oe = OE
	10
	11	/rf13 := /rf14 +
	12	/i9 +
	13	i8 +
	14	/i7 +
	15	/i6 & rf14 +
	16	i5 +
	17	i4 +
	18	/i3
	19	rf13.oe = OE
	20
	21	/rf14 := /rf15 +
	22	/i8 +
	23	i8 +
	24	/i2 & /rf15 +
	25	/i2 +
	26	i2 & /i8 & rf15 +
	27	/i4 +
	28	i3
	29	rf14.oe = OE
	30
	31	/rf15 := i3 & i6 & i7 +
	32	i6 & rf16 +
	33	i3 & /rf16 +
	34	i7 +
	35	/i4 +
	36	i6 & i7 +
	37	i4 & i7 +
	38	/i2 & /i7
	39	rf15.oe = OE
	40
	41	/rf16 := /i3 & /rf17 +
	42	/i4 +
	43	/i3 +
	44	/i3 & i4 +
	45	/i7 & rf17 +
	46	/i7 +
	47	i4 +
	48	i2 & i3
	49	rf16.oe = OE
	50
	51	/rf17 := i2 & i5 & i6 & /i7 +
	52	i2 & /rf18 +
	53	i5 +
	54	i6 +
	55	/i7 & rf18 +
	56	i2 & /i7 +
	57	i5 & i6 +
	58	/i3
	59	rf17.oe = OE
	60
	61	/rf18 := /i2 & i5 & i6 & /i7 +
	62	i3 & i6 & i7 +
	63	i3 & rf19 +
	64	/i2 & /i7 +
	65	/i3 & /rf19 +
	66	i5 & i6 & /i7 +
	67	i7 +
	68	/i4
	69	rf18.oe = OE
	70
	71	/rf19 := i5 & i6 & /i7 +
	72	i3 & i6 & i7 +
	73	i5 & rf12 +
	74	i6 +
	75	i7 +
	76	/i4 & /rf12 +
	77	/i7 +
	78	i2
	79	rf19.oe = OE
	80

trunk/src/regtests/jedutil/baseline/gal16v8/pal10h8-to-gal16v8.txt

r0	r18404
	1	o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11
	3	o12.oe = vcc
	4
	5	o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	6	/i9 & i11
	7	o13.oe = vcc
	8
	9	o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	10	i9 & /i11
	11	o14.oe = vcc
	12
	13	o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	14	/i9 & /i11
	15	o15.oe = vcc
	16
	17	o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	18	/i9 & /i11
	19	o16.oe = vcc
	20
	21	o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	22	i9 & /i11
	23	o17.oe = vcc
	24
	25	o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	26	/i9 & i11
	27	o18.oe = vcc
	28
	29	o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
	30	i11
	31	o19.oe = vcc
	32

trunk/src/regtests/jedutil/baseline/gal16v8/pal12h6-to-gal16v8.txt

r0	r18404
	1	o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11 +
	3	/i19 +
	4	i12
	5	o13.oe = vcc
	6
	7	o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	8	/i9 & i11
	9	o14.oe = vcc
	10
	11	o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	12	/i9 & /i11
	13	o15.oe = vcc
	14
	15	o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	16	i9 & /i11
	17	o16.oe = vcc
	18
	19	o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	20	/i9 & /i11
	21	o17.oe = vcc
	22
	23	o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	24	/i9 & i11 +
	25	i19 +
	26	/i12
	27	o18.oe = vcc
	28

trunk/src/regtests/jedutil/baseline/gal16v8/pal14h4-to-gal16v8.txt

r0	r18404
	1	o14 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11 +
	3	/i12 & /i13 +
	4	i18 & /i19
	5	o14.oe = vcc
	6
	7	o15 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	8	i9 & /i11 +
	9	i12 & i13 +
	10	/i18 & i19
	11	o15.oe = vcc
	12
	13	o16 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	14	/i9 & i11 +
	15	i12 & /i13 +
	16	/i18 & /i19
	17	o16.oe = vcc
	18
	19	o17 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	20	i9 & i11 +
	21	/i12 & i13 +
	22	i18 & i19
	23	o17.oe = vcc
	24

trunk/src/regtests/jedutil/baseline/gal16v8/pal16h2-to-gal16v8.txt

r0	r18404
	1	o15 = i1 & i2 & i3 & /i4 & i5 & /i6 & i7 & i8 +
	2	i9 +
	3	/i11 +
	4	i12 +
	5	/i13 +
	6	i14 +
	7	/i17 +
	8	i18 & /i19
	9	o15.oe = vcc
	10
	11	o16 = i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8 +
	12	/i9 +
	13	i11 +
	14	/i12 +
	15	i13 +
	16	/i14 +
	17	i17 +
	18	/i18 & i19
	19	o16.oe = vcc
	20

trunk/src/regtests/jedutil/baseline/pal20r8/pal20r8.txt

r0	r18404
	1	/rf15 := i2 & i6 & i7 +
	2	i6 & rf16 +
	3	i3 & /rf16 +
	4	i7 +
	5	/i4 +
	6	i6 & i7 +
	7	i4 & i7 +
	8	/i23
	9	rf15.oe = OE
	10
	11	/rf16 := /i3 & /rf17 +
	12	/i4 +
	13	/i3 +
	14	/i3 & i4 +
	15	/i7 & rf17 +
	16	/i7 +
	17	i4 +
	18	i23
	19	rf16.oe = OE
	20
	21	/rf17 := /i2 +
	22	/rf18 +
	23	i5 +
	24	i6 +
	25	rf18 +
	26	i4 +
	27	/i10 +
	28	/i23
	29	rf17.oe = OE
	30
	31	/rf18 := /i2 & i5 & i6 & /i7 +
	32	i3 & i6 & i7 +
	33	i3 & rf19 +
	34	/i2 & /i7 +
	35	/i3 & /rf19 +
	36	i5 & i6 & /i7 +
	37	i7 +
	38	/i11
	39	rf18.oe = OE
	40
	41	/rf19 := i5 & i6 & /i7 +
	42	i3 & i6 & i7 +
	43	i5 & rf20 +
	44	i6 +
	45	i7 +
	46	/i4 & /rf20 +
	47	/i7 +
	48	i10
	49	rf19.oe = OE
	50
	51	/rf20 := i10 & rf17 +
	52	/i11 +
	53	i4 & /rf17 +
	54	i2 +
	55	/i6 & /i7 +
	56	i8 +
	57	/i9 +
	58	rf22
	59	rf20.oe = OE
	60
	61	/rf21 := /i8 +
	62	/i2 & rf17 +
	63	i11 +
	64	/i10 +
	65	rf15 +
	66	/i14 +
	67	/i3 +
	68	i8 & i9 & /rf22
	69	rf21.oe = OE
	70
	71	/rf22 := i14 +
	72	/rf15 +
	73	i3 & /rf21 +
	74	i7 +
	75	/i8 & rf21 +
	76	i10 +
	77	/i9 +
	78	i14 & /rf15
	79	rf22.oe = OE
	80

trunk/src/regtests/jedutil/baseline/pal16r4/pal16r4.txt

r0	r18404
	1	/o12 = /i2 & /i3 +
	2	i4 & o13 +
	3	i3 +
	4	/i6 +
	5	i8 +
	6	/i9 +
	7	i7 & /o13
	8	o12.oe = rf14
	9
	10	/o13 = /rf14 +
	11	/i9 +
	12	i8 +
	13	/i7 +
	14	/i6 & /rf14 +
	15	i5 +
	16	i4
	17	o13.oe = i2 & rf14
	18
	19	/rf14 := /rf15 +
	20	/i8 +
	21	i8 +
	22	/i2 & /rf15 +
	23	/i2 +
	24	i2 & /i8 & rf15 +
	25	/i4 +
	26	i3
	27	rf14.oe = OE
	28
	29	/rf15 := i3 & i6 & i7 +
	30	i6 & rf16 +
	31	i3 & /rf16 +
	32	i7 +
	33	/i4 +
	34	i6 & i7 +
	35	i4 & i7 +
	36	/i2 & /i7
	37	rf15.oe = OE
	38
	39	/rf16 := /i3 & /rf17 +
	40	/i4 +
	41	/i3 +
	42	/i3 & i4 +
	43	/i7 & rf17 +
	44	/i7 +
	45	i4 +
	46	i2 & i3
	47	rf16.oe = OE
	48
	49	/rf17 := i2 & i5 & i6 & /i7 +
	50	i2 & /o18 +
	51	i5 +
	52	i6 +
	53	/i7 & o18 +
	54	i2 & /i7 +
	55	i5 & i6 +
	56	/i3
	57	rf17.oe = OE
	58
	59	/o18 = /i2 & i5 & i6 & /i7 +
	60	i3 & i6 & i7 +
	61	i3 +
	62	/i2 & /i7 +
	63	/i3 +
	64	i5 & i6 & /i7 +
	65	i7
	66	o18.oe = vcc
	67
	68	/o19 = i5 & i6 & /i7 +
	69	i3 & i6 & i7 +
	70	i5 +
	71	i6 +
	72	i7 +
	73	/i4 +
	74	/i7
	75	o19.oe = vcc
	76

trunk/src/regtests/jedutil/baseline/pal20l10/pal20l10.txt

r0	r18404
	1	/o14 = /i11 +
	2	i10 +
	3	i9 & /o15
	4	o14.oe = o15
	5
	6	/o15 = /i1 & i2 & /i3 & i4 & i11 +
	7	/i1 & i2 & /i3 & /i5 & /i13 & o16 +
	8	/i1 & i2 & /i3 & i6
	9	o15.oe = /o16
	10
	11	/o16 = i1 & /i2 & /o17 +
	12	i3 & /i4 +
	13	i3 & i9 & o17
	14	o16.oe = vcc
	15
	16	/o17 = /o18 +
	17	i10 & o18 +
	18	i9
	19	o17.oe = i4 & i5
	20
	21	/o18 = i1 & /i2 & i3 & /i4 & /i8 +
	22	/i6 & i7 & i8 & i9 & i10 & /o19 +
	23	i1 & i2 & i3 & /i4 & /i5 & o19
	24	o18.oe = i1 & i10
	25
	26	/o19 = i11 & o20 +
	27	i2 & /i10 +
	28	i9 & i11
	29	o19.oe = i8 & /o20
	30
	31	/o20 = o21 +
	32	/i6 +
	33	/i7 & /o21
	34	o20.oe = vcc
	35
	36	/o21 = i1 & i8 +
	37	/i4 & /o22 +
	38	o22
	39	o21.oe = i5 & i6
	40
	41	/o22 = i1 & /i8 +
	42	/i8 +
	43	i1
	44	o22.oe = i3 & /i7
	45
	46	/o23 = i7 +
	47	i11 +
	48	/i13
	49	o23.oe = vcc
	50

trunk/src/regtests/jedutil/baseline/pal16r6/pal16r6.txt

r0	r18404
	1	/o12 = /i2 & /i3 +
	2	i4 & rf13 +
	3	i3 +
	4	/i6 +
	5	i8 +
	6	/i9 +
	7	i7 & /rf13
	8	o12.oe = rf14
	9
	10	/rf13 := /rf14 +
	11	/i9 +
	12	i8 +
	13	/i7 +
	14	/i6 & /rf14 +
	15	i5 & rf14 +
	16	i4 +
	17	/i2
	18	rf13.oe = OE
	19
	20	/rf14 := /rf15 +
	21	/i8 +
	22	i8 +
	23	/i2 & /rf15 +
	24	/i2 +
	25	i2 & /i8 & rf15 +
	26	/i4 +
	27	i3
	28	rf14.oe = OE
	29
	30	/rf15 := i3 & i6 & i7 +
	31	i6 & rf16 +
	32	i3 & /rf16 +
	33	i7 +
	34	/i4 +
	35	i6 & i7 +
	36	i4 & i7 +
	37	/i2 & /i7
	38	rf15.oe = OE
	39
	40	/rf16 := /i3 & /rf17 +
	41	/i4 +
	42	/i3 +
	43	/i3 & i4 +
	44	/i7 & rf17 +
	45	/i7 +
	46	i4 +
	47	i2 & i3
	48	rf16.oe = OE
	49
	50	/rf17 := i2 & i5 & i6 & /i7 +
	51	i2 & /rf18 +
	52	i5 +
	53	i6 +
	54	/i7 & rf18 +
	55	i2 & /i7 +
	56	i5 & i6 +
	57	/i3
	58	rf17.oe = OE
	59
	60	/rf18 := /i2 & i5 & i6 & /i7 +
	61	i3 & i6 & i7 +
	62	i3 +
	63	/i2 & /i7 +
	64	/i3 +
	65	i5 & i6 & /i7 +
	66	i7 +
	67	i4
	68	rf18.oe = OE
	69
	70	/o19 = i5 & i6 & /i7 +
	71	i3 & i6 & i7 +
	72	i5 +
	73	i6 +
	74	i7 +
	75	/i4 +
	76	/i7
	77	o19.oe = vcc
	78

trunk/src/regtests/jedutil/baseline/pal16r8/pal16r8.txt

r0	r18404
	1	/rf12 := /i2 & /i3 +
	2	i4 & rf13 +
	3	i3 +
	4	/i6 +
	5	i8 +
	6	/i9 +
	7	i7 & /rf13 +
	8	i5
	9	rf12.oe = OE
	10
	11	/rf13 := /rf14 +
	12	/i9 +
	13	i8 +
	14	/i7 +
	15	/i6 & rf14 +
	16	i5 +
	17	i4 +
	18	/i3
	19	rf13.oe = OE
	20
	21	/rf14 := /rf15 +
	22	/i8 +
	23	i8 +
	24	/i2 & /rf15 +
	25	/i2 +
	26	i2 & /i8 & rf15 +
	27	/i4 +
	28	i3
	29	rf14.oe = OE
	30
	31	/rf15 := i3 & i6 & i7 +
	32	i6 & rf16 +
	33	i3 & /rf16 +
	34	i7 +
	35	/i4 +
	36	i6 & i7 +
	37	i4 & i7 +
	38	/i2 & /i7
	39	rf15.oe = OE
	40
	41	/rf16 := /i3 & /rf17 +
	42	/i4 +
	43	/i3 +
	44	/i3 & i4 +
	45	/i7 & rf17 +
	46	/i7 +
	47	i4 +
	48	i2 & i3
	49	rf16.oe = OE
	50
	51	/rf17 := i2 & i5 & i6 & /i7 +
	52	i2 & /rf18 +
	53	i5 +
	54	i6 +
	55	/i7 & rf18 +
	56	i2 & /i7 +
	57	i5 & i6 +
	58	/i3
	59	rf17.oe = OE
	60
	61	/rf18 := /i2 & i5 & i6 & /i7 +
	62	i3 & i6 & i7 +
	63	i3 & rf19 +
	64	/i2 & /i7 +
	65	/i3 & /rf19 +
	66	i5 & i6 & /i7 +
	67	i7 +
	68	/i4
	69	rf18.oe = OE
	70
	71	/rf19 := i5 & i6 & /i7 +
	72	i3 & i6 & i7 +
	73	i5 & rf12 +
	74	i6 +
	75	i7 +
	76	/i4 & /rf12 +
	77	/i7 +
	78	i2
	79	rf19.oe = OE
	80

trunk/src/regtests/jedutil/baseline/pal16c1/pal16c1.txt

r0	r18404
	1	/o15 = i1 & i2 +
	2	i3 & i4 +
	3	i5 & i6 +
	4	i7 & i8 +
	5	i9 & i11 +
	6	i12 & i13 +
	7	i14 & i17 +
	8	i18 & i19 +
	9	/i1 & /i2 +
	10	/i3 & /i4 +
	11	/i5 & /i6 +
	12	/i7 & /i8 +
	13	/i9 & /i11 +
	14	/i12 & /i13 +
	15	/i14 & /i17 +
	16	/i18 & /i19
	17	o15.oe = vcc
	18
	19	o16 = i1 & i2 +
	20	i3 & i4 +
	21	i5 & i6 +
	22	i7 & i8 +
	23	i9 & i11 +
	24	i12 & i13 +
	25	i14 & i17 +
	26	i18 & i19 +
	27	/i1 & /i2 +
	28	/i3 & /i4 +
	29	/i5 & /i6 +
	30	/i7 & /i8 +
	31	/i9 & /i11 +
	32	/i12 & /i13 +
	33	/i14 & /i17 +
	34	/i18 & /i19
	35	o16.oe = vcc
	36

trunk/src/regtests/jedutil/baseline/pal10h8/pal10h8.txt

r0	r18404
	1	o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11
	3	o12.oe = vcc
	4
	5	o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	6	/i9 & i11
	7	o13.oe = vcc
	8
	9	o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	10	i9 & /i11
	11	o14.oe = vcc
	12
	13	o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	14	/i9 & /i11
	15	o15.oe = vcc
	16
	17	o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	18	/i9 & /i11
	19	o16.oe = vcc
	20
	21	o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	22	i9 & /i11
	23	o17.oe = vcc
	24
	25	o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	26	/i9 & i11
	27	o18.oe = vcc
	28
	29	o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
	30	i11
	31	o19.oe = vcc
	32

trunk/src/regtests/jedutil/baseline/pal16h2/pal16h2.txt

r0	r18404
	1	o15 = i1 & i2 & i3 & /i4 & i5 & /i6 & i7 & i8 +
	2	i9 +
	3	/i11 +
	4	i12 +
	5	/i13 +
	6	i14 +
	7	/i17 +
	8	i18 & /i19
	9	o15.oe = vcc
	10
	11	o16 = i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8 +
	12	/i9 +
	13	i11 +
	14	/i12 +
	15	i13 +
	16	/i14 +
	17	i17 +
	18	/i18 & i19
	19	o16.oe = vcc
	20

trunk/src/regtests/jedutil/baseline/pal14h4/pal14h4.txt

r0	r18404
	1	o14 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11 +
	3	/i12 & /i13 +
	4	i18 & /i19
	5	o14.oe = vcc
	6
	7	o15 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	8	i9 & /i11 +
	9	i12 & i13 +
	10	/i18 & i19
	11	o15.oe = vcc
	12
	13	o16 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	14	/i9 & i11 +
	15	i12 & /i13 +
	16	/i18 & /i19
	17	o16.oe = vcc
	18
	19	o17 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	20	i9 & i11 +
	21	/i12 & i13 +
	22	i18 & i19
	23	o17.oe = vcc
	24

trunk/src/regtests/jedutil/baseline/pal12h6/pal12h6.txt

r0	r18404
	1	o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11 +
	3	/i19 +
	4	i12
	5	o13.oe = vcc
	6
	7	o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	8	/i9 & i11
	9	o14.oe = vcc
	10
	11	o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	12	/i9 & /i11
	13	o15.oe = vcc
	14
	15	o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	16	i9 & /i11
	17	o16.oe = vcc
	18
	19	o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	20	/i9 & /i11
	21	o17.oe = vcc
	22
	23	o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	24	/i9 & i11 +
	25	i19 +
	26	/i12
	27	o18.oe = vcc
	28

trunk/src/regtests/jedutil/baseline/pal10l8/pal10l8.txt

r0	r18404
	1	/o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11
	3	o12.oe = vcc
	4
	5	/o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	6	/i9 & i11
	7	o13.oe = vcc
	8
	9	/o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	10	i9 & /i11
	11	o14.oe = vcc
	12
	13	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	14	/i9 & /i11
	15	o15.oe = vcc
	16
	17	/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	18	/i9 & /i11
	19	o16.oe = vcc
	20
	21	/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	22	i9 & /i11
	23	o17.oe = vcc
	24
	25	/o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	26	i11
	27	o18.oe = vcc
	28
	29	/o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
	30	/i9
	31	o19.oe = vcc
	32

trunk/src/regtests/jedutil/baseline/pal16l2/pal16l2.txt

r0	r18404
	1	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	2	/i9 +
	3	/i11 +
	4	/i12 +
	5	i13 +
	6	i14 +
	7	i17 +
	8	i18 & i19
	9	o15.oe = vcc
	10
	11	/o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	12	i9 +
	13	i11 +
	14	i12 +
	15	/i13 +
	16	/i14 +
	17	/i17 +
	18	/i18 & /i19
	19	o16.oe = vcc
	20

trunk/src/regtests/jedutil/baseline/pal14l4/pal14l4.txt

r0	r18404
	1	/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	/i9 & i11 +
	3	i12 & /i13 +
	4	i18 & i19
	5	o14.oe = vcc
	6
	7	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	8	/i9 & /i11 +
	9	/i12 & i13 +
	10	/i18 & i19
	11	o15.oe = vcc
	12
	13	/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	14	/i9 & /i11 +
	15	i12 & i13 +
	16	i18 & /i19
	17	o16.oe = vcc
	18
	19	/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	20	/i9 & i11 +
	21	/i12 & /i13 +
	22	/i18 & /i19
	23	o17.oe = vcc
	24

trunk/src/regtests/jedutil/baseline/pal12l6/pal12l6.txt

r0	r18404
	1	/o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	2	i9 & i11 +
	3	/i19 +
	4	i12
	5	o13.oe = vcc
	6
	7	/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	8	/i9 & i11
	9	o14.oe = vcc
	10
	11	/o15 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	12	i9 & i11
	13	o15.oe = vcc
	14
	15	/o16 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	16	/i9 & /i11
	17	o16.oe = vcc
	18
	19	/o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	20	/i9 & /i11
	21	o17.oe = vcc
	22
	23	/o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	24	/i9 & i11 +
	25	i19 +
	26	/i12
	27	o18.oe = vcc
	28

trunk/src/regtests/jedutil/baseline/pal20l8/pal20l8.txt

r0	r18404
	1	/o15 = /i1 & i2 & /i3 & i4 & i11 +
	2	/i1 & i2 & /i3 & /i5 & /i13 +
	3	/i1 & i2 & /i3 & i6 & i14 +
	4	/i1 & i2 & /i3 & /i7 & /i23 +
	5	/i1 & i2 & /i3 & i8 & /i11 +
	6	/i1 & i2 & /i3 & /i9 & i13 +
	7	/o16
	8	o15.oe = o16
	9
	10	/o16 = i1 & /i2 & /o17 +
	11	i3 & /i4 +
	12	i5 & /i6 +
	13	i7 & /i8 +
	14	i3 & i9 & o17 +
	15	i1 & /i2 & i3 & /i4 & i5 & /i6 & i7 & /i8 & /i9 +
	16	/i8 & /i9
	17	o16.oe = vcc
	18
	19	/o17 = /o18 & /i23 +
	20	i10 & o18 +
	21	i9 +
	22	i8 +
	23	/i7 +
	24	/i6 +
	25	i5
	26	o17.oe = i4 & i5
	27
	28	/o18 = i1 & /i2 & i3 & /i4 & /i8 & i23 +
	29	i1 & i2 & i3 & /i4 & /i5 +
	30	/i6 & i7 & i8 & i9 & i10 & /o19 +
	31	i11 & i13 & i14 & i23 +
	32	/i6 & i7 & i8 & i9 & i10 +
	33	i3 & i13 & i14 & i23 +
	34	i1 & i2 & i3 & /i4 & /i5 & o19
	35	o18.oe = i1 & i10 & i23
	36
	37	/o19 = i9 & /i10 & i11 & i23 +
	38	i9 +
	39	/i10 +
	40	i11 & o20 +
	41	i23 +
	42	i2 & /i10 & i23 +
	43	i9 & i11
	44	o19.oe = i8 & /o20
	45
	46	/o20 = o21 +
	47	/i2 +
	48	/i3 +
	49	/i4 +
	50	/i5 +
	51	/i6 +
	52	/i7 & /o21
	53	o20.oe = vcc
	54
	55	/o21 = i1 & i8 +
	56	/i14 +
	57	i1 & /i5 & i8 +
	58	i23 +
	59	i1 & i8 & /i14 +
	60	i13 +
	61	i1 & i11
	62	o21.oe = i5 & i6
	63
	64	/o22 = i1 & /i8 +
	65	/i8 +
	66	i1 +
	67	/i10 +
	68	/i23 +
	69	i8 & /i13 +
	70	/i11
	71	o22.oe = i3 & /i7
	72

trunk/src/regtests/jedutil/baseline/pal20r4/pal20r4.txt

r0	r18404
	1	/o15 = i2 & i6 & i7 +
	2	i6 & o16 +
	3	i3 & /o16 +
	4	i7 +
	5	/i4 +
	6	i6 & i7 +
	7	i4 & i7
	8	o15.oe = /i23
	9
	10	/o16 = /i3 & /rf17 +
	11	/i4 +
	12	/i3 +
	13	/i3 & i4 +
	14	/i7 & rf17 +
	15	/i7 +
	16	i4
	17	o16.oe = i23
	18
	19	/rf17 := /i2 +
	20	/rf18 +
	21	i5 +
	22	i6 +
	23	rf18 +
	24	i4 +
	25	/i10 +
	26	/i23
	27	rf17.oe = OE
	28
	29	/rf18 := /i2 & i5 & i6 & /i7 +
	30	i3 & i6 & i7 +
	31	i3 & rf19 +
	32	/i2 & /i7 +
	33	/i3 & /rf19 +
	34	i5 & i6 & /i7 +
	35	i7 +
	36	/i11
	37	rf18.oe = OE
	38
	39	/rf19 := i5 & i6 & /i7 +
	40	i3 & i6 & i7 +
	41	i5 & rf20 +
	42	i6 +
	43	i7 +
	44	/i4 & /rf20 +
	45	/i7 +
	46	i10
	47	rf19.oe = OE
	48
	49	/rf20 := i10 & rf17 +
	50	/i11 +
	51	i4 & /rf17 +
	52	i2 +
	53	/i6 & /i7 +
	54	i8 +
	55	/i9 +
	56	o22
	57	rf20.oe = OE
	58
	59	/o21 = /i8 +
	60	/i2 & rf17 +
	61	i11 +
	62	/i10 +
	63	o15 +
	64	/i14 +
	65	/i3
	66	o21.oe = i8 & i9 & /o22
	67
	68	/o22 = i14 +
	69	/o15 +
	70	i3 & /o21 +
	71	i7 +
	72	/i8 & o21 +
	73	i10 +
	74	/i9
	75	o22.oe = i14 & /o15
	76

trunk/src/regtests/jedutil/baseline/pal20r6/pal20r6.txt

r0	r18404
	1	/o15 = i2 & i6 & i7 +
	2	i6 & rf16 +
	3	i3 & /rf16 +
	4	i7 +
	5	/i4 +
	6	i6 & i7 +
	7	i4 & i7
	8	o15.oe = /i23
	9
	10	/rf16 := /i3 & /rf17 +
	11	/i4 & /i23 +
	12	/i3 +
	13	/i3 & i4 +
	14	/i7 & rf17 +
	15	/i7 +
	16	i4 +
	17	i23
	18	rf16.oe = OE
	19
	20	/rf17 := /i2 +
	21	/rf18 +
	22	i5 +
	23	i6 +
	24	rf18 +
	25	i4 +
	26	/i10 +
	27	/i23
	28	rf17.oe = OE
	29
	30	/rf18 := /i2 & i5 & i6 & /i7 +
	31	i3 & i6 & i7 +
	32	i3 & rf19 +
	33	/i2 & /i7 +
	34	/i3 & /rf19 +
	35	i5 & i6 & /i7 +
	36	i7 +
	37	/i11
	38	rf18.oe = OE
	39
	40	/rf19 := i5 & i6 & /i7 +
	41	i3 & i6 & i7 +
	42	i5 & rf20 +
	43	i6 +
	44	i7 +
	45	/i4 & /rf20 +
	46	/i7 +
	47	i10
	48	rf19.oe = OE
	49
	50	/rf20 := i10 & rf17 +
	51	/i11 +
	52	i4 & /rf17 +
	53	i2 +
	54	/i6 & /i7 +
	55	i8 +
	56	/i9 +
	57	o22
	58	rf20.oe = OE
	59
	60	/rf21 := /i8 +
	61	/i2 & rf17 +
	62	i11 +
	63	/i10 +
	64	o15 +
	65	/i14 & /o22 +
	66	/i3 +
	67	/i5
	68	rf21.oe = OE
	69
	70	/o22 = i14 +
	71	/o15 +
	72	i3 & /rf21 +
	73	i7 +
	74	/i8 & rf21 +
	75	i10 +
	76	/i9
	77	o22.oe = i14 & /o15
	78

trunk/src/regtests/jedutil/baseline/pal16l8/pal16l8.txt

r0	r18404
	1	/o12 = i3 & i7 & /i9 +
	2	i1 & o13 +
	3	i3 +
	4	/i6 +
	5	i8 +
	6	/i9 +
	7	i7 & /o13
	8	o12.oe = vcc
	9
	10	/o13 = i11 & /o14 +
	11	/i9 +
	12	i8 +
	13	/i7 +
	14	/i6 & o14 +
	15	i5 +
	16	i4
	17	o13.oe = i2 & o14
	18
	19	/o14 = i1 & /o15 +
	20	/i8 +
	21	i1 & /i8 +
	22	i1 & /i2 & /o15 +
	23	/i2 +
	24	i2 & /i8 & o15 +
	25	i3
	26	o14.oe = vcc
	27
	28	/o15 = i3 & i6 & i7 & /i11 +
	29	i6 & o16 +
	30	i3 & /o16 +
	31	i7 +
	32	/i11 +
	33	i6 & i7 +
	34	i7 & /i11
	35	o15.oe = vcc
	36
	37	/o16 = /i3 & /o17 +
	38	/i4 & /i11 +
	39	/i3 & /i4 +
	40	/i3 & i4 +
	41	/i7 & o17 +
	42	/i7 & /i11 +
	43	i4
	44	o16.oe = vcc
	45
	46	/o17 = i2 & i5 & i6 & /i7 +
	47	i2 & /o18 +
	48	i5 +
	49	i6 +
	50	/i7 & o18 +
	51	i2 & /i7 +
	52	i5 & i6
	53	o17.oe = /o16
	54
	55	/o18 = /i2 & i5 & i6 & /i7 +
	56	i3 & i6 & i7 & i11 +
	57	i3 +
	58	/i2 & /i7 +
	59	i3 & i11 +
	60	i5 & i6 & /i7 +
	61	i7 & i11
	62	o18.oe = vcc
	63
	64	/o19 = i5 & i6 & /i7 & i11 +
	65	i3 & i6 & i7 +
	66	i5 +
	67	i6 +
	68	i7 +
	69	i11 +
	70	/i7
	71	o19.oe = vcc
	72

trunk/src/regtests/jedutil/jeds/pal20l10.jed

r18403	r18404
1		
2		PAL20L10
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "pal20l10.eqn". Date: 8-31-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
8		NOTE PINS i11:11 GND:12 i13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
9		NOTE PINS o19:19 o20:20 o21:21 o22:22 o23:23 VCC:24*
10		QF1600*QP24*F0*
11		L0000
12		1111111111111111111111111111111111111111
13		1111111111111111111101111111111111111111
14		1111111111111111111111111111111111110111
15		1111111111111111111111111111111111111110*
16		L0160
17		1111011111111111111110111111111111111111
18		1101111111111111111111111011111111111111
19		1111111111111111111111111011111111111111
20		1101111111111111111111111111111111111111*
21		L0320
22		1111111111110111011111111111111111111111
23		1101111111111111111111110111111111111111
24		1111111010111111111111111111111111111111
25		1111110111111111111111111111111111111111*
26		L0480
27		1111111111111111111111111111111111111111
28		1111111111011111111111111111111111111111
29		1111111111111111101111111111111111111111
30		1111111111101111111110111111111111111111*
31		L0640
32		1111111111111110111111110111111111111111
33		1111111111111101111111111111111111110111
34		0111111111111111111111111111111110111111
35		1111111111111111111111111111011111110111*
36		L0800
37		1101111111111111111111111111111101111111
38		1001011110111111111111111011111111111111
39		1111111111111111101001110111011101111111
40		0101011110111011110111111111111111111111*
41		L0960
42		1111111101110111111111111111111111111111
43		1111111111111111111111101111111111111111
44		1111111111111111111111011111111101111111
45		1111111111111111111111111111011111111111*
46		L1120
47		1111111111111111111111111111111111111111
48		1001111111111111111111111110111111111111
49		1111011110111111111111111111111111111111
50		1111011111111111111111111101011111111111*
51		L1280
52		1111111111111111111111111111111011111111
53		0110101101111111111111111111111111110111
54		0110101111111011111111111111110111111110
55		0110101111111111011111111111111111111111*
56		L1440
57		1111111111111111111111111111111111011111
58		1111111111111111111111111111111111111011
59		1111111111111111111111111111111101111111
60		1111111111111111111111111111011111101111*
61		CC08C*
62		0000

trunk/src/regtests/jedutil/jeds/pal16h2.jed

r18403	r18404
1		
2		PAL16H2
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "PAL16H2.eqn". Date: 8-24-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
8		NOTE PINS i11:11 i12:12 i13:13 i14:14 o15:15 o16:16 i17:17 i18:18*
9		NOTE PINS i19:19 VCC:20*
10		QF0512*QP20*F0*
11		L0000
12		01011011011110110111011101111111
13		11111111111111111111111111111011
14		11111111111111111111111111111101
15		11111111111111111111111111101111
16		11111111111111111111110111111111
17		11111111111111111110111111111111
18		11111111111111011111111111111111
19		11111101111011111111111111111111*
20		L0256
21		01010111101101111011011101111111
22		11111111111111111111111111110111
23		11111111111111111111111111111110
24		11111111111111111111111111011111
25		11111111111111111111111011111111
26		11111111111111111101111111111111
27		11111111111111101111111111111111
28		11111110110111111111111111111111*
29		C3BDA*
30		0000

trunk/src/regtests/jedutil/jeds/pal14h4.jed

r18403	r18404
1		
2		PAL14H4
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "PAL14H4.eqn". Date: 8-24-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
8		NOTE PINS i11:11 i12:12 i13:13 o14:14 o15:15 o16:16 o17:17 i18:18*
9		NOTE PINS i19:19 VCC:20*
10		QF0448*QP20*F0*
11		L0000
12		0101011110110101011101111111
13		1111111111111111111111110101
14		1111111111111111110111101111
15		1111110111011111111111111111*
16		L0112
17		0101101101110101011101111111
18		1111111111111111111111111001
19		1111111111111111111011011111
20		1111111011101111111111111111*
21		L0224
22		1001011101110101011101111111
23		1111111111111111111111110110
24		1111111111111111110111011111
25		1111110111101111111111111111*
26		L0336
27		0110011101110101011101111111
28		1111111111111111111111110101
29		1111111111111111111011101111
30		1111111011011111111111111111*
31		C3116*
32		0000

trunk/src/regtests/jedutil/jeds/pal12h6.jed

r18403	r18404
1		
2		PAL12H6
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "pal12h6.eqn". Date: 8-27-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
8		NOTE PINS i11:11 i12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
9		NOTE PINS i19:19 VCC:20*
10		QF0384*QP20*F0*
11		L0000
12		010101110101100101111111
13		111111111111111111111001
14		111111011111111111111111
15		111111111111111111101111*
16		L0096
17		010101110110010101111111
18		111111111111111111111010*
19		L0144
20		010101110101011001111111
21		111111111111111111110110*
22		L0192
23		010101111001010101111111
24		111111111111111111111010*
25		L0240
26		100101110101010101111111
27		111111111111111111111001*
28		L0288
29		011001110101010101111111
30		111111111111111111110101
31		111111101111111111111111
32		111111111111111111011111*
33		C2948*
34		0000

trunk/src/regtests/jedutil/jeds/pal10h8.jed

r18403	r18404
1		
2		PAL10H8
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "pal10h8.eqn". Date: 8-27-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
8		NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
9		NOTE PINS o19:19 VCC:20*
10		QF0320*QP20*F0*
11		L0000
12		01010101010101101111
13		11111111111111111101*
14		L0040
15		01010101010110011111
16		11111111111111111001*
17		L0080
18		01010101011001011111
19		11111111111111110110*
20		L0120
21		01010101100101011111
22		11111111111111111010*
23		L0160
24		01010110010101011111
25		11111111111111111010*
26		L0200
27		01011001010101011111
28		11111111111111110110*
29		L0240
30		10010101010101011111
31		11111111111111111001*
32		L0280
33		01100101010101011111
34		11111111111111110101*
35		C1E2E*
36		0000

trunk/src/regtests/jedutil/jeds/pal10l8.jed

r18403	r18404
1		
2		PAL10L8
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "pal10l8.eqn". Date: 8-27-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
8		NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
9		NOTE PINS o19:19 VCC:20*
10		QF0320*QP20*F0*
11		L0000
12		01010101010101101111
13		11111111111111111011*
14		L0040
15		01010101010110011111
16		11111111111111111101*
17		L0080
18		01010101011001011111
19		11111111111111110110*
20		L0120
21		01010101100101011111
22		11111111111111111010*
23		L0160
24		01010110010101011111
25		11111111111111111010*
26		L0200
27		01011001010101011111
28		11111111111111110110*
29		L0240
30		10010101010101011111
31		11111111111111111001*
32		L0280
33		01100101010101011111
34		11111111111111110101*
35		C1E6E*
36		0000

trunk/src/regtests/jedutil/jeds/pal12l6.jed

r18403	r18404
1		
2		PAL12L6
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "pal12l6.eqn". Date: 8-27-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
8		NOTE PINS i11:11 i12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
9		NOTE PINS i19:19 VCC:20*
10		QF0384*QP20*F0*
11		L0000
12		010101110101100101111111
13		111111111111111111111001
14		111111011111111111111111
15		111111111111111111101111*
16		L0096
17		010101110110010101111111
18		111111111111111111111010*
19		L0144
20		010101111001010101111111
21		111111111111111111111010*
22		L0192
23		010110110101010101111111
24		111111111111111111110101*
25		L0240
26		100101110101010101111111
27		111111111111111111111001*
28		L0288
29		011001110101010101111111
30		111111111111111111110101
31		111111101111111111111111
32		111111111111111111011111*
33		C29B8*
34		0000

trunk/src/regtests/jedutil/jeds/pal14l4.jed

r18403	r18404
1		
2		PAL14L4
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "PAL14L4.eqn". Date: 8-24-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
8		NOTE PINS i11:11 i12:12 i13:13 o14:14 o15:15 o16:16 o17:17 i18:18*
9		NOTE PINS i19:19 VCC:20*
10		QF0448*QP20*F0*
11		L0000
12		0101011101110110011101111111
13		1111111111111111111111111001
14		1111111111111111111011101111
15		1111111011101111111111111111*
16		L0112
17		0101011101111001011101111111
18		1111111111111111111111111010
19		1111111111111111110111011111
20		1111111011011111111111111111*
21		L0224
22		0101011110110101011101111111
23		1111111111111111111111111010
24		1111111111111111110111101111
25		1111110111101111111111111111*
26		L0336
27		1001011101110101011101111111
28		1111111111111111111111111001
29		1111111111111111111011011111
30		1111110111011111111111111111*
31		C306A*
32		0000

trunk/src/regtests/jedutil/jeds/pal16l2.jed

r18403	r18404
1		
2		PAL16L2
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "PAL16L2.eqn". Date: 8-24-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
8		NOTE PINS i11:11 i12:12 i13:13 i14:14 o15:15 o16:16 i17:17 i18:18*
9		NOTE PINS i19:19 VCC:20*
10		QF0512*QP20*F0*
11		L0000
12		01010111011101110111101101111111
13		11111111111111111111111111110111
14		11111111111111111111111111111101
15		11111111111111111111111111011111
16		11111111111111111111111011111111
17		11111111111111111110111111111111
18		11111111111111101111111111111111
19		11111110111011111111111111111111*
20		L0256
21		01010111101101110111011101111111
22		11111111111111111111111111111011
23		11111111111111111111111111111110
24		11111111111111111111111111101111
25		11111111111111111111110111111111
26		11111111111111111101111111111111
27		11111111111111011111111111111111
28		11111101110111111111111111111111*
29		C3BEB*
30		0000

trunk/src/regtests/jedutil/jeds/pal20l8.jed

r18403	r18404
1		
2		PAL20L8
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "PAL20L8.eqn". Date: 8-30-112
6		*
7		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
8		NOTE PINS i11:11 GND:12 i13:13 i14:14 o15:15 o16:16 o17:17 o18:18*
9		NOTE PINS o19:19 o20:20 o21:21 o22:22 i23:23 VCC:24*
10		QF2560*QP24*F0*
11		L0000
12		1111011111111111111110111111111111111111
13		1101111111111111111111111011111111111111
14		1111111111111111111111111011111111111111
15		1101111111111111111111111111111111111111
16		1111111111111111111111111111111110111111
17		1111111011111111111111111111111111111111
18		1111111111111111111111110111111111111110
19		1111111111111111111111111111111111111011*
20		L0320
21		1111111111110111011111111111111111111111
22		1101111111111111111111110111111111111111
23		1111111111111111111111111111111111101111
24		1101111111111011111111110111111111111111
25		1111110111111111111111111111111111111111
26		1101111111111111111111110111111111101111
27		1111111111111111111111111111111111111101
28		1101111111111111111111111111111111110111*
29		L0640
30		1111111111111111111111111111111111111111
31		1111111111011111111111111111111111111111
32		1011111111111111111111111111111111111111
33		1111101111111111111111111111111111111111
34		1111111110111111111111111111111111111111
35		1111111111111011111111111111111111111111
36		1111111111111111101111111111111111111111
37		1111111111101111111110111111111111111111*
38		L0960
39		1111111111111110111111110111111111111111
40		1111110111111111111111111111011110110111
41		1111111111111111111111111111011111111111
42		1111111111111111111111111111111110111111
43		1111111111111101111111111111111111110111
44		1111110111111111111111111111111111111111
45		0111110111111111111111111111111110111111
46		1111111111111111111111111111011111110111*
47		L1280
48		1101110111111111111111111111111101111111
49		1001010110111111111111111011111111111111
50		0101011110111011111111111111111111111111
51		1111111111111111101001110111011101111111
52		1111110111111111111111111111111111010101
53		1111111111111111101101110111011101111111
54		1111010111111111111111111111111111011101
55		0101011110111011110111111111111111111111*
56		L1600
57		1111111101110111111111111111111111111111
58		1111111011111111111111101111111111111111
59		1111111111111111111111011111111101111111
60		1111111111111111111111111111011111111111
61		1111111111111111111111110111111111111111
62		1111111111111111111110111111111111111111
63		1111111111111111101111111111111111111111
64		1111111111110111111111111111111111111111*
65		L1920
66		1111111111111111111111111111111111111111
67		1001111111111111111111111110111111111111
68		1111011110111111111111111111111111111111
69		1111111111110111101111111111111111111111
70		1111111111111111111101111011111111111111
71		1111011111111111111111111101011111111111
72		1001011110110111101101111011101111111111
73		1111111111111111111111111011101111111111*
74		L2240
75		1111111111111111111111111111110111111111
76		0110101101111111111111111111111111110111
77		0110101111111011111111111111111111111110
78		0110101111111111011111111111111111011111
79		0110101011111111111110111111111111111111
80		0110101111111111111111110111111111111011
81		0110101111111111111111111111101111111101
82		1111111111111111111111111111111011111111*
83		C3192*
84		0000

trunk/src/regtests/jedutil/jeds/pal16l8.jed

r18403	r18404
1		
2		PAL16L8
3		EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
4		Copyright (c) National Semiconductor Corporation 1990-1993
5		Assembled from "pal16l8.eqn". Date: 8-29-112
6		md
7		*
8		NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
9		NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
10		NOTE PINS o19:19 VCC:20*
11		QF2048*QP20*F0*
12		L0000
13		11111111111111111111111111111111
14		11111111111101110111101111111101
15		11110111111111110111011111111111
16		11111111111101111111111111111111
17		11111111111111110111111111111111
18		11111111111111111111011111111111
19		11111111111111111111111111111101
20		11111111111111111111101111111111*
21		L0256
22		11111111111111111111111111111111
23		10111111111101110111101111111111
24		11110111111111110111011111111101
25		11110111111111111111111111111111
26		10111111111111111111101111111111
27		11110111111111111111111111111101
28		11111111111101110111101111111111
29		11111111111111111111011111111101*
30		L0512
31		11111111111111101111111111111111
32		01111111111101110111101111111111
33		01111110111111111111111111111111
34		11111111111101111111111111111111
35		11111111111111110111111111111111
36		11111101111111111111101111111111
37		01111111111111111111101111111111
38		11111111111101110111111111111111*
39		L0768
40		11111111111111111111111111111111
41		11111011111011111111111111111111
42		11111111101111111111111111111110
43		11111011101111111111111111111111
44		11111011011111111111111111111111
45		11111111110111111111101111111111
46		11111111111111111111101111111110
47		11111111011111111111111111111111*
48		L1024
49		11111111111111111111111111111111
50		11110111111111110111011111111110
51		11111111111111010111111111111111
52		11110111111111101111111111111111
53		11111111111111111111011111111111
54		11111111111111111111111111111110
55		11111111111111110111011111111111
56		11111111111111111111011111111110*
57		L1280
58		11111111111111111111111111111111
59		11011111111111111110111111111111
60		11111111111111111111111110111111
61		11011111111111111111111110111111
62		10011111111111111110111111111111
63		10111111111111111111111111111111
64		01111111111111111101111110111111
65		11110111111111111111111111111111*
66		L1536
67		01111111111111111111110111111111
68		11111111111111111111111011111101
69		11111111111111111111111111111011
70		11111111111111111111111101111111
71		11111111111111111111101111111111
72		11111111111111111011110111111111
73		11111111111101111111111111111111
74		11111111011111111111111111111111*
75		L1792
76		11111111111111111111111111111111
77		11110111111111111111011111111011
78		11011111111111111111111111011111
79		11110111111111111111111111111111
80		11111111111111111011111111111111
81		11111111111111111111111101111111
82		11111111111111111111111111111011
83		11111111111111111111011111101111*
84		CF3C8*
85		0000

trunk/src/regtests/jedutil/jeds/pal16c1/pal16c1.jed

r0	r18404
	1	
	2	PAL16C1
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "PAL16C1.eqn". Date: 9-4-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 i13:13 i14:14 /o15:15 /o16:16 i17:17 i18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0512*QP20*F0*
	11	L0000
	12	01011111111111111111111111111111
	13	11110111011111111111111111111111
	14	11111111111101110111111111111111
	15	11111111111111111111011101111111
	16	11111111111111111111111111110101
	17	11111111111111111111110111011111
	18	11111111111111011101111111111111
	19	11111101110111111111111111111111
	20	10101111111111111111111111111111
	21	11111011101111111111111111111111
	22	11111111111110111011111111111111
	23	11111111111111111111101110111111
	24	11111111111111111111111111111010
	25	11111111111111111111111011101111
	26	11111111111111101110111111111111
	27	11111110111011111111111111111111*
	28	C3BC4*
	29	0000

trunk/src/regtests/jedutil/jeds/pal14h4/pal14h4.jed

r0	r18404
	1	
	2	PAL14H4
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "PAL14H4.eqn". Date: 8-24-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 i13:13 o14:14 o15:15 o16:16 o17:17 i18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0448*QP20*F0*
	11	L0000
	12	0101011110110101011101111111
	13	1111111111111111111111110101
	14	1111111111111111110111101111
	15	1111110111011111111111111111*
	16	L0112
	17	0101101101110101011101111111
	18	1111111111111111111111111001
	19	1111111111111111111011011111
	20	1111111011101111111111111111*
	21	L0224
	22	1001011101110101011101111111
	23	1111111111111111111111110110
	24	1111111111111111110111011111
	25	1111110111101111111111111111*
	26	L0336
	27	0110011101110101011101111111
	28	1111111111111111111111110101
	29	1111111111111111111011101111
	30	1111111011011111111111111111*
	31	C3116*
	32	0000

trunk/src/regtests/jedutil/jeds/pal12h6/pal12h6.jed

r0	r18404
	1	
	2	PAL12H6
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal12h6.eqn". Date: 8-27-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0384*QP20*F0*
	11	L0000
	12	010101110101100101111111
	13	111111111111111111111001
	14	111111011111111111111111
	15	111111111111111111101111*
	16	L0096
	17	010101110110010101111111
	18	111111111111111111111010*
	19	L0144
	20	010101110101011001111111
	21	111111111111111111110110*
	22	L0192
	23	010101111001010101111111
	24	111111111111111111111010*
	25	L0240
	26	100101110101010101111111
	27	111111111111111111111001*
	28	L0288
	29	011001110101010101111111
	30	111111111111111111110101
	31	111111101111111111111111
	32	111111111111111111011111*
	33	C2948*
	34	0000

trunk/src/regtests/jedutil/jeds/pal10h8/pal10h8.jed

r0	r18404
	1	
	2	PAL10H8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal10h8.eqn". Date: 8-27-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 VCC:20*
	10	QF0320*QP20*F0*
	11	L0000
	12	01010101010101101111
	13	11111111111111111101*
	14	L0040
	15	01010101010110011111
	16	11111111111111111001*
	17	L0080
	18	01010101011001011111
	19	11111111111111110110*
	20	L0120
	21	01010101100101011111
	22	11111111111111111010*
	23	L0160
	24	01010110010101011111
	25	11111111111111111010*
	26	L0200
	27	01011001010101011111
	28	11111111111111110110*
	29	L0240
	30	10010101010101011111
	31	11111111111111111001*
	32	L0280
	33	01100101010101011111
	34	11111111111111110101*
	35	C1E2E*
	36	0000

trunk/src/regtests/jedutil/jeds/pal16h2/pal16h2.jed

r0	r18404
	1	
	2	PAL16H2
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "PAL16H2.eqn". Date: 8-24-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 i13:13 i14:14 o15:15 o16:16 i17:17 i18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0512*QP20*F0*
	11	L0000
	12	01011011011110110111011101111111
	13	11111111111111111111111111111011
	14	11111111111111111111111111111101
	15	11111111111111111111111111101111
	16	11111111111111111111110111111111
	17	11111111111111111110111111111111
	18	11111111111111011111111111111111
	19	11111101111011111111111111111111*
	20	L0256
	21	01010111101101111011011101111111
	22	11111111111111111111111111110111
	23	11111111111111111111111111111110
	24	11111111111111111111111111011111
	25	11111111111111111111111011111111
	26	11111111111111111101111111111111
	27	11111111111111101111111111111111
	28	11111110110111111111111111111111*
	29	C3BDA*
	30	0000

trunk/src/regtests/jedutil/jeds/pal16l2/pal16l2.jed

r0	r18404
	1	
	2	PAL16L2
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "PAL16L2.eqn". Date: 8-24-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 i13:13 i14:14 o15:15 o16:16 i17:17 i18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0512*QP20*F0*
	11	L0000
	12	01010111011101110111101101111111
	13	11111111111111111111111111110111
	14	11111111111111111111111111111101
	15	11111111111111111111111111011111
	16	11111111111111111111111011111111
	17	11111111111111111110111111111111
	18	11111111111111101111111111111111
	19	11111110111011111111111111111111*
	20	L0256
	21	01010111101101110111011101111111
	22	11111111111111111111111111111011
	23	11111111111111111111111111111110
	24	11111111111111111111111111101111
	25	11111111111111111111110111111111
	26	11111111111111111101111111111111
	27	11111111111111011111111111111111
	28	11111101110111111111111111111111*
	29	C3BEB*
	30	0000

trunk/src/regtests/jedutil/jeds/pal10l8/pal10l8.jed

r0	r18404
	1	
	2	PAL10L8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal10l8.eqn". Date: 8-27-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 VCC:20*
	10	QF0320*QP20*F0*
	11	L0000
	12	01010101010101101111
	13	11111111111111111011*
	14	L0040
	15	01010101010110011111
	16	11111111111111111101*
	17	L0080
	18	01010101011001011111
	19	11111111111111110110*
	20	L0120
	21	01010101100101011111
	22	11111111111111111010*
	23	L0160
	24	01010110010101011111
	25	11111111111111111010*
	26	L0200
	27	01011001010101011111
	28	11111111111111110110*
	29	L0240
	30	10010101010101011111
	31	11111111111111111001*
	32	L0280
	33	01100101010101011111
	34	11111111111111110101*
	35	C1E6E*
	36	0000

trunk/src/regtests/jedutil/jeds/pal14l4/pal14l4.jed

r0	r18404
	1	
	2	PAL14L4
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "PAL14L4.eqn". Date: 8-24-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 i13:13 o14:14 o15:15 o16:16 o17:17 i18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0448*QP20*F0*
	11	L0000
	12	0101011101110110011101111111
	13	1111111111111111111111111001
	14	1111111111111111111011101111
	15	1111111011101111111111111111*
	16	L0112
	17	0101011101111001011101111111
	18	1111111111111111111111111010
	19	1111111111111111110111011111
	20	1111111011011111111111111111*
	21	L0224
	22	0101011110110101011101111111
	23	1111111111111111111111111010
	24	1111111111111111110111101111
	25	1111110111101111111111111111*
	26	L0336
	27	1001011101110101011101111111
	28	1111111111111111111111111001
	29	1111111111111111111011011111
	30	1111110111011111111111111111*
	31	C306A*
	32	0000

trunk/src/regtests/jedutil/jeds/pal12l6/pal12l6.jed

r0	r18404
	1	
	2	PAL12L6
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal12l6.eqn". Date: 8-27-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS i11:11 i12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS i19:19 VCC:20*
	10	QF0384*QP20*F0*
	11	L0000
	12	010101110101100101111111
	13	111111111111111111111001
	14	111111011111111111111111
	15	111111111111111111101111*
	16	L0096
	17	010101110110010101111111
	18	111111111111111111111010*
	19	L0144
	20	010101111001010101111111
	21	111111111111111111111010*
	22	L0192
	23	010110110101010101111111
	24	111111111111111111110101*
	25	L0240
	26	100101110101010101111111
	27	111111111111111111111001*
	28	L0288
	29	011001110101010101111111
	30	111111111111111111110101
	31	111111101111111111111111
	32	111111111111111111011111*
	33	C29B8*
	34	0000

trunk/src/regtests/jedutil/jeds/pal20l8/pal20l8.jed

r0	r18404
	1	
	2	PAL20L8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "PAL20L8.eqn". Date: 8-30-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 i14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 o21:21 o22:22 i23:23 VCC:24*
	10	QF2560*QP24*F0*
	11	L0000
	12	1111011111111111111110111111111111111111
	13	1101111111111111111111111011111111111111
	14	1111111111111111111111111011111111111111
	15	1101111111111111111111111111111111111111
	16	1111111111111111111111111111111110111111
	17	1111111011111111111111111111111111111111
	18	1111111111111111111111110111111111111110
	19	1111111111111111111111111111111111111011*
	20	L0320
	21	1111111111110111011111111111111111111111
	22	1101111111111111111111110111111111111111
	23	1111111111111111111111111111111111101111
	24	1101111111111011111111110111111111111111
	25	1111110111111111111111111111111111111111
	26	1101111111111111111111110111111111101111
	27	1111111111111111111111111111111111111101
	28	1101111111111111111111111111111111110111*
	29	L0640
	30	1111111111111111111111111111111111111111
	31	1111111111011111111111111111111111111111
	32	1011111111111111111111111111111111111111
	33	1111101111111111111111111111111111111111
	34	1111111110111111111111111111111111111111
	35	1111111111111011111111111111111111111111
	36	1111111111111111101111111111111111111111
	37	1111111111101111111110111111111111111111*
	38	L0960
	39	1111111111111110111111110111111111111111
	40	1111110111111111111111111111011110110111
	41	1111111111111111111111111111011111111111
	42	1111111111111111111111111111111110111111
	43	1111111111111101111111111111111111110111
	44	1111110111111111111111111111111111111111
	45	0111110111111111111111111111111110111111
	46	1111111111111111111111111111011111110111*
	47	L1280
	48	1101110111111111111111111111111101111111
	49	1001010110111111111111111011111111111111
	50	0101011110111011111111111111111111111111
	51	1111111111111111101001110111011101111111
	52	1111110111111111111111111111111111010101
	53	1111111111111111101101110111011101111111
	54	1111010111111111111111111111111111011101
	55	0101011110111011110111111111111111111111*
	56	L1600
	57	1111111101110111111111111111111111111111
	58	1111111011111111111111101111111111111111
	59	1111111111111111111111011111111101111111
	60	1111111111111111111111111111011111111111
	61	1111111111111111111111110111111111111111
	62	1111111111111111111110111111111111111111
	63	1111111111111111101111111111111111111111
	64	1111111111110111111111111111111111111111*
	65	L1920
	66	1111111111111111111111111111111111111111
	67	1001111111111111111111111110111111111111
	68	1111011110111111111111111111111111111111
	69	1111111111110111101111111111111111111111
	70	1111111111111111111101111011111111111111
	71	1111011111111111111111111101011111111111
	72	1001011110110111101101111011101111111111
	73	1111111111111111111111111011101111111111*
	74	L2240
	75	1111111111111111111111111111110111111111
	76	0110101101111111111111111111111111110111
	77	0110101111111011111111111111111111111110
	78	0110101111111111011111111111111111011111
	79	0110101011111111111110111111111111111111
	80	0110101111111111111111110111111111111011
	81	0110101111111111111111111111101111111101
	82	1111111111111111111111111111111011111111*
	83	C3192*
	84	0000

trunk/src/regtests/jedutil/jeds/pal20r4/pal20r4.jed

r0	r18404
	1	
	2	PAL20R4
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal20r4.eqn". Date: 9-10-112
	6	*
	7	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 /OE:13 i14:14 o15:15 o16:16 rf17:17 rf18:18*
	9	NOTE PINS rf19:19 rf20:20 o21:21 o22:22 i23:23 VCC:24*
	10	QF2560*QP24*F0*
	11	L0000
	12	1111111111111111111111111111111111101101
	13	1111111111111111111111111111111111111101
	14	1111111111111111111111111111111111101111
	15	1111011111101111111111111111111111111111
	16	1111111111111111111101111111111111111111
	17	1111111111011111111111111011111111111111
	18	1111111111111111111111111111111101111111
	19	1111111111111111111111111111101111111111*
	20	L0320
	21	1111111011111111111111110111011111111111
	22	1111111111111111111111111011111111111111
	23	1011111111111111111111111101111111111111
	24	1111111111111111111111111111111111110111
	25	1111111111111111111111111111111110111111
	26	1111111111111111111111111111111111011111
	27	1111111111111111111111111111111111111110
	28	1111101111111111111111111111111111111111*
	29	L0640
	30	1111111111111111111111111101111101111111
	31	1111111111111111111111111111111111111011
	32	1111111101111111111111111110111111111111
	33	0111111111111111111111111111111111111111
	34	1111111111111111101110111111111111111111
	35	1111111111111111111111110111111111111111
	36	1111111111111111111111111111101111111111
	37	1111110111111111111111111111111111111111*
	38	L0960
	39	1111111111110111011110111111111111111111
	40	1111011111111111011101111111111111111111
	41	1111111111110101111111111111111111111111
	42	1111111111111111011111111111111111111111
	43	1111111111111111111101111111111111111111
	44	1111111110111110111111111111111111111111
	45	1111111111111111111110111111111111111111
	46	1111111111111111111111111111111101111111*
	47	L1280
	48	1011111111110111011110111111111111111111
	49	1111011111111111011101111111111111111111
	50	1111011111111111110111111111111111111111
	51	1011111111111111111110111111111111111111
	52	1111101111111111111011111111111111111111
	53	1111111111110111011110111111111111111111
	54	1111111111111111111101111111111111111111
	55	1111111111111111111111111111111111111011*
	56	L1600
	57	1011111111111111111111111111111111111111
	58	1111111111111111111111101111111111111111
	59	1111111111110111111111111111111111111111
	60	1111111111111111011111111111111111111111
	61	1111111111111111111111011111111111111111
	62	1111111101111111111111111111111111111111
	63	1111111111111111111111111111111110111111
	64	1110111111111111111111111111111111111111*
	65	L1920
	66	1101111111111111111111111111111111111111
	67	1111101111111111111111111110111111111111
	68	1111111110111111111111111111111111111111
	69	1111101111111111111111111111111111111111
	70	1111101101111111111111111111111111111111
	71	1111111111111111111110111101111111111111
	72	1111111111111111111110111111111111111111
	73	1111111101111111111111111111111111111111*
	74	L2240
	75	1110111111111111111111111111111111111111
	76	0111111111111111011101111111111111111111
	77	1111111111111111011111111111110111111111
	78	1111011111111111111111111111111011111111
	79	1111111111111111111101111111111111111111
	80	1111111110111111111111111111111111111111
	81	1111111111111111011101111111111111111111
	82	1111111101111111111101111111111111111111*
	83	C36C6*
	84	0000

trunk/src/regtests/jedutil/jeds/pal20r6/pal20r6.jed

r0	r18404
	1	
	2	PAL20R6
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal20r6.eqn". Date: 9-11-112
	6	*
	7	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 /OE:13 i14:14 o15:15 rf16:16 rf17:17 rf18:18*
	9	NOTE PINS rf19:19 rf20:20 rf21:21 o22:22 i23:23 VCC:24*
	10	QF2560*QP24*F0*
	11	L0000
	12	1111111111111111111111111111111111101101
	13	1111111111111111111111111111111111111101
	14	1111111111111111111111111111111111101111
	15	1111011111101111111111111111111111111111
	16	1111111111111111111101111111111111111111
	17	1111111111011111111111111011111111111111
	18	1111111111111111111111111111111101111111
	19	1111111111111111111111111111101111111111*
	20	L0320
	21	1111111111111111111111111011111111111111
	22	1011111111111111111111111101111111111111
	23	1111111111111111111111111111111111110111
	24	1111111111111111111111111111111110111111
	25	1111111111111111111111111111111111011111
	26	1111111011111111111111111111111111111110
	27	1111101111111111111111111111111111111111
	28	1111111111111011111111111111111111111111*
	29	L0640
	30	1111111111111111111111111101111101111111
	31	1111111111111111111111111111111111111011
	32	1111111101111111111111111110111111111111
	33	0111111111111111111111111111111111111111
	34	1111111111111111101110111111111111111111
	35	1111111111111111111111110111111111111111
	36	1111111111111111111111111111101111111111
	37	1111110111111111111111111111111111111111*
	38	L0960
	39	1111111111110111011110111111111111111111
	40	1111011111111111011101111111111111111111
	41	1111111111110101111111111111111111111111
	42	1111111111111111011111111111111111111111
	43	1111111111111111111101111111111111111111
	44	1111111110111110111111111111111111111111
	45	1111111111111111111110111111111111111111
	46	1111111111111111111111111111111101111111*
	47	L1280
	48	1011111111110111011110111111111111111111
	49	1111011111111111011101111111111111111111
	50	1111011111111111110111111111111111111111
	51	1011111111111111111110111111111111111111
	52	1111101111111111111011111111111111111111
	53	1111111111110111011110111111111111111111
	54	1111111111111111111101111111111111111111
	55	1111111111111111111111111111111111111011*
	56	L1600
	57	1011111111111111111111111111111111111111
	58	1111111111111111111111101111111111111111
	59	1111111111110111111111111111111111111111
	60	1111111111111111011111111111111111111111
	61	1111111111111111111111011111111111111111
	62	1111111101111111111111111111111111111111
	63	1111111111111111111111111111111110111111
	64	1110111111111111111111111111111111111111*
	65	L1920
	66	1111101111111111111111111110111111111111
	67	1110111110111111111111111111111111111111
	68	1111101111111111111111111111111111111111
	69	1111101101111111111111111111111111111111
	70	1111111111111111111110111101111111111111
	71	1111111111111111111110111111111111111111
	72	1111111101111111111111111111111111111111
	73	1101111111111111111111111111111111111111*
	74	L2240
	75	1110111111111111111111111111111111111111
	76	0111111111111111011101111111111111111111
	77	1111111111111111011111111111110111111111
	78	1111011111111111111111111111111011111111
	79	1111111111111111111101111111111111111111
	80	1111111110111111111111111111111111111111
	81	1111111111111111011101111111111111111111
	82	1111111101111111111101111111111111111111*
	83	C36AF*
	84	0000

trunk/src/regtests/jedutil/jeds/pal16l8/pal16l8.jed

r0	r18404
	1	
	2	PAL16L8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16l8.eqn". Date: 8-29-112
	6	md
	7	*
	8	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	9	NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	10	NOTE PINS o19:19 VCC:20*
	11	QF2048*QP20*F0*
	12	L0000
	13	11111111111111111111111111111111
	14	11111111111101110111101111111101
	15	11110111111111110111011111111111
	16	11111111111101111111111111111111
	17	11111111111111110111111111111111
	18	11111111111111111111011111111111
	19	11111111111111111111111111111101
	20	11111111111111111111101111111111*
	21	L0256
	22	11111111111111111111111111111111
	23	10111111111101110111101111111111
	24	11110111111111110111011111111101
	25	11110111111111111111111111111111
	26	10111111111111111111101111111111
	27	11110111111111111111111111111101
	28	11111111111101110111101111111111
	29	11111111111111111111011111111101*
	30	L0512
	31	11111111111111101111111111111111
	32	01111111111101110111101111111111
	33	01111110111111111111111111111111
	34	11111111111101111111111111111111
	35	11111111111111110111111111111111
	36	11111101111111111111101111111111
	37	01111111111111111111101111111111
	38	11111111111101110111111111111111*
	39	L0768
	40	11111111111111111111111111111111
	41	11111011111011111111111111111111
	42	11111111101111111111111111111110
	43	11111011101111111111111111111111
	44	11111011011111111111111111111111
	45	11111111110111111111101111111111
	46	11111111111111111111101111111110
	47	11111111011111111111111111111111*
	48	L1024
	49	11111111111111111111111111111111
	50	11110111111111110111011111111110
	51	11111111111111010111111111111111
	52	11110111111111101111111111111111
	53	11111111111111111111011111111111
	54	11111111111111111111111111111110
	55	11111111111111110111011111111111
	56	11111111111111111111011111111110*
	57	L1280
	58	11111111111111111111111111111111
	59	11011111111111111110111111111111
	60	11111111111111111111111110111111
	61	11011111111111111111111110111111
	62	10011111111111111110111111111111
	63	10111111111111111111111111111111
	64	01111111111111111101111110111111
	65	11110111111111111111111111111111*
	66	L1536
	67	01111111111111111111110111111111
	68	11111111111111111111111011111101
	69	11111111111111111111111111111011
	70	11111111111111111111111101111111
	71	11111111111111111111101111111111
	72	11111111111111111011110111111111
	73	11111111111101111111111111111111
	74	11111111011111111111111111111111*
	75	L1792
	76	11111111111111111111111111111111
	77	11110111111111111111011111111011
	78	11011111111111111111111111011111
	79	11110111111111111111111111111111
	80	11111111111111111011111111111111
	81	11111111111111111111111101111111
	82	11111111111111111111111111111011
	83	11111111111111111111011111101111*
	84	CF3C8*
	85	0000

trunk/src/regtests/jedutil/jeds/pal20r8/pal20r8.jed

r0	r18404
	1	
	2	PAL20R8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal20r8.eqn". Date: 9-11-112
	6	*
	7	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 /OE:13 i14:14 rf15:15 rf16:16 rf17:17*
	9	NOTE PINS rf18:18 rf19:19 rf20:20 rf21:21 rf22:22 i23:23 VCC:24*
	10	QF2560*QP24*F0*
	11	L0000
	12	1111111111111111111111111111111111111101
	13	1111111111111111111111111111111111101111
	14	1111011111101111111111111111111111111111
	15	1111111111111111111101111111111111111111
	16	1111111111011111111111111011111111111111
	17	1111111111111111111111111111111101111111
	18	1111111111111111111111111111101111111111
	19	1111111111111111111111111111111111101101*
	20	L0320
	21	1111111111111111111111111011111111111111
	22	1011111111111111111111111101111111111111
	23	1111111111111111111111111111111111110111
	24	1111111111111111111111111111111110111111
	25	1111111111111111111111111111111111011111
	26	1111111111111111111111111111111111111110
	27	1111101111111111111111111111111111111111
	28	1111111011111111111111110111011111111111*
	29	L0640
	30	1111111111111111111111111101111101111111
	31	1111111111111111111111111111111111111011
	32	1111111101111111111111111110111111111111
	33	0111111111111111111111111111111111111111
	34	1111111111111111101110111111111111111111
	35	1111111111111111111111110111111111111111
	36	1111111111111111111111111111101111111111
	37	1111110111111111111111111111111111111111*
	38	L0960
	39	1111111111110111011110111111111111111111
	40	1111011111111111011101111111111111111111
	41	1111111111110101111111111111111111111111
	42	1111111111111111011111111111111111111111
	43	1111111111111111111101111111111111111111
	44	1111111110111110111111111111111111111111
	45	1111111111111111111110111111111111111111
	46	1111111111111111111111111111111101111111*
	47	L1280
	48	1011111111110111011110111111111111111111
	49	1111011111111111011101111111111111111111
	50	1111011111111111110111111111111111111111
	51	1011111111111111111110111111111111111111
	52	1111101111111111111011111111111111111111
	53	1111111111110111011110111111111111111111
	54	1111111111111111111101111111111111111111
	55	1111111111111111111111111111111111111011*
	56	L1600
	57	1011111111111111111111111111111111111111
	58	1111111111111111111111101111111111111111
	59	1111111111110111111111111111111111111111
	60	1111111111111111011111111111111111111111
	61	1111111111111111111111011111111111111111
	62	1111111101111111111111111111111111111111
	63	1111111111111111111111111111111110111111
	64	1110111111111111111111111111111111111111*
	65	L1920
	66	1111101111111111111111111110111111111111
	67	1111111110111111111111111111111111111111
	68	1111101111111111111111111111111111111111
	69	1111101101111111111111111111111111111111
	70	1111111111111111111110111101111111111111
	71	1111111111111111111110111111111111111111
	72	1111111101111111111111111111111111111111
	73	1101111111111111111111111111111111111111*
	74	L2240
	75	0111111111111111011101111111111111111111
	76	1111111111111111011111111111110111111111
	77	1111011111111111111111111111111011111111
	78	1111111111111111111101111111111111111111
	79	1111111110111111111111111111111111111111
	80	1111111111111111011101111111111111111111
	81	1111111101111111111101111111111111111111
	82	1110111111111111111111111111111111111111*
	83	C36C6*
	84	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal16r8-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL16R8 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal16r8.jed
	6	Output File: gal16v8.jed
	7	The Date:    Sun Sep 30 22:10:55 2012
	8
	9
	10	PAL16R8
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "pal16r8.eqn". Date: 9-10-112
	14	*
	15	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS /OE:11 rf12:12 rf13:13 rf14:14 rf15:15 rf16:16 rf17:17*
	17	NOTE PINS rf18:18 rf19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 11111111111101110111101111111111*
	21	L00032 11110111111111110111011111111111*
	22	L00064 11111111111101111111111111111101*
	23	L00096 11111111111111110111111111111111*
	24	L00128 11111111111111111111011111111111*
	25	L00160 11111111101111111111111111111110*
	26	L00192 11111111111111111111101111111111*
	27	L00224 01111111111111111111111111111111*
	28
	29	L00256 10111111111101110111101111111111*
	30	L00288 11110111111111110111011111111111*
	31	L00320 11010111111111111111111111111111*
	32	L00352 10111111111111111111101111111111*
	33	L00384 11101011111111111111111111111111*
	34	L00416 11111111111101110111101111111111*
	35	L00448 11111111111111111111011111111111*
	36	L00480 11111111101111111111111111111111*
	37
	38	L00512 01111111111101110111101111111111*
	39	L00544 01111110111111111111111111111111*
	40	L00576 11111111111101111111111111111111*
	41	L00608 11111111111111110111111111111111*
	42	L00640 11111101111111111111101111111111*
	43	L00672 01111111111111111111101111111111*
	44	L00704 11111111111101110111111111111111*
	45	L00736 11111011111111111111111111111111*
	46
	47	L00768 11111011111011111111111111111111*
	48	L00800 11111111101111111111111111111111*
	49	L00832 11111011111111111111111111111111*
	50	L00864 11111011011111111111111111111111*
	51	L00896 11111111110111111111101111111111*
	52	L00928 11111111111111111111101111111111*
	53	L00960 11111111011111111111111111111111*
	54	L00992 01110111111111111111111111111111*
	55
	56	L01024 11110111111111110111011111111111*
	57	L01056 11111111111111010111111111111111*
	58	L01088 11110111111111101111111111111111*
	59	L01120 11111111111111111111011111111111*
	60	L01152 11111111101111111111111111111111*
	61	L01184 11111111111111110111011111111111*
	62	L01216 11111111011111111111011111111111*
	63	L01248 10111111111111111111101111111111*
	64
	65	L01280 11111111111111111110111111111111*
	66	L01312 11111111111111111111111110111111*
	67	L01344 11111111111111111111111101111111*
	68	L01376 10111111111111111110111111111111*
	69	L01408 10111111111111111111111111111111*
	70	L01440 01111111111111111101111110111111*
	71	L01472 11111111101111111111111111111111*
	72	L01504 11110111111111111111111111111111*
	73
	74	L01536 11111111111111111111111011111111*
	75	L01568 11111111111111111111111111111011*
	76	L01600 11111111111111111111111101111111*
	77	L01632 11111111111111111111101111111111*
	78	L01664 11111111111111111011110111111111*
	79	L01696 11111111111101111111111111111111*
	80	L01728 11111111011111111111111111111111*
	81	L01760 11111011111111111111111111111111*
	82
	83	L01792 10111011111111111111111111111111*
	84	L01824 11111111011111111111111111011111*
	85	L01856 11110111111111111111111111111111*
	86	L01888 11111111111111111011111111111111*
	87	L01920 11111111111111111111111101111111*
	88	L01952 11111111111111111111111111111011*
	89	L01984 11111111111111111111011111101111*
	90	L02016 11111111111101111111111111111111*
	91
	92	N ==> XOR *
	93	L02048 00000000*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 00000000*
	99	N ==> PTD *
	100	L02128 11111111111111111111111111111111*
	101	L02160 11111111111111111111111111111111*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 01*
	104	CFF4A*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal10h8-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL10H8 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal10h8.jed
	6	Output File: gal.jed
	7	The Date:    Wed Sep 12 22:32:02 2012
	8
	9
	10	PAL10H8
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "pal10h8.eqn". Date: 8-27-112
	14	*
	15	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	17	NOTE PINS o19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 01010111011101110111011110111111*
	21	L00032 11111111111111111111111111111101*
	22	L00064 00000011001100110011001100110000*
	23	L00096 00000011001100110011001100110000*
	24	L00128 00000011001100110011001100110000*
	25	L00160 00000011001100110011001100110000*
	26	L00192 00000011001100110011001100110000*
	27	L00224 00000011001100110011001100110000*
	28
	29	L00256 01010111011101110111101101111111*
	30	L00288 11111111111111111111111111111001*
	31	L00320 00000011001100110011001100110000*
	32	L00352 00000011001100110011001100110000*
	33	L00384 00000011001100110011001100110000*
	34	L00416 00000011001100110011001100110000*
	35	L00448 00000011001100110011001100110000*
	36	L00480 00000011001100110011001100110000*
	37
	38	L00512 01010111011101111011011101111111*
	39	L00544 11111111111111111111111111110110*
	40	L00576 00000011001100110011001100110000*
	41	L00608 00000011001100110011001100110000*
	42	L00640 00000011001100110011001100110000*
	43	L00672 00000011001100110011001100110000*
	44	L00704 00000011001100110011001100110000*
	45	L00736 00000011001100110011001100110000*
	46
	47	L00768 01010111011110110111011101111111*
	48	L00800 11111111111111111111111111111010*
	49	L00832 00000011001100110011001100110000*
	50	L00864 00000011001100110011001100110000*
	51	L00896 00000011001100110011001100110000*
	52	L00928 00000011001100110011001100110000*
	53	L00960 00000011001100110011001100110000*
	54	L00992 00000011001100110011001100110000*
	55
	56	L01024 01010111101101110111011101111111*
	57	L01056 11111111111111111111111111111010*
	58	L01088 00000011001100110011001100110000*
	59	L01120 00000011001100110011001100110000*
	60	L01152 00000011001100110011001100110000*
	61	L01184 00000011001100110011001100110000*
	62	L01216 00000011001100110011001100110000*
	63	L01248 00000011001100110011001100110000*
	64
	65	L01280 01011011011101110111011101111111*
	66	L01312 11111111111111111111111111110110*
	67	L01344 00000011001100110011001100110000*
	68	L01376 00000011001100110011001100110000*
	69	L01408 00000011001100110011001100110000*
	70	L01440 00000011001100110011001100110000*
	71	L01472 00000011001100110011001100110000*
	72	L01504 00000011001100110011001100110000*
	73
	74	L01536 10010111011101110111011101111111*
	75	L01568 11111111111111111111111111111001*
	76	L01600 00000011001100110011001100110000*
	77	L01632 00000011001100110011001100110000*
	78	L01664 00000011001100110011001100110000*
	79	L01696 00000011001100110011001100110000*
	80	L01728 00000011001100110011001100110000*
	81	L01760 00000011001100110011001100110000*
	82
	83	L01792 01100111011101110111011101111111*
	84	L01824 11111111111111111111111111110101*
	85	L01856 00000011001100110011001100110000*
	86	L01888 00000011001100110011001100110000*
	87	L01920 00000011001100110011001100110000*
	88	L01952 00000011001100110011001100110000*
	89	L01984 00000011001100110011001100110000*
	90	L02016 00000011001100110011001100110000*
	91
	92	N ==> XOR *
	93	L02048 11111111*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 00000000*
	99	N ==> PTD *
	100	L02128 11000000110000001100000011000000*
	101	L02160 11000000110000001100000011000000*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 10*
	104	CADF0*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal12h6-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL12H6 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal12h6.jed
	6	Output File: gal.jed
	7	The Date:    Sun Sep 16 22:20:22 2012
	8
	9
	10	PAL12H6
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "pal12h6.eqn". Date: 8-27-112
	14	*
	15	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS i11:11 i12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	17	NOTE PINS i19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 00000000001100110011001100000000*
	21	L00032 00000000001100110011001100000000*
	22	L00064 00000000001100110011001100000000*
	23	L00096 00000000001100110011001100000000*
	24	L00128 00000000001100110011001100000000*
	25	L00160 00000000001100110011001100000000*
	26	L00192 00000000001100110011001100000000*
	27	L00224 00000000001100110011001100000000*
	28
	29	L00256 01010111011101111011011101111111*
	30	L00288 11111111111111111111111111111001*
	31	L00320 11111101111111111111111111111111*
	32	L00352 11111111111111111111111111101111*
	33	L00384 00000000001100110011001100000000*
	34	L00416 00000000001100110011001100000000*
	35	L00448 00000000001100110011001100000000*
	36	L00480 00000000001100110011001100000000*
	37
	38	L00512 01010111011110110111011101111111*
	39	L00544 11111111111111111111111111111010*
	40	L00576 00000000001100110011001100000000*
	41	L00608 00000000001100110011001100000000*
	42	L00640 00000000001100110011001100000000*
	43	L00672 00000000001100110011001100000000*
	44	L00704 00000000001100110011001100000000*
	45	L00736 00000000001100110011001100000000*
	46
	47	L00768 01010111011101110111101101111111*
	48	L00800 11111111111111111111111111110110*
	49	L00832 00000000001100110011001100000000*
	50	L00864 00000000001100110011001100000000*
	51	L00896 00000000001100110011001100000000*
	52	L00928 00000000001100110011001100000000*
	53	L00960 00000000001100110011001100000000*
	54	L00992 00000000001100110011001100000000*
	55
	56	L01024 01010111101101110111011101111111*
	57	L01056 11111111111111111111111111111010*
	58	L01088 00000000001100110011001100000000*
	59	L01120 00000000001100110011001100000000*
	60	L01152 00000000001100110011001100000000*
	61	L01184 00000000001100110011001100000000*
	62	L01216 00000000001100110011001100000000*
	63	L01248 00000000001100110011001100000000*
	64
	65	L01280 10010111011101110111011101111111*
	66	L01312 11111111111111111111111111111001*
	67	L01344 00000000001100110011001100000000*
	68	L01376 00000000001100110011001100000000*
	69	L01408 00000000001100110011001100000000*
	70	L01440 00000000001100110011001100000000*
	71	L01472 00000000001100110011001100000000*
	72	L01504 00000000001100110011001100000000*
	73
	74	L01536 01100111011101110111011101111111*
	75	L01568 11111111111111111111111111110101*
	76	L01600 11111110111111111111111111111111*
	77	L01632 11111111111111111111111111011111*
	78	L01664 00000000001100110011001100000000*
	79	L01696 00000000001100110011001100000000*
	80	L01728 00000000001100110011001100000000*
	81	L01760 00000000001100110011001100000000*
	82
	83	L01792 00000000001100110011001100000000*
	84	L01824 00000000001100110011001100000000*
	85	L01856 00000000001100110011001100000000*
	86	L01888 00000000001100110011001100000000*
	87	L01920 00000000001100110011001100000000*
	88	L01952 00000000001100110011001100000000*
	89	L01984 00000000001100110011001100000000*
	90	L02016 00000000001100110011001100000000*
	91
	92	N ==> XOR *
	93	L02048 11111111*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 10000001*
	99	N ==> PTD *
	100	L02128 00000000111100001100000011000000*
	101	L02160 11000000110000001111000000000000*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 10*
	104	C88C8*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal14h4-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL14H4 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal14h4.jed
	6	Output File: gal16v8.jed
	7	The Date:    Fri Sep 28 22:11:50 2012
	8
	9
	10	PAL14H4
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "PAL14H4.eqn". Date: 8-24-112
	14	*
	15	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS i11:11 i12:12 i13:13 o14:14 o15:15 o16:16 o17:17 i18:18*
	17	NOTE PINS i19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 00000000000000110011000000000000*
	21	L00032 00000000000000110011000000000000*
	22	L00064 00000000000000110011000000000000*
	23	L00096 00000000000000110011000000000000*
	24	L00128 00000000000000110011000000000000*
	25	L00160 00000000000000110011000000000000*
	26	L00192 00000000000000110011000000000000*
	27	L00224 00000000000000110011000000000000*
	28
	29	L00256 00000000000000110011000000000000*
	30	L00288 00000000000000110011000000000000*
	31	L00320 00000000000000110011000000000000*
	32	L00352 00000000000000110011000000000000*
	33	L00384 00000000000000110011000000000000*
	34	L00416 00000000000000110011000000000000*
	35	L00448 00000000000000110011000000000000*
	36	L00480 00000000000000110011000000000000*
	37
	38	L00512 01010111101101110111011101111111*
	39	L00544 11111111111111111111111111110101*
	40	L00576 11111111111111111111110111101111*
	41	L00608 11111101110111111111111111111111*
	42	L00640 00000000000000110011000000000000*
	43	L00672 00000000000000110011000000000000*
	44	L00704 00000000000000110011000000000000*
	45	L00736 00000000000000110011000000000000*
	46
	47	L00768 01011011011101110111011101111111*
	48	L00800 11111111111111111111111111111001*
	49	L00832 11111111111111111111111011011111*
	50	L00864 11111110111011111111111111111111*
	51	L00896 00000000000000110011000000000000*
	52	L00928 00000000000000110011000000000000*
	53	L00960 00000000000000110011000000000000*
	54	L00992 00000000000000110011000000000000*
	55
	56	L01024 10010111011101110111011101111111*
	57	L01056 11111111111111111111111111110110*
	58	L01088 11111111111111111111110111011111*
	59	L01120 11111101111011111111111111111111*
	60	L01152 00000000000000110011000000000000*
	61	L01184 00000000000000110011000000000000*
	62	L01216 00000000000000110011000000000000*
	63	L01248 00000000000000110011000000000000*
	64
	65	L01280 01100111011101110111011101111111*
	66	L01312 11111111111111111111111111110101*
	67	L01344 11111111111111111111111011101111*
	68	L01376 11111110110111111111111111111111*
	69	L01408 00000000000000110011000000000000*
	70	L01440 00000000000000110011000000000000*
	71	L01472 00000000000000110011000000000000*
	72	L01504 00000000000000110011000000000000*
	73
	74	L01536 00000000000000110011000000000000*
	75	L01568 00000000000000110011000000000000*
	76	L01600 00000000000000110011000000000000*
	77	L01632 00000000000000110011000000000000*
	78	L01664 00000000000000110011000000000000*
	79	L01696 00000000000000110011000000000000*
	80	L01728 00000000000000110011000000000000*
	81	L01760 00000000000000110011000000000000*
	82
	83	L01792 00000000000000110011000000000000*
	84	L01824 00000000000000110011000000000000*
	85	L01856 00000000000000110011000000000000*
	86	L01888 00000000000000110011000000000000*
	87	L01920 00000000000000110011000000000000*
	88	L01952 00000000000000110011000000000000*
	89	L01984 00000000000000110011000000000000*
	90	L02016 00000000000000110011000000000000*
	91
	92	N ==> XOR *
	93	L02048 11111111*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 11000011*
	99	N ==> PTD *
	100	L02128 00000000000000001111000011110000*
	101	L02160 11110000111100000000000000000000*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 10*
	104	C6249*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal16h2-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL16H2 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal16h2.jed
	6	Output File: gal16v8.jed
	7	The Date:    Fri Sep 28 22:25:49 2012
	8
	9
	10	PAL16H2
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "PAL16H2.eqn". Date: 8-24-112
	14	*
	15	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS i11:11 i12:12 i13:13 i14:14 o15:15 o16:16 i17:17 i18:18*
	17	NOTE PINS i19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 00000000000000000000000000000000*
	21	L00032 00000000000000000000000000000000*
	22	L00064 00000000000000000000000000000000*
	23	L00096 00000000000000000000000000000000*
	24	L00128 00000000000000000000000000000000*
	25	L00160 00000000000000000000000000000000*
	26	L00192 00000000000000000000000000000000*
	27	L00224 00000000000000000000000000000000*
	28
	29	L00256 00000000000000000000000000000000*
	30	L00288 00000000000000000000000000000000*
	31	L00320 00000000000000000000000000000000*
	32	L00352 00000000000000000000000000000000*
	33	L00384 00000000000000000000000000000000*
	34	L00416 00000000000000000000000000000000*
	35	L00448 00000000000000000000000000000000*
	36	L00480 00000000000000000000000000000000*
	37
	38	L00512 00000000000000000000000000000000*
	39	L00544 00000000000000000000000000000000*
	40	L00576 00000000000000000000000000000000*
	41	L00608 00000000000000000000000000000000*
	42	L00640 00000000000000000000000000000000*
	43	L00672 00000000000000000000000000000000*
	44	L00704 00000000000000000000000000000000*
	45	L00736 00000000000000000000000000000000*
	46
	47	L00768 01011011011110110111011101111111*
	48	L00800 11111111111111111111111111111011*
	49	L00832 11111111111111111111111111111101*
	50	L00864 11111111111111111111111111101111*
	51	L00896 11111111111111111111110111111111*
	52	L00928 11111111111111111110111111111111*
	53	L00960 11111111111111011111111111111111*
	54	L00992 11111101111011111111111111111111*
	55
	56	L01024 01010111101101111011011101111111*
	57	L01056 11111111111111111111111111110111*
	58	L01088 11111111111111111111111111111110*
	59	L01120 11111111111111111111111111011111*
	60	L01152 11111111111111111111111011111111*
	61	L01184 11111111111111111101111111111111*
	62	L01216 11111111111111101111111111111111*
	63	L01248 11111110110111111111111111111111*
	64
	65	L01280 00000000000000000000000000000000*
	66	L01312 00000000000000000000000000000000*
	67	L01344 00000000000000000000000000000000*
	68	L01376 00000000000000000000000000000000*
	69	L01408 00000000000000000000000000000000*
	70	L01440 00000000000000000000000000000000*
	71	L01472 00000000000000000000000000000000*
	72	L01504 00000000000000000000000000000000*
	73
	74	L01536 00000000000000000000000000000000*
	75	L01568 00000000000000000000000000000000*
	76	L01600 00000000000000000000000000000000*
	77	L01632 00000000000000000000000000000000*
	78	L01664 00000000000000000000000000000000*
	79	L01696 00000000000000000000000000000000*
	80	L01728 00000000000000000000000000000000*
	81	L01760 00000000000000000000000000000000*
	82
	83	L01792 00000000000000000000000000000000*
	84	L01824 00000000000000000000000000000000*
	85	L01856 00000000000000000000000000000000*
	86	L01888 00000000000000000000000000000000*
	87	L01920 00000000000000000000000000000000*
	88	L01952 00000000000000000000000000000000*
	89	L01984 00000000000000000000000000000000*
	90	L02016 00000000000000000000000000000000*
	91
	92	N ==> XOR *
	93	L02048 11111111*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 11100111*
	99	N ==> PTD *
	100	L02128 00000000000000000000000011111111*
	101	L02160 11111111000000000000000000000000*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 10*
	104	C3FBF*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal16l2-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL16L2 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal16l2.jed
	6	Output File: gal16v8.jed
	7	The Date:    Fri Sep 28 22:28:15 2012
	8
	9
	10	PAL16L2
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "PAL16L2.eqn". Date: 8-24-112
	14	*
	15	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS i11:11 i12:12 i13:13 i14:14 o15:15 o16:16 i17:17 i18:18*
	17	NOTE PINS i19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 00000000000000000000000000000000*
	21	L00032 00000000000000000000000000000000*
	22	L00064 00000000000000000000000000000000*
	23	L00096 00000000000000000000000000000000*
	24	L00128 00000000000000000000000000000000*
	25	L00160 00000000000000000000000000000000*
	26	L00192 00000000000000000000000000000000*
	27	L00224 00000000000000000000000000000000*
	28
	29	L00256 00000000000000000000000000000000*
	30	L00288 00000000000000000000000000000000*
	31	L00320 00000000000000000000000000000000*
	32	L00352 00000000000000000000000000000000*
	33	L00384 00000000000000000000000000000000*
	34	L00416 00000000000000000000000000000000*
	35	L00448 00000000000000000000000000000000*
	36	L00480 00000000000000000000000000000000*
	37
	38	L00512 00000000000000000000000000000000*
	39	L00544 00000000000000000000000000000000*
	40	L00576 00000000000000000000000000000000*
	41	L00608 00000000000000000000000000000000*
	42	L00640 00000000000000000000000000000000*
	43	L00672 00000000000000000000000000000000*
	44	L00704 00000000000000000000000000000000*
	45	L00736 00000000000000000000000000000000*
	46
	47	L00768 01010111011101110111101101111111*
	48	L00800 11111111111111111111111111110111*
	49	L00832 11111111111111111111111111111101*
	50	L00864 11111111111111111111111111011111*
	51	L00896 11111111111111111111111011111111*
	52	L00928 11111111111111111110111111111111*
	53	L00960 11111111111111101111111111111111*
	54	L00992 11111110111011111111111111111111*
	55
	56	L01024 01010111101101110111011101111111*
	57	L01056 11111111111111111111111111111011*
	58	L01088 11111111111111111111111111111110*
	59	L01120 11111111111111111111111111101111*
	60	L01152 11111111111111111111110111111111*
	61	L01184 11111111111111111101111111111111*
	62	L01216 11111111111111011111111111111111*
	63	L01248 11111101110111111111111111111111*
	64
	65	L01280 00000000000000000000000000000000*
	66	L01312 00000000000000000000000000000000*
	67	L01344 00000000000000000000000000000000*
	68	L01376 00000000000000000000000000000000*
	69	L01408 00000000000000000000000000000000*
	70	L01440 00000000000000000000000000000000*
	71	L01472 00000000000000000000000000000000*
	72	L01504 00000000000000000000000000000000*
	73
	74	L01536 00000000000000000000000000000000*
	75	L01568 00000000000000000000000000000000*
	76	L01600 00000000000000000000000000000000*
	77	L01632 00000000000000000000000000000000*
	78	L01664 00000000000000000000000000000000*
	79	L01696 00000000000000000000000000000000*
	80	L01728 00000000000000000000000000000000*
	81	L01760 00000000000000000000000000000000*
	82
	83	L01792 00000000000000000000000000000000*
	84	L01824 00000000000000000000000000000000*
	85	L01856 00000000000000000000000000000000*
	86	L01888 00000000000000000000000000000000*
	87	L01920 00000000000000000000000000000000*
	88	L01952 00000000000000000000000000000000*
	89	L01984 00000000000000000000000000000000*
	90	L02016 00000000000000000000000000000000*
	91
	92	N ==> XOR *
	93	L02048 00000000*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 11100111*
	99	N ==> PTD *
	100	L02128 00000000000000000000000011111111*
	101	L02160 11111111000000000000000000000000*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 10*
	104	C3ED1*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal14l4-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL14L4 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal14l4.jed
	6	Output File: gal16v8.jed
	7	The Date:    Fri Sep 28 22:14:09 2012
	8
	9
	10	PAL14L4
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "PAL14L4.eqn". Date: 8-24-112
	14	*
	15	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS i11:11 i12:12 i13:13 o14:14 o15:15 o16:16 o17:17 i18:18*
	17	NOTE PINS i19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 00000000000000110011000000000000*
	21	L00032 00000000000000110011000000000000*
	22	L00064 00000000000000110011000000000000*
	23	L00096 00000000000000110011000000000000*
	24	L00128 00000000000000110011000000000000*
	25	L00160 00000000000000110011000000000000*
	26	L00192 00000000000000110011000000000000*
	27	L00224 00000000000000110011000000000000*
	28
	29	L00256 00000000000000110011000000000000*
	30	L00288 00000000000000110011000000000000*
	31	L00320 00000000000000110011000000000000*
	32	L00352 00000000000000110011000000000000*
	33	L00384 00000000000000110011000000000000*
	34	L00416 00000000000000110011000000000000*
	35	L00448 00000000000000110011000000000000*
	36	L00480 00000000000000110011000000000000*
	37
	38	L00512 01010111011101111011011101111111*
	39	L00544 11111111111111111111111111111001*
	40	L00576 11111111111111111111111011101111*
	41	L00608 11111110111011111111111111111111*
	42	L00640 00000000000000110011000000000000*
	43	L00672 00000000000000110011000000000000*
	44	L00704 00000000000000110011000000000000*
	45	L00736 00000000000000110011000000000000*
	46
	47	L00768 01010111011110110111011101111111*
	48	L00800 11111111111111111111111111111010*
	49	L00832 11111111111111111111110111011111*
	50	L00864 11111110110111111111111111111111*
	51	L00896 00000000000000110011000000000000*
	52	L00928 00000000000000110011000000000000*
	53	L00960 00000000000000110011000000000000*
	54	L00992 00000000000000110011000000000000*
	55
	56	L01024 01010111101101110111011101111111*
	57	L01056 11111111111111111111111111111010*
	58	L01088 11111111111111111111110111101111*
	59	L01120 11111101111011111111111111111111*
	60	L01152 00000000000000110011000000000000*
	61	L01184 00000000000000110011000000000000*
	62	L01216 00000000000000110011000000000000*
	63	L01248 00000000000000110011000000000000*
	64
	65	L01280 10010111011101110111011101111111*
	66	L01312 11111111111111111111111111111001*
	67	L01344 11111111111111111111111011011111*
	68	L01376 11111101110111111111111111111111*
	69	L01408 00000000000000110011000000000000*
	70	L01440 00000000000000110011000000000000*
	71	L01472 00000000000000110011000000000000*
	72	L01504 00000000000000110011000000000000*
	73
	74	L01536 00000000000000110011000000000000*
	75	L01568 00000000000000110011000000000000*
	76	L01600 00000000000000110011000000000000*
	77	L01632 00000000000000110011000000000000*
	78	L01664 00000000000000110011000000000000*
	79	L01696 00000000000000110011000000000000*
	80	L01728 00000000000000110011000000000000*
	81	L01760 00000000000000110011000000000000*
	82
	83	L01792 00000000000000110011000000000000*
	84	L01824 00000000000000110011000000000000*
	85	L01856 00000000000000110011000000000000*
	86	L01888 00000000000000110011000000000000*
	87	L01920 00000000000000110011000000000000*
	88	L01952 00000000000000110011000000000000*
	89	L01984 00000000000000110011000000000000*
	90	L02016 00000000000000110011000000000000*
	91
	92	N ==> XOR *
	93	L02048 00000000*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 11000011*
	99	N ==> PTD *
	100	L02128 00000000000000001111000011110000*
	101	L02160 11110000111100000000000000000000*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 10*
	104	C60DD*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal12l6-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL12L6 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal12l6.jed
	6	Output File: gal.jed
	7	The Date:    Sun Sep 16 22:21:32 2012
	8
	9
	10	PAL12L6
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "pal12l6.eqn". Date: 8-27-112
	14	*
	15	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS i11:11 i12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	17	NOTE PINS i19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 00000000001100110011001100000000*
	21	L00032 00000000001100110011001100000000*
	22	L00064 00000000001100110011001100000000*
	23	L00096 00000000001100110011001100000000*
	24	L00128 00000000001100110011001100000000*
	25	L00160 00000000001100110011001100000000*
	26	L00192 00000000001100110011001100000000*
	27	L00224 00000000001100110011001100000000*
	28
	29	L00256 01010111011101111011011101111111*
	30	L00288 11111111111111111111111111111001*
	31	L00320 11111101111111111111111111111111*
	32	L00352 11111111111111111111111111101111*
	33	L00384 00000000001100110011001100000000*
	34	L00416 00000000001100110011001100000000*
	35	L00448 00000000001100110011001100000000*
	36	L00480 00000000001100110011001100000000*
	37
	38	L00512 01010111011110110111011101111111*
	39	L00544 11111111111111111111111111111010*
	40	L00576 00000000001100110011001100000000*
	41	L00608 00000000001100110011001100000000*
	42	L00640 00000000001100110011001100000000*
	43	L00672 00000000001100110011001100000000*
	44	L00704 00000000001100110011001100000000*
	45	L00736 00000000001100110011001100000000*
	46
	47	L00768 01010111101101110111011101111111*
	48	L00800 11111111111111111111111111111010*
	49	L00832 00000000001100110011001100000000*
	50	L00864 00000000001100110011001100000000*
	51	L00896 00000000001100110011001100000000*
	52	L00928 00000000001100110011001100000000*
	53	L00960 00000000001100110011001100000000*
	54	L00992 00000000001100110011001100000000*
	55
	56	L01024 01011011011101110111011101111111*
	57	L01056 11111111111111111111111111110101*
	58	L01088 00000000001100110011001100000000*
	59	L01120 00000000001100110011001100000000*
	60	L01152 00000000001100110011001100000000*
	61	L01184 00000000001100110011001100000000*
	62	L01216 00000000001100110011001100000000*
	63	L01248 00000000001100110011001100000000*
	64
	65	L01280 10010111011101110111011101111111*
	66	L01312 11111111111111111111111111111001*
	67	L01344 00000000001100110011001100000000*
	68	L01376 00000000001100110011001100000000*
	69	L01408 00000000001100110011001100000000*
	70	L01440 00000000001100110011001100000000*
	71	L01472 00000000001100110011001100000000*
	72	L01504 00000000001100110011001100000000*
	73
	74	L01536 01100111011101110111011101111111*
	75	L01568 11111111111111111111111111110101*
	76	L01600 11111110111111111111111111111111*
	77	L01632 11111111111111111111111111011111*
	78	L01664 00000000001100110011001100000000*
	79	L01696 00000000001100110011001100000000*
	80	L01728 00000000001100110011001100000000*
	81	L01760 00000000001100110011001100000000*
	82
	83	L01792 00000000001100110011001100000000*
	84	L01824 00000000001100110011001100000000*
	85	L01856 00000000001100110011001100000000*
	86	L01888 00000000001100110011001100000000*
	87	L01920 00000000001100110011001100000000*
	88	L01952 00000000001100110011001100000000*
	89	L01984 00000000001100110011001100000000*
	90	L02016 00000000001100110011001100000000*
	91
	92	N ==> XOR *
	93	L02048 00000000*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 10000001*
	99	N ==> PTD *
	100	L02128 00000000111100001100000011000000*
	101	L02160 11000000110000001111000000000000*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 10*
	104	C8809*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal10l8-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL10L8 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal10l8.jed
	6	Output File: gal.jed
	7	The Date:    Sun Sep 16 22:18:49 2012
	8
	9
	10	PAL10L8
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "pal10l8.eqn". Date: 8-27-112
	14	*
	15	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	17	NOTE PINS o19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 01010111011101110111011110111111*
	21	L00032 11111111111111111111111111111011*
	22	L00064 00000011001100110011001100110000*
	23	L00096 00000011001100110011001100110000*
	24	L00128 00000011001100110011001100110000*
	25	L00160 00000011001100110011001100110000*
	26	L00192 00000011001100110011001100110000*
	27	L00224 00000011001100110011001100110000*
	28
	29	L00256 01010111011101110111101101111111*
	30	L00288 11111111111111111111111111111101*
	31	L00320 00000011001100110011001100110000*
	32	L00352 00000011001100110011001100110000*
	33	L00384 00000011001100110011001100110000*
	34	L00416 00000011001100110011001100110000*
	35	L00448 00000011001100110011001100110000*
	36	L00480 00000011001100110011001100110000*
	37
	38	L00512 01010111011101111011011101111111*
	39	L00544 11111111111111111111111111110110*
	40	L00576 00000011001100110011001100110000*
	41	L00608 00000011001100110011001100110000*
	42	L00640 00000011001100110011001100110000*
	43	L00672 00000011001100110011001100110000*
	44	L00704 00000011001100110011001100110000*
	45	L00736 00000011001100110011001100110000*
	46
	47	L00768 01010111011110110111011101111111*
	48	L00800 11111111111111111111111111111010*
	49	L00832 00000011001100110011001100110000*
	50	L00864 00000011001100110011001100110000*
	51	L00896 00000011001100110011001100110000*
	52	L00928 00000011001100110011001100110000*
	53	L00960 00000011001100110011001100110000*
	54	L00992 00000011001100110011001100110000*
	55
	56	L01024 01010111101101110111011101111111*
	57	L01056 11111111111111111111111111111010*
	58	L01088 00000011001100110011001100110000*
	59	L01120 00000011001100110011001100110000*
	60	L01152 00000011001100110011001100110000*
	61	L01184 00000011001100110011001100110000*
	62	L01216 00000011001100110011001100110000*
	63	L01248 00000011001100110011001100110000*
	64
	65	L01280 01011011011101110111011101111111*
	66	L01312 11111111111111111111111111110110*
	67	L01344 00000011001100110011001100110000*
	68	L01376 00000011001100110011001100110000*
	69	L01408 00000011001100110011001100110000*
	70	L01440 00000011001100110011001100110000*
	71	L01472 00000011001100110011001100110000*
	72	L01504 00000011001100110011001100110000*
	73
	74	L01536 10010111011101110111011101111111*
	75	L01568 11111111111111111111111111111001*
	76	L01600 00000011001100110011001100110000*
	77	L01632 00000011001100110011001100110000*
	78	L01664 00000011001100110011001100110000*
	79	L01696 00000011001100110011001100110000*
	80	L01728 00000011001100110011001100110000*
	81	L01760 00000011001100110011001100110000*
	82
	83	L01792 01100111011101110111011101111111*
	84	L01824 11111111111111111111111111110101*
	85	L01856 00000011001100110011001100110000*
	86	L01888 00000011001100110011001100110000*
	87	L01920 00000011001100110011001100110000*
	88	L01952 00000011001100110011001100110000*
	89	L01984 00000011001100110011001100110000*
	90	L02016 00000011001100110011001100110000*
	91
	92	N ==> XOR *
	93	L02048 00000000*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 00000000*
	99	N ==> PTD *
	100	L02128 11000000110000001100000011000000*
	101	L02160 11000000110000001100000011000000*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 10*
	104	CAD31*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal16l8-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL16L8 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal16l8.jed
	6	Output File: gal16v8.jed
	7	The Date:    Fri Sep 28 22:29:50 2012
	8
	9
	10	PAL16L8
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "pal16l8.eqn". Date: 8-29-112
	14	md
	15	*
	16	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	17	NOTE PINS i11:11 o12:12 o13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	18	NOTE PINS o19:19 VCC:20*
	19	QF2194*QP20*F0*
	20
	21	L00000 11111111111111111111111111111111*
	22	L00032 11111111111101110111101111111101*
	23	L00064 11110111111111110111011111111111*
	24	L00096 11111111111101111111111111111111*
	25	L00128 11111111111111110111111111111111*
	26	L00160 11111111111111111111011111111111*
	27	L00192 11111111111111111111111111111101*
	28	L00224 11111111111111111111101111111111*
	29
	30	L00256 11111111111111111111111111111111*
	31	L00288 10111111111101110111101111111111*
	32	L00320 11110111111111110111011111111101*
	33	L00352 11110111111111111111111111111111*
	34	L00384 10111111111111111111101111111111*
	35	L00416 11110111111111111111111111111101*
	36	L00448 11111111111101110111101111111111*
	37	L00480 11111111111111111111011111111101*
	38
	39	L00512 11111111111111101111111111111111*
	40	L00544 01111111111101110111101111111111*
	41	L00576 01111110111111111111111111111111*
	42	L00608 11111111111101111111111111111111*
	43	L00640 11111111111111110111111111111111*
	44	L00672 11111101111111111111101111111111*
	45	L00704 01111111111111111111101111111111*
	46	L00736 11111111111101110111111111111111*
	47
	48	L00768 11111111111111111111111111111111*
	49	L00800 11111011111011111111111111111111*
	50	L00832 11111111101111111111111111111110*
	51	L00864 11111011101111111111111111111111*
	52	L00896 11111011011111111111111111111111*
	53	L00928 11111111110111111111101111111111*
	54	L00960 11111111111111111111101111111110*
	55	L00992 11111111011111111111111111111111*
	56
	57	L01024 11111111111111111111111111111111*
	58	L01056 11110111111111110111011111111110*
	59	L01088 11111111111111010111111111111111*
	60	L01120 11110111111111101111111111111111*
	61	L01152 11111111111111111111011111111111*
	62	L01184 11111111111111111111111111111110*
	63	L01216 11111111111111110111011111111111*
	64	L01248 11111111111111111111011111111110*
	65
	66	L01280 11111111111111111111111111111111*
	67	L01312 11011111111111111110111111111111*
	68	L01344 11111111111111111111111110111111*
	69	L01376 11011111111111111111111110111111*
	70	L01408 10011111111111111110111111111111*
	71	L01440 10111111111111111111111111111111*
	72	L01472 01111111111111111101111110111111*
	73	L01504 11110111111111111111111111111111*
	74
	75	L01536 01111111111111111111110111111111*
	76	L01568 11111111111111111111111011111101*
	77	L01600 11111111111111111111111111111011*
	78	L01632 11111111111111111111111101111111*
	79	L01664 11111111111111111111101111111111*
	80	L01696 11111111111111111011110111111111*
	81	L01728 11111111111101111111111111111111*
	82	L01760 11111111011111111111111111111111*
	83
	84	L01792 11111111111111111111111111111111*
	85	L01824 11110111111111111111011111111011*
	86	L01856 11011111111111111111111111011111*
	87	L01888 11110111111111111111111111111111*
	88	L01920 11111111111111111011111111111111*
	89	L01952 11111111111111111111111101111111*
	90	L01984 11111111111111111111111111111011*
	91	L02016 11111111111111111111011111101111*
	92
	93	N ==> XOR *
	94	L02048 00000000*
	95	N ==> Signature is "" *
	96	L02056 00000000000000000000000000000000*
	97	L02088 00000000000000000000000000000000*
	98	N ==> AC1 *
	99	L02120 11111111*
	100	N ==> PTD *
	101	L02128 11111111111111111111111111111111*
	102	L02160 11111111111111111111111111111111*
	103	N ==> SYN 2192, AC0 2193 *
	104	L02192 11*
	105	CFCC2*
	106
	107	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal16r4-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL16R4 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal16r4.jed
	6	Output File: gal16v8.jed
	7	The Date:    Sun Sep 30 22:07:16 2012
	8
	9
	10	PAL16R4
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "pal16r4.eqn". Date: 9-6-112
	14	*
	15	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS /OE:11 o12:12 o13:13 rf14:14 rf15:15 rf16:16 rf17:17*
	17	NOTE PINS o18:18 o19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 11111111111111111111111111111111*
	21	L00032 11111111111101110111101111111111*
	22	L00064 11110111111111110111011111111111*
	23	L00096 11111111111101111111111111111111*
	24	L00128 11111111111111110111111111111111*
	25	L00160 11111111111111111111011111111111*
	26	L00192 11111111101111111111111111111111*
	27	L00224 11111111111111111111101111111111*
	28
	29	L00256 11111111111111111111111111111111*
	30	L00288 10111111111101110111101111111111*
	31	L00320 11110111111111110111011111111111*
	32	L00352 11110111111111111111111111111111*
	33	L00384 10111111111111111111101111111111*
	34	L00416 11111011111111111111111111111111*
	35	L00448 11111111111101110111101111111111*
	36	L00480 11111111111111111111011111111111*
	37
	38	L00512 01111111111101110111101111111111*
	39	L00544 01111110111111111111111111111111*
	40	L00576 11111111111101111111111111111111*
	41	L00608 11111111111111110111111111111111*
	42	L00640 11111101111111111111101111111111*
	43	L00672 01111111111111111111101111111111*
	44	L00704 11111111111101110111111111111111*
	45	L00736 11111011111111111111111111111111*
	46
	47	L00768 11111011111011111111111111111111*
	48	L00800 11111111101111111111111111111111*
	49	L00832 11111011111111111111111111111111*
	50	L00864 11111011011111111111111111111111*
	51	L00896 11111111110111111111101111111111*
	52	L00928 11111111111111111111101111111111*
	53	L00960 11111111011111111111111111111111*
	54	L00992 01110111111111111111111111111111*
	55
	56	L01024 11110111111111110111011111111111*
	57	L01056 11111111111111010111111111111111*
	58	L01088 11110111111111101111111111111111*
	59	L01120 11111111111111111111011111111111*
	60	L01152 11111111101111111111111111111111*
	61	L01184 11111111111111110111011111111111*
	62	L01216 11111111011111111111011111111111*
	63	L01248 10111111111111111111101111111111*
	64
	65	L01280 11111111111111111110111111111111*
	66	L01312 11111111111111111111111110111111*
	67	L01344 11111111111111111111111101111111*
	68	L01376 10111111111111111110111111111111*
	69	L01408 10111111111111111111111111111111*
	70	L01440 01111111111111111101111110111111*
	71	L01472 11111111101111111111111111111111*
	72	L01504 11110111111111111111111111111111*
	73
	74	L01536 01111111111111111111110111111111*
	75	L01568 11111111111111111111111011111111*
	76	L01600 11111111111111111111111111111011*
	77	L01632 11111111111111111111111101111111*
	78	L01664 11111111111111111111101111111111*
	79	L01696 11111111111111111011111011111111*
	80	L01728 11111111111101111111111111111111*
	81	L01760 11111111011111111111111111111111*
	82
	83	L01792 11111111111111111111110111111111*
	84	L01824 10111011111111111111111111111111*
	85	L01856 11111111011111111111111111011111*
	86	L01888 11110111111111111111111111111111*
	87	L01920 11111111111111111011111111111111*
	88	L01952 11111111111111111111111101111111*
	89	L01984 11111111111111111111111111111011*
	90	L02016 11111111111111111111011111101111*
	91
	92	N ==> XOR *
	93	L02048 00000000*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 11000011*
	99	N ==> PTD *
	100	L02128 11111111111111111111111111111111*
	101	L02160 11111111111111111111111111111111*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 01*
	104	C004B*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/gal16v8/pal16r6-to-gal16v8.jed

r0	r18404
	1	
	2	Device G16V8 converted from PAL16R6 JEDEC map.
	3	PAL to GAL JEDEC conversion utility - paltogal v3.12  17 November 1992
	4	Copyright (c) by LATTICE Semiconductor Corp. 1990, 1991, 1992.
	5	Input File:  pal16r6.jed
	6	Output File: gal16v8.jed
	7	The Date:    Sun Sep 30 22:09:28 2012
	8
	9
	10	PAL16R6
	11	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	12	Copyright (c) National Semiconductor Corporation 1990-1993
	13	Assembled from "pal16r6.eqn". Date: 9-10-112
	14	*
	15	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	16	NOTE PINS /OE:11 o12:12 rf13:13 rf14:14 rf15:15 rf16:16 rf17:17*
	17	NOTE PINS rf18:18 o19:19 VCC:20*
	18	QF2194*QP20*F0*
	19
	20	L00000 11111111111111111111111111111111*
	21	L00032 11111111111101110111101111111111*
	22	L00064 11110111111111110111011111111111*
	23	L00096 11111111111101111111111111111111*
	24	L00128 11111111111111110111111111111111*
	25	L00160 11111111111111111111011111111111*
	26	L00192 11111111101111111111111111111111*
	27	L00224 11111111111111111111101111111111*
	28
	29	L00256 10111111111101110111101111111111*
	30	L00288 11110111111111110111011111111111*
	31	L00320 11110111111111111111111111111111*
	32	L00352 10111111111111111111101111111111*
	33	L00384 11111011111111111111111111111111*
	34	L00416 11111111111101110111101111111111*
	35	L00448 11111111111111111111011111111111*
	36	L00480 11111111011111111111111111111111*
	37
	38	L00512 01111111111101110111101111111111*
	39	L00544 01111110111111111111111111111111*
	40	L00576 11111111111101111111111111111111*
	41	L00608 11111111111111110111111111111111*
	42	L00640 11111101111111111111101111111111*
	43	L00672 01111111111111111111101111111111*
	44	L00704 11111111111101110111111111111111*
	45	L00736 11111011111111111111111111111111*
	46
	47	L00768 11111011111011111111111111111111*
	48	L00800 11111111101111111111111111111111*
	49	L00832 11111011111111111111111111111111*
	50	L00864 11111011011111111111111111111111*
	51	L00896 11111111110111111111101111111111*
	52	L00928 11111111111111111111101111111111*
	53	L00960 11111111011111111111111111111111*
	54	L00992 01110111111111111111111111111111*
	55
	56	L01024 11110111111111110111011111111111*
	57	L01056 11111111111111010111111111111111*
	58	L01088 11110111111111101111111111111111*
	59	L01120 11111111111111111111011111111111*
	60	L01152 11111111101111111111111111111111*
	61	L01184 11111111111111110111011111111111*
	62	L01216 11111111011111111111011111111111*
	63	L01248 10111111111111111111101111111111*
	64
	65	L01280 11111111111111111110111111111111*
	66	L01312 11111111111111111111111110111111*
	67	L01344 11111111111111111111111101111111*
	68	L01376 10111111111111111110111111111111*
	69	L01408 10111111111111111111111111111111*
	70	L01440 01111111111111111101111110111111*
	71	L01472 11111111101111111111111111111111*
	72	L01504 11110111111111111111111111111111*
	73
	74	L01536 11111111111111111111111011111111*
	75	L01568 11111111111111111111111111111011*
	76	L01600 11111111111111111111111101111111*
	77	L01632 11111111111111111111101111111111*
	78	L01664 11111111111111111011111011111111*
	79	L01696 11111111111101111111110111111111*
	80	L01728 11111111011111111111111111111111*
	81	L01760 10111111111111111111111111111111*
	82
	83	L01792 11111111111111111111110111111111*
	84	L01824 10111011111111111111111111111111*
	85	L01856 11111111011111111111111111011111*
	86	L01888 11110111111111111111111111111111*
	87	L01920 11111111111111111011111111111111*
	88	L01952 11111111111111111111111101111111*
	89	L01984 11111111111111111111111111111011*
	90	L02016 11111111111111111111011111101111*
	91
	92	N ==> XOR *
	93	L02048 00000000*
	94	N ==> Signature is "" *
	95	L02056 00000000000000000000000000000000*
	96	L02088 00000000000000000000000000000000*
	97	N ==> AC1 *
	98	L02120 10000001*
	99	N ==> PTD *
	100	L02128 11111111111111111111111111111111*
	101	L02160 11111111111111111111111111111111*
	102	N ==> SYN 2192, AC0 2193 *
	103	L02192 01*
	104	C0007*
	105
	106	0000

trunk/src/regtests/jedutil/jeds/pal16r4/pal16r4.jed

r0	r18404
	1	
	2	PAL16R4
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16r4.eqn". Date: 9-6-112
	6	*
	7	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS /OE:11 o12:12 o13:13 rf14:14 rf15:15 rf16:16 rf17:17*
	9	NOTE PINS o18:18 o19:19 VCC:20*
	10	QF2048*QP20*F0*
	11	L0000
	12	11111111111111111111111111111111
	13	11111111111101110111101111111111
	14	11110111111111110111011111111111
	15	11111111111101111111111111111111
	16	11111111111111110111111111111111
	17	11111111111111111111011111111111
	18	11111111101111111111111111111111
	19	11111111111111111111101111111111*
	20	L0256
	21	11111111111111111111111111111111
	22	10111111111101110111101111111111
	23	11110111111111110111011111111111
	24	11110111111111111111111111111111
	25	10111111111111111111101111111111
	26	11111011111111111111111111111111
	27	11111111111101110111101111111111
	28	11111111111111111111011111111111*
	29	L0512
	30	01111111111101110111101111111111
	31	01111110111111111111111111111111
	32	11111111111101111111111111111111
	33	11111111111111110111111111111111
	34	11111101111111111111101111111111
	35	01111111111111111111101111111111
	36	11111111111101110111111111111111
	37	11111011111111111111111111111111*
	38	L0768
	39	11111011111011111111111111111111
	40	11111111101111111111111111111111
	41	11111011111111111111111111111111
	42	11111011011111111111111111111111
	43	11111111110111111111101111111111
	44	11111111111111111111101111111111
	45	11111111011111111111111111111111
	46	01110111111111111111111111111111*
	47	L1024
	48	11110111111111110111011111111111
	49	11111111111111010111111111111111
	50	11110111111111101111111111111111
	51	11111111111111111111011111111111
	52	11111111101111111111111111111111
	53	11111111111111110111011111111111
	54	11111111011111111111011111111111
	55	10111111111111111111101111111111*
	56	L1280
	57	11111111111111111110111111111111
	58	11111111111111111111111110111111
	59	11111111111111111111111101111111
	60	10111111111111111110111111111111
	61	10111111111111111111111111111111
	62	01111111111111111101111110111111
	63	11111111101111111111111111111111
	64	11110111111111111111111111111111*
	65	L1536
	66	01111111111111111111110111111111
	67	11111111111111111111111011111111
	68	11111111111111111111111111111011
	69	11111111111111111111111101111111
	70	11111111111111111111101111111111
	71	11111111111111111011111011111111
	72	11111111111101111111111111111111
	73	11111111011111111111111111111111*
	74	L1792
	75	11111111111111111111110111111111
	76	10111011111111111111111111111111
	77	11111111011111111111111111011111
	78	11110111111111111111111111111111
	79	11111111111111111011111111111111
	80	11111111111111111111111101111111
	81	11111111111111111111111111111011
	82	11111111111111111111011111101111*
	83	CF78E*
	84	0000

trunk/src/regtests/jedutil/jeds/pal20l10/pal20l10.jed

r0	r18404
	1	
	2	PAL20L10
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal20l10.eqn". Date: 8-31-112
	6	*
	7	NOTE PINS i1:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 i10:10*
	8	NOTE PINS i11:11 GND:12 i13:13 o14:14 o15:15 o16:16 o17:17 o18:18*
	9	NOTE PINS o19:19 o20:20 o21:21 o22:22 o23:23 VCC:24*
	10	QF1600*QP24*F0*
	11	L0000
	12	1111111111111111111111111111111111111111
	13	1111111111111111111101111111111111111111
	14	1111111111111111111111111111111111110111
	15	1111111111111111111111111111111111111110*
	16	L0160
	17	1111011111111111111110111111111111111111
	18	1101111111111111111111111011111111111111
	19	1111111111111111111111111011111111111111
	20	1101111111111111111111111111111111111111*
	21	L0320
	22	1111111111110111011111111111111111111111
	23	1101111111111111111111110111111111111111
	24	1111111010111111111111111111111111111111
	25	1111110111111111111111111111111111111111*
	26	L0480
	27	1111111111111111111111111111111111111111
	28	1111111111011111111111111111111111111111
	29	1111111111111111101111111111111111111111
	30	1111111111101111111110111111111111111111*
	31	L0640
	32	1111111111111110111111110111111111111111
	33	1111111111111101111111111111111111110111
	34	0111111111111111111111111111111110111111
	35	1111111111111111111111111111011111110111*
	36	L0800
	37	1101111111111111111111111111111101111111
	38	1001011110111111111111111011111111111111
	39	1111111111111111101001110111011101111111
	40	0101011110111011110111111111111111111111*
	41	L0960
	42	1111111101110111111111111111111111111111
	43	1111111111111111111111101111111111111111
	44	1111111111111111111111011111111101111111
	45	1111111111111111111111111111011111111111*
	46	L1120
	47	1111111111111111111111111111111111111111
	48	1001111111111111111111111110111111111111
	49	1111011110111111111111111111111111111111
	50	1111011111111111111111111101011111111111*
	51	L1280
	52	1111111111111111111111111111111011111111
	53	0110101101111111111111111111111111110111
	54	0110101111111011111111111111110111111110
	55	0110101111111111011111111111111111111111*
	56	L1440
	57	1111111111111111111111111111111111011111
	58	1111111111111111111111111111111111111011
	59	1111111111111111111111111111111101111111
	60	1111111111111111111111111111011111101111*
	61	CC08C*
	62	0000

trunk/src/regtests/jedutil/jeds/pal16r6/pal16r6.jed

r0	r18404
	1	
	2	PAL16R6
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16r6.eqn". Date: 9-10-112
	6	*
	7	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS /OE:11 o12:12 rf13:13 rf14:14 rf15:15 rf16:16 rf17:17*
	9	NOTE PINS rf18:18 o19:19 VCC:20*
	10	QF2048*QP20*F0*
	11	L0000
	12	11111111111111111111111111111111
	13	11111111111101110111101111111111
	14	11110111111111110111011111111111
	15	11111111111101111111111111111111
	16	11111111111111110111111111111111
	17	11111111111111111111011111111111
	18	11111111101111111111111111111111
	19	11111111111111111111101111111111*
	20	L0256
	21	10111111111101110111101111111111
	22	11110111111111110111011111111111
	23	11110111111111111111111111111111
	24	10111111111111111111101111111111
	25	11111011111111111111111111111111
	26	11111111111101110111101111111111
	27	11111111111111111111011111111111
	28	11111111011111111111111111111111*
	29	L0512
	30	01111111111101110111101111111111
	31	01111110111111111111111111111111
	32	11111111111101111111111111111111
	33	11111111111111110111111111111111
	34	11111101111111111111101111111111
	35	01111111111111111111101111111111
	36	11111111111101110111111111111111
	37	11111011111111111111111111111111*
	38	L0768
	39	11111011111011111111111111111111
	40	11111111101111111111111111111111
	41	11111011111111111111111111111111
	42	11111011011111111111111111111111
	43	11111111110111111111101111111111
	44	11111111111111111111101111111111
	45	11111111011111111111111111111111
	46	01110111111111111111111111111111*
	47	L1024
	48	11110111111111110111011111111111
	49	11111111111111010111111111111111
	50	11110111111111101111111111111111
	51	11111111111111111111011111111111
	52	11111111101111111111111111111111
	53	11111111111111110111011111111111
	54	11111111011111111111011111111111
	55	10111111111111111111101111111111*
	56	L1280
	57	11111111111111111110111111111111
	58	11111111111111111111111110111111
	59	11111111111111111111111101111111
	60	10111111111111111110111111111111
	61	10111111111111111111111111111111
	62	01111111111111111101111110111111
	63	11111111101111111111111111111111
	64	11110111111111111111111111111111*
	65	L1536
	66	11111111111111111111111011111111
	67	11111111111111111111111111111011
	68	11111111111111111111111101111111
	69	11111111111111111111101111111111
	70	11111111111111111011111011111111
	71	11111111111101111111110111111111
	72	11111111011111111111111111111111
	73	10111111111111111111111111111111*
	74	L1792
	75	11111111111111111111110111111111
	76	10111011111111111111111111111111
	77	11111111011111111111111111011111
	78	11110111111111111111111111111111
	79	11111111111111111011111111111111
	80	11111111111111111111111101111111
	81	11111111111111111111111111111011
	82	11111111111111111111011111101111*
	83	CF78C*
	84	0000

trunk/src/regtests/jedutil/jeds/pal16r8/pal16r8.jed

r0	r18404
	1	
	2	PAL16R8
	3	EQN2JED - Boolean Equations to JEDEC file assembler (Version V101)
	4	Copyright (c) National Semiconductor Corporation 1990-1993
	5	Assembled from "pal16r8.eqn". Date: 9-10-112
	6	*
	7	NOTE PINS CLK:1 i2:2 i3:3 i4:4 i5:5 i6:6 i7:7 i8:8 i9:9 GND:10*
	8	NOTE PINS /OE:11 rf12:12 rf13:13 rf14:14 rf15:15 rf16:16 rf17:17*
	9	NOTE PINS rf18:18 rf19:19 VCC:20*
	10	QF2048*QP20*F0*
	11	L0000
	12	11111111111101110111101111111111
	13	11110111111111110111011111111111
	14	11111111111101111111111111111101
	15	11111111111111110111111111111111
	16	11111111111111111111011111111111
	17	11111111101111111111111111111110
	18	11111111111111111111101111111111
	19	01111111111111111111111111111111*
	20	L0256
	21	10111111111101110111101111111111
	22	11110111111111110111011111111111
	23	11010111111111111111111111111111
	24	10111111111111111111101111111111
	25	11101011111111111111111111111111
	26	11111111111101110111101111111111
	27	11111111111111111111011111111111
	28	11111111101111111111111111111111*
	29	L0512
	30	01111111111101110111101111111111
	31	01111110111111111111111111111111
	32	11111111111101111111111111111111
	33	11111111111111110111111111111111
	34	11111101111111111111101111111111
	35	01111111111111111111101111111111
	36	11111111111101110111111111111111
	37	11111011111111111111111111111111*
	38	L0768
	39	11111011111011111111111111111111
	40	11111111101111111111111111111111
	41	11111011111111111111111111111111
	42	11111011011111111111111111111111
	43	11111111110111111111101111111111
	44	11111111111111111111101111111111
	45	11111111011111111111111111111111
	46	01110111111111111111111111111111*
	47	L1024
	48	11110111111111110111011111111111
	49	11111111111111010111111111111111
	50	11110111111111101111111111111111
	51	11111111111111111111011111111111
	52	11111111101111111111111111111111
	53	11111111111111110111011111111111
	54	11111111011111111111011111111111
	55	10111111111111111111101111111111*
	56	L1280
	57	11111111111111111110111111111111
	58	11111111111111111111111110111111
	59	11111111111111111111111101111111
	60	10111111111111111110111111111111
	61	10111111111111111111111111111111
	62	01111111111111111101111110111111
	63	11111111101111111111111111111111
	64	11110111111111111111111111111111*
	65	L1536
	66	11111111111111111111111011111111
	67	11111111111111111111111111111011
	68	11111111111111111111111101111111
	69	11111111111111111111101111111111
	70	11111111111111111011110111111111
	71	11111111111101111111111111111111
	72	11111111011111111111111111111111
	73	11111011111111111111111111111111*
	74	L1792
	75	10111011111111111111111111111111
	76	11111111011111111111111111011111
	77	11110111111111111111111111111111
	78	11111111111111111011111111111111
	79	11111111111111111111111101111111
	80	11111111111111111111111111111011
	81	11111111111111111111011111101111
	82	11111111111101111111111111111111*
	83	CF750*
	84	0000

trunk/src/regtests/jedutil/eqns/pal16l2.eqn

r18403	r18404
1		chip 2000 PAL16L2
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
4		i12=12 i13=13 i14=14 o15=15 o16=16 i17=17 i18=18 i19=19 VCC=20
5
6		equations
7
8		/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
9		/i9 +
10		/i11 +
11		/i12 +
12		i13 +
13		i14 +
14		i17 +
15		i18 & i19
16
17		/o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
18		i9 +
19		i11 +
20		i12 +
21		/i13 +
22		/i14 +
23		/i17 +
24		/i18 & /i19

trunk/src/regtests/jedutil/eqns/pal14l4.eqn

r18403	r18404
1		chip 2000 PAL14L4
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
4		i12=12 i13=13 o14=14 o15=15 o16=16 o17=17 i18=18 i19=19 VCC=20
5
6		equations
7
8		/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
9		/i9 & i11 +
10		i12 & /i13 +
11		i18 & i19
12
13		/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
14		/i9 & /i11 +
15		/i12 & i13 +
16		/i18 & i19
17
18		/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
19		/i9 & /i11 +
20		i12 & i13 +
21		i18 & /i19
22
23		/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
24		/i9 & i11 +
25		/i12 & /i13 +
26		/i18 & /i19

trunk/src/regtests/jedutil/eqns/pal12l6.eqn

r18403	r18404
1		chip 2000 PAL12L6
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
4		i12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 i19=19 VCC=20
5
6		equations
7
8		/o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
9		i9 & i11 +
10		/i19 +
11		i12
12
13		/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
14		/i9 & i11
15
16		/o15 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
17		i9 & i11
18
19		/o16 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
20		/i9 & /i11
21
22		/o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
23		/i9 & /i11
24
25		/o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
26		/i9 & i11 +
27		i19 +
28		/i12

trunk/src/regtests/jedutil/eqns/pal10l8.eqn

r18403	r18404
1		chip 2000 PAL10L8
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
4		o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
5
6		equations
7
8		/o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
9		i9 & i11
10
11		/o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
12		/i9 & i11
13
14		/o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
15		i9 & /i11
16
17		/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
18		/i9 & /i11
19
20		/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
21		/i9 & /i11
22
23		/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
24		i9 & /i11
25
26		/o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
27		i11
28
29		/o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
30		/i9

trunk/src/regtests/jedutil/eqns/pal20l8.eqn

r18403	r18404
1		chip 2000 PAL20L8
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
4		i13=13 i14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 i23=23 VCC=24
5
6		equations
7
8		/o15 = /i1 & i2 & /i3 & i4 & i11 +
9		/i1 & i2 & /i3 & /i5 & /i13 +
10		/i1 & i2 & /i3 & i6 & i14 +
11		/i1 & i2 & /i3 & /i7 & /i23 +
12		/i1 & i2 & /i3 & i8 & /i11 +
13		/i1 & i2 & /i3 & /i9 & i13 +
14		/o16
15		o15.oe = o16
16
17		/o16 = i1 & /i2 & /o17 +
18		i3 & /i4 +
19		i5 & /i6 +
20		i7 & /i8 +
21		i3 & i9 & o17 +
22		i1 & /i2 & i3 & /i4 & i5 & /i6 & i7 & /i8 & /i9 +
23		/i8 & /i9
24		o16.oe = vcc
25
26		/o17 = /i23 & /o18 +
27		i10 & o18 +
28		i9 +
29		i8 +
30		/i7 +
31		/i6 +
32		i5
33		o17.oe = i4 & i5
34
35		/o18 = i1 & /i2 & i3 & /i4 & /i8 & i23 +
36		i1 & i2 & i3 & /i4 & /i5 +
37		/i6 & i7 & i8 & i9 & i10 & /o19 +
38		i11 & i13 & i14 & i23 +
39		/i6 & i7 & i8 & i9 & i10 +
40		i3 & i13 & i14 & i23 +
41		i1 & i2 & i3 & /i4 & /i5 & o19
42		o18.oe = i1 & i10 & i23
43
44		/o19 = i9 & /i10 & i11 & i23 +
45		i9 +
46		/i10 +
47		i11 & o20 +
48		i23 +
49		i2 & /i10 & i23 +
50		i9 & i11
51		o19.oe = i8 & /o20
52
53		/o20 = o21 +
54		/i2 +
55		/i3 +
56		/i4 +
57		/i5 +
58		/i6 +
59		/i7 & /o21
60		o20.oe = vcc
61
62		/o21 = i1 & i8 +
63		/i14 +
64		i1 & /i5 & i8 +
65		i23 +
66		i1 & i8 & /i14 +
67		i13 +
68		i1 & i11
69		o21.oe = i5 & i6
70
71		/o22 = i1 & /i8 +
72		/i8 +
73		i1 +
74		/i10 +
75		/i23 +
76		i8 & /i13 +
77		/i11
78		o22.oe = i3 & /i7

trunk/src/regtests/jedutil/eqns/pal16l8.eqn

r18403	r18404
1		md
2		chip 2000 PAL16L8
3
4		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
5		i11=11 o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
6
7		equations
8
9		/o12 = i3 & i7 & /i9 +
10		i1 & o13 +
11		i3 +
12		/i6 +
13		i8 +
14		/i9 +
15		i7 & /o13
16		o12.oe = vcc
17
18		/o13 = i11 & /o14 +
19		/i9 +
20		i8 +
21		/i7 +
22		/i6 & o14 +
23		i5 +
24		i4
25		o13.oe = i2 & o14
26
27		/o14 = i1 & /o15 +
28		/i8 +
29		i1 & /i8 +
30		i1 & /i2 & /o15 +
31		/i2 +
32		i2 & /i8 & o15 +
33		i3
34		o14.oe = vcc
35
36		/o15 = i3 & i6 & i7 & /i11 +
37		i6 & o16 +
38		i3 & /o16 +
39		i7 +
40		/i11 +
41		i6 & i7 +
42		i7 & /i11
43		o15.oe = vcc
44
45		/o16 = /i3 & /o17 +
46		/i4 & /i11 +
47		/i4 & /i3 +
48		/i3 & i4 +
49		/i7 & o17 +
50		/i7 & /i11 +
51		i4
52		o16.oe = vcc
53
54		/o17 = i2 & i5 & i6 & /i7 +
55		i2 & /o18 +
56		i5 +
57		i6 +
58		/i7 & o18 +
59		i2 & /i7 +
60		i5 & i6
61		o17.oe = /o16
62
63		/o18 = /i2 & i5 & i6 & /i7 +
64		i3 & i6 & i7 & i11 +
65		i3 +
66		/i2 & /i7 +
67		i3 & i11 +
68		i5 & i6 & /i7 +
69		i7 & i11
70		o18.oe = vcc
71
72		/o19 = i5 & i6 & /i7 & i11 +
73		i3 & i6 & i7 +
74		i5 +
75		i6 +
76		i7 +
77		i11 +
78		/i7
79		o19.oe = vcc

trunk/src/regtests/jedutil/eqns/pal20l10.eqn

r18403	r18404
1		chip 2000 PAL20L10
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
4		i13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 o23=23 VCC=24
5
6		equations
7
8		/o14 = /i11 +
9		i10 +
10		i9 & /o15
11		o14.oe = o15
12
13		/o15 = /i1 & i2 & /i3 & i4 & i11 +
14		/i1 & i2 & /i3 & /i5 & /i13 & o16 +
15		/i1 & i2 & /i3 & i6
16		o15.oe = /o16
17
18		/o16 = i1 & /i2 & /o17 +
19		i3 & /i4 +
20		i3 & i9 & o17
21		o16.oe = vcc
22
23		/o17 = /o18 +
24		i10 & o18 +
25		i9
26		o17.oe = i4 & i5
27
28		/o18 = i1 & /i2 & i3 & /i4 & /i8 +
29		/i6 & i7 & i8 & i9 & i10 & /o19 +
30		i1 & i2 & i3 & /i4 & /i5 & o19
31		o18.oe = i1 & i10
32
33		/o19 = i11 & o20 +
34		i2 & /i10 +
35		i9 & i11
36		o19.oe = i8 & /o20
37
38		/o20 = o21 +
39		/i6 +
40		/i7 & /o21
41		o20.oe = vcc
42
43		/o21 = i1 & i8 +
44		/i4 & /o22 +
45		o22
46		o21.oe = i5 & i6
47
48		/o22 = i1 & /i8 +
49		/i8 +
50		i1
51		o22.oe = i3 & /i7
52
53		/o23 = i7 +
54		i11 +
55		/i13
56		o23.oe = vcc

trunk/src/regtests/jedutil/eqns/pal10h8.eqn

r18403	r18404
1		chip 2000 PAL10H8
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
4		o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
5
6		equations
7
8		o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
9		i9 & i11
10
11		o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
12		/i9 & i11
13
14		o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
15		i9 & /i11
16
17		o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
18		/i9 & /i11
19
20		o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
21		/i9 & /i11
22
23		o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
24		i9 & /i11
25
26		o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
27		/i9 & i11
28
29		o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
30		i11

trunk/src/regtests/jedutil/eqns/pal12h6.eqn

r18403	r18404
1		chip 2000 PAL12H6
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
4		i12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 i19=19 VCC=20
5
6		equations
7
8		o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
9		i9 & i11 +
10		/i19 +
11		i12
12
13		o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
14		/i9 & i11
15
16		o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
17		/i9 & /i11
18
19		o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
20		i9 & /i11
21
22		o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
23		/i9 & /i11
24
25		o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
26		/i9 & i11 +
27		i19 +
28		/i12

trunk/src/regtests/jedutil/eqns/pal14h4.eqn

r18403	r18404
1		chip 2000 PAL14H4
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
4		i12=12 i13=13 o14=14 o15=15 o16=16 o17=17 i18=18 i19=19 VCC=20
5
6		equations
7
8		o14 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
9		i9 & i11 +
10		/i12 & /i13 +
11		i18 & /i19
12
13		o15 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
14		i9 & /i11 +
15		i12 & i13 +
16		/i18 & i19
17
18		o16 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
19		/i9 & i11 +
20		i12 & /i13 +
21		/i18 & /i19
22
23		o17 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
24		i9 & i11 +
25		/i12 & i13 +
26		i18 & i19

trunk/src/regtests/jedutil/eqns/pal16h2.eqn

r18403	r18404
1		chip 2000 PAL16H2
2
3		i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
4		i12=12 i13=13 i14=14 o15=15 o16=16 i17=17 i18=18 i19=19 VCC=20
5
6		equations
7
8		o15 = i1 & i2 & i3 & /i4 & i5 & /i6 & i7 & i8 +
9		i9 +
10		/i11 +
11		i12 +
12		/i13 +
13		i14 +
14		/i17 +
15		i18 & /i19
16
17		o16 = i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8 +
18		/i9 +
19		i11 +
20		/i12 +
21		i13 +
22		/i14 +
23		i17 +
24		/i18 & i19

trunk/src/regtests/jedutil/eqns/pal10h8/pal10h8.eqn

r0	r18404
	1	chip 2000 PAL10H8
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
	5
	6	equations
	7
	8	o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	9	i9 & i11
	10
	11	o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	12	/i9 & i11
	13
	14	o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	15	i9 & /i11
	16
	17	o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	18	/i9 & /i11
	19
	20	o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	21	/i9 & /i11
	22
	23	o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	24	i9 & /i11
	25
	26	o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	27	/i9 & i11
	28
	29	o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
	30	i11

trunk/src/regtests/jedutil/eqns/pal16h2/pal16h2.eqn

r0	r18404
	1	chip 2000 PAL16H2
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 i13=13 i14=14 o15=15 o16=16 i17=17 i18=18 i19=19 VCC=20
	5
	6	equations
	7
	8	o15 = i1 & i2 & i3 & /i4 & i5 & /i6 & i7 & i8 +
	9	i9 +
	10	/i11 +
	11	i12 +
	12	/i13 +
	13	i14 +
	14	/i17 +
	15	i18 & /i19
	16
	17	o16 = i1 & i2 & /i3 & i4 & /i5 & i6 & i7 & i8 +
	18	/i9 +
	19	i11 +
	20	/i12 +
	21	i13 +
	22	/i14 +
	23	i17 +
	24	/i18 & i19

trunk/src/regtests/jedutil/eqns/pal14h4/pal14h4.eqn

r0	r18404
	1	chip 2000 PAL14H4
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 i13=13 o14=14 o15=15 o16=16 o17=17 i18=18 i19=19 VCC=20
	5
	6	equations
	7
	8	o14 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	9	i9 & i11 +
	10	/i12 & /i13 +
	11	i18 & /i19
	12
	13	o15 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	14	i9 & /i11 +
	15	i12 & i13 +
	16	/i18 & i19
	17
	18	o16 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	19	/i9 & i11 +
	20	i12 & /i13 +
	21	/i18 & /i19
	22
	23	o17 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	24	i9 & i11 +
	25	/i12 & i13 +
	26	i18 & i19

trunk/src/regtests/jedutil/eqns/pal12h6/pal12h6.eqn

r0	r18404
	1	chip 2000 PAL12H6
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 i19=19 VCC=20
	5
	6	equations
	7
	8	o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	9	i9 & i11 +
	10	/i19 +
	11	i12
	12
	13	o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	14	/i9 & i11
	15
	16	o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	17	/i9 & /i11
	18
	19	o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	20	i9 & /i11
	21
	22	o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	23	/i9 & /i11
	24
	25	o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	26	/i9 & i11 +
	27	i19 +
	28	/i12

trunk/src/regtests/jedutil/eqns/pal14l4/pal14l4.eqn

r0	r18404
	1	chip 2000 PAL14L4
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 i13=13 o14=14 o15=15 o16=16 o17=17 i18=18 i19=19 VCC=20
	5
	6	equations
	7
	8	/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	9	/i9 & i11 +
	10	i12 & /i13 +
	11	i18 & i19
	12
	13	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	14	/i9 & /i11 +
	15	/i12 & i13 +
	16	/i18 & i19
	17
	18	/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	19	/i9 & /i11 +
	20	i12 & i13 +
	21	i18 & /i19
	22
	23	/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	24	/i9 & i11 +
	25	/i12 & /i13 +
	26	/i18 & /i19

trunk/src/regtests/jedutil/eqns/pal12l6/pal12l6.eqn

r0	r18404
	1	chip 2000 PAL12L6
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 i19=19 VCC=20
	5
	6	equations
	7
	8	/o13 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	9	i9 & i11 +
	10	/i19 +
	11	i12
	12
	13	/o14 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	14	/i9 & i11
	15
	16	/o15 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	17	i9 & i11
	18
	19	/o16 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	20	/i9 & /i11
	21
	22	/o17 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	23	/i9 & /i11
	24
	25	/o18 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	26	/i9 & i11 +
	27	i19 +
	28	/i12

trunk/src/regtests/jedutil/eqns/pal10l8/pal10l8.eqn

r0	r18404
	1	chip 2000 PAL10L8
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
	5
	6	equations
	7
	8	/o12 = /i1 & i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	9	i9 & i11
	10
	11	/o13 = i1 & /i2 & i3 & i4 & i5 & i6 & i7 & i8 +
	12	/i9 & i11
	13
	14	/o14 = i1 & i2 & /i3 & i4 & i5 & i6 & i7 & i8 +
	15	i9 & /i11
	16
	17	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	18	/i9 & /i11
	19
	20	/o16 = i1 & i2 & i3 & i4 & /i5 & i6 & i7 & i8 +
	21	/i9 & /i11
	22
	23	/o17 = i1 & i2 & i3 & i4 & i5 & /i6 & i7 & i8 +
	24	i9 & /i11
	25
	26	/o18 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	27	i11
	28
	29	/o19 = i1 & i2 & i3 & i4 & i5 & i6 & i7 & /i8 +
	30	/i9

trunk/src/regtests/jedutil/eqns/pal16l2/pal16l2.eqn

r0	r18404
	1	chip 2000 PAL16L2
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 i13=13 i14=14 o15=15 o16=16 i17=17 i18=18 i19=19 VCC=20
	5
	6	equations
	7
	8	/o15 = i1 & i2 & i3 & /i4 & i5 & i6 & i7 & i8 +
	9	/i9 +
	10	/i11 +
	11	/i12 +
	12	i13 +
	13	i14 +
	14	i17 +
	15	i18 & i19
	16
	17	/o16 = i1 & i2 & i3 & i4 & i5 & i6 & /i7 & i8 +
	18	i9 +
	19	i11 +
	20	i12 +
	21	/i13 +
	22	/i14 +
	23	/i17 +
	24	/i18 & /i19

trunk/src/regtests/jedutil/eqns/pal20l8/pal20l8.eqn

r0	r18404
	1	chip 2000 PAL20L8
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 i14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	/o15 = /i1 & i2 & /i3 & i4 & i11 +
	9	/i1 & i2 & /i3 & /i5 & /i13 +
	10	/i1 & i2 & /i3 & i6 & i14 +
	11	/i1 & i2 & /i3 & /i7 & /i23 +
	12	/i1 & i2 & /i3 & i8 & /i11 +
	13	/i1 & i2 & /i3 & /i9 & i13 +
	14	/o16
	15	o15.oe = o16
	16
	17	/o16 = i1 & /i2 & /o17 +
	18	i3 & /i4 +
	19	i5 & /i6 +
	20	i7 & /i8 +
	21	i3 & i9 & o17 +
	22	i1 & /i2 & i3 & /i4 & i5 & /i6 & i7 & /i8 & /i9 +
	23	/i8 & /i9
	24	o16.oe = vcc
	25
	26	/o17 = /i23 & /o18 +
	27	i10 & o18 +
	28	i9 +
	29	i8 +
	30	/i7 +
	31	/i6 +
	32	i5
	33	o17.oe = i4 & i5
	34
	35	/o18 = i1 & /i2 & i3 & /i4 & /i8 & i23 +
	36	i1 & i2 & i3 & /i4 & /i5 +
	37	/i6 & i7 & i8 & i9 & i10 & /o19 +
	38	i11 & i13 & i14 & i23 +
	39	/i6 & i7 & i8 & i9 & i10 +
	40	i3 & i13 & i14 & i23 +
	41	i1 & i2 & i3 & /i4 & /i5 & o19
	42	o18.oe = i1 & i10 & i23
	43
	44	/o19 = i9 & /i10 & i11 & i23 +
	45	i9 +
	46	/i10 +
	47	i11 & o20 +
	48	i23 +
	49	i2 & /i10 & i23 +
	50	i9 & i11
	51	o19.oe = i8 & /o20
	52
	53	/o20 = o21 +
	54	/i2 +
	55	/i3 +
	56	/i4 +
	57	/i5 +
	58	/i6 +
	59	/i7 & /o21
	60	o20.oe = vcc
	61
	62	/o21 = i1 & i8 +
	63	/i14 +
	64	i1 & /i5 & i8 +
	65	i23 +
	66	i1 & i8 & /i14 +
	67	i13 +
	68	i1 & i11
	69	o21.oe = i5 & i6
	70
	71	/o22 = i1 & /i8 +
	72	/i8 +
	73	i1 +
	74	/i10 +
	75	/i23 +
	76	i8 & /i13 +
	77	/i11
	78	o22.oe = i3 & /i7

trunk/src/regtests/jedutil/eqns/pal20r4/pal20r4.eqn

r0	r18404
	1	chip pal20r4 PAL20R4
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	/OE=13 i14=14 o15=15 o16=16 rf17=17 rf18=18 rf19=19 rf20=20 o21=21 o22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	/o15 = i2 & i6 & i7 +
	9	i6 & o16 +
	10	i3 & /o16 +
	11	i7 +
	12	/i4 +
	13	i6 & i7 +
	14	i4 & i7
	15	o15.oe = /i23
	16
	17	/o16 = /i3 & /rf17 +
	18	/i4 +
	19	/i3 +
	20	/i3 & i4 +
	21	/i7 & rf17 +
	22	/i7 +
	23	i4
	24	o16.oe = i23
	25
	26	/rf17 := /i2 +
	27	/rf18 +
	28	i5 +
	29	i6 +
	30	rf18 +
	31	i4 +
	32	/i10 +
	33	/i23
	34	rf17.oe = OE
	35
	36	/rf18 := /i2 & i5 & i6 & /i7 +
	37	i3 & i6 & i7 +
	38	i3 & rf19 +
	39	/i2 & /i7 +
	40	/i3 & /rf19 +
	41	i5 & i6 & /i7 +
	42	i7 +
	43	/i11
	44	rf18.oe = OE
	45
	46	/rf19 := i5 & i6 & /i7 +
	47	i3 & i6 & i7 +
	48	i5 & rf20 +
	49	i6 +
	50	i7 +
	51	/i4 & /rf20 +
	52	/i7 +
	53	i10
	54	rf19.oe = OE
	55
	56	/rf20 := i10 & rf17 +
	57	/i11 +
	58	i4 & /rf17 +
	59	i2 +
	60	/i6 & /i7 +
	61	i8 +
	62	/i9 +
	63	o22
	64	rf20.oe = OE
	65
	66	/o21 = /i8 +
	67	/i2 & rf17 +
	68	i11 +
	69	/i10 +
	70	o15 +
	71	/i14 +
	72	/i3
	73	o21.oe = i8 & i9 & /o22
	74
	75	/o22 = i14 +
	76	/o15 +
	77	i3 & /o21 +
	78	i7 +
	79	/i8 & o21 +
	80	i10 +
	81	/i9
	82	o22.oe = i14 & /o15
		No newline at end of file

trunk/src/regtests/jedutil/eqns/pal20r6/pal20r6.eqn

r0	r18404
	1	chip pal20r6 PAL20R6
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	/OE=13 i14=14 o15=15 rf16=16 rf17=17 rf18=18 rf19=19 rf20=20 rf21=21 o22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	/o15 = i2 & i6 & i7 +
	9	i6 & rf16 +
	10	i3 & /rf16 +
	11	i7 +
	12	/i4 +
	13	i6 & i7 +
	14	i4 & i7
	15	o15.oe = /i23
	16
	17	/rf16 := /i3 & /rf17 +
	18	/i4 & /i23 +
	19	/i3 +
	20	/i3 & i4 +
	21	/i7 & rf17 +
	22	/i7 +
	23	i4 +
	24	i23
	25	rf16.oe = OE
	26
	27	/rf17 := /i2 +
	28	/rf18 +
	29	i5 +
	30	i6 +
	31	rf18 +
	32	i4 +
	33	/i10 +
	34	/i23
	35	rf17.oe = OE
	36
	37	/rf18 := /i2 & i5 & i6 & /i7 +
	38	i3 & i6 & i7 +
	39	i3 & rf19 +
	40	/i2 & /i7 +
	41	/i3 & /rf19 +
	42	i5 & i6 & /i7 +
	43	i7 +
	44	/i11
	45	rf18.oe = OE
	46
	47	/rf19 := i5 & i6 & /i7 +
	48	i3 & i6 & i7 +
	49	i5 & rf20 +
	50	i6 +
	51	i7 +
	52	/i4 & /rf20 +
	53	/i7 +
	54	i10
	55	rf19.oe = OE
	56
	57	/rf20 := i10 & rf17 +
	58	/i11 +
	59	i4 & /rf17 +
	60	i2 +
	61	/i6 & /i7 +
	62	i8 +
	63	/i9 +
	64	o22
	65	rf20.oe = OE
	66
	67	/rf21 := /i8 +
	68	/i2 & rf17 +
	69	i11 +
	70	/i10 +
	71	o15 +
	72	/i14 & /o22 +
	73	/i3 +
	74	/i5
	75	rf21.oe = OE
	76
	77	/o22 = i14 +
	78	/o15 +
	79	i3 & /rf21 +
	80	i7 +
	81	/i8 & rf21 +
	82	i10 +
	83	/i9
	84	o22.oe = i14 & /o15
		No newline at end of file

trunk/src/regtests/jedutil/eqns/pal16l8/pal16l8.eqn

r0	r18404
	1	md
	2	chip 2000 PAL16L8
	3
	4	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
	5	i11=11 o12=12 o13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 VCC=20
	6
	7	equations
	8
	9	/o12 = i3 & i7 & /i9 +
	10	i1 & o13 +
	11	i3 +
	12	/i6 +
	13	i8 +
	14	/i9 +
	15	i7 & /o13
	16	o12.oe = vcc
	17
	18	/o13 = i11 & /o14 +
	19	/i9 +
	20	i8 +
	21	/i7 +
	22	/i6 & o14 +
	23	i5 +
	24	i4
	25	o13.oe = i2 & o14
	26
	27	/o14 = i1 & /o15 +
	28	/i8 +
	29	i1 & /i8 +
	30	i1 & /i2 & /o15 +
	31	/i2 +
	32	i2 & /i8 & o15 +
	33	i3
	34	o14.oe = vcc
	35
	36	/o15 = i3 & i6 & i7 & /i11 +
	37	i6 & o16 +
	38	i3 & /o16 +
	39	i7 +
	40	/i11 +
	41	i6 & i7 +
	42	i7 & /i11
	43	o15.oe = vcc
	44
	45	/o16 = /i3 & /o17 +
	46	/i4 & /i11 +
	47	/i4 & /i3 +
	48	/i3 & i4 +
	49	/i7 & o17 +
	50	/i7 & /i11 +
	51	i4
	52	o16.oe = vcc
	53
	54	/o17 = i2 & i5 & i6 & /i7 +
	55	i2 & /o18 +
	56	i5 +
	57	i6 +
	58	/i7 & o18 +
	59	i2 & /i7 +
	60	i5 & i6
	61	o17.oe = /o16
	62
	63	/o18 = /i2 & i5 & i6 & /i7 +
	64	i3 & i6 & i7 & i11 +
	65	i3 +
	66	/i2 & /i7 +
	67	i3 & i11 +
	68	i5 & i6 & /i7 +
	69	i7 & i11
	70	o18.oe = vcc
	71
	72	/o19 = i5 & i6 & /i7 & i11 +
	73	i3 & i6 & i7 +
	74	i5 +
	75	i6 +
	76	i7 +
	77	i11 +
	78	/i7
	79	o19.oe = vcc

trunk/src/regtests/jedutil/eqns/pal20r8/pal20r8.eqn

r0	r18404
	1	chip pal20r8 PAL20R8
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	/OE=13 i14=14 rf15=15 rf16=16 rf17=17 rf18=18 rf19=19 rf20=20 rf21=21 rf22=22 i23=23 VCC=24
	5
	6	equations
	7
	8	/rf15 := i2 & i6 & i7 +
	9	i6 & rf16 +
	10	i3 & /rf16 +
	11	i7 +
	12	/i4 +
	13	i6 & i7 +
	14	i4 & i7 +
	15	/i23
	16	rf15.oe = OE
	17
	18	/rf16 := /i3 & /rf17 +
	19	/i4 +
	20	/i3 +
	21	/i3 & i4 +
	22	/i7 & rf17 +
	23	/i7 +
	24	i4 +
	25	i23
	26	rf16.oe = OE
	27
	28	/rf17 := /i2 +
	29	/rf18 +
	30	i5 +
	31	i6 +
	32	rf18 +
	33	i4 +
	34	/i10 +
	35	/i23
	36	rf17.oe = OE
	37
	38	/rf18 := /i2 & i5 & i6 & /i7 +
	39	i3 & i6 & i7 +
	40	i3 & rf19 +
	41	/i2 & /i7 +
	42	/i3 & /rf19 +
	43	i5 & i6 & /i7 +
	44	i7 +
	45	/i11
	46	rf18.oe = OE
	47
	48	/rf19 := i5 & i6 & /i7 +
	49	i3 & i6 & i7 +
	50	i5 & rf20 +
	51	i6 +
	52	i7 +
	53	/i4 & /rf20 +
	54	/i7 +
	55	i10
	56	rf19.oe = OE
	57
	58	/rf20 := i10 & rf17 +
	59	/i11 +
	60	i4 & /rf17 +
	61	i2 +
	62	/i6 & /i7 +
	63	i8 +
	64	/i9 +
	65	rf22
	66	rf20.oe = OE
	67
	68	/rf21 := /i8 +
	69	/i2 & rf17 +
	70	i11 +
	71	/i10 +
	72	rf15 +
	73	/i14 +
	74	/i3 +
	75	i8 & i9 & /rf22
	76	rf21.oe = OE
	77
	78	/rf22 := i14 +
	79	/rf15 +
	80	i3 & /rf21 +
	81	i7 +
	82	/i8 & rf21 +
	83	i10 +
	84	/i9 +
	85	i14 & /rf15
	86	rf22.oe = OE
		No newline at end of file

trunk/src/regtests/jedutil/eqns/pal16r4/pal16r4.eqn

r0	r18404
	1	chip pal16r4 PAL16R4
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
	4	/OE=11 o12=12 o13=13 rf14=14 rf15=15 rf16=16 rf17=17 o18=18 o19=19 VCC=20
	5
	6	equations
	7
	8	/o12 = /i2 & /i3 +
	9	i4 & o13 +
	10	i3 +
	11	/i6 +
	12	i8 +
	13	/i9 +
	14	i7 & /o13
	15	o12.oe = rf14
	16
	17	/o13 = /rf14 +
	18	/i9 +
	19	i8 +
	20	/i7 +
	21	/i6 & /rf14 +
	22	i5 +
	23	i4
	24	o13.oe = i2 & rf14
	25
	26	/rf14 := /rf15 +
	27	/i8 +
	28	i8 +
	29	/i2 & /rf15 +
	30	/i2 +
	31	i2 & /i8 & rf15 +
	32	/i4 +
	33	i3
	34	rf14.oe = OE
	35
	36	/rf15 := i3 & i6 & i7 +
	37	i6 & rf16 +
	38	i3 & /rf16 +
	39	i7 +
	40	/i4 +
	41	i6 & i7 +
	42	i4 & i7 +
	43	/i2 & /i7
	44	rf15.oe = OE
	45
	46	/rf16 := /i3 & /rf17 +
	47	/i4 +
	48	/i3 & /i3 +
	49	/i3 & i4 +
	50	/i7 & rf17 +
	51	/i7 +
	52	i4 +
	53	i2 & i3
	54	rf16.oe = OE
	55
	56	/rf17 := i2 & i5 & i6 & /i7 +
	57	i2 & /o18 +
	58	i5 +
	59	i6 +
	60	/i7 & o18 +
	61	i2 & /i7 +
	62	i5 & i6 +
	63	/i3
	64	rf17.oe = OE
	65
	66	/o18 = /i2 & i5 & i6 & /i7 +
	67	i3 & i6 & i7 +
	68	i3 +
	69	/i2 & /i7 +
	70	/i3 +
	71	i5 & i6 & /i7 +
	72	i7
	73	o18.oe = vcc
	74
	75	/o19 = i5 & i6 & /i7 +
	76	i3 & i6 & i7 +
	77	i5 +
	78	i6 +
	79	i7 +
	80	/i4 +
	81	/i7
	82	o19.oe = vcc

trunk/src/regtests/jedutil/eqns/pal16r6/pal16r6.eqn

r0	r18404
	1	chip pal16r6 PAL16R6
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
	4	/OE=11 o12=12 rf13=13 rf14=14 rf15=15 rf16=16 rf17=17 rf18=18 o19=19 VCC=20
	5
	6	equations
	7
	8	/o12 = /i2 & /i3 +
	9	i4 & rf13 +
	10	i3 +
	11	/i6 +
	12	i8 +
	13	/i9 +
	14	i7 & /rf13
	15	o12.oe = rf14
	16
	17	/rf13 := /rf14 +
	18	/i9 +
	19	i8 +
	20	/i7 +
	21	/i6 & /rf14 +
	22	i5 & rf14 +
	23	i4 +
	24	/i2
	25	rf13.oe = OE
	26
	27	/rf14 := /rf15 +
	28	/i8 +
	29	i8 +
	30	/i2 & /rf15 +
	31	/i2 +
	32	i2 & /i8 & rf15 +
	33	/i4 +
	34	i3
	35	rf14.oe = OE
	36
	37	/rf15 := i3 & i6 & i7 +
	38	i6 & rf16 +
	39	i3 & /rf16 +
	40	i7 +
	41	/i4 +
	42	i6 & i7 +
	43	i4 & i7 +
	44	/i2 & /i7
	45	rf15.oe = OE
	46
	47	/rf16 := /i3 & /rf17 +
	48	/i4 +
	49	/i3 +
	50	/i3 & i4 +
	51	/i7 & rf17 +
	52	/i7 +
	53	i4 +
	54	i2 & i3
	55	rf16.oe = OE
	56
	57	/rf17 := i2 & i5 & i6 & /i7 +
	58	i2 & /rf18 +
	59	i5 +
	60	i6 +
	61	/i7 & rf18 +
	62	i2 & /i7 +
	63	i5 & i6 +
	64	/i3
	65	rf17.oe = OE
	66
	67	/rf18 := /i2 & i5 & i6 & /i7 +
	68	i3 & i6 & i7 +
	69	i3 +
	70	/i2 & /i7 +
	71	/i3 +
	72	i5 & i6 & /i7 +
	73	i7 +
	74	i4
	75	rf18.oe = OE
	76
	77	/o19 = i5 & i6 & /i7 +
	78	i3 & i6 & i7 +
	79	i5 +
	80	i6 +
	81	i7 +
	82	/i4 +
	83	/i7
	84	o19.oe = vcc

trunk/src/regtests/jedutil/eqns/pal20l10/pal20l10.eqn

r0	r18404
	1	chip 2000 PAL20L10
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 i10=10 i11=11 GND=12
	4	i13=13 o14=14 o15=15 o16=16 o17=17 o18=18 o19=19 o20=20 o21=21 o22=22 o23=23 VCC=24
	5
	6	equations
	7
	8	/o14 = /i11 +
	9	i10 +
	10	i9 & /o15
	11	o14.oe = o15
	12
	13	/o15 = /i1 & i2 & /i3 & i4 & i11 +
	14	/i1 & i2 & /i3 & /i5 & /i13 & o16 +
	15	/i1 & i2 & /i3 & i6
	16	o15.oe = /o16
	17
	18	/o16 = i1 & /i2 & /o17 +
	19	i3 & /i4 +
	20	i3 & i9 & o17
	21	o16.oe = vcc
	22
	23	/o17 = /o18 +
	24	i10 & o18 +
	25	i9
	26	o17.oe = i4 & i5
	27
	28	/o18 = i1 & /i2 & i3 & /i4 & /i8 +
	29	/i6 & i7 & i8 & i9 & i10 & /o19 +
	30	i1 & i2 & i3 & /i4 & /i5 & o19
	31	o18.oe = i1 & i10
	32
	33	/o19 = i11 & o20 +
	34	i2 & /i10 +
	35	i9 & i11
	36	o19.oe = i8 & /o20
	37
	38	/o20 = o21 +
	39	/i6 +
	40	/i7 & /o21
	41	o20.oe = vcc
	42
	43	/o21 = i1 & i8 +
	44	/i4 & /o22 +
	45	o22
	46	o21.oe = i5 & i6
	47
	48	/o22 = i1 & /i8 +
	49	/i8 +
	50	i1
	51	o22.oe = i3 & /i7
	52
	53	/o23 = i7 +
	54	i11 +
	55	/i13
	56	o23.oe = vcc

trunk/src/regtests/jedutil/eqns/pal16r8/pal16r8.eqn

r0	r18404
	1	chip pal16r8 PAL16R8
	2
	3	CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10
	4	/OE=11 rf12=12 rf13=13 rf14=14 rf15=15 rf16=16 rf17=17 rf18=18 rf19=19 VCC=20
	5
	6	equations
	7
	8	/rf12 := /i2 & /i3 +
	9	i4 & rf13 +
	10	i3 +
	11	/i6 +
	12	i8 +
	13	/i9 +
	14	i7 & /rf13 +
	15	i5
	16	rf12.oe = OE
	17
	18	/rf13 := /rf14 +
	19	/i9 +
	20	i8 +
	21	/i7 +
	22	/i6 & rf14 +
	23	i5 +
	24	i4 +
	25	/i3
	26	rf13.oe = OE
	27
	28	/rf14 := /rf15 +
	29	/i8 +
	30	i8 +
	31	/i2 & /rf15 +
	32	/i2 +
	33	i2 & /i8 & rf15 +
	34	/i4 +
	35	i3
	36	rf14.oe = OE
	37
	38	/rf15 := i3 & i6 & i7 +
	39	i6 & rf16 +
	40	i3 & /rf16 +
	41	i7 +
	42	/i4 +
	43	i6 & i7 +
	44	i4 & i7 +
	45	/i2 & /i7
	46	rf15.oe = OE
	47
	48	/rf16 := /i3 & /rf17 +
	49	/i4 +
	50	/i3 +
	51	/i3 & i4 +
	52	/i7 & rf17 +
	53	/i7 +
	54	i4 +
	55	i2 & i3
	56	rf16.oe = OE
	57
	58	/rf17 := i2 & i5 & i6 & /i7 +
	59	i2 & /rf18 +
	60	i5 +
	61	i6 +
	62	/i7 & rf18 +
	63	i2 & /i7 +
	64	i5 & i6 +
	65	/i3
	66	rf17.oe = OE
	67
	68	/rf18 := /i2 & i5 & i6 & /i7 +
	69	i3 & i6 & i7 +
	70	i3 & rf19 +
	71	/i2 & /i7 +
	72	/i3 & /rf19 +
	73	i5 & i6 & /i7 +
	74	i7 +
	75	/i4
	76	rf18.oe = OE
	77
	78	/rf19 := i5 & i6 & /i7 +
	79	i3 & i6 & i7 +
	80	i5 & rf12 +
	81	i6 +
	82	i7 +
	83	/i4 & /rf12 +
	84	/i7 +
	85	i2
	86	rf19.oe = OE

trunk/src/regtests/jedutil/eqns/pal16c1/pal16c1.eqn

r0	r18404
	1	chip 2000 PAL16C1
	2
	3	i1=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 i11=11
	4	i12=12 i13=13 i14=14 o15=15 o16=16 i17=17 i18=18 i19=19 VCC=20
	5
	6	equations
	7
	8	/o15 = i1 & i2 +
	9	i3 & i4 +
	10	i5 & i6 +
	11	i7 & i8 +
	12	i9 & i11 +
	13	i12 & i13 +
	14	i14 & i17 +
	15	i18 & i19 +
	16	/i1 & /i2 +
	17	/i3 & /i4 +
	18	/i5 & /i6 +
	19	/i7 & /i8 +
	20	/i9 & /i11 +
	21	/i12 & /i13 +
	22	/i14 & /i17 +
	23	/i18 & /i19

trunk/src/regtests/jedutil/jedtest.wsf

r18403	r18404
1	1	<?xml version="1.0"?>
2	2	<package>
3		<job id="Test"><?job debug="true" error="true"?>
	3	<job id="JEDTest"><?job debug="true" error="true"?>
4	4	<runtime>
5	5	<description>This script runs regresion tests on the jedutil tool.</description>
	6
	7	<named name="verbose" type="boolean" helpstring="Generate a detailed log." required="false"/>
6	8	</runtime>
7	9
8	10	<script language="JScript">
9	11	<![CDATA[
10	12	var g_Verbose = false;
11	13
12		function diffFiles(file1, file2)
	14	function runAndCaptureOutput(command, outputFile)
13	15	{
	16	var fso = new ActiveXObject("Scripting.FileSystemObject");
14	17	var WshShell = WScript.CreateObject("WScript.Shell");
15		var oExec;
	18	var file, oExec;
16	19
17	20	if (g_Verbose)
18	21	{
19		WScript.Echo("Diff File 1: " + file1);
20		WScript.Echo("Diff File 2: " + file2);
	22	WScript.Echo("Command:     " + command);
	23	WScript.Echo("Output File: " + outputFile);
21	24	WScript.Echo();
22	25	}
23	26
24		oExec = WshShell.Exec("diff " + file1 + " " + file2);
	27	file = fso.CreateTextFile(outputFile, false, false);
	28
	29	oExec = WshShell.Exec(command);
	30
	31	if (!oExec.StdOut.AtEndOfStream)
	32	{
	33	file.Write(oExec.StdOut.ReadAll());
	34	}
25	35
	36	if (!oExec.StdErr.AtEndOfStream)
	37	{
	38	file.Write(oExec.StdErr.ReadAll());
	39	}
	40
	41	file.Close();
	42
26	43	while (!oExec.Status)
27	44	{
28	45	WScript.Sleep(100);
29	46	}
30	47
31		if (g_Verbose)
32		{
33		WScript.StdOut.WriteLine(oExec.StdOut.ReadAll());
34		WScript.StdErr.WriteLine(oExec.StdErr.ReadAll());
35		}
36
37	48	return oExec.ExitCode;
38	49	}
39	50
40		function runCommandAndCaptureOutput(command, outputFile)
	51	function diffFiles(file1, file2, outputFile)
41	52	{
42		var WshShell = WScript.CreateObject("WScript.Shell");
43		var fullCommand;
	53	var fso = new ActiveXObject("Scripting.FileSystemObject");
	54	var command;
44	55
45		fullCommand = "%comspec% /c ";
46		fullCommand += command;
47		fullCommand += " > ";
48		fullCommand += outputFile;
49		fullCommand += " 2>&1";
50
51	56	if (g_Verbose)
52		{
53		WScript.Echo("Running the command : " + command);
54		WScript.Echo("Output File:          " + outputFile);
	57	{
	58	WScript.Echo("Diff File 1: " + file1);
	59	WScript.Echo("Diff File 2: " + file2);
	60	WScript.Echo("Output File: " + outputFile);
55	61	WScript.Echo();
56	62	}
57	63
58		WshShell.Run(fullCommand, 0, true);
	64	if (!fso.FileExists(file1))
	65	{
	66	if (g_Verbose)
	67	{
	68	WScript.Echo("Diff File 1 does not exist.");
	69	WScript.Echo();
	70	}
	71
	72	return 1;
	73	}
	74
	75	if (!fso.FileExists(file2))
	76	{
	77	if (g_Verbose)
	78	{
	79	WScript.Echo("Diff File 2 does not exist.");
	80	WScript.Echo();
	81	}
	82
	83	return 1;
	84	}
	85
	86	command = "diff \"" + file1 + "\" \"" + file2 + "\"";
	87
	88	return runAndCaptureOutput(command, outputFile);
59	89	}
60	90
	91	function getFilesInFolder(folder)
	92	{
	93	var fso = new ActiveXObject("Scripting.FileSystemObject");
	94	var filesCollection = new Enumerator(folder.files);
	95	var filesArray = new Array();
	96
	97	while (!filesCollection.atEnd())
	98	{
	99	++filesArray.length;
	100
	101	filesArray[filesArray.length - 1] = new Object();
	102
	103	filesArray[filesArray.length - 1].name = fso.GetBaseName(filesCollection.item().name);
	104
	105	filesCollection.moveNext();
	106	}
	107
	108	return filesArray;
	109	}
	110
61	111	function findJedTests(jedsPath, baselinePath, outputPath)
62	112	{
63	113	var fso = new ActiveXObject("Scripting.FileSystemObject");
64	114	var folder = fso.GetFolder(jedsPath)
65		var folderCollection = new Enumerator(folder.files);
	115	var folderCollection = new Enumerator(folder.Subfolders);
66	116	var jedArray = new Array();
67
	117	var filesArray, file;
	118
68	119	while (!folderCollection.atEnd())
69	120	{
70	121	++jedArray.length;
71	122
72	123	jedArray[jedArray.length - 1] = new Object;
	124
	125	jedArray[jedArray.length - 1].type = folderCollection.item().name;
	126	jedArray[jedArray.length - 1].files = new Array;
	127
	128	filesArray = getFilesInFolder(
	129	fso.GetFolder(
	130	fso.BuildPath(jedsPath,
	131	folderCollection.item().name)));
	132
	133	jedArray[jedArray.length - 1].files.length = filesArray.length;
	134
	135	for (index = 0; index < filesArray.length; ++index)
	136	{
	137	file = new Object;
	138
	139	file.jedFile = fso.BuildPath(jedsPath,
	140	folderCollection.item().name);
	141	file.jedFile = fso.BuildPath(file.jedFile,
	142	filesArray[index].name);
	143	file.jedFile = file.jedFile + ".jed";
	144
	145	file.baselineFile = fso.BuildPath(baselinePath,
	146	folderCollection.item().name);
	147	file.baselineFile = fso.BuildPath(file.baselineFile,
	148	filesArray[index].name);
	149	file.baselineFile = file.baselineFile + ".txt";
	150
	151	file.outputFile = fso.BuildPath(outputPath,
	152	folderCollection.item().name);
	153	file.outputFile = fso.BuildPath(file.outputFile,
	154	filesArray[index].name);
	155	file.outputFile = file.outputFile + ".txt";
	156
	157	file.diffFile = fso.BuildPath(outputPath,
	158	folderCollection.item().name);
	159	file.diffFile = fso.BuildPath(file.diffFile,
	160	filesArray[index].name);
	161	file.diffFile = file.diffFile + ".diff";
	162
	163	jedArray[jedArray.length - 1].files[index] = file;
	164	}
73	165
74		jedArray[jedArray.length - 1].name = fso.GetBaseName(folderCollection.item().name);
75		jedArray[jedArray.length - 1].jedfile = folderCollection.item().path;
76		jedArray[jedArray.length - 1].baselineFile = baselinePath + "\\" +
77		jedArray[jedArray.length - 1].name +
78		".txt";
79		jedArray[jedArray.length - 1].outputFile = outputPath + "\\" +
80		jedArray[jedArray.length - 1].name +
81		".txt";
82
83	166	folderCollection.moveNext();
84	167	}
85
	168
86	169	return jedArray;
87	170	}
	171
	172	function createJedOutputFolders(outputPath, jedArray)
	173	{
	174	var fso = new ActiveXObject("Scripting.FileSystemObject");
	175
	176	for (index = 0; index < jedArray.length; ++index)
	177	{
	178	fso.CreateFolder(fso.BuildPath(outputPath,
	179	jedArray[index].type));
	180	}
	181	}
88	182
89	183	function runViewJedTests(jedArray, jedUtilApp)
90	184	{
91		var command;
	185	var files, file, command;
92	186
93		for (i = 0; i < jedArray.length; ++i)
	187	for (testIndex = 0; testIndex < jedArray.length; ++testIndex)
94	188	{
95		command = jedUtilApp + " -view " + jedArray[i].jedfile + " " +
96		jedArray[i].name;
97
98	189	if (g_Verbose)
99	190	{
100		WScript.Echo("Viewing the JED file: " + jedArray[i].jedfile);
	191	WScript.Echo("Running the view command on the type \"" +
	192	jedArray[testIndex].type + "\"");
101	193	WScript.Echo();
102	194	}
103
104		runCommandAndCaptureOutput(command, jedArray[i].outputFile);
	195
	196	files = jedArray[testIndex].files;
	197
	198	for (fileIndex = 0; fileIndex < files.length; ++fileIndex)
	199	{
	200	file = files[fileIndex];
	201
	202	if (g_Verbose)
	203	{
	204	WScript.Echo("    JED File:      " + file.jedFile);
	205	WScript.Echo("    Baseline File: " + file.baselineFile);
	206	WScript.Echo("    Output File:   " + file.outputFile);
	207	WScript.Echo("    Diff File:     " + file.diffFile);
	208	WScript.Echo();
	209	}
	210
	211	command = jedUtilApp + " -view \"" + file.jedFile + "\" " +
	212	jedArray[testIndex].type;
	213
	214	runAndCaptureOutput(command, file.outputFile);
	215	}
105	216	}
106	217	}
107	218
108	219	function runDiffJedTests(jedArray)
109	220	{
110	221	var result = true;
	222	var files, file;
111	223
112		for (i = 0; i < jedArray.length; ++i)
	224	for (testIndex = 0; testIndex < jedArray.length; ++testIndex)
113	225	{
114	226	if (g_Verbose)
115	227	{
116		WScript.Echo("Diffing the output from viewing the JED file: " + jedArray[i].jedfile);
	228	WScript.Echo("Running the diffs on the type \"" +
	229	jedArray[testIndex].type + "\"");
	230	WScript.Echo();
117	231	}
	232
	233	files = jedArray[testIndex].files;
118	234
119		if (diffFiles(jedArray[i].baselineFile, jedArray[i].outputFile))
	235	for (fileIndex = 0; fileIndex < files.length; ++fileIndex)
120	236	{
121		WScript.Echo("Results are different for " + jedArray[i].name);
122		WScript.Echo();
	237	file = files[fileIndex];
123	238
124		result = false;
	239	if (diffFiles(file.baselineFile, file.outputFile, file.diffFile))
	240	{
	241	WScript.Echo("Results are different for " + file.jedFile);
	242	WScript.Echo();
	243
	244	result = false;
	245	}
125	246	}
126	247	}
127	248
r18403	r18404
139	260	var jedUtilApp = WshShell.CurrentDirectory + "\\..\\..\\..\\jedutil.exe";
140	261	var jedArray = new Array();
141	262
	263	if (WScript.Arguments.Count() > 0)
	264	{
	265	g_Verbose = true;
	266	}
	267
142	268	if (g_Verbose)
143	269	{
144	270	WScript.Echo("JED Path:      " + jedsPath);
r18403	r18404
152	278	{
153	279	if (g_Verbose)
154	280	{
155		WScript.Echo("Emptying the output directory");
	281	WScript.Echo("Removing the existing the output directory");
156	282	WScript.Echo();
157	283	}
158	284
159		fso.DeleteFile(outputPath + "\\*.*");
	285	fso.DeleteFolder(outputPath);
160	286	}
161		else
	287
	288	if (g_Verbose)
162	289	{
163		if (g_Verbose)
164		{
165		WScript.Echo("Creating the output directory");
166		WScript.Echo();
167		}
168
169		fso.CreateFolder(outputPath);
	290	WScript.Echo("Creating the root output directory");
	291	WScript.Echo();
170	292	}
171	293
	294	fso.CreateFolder(outputPath);
	295
172	296	jedArray = findJedTests(jedsPath, baselinePath, outputPath);
173	297
	298	createJedOutputFolders(outputPath, jedArray);
	299
174	300	runViewJedTests(jedArray, jedUtilApp);
175
	301
176	302	if (!runDiffJedTests(jedArray))
177	303	{
178	304	result = 1;

trunk/src/tools/jedutil.c

r18403	r18404
106	106
107	107
108	108	/***************************************************************************
	109	CONSTANTS
	110	***************************************************************************/
	111
	112	#define ARRAY_LEN(_array) (sizeof(_array) / sizeof(_array[0]))
	113
	114	#define NO_OUTPUT_ENABLE_FUSE_ROW 0xFFFF
	115
	116	/* Output pin flags */
	117	#define OUTPUT_ACTIVELOW     0x00000001
	118	#define OUTPUT_ACTIVEHIGH    0x00000002
	119	#define OUTPUT_COMBINATORIAL 0x00000004
	120	#define OUTPUT_REGISTERED    0x00000008
	121
	122	/* Fuse state flag */
	123	#define LOW_FUSE_BLOWN     0x00000001
	124	#define HIGH_FUSE_BLOWN    0x00000002
	125	#define LOWHIGH_FUSE_BLOWN 0x00000004
	126	#define NO_FUSE_BLOWN      0x00000008
	127
	128	/***************************************************************************
109	129	TYPE DEFINITIONS
110	130	***************************************************************************/
111	131
112	132	typedef int (*command_func_type)(int argc, char *argv[]);
113	133
114		struct command_entry
	134	typedef struct _command_entry command_entry;
	135	struct _command_entry
115	136	{
116	137	const char *command;
117	138	command_func_type command_func;
r18403	r18404
120	141
121	142
122	143	/* Pin fuse row configuration */
123		#define CNoOutputEnableFuseRow (UINT16)~0
124
125
126
127		/* Pin fuse row configuration */
128		struct pin_fuse_rows
	144	typedef struct _pin_fuse_rows pin_fuse_rows;
	145	struct _pin_fuse_rows
129	146	{
130		UINT16 pin;                  /* Pin number */
	147	UINT16 pin;                 /* Pin number */
131	148	UINT16 fuserowoutputenable; /* Fuse row for the output enable */
132	149	UINT16 fuserowtermstart;    /* Fuse row for the first term */
133	150	UINT16 fuserowtermend;      /* Fuse row for the last term */
r18403	r18404
136	153
137	154
138	155	/* Pin fuse column configuration */
139		struct pin_fuse_columns
	156	typedef struct _pin_fuse_columns pin_fuse_columns;
	157	struct _pin_fuse_columns
140	158	{
141		UINT16 pin;            /* Pin number */
	159	UINT16 pin;            /* Pin number */
142	160	UINT16 lowfusecolumn;  /* Column number for low output */
143	161	UINT16 highfusecolumn; /* Column number for high output */
144	162	};
145	163
146	164
147		struct pal_data;
	165	typedef struct _pal_data pal_data;
148	166
149	167	typedef void (*print_product_terms_func)(const pal_data* pal, const jed_data* jed);
	168	typedef void (*config_pins_func)(const pal_data* pal, const jed_data* jed);
	169	typedef int (*is_product_term_enabled_func)(const pal_data* pal, const jed_data* jed, UINT16 fuserow);
150	170
151		struct pal_data
	171	struct _pal_data
152	172	{
153	173	const char *name;
154	174	const pin_fuse_rows *pinfuserows;
r18403	r18404
156	176	const pin_fuse_columns *pinfusecolumns;
157	177	UINT16 pinfusecolumnscount;
158	178	print_product_terms_func print_product_terms;
	179	config_pins_func config_pins;
	180	is_product_term_enabled_func is_product_term_enabled;
159	181	};
160	182
161	183
162	184
	185	/* Pin output configuration */
	186	typedef struct _pin_output_config pin_output_config;
	187	struct _pin_output_config
	188	{
	189	UINT16 pin;
	190	UINT16 flags;
	191	};
	192
	193
163	194	/***************************************************************************
164	195	FUNCTION PROTOTYPES
165	196	***************************************************************************/
r18403	r18404
177	208	static void print_pal16r4_product_terms(const pal_data* pal, const jed_data* jed);
178	209	static void print_pal16r6_product_terms(const pal_data* pal, const jed_data* jed);
179	210	static void print_pal16r8_product_terms(const pal_data* pal, const jed_data* jed);
180		static void print_gal18v10_product_terms(const pal_data* pal, const jed_data* jed);
	211	static void print_gal16v8_product_terms(const pal_data* pal, const jed_data* jed);
	212	/*static void print_gal18v10_product_terms(const pal_data* pal, const jed_data* jed);*/
181	213	static void print_pal20l8_product_terms(const pal_data* pal, const jed_data* jed);
182	214	static void print_pal20l10_product_terms(const pal_data* pal, const jed_data* jed);
183	215	static void print_pal20r4_product_terms(const pal_data* pal, const jed_data* jed);
r18403	r18404
186	218
187	219
188	220
	221	static void config_pal10l8_pins(const pal_data* pal, const jed_data* jed);
	222	static void config_pal10h8_pins(const pal_data* pal, const jed_data* jed);
	223	static void config_pal12l6_pins(const pal_data* pal, const jed_data* jed);
	224	static void config_pal12h6_pins(const pal_data* pal, const jed_data* jed);
	225	static void config_pal14l4_pins(const pal_data* pal, const jed_data* jed);
	226	static void config_pal14h4_pins(const pal_data* pal, const jed_data* jed);
	227	static void config_pal16l2_pins(const pal_data* pal, const jed_data* jed);
	228	static void config_pal16h2_pins(const pal_data* pal, const jed_data* jed);
	229	static void config_pal16c1_pins(const pal_data* pal, const jed_data* jed);
	230	static void config_pal16l8_pins(const pal_data* pal, const jed_data* jed);
	231	static void config_pal16r4_pins(const pal_data* pal, const jed_data* jed);
	232	static void config_pal16r6_pins(const pal_data* pal, const jed_data* jed);
	233	static void config_pal16r8_pins(const pal_data* pal, const jed_data* jed);
	234	static void config_gal16v8_pins(const pal_data* pal, const jed_data* jed);
	235	/*static void config_gal18v10_pins(const pal_data* pal, const jed_data* jed);*/
	236	static void config_pal20l8_pins(const pal_data* pal, const jed_data* jed);
	237	static void config_pal20l10_pins(const pal_data* pal, const jed_data* jed);
	238	static void config_pal20r4_pins(const pal_data* pal, const jed_data* jed);
	239	static void config_pal20r6_pins(const pal_data* pal, const jed_data* jed);
	240	static void config_pal20r8_pins(const pal_data* pal, const jed_data* jed);
	241
	242
	243
	244	static int is_gal16v8_product_term_enabled(const pal_data* pal, const jed_data* jed, UINT16 fuserow);
	245
	246
	247
189	248	/***************************************************************************
190	249	GLOBAL VARIABLES
191	250	***************************************************************************/
r18403	r18404
199	258	static UINT16 inputpins[26];
200	259	static UINT16 inputpinscount;
201	260
202		static UINT16 outputpins[26];
	261	static pin_output_config outputpins[26];
203	262	static UINT16 outputpinscount;
204	263
205	264	static pin_fuse_rows pal10l8pinfuserows[] = {
206		{12, CNoOutputEnableFuseRow, 280, 300},
207		{13, CNoOutputEnableFuseRow, 240, 260},
208		{14, CNoOutputEnableFuseRow, 200, 220},
209		{15, CNoOutputEnableFuseRow, 160, 180},
210		{16, CNoOutputEnableFuseRow, 120, 140},
211		{17, CNoOutputEnableFuseRow, 80, 100},
212		{18, CNoOutputEnableFuseRow, 40, 60},
213		{19, CNoOutputEnableFuseRow, 0, 20}};
	265	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 300},
	266	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 260},
	267	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 200, 220},
	268	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 180},
	269	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 120, 140},
	270	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 100},
	271	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 40, 60},
	272	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 20}};
214	273
215	274	static pin_fuse_rows pal10h8pinfuserows[] = {
216		{12, CNoOutputEnableFuseRow, 280, 300},
217		{13, CNoOutputEnableFuseRow, 240, 260},
218		{14, CNoOutputEnableFuseRow, 200, 220},
219		{15, CNoOutputEnableFuseRow, 160, 180},
220		{16, CNoOutputEnableFuseRow, 120, 140},
221		{17, CNoOutputEnableFuseRow, 80, 100},
222		{18, CNoOutputEnableFuseRow, 40, 60},
223		{19, CNoOutputEnableFuseRow, 0, 20}};
	275	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 280, 300},
	276	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 260},
	277	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 200, 220},
	278	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 160, 180},
	279	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 120, 140},
	280	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 80, 100},
	281	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 40, 60},
	282	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 20}};
224	283
225	284	static pin_fuse_rows pal12l6pinfuserows[] = {
226		{13, CNoOutputEnableFuseRow, 288, 360},
227		{14, CNoOutputEnableFuseRow, 240, 264},
228		{15, CNoOutputEnableFuseRow, 192, 216},
229		{16, CNoOutputEnableFuseRow, 144, 168},
230		{17, CNoOutputEnableFuseRow, 96, 120},
231		{18, CNoOutputEnableFuseRow, 0, 72}};
	285	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 360},
	286	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
	287	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
	288	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
	289	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
	290	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 72}};
232	291
233	292	static pin_fuse_rows pal12h6pinfuserows[] = {
234		{13, CNoOutputEnableFuseRow, 288, 360},
235		{14, CNoOutputEnableFuseRow, 240, 264},
236		{15, CNoOutputEnableFuseRow, 192, 216},
237		{16, CNoOutputEnableFuseRow, 144, 168},
238		{17, CNoOutputEnableFuseRow, 96, 120},
239		{18, CNoOutputEnableFuseRow, 0, 72}};
	293	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 288, 360},
	294	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 240, 264},
	295	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 192, 216},
	296	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 144, 168},
	297	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 96, 120},
	298	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 72}};
240	299
241	300	static pin_fuse_rows pal14l4pinfuserows[] = {
242		{14, CNoOutputEnableFuseRow, 336, 420},
243		{15, CNoOutputEnableFuseRow, 224, 308},
244		{16, CNoOutputEnableFuseRow, 112, 196},
245		{17, CNoOutputEnableFuseRow, 0, 84}};
	301	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 420},
	302	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 308},
	303	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 196},
	304	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
246	305
247	306	static pin_fuse_rows pal14h4pinfuserows[] = {
248		{14, CNoOutputEnableFuseRow, 336, 420},
249		{15, CNoOutputEnableFuseRow, 224, 308},
250		{16, CNoOutputEnableFuseRow, 112, 196},
251		{17, CNoOutputEnableFuseRow, 0, 84}};
	307	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 336, 420},
	308	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 224, 308},
	309	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 112, 196},
	310	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 84}};
252	311
253	312	static pin_fuse_rows pal16l2pinfuserows[] = {
254		{15, CNoOutputEnableFuseRow, 256, 480},
255		{16, CNoOutputEnableFuseRow, 0, 224}};
	313	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
	314	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
256	315
257	316	static pin_fuse_rows pal16h2pinfuserows[] = {
258		{15, CNoOutputEnableFuseRow, 256, 480},
259		{16, CNoOutputEnableFuseRow, 0, 224}};
	317	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
	318	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
260	319
261	320	static pin_fuse_rows pal16c1pinfuserows[] = {
262		{15, CNoOutputEnableFuseRow, 256, 480},
263		{16, CNoOutputEnableFuseRow, 0, 224}};
	321	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 480},
	322	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 480}};
264	323
265	324	static pin_fuse_rows pal16l8pinfuserows[] = {
266	325	{12, 1792, 1824, 2016},
r18403	r18404
275	334	static pin_fuse_rows pal16r4pinfuserows[] = {
276	335	{12, 1792, 1824, 2016},
277	336	{13, 1536, 1568, 1760},
278		{14, CNoOutputEnableFuseRow, 1280, 1504}, /* Registered Output */
279		{15, CNoOutputEnableFuseRow, 1024, 1248}, /* Registered Output */
280		{16, CNoOutputEnableFuseRow, 768, 992},   /* Registered Output */
281		{17, CNoOutputEnableFuseRow, 512, 736},   /* Registered Output */
	337	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	338	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	339	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	340	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
282	341	{18, 256, 288, 480},
283	342	{19, 0, 32, 224}};
284	343
285	344	static pin_fuse_rows pal16r6pinfuserows[] = {
286	345	{12, 1792, 1824, 2016},
287		{13, CNoOutputEnableFuseRow, 1536, 1760}, /* Registered Output */
288		{14, CNoOutputEnableFuseRow, 1280, 1504}, /* Registered Output */
289		{15, CNoOutputEnableFuseRow, 1024, 1248}, /* Registered Output */
290		{16, CNoOutputEnableFuseRow, 768, 992},   /* Registered Output */
291		{17, CNoOutputEnableFuseRow, 512, 736},   /* Registered Output */
292		{18, CNoOutputEnableFuseRow, 256, 480},   /* Registered Output */
	346	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
	347	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	348	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	349	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	350	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
	351	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},   /* Registered Output */
293	352	{19, 0, 32, 224}};
294	353
295	354	static pin_fuse_rows pal16r8pinfuserows[] = {
296		{12, CNoOutputEnableFuseRow, 1792, 2016}, /* Registered Output */
297		{13, CNoOutputEnableFuseRow, 1536, 1760}, /* Registered Output */
298		{14, CNoOutputEnableFuseRow, 1280, 1504}, /* Registered Output */
299		{15, CNoOutputEnableFuseRow, 1024, 1248}, /* Registered Output */
300		{16, CNoOutputEnableFuseRow, 768, 992},   /* Registered Output */
301		{17, CNoOutputEnableFuseRow, 512, 736},   /* Registered Output */
302		{18, CNoOutputEnableFuseRow, 256, 480},   /* Registered Output */
303		{19, CNoOutputEnableFuseRow, 0, 224}};    /* Registered Output */
	355	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016}, /* Registered Output */
	356	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760}, /* Registered Output */
	357	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504}, /* Registered Output */
	358	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248}, /* Registered Output */
	359	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},   /* Registered Output */
	360	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},   /* Registered Output */
	361	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},   /* Registered Output */
	362	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};    /* Registered Output */
304	363
305		static pin_fuse_rows gal18v10pinfuserows[] = {
	364	static pin_fuse_rows gal16v8pinfuserows[] = {
	365	{12, 0, 0, 0},
	366	{13, 0, 0, 0},
	367	{14, 0, 0, 0},
	368	{15, 0, 0, 0},
	369	{16, 0, 0, 0},
	370	{17, 0, 0, 0},
	371	{18, 0, 0, 0},
	372	{19, 0, 0, 0}};
	373
	374	/*static pin_fuse_rows gal18v10pinfuserows[] = {
306	375	{9,  3096, 3132, 3384},
307	376	{11, 2772, 2808, 3060},
308	377	{12, 2448, 2484, 2736},
r18403	r18404
312	381	{16, 1008, 1044, 1296},
313	382	{17, 684,  720,  972},
314	383	{18, 360,  396,  648},
315		{19, 36,   72,   324}};
	384	{19, 36,   72,   324}};*/
316	385
317	386	static pin_fuse_rows pal20l8pinfuserows[] = {
318	387	{15, 2240, 2280, 2520},
r18403	r18404
339	408	static pin_fuse_rows pal20r4pinfuserows[] = {
340	409	{15, 2240, 2280, 2520},
341	410	{16, 1920, 1960, 2200},
342		{17, 1600, 1640, 1840},
343		{18, 1280, 1320, 1560},
344		{19, 960, 1000, 1240},
345		{20, 640, 680, 920},
	411	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 1600, 1880}, /* Registered Output */
	412	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1560}, /* Registered Output */
	413	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 960, 1240},  /* Registered Output */
	414	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 640, 920},   /* Registered Output */
346	415	{21, 320, 360, 600},
347	416	{22, 0, 40, 280}};
348	417
349	418	static pin_fuse_rows pal20r6pinfuserows[] = {
350	419	{15, 2240, 2280, 2520},
351		{16, 1920, 1960, 2200},
352		{17, 1600, 1640, 1840},
353		{18, 1280, 1320, 1560},
354		{19, 960, 1000, 1240},
355		{20, 640, 680, 920},
356		{21, 320, 360, 600},
	420	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 1920, 2200}, /* Registered Output */
	421	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 1600, 1880}, /* Registered Output */
	422	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1560}, /* Registered Output */
	423	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 960, 1240},  /* Registered Output */
	424	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 640, 920},   /* Registered Output */
	425	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600},   /* Registered Output */
357	426	{22, 0, 40, 280}};
358	427
359	428	static pin_fuse_rows pal20r8pinfuserows[] = {
360		{15, 2240, 2280, 2520},
361		{16, 1920, 1960, 2200},
362		{17, 1600, 1640, 1840},
363		{18, 1280, 1320, 1560},
364		{19, 960, 1000, 1240},
365		{20, 640, 680, 920},
366		{21, 320, 360, 600},
367		{22, 0, 40, 280}};
	429	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 2240, 2520}, /* Registered Output */
	430	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 1920, 2200}, /* Registered Output */
	431	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 1600, 1880}, /* Registered Output */
	432	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1560}, /* Registered Output */
	433	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 960, 1240},  /* Registered Output */
	434	{20, NO_OUTPUT_ENABLE_FUSE_ROW, 640, 920},   /* Registered Output */
	435	{21, NO_OUTPUT_ENABLE_FUSE_ROW, 320, 600},   /* Registered Output */
	436	{22, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 280}};    /* Registered Output */
368	437
369	438	static pin_fuse_columns pal10l8pinfusecolumns[] = {
370	439	{1, 3, 2},
r18403	r18404
576	645	{18, 7, 6},   /* Registered Output */
577	646	{19, 3, 2}};  /* Registered Output */
578	647
579		static pin_fuse_columns gal18v10pinfusecolumns[] = {
	648	static pin_fuse_columns gal16v8pinfusecolumns[] = {
	649	{0, 0, 0},
	650	{0, 0, 0},
	651	{0, 0, 0},
	652	{0, 0, 0},
	653	{0, 0, 0},
	654	{0, 0, 0},
	655	{0, 0, 0},
	656	{0, 0, 0},
	657	{0, 0, 0},
	658	{0, 0, 0},
	659	{0, 0, 0},
	660	{0, 0, 0},
	661	{0, 0, 0},
	662	{0, 0, 0},
	663	{0, 0, 0},
	664	{0, 0, 0}};
	665
	666	/*static pin_fuse_columns gal18v10pinfusecolumns[] = {
580	667	{1,  1,  0},
581	668	{2,  5,  4},
582	669	{3,  9,  8},
r18403	r18404
594	681	{16, 15, 14},
595	682	{17, 11, 10},
596	683	{18, 7,  6},
597		{19, 3,  2}};
	684	{19, 3,  2}};*/
598	685
599	686	static pin_fuse_columns pal20l8pinfusecolumns[] = {
600	687	{1, 3, 2},
r18403	r18404
708	795
709	796	static pal_data paldata[] = {
710	797	{"PAL10L8",
711		pal10l8pinfuserows,
712		sizeof(pal10l8pinfuserows) / sizeof(pal10l8pinfuserows[0]),
713		pal10l8pinfusecolumns,
714		sizeof(pal10l8pinfusecolumns) / sizeof(pal10l8pinfusecolumns[0]),
715		print_pal10l8_product_terms},
	798	pal10l8pinfuserows, ARRAY_LEN(pal10l8pinfuserows),
	799	pal10l8pinfusecolumns, ARRAY_LEN(pal10l8pinfusecolumns),
	800	print_pal10l8_product_terms,
	801	config_pal10l8_pins,
	802	NULL},
716	803	{"PAL10H8",
717		pal10h8pinfuserows,
718		sizeof(pal10h8pinfuserows) / sizeof(pal10h8pinfuserows[0]),
719		pal10h8pinfusecolumns,
720		sizeof(pal10h8pinfusecolumns) / sizeof(pal10h8pinfusecolumns[0]),
721		print_pal10h8_product_terms},
	804	pal10h8pinfuserows, ARRAY_LEN(pal10h8pinfuserows),
	805	pal10h8pinfusecolumns, ARRAY_LEN(pal10h8pinfusecolumns),
	806	print_pal10h8_product_terms,
	807	config_pal10h8_pins,
	808	NULL},
722	809	{"PAL12H6",
723		pal12h6pinfuserows,
724		sizeof(pal12h6pinfuserows) / sizeof(pal12h6pinfuserows[0]),
725		pal12h6pinfusecolumns,
726		sizeof(pal12h6pinfusecolumns) / sizeof(pal12h6pinfusecolumns[0]),
727		print_pal12h6_product_terms},
	810	pal12h6pinfuserows, ARRAY_LEN(pal12h6pinfuserows),
	811	pal12h6pinfusecolumns, ARRAY_LEN(pal12h6pinfusecolumns),
	812	print_pal12h6_product_terms,
	813	config_pal12h6_pins,
	814	NULL},
728	815	{"PAL14H4",
729		pal14h4pinfuserows,
730		sizeof(pal14h4pinfuserows) / sizeof(pal14h4pinfuserows[0]),
731		pal14h4pinfusecolumns,
732		sizeof(pal14h4pinfusecolumns) / sizeof(pal14h4pinfusecolumns[0]),
733		print_pal14h4_product_terms},
	816	pal14h4pinfuserows, ARRAY_LEN(pal14h4pinfuserows),
	817	pal14h4pinfusecolumns, ARRAY_LEN(pal14h4pinfusecolumns),
	818	print_pal14h4_product_terms,
	819	config_pal14h4_pins,
	820	NULL},
734	821	{"PAL16H2",
735		pal16h2pinfuserows,
736		sizeof(pal16h2pinfuserows) / sizeof(pal16h2pinfuserows[0]),
737		pal16h2pinfusecolumns,
738		sizeof(pal16h2pinfusecolumns) / sizeof(pal16h2pinfusecolumns[0]),
739		print_pal16h2_product_terms},
	822	pal16h2pinfuserows, ARRAY_LEN(pal16h2pinfuserows),
	823	pal16h2pinfusecolumns, ARRAY_LEN(pal16h2pinfusecolumns),
	824	print_pal16h2_product_terms,
	825	config_pal16h2_pins,
	826	NULL},
740	827	{"PAL16C1",
741		pal16c1pinfuserows,
742		sizeof(pal16c1pinfuserows) / sizeof(pal16c1pinfuserows[0]),
743		pal16c1pinfusecolumns,
744		sizeof(pal16c1pinfusecolumns) / sizeof(pal16c1pinfusecolumns[0]),
745		print_pal16c1_product_terms},
	828	pal16c1pinfuserows, ARRAY_LEN(pal16c1pinfuserows),
	829	pal16c1pinfusecolumns, ARRAY_LEN(pal16c1pinfusecolumns),
	830	print_pal16c1_product_terms,
	831	config_pal16c1_pins,
	832	NULL},
746	833	{"PAL12L6",
747		pal12l6pinfuserows,
748		sizeof(pal12l6pinfuserows) / sizeof(pal12l6pinfuserows[0]),
749		pal12l6pinfusecolumns,
750		sizeof(pal12l6pinfusecolumns) / sizeof(pal12l6pinfusecolumns[0]),
751		print_pal12l6_product_terms},
	834	pal12l6pinfuserows, ARRAY_LEN(pal12l6pinfuserows),
	835	pal12l6pinfusecolumns, ARRAY_LEN(pal12l6pinfusecolumns),
	836	print_pal12l6_product_terms,
	837	config_pal12l6_pins,
	838	NULL},
752	839	{"PAL14L4",
753		pal14l4pinfuserows,
754		sizeof(pal14l4pinfuserows) / sizeof(pal14l4pinfuserows[0]),
755		pal14l4pinfusecolumns,
756		sizeof(pal14l4pinfusecolumns) / sizeof(pal14l4pinfusecolumns[0]),
757		print_pal14l4_product_terms},
	840	pal14l4pinfuserows, ARRAY_LEN(pal14l4pinfuserows),
	841	pal14l4pinfusecolumns, ARRAY_LEN(pal14l4pinfusecolumns),
	842	print_pal14l4_product_terms,
	843	config_pal14l4_pins,
	844	NULL},
758	845	{"PAL16L2",
759		pal16l2pinfuserows,
760		sizeof(pal16l2pinfuserows) / sizeof(pal16l2pinfuserows[0]),
761		pal16l2pinfusecolumns,
762		sizeof(pal16l2pinfusecolumns) / sizeof(pal16l2pinfusecolumns[0]),
763		print_pal16l2_product_terms},
764		{"15S8", NULL, 0, NULL, 0, NULL},
765		{"PLS153", NULL, 0, NULL, 0, NULL},
	846	pal16l2pinfuserows, ARRAY_LEN(pal16l2pinfuserows),
	847	pal16l2pinfusecolumns, ARRAY_LEN(pal16l2pinfusecolumns),
	848	print_pal16l2_product_terms,
	849	config_pal16l2_pins,
	850	NULL},
	851	/*{"15S8", NULL, 0, NULL, 0, NULL, NULL, NULL},
	852	{"PLS153", NULL, 0, NULL, 0, NULL, NULL, NULL},*/
766	853	{"PAL16L8",
767		pal16l8pinfuserows,
768		sizeof(pal16l8pinfuserows) / sizeof(pal16l8pinfuserows[0]),
769		pal16l8pinfusecolumns,
770		sizeof(pal16l8pinfusecolumns) / sizeof(pal16l8pinfusecolumns[0]),
771		print_pal16l8_product_terms},
	854	pal16l8pinfuserows, ARRAY_LEN(pal16l8pinfuserows),
	855	pal16l8pinfusecolumns, ARRAY_LEN(pal16l8pinfusecolumns),
	856	print_pal16l8_product_terms,
	857	config_pal16l8_pins,
	858	NULL},
772	859	{"PAL16R4",
773		pal16r4pinfuserows,
774		sizeof(pal16r4pinfuserows) / sizeof(pal16r4pinfuserows[0]),
775		pal16r4pinfusecolumns,
776		sizeof(pal16r4pinfusecolumns) / sizeof(pal16r4pinfusecolumns),
777		print_pal16r4_product_terms},
	860	pal16r4pinfuserows, ARRAY_LEN(pal16r4pinfuserows),
	861	pal16r4pinfusecolumns, ARRAY_LEN(pal16r4pinfusecolumns),
	862	print_pal16r4_product_terms,
	863	config_pal16r4_pins,
	864	NULL},
778	865	{"PAL16R6",
779		pal16r6pinfuserows,
780		sizeof(pal16r6pinfuserows) / sizeof(pal16r6pinfuserows[0]),
781		pal16r6pinfusecolumns,
782		sizeof(pal16r6pinfusecolumns) / sizeof(pal16r6pinfusecolumns),
783		print_pal16r6_product_terms},
	866	pal16r6pinfuserows, ARRAY_LEN(pal16r6pinfuserows),
	867	pal16r6pinfusecolumns, ARRAY_LEN(pal16r6pinfusecolumns),
	868	print_pal16r6_product_terms,
	869	config_pal16r6_pins,
	870	NULL},
784	871	{"PAL16R8",
785		pal16r8pinfuserows,
786		sizeof(pal16r8pinfuserows) / sizeof(pal16r8pinfuserows[0]),
787		pal16r8pinfusecolumns,
788		sizeof(pal16r8pinfusecolumns) / sizeof(pal16r8pinfusecolumns),
789		print_pal16r8_product_terms},
790		{"PAL16RA8", NULL, 0, NULL, 0, NULL},
791		{"PAL16V8R", NULL, 0, NULL, 0, NULL},
792		{"PALCE16V8", NULL, 0, NULL, 0, NULL},
793		{"GAL16V8A", NULL, 0, NULL, 0, NULL},
794		{"18CV8", NULL, 0, NULL, 0, NULL},
	872	pal16r8pinfuserows, ARRAY_LEN(pal16r8pinfuserows),
	873	pal16r8pinfusecolumns, ARRAY_LEN(pal16r8pinfusecolumns),
	874	print_pal16r8_product_terms,
	875	config_pal16r8_pins,
	876	NULL},
	877	/*{"PAL16RA8", NULL, 0, NULL, 0, NULL, NULL, NULL},
	878	{"PAL16V8R", NULL, 0, NULL, 0, NULL, NULL, NULL},
	879	{"PALCE16V8", NULL, 0, NULL, 0, NULL, NULL, NULL},*/
	880	{"GAL16V8",
	881	gal16v8pinfuserows, ARRAY_LEN(gal16v8pinfuserows),
	882	gal16v8pinfusecolumns, ARRAY_LEN(gal16v8pinfusecolumns),
	883	print_gal16v8_product_terms,
	884	config_gal16v8_pins,
	885	is_gal16v8_product_term_enabled},
	886	/*{"18CV8", NULL, 0, NULL, 0, NULL},
795	887	{"GAL18V10",
796		gal18v10pinfuserows,
797		sizeof(gal18v10pinfuserows) / sizeof(gal18v10pinfuserows[0]),
798		gal18v10pinfusecolumns,
799		sizeof(gal18v10pinfusecolumns) / sizeof(gal18v10pinfusecolumns),
800		print_gal18v10_product_terms},
	888	gal18v10pinfuserows, ARRAY_LEN(gal18v10pinfuserows),
	889	gal18v10pinfusecolumns, ARRAY_LEN(gal18v10pinfusecolumns),
	890	print_gal18v10_product_terms,
	891	config_gal18v10_pins,
	892	NULL},*/
801	893	{"PAL20L8",
802		pal20l8pinfuserows,
803		sizeof(pal20l8pinfuserows) / sizeof(pal20l8pinfuserows[0]),
804		pal20l8pinfusecolumns,
805		sizeof(pal20l8pinfusecolumns) / sizeof(pal20l8pinfusecolumns[0]),
806		print_pal20l8_product_terms},
	894	pal20l8pinfuserows, ARRAY_LEN(pal20l8pinfuserows),
	895	pal20l8pinfusecolumns, ARRAY_LEN(pal20l8pinfusecolumns),
	896	print_pal20l8_product_terms,
	897	config_pal20l8_pins,
	898	NULL},
807	899	{"PAL20L10",
808		pal20l10pinfuserows,
809		sizeof(pal20l10pinfuserows) / sizeof(pal20l10pinfuserows[0]),
810		pal20l10pinfusecolumns,
811		sizeof(pal20l10pinfusecolumns) / sizeof(pal20l10pinfusecolumns[0]),
812		print_pal20l10_product_terms},
	900	pal20l10pinfuserows, ARRAY_LEN(pal20l10pinfuserows),
	901	pal20l10pinfusecolumns, ARRAY_LEN(pal20l10pinfusecolumns),
	902	print_pal20l10_product_terms,
	903	config_pal20l10_pins,
	904	NULL},
813	905	{"PAL20R4",
814		pal20r4pinfuserows,
815		sizeof(pal20r4pinfuserows) / sizeof(pal20r4pinfuserows[0]),
816		pal20r4pinfusecolumns,
817		sizeof(pal20r4pinfusecolumns) / sizeof(pal20r4pinfusecolumns[0]),
818		print_pal20r4_product_terms},
	906	pal20r4pinfuserows, ARRAY_LEN(pal20r4pinfuserows),
	907	pal20r4pinfusecolumns, ARRAY_LEN(pal20r4pinfusecolumns),
	908	print_pal20r4_product_terms,
	909	config_pal20r4_pins,
	910	NULL},
819	911	{"PAL20R6",
820		pal20r6pinfuserows,
821		sizeof(pal20r6pinfuserows) / sizeof(pal20r6pinfuserows[0]),
822		pal20r6pinfusecolumns,
823		sizeof(pal20r6pinfusecolumns) / sizeof(pal20r6pinfusecolumns[0]),
824		print_pal20r6_product_terms},
	912	pal20r6pinfuserows, ARRAY_LEN(pal20r6pinfuserows),
	913	pal20r6pinfusecolumns, ARRAY_LEN(pal20r6pinfusecolumns),
	914	print_pal20r6_product_terms,
	915	config_pal20r6_pins,
	916	NULL},
825	917	{"PAL20R8",
826		pal20r8pinfuserows,
827		sizeof(pal20r8pinfuserows) / sizeof(pal20r8pinfuserows[0]),
828		pal20r8pinfusecolumns,
829		sizeof(pal20r8pinfusecolumns) / sizeof(pal20r8pinfusecolumns[0]),
830		print_pal20r8_product_terms},
831		{"PAL20X4", NULL, 0, NULL, 0, NULL},
832		{"PAL20X8", NULL, 0, NULL, 0, NULL},
833		{"PAL20X10", NULL, 0, NULL, 0, NULL},
834		{"PAL22V10", NULL, 0, NULL, 0, NULL},
835		{"GAL20V8A", NULL, 0, NULL, 0, NULL},
836		{"GAL22V10", NULL, 0, NULL, 0, NULL},
837		{"PLS100", NULL, 0, NULL, 0, NULL}};
	918	pal20r8pinfuserows, ARRAY_LEN(pal20r8pinfuserows),
	919	pal20r8pinfusecolumns, ARRAY_LEN(pal20r8pinfusecolumns),
	920	print_pal20r8_product_terms,
	921	config_pal20r8_pins, NULL}/*,
	922	{"PAL20X4", NULL, 0, NULL, 0, NULL, NULL, NULL},
	923	{"PAL20X8", NULL, 0, NULL, 0, NULL, NULL, NULL},
	924	{"PAL20X10", NULL, 0, NULL, 0, NULL, NULL, NULL},
	925	{"PAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL},
	926	{"GAL20V8A", NULL, 0, NULL, 0, NULL, NULL, NULL},
	927	{"GAL22V10", NULL, 0, NULL, 0, NULL, NULL, NULL},
	928	{"PLS100", NULL, 0, NULL, 0, NULL, NULL, NULL}*/};
838	929
839	930
840	931
r18403	r18404
867	958	with a pal name
868	959	-------------------------------------------------*/
869	960
870		static pal_data* find_pal_data(const char *name)
	961	static const pal_data* find_pal_data(const char *name)
871	962	{
872	963	int index;
873	964
874		for (index = 0; index < sizeof(paldata) / sizeof(paldata[0]);
875		++index)
	965	for (index = 0; index < ARRAY_LEN(paldata); ++index)
876	966	{
877	967	if (!core_stricmp(name, paldata[index].name))
878	968	{
r18403	r18404
886	976
887	977
888	978	/*-------------------------------------------------
	979	find_fuse_rows - finds the fuse row data for
	980	an output pin.
	981	-------------------------------------------------*/
	982
	983	static const pin_fuse_rows* find_fuse_rows(const pal_data* pal, UINT16 pin)
	984	{
	985	UINT16 index;
	986
	987	for (index = 0; index < pal->pinfuserowscount; ++index)
	988	{
	989	if (pal->pinfuserows[index].pin == pin)
	990	{
	991	return &pal->pinfuserows[index];
	992	}
	993	}
	994
	995	return NULL;
	996	}
	997
	998
	999
	1000	/*-------------------------------------------------
	1001	find_fuse_columns - finds the fuse column
	1002	data for an input pin.
	1003	-------------------------------------------------*/
	1004
	1005	static const pin_fuse_columns* find_fuse_columns(const pal_data* pal, UINT16 pin)
	1006	{
	1007	UINT16 index;
	1008
	1009	for (index = 0; index < pal->pinfusecolumnscount; ++index)
	1010	{
	1011	if (pal->pinfusecolumns[index].pin == pin)
	1012	{
	1013	return &pal->pinfusecolumns[index];
	1014	}
	1015	}
	1016
	1017	return NULL;
	1018	}
	1019
	1020
	1021
	1022	/*-------------------------------------------------
889	1023	calc_fuse_column_count - calculates the total
890	1024	columns of a pal
891	1025	-------------------------------------------------*/
r18403	r18404
898	1032
899	1033
900	1034	/*-------------------------------------------------
901		is_fuse_row_blown - checks if a fuse row is
902		all blown
	1035	all_fuses_in_row_blown - checks if a fuse row
	1036	is all blown
903	1037	-------------------------------------------------*/
904	1038
905		static int is_fuse_row_blown(const pal_data* pal, const jed_data* jed, UINT16 fuserow)
	1039	static int all_fuses_in_row_blown(const pal_data* pal, const jed_data* jed, UINT16 fuserow)
906	1040	{
907	1041	UINT16 columncount = calc_fuse_column_count(pal);
908	1042	UINT16 column;
r18403	r18404
921	1055
922	1056
923	1057	/*-------------------------------------------------
924		is_output_pin - determines if the pin is an
925		output pin
	1058	any_fuses_in_row_blown - checks if any fuses in
	1059	a row have been blown.
926	1060	-------------------------------------------------*/
927	1061
928		static int is_output_pin(UINT16 pin)
	1062	static int any_fuses_in_row_blown(const pal_data* pal, const jed_data* jed, UINT16 fuserow)
929	1063	{
930		UINT16 index;
	1064	UINT16 columncount = calc_fuse_column_count(pal);
	1065	UINT16 column;
931	1066
932		for (index = 0; index < outputpinscount; ++index)
	1067	for (column = 0; column < columncount; ++column)
933	1068	{
934		if (outputpins[index] == pin)
	1069	if (jed_get_fuse(jed, fuserow + column))
935	1070	{
936	1071	return 1;
937	1072	}
r18403	r18404
943	1078
944	1079
945	1080	/*-------------------------------------------------
946		find_input_pins - finds the input pins of a
947		pal
	1081	set_input_pins - saves the pins that can be
	1082	used by a product term
948	1083	-------------------------------------------------*/
949	1084
950		static void find_input_pins(const pal_data* pal, const jed_data* jed)
	1085	static void set_input_pins(const UINT16* pins, UINT16 pin_count)
951	1086	{
952		UINT16 column;
	1087	UINT16 index;
953	1088
954		inputpinscount = 0;
955
956		for (column = 0; column < pal->pinfusecolumnscount; ++column)
	1089	for (index = 0; index < pin_count; ++index)
957	1090	{
958		if (!is_output_pin(pal->pinfusecolumns[column].pin))
959		{
960		inputpins[inputpinscount] = pal->pinfusecolumns[column].pin;
	1091	inputpins[index] = pins[index];
961	1092
962		++inputpinscount;
963		}
	1093	++inputpinscount;
964	1094	}
965	1095	}
966	1096
967	1097
968	1098
969	1099	/*-------------------------------------------------
970		find_output_pins - finds the output pins of a
971		pal
	1100	set_output_pins - saves the output pins
972	1101	-------------------------------------------------*/
973	1102
974		static void find_output_pins(const pal_data* pal, const jed_data* jed)
	1103	static void set_output_pins(const pin_output_config* pin_output_configs, UINT16 pin_count)
975	1104	{
976		UINT16 column, columncount, index;
977		int fuseblown;
	1105	UINT16 index;
978	1106
979		outputpinscount = 0;
980		columncount = calc_fuse_column_count(pal);
981
982		for (index = 0; index < pal->pinfuserowscount; ++index)
	1107	for (index = 0; index < pin_count; ++index)
983	1108	{
984		fuseblown = 0;
	1109	outputpins[index].pin = pin_output_configs[index].pin;
	1110	outputpins[index].flags = pin_output_configs[index].flags;
985	1111
986		if (pal->pinfuserows[index].fuserowoutputenable == CNoOutputEnableFuseRow)
987		{
988		fuseblown = 1;
989		}
990		else
991		{
992		for (column = 0; column < columncount; ++column)
993		{
994		if (jed_get_fuse(jed, pal->pinfuserows[index].fuserowoutputenable + column) == 1)
995		{
996		fuseblown = 1;
997		}
998		}
999		}
	1112	++outputpinscount;
	1113	}
	1114	}
1000	1115
1001		if (fuseblown)
	1116
	1117
	1118	/*-------------------------------------------------
	1119	is_output_pin - determines if the pin is an
	1120	output pin
	1121	-------------------------------------------------*/
	1122
	1123	static int is_output_pin(UINT16 pin)
	1124	{
	1125	UINT16 index;
	1126
	1127	for (index = 0; index < outputpinscount; ++index)
	1128	{
	1129	if (outputpins[index].pin == pin)
1002	1130	{
1003		outputpins[outputpinscount] = pal->pinfuserows[index].pin;
1004
1005		++outputpinscount;
	1131	return 1;
1006	1132	}
1007	1133	}
	1134
	1135	return 0;
1008	1136	}
1009	1137
1010	1138
1011	1139
1012		static int is_output_pin_used(const pal_data* pal, const jed_data* jed, const pin_fuse_rows* fuse_rows)
	1140	/*-------------------------------------------------
	1141	get_pin_output_flags - gets the flags
	1142	of an output pin
	1143	-------------------------------------------------*/
	1144
	1145	static UINT16 get_pin_output_flags(UINT16 pin)
1013	1146	{
1014		UINT16 row, column, columncount;
	1147	UINT16 index;
1015	1148
1016		columncount = calc_fuse_column_count(pal);
1017
1018		for (row = fuse_rows->fuserowtermstart;
1019		row <= fuse_rows->fuserowtermend;
1020		row += columncount)
	1149	for (index = 0; index < outputpinscount; ++index)
1021	1150	{
1022		for (column = 0; column < columncount; ++column)
	1151	if (outputpins[index].pin == pin)
1023	1152	{
1024		if (jed_get_fuse(jed, row + column))
1025		{
1026		return 1;
1027		}
	1153	return outputpins[index].flags;
1028	1154	}
1029	1155	}
1030	1156
r18403	r18404
1034	1160
1035	1161
1036	1162	/*-------------------------------------------------
1037		generate_product_terms - prints the product terms
1038		for a fuse row
	1163	get_pin_fuse_state - gets the fuse state of
	1164	an input pin
1039	1165	-------------------------------------------------*/
1040	1166
	1167	static UINT16 get_pin_fuse_state(const pal_data* pal, const jed_data* jed, UINT16 pin, UINT16 fuserow)
	1168	{
	1169	const pin_fuse_columns* fuse_columns = find_fuse_columns(pal, pin);
	1170	int lowfusestate, highfusestate;
	1171
	1172	if (!fuse_columns)
	1173	{
	1174	fprintf(stderr, "Fuse column data missing for pin %d!\n", pin);
	1175
	1176	return NO_FUSE_BLOWN;
	1177	}
	1178
	1179	lowfusestate = jed_get_fuse(jed, fuserow + fuse_columns->lowfusecolumn);
	1180	highfusestate = jed_get_fuse(jed, fuserow + fuse_columns->highfusecolumn);
	1181
	1182	if (!lowfusestate && highfusestate)
	1183	{
	1184	return LOW_FUSE_BLOWN;
	1185	}
	1186	else if (lowfusestate && !highfusestate)
	1187	{
	1188	return HIGH_FUSE_BLOWN;
	1189	}
	1190	else if (!lowfusestate && !highfusestate)
	1191	{
	1192	return NO_FUSE_BLOWN;
	1193	}
	1194
	1195	return LOWHIGH_FUSE_BLOWN;
	1196	}
	1197
	1198
	1199
	1200	/*-------------------------------------------------
	1201	generate_product_terms - prints the product
	1202	terms for a fuse row
	1203	-------------------------------------------------*/
	1204
1041	1205	static void generate_product_terms(const pal_data* pal, const jed_data* jed, UINT16 fuserow, char* buffer)
1042	1206	{
1043		UINT16 index;
1044		int lowfusestate, highfusestate, haveterm;
	1207	UINT16 index, pin, fuse_state, haveterm, flags;
1045	1208	char tmpbuffer[20];
1046	1209
1047	1210	*buffer = 0;
1048	1211	haveterm = 0;
1049	1212
1050		for (index = 0; index < pal->pinfusecolumnscount; ++index)
	1213	if (pal->is_product_term_enabled && !pal->is_product_term_enabled(pal, jed, fuserow))
1051	1214	{
1052		lowfusestate = jed_get_fuse(jed, fuserow + pal->pinfusecolumns[index].lowfusecolumn);
1053		highfusestate = jed_get_fuse(jed, fuserow + pal->pinfusecolumns[index].highfusecolumn);
	1215	return;
	1216	}
1054	1217
1055		if (!lowfusestate && highfusestate)
	1218	for (index = 0; index < inputpinscount; ++index)
	1219	{
	1220	pin = inputpins[index];
	1221
	1222	fuse_state = get_pin_fuse_state(pal, jed, pin, fuserow);
	1223
	1224	if (fuse_state == LOW_FUSE_BLOWN)
1056	1225	{
1057	1226	if (haveterm)
1058	1227	{
1059	1228	strcat(buffer,  " & ");
1060	1229	}
1061	1230
1062		if (!is_output_pin(pal->pinfusecolumns[index].pin))
	1231	if (!is_output_pin(pin))
1063	1232	{
1064		sprintf(tmpbuffer, "/i%d", pal->pinfusecolumns[index].pin);
	1233	sprintf(tmpbuffer, "/i%d", pin);
1065	1234	strcat(buffer, tmpbuffer);
1066	1235	}
1067	1236	else
1068	1237	{
1069		sprintf(tmpbuffer, "/o%d", pal->pinfusecolumns[index].pin);
	1238	flags = get_pin_output_flags(pin);
	1239
	1240	if (flags & OUTPUT_COMBINATORIAL)
	1241	{
	1242	sprintf(tmpbuffer, "/o%d", pin);
	1243	}
	1244	else if (flags & OUTPUT_REGISTERED)
	1245	{
	1246	sprintf(tmpbuffer, "/rf%d", pin);
	1247	}
	1248
1070	1249	strcat(buffer, tmpbuffer);
1071	1250	}
1072	1251
1073	1252	haveterm = 1;
1074	1253	}
1075		else if (lowfusestate && !highfusestate)
	1254
	1255	if (fuse_state == HIGH_FUSE_BLOWN)
1076	1256	{
1077	1257	if (haveterm)
1078	1258	{
1079	1259	strcat(buffer, " & ");
1080	1260	}
1081	1261
1082		if (!is_output_pin(pal->pinfusecolumns[index].pin))
	1262	if (!is_output_pin(pin))
1083	1263	{
1084		sprintf(tmpbuffer, "i%d", pal->pinfusecolumns[index].pin);
	1264	sprintf(tmpbuffer, "i%d", pin);
1085	1265	strcat(buffer, tmpbuffer);
1086	1266	}
1087	1267	else
1088	1268	{
1089		sprintf(tmpbuffer, "o%d", pal->pinfusecolumns[index].pin);
	1269	flags = get_pin_output_flags(pin);
	1270
	1271	if (flags & OUTPUT_COMBINATORIAL)
	1272	{
	1273	sprintf(tmpbuffer, "o%d", pin);
	1274	}
	1275	else if (flags & OUTPUT_REGISTERED)
	1276	{
	1277	sprintf(tmpbuffer, "rf%d", pin);
	1278	}
	1279
1090	1280	strcat(buffer, tmpbuffer);
1091	1281	}
1092	1282
r18403	r18404
1102	1292	for a pal
1103	1293	-------------------------------------------------*/
1104	1294
1105		static void print_product_terms(const pal_data* pal, const jed_data* jed, int activestate)
	1295	static void print_product_terms(const pal_data* pal, const jed_data* jed)
1106	1296	{
1107		UINT16 index, row, columncount;
	1297	UINT16 index, columncount, flags, row, haveterms;
1108	1298	char buffer[200];
1109		int haveterms, indent, indentindex;
	1299	int indent, indentindex;
	1300	const pin_fuse_rows* fuse_rows;
1110	1301
1111	1302	columncount = calc_fuse_column_count(pal);
1112	1303
1113		for (index = 0; index < pal->pinfuserowscount; ++index)
	1304	for (index = 0; index < outputpinscount; ++index)
1114	1305	{
1115		if (is_output_pin(pal->pinfuserows[index].pin) &&
1116		is_output_pin_used(pal, jed, &pal->pinfuserows[index]))
	1306	flags = outputpins[index].flags;
	1307
	1308	indent = 0;
	1309
	1310	if (flags & OUTPUT_ACTIVELOW)
1117	1311	{
1118		indent = 0;
	1312	printf("/");
1119	1313
1120		if (!activestate)
1121		{
1122		printf("/");
	1314	++indent;
	1315	}
1123	1316
1124		++indent;
1125		}
	1317	if (flags & OUTPUT_COMBINATORIAL)
	1318	{
	1319	sprintf(buffer, "o%d = ", outputpins[index].pin);
	1320	}
	1321	else if (flags & OUTPUT_REGISTERED)
	1322	{
	1323	sprintf(buffer, "rf%d := ", outputpins[index].pin);
	1324	}
	1325	else
	1326	{
	1327	fprintf(stderr, "Unknown output type for pin %d!\n", outputpins[index].pin);
1126	1328
1127		sprintf(buffer, "o%d = ", pal->pinfuserows[index].pin);
	1329	continue;
	1330	}
1128	1331
1129		printf("%s", buffer);
	1332	printf("%s", buffer);
1130	1333
1131		haveterms = 0;
1132		indent += strlen(buffer);
	1334	haveterms = 0;
	1335	indent += strlen(buffer);
1133	1336
1134		for (row = pal->pinfuserows[index].fuserowtermstart;
1135		row <= pal->pinfuserows[index].fuserowtermend;
1136		row += columncount)
	1337	fuse_rows = find_fuse_rows(pal, outputpins[index].pin);
	1338
	1339	if (!fuse_rows)
	1340	{
	1341	fprintf(stderr, "Fuse row data missing!\n");
	1342
	1343	continue;
	1344	}
	1345
	1346	for (row = fuse_rows->fuserowtermstart; row <= fuse_rows->fuserowtermend;
	1347	row += columncount)
	1348	{
	1349	generate_product_terms(pal, jed, row, buffer);
	1350
	1351	if (strlen(buffer) > 0)
1137	1352	{
1138		generate_product_terms(pal, jed, row, buffer);
1139
1140		if (strlen(buffer) > 0)
	1353	if (haveterms)
1141	1354	{
1142		if (haveterms)
1143		{
1144		printf(" +\n");
	1355	printf(" +\n");
1145	1356
1146		for (indentindex = 0; indentindex < indent; ++indentindex)
1147		{
1148		printf(" ");
1149		}
1150		}
1151		else
	1357	for (indentindex = 0; indentindex < indent; ++indentindex)
1152	1358	{
1153		haveterms = 1;
	1359	printf(" ");
1154	1360	}
	1361	}
	1362	else
	1363	{
	1364	haveterms = 1;
	1365	}
1155	1366
1156		printf("%s", buffer);
1157		}
	1367	printf("%s", buffer);
1158	1368	}
	1369	}
1159	1370
1160		printf("\n");
	1371	printf("\n");
1161	1372
1162		/* output enable equations */
	1373	/* output enable equations */
1163	1374
1164		printf("o%d.oe = ", pal->pinfuserows[index].pin);
	1375	if (flags & OUTPUT_COMBINATORIAL)
	1376	{
	1377	printf("o%d.oe = ", outputpins[index].pin);
1165	1378
1166		if (pal->pinfuserows[index].fuserowoutputenable == CNoOutputEnableFuseRow ||
1167		is_fuse_row_blown(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	1379	if (fuse_rows->fuserowoutputenable == NO_OUTPUT_ENABLE_FUSE_ROW ||
	1380	all_fuses_in_row_blown(pal, jed, fuse_rows->fuserowoutputenable))
1168	1381	{
1169	1382	printf("vcc\n");
1170	1383	}
1171	1384	else
1172	1385	{
1173		generate_product_terms(pal, jed, pal->pinfuserows[index].fuserowoutputenable, buffer);
	1386	generate_product_terms(pal, jed, fuse_rows->fuserowoutputenable, buffer);
1174	1387
1175	1388	printf("%s\n", buffer);
1176	1389	}
	1390	}
	1391	else if (flags & OUTPUT_REGISTERED)
	1392	{
	1393	printf("rf%d.oe = OE\n", outputpins[index].pin);
	1394	}
1177	1395
1178		printf("\n");
1179		}
	1396	printf("\n");
1180	1397	}
1181
1182		printf("\n");
1183	1398	}
1184	1399
1185	1400
r18403	r18404
1191	1406
1192	1407	static void print_pal10l8_product_terms(const pal_data* pal, const jed_data* jed)
1193	1408	{
1194		print_product_terms(pal, jed, 0);
	1409	print_product_terms(pal, jed);
1195	1410	}
1196	1411
1197	1412
r18403	r18404
1203	1418
1204	1419	static void print_pal10h8_product_terms(const pal_data* pal, const jed_data* jed)
1205	1420	{
1206		print_product_terms(pal, jed, 1);
	1421	print_product_terms(pal, jed);
1207	1422	}
1208	1423
1209	1424
r18403	r18404
1215	1430
1216	1431	static void print_pal12l6_product_terms(const pal_data* pal, const jed_data* jed)
1217	1432	{
1218		print_product_terms(pal, jed, 0);
	1433	print_product_terms(pal, jed);
1219	1434	}
1220	1435
1221	1436
r18403	r18404
1227	1442
1228	1443	static void print_pal12h6_product_terms(const pal_data* pal, const jed_data* jed)
1229	1444	{
1230		print_product_terms(pal, jed, 1);
	1445	print_product_terms(pal, jed);
1231	1446	}
1232	1447
1233	1448
r18403	r18404
1239	1454
1240	1455	static void print_pal14l4_product_terms(const pal_data* pal, const jed_data* jed)
1241	1456	{
1242		print_product_terms(pal, jed, 0);
	1457	print_product_terms(pal, jed);
1243	1458	}
1244	1459
1245	1460
r18403	r18404
1251	1466
1252	1467	static void print_pal14h4_product_terms(const pal_data* pal, const jed_data* jed)
1253	1468	{
1254		print_product_terms(pal, jed, 1);
	1469	print_product_terms(pal, jed);
1255	1470	}
1256	1471
1257	1472
r18403	r18404
1263	1478
1264	1479	static void print_pal16l2_product_terms(const pal_data* pal, const jed_data* jed)
1265	1480	{
1266		print_product_terms(pal, jed, 0);
	1481	print_product_terms(pal, jed);
1267	1482	}
1268	1483
1269	1484
r18403	r18404
1275	1490
1276	1491	static void print_pal16h2_product_terms(const pal_data* pal, const jed_data* jed)
1277	1492	{
1278		print_product_terms(pal, jed, 1);
	1493	print_product_terms(pal, jed);
1279	1494	}
1280	1495
1281	1496
r18403	r18404
1287	1502
1288	1503	static void print_pal16c1_product_terms(const pal_data* pal, const jed_data* jed)
1289	1504	{
1290		printf("Viewing product terms are not supported.\n");
	1505	print_product_terms(pal, jed);
1291	1506	}
1292	1507
1293	1508
r18403	r18404
1299	1514
1300	1515	static void print_pal16l8_product_terms(const pal_data* pal, const jed_data* jed)
1301	1516	{
1302		print_product_terms(pal, jed, 0);
	1517	print_product_terms(pal, jed);
1303	1518	}
1304	1519
1305	1520
r18403	r18404
1311	1526
1312	1527	static void print_pal16r4_product_terms(const pal_data* pal, const jed_data* jed)
1313	1528	{
1314		printf("Viewing product terms are not supported.\n");
	1529	print_product_terms(pal, jed);
1315	1530	}
1316	1531
1317	1532
r18403	r18404
1323	1538
1324	1539	static void print_pal16r6_product_terms(const pal_data* pal, const jed_data* jed)
1325	1540	{
1326		printf("Viewing product terms are not supported.\n");
	1541	print_product_terms(pal, jed);
1327	1542	}
1328	1543
1329	1544
r18403	r18404
1335	1550
1336	1551	static void print_pal16r8_product_terms(const pal_data* pal, const jed_data* jed)
1337	1552	{
1338		printf("Viewing product terms are not supported.\n");
	1553	print_product_terms(pal, jed);
1339	1554	}
1340	1555
1341	1556
1342	1557
1343	1558	/*-------------------------------------------------
	1559	print_gal16v8_product_terms - prints the product
	1560	terms for a GAL16V8
	1561	-------------------------------------------------*/
	1562
	1563	static void print_gal16v8_product_terms(const pal_data* pal, const jed_data* jed)
	1564	{
	1565	print_product_terms(pal, jed);
	1566	}
	1567
	1568
	1569
	1570	/*-------------------------------------------------
1344	1571	print_gal18v10_product_terms - prints the product
1345	1572	terms for a GAL18V10
1346	1573	-------------------------------------------------*/
1347	1574
1348		static void print_gal18v10_product_terms(const pal_data* pal, const jed_data* jed)
	1575	/*static void print_gal18v10_product_terms(const pal_data* pal, const jed_data* jed)
1349	1576	{
1350	1577	printf("Viewing product terms are not supported.\n");
1351		}
	1578	}*/
1352	1579
1353	1580
1354	1581
r18403	r18404
1359	1586
1360	1587	static void print_pal20l8_product_terms(const pal_data* pal, const jed_data* jed)
1361	1588	{
1362		print_product_terms(pal, jed, 0);
	1589	print_product_terms(pal, jed);
1363	1590	}
1364	1591
1365	1592
r18403	r18404
1371	1598
1372	1599	static void print_pal20l10_product_terms(const pal_data* pal, const jed_data* jed)
1373	1600	{
1374		print_product_terms(pal, jed, 0);
	1601	print_product_terms(pal, jed);
1375	1602	}
1376	1603
1377	1604
r18403	r18404
1383	1610
1384	1611	static void print_pal20r4_product_terms(const pal_data* pal, const jed_data* jed)
1385	1612	{
1386		printf("Viewing product terms are not supported.\n");
	1613	print_product_terms(pal, jed);
1387	1614	}
1388	1615
1389	1616
r18403	r18404
1395	1622
1396	1623	static void print_pal20r6_product_terms(const pal_data* pal, const jed_data* jed)
1397	1624	{
1398		printf("Viewing product terms are not supported.\n");
	1625	print_product_terms(pal, jed);
1399	1626	}
1400	1627
1401	1628
r18403	r18404
1407	1634
1408	1635	static void print_pal20r8_product_terms(const pal_data* pal, const jed_data* jed)
1409	1636	{
1410		printf("Viewing product terms are not supported.\n");
	1637	print_product_terms(pal, jed);
1411	1638	}
1412	1639
1413	1640
1414	1641
1415	1642	/*-------------------------------------------------
	1643	config_pal10l8_pins - configures the pins for
	1644	a PAL10L8
	1645	-------------------------------------------------*/
	1646
	1647	static void config_pal10l8_pins(const pal_data* pal, const jed_data* jed)
	1648	{
	1649	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	1650	static pin_output_config output_pins[] = {
	1651	{12, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1652	{13, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1653	{14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1654	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1655	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1656	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1657	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1658	{19, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL}};
	1659
	1660	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1661	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1662	}
	1663
	1664
	1665
	1666	/*-------------------------------------------------
	1667	config_pal10h8_pins - configures the pins for
	1668	a PAL10H8
	1669	-------------------------------------------------*/
	1670
	1671	static void config_pal10h8_pins(const pal_data* pal, const jed_data* jed)
	1672	{
	1673	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11};
	1674	static pin_output_config output_pins[] = {
	1675	{12, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1676	{13, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1677	{14, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1678	{15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1679	{16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1680	{17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1681	{18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1682	{19, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL}};
	1683
	1684	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1685	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1686	}
	1687
	1688
	1689
	1690	/*-------------------------------------------------
	1691	config_pal12l6_pins - configures the pins for
	1692	a PAL12L6
	1693	-------------------------------------------------*/
	1694
	1695	static void config_pal12l6_pins(const pal_data* pal, const jed_data* jed)
	1696	{
	1697	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19};
	1698	static pin_output_config output_pins[] = {
	1699	{13, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1700	{14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1701	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1702	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1703	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1704	{18, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL}};
	1705
	1706	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1707	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1708	}
	1709
	1710
	1711
	1712	/*-------------------------------------------------
	1713	config_pal12h6_pins - configures the pins for
	1714	a PAL12H6
	1715	-------------------------------------------------*/
	1716
	1717	static void config_pal12h6_pins(const pal_data* pal, const jed_data* jed)
	1718	{
	1719	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 19};
	1720	static pin_output_config output_pins[] = {
	1721	{13, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1722	{14, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1723	{15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1724	{16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1725	{17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1726	{18, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL}};
	1727
	1728	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1729	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1730	}
	1731
	1732
	1733
	1734	/*-------------------------------------------------
	1735	config_pal14l4_pins - configures the pins for
	1736	a PAL14L4
	1737	-------------------------------------------------*/
	1738
	1739	static void config_pal14l4_pins(const pal_data* pal, const jed_data* jed)
	1740	{
	1741	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19};
	1742	static pin_output_config output_pins[] = {
	1743	{14, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1744	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1745	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1746	{17, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL}};
	1747
	1748	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1749	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1750	}
	1751
	1752
	1753
	1754	/*-------------------------------------------------
	1755	config_pal14h4_pins - configures the pins for
	1756	a PAL14H4
	1757	-------------------------------------------------*/
	1758
	1759	static void config_pal14h4_pins(const pal_data* pal, const jed_data* jed)
	1760	{
	1761	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 18, 19};
	1762	static pin_output_config output_pins[] = {
	1763	{14, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1764	{15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1765	{16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1766	{17, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL}};
	1767
	1768	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1769	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1770	}
	1771
	1772
	1773
	1774	/*-------------------------------------------------
	1775	config_pal16l2_pins - configures the pins for
	1776	a PAL16L2
	1777	-------------------------------------------------*/
	1778
	1779	static void config_pal16l2_pins(const pal_data* pal, const jed_data* jed)
	1780	{
	1781	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
	1782	static pin_output_config output_pins[] = {
	1783	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1784	{16, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL}};
	1785
	1786	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1787	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1788	}
	1789
	1790
	1791
	1792	/*-------------------------------------------------
	1793	config_pal16h2_pins - configures the pins for
	1794	a PAL16H2
	1795	-------------------------------------------------*/
	1796
	1797	static void config_pal16h2_pins(const pal_data* pal, const jed_data* jed)
	1798	{
	1799	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
	1800	static pin_output_config output_pins[] = {
	1801	{15, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL},
	1802	{16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL}};
	1803
	1804	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1805	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1806	}
	1807
	1808
	1809
	1810	/*-------------------------------------------------
	1811	config_pal16c1_pins - configures the pins for
	1812	a PAL16C1
	1813	-------------------------------------------------*/
	1814
	1815	static void config_pal16c1_pins(const pal_data* pal, const jed_data* jed)
	1816	{
	1817	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
	1818	static pin_output_config output_pins[] = {
	1819	{15, OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL},
	1820	{16, OUTPUT_ACTIVEHIGH | OUTPUT_COMBINATORIAL}};
	1821
	1822	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1823	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1824	}
	1825
	1826
	1827
	1828	/*-------------------------------------------------
	1829	config_pal16l8_pins - configures the pins for
	1830	a PAL16L8
	1831	-------------------------------------------------*/
	1832
	1833	static void config_pal16l8_pins(const pal_data* pal, const jed_data* jed)
	1834	{
	1835	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18};
	1836	pin_output_config output_pins[8];
	1837	UINT16 output_pin_count, index;
	1838
	1839	output_pin_count = 0;
	1840
	1841	for (index = 0; index < pal->pinfuserowscount; ++index)
	1842	{
	1843	if (any_fuses_in_row_blown(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	1844	{
	1845	output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
	1846	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	1847
	1848	++output_pin_count;
	1849	}
	1850	}
	1851
	1852	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1853	set_output_pins(output_pins, output_pin_count);
	1854	}
	1855
	1856
	1857
	1858	/*-------------------------------------------------
	1859	config_pal16r4_pins - configures the pins for
	1860	a PAL16R4
	1861	-------------------------------------------------*/
	1862
	1863	static void config_pal16r4_pins(const pal_data* pal, const jed_data* jed)
	1864	{
	1865	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
	1866	static UINT16 registered_pins[] = {14, 15, 16, 17};
	1867	pin_output_config output_pins[8];
	1868	UINT16 output_pin_count, index;
	1869
	1870	output_pin_count = 0;
	1871
	1872	if (any_fuses_in_row_blown(pal, jed, 1792))
	1873	{
	1874	output_pins[output_pin_count].pin = 12;
	1875	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	1876
	1877	++output_pin_count;
	1878	}
	1879
	1880	if (any_fuses_in_row_blown(pal, jed, 1536))
	1881	{
	1882	output_pins[output_pin_count].pin = 13;
	1883	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	1884
	1885	++output_pin_count;
	1886	}
	1887
	1888	for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
	1889	{
	1890	output_pins[output_pin_count].pin = registered_pins[index];
	1891	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_REGISTERED;
	1892
	1893	++output_pin_count;
	1894	}
	1895
	1896	if (any_fuses_in_row_blown(pal, jed, 256))
	1897	{
	1898	output_pins[output_pin_count].pin = 18;
	1899	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	1900
	1901	++output_pin_count;
	1902	}
	1903
	1904	if (any_fuses_in_row_blown(pal, jed, 0))
	1905	{
	1906	output_pins[output_pin_count].pin = 19;
	1907	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	1908
	1909	++output_pin_count;
	1910	}
	1911
	1912	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1913	set_output_pins(output_pins, output_pin_count);
	1914	}
	1915
	1916
	1917
	1918	/*-------------------------------------------------
	1919	config_pal16r6_pins - configures the pins
	1920	for a PAL16R6
	1921	-------------------------------------------------*/
	1922
	1923	static void config_pal16r6_pins(const pal_data* pal, const jed_data* jed)
	1924	{
	1925	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
	1926	static UINT16 registered_pins[] = {13, 14, 15, 16, 17, 18};
	1927	pin_output_config output_pins[8];
	1928	UINT16 output_pin_count, index;
	1929
	1930	output_pin_count = 0;
	1931
	1932	if (any_fuses_in_row_blown(pal, jed, 1792))
	1933	{
	1934	output_pins[output_pin_count].pin = 12;
	1935	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	1936
	1937	++output_pin_count;
	1938	}
	1939
	1940	for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
	1941	{
	1942	output_pins[output_pin_count].pin = registered_pins[index];
	1943	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_REGISTERED;
	1944
	1945	++output_pin_count;
	1946	}
	1947
	1948	if (any_fuses_in_row_blown(pal, jed, 0))
	1949	{
	1950	output_pins[output_pin_count].pin = 19;
	1951	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	1952
	1953	++output_pin_count;
	1954	}
	1955
	1956	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1957	set_output_pins(output_pins, output_pin_count);
	1958	}
	1959
	1960
	1961
	1962	/*-------------------------------------------------
	1963	config_pal16r8_pins - configures the pins for
	1964	a PAL16R8
	1965	-------------------------------------------------*/
	1966
	1967	static void config_pal16r8_pins(const pal_data* pal, const jed_data* jed)
	1968	{
	1969	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
	1970	static pin_output_config output_pins[] = {
	1971	{12, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	1972	{13, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	1973	{14, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	1974	{15, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	1975	{16, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	1976	{17, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	1977	{18, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	1978	{19, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED}};
	1979
	1980	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	1981	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	1982	}
	1983
	1984
	1985
	1986	/*-------------------------------------------------
	1987	config_gal16v8_pins - configures the pins for
	1988	a GAL16V8
	1989	-------------------------------------------------*/
	1990
	1991	static void config_gal16v8_pins(const pal_data* pal, const jed_data* jed)
	1992	{
	1993	typedef struct _output_logic_macrocell output_logic_macrocell;
	1994	struct _output_logic_macrocell
	1995	{
	1996	UINT16 pin;
	1997	UINT16 xor_fuse;
	1998	UINT16 ac1_fuse;
	1999	};
	2000
	2001	static output_logic_macrocell macrocells[] = {
	2002	{12, 2055, 2127},
	2003	{13, 2054, 2126},
	2004	{14, 2053, 2125},
	2005	{15, 2052, 2124},
	2006	{16, 2051, 2123},
	2007	{17, 2050, 2122},
	2008	{18, 2049, 2121},
	2009	{19, 2048, 2120}};
	2010	static pin_fuse_rows pinfuserows_registered[] = {
	2011	{12, NO_OUTPUT_ENABLE_FUSE_ROW, 1792, 2016},
	2012	{13, NO_OUTPUT_ENABLE_FUSE_ROW, 1536, 1760},
	2013	{14, NO_OUTPUT_ENABLE_FUSE_ROW, 1280, 1504},
	2014	{15, NO_OUTPUT_ENABLE_FUSE_ROW, 1024, 1248},
	2015	{16, NO_OUTPUT_ENABLE_FUSE_ROW, 768, 992},
	2016	{17, NO_OUTPUT_ENABLE_FUSE_ROW, 512, 736},
	2017	{18, NO_OUTPUT_ENABLE_FUSE_ROW, 256, 480},
	2018	{19, NO_OUTPUT_ENABLE_FUSE_ROW, 0, 224}};
	2019	static pin_fuse_rows pinfuserows_combinatorial[] = {
	2020	{12, 1792, 1824, 2016},
	2021	{13, 1536, 1568, 1760},
	2022	{14, 1280, 1312, 1504},
	2023	{15, 1024, 1056, 1248},
	2024	{16, 768, 800, 992},
	2025	{17, 512, 544, 736},
	2026	{18, 256, 288, 480},
	2027	{19, 0, 32, 224}};
	2028	static pin_fuse_columns pinfusecolumns_registered[] = {
	2029	{2,  1,  0},
	2030	{3,  5,  4},
	2031	{4,  9,  8},
	2032	{5,  13, 12},
	2033	{6,  17, 16},
	2034	{7,  21, 20},
	2035	{8,  25, 24},
	2036	{9,  29, 28},
	2037	{12, 31, 30},
	2038	{13, 27, 26},
	2039	{14, 23, 22},
	2040	{15, 19, 18},
	2041	{16, 15, 14},
	2042	{17, 11, 10},
	2043	{18, 7, 6},
	2044	{19, 3, 2}};
	2045	static pin_fuse_columns pinfusecolumns_combinatorialcomplex[] = {
	2046	{1,  3,  2},
	2047	{2,  1,  0},
	2048	{3,  5,  4},
	2049	{4,  9,  8},
	2050	{5,  13, 12},
	2051	{6,  17, 16},
	2052	{7,  21, 20},
	2053	{8,  25, 24},
	2054	{9,  29, 28},
	2055	{11, 31, 30},
	2056	{13, 27, 26},
	2057	{14, 23, 22},
	2058	{15, 19, 18},
	2059	{16, 15, 14},
	2060	{17, 11, 10},
	2061	{18, 7, 6}};
	2062	static pin_fuse_columns pinfusecolumns_combinatorialsimple[] = {
	2063	{1,  3,  2},
	2064	{2,  1,  0},
	2065	{3,  5,  4},
	2066	{4,  9,  8},
	2067	{5,  13, 12},
	2068	{6,  17, 16},
	2069	{7,  21, 20},
	2070	{8,  25, 24},
	2071	{9,  29, 28},
	2072	{11, 31, 30},
	2073	{12, 27, 26},
	2074	{13, 23, 22},
	2075	{14, 19, 18},
	2076	{17, 15, 14},
	2077	{18, 11, 10},
	2078	{19, 7,  6}};
	2079	static UINT16 input_pins_registered[] = {2, 3, 4, 5, 6, 7, 8, 9, 12, 13, 14, 15, 16, 17, 18, 19};
	2080	static UINT16 input_pins_combinatorialcomplex[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 13, 14, 15, 16, 17, 18};
	2081	static UINT16 input_pins_combinatorialsimple[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 11, 12, 13, 14, 17, 18, 19};
	2082	pin_output_config output_pins[ARRAY_LEN(macrocells)];
	2083	UINT16 index, output_pin_count;
	2084
	2085	output_pin_count = 0;
	2086
	2087	/* SYN Fuse: 0 - registered, 1 - combinatorial */
	2088
	2089	if (jed_get_fuse(jed, 2192))
	2090	{
	2091	/* Combinatorial */
	2092	/* AC0 Fuse: 0 - simple mode, 1 - complex mode */
	2093
	2094	if (jed_get_fuse(jed, 2193))
	2095	{
	2096	/* Complex Mode */
	2097
	2098	set_input_pins(input_pins_combinatorialcomplex, ARRAY_LEN(input_pins_combinatorialcomplex));
	2099
	2100	memcpy(gal16v8pinfuserows, pinfuserows_combinatorial, sizeof(pinfuserows_combinatorial));
	2101	memcpy(gal16v8pinfusecolumns, pinfusecolumns_combinatorialcomplex, sizeof(pinfusecolumns_combinatorialcomplex));
	2102
	2103	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	2104	{
	2105	if (is_gal16v8_product_term_enabled(pal, jed, pal->pinfuserows[index].fuserowoutputenable) &&
	2106	any_fuses_in_row_blown(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	2107	{
	2108	output_pins[output_pin_count].pin = macrocells[index].pin;
	2109	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL;
	2110
	2111	if (jed_get_fuse(jed, macrocells[index].xor_fuse))
	2112	{
	2113	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	2114	}
	2115	else
	2116	{
	2117	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	2118	}
	2119
	2120	++output_pin_count;
	2121	}
	2122	}
	2123	}
	2124	else
	2125	{
	2126	/* Simple Mode */
	2127
	2128	set_input_pins(input_pins_combinatorialsimple, ARRAY_LEN(input_pins_combinatorialsimple));
	2129
	2130	memcpy(gal16v8pinfuserows, pinfuserows_registered, sizeof(pinfuserows_registered));
	2131	memcpy(gal16v8pinfusecolumns, pinfusecolumns_combinatorialsimple, sizeof(pinfusecolumns_combinatorialsimple));
	2132
	2133	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	2134	{
	2135	if (jed_get_fuse(jed, macrocells[index].ac1_fuse))
	2136	{
	2137	/* Pin is for input only */
	2138
	2139	if (macrocells[index].pin == 15 || macrocells[index].pin == 16)
	2140	{
	2141	fprintf(stderr, "Pin %d cannot be configured as an input pin.\n",
	2142	macrocells[index].pin);
	2143	}
	2144	}
	2145	else
	2146	{
	2147	output_pins[output_pin_count].pin = macrocells[index].pin;
	2148	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL;
	2149
	2150	if (jed_get_fuse(jed, macrocells[index].xor_fuse))
	2151	{
	2152	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	2153	}
	2154	else
	2155	{
	2156	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	2157	}
	2158
	2159	++output_pin_count;
	2160	}
	2161	}
	2162	}
	2163	}
	2164	else
	2165	{
	2166	/* Registered */
	2167
	2168	set_input_pins(input_pins_registered, ARRAY_LEN(input_pins_registered));
	2169
	2170	memcpy(gal16v8pinfusecolumns, pinfusecolumns_registered, sizeof(pinfusecolumns_registered));
	2171
	2172	for (index = 0; index < ARRAY_LEN(macrocells); ++index)
	2173	{
	2174	if (jed_get_fuse(jed, macrocells[index].ac1_fuse))
	2175	{
	2176	/* combinatorial pin */
	2177
	2178	gal16v8pinfuserows[index].fuserowoutputenable = pinfuserows_combinatorial[index].fuserowoutputenable;
	2179	gal16v8pinfuserows[index].fuserowtermstart = pinfuserows_combinatorial[index].fuserowtermstart;
	2180	gal16v8pinfuserows[index].fuserowtermend = pinfuserows_combinatorial[index].fuserowtermend;
	2181
	2182	if (is_gal16v8_product_term_enabled(pal, jed, pal->pinfuserows[index].fuserowoutputenable) &&
	2183	any_fuses_in_row_blown(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	2184	{
	2185	output_pins[output_pin_count].pin = macrocells[index].pin;
	2186	output_pins[output_pin_count].flags = OUTPUT_COMBINATORIAL;
	2187
	2188	if (jed_get_fuse(jed, macrocells[index].xor_fuse))
	2189	{
	2190	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	2191	}
	2192	else
	2193	{
	2194	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	2195	}
	2196
	2197	++output_pin_count;
	2198	}
	2199	}
	2200	else
	2201	{
	2202	/* registered pin */
	2203
	2204	gal16v8pinfuserows[index].fuserowoutputenable = pinfuserows_registered[index].fuserowoutputenable;
	2205	gal16v8pinfuserows[index].fuserowtermstart = pinfuserows_registered[index].fuserowtermstart;
	2206	gal16v8pinfuserows[index].fuserowtermend = pinfuserows_registered[index].fuserowtermend;
	2207
	2208	output_pins[output_pin_count].pin = macrocells[index].pin;
	2209	output_pins[output_pin_count].flags = OUTPUT_REGISTERED;
	2210
	2211	if (jed_get_fuse(jed, macrocells[index].xor_fuse))
	2212	{
	2213	output_pins[output_pin_count].flags |= OUTPUT_ACTIVEHIGH;
	2214	}
	2215	else
	2216	{
	2217	output_pins[output_pin_count].flags |= OUTPUT_ACTIVELOW;
	2218	}
	2219
	2220	++output_pin_count;
	2221	}
	2222	}
	2223	}
	2224
	2225	set_output_pins(output_pins, output_pin_count);
	2226	}
	2227
	2228
	2229
	2230	/*-------------------------------------------------
	2231	config_gal18v10_pins - configures the pins
	2232	for a GAL18V10
	2233	-------------------------------------------------*/
	2234
	2235	/*static void config_gal18v10_pins(const pal_data* pal, const jed_data* jed)
	2236	{
	2237	}*/
	2238
	2239
	2240
	2241	/*-------------------------------------------------
	2242	config_pal20l8_pins - configures the pins for
	2243	a PAL20L8
	2244	-------------------------------------------------*/
	2245
	2246	static void config_pal20l8_pins(const pal_data* pal, const jed_data* jed)
	2247	{
	2248	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 14, 16, 17, 18, 19, 20, 21, 23};
	2249	pin_output_config output_pins[8];
	2250	UINT16 output_pin_count, index;
	2251
	2252	output_pin_count = 0;
	2253
	2254	for (index = 0; index < pal->pinfuserowscount; ++index)
	2255	{
	2256	if (any_fuses_in_row_blown(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	2257	{
	2258	output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
	2259	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	2260
	2261	++output_pin_count;
	2262	}
	2263	}
	2264
	2265	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	2266	set_output_pins(output_pins, output_pin_count);
	2267	}
	2268
	2269
	2270
	2271	/*-------------------------------------------------
	2272	config_pal20l10_pins - configures the pins for
	2273	a PAL20L10
	2274	-------------------------------------------------*/
	2275
	2276	static void config_pal20l10_pins(const pal_data* pal, const jed_data* jed)
	2277	{
	2278	static UINT16 input_pins[] = {1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 16, 17, 18, 19, 20, 21, 22};
	2279	pin_output_config output_pins[10];
	2280	UINT16 output_pin_count, index;
	2281
	2282	output_pin_count = 0;
	2283
	2284	for (index = 0; index < pal->pinfuserowscount; ++index)
	2285	{
	2286	if (any_fuses_in_row_blown(pal, jed, pal->pinfuserows[index].fuserowoutputenable))
	2287	{
	2288	output_pins[output_pin_count].pin = pal->pinfuserows[index].pin;
	2289	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	2290
	2291	++output_pin_count;
	2292	}
	2293	}
	2294
	2295	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	2296	set_output_pins(output_pins, output_pin_count);
	2297	}
	2298
	2299
	2300
	2301	/*-------------------------------------------------
	2302	config_pal20r4_pins - configures the pins for
	2303	a PAL20R4
	2304	-------------------------------------------------*/
	2305
	2306	static void config_pal20r4_pins(const pal_data* pal, const jed_data* jed)
	2307	{
	2308	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23};
	2309	static UINT16 registered_pins[] = {17, 18, 19, 20};
	2310	pin_output_config output_pins[8];
	2311	UINT16 output_pin_count, index;
	2312
	2313	output_pin_count = 0;
	2314
	2315	if (any_fuses_in_row_blown(pal, jed, 2240))
	2316	{
	2317	output_pins[output_pin_count].pin = 15;
	2318	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	2319
	2320	++output_pin_count;
	2321	}
	2322
	2323	if (any_fuses_in_row_blown(pal, jed, 1920))
	2324	{
	2325	output_pins[output_pin_count].pin = 16;
	2326	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	2327
	2328	++output_pin_count;
	2329	}
	2330
	2331	for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
	2332	{
	2333	output_pins[output_pin_count].pin = registered_pins[index];
	2334	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_REGISTERED;
	2335
	2336	++output_pin_count;
	2337	}
	2338
	2339	if (any_fuses_in_row_blown(pal, jed, 320))
	2340	{
	2341	output_pins[output_pin_count].pin = 21;
	2342	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	2343
	2344	++output_pin_count;
	2345	}
	2346
	2347	if (any_fuses_in_row_blown(pal, jed, 0))
	2348	{
	2349	output_pins[output_pin_count].pin = 22;
	2350	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	2351
	2352	++output_pin_count;
	2353	}
	2354
	2355	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	2356	set_output_pins(output_pins, output_pin_count);
	2357	}
	2358
	2359
	2360
	2361	/*-------------------------------------------------
	2362	config_pal20r6_pins - configures the pins for
	2363	a PAL20R6
	2364	-------------------------------------------------*/
	2365
	2366	static void config_pal20r6_pins(const pal_data* pal, const jed_data* jed)
	2367	{
	2368	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23};
	2369	static UINT16 registered_pins[] = {16, 17, 18, 19, 20, 21};
	2370	pin_output_config output_pins[8];
	2371	UINT16 output_pin_count, index;
	2372
	2373	output_pin_count = 0;
	2374
	2375	if (any_fuses_in_row_blown(pal, jed, 2240))
	2376	{
	2377	output_pins[output_pin_count].pin = 15;
	2378	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	2379
	2380	++output_pin_count;
	2381	}
	2382
	2383	for (index = 0; index < ARRAY_LEN(registered_pins); ++index)
	2384	{
	2385	output_pins[output_pin_count].pin = registered_pins[index];
	2386	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_REGISTERED;
	2387
	2388	++output_pin_count;
	2389	}
	2390
	2391	if (any_fuses_in_row_blown(pal, jed, 0))
	2392	{
	2393	output_pins[output_pin_count].pin = 22;
	2394	output_pins[output_pin_count].flags = OUTPUT_ACTIVELOW | OUTPUT_COMBINATORIAL;
	2395
	2396	++output_pin_count;
	2397	}
	2398
	2399
	2400	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	2401	set_output_pins(output_pins, output_pin_count);
	2402	}
	2403
	2404
	2405
	2406	/*-------------------------------------------------
	2407	config_pal20r8_pins - configures the pins for
	2408	a PAL20R8
	2409	-------------------------------------------------*/
	2410
	2411	static void config_pal20r8_pins(const pal_data* pal, const jed_data* jed)
	2412	{
	2413	static UINT16 input_pins[] = {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23};
	2414	static pin_output_config output_pins[] = {
	2415	{15, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	2416	{16, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	2417	{17, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	2418	{18, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	2419	{19, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	2420	{20, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	2421	{21, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED},
	2422	{22, OUTPUT_ACTIVELOW | OUTPUT_REGISTERED}};
	2423
	2424	set_input_pins(input_pins, ARRAY_LEN(input_pins));
	2425	set_output_pins(output_pins, ARRAY_LEN(output_pins));
	2426	}
	2427
	2428
	2429
	2430	/*-------------------------------------------------
	2431	is_gal16v8_product_term_enabled - determins if
	2432	a fuse row in a GAL16V8 is enabled
	2433	-------------------------------------------------*/
	2434
	2435	static int is_gal16v8_product_term_enabled(const pal_data* pal, const jed_data* jed, UINT16 fuserow)
	2436	{
	2437	UINT16 fuse_ptd;
	2438
	2439	fuse_ptd = (fuserow / calc_fuse_column_count(pal)) + 2128;
	2440
	2441	if (fuse_ptd > 2191)
	2442	{
	2443	fprintf(stderr, "Fuse row %d is illegal!\n", fuserow);
	2444
	2445	return 0;
	2446	}
	2447
	2448	return jed_get_fuse(jed, fuse_ptd);
	2449	}
	2450
	2451
	2452
	2453	/*-------------------------------------------------
1416	2454	read_source_file - read a raw source file
1417	2455	into an allocated memory buffer
1418	2456	-------------------------------------------------*/
r18403	r18404
1506	2544	"  jedutil -convert <source.bin> <target.jed> -- convert binary to JED form\n"
1507	2545	"  jedutil -view <source.jed> <pal name> -- dump JED logic equations\n"
1508	2546	"  jedutil -view <source.bin> <pal name> -- dump binary logic equations\n"
	2547	"  jedutil -viewlist -- view list of supported devices\n"
1509	2548	);
1510	2549
1511	2550	return 0;
r18403	r18404
1639	2678	{
1640	2679	const char *srcfile, *palname;
1641	2680	int is_jed;
1642		pal_data* pal;
	2681	const pal_data* pal;
1643	2682	jed_data jed;
1644	2683	int err;
1645	2684
r18403	r18404
1692	2731
1693	2732	/* generate equations from fuse map */
1694	2733
1695		find_output_pins(pal, &jed);
1696		find_input_pins(pal, &jed);
	2734	pal->config_pins(pal, &jed);
1697	2735
1698	2736	if (pal->print_product_terms)
1699	2737	{
r18403	r18404
1712	2750
1713	2751
1714	2752	/*-------------------------------------------------
	2753	command_viewlist - views the list of supported
	2754	jeds
	2755	-------------------------------------------------*/
	2756
	2757	static int command_viewlist(int argc, char *argv[])
	2758	{
	2759	int index;
	2760
	2761	if (argc > 0)
	2762	{
	2763	return print_usage();
	2764	}
	2765
	2766	for (index = 0; index < ARRAY_LEN(paldata); ++index)
	2767	{
	2768	printf("%s\n", paldata[index].name);
	2769	}
	2770
	2771	return 0;
	2772	}
	2773
	2774
	2775	/*-------------------------------------------------
1715	2776	main - primary entry point
1716	2777	-------------------------------------------------*/
1717	2778
1718	2779	int main(int argc, char *argv[])
1719	2780	{
1720	2781	command_entry command_entries[] = {
1721		{"-convert", &command_convert},
1722		{"-view",    &command_view}};
	2782	{"-convert",  &command_convert},
	2783	{"-view",     &command_view},
	2784	{"-viewlist", &command_viewlist}};
1723	2785	int index;
1724	2786
1725		/* needs at least two arguments */
1726		if (argc < 4)
	2787	if (argc < 2)
1727	2788	{
1728	2789	return print_usage();
1729	2790	}
1730	2791
1731		for (index = 0; index < sizeof(command_entries) / sizeof(command_entries[0]); ++index)
	2792	for (index = 0; index < ARRAY_LEN(command_entries); ++index)
1732	2793	{
1733	2794	if (!strcmp(argv[1], command_entries[index].command))
1734	2795	return command_entries[index].command_func(argc - 2, &argv[2]);

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