trunk/src/mess/drivers/a2600.c
| r18312 | r18313 | |
|---|
| 849 | 849 | { |
| 850 | 850 | if ( ( address & 0x1FFF ) >= 0x1FF6 && ( address & 0x1FFF ) <= 0x1FF9 ) |
| 851 | 851 | { |
| 852 | | modeF6_switch_w(machine().device("maincpu")->memory().space(AS_PROGRAM), ( address & 0x1FFF ) - 0x1FF6, 0 ); |
| 852 | if ( ! direct.space().debugger_access() ) |
| 853 | { |
| 854 | modeF6_switch_w(machine().device("maincpu")->memory().space(AS_PROGRAM), ( address & 0x1FFF ) - 0x1FF6, 0 ); |
| 855 | } |
| 853 | 856 | } |
| 854 | 857 | return address; |
| 855 | 858 | } |
| r18312 | r18313 | |
|---|
| 858 | 861 | { |
| 859 | 862 | if ( address & 0x1000 ) |
| 860 | 863 | { |
| 861 | | if ( address & 0x800 ) |
| 864 | if ( ! direct.space().debugger_access() ) |
| 862 | 865 | { |
| 863 | | direct.explicit_configure(( address & 0xf800 ), ( address & 0xf800 ) | 0x7ff, 0x7ff, m_bank_base[2]); |
| 866 | if ( address & 0x800 ) |
| 867 | { |
| 868 | direct.explicit_configure(( address & 0xf800 ), ( address & 0xf800 ) | 0x7ff, 0x7ff, m_bank_base[2]); |
| 869 | } |
| 870 | else |
| 871 | { |
| 872 | direct.explicit_configure(( address & 0xf800 ), ( address & 0xf800 ) | 0x7ff, 0x7ff, m_bank_base[1]); |
| 873 | } |
| 874 | return ~0; |
| 864 | 875 | } |
| 865 | | else |
| 866 | | { |
| 867 | | direct.explicit_configure(( address & 0xf800 ), ( address & 0xf800 ) | 0x7ff, 0x7ff, m_bank_base[1]); |
| 868 | | } |
| 869 | | return ~0; |
| 870 | 876 | } |
| 871 | 877 | return address; |
| 872 | 878 | } |
| r18312 | r18313 | |
|---|
| 1039 | 1045 | |
| 1040 | 1046 | DIRECT_UPDATE_MEMBER(a2600_state::modeDPC_opbase_handler) |
| 1041 | 1047 | { |
| 1042 | | UINT8 new_bit; |
| 1043 | | new_bit = ( m_dpc.shift_reg & 0x80 ) ^ ( ( m_dpc.shift_reg & 0x20 ) << 2 ); |
| 1044 | | new_bit = new_bit ^ ( ( ( m_dpc.shift_reg & 0x10 ) << 3 ) ^ ( ( m_dpc.shift_reg & 0x08 ) << 4 ) ); |
| 1045 | | new_bit = new_bit ^ 0x80; |
| 1046 | | m_dpc.shift_reg = new_bit | ( m_dpc.shift_reg >> 1 ); |
| 1048 | if ( ! direct.space().debugger_access() ) |
| 1049 | { |
| 1050 | UINT8 new_bit; |
| 1051 | new_bit = ( m_dpc.shift_reg & 0x80 ) ^ ( ( m_dpc.shift_reg & 0x20 ) << 2 ); |
| 1052 | new_bit = new_bit ^ ( ( ( m_dpc.shift_reg & 0x10 ) << 3 ) ^ ( ( m_dpc.shift_reg & 0x08 ) << 4 ) ); |
| 1053 | new_bit = new_bit ^ 0x80; |
| 1054 | m_dpc.shift_reg = new_bit | ( m_dpc.shift_reg >> 1 ); |
| 1055 | } |
| 1047 | 1056 | return address; |
| 1048 | 1057 | } |
| 1049 | 1058 | |
| r18312 | r18313 | |
|---|
| 1186 | 1195 | |
| 1187 | 1196 | DIRECT_UPDATE_MEMBER(a2600_state::modeFE_opbase_handler) |
| 1188 | 1197 | { |
| 1189 | | if ( ! m_FETimer ) |
| 1198 | if ( ! direct.space().debugger_access() ) |
| 1190 | 1199 | { |
| 1191 | | /* Still cheating a bit here by looking bit 13 of the address..., but the high byte of the |
| 1192 | | cpu should be the last byte that was on the data bus and so should determine the bank |
| 1193 | | we should switch in. */ |
| 1194 | | m_bank_base[1] = memregion("user1")->base() + 0x1000 * ( ( address & 0x2000 ) ? 0 : 1 ); |
| 1195 | | membank("bank1")->set_base(m_bank_base[1] ); |
| 1196 | | /* and restore old opbase handler */ |
| 1197 | | machine().device("maincpu")->memory().space(AS_PROGRAM).set_direct_update_handler(m_FE_old_opbase_handler); |
| 1200 | if ( ! m_FETimer ) |
| 1201 | { |
| 1202 | /* Still cheating a bit here by looking bit 13 of the address..., but the high byte of the |
| 1203 | cpu should be the last byte that was on the data bus and so should determine the bank |
| 1204 | we should switch in. */ |
| 1205 | m_bank_base[1] = memregion("user1")->base() + 0x1000 * ( ( address & 0x2000 ) ? 0 : 1 ); |
| 1206 | membank("bank1")->set_base(m_bank_base[1] ); |
| 1207 | /* and restore old opbase handler */ |
| 1208 | machine().device("maincpu")->memory().space(AS_PROGRAM).set_direct_update_handler(m_FE_old_opbase_handler); |
| 1209 | } |
| 1210 | else |
| 1211 | { |
| 1212 | /* Wait for one memory access to have passed (reading of new PCH either from code or from stack) */ |
| 1213 | m_FETimer--; |
| 1214 | } |
| 1198 | 1215 | } |
| 1199 | | else |
| 1200 | | { |
| 1201 | | /* Wait for one memory access to have passed (reading of new PCH either from code or from stack) */ |
| 1202 | | m_FETimer--; |
| 1203 | | } |
| 1204 | 1216 | return address; |
| 1205 | 1217 | } |
| 1206 | 1218 | |