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r18276 Thursday 4th October, 2012 at 06:41:17 UTC by Miodrag Milanović
some megacd refactorin​g by Haze (no whatsnew)
[src/mame/includes]megadriv.h
[src/mame/machine]md_cart.c megacd.c megacd.h megadriv.c megavdp.c

trunk/src/mame/machine/megadriv.c
r18275r18276
10281028      _32x_slave_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
10291029   }
10301030
1031   if (_segacd_68k_cpu != NULL )
1032   {
1033      MACHINE_RESET_CALL( segacd );
1034   }
10351031
1032
10361033}
10371034
10381035void megadriv_stop_scanline_timer(running_machine &machine)
r18275r18276
13791376      printf("32x SLAVE SH2 cpu found '%s'\n", _32x_slave_cpu->tag() );
13801377   }
13811378
1382
1383
1384   sega_cd_connected = 0;
1385   segacd_wordram_mapped = 0;
1386   _segacd_68k_cpu = machine.device<cpu_device>(":segacd:segacd_68k");
1387   if (_segacd_68k_cpu != NULL)
1388   {
1389      printf("Sega CD secondary 68k cpu found '%s'\n", _segacd_68k_cpu->tag() );
1390      sega_cd_connected = 1;
1391      segacd_init_main_cpu(machine);
1392      scd_dma_timer = machine.device<timer_device>(":segacd:scd_dma_timer");
1393
1394   }
1395
13961379   _svp_cpu = machine.device<cpu_device>("svp");
13971380   if (_svp_cpu != NULL)
13981381   {
trunk/src/mame/machine/megavdp.c
r18275r18276
1010#include "sound/sn76496.h"
1111
1212extern cpu_device *_svp_cpu;
13extern int segacd_wordram_mapped;
13extern int sega_cd_connected;
1414extern timer_device* megadriv_scanline_timer;
1515
1616
r18275r18276
490490
491491      // likewise segaCD, at least when reading wordram?
492492      // we might need to check what mode we're in here..
493      if (segacd_wordram_mapped)
493      if (sega_cd_connected)
494494      {
495495         source -= 2;
496496      }
trunk/src/mame/machine/md_cart.c
r18275r18276
10491049   IDLE = 0,
10501050   CMD_WRSR,
10511051   CMD_RDSR,
1052   CMD_READ,
1052   M95320_CMD_READ,
10531053   CMD_WRITE,
10541054   READING,
10551055   WRITING
r18275r18276
11291129                        WEL = 0;
11301130                        break;
11311131                     case 0x03:   // read
1132                        stm_state = CMD_READ;
1132                        stm_state = M95320_CMD_READ;
11331133                        stream_data = 0;
11341134                        break;
11351135                     case 0x04:   // write disable
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11641164                  stream_pos = 0;
11651165               }
11661166               break;
1167            case CMD_READ:
1167            case M95320_CMD_READ:
11681168               stream_data = (stream_data << 1) | (latch ? 1 : 0);
11691169               stream_pos++;
11701170               if (stream_pos == 16)
trunk/src/mame/machine/megacd.c
r18275r18276
66
77// the main MD emulation needs to know the state of these because it appears in the MD regs / affect DMA operations
88int sega_cd_connected = 0x00;
9int segacd_wordram_mapped = 0;
109
1110
11// not in the state because the IRQ_CALLBACK needs it, and that can't be a member function?
12UINT16 a12000_halt_reset_reg = 0x0000;
1213
14/* Callback when the genesis enters interrupt code */
15// needs to be a member
16static IRQ_CALLBACK(segacd_sub_int_callback)
17{
18   if (irqline==2)
19   {
20      // clear this bit
21      a12000_halt_reset_reg &= ~0x0100;
22      device->machine().device(":segacd:segacd_68k")->execute().set_input_line(2, CLEAR_LINE);
23   }
1324
25   return (0x60+irqline*4)/4; // vector address
26}
1427
28
29
30
1531const device_type SEGA_SEGACD_US = &device_creator<sega_segacd_us_device>;
1632const device_type SEGA_SEGACD_JAPAN = &device_creator<sega_segacd_japan_device>;
1733const device_type SEGA_SEGACD_EUROPE = &device_creator<sega_segacd_europe_device>;
r18275r18276
4157}
4258
4359
44static MACHINE_CONFIG_FRAGMENT( segacd_fragment )
4560
46   MCFG_CPU_ADD("segacd_68k", M68000, SEGACD_CLOCK ) /* 12.5 MHz */
47   MCFG_CPU_PROGRAM_MAP(segacd_map)
61TIMER_DEVICE_CALLBACK_MEMBER( sega_segacd_device::segacd_irq3_timer_callback )
62{
63   CHECK_SCD_LV3_INTERRUPT
64   segacd_irq3_timer->adjust(SEGACD_IRQ3_TIMER_SPEED);
65}
4866
49   MCFG_DEVICE_ADD("cdc", LC89510, 0) // cd controller
67TIMER_DEVICE_CALLBACK_MEMBER( sega_segacd_device::scd_dma_timer_callback )
68{
69   // todo: accurate timing of this!
5070
51   MCFG_TIMER_ADD_NONE("sw_timer") //stopwatch timer
71   #define RATE 256
72   CDC_Do_DMA(machine(), RATE);
5273
53   MCFG_DEFAULT_LAYOUT( layout_megacd )
74   // timed reset of flags
75   scd_mode_dmna_ret_flags |= 0x0021;
5476
55   MCFG_SOUND_ADD( "cdda", CDDA, 0 )
56   MCFG_SOUND_ROUTE( 0, ":lspeaker", 0.50 ) // TODO: accurate volume balance
57   MCFG_SOUND_ROUTE( 1, ":rspeaker", 0.50 )
77   scd_dma_timer->adjust(attotime::from_hz(megadriv_framerate) / megadrive_total_scanlines);
5878
59   MCFG_SOUND_ADD("rfsnd", RF5C68, SEGACD_CLOCK) // RF5C164!
60   MCFG_SOUND_ROUTE( 0, ":lspeaker", 0.50 )
61   MCFG_SOUND_ROUTE( 1, ":rspeaker", 0.50 )
79}
6280
63   MCFG_TIMER_ADD("scd_dma_timer", scd_dma_timer_callback)
64
65   MCFG_NVRAM_HANDLER_CLEAR()
66   MCFG_NVRAM_ADD_0FILL("backupram")
67
68   MCFG_QUANTUM_PERFECT_CPU("segacd_68k") // perfect sync to the fastest cpu
69MACHINE_CONFIG_END
70
71
72
73machine_config_constructor sega_segacd_device::device_mconfig_additions() const
81TIMER_DEVICE_CALLBACK_MEMBER( sega_segacd_device::segacd_access_timer_callback )
7482{
75   return MACHINE_CONFIG_NAME( segacd_fragment );
83   CheckCommand(machine());
7684}
7785
86TIMER_DEVICE_CALLBACK_MEMBER( sega_segacd_device::segacd_gfx_conversion_timer_callback )
87{
88   //printf("segacd_gfx_conversion_timer_callback\n");
7889
79/* Sega CD stuff */
80cpu_device *_segacd_68k_cpu;
90   CHECK_SCD_LV1_INTERRUPT
8191
82UINT16 segacd_irq_mask;
83static UINT16 *segacd_backupram;
84static timer_device *stopwatch_timer;
85static UINT8 segacd_font_color;
86static UINT16* segacd_font_bits;
87static UINT16 scd_rammode;
88static UINT32 scd_mode_dmna_ret_flags ;
92   segacd_conversion_active = 0;
8993
90static emu_timer *segacd_gfx_conversion_timer;
91//static emu_timer *segacd_dmna_ret_timer;
92static emu_timer *segacd_irq3_timer;
93static emu_timer *segacd_hock_timer;
94static UINT8 hock_cmd;
95static TIMER_CALLBACK( segacd_irq3_timer_callback );
96timer_device* scd_dma_timer;
94   // this ends up as 0 after processing (soniccd bonus stage)
95   segacd_imagebuffer_vdot_size = 0;
96}
9797
98static void segacd_mark_tiles_dirty(running_machine& machine, int offset);
9998
10099
101/*************************************************************************************************
102 Sega CD related
103*************************************************************************************************/
104100
105// The perfect syncs should make this unnecessary: forcing syncs on reads is a flawed design pattern anyway,
106// because the sync will only happen AFTER the read, by which time it's too late.
107#define SEGACD_FORCE_SYNCS 0
101ADDRESS_MAP_START( segacd_map, AS_PROGRAM, 16, sega_segacd_device )
102   AM_RANGE(0x000000, 0x07ffff) AM_RAM AM_SHARE("segacd_program")
108103
109static UINT8 segacd_ram_writeprotect_bits;
110//int segacd_ram_mode;
111//static int segacd_ram_mode_old;
104   AM_RANGE(0x080000, 0x0bffff) AM_READWRITE(segacd_sub_dataram_part1_r, segacd_sub_dataram_part1_w) AM_SHARE("dataram")
105   AM_RANGE(0x0c0000, 0x0dffff) AM_READWRITE(segacd_sub_dataram_part2_r, segacd_sub_dataram_part2_w) //AM_SHARE("dataram2")
112106
113//static int segacd_maincpu_has_ram_access = 0;
114static int segacd_4meg_prgbank = 0; // which bank the MainCPU can see of the SubCPU PrgRAM
115static int segacd_memory_priority_mode = 0;
116static int segacd_stampsize;
117//int segacd_dmna = 0;
118//int segacd_ret = 0;
107   AM_RANGE(0xfe0000, 0xfe3fff) AM_READWRITE(segacd_backupram_r,segacd_backupram_w) AM_SHARE("backupram") // backup RAM, odd bytes only!
119108
120#define READ_MAIN (0x0200)
121#define READ_SUB  (0x0300)
122#define DMA_PCM  (0x0400)
123#define DMA_PRG  (0x0500)
124#define DMA_WRAM (0x0700)
109   AM_RANGE(0xff0000, 0xff001f) AM_DEVWRITE8_LEGACY("rfsnd", rf5c68_w, 0x00ff)  // PCM, RF5C164
110   AM_RANGE(0xff0020, 0xff003f) AM_DEVREAD8_LEGACY("rfsnd", rf5c68_r, 0x00ff)
111   AM_RANGE(0xff2000, 0xff3fff) AM_DEVREADWRITE8_LEGACY("rfsnd", rf5c68_mem_r, rf5c68_mem_w,0x00ff)  // PCM, RF5C164
125112
126#define REG_W_SBOUT  (0x0)
127#define REG_W_IFCTRL (0x1)
128#define REG_W_DBCL   (0x2)
129#define REG_W_DBCH   (0x3)
130#define REG_W_DACL   (0x4)
131#define REG_W_DACH   (0x5)
132#define REG_W_DTTRG  (0x6)
133#define REG_W_DTACK  (0x7)
134#define REG_W_WAL    (0x8)
135#define REG_W_WAH    (0x9)
136#define REG_W_CTRL0  (0xA)
137#define REG_W_CTRL1  (0xB)
138#define REG_W_PTL    (0xC)
139#define REG_W_PTH    (0xD)
140#define REG_W_CTRL2  (0xE)
141#define REG_W_RESET  (0xF)
142113
143#define REG_R_COMIN  (0x0)
144#define REG_R_IFSTAT (0x1)
145#define REG_R_DBCL   (0x2)
146#define REG_R_DBCH   (0x3)
147#define REG_R_HEAD0  (0x4)
148#define REG_R_HEAD1  (0x5)
149#define REG_R_HEAD2  (0x6)
150#define REG_R_HEAD3  (0x7)
151#define REG_R_PTL    (0x8)
152#define REG_R_PTH    (0x9)
153#define REG_R_WAL    (0xa)
154#define REG_R_WAH    (0xb)
155#define REG_R_STAT0  (0xc)
156#define REG_R_STAT1  (0xd)
157#define REG_R_STAT2  (0xe)
158#define REG_R_STAT3  (0xf)
114   AM_RANGE(0xff8000 ,0xff8001) AM_READWRITE(segacd_sub_led_ready_r, segacd_sub_led_ready_w)
115   AM_RANGE(0xff8002 ,0xff8003) AM_READWRITE(segacd_sub_memory_mode_r, segacd_sub_memory_mode_w)
159116
160#define CMD_STATUS   (0x0)
161#define CMD_STOPALL  (0x1)
162#define CMD_GETTOC   (0x2)
163#define CMD_READ     (0x3)
164#define CMD_SEEK     (0x4)
165//                   (0x5)
166#define CMD_STOP     (0x6)
167#define CMD_RESUME   (0x7)
168#define CMD_FF       (0x8)
169#define CMD_RW       (0x9)
170#define CMD_INIT     (0xa)
171//                   (0xb)
172#define CMD_CLOSE    (0xc)
173#define CMD_OPEN     (0xd)
174//                   (0xe)
175//                   (0xf)
117   AM_RANGE(0xff8004 ,0xff8005) AM_READWRITE(segacd_cdc_mode_address_r, segacd_cdc_mode_address_w)
118   AM_RANGE(0xff8006 ,0xff8007) AM_READWRITE(segacd_cdc_data_r, segacd_cdc_data_w)
119   AM_RANGE(0xff8008, 0xff8009) AM_READ(cdc_data_sub_r)
120   AM_RANGE(0xff800a, 0xff800b) AM_READWRITE(cdc_dmaaddr_r,cdc_dmaaddr_w) // CDC DMA Address
121   AM_RANGE(0xff800c, 0xff800d) AM_READWRITE(segacd_stopwatch_timer_r, segacd_stopwatch_timer_w)// Stopwatch timer
122   AM_RANGE(0xff800e ,0xff800f) AM_READWRITE(segacd_comms_flags_r, segacd_comms_flags_subcpu_w)
123   AM_RANGE(0xff8010 ,0xff801f) AM_READWRITE(segacd_comms_sub_part1_r, segacd_comms_sub_part1_w)
124   AM_RANGE(0xff8020 ,0xff802f) AM_READWRITE(segacd_comms_sub_part2_r, segacd_comms_sub_part2_w)
125   AM_RANGE(0xff8030, 0xff8031) AM_READWRITE(segacd_irq3timer_r, segacd_irq3timer_w) // Timer W/INT3
126   AM_RANGE(0xff8032, 0xff8033) AM_READWRITE(segacd_irq_mask_r,segacd_irq_mask_w)
127   AM_RANGE(0xff8034, 0xff8035) AM_READWRITE(segacd_cdfader_r,segacd_cdfader_w) // CD Fader
128   AM_RANGE(0xff8036, 0xff8037) AM_READWRITE(segacd_cdd_ctrl_r,segacd_cdd_ctrl_w)
129   AM_RANGE(0xff8038, 0xff8041) AM_READ8(segacd_cdd_rx_r,0xffff)
130   AM_RANGE(0xff8042, 0xff804b) AM_WRITE8(segacd_cdd_tx_w,0xffff)
131   AM_RANGE(0xff804c, 0xff804d) AM_READWRITE(segacd_font_color_r, segacd_font_color_w)
132   AM_RANGE(0xff804e, 0xff804f) AM_RAM AM_SHARE("segacd_font")
133   AM_RANGE(0xff8050, 0xff8057) AM_READ(segacd_font_converted_r)
134   AM_RANGE(0xff8058, 0xff8059) AM_READWRITE(segacd_stampsize_r, segacd_stampsize_w) // Stamp size
135   AM_RANGE(0xff805a, 0xff805b) AM_READWRITE(segacd_stampmap_base_address_r, segacd_stampmap_base_address_w) // Stamp map base address
136   AM_RANGE(0xff805c, 0xff805d) AM_READWRITE(segacd_imagebuffer_vcell_size_r, segacd_imagebuffer_vcell_size_w)// Image buffer V cell size
137   AM_RANGE(0xff805e, 0xff805f) AM_READWRITE(segacd_imagebuffer_start_address_r, segacd_imagebuffer_start_address_w) // Image buffer start address
138   AM_RANGE(0xff8060, 0xff8061) AM_READWRITE(segacd_imagebuffer_offset_r, segacd_imagebuffer_offset_w)
139   AM_RANGE(0xff8062, 0xff8063) AM_READWRITE(segacd_imagebuffer_hdot_size_r, segacd_imagebuffer_hdot_size_w) // Image buffer H dot size
140   AM_RANGE(0xff8064, 0xff8065) AM_READWRITE(segacd_imagebuffer_vdot_size_r, segacd_imagebuffer_vdot_size_w ) // Image buffer V dot size
141   AM_RANGE(0xff8066, 0xff8067) AM_WRITE(segacd_trace_vector_base_address_w)// Trace vector base address
142//  AM_RANGE(0xff8068, 0xff8069) // Subcode address
176143
144//  AM_RANGE(0xff8100, 0xff817f) // Subcode buffer area
145//  AM_RANGE(0xff8180, 0xff81ff) // mirror of subcode buffer area
177146
178#define TOCCMD_CURPOS    (0x0)
179#define TOCCMD_TRKPOS    (0x1)
180#define TOCCMD_CURTRK    (0x2)
181#define TOCCMD_LENGTH    (0x3)
182#define TOCCMD_FIRSTLAST (0x4)
183#define TOCCMD_TRACKADDR (0x5)
147ADDRESS_MAP_END
184148
185struct segacd_t
186{
187   cdrom_file   *cd;
188   const cdrom_toc   *toc;
189   UINT32 current_frame;
190};
149static MACHINE_CONFIG_FRAGMENT( segacd_fragment )
191150
192segacd_t segacd;
151   MCFG_CPU_ADD("segacd_68k", M68000, SEGACD_CLOCK ) /* 12.5 MHz */
152   MCFG_CPU_PROGRAM_MAP(segacd_map)
193153
194#define SECTOR_SIZE (2352)
154   MCFG_DEVICE_ADD("cdc", LC89510, 0) // cd controller
195155
196#define SET_CDD_DATA_MODE \
197   CDD_CONTROL |= 0x0100; \
156   MCFG_TIMER_ADD_NONE("sw_timer") //stopwatch timer
157   MCFG_TIMER_DRIVER_ADD_PERIODIC("hock_timer", sega_segacd_device, segacd_access_timer_callback, attotime::from_hz(75))
158   MCFG_TIMER_DRIVER_ADD("irq3_timer", sega_segacd_device, segacd_irq3_timer_callback)
159   MCFG_TIMER_DRIVER_ADD("stamp_timer", sega_segacd_device, segacd_gfx_conversion_timer_callback)
160   MCFG_TIMER_DRIVER_ADD("scd_dma_timer", sega_segacd_device, scd_dma_timer_callback)
198161
199#define SET_CDD_AUDIO_MODE \
200   CDD_CONTROL &= ~0x0100; \
162   
201163
202#define STOP_CDC_READ \
203   SCD_STATUS_CDC &= ~0x01; \
164   MCFG_DEFAULT_LAYOUT( layout_megacd )
204165
205#define SET_CDC_READ \
206   SCD_STATUS_CDC |= 0x01; \
166   MCFG_SOUND_ADD( "cdda", CDDA, 0 )
167   MCFG_SOUND_ROUTE( 0, ":lspeaker", 0.50 ) // TODO: accurate volume balance
168   MCFG_SOUND_ROUTE( 1, ":rspeaker", 0.50 )
207169
208#define SET_CDC_DMA \
209   SCD_STATUS_CDC |= 0x08; \
170   MCFG_SOUND_ADD("rfsnd", RF5C68, SEGACD_CLOCK) // RF5C164!
171   MCFG_SOUND_ROUTE( 0, ":lspeaker", 0.50 )
172   MCFG_SOUND_ROUTE( 1, ":rspeaker", 0.50 )
210173
211#define STOP_CDC_DMA \
212   SCD_STATUS_CDC &= ~0x08; \
213174
214#define SCD_READ_ENABLED \
215   (SCD_STATUS_CDC & 1)
175   MCFG_NVRAM_HANDLER_CLEAR()
176   MCFG_NVRAM_ADD_0FILL("backupram")
216177
217#define SCD_DMA_ENABLED \
218   (SCD_STATUS_CDC & 0x08)
178   MCFG_QUANTUM_PERFECT_CPU("segacd_68k") // perfect sync to the fastest cpu
179MACHINE_CONFIG_END
219180
220#define CLEAR_CDD_RESULT \
221   CDD_MIN = CDD_SEC = CDD_FRAME = CDD_EXT = 0; \
222181
223#define CHECK_SCD_LV5_INTERRUPT \
224   if (segacd_irq_mask & 0x20) \
225   { \
226      machine.device(":segacd:segacd_68k")->execute().set_input_line(5, HOLD_LINE); \
227   } \
228182
229#define CHECK_SCD_LV4_INTERRUPT \
230   if (segacd_irq_mask & 0x10) \
231   { \
232      machine.device(":segacd:segacd_68k")->execute().set_input_line(4, HOLD_LINE); \
233   } \
183machine_config_constructor sega_segacd_device::device_mconfig_additions() const
184{
185   return MACHINE_CONFIG_NAME( segacd_fragment );
186}
234187
235#define CHECK_SCD_LV3_INTERRUPT \
236   if (segacd_irq_mask & 0x08) \
237   { \
238      machine.device(":segacd:segacd_68k")->execute().set_input_line(3, HOLD_LINE); \
239   } \
240188
241#define CHECK_SCD_LV2_INTERRUPT \
242   if (segacd_irq_mask & 0x04) \
243   { \
244      machine.device(":segacd:segacd_68k")->execute().set_input_line(2, HOLD_LINE); \
245   } \
246189
247#define CHECK_SCD_LV1_INTERRUPT \
248   if (segacd_irq_mask & 0x02) \
249   { \
250      machine.device(":segacd:segacd_68k")->execute().set_input_line(1, HOLD_LINE); \
251   } \
252190
253#define CURRENT_TRACK_IS_DATA \
254   (segacd.toc->tracks[SCD_CURTRK - 1].trktype != CD_TRACK_AUDIO) \
255191
256
257
258INLINE int to_bcd(int val, bool byte)
192inline int sega_segacd_device::to_bcd(int val, bool byte)
259193{
260194   if (val > 99) val = 99;
261195
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265199
266200
267201
268UINT16* segacd_4meg_prgram;  // pointer to SubCPU PrgRAM
269UINT16* segacd_dataram;
270202
271#define RAM_MODE_2MEG (0)
272#define RAM_MODE_1MEG (2)
273203
274204
275205
276INLINE void write_pixel(running_machine& machine, UINT8 pix, int pixeloffset )
206inline void sega_segacd_device::write_pixel(running_machine& machine, UINT8 pix, int pixeloffset )
277207{
278208
279209   int shift = 12-(4*(pixeloffset&0x3));
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321251// Wily Beamish and Citizen X appear to rely on this
322252// however, it breaks the megacdj bios (megacd2j still works!)
323253//  (maybe that's a timing issue instead?)
324UINT16 segacd_1meg_mode_word_read(int offset, UINT16 mem_mask)
254UINT16 sega_segacd_device::segacd_1meg_mode_word_read(int offset, UINT16 mem_mask)
325255{
326256   offset *= 2;
327257
r18275r18276
334264}
335265
336266
337void segacd_1meg_mode_word_write(running_machine& machine, int offset, UINT16 data, UINT16 mem_mask, int use_pm)
267void sega_segacd_device::segacd_1meg_mode_word_write(running_machine& machine, int offset, UINT16 data, UINT16 mem_mask, int use_pm)
338268{
339269   offset *= 2;
340270
r18275r18276
393323}
394324
395325
396static UINT16* segacd_dataram2;
397326
398UINT8    SCD_BUFFER[2560];
399UINT32   SCD_STATUS;
400UINT32   SCD_STATUS_CDC;
401INT32    SCD_CURLBA;
402UINT8    SCD_CURTRK;
403
404UINT16 CDC_DECODE;
405INT16 CDC_DMACNT; // can go negative
406UINT16 CDC_DMA_ADDRC;
407UINT16 CDC_PT;
408UINT16 CDC_WA;
409UINT16 CDC_REG0;
410UINT16 CDC_REG1;
411UINT16 CDC_DMA_ADDR;
412UINT16 CDC_IFSTAT;
413UINT8 CDC_HEADB0;
414UINT8 CDC_HEADB1;
415UINT8 CDC_HEADB2;
416UINT8 CDC_HEADB3;
417UINT8 CDC_STATB0;
418UINT8 CDC_STATB1;
419UINT8 CDC_STATB2;
420UINT8 CDC_STATB3;
421UINT16 CDC_SBOUT;
422UINT16 CDC_IFCTRL;
423UINT8 CDC_CTRLB0;
424UINT8 CDC_CTRLB1;
425UINT8 CDC_CTRLB2;
426UINT8 CDC_BUFFER[(32 * 1024 * 2) + SECTOR_SIZE];
427
428UINT32 CDD_STATUS;
429UINT32 CDD_MIN;
430UINT32 CDD_SEC;
431
432UINT8 CDD_RX[10];
433UINT8 CDD_TX[10];
434UINT32 CDD_FRAME;
435UINT32 CDD_EXT;
436UINT16 CDD_CONTROL;
437INT16  CDD_DONE;
438
439static void set_data_audio_mode(void)
327void sega_segacd_device::set_data_audio_mode(void)
440328{
441329   if (CURRENT_TRACK_IS_DATA)
442330   {
r18275r18276
449337   }
450338}
451339
452
453#define CDD_PLAYINGCDDA   0x0100
454#define CDD_READY      0x0400
455#define CDD_STOPPED      0x0900
456
457void CDD_DoChecksum(void)
340void sega_segacd_device::CDD_DoChecksum(void)
458341{
459342   int checksum =
460343      CDD_RX[0] +
r18275r18276
473356   CDD_RX[8] = checksum;
474357}
475358
476void CDD_Export(void)
359void sega_segacd_device::CDD_Export(void)
477360{
478361   CDD_RX[0] = (CDD_STATUS  & 0x00ff)>>0;
479362   CDD_RX[1] = (CDD_STATUS  & 0xff00)>>8;
r18275r18276
494377
495378
496379
497void CDC_UpdateHEAD(void)
380void sega_segacd_device::CDC_UpdateHEAD(void)
498381{
499382   if (CDC_CTRLB1 & 0x01)
500383   {
r18275r18276
511394}
512395
513396
514void scd_ctrl_checks(running_machine& machine)
397void sega_segacd_device::scd_ctrl_checks(running_machine& machine)
515398{
516399   CDC_STATB0 = 0x80;
517400
r18275r18276
526409   }
527410}
528411
529void scd_advance_current_readpos(void)
412void sega_segacd_device::scd_advance_current_readpos(void)
530413{
531414   SCD_CURLBA++;
532415
r18275r18276
537420   CDC_PT &= 0x7fff;
538421}
539422
540int Read_LBA_To_Buffer(running_machine& machine)
423int sega_segacd_device::Read_LBA_To_Buffer(running_machine& machine)
541424{
542425   bool data_track = false;
543426   if (CDD_CONTROL & 0x0100) data_track = true;
r18275r18276
579462   return 0;
580463}
581464
582static void CheckCommand(running_machine& machine)
465void sega_segacd_device::CheckCommand(running_machine& machine)
583466{
584467   if (CDD_DONE)
585468   {
r18275r18276
596479}
597480
598481
599void CDD_GetStatus(void)
482void sega_segacd_device::CDD_GetStatus(void)
600483{
601484   UINT16 s = (CDD_STATUS & 0x0f00);
602485
r18275r18276
605488}
606489
607490
608void CDD_Stop(running_machine &machine)
491void sega_segacd_device::CDD_Stop(running_machine &machine)
609492{
610493   CLEAR_CDD_RESULT
611494   STOP_CDC_READ
r18275r18276
616499}
617500
618501
619void CDD_GetPos(void)
502void sega_segacd_device::CDD_GetPos(void)
620503{
621504   CLEAR_CDD_RESULT
622505   UINT32 msf;
r18275r18276
630513   CDD_FRAME = to_bcd(((msf & 0x000000ff)>>0),false);
631514}
632515
633void CDD_GetTrackPos(void)
516void sega_segacd_device::CDD_GetTrackPos(void)
634517{
635518   CLEAR_CDD_RESULT
636519   int elapsedlba;
r18275r18276
648531   CDD_FRAME = to_bcd(((msf & 0x000000ff)>>0),false);
649532}
650533
651void CDD_GetTrack(void)
534void sega_segacd_device::CDD_GetTrack(void)
652535{
653536   CLEAR_CDD_RESULT
654537   CDD_STATUS &= 0xFF;
r18275r18276
659542   CDD_MIN = to_bcd(SCD_CURTRK, false);
660543}
661544
662void CDD_Length(void)
545void sega_segacd_device::CDD_Length(void)
663546{
664547   CLEAR_CDD_RESULT
665548   CDD_STATUS &= 0xFF;
r18275r18276
676559}
677560
678561
679void CDD_FirstLast(void)
562void sega_segacd_device::CDD_FirstLast(void)
680563{
681564   CLEAR_CDD_RESULT
682565   CDD_STATUS &= 0xFF;
r18275r18276
687570   CDD_SEC = to_bcd(cdrom_get_last_track(segacd.cd),false); // last
688571}
689572
690void CDD_GetTrackAdr(void)
573void sega_segacd_device::CDD_GetTrackAdr(void)
691574{
692575   CLEAR_CDD_RESULT
693576
r18275r18276
717600      CDD_FRAME |= 0x0800;
718601}
719602
720static UINT32 getmsf_from_regs(void)
603UINT32 sega_segacd_device::getmsf_from_regs(void)
721604{
722605   UINT32 msf = 0;
723606
r18275r18276
728611   return msf;
729612}
730613
731void CDD_Play(running_machine &machine)
614void sega_segacd_device::CDD_Play(running_machine &machine)
732615{
733616   CLEAR_CDD_RESULT
734617   UINT32 msf = getmsf_from_regs();
r18275r18276
747630}
748631
749632
750void CDD_Seek(void)
633void sega_segacd_device::CDD_Seek(void)
751634{
752635   CLEAR_CDD_RESULT
753636   UINT32 msf = getmsf_from_regs();
r18275r18276
761644}
762645
763646
764void CDD_Pause(running_machine &machine)
647void sega_segacd_device::CDD_Pause(running_machine &machine)
765648{
766649   CLEAR_CDD_RESULT
767650   STOP_CDC_READ
r18275r18276
774657   cdda_pause_audio( machine.device( ":segacd:cdda" ), 1 );
775658}
776659
777void CDD_Resume(running_machine &machine)
660void sega_segacd_device::CDD_Resume(running_machine &machine)
778661{
779662   CLEAR_CDD_RESULT
780663   STOP_CDC_READ
r18275r18276
789672}
790673
791674
792void CDD_FF(running_machine &machine)
675void sega_segacd_device::CDD_FF(running_machine &machine)
793676{
794677   fatalerror("Fast Forward unsupported\n");
795678}
796679
797680
798void CDD_RW(running_machine &machine)
681void sega_segacd_device::CDD_RW(running_machine &machine)
799682{
800683   fatalerror("Fast Rewind unsupported\n");
801684}
802685
803686
804void CDD_Open(void)
687void sega_segacd_device::CDD_Open(void)
805688{
806689   fatalerror("Close Tray unsupported\n");
807690   /* TODO: re-read CD-ROM buffer here (Mega CD has multi disc games iirc?) */
808691}
809692
810693
811void CDD_Close(void)
694void sega_segacd_device::CDD_Close(void)
812695{
813696   fatalerror("Open Tray unsupported\n");
814697   /* TODO: clear CD-ROM buffer here */
815698}
816699
817700
818void CDD_Init(void)
701void sega_segacd_device::CDD_Init(void)
819702{
820703   CLEAR_CDD_RESULT
821704   STOP_CDC_READ
r18275r18276
826709}
827710
828711
829void CDD_Default(void)
712void sega_segacd_device::CDD_Default(void)
830713{
831714   CLEAR_CDD_RESULT
832715   CDD_STATUS = SCD_STATUS;
833716}
834717
835718
836static void CDD_Reset(void)
719void sega_segacd_device::CDD_Reset(void)
837720{
838721   CLEAR_CDD_RESULT
839722   CDD_CONTROL = CDD_STATUS = 0;
r18275r18276
847730   SCD_STATUS = CDD_READY;
848731}
849732
850static void CDC_Reset(void)
733void sega_segacd_device::CDC_Reset(void)
851734{
852735   memset(CDC_BUFFER, 0x00, ((16 * 1024 * 2) + SECTOR_SIZE));
853736   CDC_UpdateHEAD();
r18275r18276
862745}
863746
864747
865void lc89510_Reset(void)
748void sega_segacd_device::lc89510_Reset(void)
866749{
867750   CDD_Reset();
868751   CDC_Reset();
r18275r18276
870753   CDC_REG0 = CDC_REG1 = CDC_DMA_ADDR = SCD_STATUS_CDC = CDD_DONE = 0;
871754}
872755
873void CDC_End_Transfer(running_machine& machine)
756void sega_segacd_device::CDC_End_Transfer(running_machine& machine)
874757{
875758   STOP_CDC_DMA
876759   CDC_REG0 |= 0x8000;
r18275r18276
884767   }
885768}
886769
887void CDC_Do_DMA(running_machine& machine, int rate)
770void sega_segacd_device::CDC_Do_DMA(running_machine& machine, int rate)
888771{
889772   address_space& space = machine.device(":segacd:segacd_68k")->memory().space(AS_PROGRAM);
890773
r18275r18276
1018901
1019902
1020903
1021UINT16 CDC_Host_r(running_machine& machine, UINT16 type)
904UINT16 sega_segacd_device::CDC_Host_r(running_machine& machine, UINT16 type)
1022905{
1023906   UINT16 destination = CDC_REG0 & 0x0700;
1024907
r18275r18276
1046929}
1047930
1048931
1049UINT8 CDC_Reg_r(void)
932UINT8 sega_segacd_device::CDC_Reg_r(void)
1050933{
1051934   int reg = CDC_REG0 & 0xF;
1052935   UINT8 ret = 0;
r18275r18276
1092975   return ret;
1093976}
1094977
1095void CDC_Reg_w(UINT8 data)
978void sega_segacd_device::CDC_Reg_w(UINT8 data)
1096979{
1097980   int reg = CDC_REG0 & 0xF;
1098981
r18275r18276
11441027   }
11451028}
11461029
1147void CDD_Process(running_machine& machine, int reason)
1030void sega_segacd_device::CDD_Process(running_machine& machine, int reason)
11481031{
11491032   CDD_Export();
11501033   CHECK_SCD_LV4_INTERRUPT
11511034}
11521035
1153void CDD_Handle_TOC_Commands(void)
1036void sega_segacd_device::CDD_Handle_TOC_Commands(void)
11541037{
11551038   int subcmd = CDD_TX[2];
11561039   CDD_STATUS = (CDD_STATUS & 0xFF00) | subcmd;
r18275r18276
11871070   "<undefined>"         // F
11881071};
11891072
1190void CDD_Import(running_machine& machine)
1073void sega_segacd_device::CDD_Import(running_machine& machine)
11911074{
11921075   if(CDD_TX[1] != 2 && CDD_TX[1] != 0)
11931076      printf("%s\n",CDD_import_cmdnames[CDD_TX[1]]);
r18275r18276
12151098
12161099
12171100
1218
1219static UINT16 segacd_hint_register;
1220static UINT16 segacd_imagebuffer_vdot_size;
1221static UINT16 segacd_imagebuffer_vcell_size;
1222static UINT16 segacd_imagebuffer_hdot_size;
1223
1224static UINT16 a12000_halt_reset_reg = 0x0000;
1225int segacd_conversion_active = 0;
1226static UINT16 segacd_stampmap_base_address;
1227static UINT16 segacd_imagebuffer_start_address;
1228static UINT16 segacd_imagebuffer_offset;
1229static tilemap_t    *segacd_stampmap[4];
1230//static void segacd_mark_stampmaps_dirty(void);
1231
1232
1233
1234static WRITE16_HANDLER( scd_a12000_halt_reset_w )
1101WRITE16_MEMBER( sega_segacd_device::scd_a12000_halt_reset_w )
12351102{
1236   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1103   
12371104
12381105   UINT16 old_halt = a12000_halt_reset_reg;
12391106
r18275r18276
12841151   }
12851152}
12861153
1287static READ16_HANDLER( scd_a12000_halt_reset_r )
1154READ16_MEMBER( sega_segacd_device::scd_a12000_halt_reset_r )
12881155{
1289   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1290
12911156   return a12000_halt_reset_reg;
12921157}
12931158
r18275r18276
13031168//
13041169
13051170
1306static READ16_HANDLER( scd_a12002_memory_mode_r )
1171READ16_MEMBER( sega_segacd_device::scd_a12002_memory_mode_r )
13071172{
1308   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1173   
13091174
13101175   int temp = scd_rammode;
13111176   int temp2 = 0;
r18275r18276
13301195// RET = Return access (bit 1)
13311196
13321197
1333static WRITE8_HANDLER( scd_a12002_memory_mode_w_8_15 )
1198WRITE8_MEMBER( sega_segacd_device::scd_a12002_memory_mode_w_8_15 )
13341199{
13351200   if (data & 0xff00)
13361201   {
r18275r18276
13411206}
13421207
13431208
1344static WRITE8_HANDLER( scd_a12002_memory_mode_w_0_7 )
1209WRITE8_MEMBER( sega_segacd_device::scd_a12002_memory_mode_w_0_7 )
13451210{
1346   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1211   
13471212
13481213
13491214   //printf("scd_a12002_memory_mode_w_0_7 %04x\n",data);
r18275r18276
13671232}
13681233
13691234
1370static WRITE16_HANDLER( scd_a12002_memory_mode_w )
1235WRITE16_MEMBER( sega_segacd_device::scd_a12002_memory_mode_w )
13711236{
1372   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1237   
13731238
13741239   if (ACCESSING_BITS_8_15)
13751240      scd_a12002_memory_mode_w_8_15(space, 0, data>>8, mem_mask>>8);
r18275r18276
13811246
13821247
13831248
1384static READ16_HANDLER( segacd_sub_memory_mode_r )
1249READ16_MEMBER( sega_segacd_device::segacd_sub_memory_mode_r )
13851250{
1386   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1251   
13871252
13881253   int temp = scd_rammode;
13891254   int temp2 = 0;
r18275r18276
13961261}
13971262
13981263
1399WRITE8_HANDLER( segacd_sub_memory_mode_w_8_15 )
1264WRITE8_MEMBER( sega_segacd_device::segacd_sub_memory_mode_w_8_15 )
14001265{
14011266   /* setting write protect bits from sub-cpu has no effect? */
14021267}
14031268
14041269
14051270
1406WRITE8_HANDLER( segacd_sub_memory_mode_w_0_7 )
1271WRITE8_MEMBER( sega_segacd_device::segacd_sub_memory_mode_w_0_7 )
14071272{
1408   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1273   
14091274
14101275
14111276   segacd_memory_priority_mode = (data&0x0018)>>3;
r18275r18276
14621327   }
14631328}
14641329
1465static WRITE16_HANDLER( segacd_sub_memory_mode_w )
1330WRITE16_MEMBER( sega_segacd_device::segacd_sub_memory_mode_w )
14661331{
14671332   //printf("segacd_sub_memory_mode_w %04x %04x\n", data, mem_mask);
1468   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1333   
14691334
14701335   if (ACCESSING_BITS_8_15)
14711336      segacd_sub_memory_mode_w_8_15(space, 0, data>>8, mem_mask>>8);
r18275r18276
14841349  - main / sub sides differ in which bits are write only
14851350********************************************************************************/
14861351
1487static UINT16 segacd_comms_flags = 0x0000;
14881352
1489static READ16_HANDLER( segacd_comms_flags_r )
1353READ16_MEMBER( sega_segacd_device::segacd_comms_flags_r )
14901354{
1491   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1355   
14921356   return segacd_comms_flags;
14931357}
14941358
1495static WRITE16_HANDLER( segacd_comms_flags_subcpu_w )
1359WRITE16_MEMBER( sega_segacd_device::segacd_comms_flags_subcpu_w )
14961360{
1497   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1361   
14981362
14991363   if (ACCESSING_BITS_8_15) // Dragon's Lair
15001364   {
r18275r18276
15081372   }
15091373}
15101374
1511static WRITE16_HANDLER( segacd_comms_flags_maincpu_w )
1375WRITE16_MEMBER( sega_segacd_device::segacd_comms_flags_maincpu_w )
15121376{
1513   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1377   
15141378
15151379   if (ACCESSING_BITS_8_15)
15161380   {
r18275r18276
15241388   }
15251389}
15261390
1527static READ16_HANDLER( scd_4m_prgbank_ram_r )
1391READ16_MEMBER( sega_segacd_device::scd_4m_prgbank_ram_r )
15281392{
15291393   UINT16 realoffset = ((segacd_4meg_prgbank * 0x20000)/2) + offset;
15301394   return segacd_4meg_prgram[realoffset];
15311395
15321396}
15331397
1534static WRITE16_HANDLER( scd_4m_prgbank_ram_w )
1398WRITE16_MEMBER( sega_segacd_device::scd_4m_prgbank_ram_w )
15351399{
15361400   UINT16 realoffset = ((segacd_4meg_prgbank * 0x20000)/2) + offset;
15371401
r18275r18276
15431407}
15441408
15451409
1546/* Callback when the genesis enters interrupt code */
1547static IRQ_CALLBACK(segacd_sub_int_callback)
1548{
1549   if (irqline==2)
1550   {
1551      // clear this bit
1552      a12000_halt_reset_reg &= ~0x0100;
1553      device->machine().device(":segacd:segacd_68k")->execute().set_input_line(2, CLEAR_LINE);
1554   }
15551410
1556   return (0x60+irqline*4)/4; // vector address
1557}
1558
1559UINT16 segacd_comms_part1[0x8];
1560UINT16 segacd_comms_part2[0x8];
1561
1562static READ16_HANDLER( segacd_comms_main_part1_r )
1411READ16_MEMBER( sega_segacd_device::segacd_comms_main_part1_r )
15631412{
1564   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1413   
15651414   return segacd_comms_part1[offset];
15661415}
15671416
1568static WRITE16_HANDLER( segacd_comms_main_part1_w )
1417WRITE16_MEMBER( sega_segacd_device::segacd_comms_main_part1_w )
15691418{
1570   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1419   
15711420   COMBINE_DATA(&segacd_comms_part1[offset]);
15721421}
15731422
1574static READ16_HANDLER( segacd_comms_main_part2_r )
1423READ16_MEMBER( sega_segacd_device::segacd_comms_main_part2_r )
15751424{
1576   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1425   
15771426   return segacd_comms_part2[offset];
15781427}
15791428
1580static WRITE16_HANDLER( segacd_comms_main_part2_w )
1429WRITE16_MEMBER( sega_segacd_device::segacd_comms_main_part2_w )
15811430{
15821431   printf("Sega CD main CPU attempting to write to read only comms regs\n");
15831432}
15841433
15851434
1586static READ16_HANDLER( segacd_comms_sub_part1_r )
1435READ16_MEMBER( sega_segacd_device::segacd_comms_sub_part1_r )
15871436{
1588   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1437   
15891438   return segacd_comms_part1[offset];
15901439}
15911440
1592static WRITE16_HANDLER( segacd_comms_sub_part1_w )
1441WRITE16_MEMBER( sega_segacd_device::segacd_comms_sub_part1_w )
15931442{
15941443   printf("Sega CD sub CPU attempting to write to read only comms regs\n");
15951444}
15961445
1597static READ16_HANDLER( segacd_comms_sub_part2_r )
1446READ16_MEMBER( sega_segacd_device::segacd_comms_sub_part2_r )
15981447{
1599   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1448   
16001449   return segacd_comms_part2[offset];
16011450}
16021451
1603static WRITE16_HANDLER( segacd_comms_sub_part2_w )
1452WRITE16_MEMBER( sega_segacd_device::segacd_comms_sub_part2_w )
16041453{
1605   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1454   
16061455   COMBINE_DATA(&segacd_comms_part2[offset]);
16071456}
16081457
r18275r18276
16121461
16131462
16141463
1615static WRITE16_HANDLER( segacd_cdc_mode_address_w )
1464WRITE16_MEMBER( sega_segacd_device::segacd_cdc_mode_address_w )
16161465{
16171466   COMBINE_DATA(&CDC_REG0);
16181467}
16191468
1620static READ16_HANDLER( segacd_cdc_mode_address_r )
1469READ16_MEMBER( sega_segacd_device::segacd_cdc_mode_address_r )
16211470{
16221471   return CDC_REG0;
16231472}
16241473
1625static WRITE16_HANDLER( segacd_cdc_data_w )
1474WRITE16_MEMBER( sega_segacd_device::segacd_cdc_data_w )
16261475{
16271476   COMBINE_DATA(&CDC_REG1);
16281477
r18275r18276
16301479      CDC_Reg_w(data);
16311480}
16321481
1633static READ16_HANDLER( segacd_cdc_data_r )
1482READ16_MEMBER( sega_segacd_device::segacd_cdc_data_r )
16341483{
16351484   UINT16 retdat = 0x0000;
16361485
r18275r18276
16441493
16451494
16461495
1647static READ16_HANDLER( segacd_main_dataram_part1_r )
1496READ16_MEMBER( sega_segacd_device::segacd_main_dataram_part1_r )
16481497{
16491498   if ((scd_rammode&2)==RAM_MODE_2MEG)
16501499   {
r18275r18276
17121561   return 0x0000;
17131562}
17141563
1715static WRITE16_HANDLER( segacd_main_dataram_part1_w )
1564WRITE16_MEMBER( sega_segacd_device::segacd_main_dataram_part1_w )
17161565{
17171566   if ((scd_rammode&2)==RAM_MODE_2MEG)
17181567   {
r18275r18276
17521601   }
17531602}
17541603
1755static READ16_HANDLER( scd_hint_vector_r )
1604READ16_MEMBER( sega_segacd_device::scd_hint_vector_r )
17561605{
17571606//  printf("read HINT offset %d\n", offset);
17581607
r18275r18276
17691618
17701619}
17711620
1772static READ16_HANDLER( scd_a12006_hint_register_r )
1621READ16_MEMBER( sega_segacd_device::scd_a12006_hint_register_r )
17731622{
1774   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1623   
17751624   return segacd_hint_register;
17761625}
17771626
1778static WRITE16_HANDLER( scd_a12006_hint_register_w )
1627WRITE16_MEMBER( sega_segacd_device::scd_a12006_hint_register_w )
17791628{
1780   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
1629   
17811630   COMBINE_DATA(&segacd_hint_register);
17821631}
17831632
17841633
1785static TIMER_CALLBACK( segacd_gfx_conversion_timer_callback )
1786{
1787   //printf("segacd_gfx_conversion_timer_callback\n");
17881634
1789   CHECK_SCD_LV1_INTERRUPT
17901635
1791   segacd_conversion_active = 0;
17921636
1793   // this ends up as 0 after processing (soniccd bonus stage)
1794   segacd_imagebuffer_vdot_size = 0;
17951637
1796}
1797
1798
1799// the tiles in RAM are 8x8 tiles
1800// they are referenced in the cell look-up map as either 16x16 or 32x32 tiles (made of 4 / 16 8x8 tiles)
1801
1802#define SEGACD_BYTES_PER_TILE16 (128)
1803#define SEGACD_BYTES_PER_TILE32 (512)
1804
1805#define SEGACD_NUM_TILES16 (0x40000/SEGACD_BYTES_PER_TILE16)
1806#define SEGACD_NUM_TILES32 (0x40000/SEGACD_BYTES_PER_TILE32)
1807
1808/*
1809static const gfx_layout sega_8x8_layout =
1638void sega_segacd_device::segacd_mark_tiles_dirty(running_machine& machine, int offset)
18101639{
1811    8,8,
1812    SEGACD_NUM_TILES16,
1813    4,
1814    { 0,1,2,3 },
1815    { 8,12,0,4,24,28,16,20 },
1816    { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
1817    8*32
1818};
1819*/
1820
1821/* also create pre-rotated versions.. - it might still be possible to use these decodes with our own copying routines */
1822
1823
1824#define _16x16_SEQUENCE_1  { 8,12,0,4,24,28,16,20, 512+8, 512+12, 512+0, 512+4, 512+24, 512+28, 512+16, 512+20 },
1825#define _16x16_SEQUENCE_1_FLIP  { 512+20,512+16,512+28,512+24,512+4,512+0, 512+12,512+8, 20,16,28,24,4,0,12,8 },
1826
1827#define _16x16_SEQUENCE_2  { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, 8*32, 9*32,10*32,11*32,12*32,13*32,14*32,15*32 },
1828#define _16x16_SEQUENCE_2_FLIP  { 15*32, 14*32, 13*32, 12*32, 11*32, 10*32, 9*32, 8*32, 7*32, 6*32, 5*32, 4*32, 3*32, 2*32, 1*32, 0*32 },
1829
1830
1831#define _16x16_START \
1832{ \
1833   16,16, \
1834   SEGACD_NUM_TILES16, \
1835   4, \
1836   { 0,1,2,3 }, \
1837
1838#define _16x16_END \
1839      8*128 \
1840}; \
1841
1842#define _32x32_START \
1843{ \
1844   32,32, \
1845   SEGACD_NUM_TILES32, \
1846   4, \
1847   { 0,1,2,3 }, \
1848
1849
1850#define _32x32_END \
1851   8*512 \
1852}; \
1853
1854
1855
1856#define _32x32_SEQUENCE_1 \
1857   { 8,12,0,4,24,28,16,20, \
1858   1024+8, 1024+12, 1024+0, 1024+4, 1024+24, 1024+28, 1024+16, 1024+20, \
1859   2048+8, 2048+12, 2048+0, 2048+4, 2048+24, 2048+28, 2048+16, 2048+20, \
1860   3072+8, 3072+12, 3072+0, 3072+4, 3072+24, 3072+28, 3072+16, 3072+20  \
1861   }, \
1862
1863#define _32x32_SEQUENCE_1_FLIP \
1864{ 3072+20, 3072+16, 3072+28, 3072+24, 3072+4, 3072+0, 3072+12, 3072+8, \
1865  2048+20, 2048+16, 2048+28, 2048+24, 2048+4, 2048+0, 2048+12, 2048+8, \
1866  1024+20, 1024+16, 1024+28, 1024+24, 1024+4, 1024+0, 1024+12, 1024+8, \
1867  20, 16, 28, 24, 4, 0, 12, 8}, \
1868
1869
1870#define _32x32_SEQUENCE_2 \
1871      { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, \
1872       8*32, 9*32, 10*32, 11*32, 12*32, 13*32, 14*32, 15*32, \
1873    16*32,17*32,18*32,19*32,20*32,21*32,22*32,23*32, \
1874    24*32,25*32, 26*32, 27*32, 28*32, 29*32, 30*32, 31*32}, \
1875
1876#define _32x32_SEQUENCE_2_FLIP \
1877{ 31*32, 30*32, 29*32, 28*32, 27*32, 26*32, 25*32, 24*32, \
1878  23*32, 22*32, 21*32, 20*32, 19*32, 18*32, 17*32, 16*32, \
1879  15*32, 14*32, 13*32, 12*32, 11*32, 10*32, 9*32 , 8*32 , \
1880  7*32 , 6*32 , 5*32 , 4*32 , 3*32 , 2*32 , 1*32 , 0*32}, \
1881
1882
1883/* 16x16 decodes */
1884static const gfx_layout sega_16x16_r00_f0_layout =
1885_16x16_START
1886   _16x16_SEQUENCE_1
1887   _16x16_SEQUENCE_2
1888_16x16_END
1889
1890static const gfx_layout sega_16x16_r01_f0_layout =
1891_16x16_START
1892   _16x16_SEQUENCE_2
1893   _16x16_SEQUENCE_1_FLIP
1894_16x16_END
1895
1896static const gfx_layout sega_16x16_r10_f0_layout =
1897_16x16_START
1898   _16x16_SEQUENCE_1_FLIP
1899   _16x16_SEQUENCE_2_FLIP
1900_16x16_END
1901
1902static const gfx_layout sega_16x16_r11_f0_layout =
1903_16x16_START
1904   _16x16_SEQUENCE_2_FLIP
1905   _16x16_SEQUENCE_1
1906_16x16_END
1907
1908static const gfx_layout sega_16x16_r00_f1_layout =
1909_16x16_START
1910   _16x16_SEQUENCE_1_FLIP
1911   _16x16_SEQUENCE_2
1912_16x16_END
1913
1914static const gfx_layout sega_16x16_r01_f1_layout =
1915_16x16_START
1916   _16x16_SEQUENCE_2
1917   _16x16_SEQUENCE_1
1918_16x16_END
1919
1920static const gfx_layout sega_16x16_r10_f1_layout =
1921_16x16_START
1922   _16x16_SEQUENCE_1
1923   _16x16_SEQUENCE_2_FLIP
1924_16x16_END
1925
1926static const gfx_layout sega_16x16_r11_f1_layout =
1927_16x16_START
1928   _16x16_SEQUENCE_2_FLIP
1929   _16x16_SEQUENCE_1_FLIP
1930_16x16_END
1931
1932/* 32x32 decodes */
1933static const gfx_layout sega_32x32_r00_f0_layout =
1934_32x32_START
1935   _32x32_SEQUENCE_1
1936   _32x32_SEQUENCE_2
1937_32x32_END
1938
1939static const gfx_layout sega_32x32_r01_f0_layout =
1940_32x32_START
1941   _32x32_SEQUENCE_2
1942   _32x32_SEQUENCE_1_FLIP
1943_32x32_END
1944
1945static const gfx_layout sega_32x32_r10_f0_layout =
1946_32x32_START
1947   _32x32_SEQUENCE_1_FLIP
1948   _32x32_SEQUENCE_2_FLIP
1949_32x32_END
1950
1951static const gfx_layout sega_32x32_r11_f0_layout =
1952_32x32_START
1953   _32x32_SEQUENCE_2_FLIP
1954   _32x32_SEQUENCE_1
1955_32x32_END
1956
1957static const gfx_layout sega_32x32_r00_f1_layout =
1958_32x32_START
1959   _32x32_SEQUENCE_1_FLIP
1960   _32x32_SEQUENCE_2
1961_32x32_END
1962
1963static const gfx_layout sega_32x32_r01_f1_layout =
1964_32x32_START
1965   _32x32_SEQUENCE_2
1966   _32x32_SEQUENCE_1
1967_32x32_END
1968
1969static const gfx_layout sega_32x32_r10_f1_layout =
1970_32x32_START
1971   _32x32_SEQUENCE_1
1972   _32x32_SEQUENCE_2_FLIP
1973_32x32_END
1974
1975static const gfx_layout sega_32x32_r11_f1_layout =
1976_32x32_START
1977   _32x32_SEQUENCE_2_FLIP
1978   _32x32_SEQUENCE_1_FLIP
1979_32x32_END
1980
1981
1982static void segacd_mark_tiles_dirty(running_machine& machine, int offset)
1983{
19841640   machine.gfx[0]->mark_dirty((offset*2)/(SEGACD_BYTES_PER_TILE16));
19851641   machine.gfx[1]->mark_dirty((offset*2)/(SEGACD_BYTES_PER_TILE16));
19861642   machine.gfx[2]->mark_dirty((offset*2)/(SEGACD_BYTES_PER_TILE16));
r18275r18276
20021658
20031659
20041660// mame specific.. map registers to which tilemap cache we use
2005static int segacd_get_active_stampmap_tilemap(void)
1661int sega_segacd_device::segacd_get_active_stampmap_tilemap(void)
20061662{
20071663   return (segacd_stampsize & 0x6)>>1;
20081664}
20091665
2010#if 0
2011static void segacd_mark_stampmaps_dirty(void)
2012{
2013   segacd_stampmap[segacd_get_active_stampmap_tilemap(->mark_all_dirty()]);
20141666
2015   //segacd_stampmap[0]->mark_all_dirty();
2016   //segacd_stampmap[1]->mark_all_dirty();
2017   //segacd_stampmap[2]->mark_all_dirty();
2018   //segacd_stampmap[3]->mark_all_dirty();
2019}
2020#endif
20211667
2022void SCD_GET_TILE_INFO_16x16_1x1( int& tile_region, int& tileno, int tile_index )
1668void sega_segacd_device::SCD_GET_TILE_INFO_16x16_1x1( int& tile_region, int& tileno, int tile_index )
20231669{
20241670   tile_region = 0; // 16x16 tiles
20251671   int tile_base = (segacd_stampmap_base_address & 0xff80) * 4;
r18275r18276
20331679   tile_region+=roll;
20341680}
20351681
2036void SCD_GET_TILE_INFO_32x32_1x1( int& tile_region, int& tileno, int tile_index )
1682void sega_segacd_device::SCD_GET_TILE_INFO_32x32_1x1( int& tile_region, int& tileno, int tile_index )
20371683{
20381684   tile_region = 8; // 32x32 tiles
20391685   int tile_base = (segacd_stampmap_base_address & 0xffe0) * 4;
r18275r18276
20481694}
20491695
20501696
2051void SCD_GET_TILE_INFO_16x16_16x16( int& tile_region, int& tileno, int tile_index )
1697void sega_segacd_device::SCD_GET_TILE_INFO_16x16_16x16( int& tile_region, int& tileno, int tile_index )
20521698{
20531699   tile_region = 0; // 16x16 tiles
20541700   int tile_base = (0x8000) * 4; // fixed address in this mode
r18275r18276
20631709}
20641710
20651711
2066void SCD_GET_TILE_INFO_32x32_16x16( int& tile_region, int& tileno, int tile_index )
1712void sega_segacd_device::SCD_GET_TILE_INFO_32x32_16x16( int& tile_region, int& tileno, int tile_index )
20671713{
20681714   tile_region = 8; // 32x32 tiles
20691715   int tile_base = (segacd_stampmap_base_address & 0xe000) * 4;
r18275r18276
20811727
20821728
20831729
2084TILE_GET_INFO_MEMBER( md_base_state::get_stampmap_16x16_1x1_tile_info )
1730TILE_GET_INFO_MEMBER( sega_segacd_device::get_stampmap_16x16_1x1_tile_info )
20851731{
20861732   int tile_region, tileno;
20871733   SCD_GET_TILE_INFO_16x16_1x1(tile_region,tileno,(int)tile_index);
20881734   SET_TILE_INFO_MEMBER(tile_region, tileno, 0, 0);
20891735}
20901736
2091TILE_GET_INFO_MEMBER( md_base_state::get_stampmap_32x32_1x1_tile_info )
1737TILE_GET_INFO_MEMBER( sega_segacd_device::get_stampmap_32x32_1x1_tile_info )
20921738{
20931739   int tile_region, tileno;
20941740   SCD_GET_TILE_INFO_32x32_1x1(tile_region,tileno,(int)tile_index);
r18275r18276
20961742}
20971743
20981744
2099TILE_GET_INFO_MEMBER( md_base_state::get_stampmap_16x16_16x16_tile_info )
1745TILE_GET_INFO_MEMBER( sega_segacd_device::get_stampmap_16x16_16x16_tile_info )
21001746{
21011747   int tile_region, tileno;
21021748   SCD_GET_TILE_INFO_16x16_16x16(tile_region,tileno,(int)tile_index);
21031749   SET_TILE_INFO_MEMBER(tile_region, tileno, 0, 0);
21041750}
21051751
2106TILE_GET_INFO_MEMBER( md_base_state::get_stampmap_32x32_16x16_tile_info )
1752TILE_GET_INFO_MEMBER( sega_segacd_device::get_stampmap_32x32_16x16_tile_info )
21071753{
21081754   int tile_region, tileno;
21091755   SCD_GET_TILE_INFO_32x32_16x16(tile_region,tileno,(int)tile_index);
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21121758
21131759// non-tilemap functions to get a pixel from a 'tilemap' based on the above, but looking up each pixel, as to avoid the heavy cache bitmap
21141760
2115INLINE UINT8 get_stampmap_16x16_1x1_tile_info_pixel(running_machine& machine, int xpos, int ypos)
1761inline UINT8 sega_segacd_device::get_stampmap_16x16_1x1_tile_info_pixel(running_machine& machine, int xpos, int ypos)
21161762{
21171763   const int tilesize = 4; // 0xf pixels
21181764   const int tilemapsize = 0x0f;
r18275r18276
21511797   return srcdata[((ypos&((1<<tilesize)-1))*(1<<tilesize))+(xpos&((1<<tilesize)-1))];
21521798}
21531799
2154INLINE UINT8 get_stampmap_32x32_1x1_tile_info_pixel(running_machine& machine, int xpos, int ypos)
1800inline UINT8 sega_segacd_device::get_stampmap_32x32_1x1_tile_info_pixel(running_machine& machine, int xpos, int ypos)
21551801{
21561802   const int tilesize = 5; // 0x1f pixels
21571803   const int tilemapsize = 0x07;
r18275r18276
21901836   return srcdata[((ypos&((1<<tilesize)-1))*(1<<tilesize))+(xpos&((1<<tilesize)-1))];
21911837}
21921838
2193INLINE UINT8 get_stampmap_16x16_16x16_tile_info_pixel(running_machine& machine, int xpos, int ypos)
1839inline UINT8 sega_segacd_device::get_stampmap_16x16_16x16_tile_info_pixel(running_machine& machine, int xpos, int ypos)
21941840{
21951841   const int tilesize = 4; // 0xf pixels
21961842   const int tilemapsize = 0xff;
r18275r18276
22291875   return srcdata[((ypos&((1<<tilesize)-1))*(1<<tilesize))+(xpos&((1<<tilesize)-1))];
22301876}
22311877
2232INLINE UINT8 get_stampmap_32x32_16x16_tile_info_pixel(running_machine& machine, int xpos, int ypos)
1878inline UINT8 sega_segacd_device::get_stampmap_32x32_16x16_tile_info_pixel(running_machine& machine, int xpos, int ypos)
22331879{
22341880   const int tilesize = 5; // 0x1f pixels
22351881   const int tilemapsize = 0x7f;
r18275r18276
22681914   return srcdata[((ypos&((1<<tilesize)-1))*(1<<tilesize))+(xpos&((1<<tilesize)-1))];
22691915}
22701916
2271static TIMER_CALLBACK( segacd_access_timer_callback )
2272{
2273   CheckCommand(machine);
2274}
22751917
2276READ16_HANDLER( cdc_data_sub_r )
1918READ16_MEMBER( sega_segacd_device::cdc_data_sub_r )
22771919{
22781920   return CDC_Host_r(space.machine(), READ_SUB);
22791921}
22801922
2281READ16_HANDLER( cdc_data_main_r )
1923READ16_MEMBER( sega_segacd_device::cdc_data_main_r )
22821924{
22831925   return CDC_Host_r(space.machine(), READ_MAIN);
22841926}
22851927
22861928
22871929
2288WRITE16_HANDLER( segacd_stopwatch_timer_w )
1930WRITE16_MEMBER( sega_segacd_device::segacd_stopwatch_timer_w )
22891931{
22901932   if(data == 0)
22911933      stopwatch_timer->reset();
r18275r18276
22931935      printf("Stopwatch timer %04x\n",data);
22941936}
22951937
2296READ16_HANDLER( segacd_stopwatch_timer_r )
1938READ16_MEMBER( sega_segacd_device::segacd_stopwatch_timer_r )
22971939{
22981940   INT32 result = (stopwatch_timer->time_elapsed() * ATTOSECONDS_TO_HZ(ATTOSECONDS_IN_USEC(30.72))).as_double();
22991941
r18275r18276
23011943}
23021944
23031945
2304/* main CPU map set up in INIT */
2305void segacd_init_main_cpu( running_machine& machine )
2306{
2307   address_space& space = machine.device("maincpu")->memory().space(AS_PROGRAM);
2308   
2309   segacd_font_bits = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:segacd_font")->ptr());
2310   segacd_backupram = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:backupram")->ptr());
2311   segacd_dataram = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:dataram")->ptr());
2312   segacd_dataram2 = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:dataram2")->ptr());
2313   segacd_4meg_prgram = reinterpret_cast<UINT16 *>(machine.root_device().memshare(":segacd:segacd_program")->ptr());
2314   
2315   segacd_4meg_prgbank = 0;
23161946
23171947
2318   space.unmap_readwrite        (0x020000,0x3fffff);
23191948
2320//  space.install_read_bank(0x0020000, 0x003ffff, "scd_4m_prgbank");
2321//  space.machine().root_device().membank("scd_4m_prgbank")->set_base(segacd_4meg_prgram + segacd_4meg_prgbank * 0x20000 );
2322   space.install_legacy_read_handler (0x0020000, 0x003ffff, FUNC(scd_4m_prgbank_ram_r) );
2323   space.install_legacy_write_handler (0x0020000, 0x003ffff, FUNC(scd_4m_prgbank_ram_w) );
2324   segacd_wordram_mapped = 1;
23251949
23261950
2327   space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0x200000, 0x23ffff, FUNC(segacd_main_dataram_part1_r), FUNC(segacd_main_dataram_part1_w)); // RAM shared with sub
2328
2329   space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa12000, 0xa12001, FUNC(scd_a12000_halt_reset_r), FUNC(scd_a12000_halt_reset_w)); // sub-cpu control
2330   space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa12002, 0xa12003, FUNC(scd_a12002_memory_mode_r), FUNC(scd_a12002_memory_mode_w)); // memory mode / write protect
2331   //space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa12004, 0xa12005, FUNC(segacd_cdc_mode_address_r), FUNC(segacd_cdc_mode_address_w));
2332   space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa12006, 0xa12007, FUNC(scd_a12006_hint_register_r), FUNC(scd_a12006_hint_register_w)); // where HINT points on main CPU
2333   //space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_read_handler     (0xa12008, 0xa12009, FUNC(cdc_data_main_r));
2334
2335
2336   space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa1200c, 0xa1200d, FUNC(segacd_stopwatch_timer_r), FUNC(segacd_stopwatch_timer_w)); // starblad
2337
2338   space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa1200e, 0xa1200f, FUNC(segacd_comms_flags_r), FUNC(segacd_comms_flags_maincpu_w)); // communication flags block
2339
2340   space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa12010, 0xa1201f, FUNC(segacd_comms_main_part1_r), FUNC(segacd_comms_main_part1_w));
2341   space.machine().device("maincpu")->memory().space(AS_PROGRAM).install_legacy_readwrite_handler(0xa12020, 0xa1202f, FUNC(segacd_comms_main_part2_r), FUNC(segacd_comms_main_part2_w));
2342
2343
2344
2345   machine.device(":segacd:segacd_68k")->execute().set_irq_acknowledge_callback(segacd_sub_int_callback);
2346
2347   space.install_legacy_read_handler (0x0000070, 0x0000073, FUNC(scd_hint_vector_r) );
2348
2349   segacd_gfx_conversion_timer = machine.scheduler().timer_alloc(FUNC(segacd_gfx_conversion_timer_callback));
2350   segacd_gfx_conversion_timer->adjust(attotime::never);
2351
2352   //segacd_dmna_ret_timer = machine.scheduler().timer_alloc(FUNC(segacd_dmna_ret_timer_callback));
2353   segacd_gfx_conversion_timer->adjust(attotime::never);
2354
2355   segacd_hock_timer = machine.scheduler().timer_alloc(FUNC(segacd_access_timer_callback));
2356//  segacd_hock_timer->adjust( attotime::from_nsec(20000000), 0, attotime::from_nsec(20000000));
2357   segacd_hock_timer->adjust( attotime::from_hz(75),0, attotime::from_hz(75));
2358
2359   segacd_irq3_timer = machine.scheduler().timer_alloc(FUNC(segacd_irq3_timer_callback));
2360   segacd_irq3_timer->adjust(attotime::never);
2361
2362
2363
2364   /* create the char set (gfx will then be updated dynamically from RAM) */
2365   machine.gfx[0] = auto_alloc(machine, gfx_element(machine, sega_16x16_r00_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2366   machine.gfx[1] = auto_alloc(machine, gfx_element(machine, sega_16x16_r01_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2367   machine.gfx[2] = auto_alloc(machine, gfx_element(machine, sega_16x16_r10_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2368   machine.gfx[3] = auto_alloc(machine, gfx_element(machine, sega_16x16_r11_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2369   machine.gfx[4] = auto_alloc(machine, gfx_element(machine, sega_16x16_r00_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2370   machine.gfx[5] = auto_alloc(machine, gfx_element(machine, sega_16x16_r11_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2371   machine.gfx[6] = auto_alloc(machine, gfx_element(machine, sega_16x16_r10_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2372   machine.gfx[7] = auto_alloc(machine, gfx_element(machine, sega_16x16_r01_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2373
2374   machine.gfx[8] = auto_alloc(machine, gfx_element(machine, sega_32x32_r00_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2375   machine.gfx[9] = auto_alloc(machine, gfx_element(machine, sega_32x32_r01_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2376   machine.gfx[10]= auto_alloc(machine, gfx_element(machine, sega_32x32_r10_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2377   machine.gfx[11]= auto_alloc(machine, gfx_element(machine, sega_32x32_r11_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2378   machine.gfx[12]= auto_alloc(machine, gfx_element(machine, sega_32x32_r00_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2379   machine.gfx[13]= auto_alloc(machine, gfx_element(machine, sega_32x32_r11_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2380   machine.gfx[14]= auto_alloc(machine, gfx_element(machine, sega_32x32_r10_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2381   machine.gfx[15]= auto_alloc(machine, gfx_element(machine, sega_32x32_r01_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2382
2383   md_base_state *state = machine.driver_data<md_base_state>();
2384   segacd_stampmap[0] = &machine.tilemap().create(tilemap_get_info_delegate(FUNC(md_base_state::get_stampmap_16x16_1x1_tile_info),state), TILEMAP_SCAN_ROWS, 16, 16, 16, 16);
2385   segacd_stampmap[1] = &machine.tilemap().create(tilemap_get_info_delegate(FUNC(md_base_state::get_stampmap_32x32_1x1_tile_info),state), TILEMAP_SCAN_ROWS, 32, 32, 8, 8);
2386   segacd_stampmap[2] = &machine.tilemap().create(tilemap_get_info_delegate(FUNC(md_base_state::get_stampmap_16x16_16x16_tile_info),state), TILEMAP_SCAN_ROWS, 16, 16, 256, 256); // 128kb!
2387   segacd_stampmap[3] = &machine.tilemap().create(tilemap_get_info_delegate(FUNC(md_base_state::get_stampmap_32x32_16x16_tile_info),state), TILEMAP_SCAN_ROWS, 32, 32, 128, 128); // 32kb!
2388}
2389
2390
2391
2392
2393TIMER_DEVICE_CALLBACK( scd_dma_timer_callback )
1951READ16_MEMBER( sega_segacd_device::segacd_sub_led_ready_r )
23941952{
2395   // todo: accurate timing of this!
2396
2397   #define RATE 256
2398   if (sega_cd_connected)
2399      CDC_Do_DMA(timer.machine(), RATE);
2400
2401   // timed reset of flags
2402   scd_mode_dmna_ret_flags |= 0x0021;
2403
2404   scd_dma_timer->adjust(attotime::from_hz(megadriv_framerate) / megadrive_total_scanlines);
2405}
2406
2407
2408MACHINE_RESET( segacd )
2409{
2410   _segacd_68k_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
2411   _segacd_68k_cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
2412
2413   segacd_hint_register = 0xffff; // -1
2414
2415   /* init cd-rom device */
2416
2417   lc89510_Reset();
2418
2419   {
2420      cdrom_image_device *device = machine.device<cdrom_image_device>("cdrom");
2421      if ( device )
2422      {
2423         segacd.cd = device->get_cdrom_file();
2424         if ( segacd.cd )
2425         {
2426            segacd.toc = cdrom_get_toc( segacd.cd );
2427            cdda_set_cdrom( machine.device(":segacd:cdda"), segacd.cd );
2428            cdda_stop_audio( machine.device( ":segacd:cdda" ) ); //stop any pending CD-DA
2429         }
2430      }
2431   }
2432
2433
2434   if (segacd.cd)
2435      printf("cd found\n");
2436
2437   scd_rammode = 0;
2438   scd_mode_dmna_ret_flags = 0x5421;
2439
2440
2441   hock_cmd = 0;
2442   stopwatch_timer = machine.device<timer_device>(":segacd:sw_timer");
2443
2444   scd_dma_timer->adjust(attotime::zero);
2445
2446
2447   // HACK!!!! timegal, anettfut, roadaven end up with the SubCPU waiting in a loop for *something*
2448   // overclocking the CPU, even at the point where the game is hung, allows them to continue and boot
2449   // I'm not sure what the source of this timing problem is, it's not using IRQ3 or StopWatch at the
2450   // time.  Changing the CDHock timer to 50hz from 75hz also stops the hang, but then the video is
2451   // too slow and has bad sound.  -- Investigate!
2452
2453   _segacd_68k_cpu->set_clock_scale(1.5000f);
2454
2455}
2456
2457
2458static int segacd_redled = 0;
2459static int segacd_greenled = 0;
2460static int segacd_ready = 1; // actually set 100ms after startup?
2461
2462static READ16_HANDLER( segacd_sub_led_ready_r )
2463{
24641953   UINT16 retdata = 0x0000;
24651954
24661955   if (ACCESSING_BITS_0_7)
r18275r18276
24771966   return retdata;
24781967}
24791968
2480static WRITE16_HANDLER( segacd_sub_led_ready_w )
1969WRITE16_MEMBER( sega_segacd_device::segacd_sub_led_ready_w )
24811970{
24821971   if (ACCESSING_BITS_0_7)
24831972   {
r18275r18276
25011990
25021991
25031992
2504static READ16_HANDLER( segacd_sub_dataram_part1_r )
1993READ16_MEMBER( sega_segacd_device::segacd_sub_dataram_part1_r )
25051994{
25061995   if ((scd_rammode&2)==RAM_MODE_2MEG)
25071996   {
r18275r18276
25432032   return 0x0000;
25442033}
25452034
2546static WRITE16_HANDLER( segacd_sub_dataram_part1_w )
2035WRITE16_MEMBER( sega_segacd_device::segacd_sub_dataram_part1_w )
25472036{
25482037   if ((scd_rammode&2)==RAM_MODE_2MEG)
25492038   {
r18275r18276
25892078   }
25902079}
25912080
2592static READ16_HANDLER( segacd_sub_dataram_part2_r )
2081READ16_MEMBER( sega_segacd_device::segacd_sub_dataram_part2_r )
25932082{
25942083   if ((scd_rammode&2)==RAM_MODE_2MEG)
25952084   {
r18275r18276
26142103   return 0x0000;
26152104}
26162105
2617static WRITE16_HANDLER( segacd_sub_dataram_part2_w )
2106WRITE16_MEMBER( sega_segacd_device::segacd_sub_dataram_part2_w )
26182107{
26192108   if ((scd_rammode&2)==RAM_MODE_2MEG)
26202109   {
r18275r18276
26382127
26392128
26402129
2641static READ16_HANDLER( segacd_irq_mask_r )
2130READ16_MEMBER( sega_segacd_device::segacd_irq_mask_r )
26422131{
2643   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
2132   
26442133   return segacd_irq_mask;
26452134}
26462135
2647static WRITE16_HANDLER( segacd_irq_mask_w )
2136WRITE16_MEMBER( sega_segacd_device::segacd_irq_mask_w )
26482137{
26492138   if (ACCESSING_BITS_0_7)
26502139   {
26512140      UINT16 control = CDD_CONTROL;
2652      if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
2141     
26532142   //  printf("segacd_irq_mask_w %04x %04x (CDD control is %04x)\n",data, mem_mask, control);
26542143
26552144      if (data & 0x10)
r18275r18276
26752164   }
26762165}
26772166
2678static READ16_HANDLER( segacd_cdd_ctrl_r )
2167READ16_MEMBER( sega_segacd_device::segacd_cdd_ctrl_r )
26792168{
2680   if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
2169   
26812170   return CDD_CONTROL;
26822171}
26832172
26842173
2685static WRITE16_HANDLER( segacd_cdd_ctrl_w )
2174WRITE16_MEMBER( sega_segacd_device::segacd_cdd_ctrl_w )
26862175{
26872176   if (ACCESSING_BITS_0_7)
26882177   {
26892178      UINT16 control = CDD_CONTROL;
2690      if (SEGACD_FORCE_SYNCS) space.machine().scheduler().synchronize();
2179     
26912180
26922181      //printf("segacd_cdd_ctrl_w %04x %04x (control %04x irq %04x\n", data, mem_mask, control, segacd_irq_mask);
26932182
r18275r18276
27142203
27152204
27162205
2717static READ8_HANDLER( segacd_cdd_rx_r )
2206READ8_MEMBER( sega_segacd_device::segacd_cdd_rx_r )
27182207{
27192208   return CDD_RX[offset^1];
27202209}
27212210
2722static WRITE8_HANDLER( segacd_cdd_tx_w )
2211WRITE8_MEMBER( sega_segacd_device::segacd_cdd_tx_w )
27232212{
27242213   CDD_TX[offset^1] = data;
27252214
r18275r18276
27312220
27322221
27332222
2734static READ16_HANDLER( segacd_stampsize_r )
2223READ16_MEMBER( sega_segacd_device::segacd_stampsize_r )
27352224{
27362225   UINT16 retdata = 0x0000;
27372226
r18275r18276
27432232
27442233}
27452234
2746static WRITE16_HANDLER( segacd_stampsize_w )
2235WRITE16_MEMBER( sega_segacd_device::segacd_stampsize_w )
27472236{
27482237   //printf("segacd_stampsize_w %04x %04x\n",data, mem_mask);
27492238   if (ACCESSING_BITS_0_7)
r18275r18276
27732262// the lower 3 bits of segacd_imagebuffer_hdot_size are set
27742263
27752264// this really needs to be doing it's own lookups rather than depending on the inefficient MAME cache..
2776INLINE UINT8 read_pixel_from_stampmap( running_machine& machine, bitmap_ind16* srcbitmap, int x, int y)
2265inline UINT8 sega_segacd_device::read_pixel_from_stampmap( running_machine& machine, bitmap_ind16* srcbitmap, int x, int y)
27772266{
27782267/*
27792268    if (!srcbitmap)
r18275r18276
28052294
28062295
28072296// this triggers the conversion operation, which will cause an IRQ1 when finished
2808WRITE16_HANDLER( segacd_trace_vector_base_address_w )
2297WRITE16_MEMBER( sega_segacd_device::segacd_trace_vector_base_address_w )
28092298{
28102299   if ((scd_rammode&2)==RAM_MODE_1MEG)
28112300   {
r18275r18276
28912380}
28922381
28932382// actually just the low 8 bits?
2894READ16_HANDLER( segacd_imagebuffer_vdot_size_r )
2383READ16_MEMBER( sega_segacd_device::segacd_imagebuffer_vdot_size_r )
28952384{
28962385   return segacd_imagebuffer_vdot_size;
28972386}
28982387
2899WRITE16_HANDLER( segacd_imagebuffer_vdot_size_w )
2388WRITE16_MEMBER( sega_segacd_device::segacd_imagebuffer_vdot_size_w )
29002389{
29012390   //printf("segacd_imagebuffer_vdot_size_w %04x %04x\n",data,mem_mask);
29022391   COMBINE_DATA(&segacd_imagebuffer_vdot_size);
r18275r18276
29042393
29052394
29062395// basically the 'tilemap' base address, for the 16x16 / 32x32 source tiles
2907static READ16_HANDLER( segacd_stampmap_base_address_r )
2396READ16_MEMBER( sega_segacd_device::segacd_stampmap_base_address_r )
29082397{
29092398   // different bits are valid in different modes, but I'm guessing the register
29102399   // always returns all the bits set, even if they're not used?
r18275r18276
29122401
29132402}
29142403
2915static WRITE16_HANDLER( segacd_stampmap_base_address_w )
2404WRITE16_MEMBER( sega_segacd_device::segacd_stampmap_base_address_w )
29162405{ // WORD ACCESS
29172406
29182407   // low 3 bitsa aren't used, are they stored?
r18275r18276
29202409}
29212410
29222411// destination for 'rendering' the section of the tilemap(stampmap) requested
2923static READ16_HANDLER( segacd_imagebuffer_start_address_r )
2412READ16_MEMBER( sega_segacd_device::segacd_imagebuffer_start_address_r )
29242413{
29252414   return segacd_imagebuffer_start_address;
29262415}
29272416
2928static WRITE16_HANDLER( segacd_imagebuffer_start_address_w )
2417WRITE16_MEMBER( sega_segacd_device::segacd_imagebuffer_start_address_w )
29292418{
29302419   COMBINE_DATA(&segacd_imagebuffer_start_address);
29312420
r18275r18276
29332422   //printf("segacd_imagebuffer_start_address_w %04x %04x (actual base = %06x)\n", data, segacd_imagebuffer_start_address, base);
29342423}
29352424
2936static READ16_HANDLER( segacd_imagebuffer_offset_r )
2425READ16_MEMBER( sega_segacd_device::segacd_imagebuffer_offset_r )
29372426{
29382427   return segacd_imagebuffer_offset;
29392428}
29402429
2941static WRITE16_HANDLER( segacd_imagebuffer_offset_w )
2430WRITE16_MEMBER( sega_segacd_device::segacd_imagebuffer_offset_w )
29422431{
29432432   COMBINE_DATA(&segacd_imagebuffer_offset);
29442433//  printf("segacd_imagebuffer_offset_w %04x\n", segacd_imagebuffer_offset);
29452434}
29462435
2947static READ16_HANDLER( segacd_imagebuffer_vcell_size_r )
2436READ16_MEMBER( sega_segacd_device::segacd_imagebuffer_vcell_size_r )
29482437{
29492438   return segacd_imagebuffer_vcell_size;
29502439}
29512440
2952static WRITE16_HANDLER( segacd_imagebuffer_vcell_size_w )
2441WRITE16_MEMBER( sega_segacd_device::segacd_imagebuffer_vcell_size_w )
29532442{
29542443   COMBINE_DATA(&segacd_imagebuffer_vcell_size);
29552444}
29562445
29572446
2958static READ16_HANDLER( segacd_imagebuffer_hdot_size_r )
2447READ16_MEMBER( sega_segacd_device::segacd_imagebuffer_hdot_size_r )
29592448{
29602449   return segacd_imagebuffer_hdot_size;
29612450}
29622451
2963static WRITE16_HANDLER( segacd_imagebuffer_hdot_size_w )
2452WRITE16_MEMBER( sega_segacd_device::segacd_imagebuffer_hdot_size_w )
29642453{
29652454   COMBINE_DATA(&segacd_imagebuffer_hdot_size);
29662455}
29672456
2968static UINT16 segacd_irq3_timer_reg;
29692457
2970static READ16_HANDLER( segacd_irq3timer_r )
2458
2459READ16_MEMBER( sega_segacd_device::segacd_irq3timer_r )
29712460{
29722461   return segacd_irq3_timer_reg; // always returns value written, not current counter!
29732462}
29742463
2975#define SEGACD_IRQ3_TIMER_SPEED (attotime::from_nsec(segacd_irq3_timer_reg*30720))
29762464
2977static WRITE16_HANDLER( segacd_irq3timer_w )
2465WRITE16_MEMBER( sega_segacd_device::segacd_irq3timer_w )
29782466{
29792467   if (ACCESSING_BITS_0_7)
29802468   {
r18275r18276
29932481
29942482
29952483
2996static TIMER_CALLBACK( segacd_irq3_timer_callback )
2997{
2998   CHECK_SCD_LV3_INTERRUPT
29992484
3000   segacd_irq3_timer->adjust(SEGACD_IRQ3_TIMER_SPEED);
3001}
30022485
30032486
3004
3005READ16_HANDLER( cdc_dmaaddr_r )
2487READ16_MEMBER( sega_segacd_device::cdc_dmaaddr_r )
30062488{
30072489   return CDC_DMA_ADDR;
30082490}
30092491
3010WRITE16_HANDLER( cdc_dmaaddr_w )
2492WRITE16_MEMBER( sega_segacd_device::cdc_dmaaddr_w )
30112493{
30122494   COMBINE_DATA(&CDC_DMA_ADDR);
30132495}
30142496
3015READ16_HANDLER( segacd_cdfader_r )
2497READ16_MEMBER( sega_segacd_device::segacd_cdfader_r )
30162498{
30172499   return 0;
30182500}
30192501
3020WRITE16_HANDLER( segacd_cdfader_w )
2502WRITE16_MEMBER( sega_segacd_device::segacd_cdfader_w )
30212503{
30222504   static double cdfader_vol;
30232505   if(data & 0x800f)
r18275r18276
30352517   cdda_set_volume(space.machine().device(":segacd:cdda"), cdfader_vol);
30362518}
30372519
3038READ16_HANDLER( segacd_backupram_r )
2520READ16_MEMBER( sega_segacd_device::segacd_backupram_r )
30392521{
30402522   if(ACCESSING_BITS_8_15 && !(space.debugger_access()))
30412523      printf("Warning: read to backupram even bytes! [%04x]\n",offset);
r18275r18276
30432525   return segacd_backupram[offset] & 0xff;
30442526}
30452527
3046WRITE16_HANDLER( segacd_backupram_w )
2528WRITE16_MEMBER( sega_segacd_device::segacd_backupram_w )
30472529{
30482530   if(ACCESSING_BITS_0_7)
30492531      segacd_backupram[offset] = data;
r18275r18276
30522534      printf("Warning: write to backupram even bytes! [%04x] %02x\n",offset,data);
30532535}
30542536
3055READ16_HANDLER( segacd_font_color_r )
2537READ16_MEMBER( sega_segacd_device::segacd_font_color_r )
30562538{
30572539   return segacd_font_color;
30582540}
30592541
3060WRITE16_HANDLER( segacd_font_color_w )
2542WRITE16_MEMBER( sega_segacd_device::segacd_font_color_w )
30612543{
30622544   if (ACCESSING_BITS_0_7)
30632545   {
r18275r18276
30652547   }
30662548}
30672549
3068READ16_HANDLER( segacd_font_converted_r )
2550READ16_MEMBER( sega_segacd_device::segacd_font_converted_r )
30692551{
30702552   int scbg = (segacd_font_color & 0x0f);
30712553   int scfg = (segacd_font_color & 0xf0)>>4;
r18275r18276
30832565   return retdata;
30842566}
30852567
3086ADDRESS_MAP_START( segacd_map, AS_PROGRAM, 16, driver_device )
3087   AM_RANGE(0x000000, 0x07ffff) AM_RAM AM_SHARE("segacd_program")
30882568
3089   AM_RANGE(0x080000, 0x0bffff) AM_READWRITE_LEGACY(segacd_sub_dataram_part1_r, segacd_sub_dataram_part1_w) AM_SHARE("dataram")
3090   AM_RANGE(0x0c0000, 0x0dffff) AM_READWRITE_LEGACY(segacd_sub_dataram_part2_r, segacd_sub_dataram_part2_w) AM_SHARE("dataram2")
30912569
3092   AM_RANGE(0xfe0000, 0xfe3fff) AM_READWRITE_LEGACY(segacd_backupram_r,segacd_backupram_w) AM_SHARE("backupram") // backup RAM, odd bytes only!
30932570
3094   AM_RANGE(0xff0000, 0xff001f) AM_DEVWRITE8_LEGACY("rfsnd", rf5c68_w, 0x00ff)  // PCM, RF5C164
3095   AM_RANGE(0xff0020, 0xff003f) AM_DEVREAD8_LEGACY("rfsnd", rf5c68_r, 0x00ff)
3096   AM_RANGE(0xff2000, 0xff3fff) AM_DEVREADWRITE8_LEGACY("rfsnd", rf5c68_mem_r, rf5c68_mem_w,0x00ff)  // PCM, RF5C164
30972571
2572void sega_segacd_device::device_start()
2573{
30982574
3099   AM_RANGE(0xff8000 ,0xff8001) AM_READWRITE_LEGACY(segacd_sub_led_ready_r, segacd_sub_led_ready_w)
3100   AM_RANGE(0xff8002 ,0xff8003) AM_READWRITE_LEGACY(segacd_sub_memory_mode_r, segacd_sub_memory_mode_w)
2575   _segacd_68k_cpu = machine().device<cpu_device>(":segacd:segacd_68k");
2576   sega_cd_connected = 1;
31012577
3102   AM_RANGE(0xff8004 ,0xff8005) AM_READWRITE_LEGACY(segacd_cdc_mode_address_r, segacd_cdc_mode_address_w)
3103   AM_RANGE(0xff8006 ,0xff8007) AM_READWRITE_LEGACY(segacd_cdc_data_r, segacd_cdc_data_w)
3104   AM_RANGE(0xff8008, 0xff8009) AM_READ_LEGACY(cdc_data_sub_r)
3105   AM_RANGE(0xff800a, 0xff800b) AM_READWRITE_LEGACY(cdc_dmaaddr_r,cdc_dmaaddr_w) // CDC DMA Address
3106   AM_RANGE(0xff800c, 0xff800d) AM_READWRITE_LEGACY(segacd_stopwatch_timer_r, segacd_stopwatch_timer_w)// Stopwatch timer
3107   AM_RANGE(0xff800e ,0xff800f) AM_READWRITE_LEGACY(segacd_comms_flags_r, segacd_comms_flags_subcpu_w)
3108   AM_RANGE(0xff8010 ,0xff801f) AM_READWRITE_LEGACY(segacd_comms_sub_part1_r, segacd_comms_sub_part1_w)
3109   AM_RANGE(0xff8020 ,0xff802f) AM_READWRITE_LEGACY(segacd_comms_sub_part2_r, segacd_comms_sub_part2_w)
3110   AM_RANGE(0xff8030, 0xff8031) AM_READWRITE_LEGACY(segacd_irq3timer_r, segacd_irq3timer_w) // Timer W/INT3
3111   AM_RANGE(0xff8032, 0xff8033) AM_READWRITE_LEGACY(segacd_irq_mask_r,segacd_irq_mask_w)
3112   AM_RANGE(0xff8034, 0xff8035) AM_READWRITE_LEGACY(segacd_cdfader_r,segacd_cdfader_w) // CD Fader
3113   AM_RANGE(0xff8036, 0xff8037) AM_READWRITE_LEGACY(segacd_cdd_ctrl_r,segacd_cdd_ctrl_w)
3114   AM_RANGE(0xff8038, 0xff8041) AM_READ8_LEGACY(segacd_cdd_rx_r,0xffff)
3115   AM_RANGE(0xff8042, 0xff804b) AM_WRITE8_LEGACY(segacd_cdd_tx_w,0xffff)
3116   AM_RANGE(0xff804c, 0xff804d) AM_READWRITE_LEGACY(segacd_font_color_r, segacd_font_color_w)
3117   AM_RANGE(0xff804e, 0xff804f) AM_RAM AM_SHARE("segacd_font")
3118   AM_RANGE(0xff8050, 0xff8057) AM_READ_LEGACY(segacd_font_converted_r)
3119   AM_RANGE(0xff8058, 0xff8059) AM_READWRITE_LEGACY(segacd_stampsize_r, segacd_stampsize_w) // Stamp size
3120   AM_RANGE(0xff805a, 0xff805b) AM_READWRITE_LEGACY(segacd_stampmap_base_address_r, segacd_stampmap_base_address_w) // Stamp map base address
3121   AM_RANGE(0xff805c, 0xff805d) AM_READWRITE_LEGACY(segacd_imagebuffer_vcell_size_r, segacd_imagebuffer_vcell_size_w)// Image buffer V cell size
3122   AM_RANGE(0xff805e, 0xff805f) AM_READWRITE_LEGACY(segacd_imagebuffer_start_address_r, segacd_imagebuffer_start_address_w) // Image buffer start address
3123   AM_RANGE(0xff8060, 0xff8061) AM_READWRITE_LEGACY(segacd_imagebuffer_offset_r, segacd_imagebuffer_offset_w)
3124   AM_RANGE(0xff8062, 0xff8063) AM_READWRITE_LEGACY(segacd_imagebuffer_hdot_size_r, segacd_imagebuffer_hdot_size_w) // Image buffer H dot size
3125   AM_RANGE(0xff8064, 0xff8065) AM_READWRITE_LEGACY(segacd_imagebuffer_vdot_size_r, segacd_imagebuffer_vdot_size_w ) // Image buffer V dot size
3126   AM_RANGE(0xff8066, 0xff8067) AM_WRITE_LEGACY(segacd_trace_vector_base_address_w)// Trace vector base address
3127//  AM_RANGE(0xff8068, 0xff8069) // Subcode address
2578   scd_dma_timer = machine().device<timer_device>(":segacd:scd_dma_timer");
2579   segacd_gfx_conversion_timer = machine().device<timer_device>(":segacd:stamp_timer");
2580   segacd_irq3_timer = machine().device<timer_device>(":segacd:irq3_timer");
31282581
3129//  AM_RANGE(0xff8100, 0xff817f) // Subcode buffer area
3130//  AM_RANGE(0xff8180, 0xff81ff) // mirror of subcode buffer area
2582   address_space& space = machine().device("maincpu")->memory().space(AS_PROGRAM);
2583   
2584   segacd_font_bits = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:segacd_font")->ptr());
2585   segacd_backupram = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:backupram")->ptr());
2586   segacd_dataram = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:dataram")->ptr());
2587//   segacd_dataram2 = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:dataram2")->ptr());
2588   segacd_4meg_prgram = reinterpret_cast<UINT16 *>(machine().root_device().memshare(":segacd:segacd_program")->ptr());
2589   
2590   segacd_4meg_prgbank = 0;
31312591
3132ADDRESS_MAP_END
31332592
2593   space.unmap_readwrite        (0x020000,0x3fffff);
31342594
31352595
2596   space.install_read_handler (0x0020000, 0x003ffff, read16_delegate(FUNC(sega_segacd_device::scd_4m_prgbank_ram_r),this) );
2597   space.install_write_handler (0x0020000, 0x003ffff, write16_delegate(FUNC(sega_segacd_device::scd_4m_prgbank_ram_w),this) );
31362598
3137void sega_segacd_device::device_start()
3138{
31392599
2600   space.install_readwrite_handler(0x200000, 0x23ffff, read16_delegate(FUNC(sega_segacd_device::segacd_main_dataram_part1_r),this), write16_delegate(FUNC(sega_segacd_device::segacd_main_dataram_part1_w),this)); // RAM shared with sub
2601   space.install_readwrite_handler(0xa12000, 0xa12001, read16_delegate(FUNC(sega_segacd_device::scd_a12000_halt_reset_r),this), write16_delegate(FUNC(sega_segacd_device::scd_a12000_halt_reset_w),this)); // sub-cpu control
2602   space.install_readwrite_handler(0xa12002, 0xa12003, read16_delegate(FUNC(sega_segacd_device::scd_a12002_memory_mode_r),this), write16_delegate(FUNC(sega_segacd_device::scd_a12002_memory_mode_w),this)); // memory mode / write protect
2603   //space.install_readwrite_handler(0xa12004, 0xa12005, read16_delegate(FUNC(sega_segacd_device::segacd_cdc_mode_address_r),this), write16_delegate(FUNC(sega_segacd_device::segacd_cdc_mode_address_w),this));
2604   space.install_readwrite_handler(0xa12006, 0xa12007, read16_delegate(FUNC(sega_segacd_device::scd_a12006_hint_register_r),this), write16_delegate(FUNC(sega_segacd_device::scd_a12006_hint_register_w),this)); // where HINT points on main CPU
2605   //space.install_read_handler     (0xa12008, 0xa12009, read16_delegate(FUNC(sega_segacd_device::cdc_data_main_r),this));
2606
2607
2608   space.install_readwrite_handler(0xa1200c, 0xa1200d, read16_delegate(FUNC(sega_segacd_device::segacd_stopwatch_timer_r),this), write16_delegate(FUNC(sega_segacd_device::segacd_stopwatch_timer_w),this)); // starblad
2609
2610   space.install_readwrite_handler(0xa1200e, 0xa1200f, read16_delegate(FUNC(sega_segacd_device::segacd_comms_flags_r),this), write16_delegate(FUNC(sega_segacd_device::segacd_comms_flags_maincpu_w),this)); // communication flags block
2611
2612   space.install_readwrite_handler(0xa12010, 0xa1201f, read16_delegate(FUNC(sega_segacd_device::segacd_comms_main_part1_r),this), write16_delegate(FUNC(sega_segacd_device::segacd_comms_main_part1_w),this));
2613   space.install_readwrite_handler(0xa12020, 0xa1202f, read16_delegate(FUNC(sega_segacd_device::segacd_comms_main_part2_r),this), write16_delegate(FUNC(sega_segacd_device::segacd_comms_main_part2_w),this));
2614
2615
2616
2617   machine().device(":segacd:segacd_68k")->execute().set_irq_acknowledge_callback(segacd_sub_int_callback);
2618
2619   space.install_read_handler (0x0000070, 0x0000073, read16_delegate(FUNC(sega_segacd_device::scd_hint_vector_r),this) );
2620
2621   
2622
2623
2624
2625   /* create the char set (gfx will then be updated dynamically from RAM) */
2626   machine().gfx[0] = auto_alloc(machine(), gfx_element(machine(), sega_16x16_r00_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2627   machine().gfx[1] = auto_alloc(machine(), gfx_element(machine(), sega_16x16_r01_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2628   machine().gfx[2] = auto_alloc(machine(), gfx_element(machine(), sega_16x16_r10_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2629   machine().gfx[3] = auto_alloc(machine(), gfx_element(machine(), sega_16x16_r11_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2630   machine().gfx[4] = auto_alloc(machine(), gfx_element(machine(), sega_16x16_r00_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2631   machine().gfx[5] = auto_alloc(machine(), gfx_element(machine(), sega_16x16_r11_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2632   machine().gfx[6] = auto_alloc(machine(), gfx_element(machine(), sega_16x16_r10_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2633   machine().gfx[7] = auto_alloc(machine(), gfx_element(machine(), sega_16x16_r01_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2634
2635   machine().gfx[8] = auto_alloc(machine(), gfx_element(machine(), sega_32x32_r00_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2636   machine().gfx[9] = auto_alloc(machine(), gfx_element(machine(), sega_32x32_r01_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2637   machine().gfx[10]= auto_alloc(machine(), gfx_element(machine(), sega_32x32_r10_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2638   machine().gfx[11]= auto_alloc(machine(), gfx_element(machine(), sega_32x32_r11_f0_layout, (UINT8 *)segacd_dataram, 0, 0));
2639   machine().gfx[12]= auto_alloc(machine(), gfx_element(machine(), sega_32x32_r00_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2640   machine().gfx[13]= auto_alloc(machine(), gfx_element(machine(), sega_32x32_r11_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2641   machine().gfx[14]= auto_alloc(machine(), gfx_element(machine(), sega_32x32_r10_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2642   machine().gfx[15]= auto_alloc(machine(), gfx_element(machine(), sega_32x32_r01_f1_layout, (UINT8 *)segacd_dataram, 0, 0));
2643
2644   segacd_stampmap[0] = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(sega_segacd_device::get_stampmap_16x16_1x1_tile_info),this), TILEMAP_SCAN_ROWS, 16, 16, 16, 16);
2645   segacd_stampmap[1] = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(sega_segacd_device::get_stampmap_32x32_1x1_tile_info),this), TILEMAP_SCAN_ROWS, 32, 32, 8, 8);
2646   segacd_stampmap[2] = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(sega_segacd_device::get_stampmap_16x16_16x16_tile_info),this), TILEMAP_SCAN_ROWS, 16, 16, 256, 256); // 128kb!
2647   segacd_stampmap[3] = &machine().tilemap().create(tilemap_get_info_delegate(FUNC(sega_segacd_device::get_stampmap_32x32_16x16_tile_info),this), TILEMAP_SCAN_ROWS, 32, 32, 128, 128); // 32kb!
2648
2649   // todo register save state stuff
31402650}
31412651
31422652void sega_segacd_device::device_reset()
31432653{
31442654
2655   _segacd_68k_cpu->set_input_line(INPUT_LINE_RESET, ASSERT_LINE);
2656   _segacd_68k_cpu->set_input_line(INPUT_LINE_HALT, ASSERT_LINE);
2657
2658   segacd_hint_register = 0xffff; // -1
2659
2660   /* init cd-rom device */
2661
2662   lc89510_Reset();
2663
2664   {
2665      cdrom_image_device *cddevice = machine().device<cdrom_image_device>("cdrom");
2666      if ( cddevice )
2667      {
2668         segacd.cd = cddevice->get_cdrom_file();
2669         if ( segacd.cd )
2670         {
2671            segacd.toc = cdrom_get_toc( segacd.cd );
2672            cdda_set_cdrom( machine().device(":segacd:cdda"), segacd.cd );
2673            cdda_stop_audio( machine().device( ":segacd:cdda" ) ); //stop any pending CD-DA
2674         }
2675      }
2676   }
2677
2678
2679   if (segacd.cd)
2680      printf("cd found\n");
2681
2682   scd_rammode = 0;
2683   scd_mode_dmna_ret_flags = 0x5421;
2684
2685
2686   stopwatch_timer = machine().device<timer_device>(":segacd:sw_timer");
2687
2688   scd_dma_timer->adjust(attotime::zero);
2689
2690
2691   // HACK!!!! timegal, anettfut, roadaven end up with the SubCPU waiting in a loop for *something*
2692   // overclocking the CPU, even at the point where the game is hung, allows them to continue and boot
2693   // I'm not sure what the source of this timing problem is, it's not using IRQ3 or StopWatch at the
2694   // time.  Changing the CDHock timer to 50hz from 75hz also stops the hang, but then the video is
2695   // too slow and has bad sound.  -- Investigate!
2696
2697   _segacd_68k_cpu->set_clock_scale(1.5000f);
2698
2699
2700   // initialize some stuff on reset
2701   
2702   segacd_ram_writeprotect_bits = 0;
2703   segacd_4meg_prgbank = 0;
2704   segacd_memory_priority_mode = 0;
2705   segacd_stampsize = 0;
2706
2707   segacd_imagebuffer_vdot_size = 0;
2708   segacd_imagebuffer_vcell_size = 0;
2709   segacd_imagebuffer_hdot_size = 0;
2710
2711   segacd_conversion_active = 0;
2712   segacd_stampmap_base_address = 0;
2713   segacd_imagebuffer_start_address = 0;
2714   segacd_imagebuffer_offset = 0;
2715
2716   segacd_comms_flags = 0x0000;
2717
2718   segacd_redled = 0;
2719   segacd_greenled = 0;
2720   segacd_ready = 1; // actually set 100ms after startup?
2721   segacd_irq3_timer_reg = 0;
2722
2723   segacd_gfx_conversion_timer->adjust(attotime::never);
2724   segacd_irq3_timer->adjust(attotime::never);
2725
31452726}
31462727
31472728
trunk/src/mame/machine/megacd.h
r18275r18276
22
33#include "machine/lc89510.h"
44
5
6
7
8#define READ_MAIN (0x0200)
9#define READ_SUB  (0x0300)
10#define DMA_PCM  (0x0400)
11#define DMA_PRG  (0x0500)
12#define DMA_WRAM (0x0700)
13
14#define REG_W_SBOUT  (0x0)
15#define REG_W_IFCTRL (0x1)
16#define REG_W_DBCL   (0x2)
17#define REG_W_DBCH   (0x3)
18#define REG_W_DACL   (0x4)
19#define REG_W_DACH   (0x5)
20#define REG_W_DTTRG  (0x6)
21#define REG_W_DTACK  (0x7)
22#define REG_W_WAL    (0x8)
23#define REG_W_WAH    (0x9)
24#define REG_W_CTRL0  (0xA)
25#define REG_W_CTRL1  (0xB)
26#define REG_W_PTL    (0xC)
27#define REG_W_PTH    (0xD)
28#define REG_W_CTRL2  (0xE)
29#define REG_W_RESET  (0xF)
30
31#define REG_R_COMIN  (0x0)
32#define REG_R_IFSTAT (0x1)
33#define REG_R_DBCL   (0x2)
34#define REG_R_DBCH   (0x3)
35#define REG_R_HEAD0  (0x4)
36#define REG_R_HEAD1  (0x5)
37#define REG_R_HEAD2  (0x6)
38#define REG_R_HEAD3  (0x7)
39#define REG_R_PTL    (0x8)
40#define REG_R_PTH    (0x9)
41#define REG_R_WAL    (0xa)
42#define REG_R_WAH    (0xb)
43#define REG_R_STAT0  (0xc)
44#define REG_R_STAT1  (0xd)
45#define REG_R_STAT2  (0xe)
46#define REG_R_STAT3  (0xf)
47
48#define CMD_STATUS   (0x0)
49#define CMD_STOPALL  (0x1)
50#define CMD_GETTOC   (0x2)
51#define CMD_READ     (0x3)
52#define CMD_SEEK     (0x4)
53//                   (0x5)
54#define CMD_STOP     (0x6)
55#define CMD_RESUME   (0x7)
56#define CMD_FF       (0x8)
57#define CMD_RW       (0x9)
58#define CMD_INIT     (0xa)
59//                   (0xb)
60#define CMD_CLOSE    (0xc)
61#define CMD_OPEN     (0xd)
62//                   (0xe)
63//                   (0xf)
64
65
66#define TOCCMD_CURPOS    (0x0)
67#define TOCCMD_TRKPOS    (0x1)
68#define TOCCMD_CURTRK    (0x2)
69#define TOCCMD_LENGTH    (0x3)
70#define TOCCMD_FIRSTLAST (0x4)
71#define TOCCMD_TRACKADDR (0x5)
72
73struct segacd_t
74{
75   cdrom_file   *cd;
76   const cdrom_toc   *toc;
77   UINT32 current_frame;
78};
79
80
81
82#define SECTOR_SIZE (2352)
83
84#define SET_CDD_DATA_MODE \
85   CDD_CONTROL |= 0x0100; \
86
87#define SET_CDD_AUDIO_MODE \
88   CDD_CONTROL &= ~0x0100; \
89
90#define STOP_CDC_READ \
91   SCD_STATUS_CDC &= ~0x01; \
92
93#define SET_CDC_READ \
94   SCD_STATUS_CDC |= 0x01; \
95
96#define SET_CDC_DMA \
97   SCD_STATUS_CDC |= 0x08; \
98
99#define STOP_CDC_DMA \
100   SCD_STATUS_CDC &= ~0x08; \
101
102#define SCD_READ_ENABLED \
103   (SCD_STATUS_CDC & 1)
104
105#define SCD_DMA_ENABLED \
106   (SCD_STATUS_CDC & 0x08)
107
108#define CLEAR_CDD_RESULT \
109   CDD_MIN = CDD_SEC = CDD_FRAME = CDD_EXT = 0; \
110
111#define CHECK_SCD_LV5_INTERRUPT \
112   if (segacd_irq_mask & 0x20) \
113   { \
114      machine.device(":segacd:segacd_68k")->execute().set_input_line(5, HOLD_LINE); \
115   } \
116
117#define CHECK_SCD_LV4_INTERRUPT \
118   if (segacd_irq_mask & 0x10) \
119   { \
120      machine.device(":segacd:segacd_68k")->execute().set_input_line(4, HOLD_LINE); \
121   } \
122
123
124
125// from master
126#define CHECK_SCD_LV2_INTERRUPT \
127   if (segacd_irq_mask & 0x04) \
128   { \
129      machine.device(":segacd:segacd_68k")->execute().set_input_line(2, HOLD_LINE); \
130   } \
131
132
133// irq3 timer
134#define CHECK_SCD_LV3_INTERRUPT \
135   if (segacd_irq_mask & 0x08) \
136   { \
137      machine().device(":segacd:segacd_68k")->execute().set_input_line(3, HOLD_LINE); \
138   } \
139
140// gfx convert
141#define CHECK_SCD_LV1_INTERRUPT \
142   if (segacd_irq_mask & 0x02) \
143   { \
144      machine().device(":segacd:segacd_68k")->execute().set_input_line(1, HOLD_LINE); \
145   } \
146
147#define CURRENT_TRACK_IS_DATA \
148   (segacd.toc->tracks[SCD_CURTRK - 1].trktype != CD_TRACK_AUDIO) \
149
150
151#define RAM_MODE_2MEG (0)
152#define RAM_MODE_1MEG (2)
153
154
155#define CDD_PLAYINGCDDA   0x0100
156#define CDD_READY      0x0400
157#define CDD_STOPPED      0x0900
158
159#define SEGACD_IRQ3_TIMER_SPEED (attotime::from_nsec(segacd_irq3_timer_reg*30720))
160
161
162
163// the tiles in RAM are 8x8 tiles
164// they are referenced in the cell look-up map as either 16x16 or 32x32 tiles (made of 4 / 16 8x8 tiles)
165
166#define SEGACD_BYTES_PER_TILE16 (128)
167#define SEGACD_BYTES_PER_TILE32 (512)
168
169#define SEGACD_NUM_TILES16 (0x40000/SEGACD_BYTES_PER_TILE16)
170#define SEGACD_NUM_TILES32 (0x40000/SEGACD_BYTES_PER_TILE32)
171
172#define _16x16_SEQUENCE_1  { 8,12,0,4,24,28,16,20, 512+8, 512+12, 512+0, 512+4, 512+24, 512+28, 512+16, 512+20 },
173#define _16x16_SEQUENCE_1_FLIP  { 512+20,512+16,512+28,512+24,512+4,512+0, 512+12,512+8, 20,16,28,24,4,0,12,8 },
174
175#define _16x16_SEQUENCE_2  { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, 8*32, 9*32,10*32,11*32,12*32,13*32,14*32,15*32 },
176#define _16x16_SEQUENCE_2_FLIP  { 15*32, 14*32, 13*32, 12*32, 11*32, 10*32, 9*32, 8*32, 7*32, 6*32, 5*32, 4*32, 3*32, 2*32, 1*32, 0*32 },
177
178
179#define _16x16_START \
180{ \
181   16,16, \
182   SEGACD_NUM_TILES16, \
183   4, \
184   { 0,1,2,3 }, \
185
186#define _16x16_END \
187      8*128 \
188}; \
189
190#define _32x32_START \
191{ \
192   32,32, \
193   SEGACD_NUM_TILES32, \
194   4, \
195   { 0,1,2,3 }, \
196
197
198#define _32x32_END \
199   8*512 \
200}; \
201
202
203
204#define _32x32_SEQUENCE_1 \
205   { 8,12,0,4,24,28,16,20, \
206   1024+8, 1024+12, 1024+0, 1024+4, 1024+24, 1024+28, 1024+16, 1024+20, \
207   2048+8, 2048+12, 2048+0, 2048+4, 2048+24, 2048+28, 2048+16, 2048+20, \
208   3072+8, 3072+12, 3072+0, 3072+4, 3072+24, 3072+28, 3072+16, 3072+20  \
209   }, \
210
211#define _32x32_SEQUENCE_1_FLIP \
212{ 3072+20, 3072+16, 3072+28, 3072+24, 3072+4, 3072+0, 3072+12, 3072+8, \
213  2048+20, 2048+16, 2048+28, 2048+24, 2048+4, 2048+0, 2048+12, 2048+8, \
214  1024+20, 1024+16, 1024+28, 1024+24, 1024+4, 1024+0, 1024+12, 1024+8, \
215  20, 16, 28, 24, 4, 0, 12, 8}, \
216
217
218#define _32x32_SEQUENCE_2 \
219      { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32, \
220       8*32, 9*32, 10*32, 11*32, 12*32, 13*32, 14*32, 15*32, \
221    16*32,17*32,18*32,19*32,20*32,21*32,22*32,23*32, \
222    24*32,25*32, 26*32, 27*32, 28*32, 29*32, 30*32, 31*32}, \
223
224#define _32x32_SEQUENCE_2_FLIP \
225{ 31*32, 30*32, 29*32, 28*32, 27*32, 26*32, 25*32, 24*32, \
226  23*32, 22*32, 21*32, 20*32, 19*32, 18*32, 17*32, 16*32, \
227  15*32, 14*32, 13*32, 12*32, 11*32, 10*32, 9*32 , 8*32 , \
228  7*32 , 6*32 , 5*32 , 4*32 , 3*32 , 2*32 , 1*32 , 0*32}, \
229
230
231/* 16x16 decodes */
232static const gfx_layout sega_16x16_r00_f0_layout =
233_16x16_START
234   _16x16_SEQUENCE_1
235   _16x16_SEQUENCE_2
236_16x16_END
237
238static const gfx_layout sega_16x16_r01_f0_layout =
239_16x16_START
240   _16x16_SEQUENCE_2
241   _16x16_SEQUENCE_1_FLIP
242_16x16_END
243
244static const gfx_layout sega_16x16_r10_f0_layout =
245_16x16_START
246   _16x16_SEQUENCE_1_FLIP
247   _16x16_SEQUENCE_2_FLIP
248_16x16_END
249
250static const gfx_layout sega_16x16_r11_f0_layout =
251_16x16_START
252   _16x16_SEQUENCE_2_FLIP
253   _16x16_SEQUENCE_1
254_16x16_END
255
256static const gfx_layout sega_16x16_r00_f1_layout =
257_16x16_START
258   _16x16_SEQUENCE_1_FLIP
259   _16x16_SEQUENCE_2
260_16x16_END
261
262static const gfx_layout sega_16x16_r01_f1_layout =
263_16x16_START
264   _16x16_SEQUENCE_2
265   _16x16_SEQUENCE_1
266_16x16_END
267
268static const gfx_layout sega_16x16_r10_f1_layout =
269_16x16_START
270   _16x16_SEQUENCE_1
271   _16x16_SEQUENCE_2_FLIP
272_16x16_END
273
274static const gfx_layout sega_16x16_r11_f1_layout =
275_16x16_START
276   _16x16_SEQUENCE_2_FLIP
277   _16x16_SEQUENCE_1_FLIP
278_16x16_END
279
280/* 32x32 decodes */
281static const gfx_layout sega_32x32_r00_f0_layout =
282_32x32_START
283   _32x32_SEQUENCE_1
284   _32x32_SEQUENCE_2
285_32x32_END
286
287static const gfx_layout sega_32x32_r01_f0_layout =
288_32x32_START
289   _32x32_SEQUENCE_2
290   _32x32_SEQUENCE_1_FLIP
291_32x32_END
292
293static const gfx_layout sega_32x32_r10_f0_layout =
294_32x32_START
295   _32x32_SEQUENCE_1_FLIP
296   _32x32_SEQUENCE_2_FLIP
297_32x32_END
298
299static const gfx_layout sega_32x32_r11_f0_layout =
300_32x32_START
301   _32x32_SEQUENCE_2_FLIP
302   _32x32_SEQUENCE_1
303_32x32_END
304
305static const gfx_layout sega_32x32_r00_f1_layout =
306_32x32_START
307   _32x32_SEQUENCE_1_FLIP
308   _32x32_SEQUENCE_2
309_32x32_END
310
311static const gfx_layout sega_32x32_r01_f1_layout =
312_32x32_START
313   _32x32_SEQUENCE_2
314   _32x32_SEQUENCE_1
315_32x32_END
316
317static const gfx_layout sega_32x32_r10_f1_layout =
318_32x32_START
319   _32x32_SEQUENCE_1
320   _32x32_SEQUENCE_2_FLIP
321_32x32_END
322
323static const gfx_layout sega_32x32_r11_f1_layout =
324_32x32_START
325   _32x32_SEQUENCE_2_FLIP
326   _32x32_SEQUENCE_1_FLIP
327_32x32_END
328
329extern UINT16 a12000_halt_reset_reg;
330
5331class sega_segacd_device : public device_t
6332{
7333public:
8334   sega_segacd_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock, device_type type);
9335
10   emu_timer *m_segacd_pwm_timer;
336   cpu_device *_segacd_68k_cpu;
337
338
339   UINT16 segacd_irq_mask;
340   UINT16 *segacd_backupram;
341   timer_device *stopwatch_timer;
342   UINT8 segacd_font_color;
343   UINT16* segacd_font_bits;
344   UINT16 scd_rammode;
345   UINT32 scd_mode_dmna_ret_flags ;
346
347   timer_device *segacd_gfx_conversion_timer;
348   timer_device *segacd_irq3_timer;
349   //timer_device *segacd_hock_timer;
350   timer_device* scd_dma_timer;
351
352   UINT16* segacd_4meg_prgram;  // pointer to SubCPU PrgRAM
353   UINT16* segacd_dataram;
354   UINT16* segacd_dataram2;
355   tilemap_t    *segacd_stampmap[4];
356
357
358   UINT8 segacd_ram_writeprotect_bits;
359   int segacd_4meg_prgbank;// = 0; // which bank the MainCPU can see of the SubCPU PrgRAM
360   int segacd_memory_priority_mode;// = 0;
361   int segacd_stampsize;
362
363   UINT16 segacd_hint_register;
364   UINT16 segacd_imagebuffer_vdot_size;
365   UINT16 segacd_imagebuffer_vcell_size;
366   UINT16 segacd_imagebuffer_hdot_size;
367
368   int segacd_conversion_active;// = 0;
369   UINT16 segacd_stampmap_base_address;
370   UINT16 segacd_imagebuffer_start_address;
371   UINT16 segacd_imagebuffer_offset;
372
373   
374   UINT16 segacd_comms_flags;// = 0x0000;
375   UINT16 segacd_comms_part1[0x8];
376   UINT16 segacd_comms_part2[0x8];
377
378   int segacd_redled;// = 0;
379   int segacd_greenled;// = 0;
380   int segacd_ready;// = 1; // actually set 100ms after startup?
381   UINT16 segacd_irq3_timer_reg;
382
383   segacd_t segacd;
384
385   UINT8    SCD_BUFFER[2560];
386   UINT32   SCD_STATUS;
387   UINT32   SCD_STATUS_CDC;
388   INT32    SCD_CURLBA;
389   UINT8    SCD_CURTRK;
390
391   UINT16 CDC_DECODE;
392   INT16 CDC_DMACNT; // can go negative
393   UINT16 CDC_DMA_ADDRC;
394   UINT16 CDC_PT;
395   UINT16 CDC_WA;
396   UINT16 CDC_REG0;
397   UINT16 CDC_REG1;
398   UINT16 CDC_DMA_ADDR;
399   UINT16 CDC_IFSTAT;
400   UINT8 CDC_HEADB0;
401   UINT8 CDC_HEADB1;
402   UINT8 CDC_HEADB2;
403   UINT8 CDC_HEADB3;
404   UINT8 CDC_STATB0;
405   UINT8 CDC_STATB1;
406   UINT8 CDC_STATB2;
407   UINT8 CDC_STATB3;
408   UINT16 CDC_SBOUT;
409   UINT16 CDC_IFCTRL;
410   UINT8 CDC_CTRLB0;
411   UINT8 CDC_CTRLB1;
412   UINT8 CDC_CTRLB2;
413   UINT8 CDC_BUFFER[(32 * 1024 * 2) + SECTOR_SIZE];
414
415   UINT32 CDD_STATUS;
416   UINT32 CDD_MIN;
417   UINT32 CDD_SEC;
418
419   UINT8 CDD_RX[10];
420   UINT8 CDD_TX[10];
421   UINT32 CDD_FRAME;
422   UINT32 CDD_EXT;
423   UINT16 CDD_CONTROL;
424   INT16  CDD_DONE;
425   
426   TIMER_DEVICE_CALLBACK_MEMBER( segacd_irq3_timer_callback );
427   TIMER_DEVICE_CALLBACK_MEMBER( scd_dma_timer_callback );
428   TIMER_DEVICE_CALLBACK_MEMBER( segacd_access_timer_callback );
429   TIMER_DEVICE_CALLBACK_MEMBER( segacd_gfx_conversion_timer_callback );
430
431   UINT16 handle_segacd_sub_int_callback(int irqline);
432
433   inline int to_bcd(int val, bool byte);
434   inline void write_pixel(running_machine& machine, UINT8 pix, int pixeloffset );
435   UINT16 segacd_1meg_mode_word_read(int offset, UINT16 mem_mask);
436   void segacd_1meg_mode_word_write(running_machine& machine, int offset, UINT16 data, UINT16 mem_mask, int use_pm);
437   void set_data_audio_mode(void);
438   void CDD_DoChecksum(void);
439   void CDD_Export(void);
440   void CDC_UpdateHEAD(void);
441   void scd_ctrl_checks(running_machine& machine);
442   void scd_advance_current_readpos(void);
443   int Read_LBA_To_Buffer(running_machine& machine);
444   void CheckCommand(running_machine& machine);
445   void CDD_GetStatus(void);
446   void CDD_Stop(running_machine &machine);
447   void CDD_GetPos(void);
448   void CDD_GetTrackPos(void);
449   void CDD_GetTrack(void);
450   void CDD_Length(void);
451   void CDD_FirstLast(void);
452   void CDD_GetTrackAdr(void);
453   UINT32 getmsf_from_regs(void);
454   void CDD_Play(running_machine &machine);
455   void CDD_Seek(void);
456   void CDD_Pause(running_machine &machine);
457   void CDD_Resume(running_machine &machine);
458   void CDD_FF(running_machine &machine);
459   void CDD_RW(running_machine &machine);
460   void CDD_Open(void);
461   void CDD_Close(void);
462   void CDD_Init(void);
463   void CDD_Default(void);
464   void CDD_Reset(void);
465   void CDC_Reset(void);
466   void lc89510_Reset(void);
467   void CDC_End_Transfer(running_machine& machine);
468   void CDC_Do_DMA(running_machine& machine, int rate);
469   UINT16 CDC_Host_r(running_machine& machine, UINT16 type);
470   UINT8 CDC_Reg_r(void);
471   void CDC_Reg_w(UINT8 data);
472   void CDD_Process(running_machine& machine, int reason);
473   void CDD_Handle_TOC_Commands(void);
474   void CDD_Import(running_machine& machine);
475
476   void segacd_mark_tiles_dirty(running_machine& machine, int offset);
477   int segacd_get_active_stampmap_tilemap(void);
478
479   void SCD_GET_TILE_INFO_16x16_1x1( int& tile_region, int& tileno, int tile_index );
480   void SCD_GET_TILE_INFO_32x32_1x1( int& tile_region, int& tileno, int tile_index );
481   void SCD_GET_TILE_INFO_16x16_16x16( int& tile_region, int& tileno, int tile_index );
482   void SCD_GET_TILE_INFO_32x32_16x16( int& tile_region, int& tileno, int tile_index );
483   
484   TILE_GET_INFO_MEMBER( get_stampmap_16x16_1x1_tile_info );
485   TILE_GET_INFO_MEMBER( get_stampmap_32x32_1x1_tile_info );
486   TILE_GET_INFO_MEMBER( get_stampmap_16x16_16x16_tile_info );
487   TILE_GET_INFO_MEMBER( get_stampmap_32x32_16x16_tile_info );
488
489   UINT8 get_stampmap_16x16_1x1_tile_info_pixel(running_machine& machine, int xpos, int ypos);
490   UINT8 get_stampmap_32x32_1x1_tile_info_pixel(running_machine& machine, int xpos, int ypos);
491   UINT8 get_stampmap_16x16_16x16_tile_info_pixel(running_machine& machine, int xpos, int ypos);
492   UINT8 get_stampmap_32x32_16x16_tile_info_pixel(running_machine& machine, int xpos, int ypos);
493
494   WRITE16_MEMBER( scd_a12000_halt_reset_w );
495   READ16_MEMBER( scd_a12000_halt_reset_r );
496   READ16_MEMBER( scd_a12002_memory_mode_r );
497   WRITE8_MEMBER( scd_a12002_memory_mode_w_8_15 );
498   WRITE8_MEMBER( scd_a12002_memory_mode_w_0_7 );
499   WRITE16_MEMBER( scd_a12002_memory_mode_w );
500   READ16_MEMBER( segacd_sub_memory_mode_r );
501   WRITE8_MEMBER( segacd_sub_memory_mode_w_8_15 );
502   WRITE8_MEMBER( segacd_sub_memory_mode_w_0_7 );
503   WRITE16_MEMBER( segacd_sub_memory_mode_w );
504
505   READ16_MEMBER( segacd_comms_flags_r );
506   WRITE16_MEMBER( segacd_comms_flags_subcpu_w );
507   WRITE16_MEMBER( segacd_comms_flags_maincpu_w );
508   READ16_MEMBER( scd_4m_prgbank_ram_r );
509   WRITE16_MEMBER( scd_4m_prgbank_ram_w );
510   READ16_MEMBER( segacd_comms_main_part1_r );
511   WRITE16_MEMBER( segacd_comms_main_part1_w );
512   READ16_MEMBER( segacd_comms_main_part2_r );
513   WRITE16_MEMBER( segacd_comms_main_part2_w );
514   READ16_MEMBER( segacd_comms_sub_part1_r );
515   WRITE16_MEMBER( segacd_comms_sub_part1_w );
516   READ16_MEMBER( segacd_comms_sub_part2_r );
517   WRITE16_MEMBER( segacd_comms_sub_part2_w );
518
519   WRITE16_MEMBER( segacd_cdc_mode_address_w );
520   READ16_MEMBER( segacd_cdc_mode_address_r );
521   WRITE16_MEMBER( segacd_cdc_data_w );
522   READ16_MEMBER( segacd_cdc_data_r );
523
524   READ16_MEMBER( segacd_main_dataram_part1_r );
525   WRITE16_MEMBER( segacd_main_dataram_part1_w );
526
527   READ16_MEMBER( scd_hint_vector_r );
528   READ16_MEMBER( scd_a12006_hint_register_r );
529   WRITE16_MEMBER( scd_a12006_hint_register_w );
530
531   READ16_MEMBER( cdc_data_sub_r );
532   READ16_MEMBER( cdc_data_main_r );
533   WRITE16_MEMBER( segacd_stopwatch_timer_w );
534   READ16_MEMBER( segacd_stopwatch_timer_r );
535   READ16_MEMBER( segacd_sub_led_ready_r );
536   WRITE16_MEMBER( segacd_sub_led_ready_w );
537   READ16_MEMBER( segacd_sub_dataram_part1_r );
538   WRITE16_MEMBER( segacd_sub_dataram_part1_w );
539   READ16_MEMBER( segacd_sub_dataram_part2_r );
540   WRITE16_MEMBER( segacd_sub_dataram_part2_w );
541   READ16_MEMBER( segacd_irq_mask_r );
542   WRITE16_MEMBER( segacd_irq_mask_w );
543   READ16_MEMBER( segacd_cdd_ctrl_r );
544   WRITE16_MEMBER( segacd_cdd_ctrl_w );
545   READ8_MEMBER( segacd_cdd_rx_r );
546   WRITE8_MEMBER( segacd_cdd_tx_w );
547   READ16_MEMBER( segacd_stampsize_r );
548   WRITE16_MEMBER( segacd_stampsize_w );
549
550   UINT8 read_pixel_from_stampmap( running_machine& machine, bitmap_ind16* srcbitmap, int x, int y);
551
552   WRITE16_MEMBER( segacd_trace_vector_base_address_w );
553   READ16_MEMBER( segacd_imagebuffer_vdot_size_r );
554   WRITE16_MEMBER( segacd_imagebuffer_vdot_size_w );
555   READ16_MEMBER( segacd_stampmap_base_address_r );
556   WRITE16_MEMBER( segacd_stampmap_base_address_w );
557   READ16_MEMBER( segacd_imagebuffer_start_address_r );
558   WRITE16_MEMBER( segacd_imagebuffer_start_address_w );
559   READ16_MEMBER( segacd_imagebuffer_offset_r );   
560   WRITE16_MEMBER( segacd_imagebuffer_offset_w );
561   READ16_MEMBER( segacd_imagebuffer_vcell_size_r );   
562   WRITE16_MEMBER( segacd_imagebuffer_vcell_size_w );
563   READ16_MEMBER( segacd_imagebuffer_hdot_size_r );
564   WRITE16_MEMBER( segacd_imagebuffer_hdot_size_w );
565   READ16_MEMBER( segacd_irq3timer_r );
566   WRITE16_MEMBER( segacd_irq3timer_w );
567   READ16_MEMBER( cdc_dmaaddr_r );
568   WRITE16_MEMBER( cdc_dmaaddr_w );
569   READ16_MEMBER( segacd_cdfader_r );
570   WRITE16_MEMBER( segacd_cdfader_w );
571   READ16_MEMBER( segacd_backupram_r );
572   WRITE16_MEMBER( segacd_backupram_w );   
573   READ16_MEMBER( segacd_font_color_r );
574   WRITE16_MEMBER( segacd_font_color_w );
575   READ16_MEMBER( segacd_font_converted_r );
576
11577protected:
12578   virtual void device_start();
13579   virtual void device_reset();
trunk/src/mame/includes/megadriv.h
r18275r18276
3131
3232#define MD_CPU_REGION_SIZE (MAX_MD_CART_SIZE + VIRGIN_COPY_GEN)
3333
34extern int sega_cd_connected;
3435
36
3537/*----------- defined in machine/megadriv.c -----------*/
3638
3739INPUT_PORTS_EXTERN( md_common );
r18275r18276
105107   : driver_device(mconfig, type, tag),
106108      m_vdp(*this,"gen_vdp"),
107109      m_megadrive_ram(*this,"megadrive_ram")
108   { }
110   {
111      sega_cd_connected = 0;
112   }
109113   required_device<sega_genesis_vdp_device> m_vdp;
110114   optional_shared_ptr<UINT16> m_megadrive_ram;
111115
r18275r18276
115119   DECLARE_DRIVER_INIT(megadrij);
116120   DECLARE_DRIVER_INIT(mpnew);
117121
118   TILE_GET_INFO_MEMBER( get_stampmap_16x16_1x1_tile_info );
119   TILE_GET_INFO_MEMBER( get_stampmap_32x32_1x1_tile_info );
120   TILE_GET_INFO_MEMBER( get_stampmap_16x16_16x16_tile_info );
121   TILE_GET_INFO_MEMBER( get_stampmap_32x32_16x16_tile_info );
122122   DECLARE_READ8_MEMBER(megadriv_68k_YM2612_read);
123123   DECLARE_WRITE8_MEMBER(megadriv_68k_YM2612_write);
124124};
r18275r18276
453453{
454454public:
455455   segacd_state(const machine_config &mconfig, device_type type, const char *tag)
456   : _32x_state(mconfig, type, tag),
457     m_font_bits(*this,"segacd_font") { }
458
459   required_shared_ptr<UINT16> m_font_bits;
456   : _32x_state(mconfig, type, tag)
457     { }
460458};
461459
462extern int sega_cd_connected;
463extern int segacd_wordram_mapped;
464extern cpu_device *_segacd_68k_cpu;
465extern MACHINE_RESET( segacd );
466ADDRESS_MAP_EXTERN( segacd_map, driver_device);
467extern TIMER_DEVICE_CALLBACK( scd_dma_timer_callback );
468extern timer_device* scd_dma_timer;
469extern void segacd_init_main_cpu( running_machine& machine );
470460
471461/*----------- defined in machine/md_cart.c -----------*/
472462

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