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| r18269 Wednesday 3rd October, 2012 at 16:13:27 UTC by Oliver Stöneberg |
|---|
| removed some more expressions which are always true/false (no whatsnew) |
| [src/mame/drivers] | chihiro.c firebeat.c gstream.c megaplay.c segas16a.c taitopjc.c |
| [src/mame/video] | artmagic.c konamigx.c m90.c |
| r18268 | r18269 | |
|---|---|---|
| 174 | 174 | cx += incxx; |
| 175 | 175 | cy += incxy; |
| 176 | 176 | |
| 177 | if (offs | |
| 177 | if (offs>=src_size) | |
| 178 | 178 | continue; |
| 179 | 179 | |
| 180 | 180 | if (srcx < src_minx || srcx > src_maxx || srcy < src_miny || srcy > src_maxy) |
| r18268 | r18269 | |
| 244 | 244 | cx += incxx; |
| 245 | 245 | cy += incxy; |
| 246 | 246 | |
| 247 | if (offs | |
| 247 | if (offs>=src_size) | |
| 248 | 248 | continue; |
| 249 | 249 | |
| 250 | 250 | if (srcx < src_minx || srcx > src_maxx || srcy < src_miny || srcy > src_maxy) |
| r18268 | r18269 | |
|---|---|---|
| 23 | 23 | { |
| 24 | 24 | offs_t original = *address; |
| 25 | 25 | *address = TOWORD(original & 0x001fffff); |
| 26 | if (original | |
| 26 | if (original < 0x001fffff) | |
| 27 | 27 | return state->m_vram0; |
| 28 | 28 | else if (original >= 0x00400000 && original < 0x005fffff) |
| 29 | 29 | return state->m_vram1; |
| r18268 | r18269 | |
|---|---|---|
| 278 | 278 | { |
| 279 | 279 | offset -= page * 0x2000; |
| 280 | 280 | |
| 281 | if (offset | |
| 281 | if (offset < 0x2000) | |
| 282 | 282 | tmap->mark_tile_dirty(offset/2); |
| 283 | 283 | } |
| 284 | 284 |
| r18268 | r18269 | |
|---|---|---|
| 110 | 110 | tile &= 0xff; |
| 111 | 111 | tile -= 0x40; |
| 112 | 112 | |
| 113 | if (tile < 0) tile = 0; | |
| 114 | 113 | if (tile > 127) tile = 127; |
| 115 | 114 | |
| 116 | 115 | for (y=0; y < 16; y++) |
| r18268 | r18269 | |
|---|---|---|
| 841 | 841 | { |
| 842 | 842 | UINT32 r = 0; |
| 843 | 843 | fujitsu_29f016a_device *chip; |
| 844 | if (offset | |
| 844 | if (offset < 0x200000/4) | |
| 845 | 845 | { |
| 846 | 846 | chip = m_flash[1]; |
| 847 | 847 | } |
| r18268 | r18269 | |
| 874 | 874 | WRITE32_MEMBER(firebeat_state::soundflash_w) |
| 875 | 875 | { |
| 876 | 876 | fujitsu_29f016a_device *chip; |
| 877 | if (offset | |
| 877 | if (offset < 0x200000/4) | |
| 878 | 878 | { |
| 879 | 879 | chip = m_flash[1]; |
| 880 | 880 | } |
| r18268 | r18269 | |
| 1802 | 1802 | |
| 1803 | 1803 | READ8_MEMBER(firebeat_state::soundram_r) |
| 1804 | 1804 | { |
| 1805 | if (offset | |
| 1805 | if (offset < 0x200000) | |
| 1806 | 1806 | { |
| 1807 | 1807 | return m_flash[1]->read(offset & 0x1fffff); |
| 1808 | 1808 | } |
| r18268 | r18269 | |
|---|---|---|
| 237 | 237 | |
| 238 | 238 | if (ACCESSING_BITS_24_31) |
| 239 | 239 | { |
| 240 | if (offset | |
| 240 | if (offset < 0x400 / 4) | |
| 241 | 241 | { |
| 242 | m_tilemap1->mark_tile_dirty(offset | |
| 242 | m_tilemap1->mark_tile_dirty(offset); | |
| 243 | 243 | } |
| 244 | 244 | else if (offset >= 0x400 / 4 && offset < 0x800 / 4) |
| 245 | 245 | { |
| r18268 | r18269 | |
|---|---|---|
| 1165 | 1165 | } else if ((offset >= 0x00600000/4) && (offset < 0x00601000/4)) { |
| 1166 | 1166 | ret=pcrtc[offset-0x00600000/4]; |
| 1167 | 1167 | logerror("NV_2A: read PCRTC[%06X] value %08X\n",offset*4-0x00600000,ret); |
| 1168 | } else if ((offset >= 0x00000000/4) && (offset < 0x00001000/4)) { | |
| 1169 | ret=pmc[offset-0x00000000/4]; | |
| 1168 | } else if ( offset < 0x00001000/4) { | |
| 1169 | ret=pmc[offset]; | |
| 1170 | 1170 | logerror("NV_2A: read PMC[%06X] value %08X\n",offset*4-0x00000000,ret); |
| 1171 | 1171 | } else if ((offset >= 0x00800000/4) && (offset < 0x00900000/4)) { |
| 1172 | 1172 | // 32 channels size 0x10000 each, 8 subchannels per channel size 0x2000 each |
| r18268 | r18269 | |
| 1200 | 1200 | } else if ((offset >= 0x00600000/4) && (offset < 0x00601000/4)) { |
| 1201 | 1201 | COMBINE_DATA(pcrtc+offset-0x00600000/4); |
| 1202 | 1202 | logerror("NV_2A: write PCRTC[%06X]=%08X\n",offset*4-0x00600000,data & mem_mask); |
| 1203 | } else if ((offset >= 0x00000000/4) && (offset < 0x00001000/4)) { | |
| 1204 | COMBINE_DATA(pmc+offset-0x00000000/4); | |
| 1203 | } else if ( offset < 0x00001000/4) { | |
| 1204 | COMBINE_DATA(pmc+offset); | |
| 1205 | 1205 | logerror("NV_2A: write PMC[%06X]=%08X\n",offset*4-0x00000000,data & mem_mask); |
| 1206 | 1206 | } else if ((offset >= 0x00800000/4) && (offset < 0x00900000/4)) { |
| 1207 | 1207 | // 32 channels size 0x10000 each, 8 subchannels per channel size 0x2000 each |
| r18268 | r18269 | |
|---|---|---|
| 430 | 430 | UINT8* bank = state->memregion("mtbios")->base(); |
| 431 | 431 | UINT32 fulladdress = state->m_mp_bios_bank_addr + offset; |
| 432 | 432 | |
| 433 | if ( | |
| 433 | if (fulladdress <= 0x3fffff) // ROM Addresses | |
| 434 | 434 | { |
| 435 | 435 | if (state->m_bios_mode & MP_ROM) |
| 436 | 436 | { |
| r18268 | r18269 | |
| 470 | 470 | mplay_state *state = space.machine().driver_data<mplay_state>(); |
| 471 | 471 | UINT32 fulladdress = state->m_mp_bios_bank_addr + offset; |
| 472 | 472 | |
| 473 | if ( | |
| 473 | if (fulladdress <= 0x3fffff) // ROM / Megaplay Custom Addresses | |
| 474 | 474 | { |
| 475 | 475 | if (offset <= 0x1fff && (state->m_bios_width & 0x08)) |
| 476 | 476 | { |
| r18268 | r18269 | |
|---|---|---|
| 585 | 585 | { |
| 586 | 586 | case 0: |
| 587 | 587 | // access watchdog? (unsure about this one) |
| 588 | if ( | |
| 588 | if ( offset < 0x3fff) | |
| 589 | 589 | return watchdog_reset_r(space, 0); |
| 590 | 590 | |
| 591 | 591 | // access main work RAM |
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