Previous 199869 Revisions Next

r18248 Tuesday 2nd October, 2012 at 18:52:47 UTC by Wilbert Pol
(MESS) a2600: Changed some more c functions into members. (nw)
[src/mess/drivers]a2600.c

trunk/src/mess/drivers/a2600.c
r18247r18248
113113   void modeDPC_decrement_counter(UINT8 data_fetcher);
114114   virtual void machine_reset();
115115   DECLARE_MACHINE_START(a2600);
116   DECLARE_MACHINE_START(a2600p);
117116   TIMER_CALLBACK_MEMBER(modeDPC_timer_callback);
118117   DECLARE_WRITE8_MEMBER(switch_A_w);
119118   DECLARE_READ8_MEMBER(switch_A_r);
120119   DECLARE_WRITE8_MEMBER(switch_B_w);
121120   DECLARE_WRITE_LINE_MEMBER(irq_callback);
122121   DECLARE_READ8_MEMBER(riot_input_port_8_r);
122
123protected:
124   int next_bank();
125   void modeF8_switch(UINT16 offset, UINT8 data);
126   void modeFA_switch(UINT16 offset, UINT8 data);
127   void modeF6_switch(UINT16 offset, UINT8 data);
128   void modeF4_switch(UINT16 offset, UINT8 data);
129   void mode3F_switch(UINT16 offset, UINT8 data);
130   void modeUA_switch(UINT16 offset, UINT8 data);
131   void modeE0_switch(UINT16 offset, UINT8 data);
132   void modeE7_switch(UINT16 offset, UINT8 data);
133   void modeE7_RAM_switch(UINT16 offset, UINT8 data);
134   void modeDC_switch(UINT16 offset, UINT8 data);
135   void mode3E_switch(UINT16 offset, UINT8 data);
136   void mode3E_RAM_switch(UINT16 offset, UINT8 data);
137   void modeFV_switch(UINT16 offset, UINT8 data);
138   void modeJVP_switch(UINT16 offset, UINT8 data);
139
140   UINT8   *m_cart;
123141};
124142
125143
r18247r18248
579597}
580598
581599
582static int next_bank(a2600_state *state)
600int a2600_state::next_bank()
583601{
584   return state->m_current_bank = (state->m_current_bank + 1) % 16;
602   return m_current_bank = (m_current_bank + 1) % 16;
585603}
586604
587605
588static void modeF8_switch(running_machine &machine, UINT16 offset, UINT8 data)
606void a2600_state::modeF8_switch(UINT16 offset, UINT8 data)
589607{
590   a2600_state *state = machine.driver_data<a2600_state>();
591   state->m_bank_base[1] = CART + 0x1000 * offset;
592   state->membank("bank1")->set_base(state->m_bank_base[1]);
608   m_bank_base[1] = m_cart + 0x1000 * offset;
609   membank("bank1")->set_base(m_bank_base[1]);
593610}
594static void modeFA_switch(running_machine &machine, UINT16 offset, UINT8 data)
611
612void a2600_state::modeFA_switch(UINT16 offset, UINT8 data)
595613{
596   a2600_state *state = machine.driver_data<a2600_state>();
597   state->m_bank_base[1] = CART + 0x1000 * offset;
598   state->membank("bank1")->set_base(state->m_bank_base[1]);
614   m_bank_base[1] = m_cart + 0x1000 * offset;
615   membank("bank1")->set_base(m_bank_base[1]);
599616}
600static void modeF6_switch(running_machine &machine, UINT16 offset, UINT8 data)
617
618void a2600_state::modeF6_switch(UINT16 offset, UINT8 data)
601619{
602   a2600_state *state = machine.driver_data<a2600_state>();
603   state->m_bank_base[1] = CART + 0x1000 * offset;
604   state->membank("bank1")->set_base(state->m_bank_base[1]);
620   m_bank_base[1] = m_cart + 0x1000 * offset;
621   membank("bank1")->set_base(m_bank_base[1]);
605622}
606static void modeF4_switch(running_machine &machine, UINT16 offset, UINT8 data)
623
624void a2600_state::modeF4_switch(UINT16 offset, UINT8 data)
607625{
608   a2600_state *state = machine.driver_data<a2600_state>();
609   state->m_bank_base[1] = CART + 0x1000 * offset;
610   state->membank("bank1")->set_base(state->m_bank_base[1]);
626   m_bank_base[1] = m_cart + 0x1000 * offset;
627   membank("bank1")->set_base(m_bank_base[1]);
611628}
612static void mode3F_switch(running_machine &machine, UINT16 offset, UINT8 data)
629
630void a2600_state::mode3F_switch(UINT16 offset, UINT8 data)
613631{
614   a2600_state *state = machine.driver_data<a2600_state>();
615   state->m_bank_base[1] = CART + 0x800 * (data & (state->m_number_banks - 1));
616   state->membank("bank1")->set_base(state->m_bank_base[1]);
632   m_bank_base[1] = m_cart + 0x800 * (data & (m_number_banks - 1));
633   membank("bank1")->set_base(m_bank_base[1]);
617634}
618static void modeUA_switch(running_machine &machine, UINT16 offset, UINT8 data)
635
636void a2600_state::modeUA_switch(UINT16 offset, UINT8 data)
619637{
620   a2600_state *state = machine.driver_data<a2600_state>();
621   state->m_bank_base[1] = CART + (offset >> 6) * 0x1000;
622   state->membank("bank1")->set_base(state->m_bank_base[1]);
638   m_bank_base[1] = m_cart + (offset >> 6) * 0x1000;
639   membank("bank1")->set_base(m_bank_base[1]);
623640}
624static void modeE0_switch(running_machine &machine, UINT16 offset, UINT8 data)
641
642void a2600_state::modeE0_switch(UINT16 offset, UINT8 data)
625643{
626   a2600_state *state = machine.driver_data<a2600_state>();
627644   int bank = 1 + (offset >> 3);
628645   char bank_name[10];
629646   sprintf(bank_name,"bank%d",bank);
630   state->m_bank_base[bank] = CART + 0x400 * (offset & 7);
631   state->membank(bank_name)->set_base(state->m_bank_base[bank]);
647   m_bank_base[bank] = m_cart + 0x400 * (offset & 7);
648   membank(bank_name)->set_base(m_bank_base[bank]);
632649}
633static void modeE7_switch(running_machine &machine, UINT16 offset, UINT8 data)
650
651void a2600_state::modeE7_switch(UINT16 offset, UINT8 data)
634652{
635   a2600_state *state = machine.driver_data<a2600_state>();
636   state->m_bank_base[1] = CART + 0x800 * offset;
637   state->membank("bank1")->set_base(state->m_bank_base[1]);
653   m_bank_base[1] = m_cart + 0x800 * offset;
654   membank("bank1")->set_base(m_bank_base[1]);
638655}
639static void modeE7_RAM_switch(running_machine &machine, UINT16 offset, UINT8 data)
656
657void a2600_state::modeE7_RAM_switch(UINT16 offset, UINT8 data)
640658{
641   a2600_state *state = machine.driver_data<a2600_state>();
642   state->membank("bank9")->set_base(state->m_extra_RAM->base() + (4 + offset) * 256 );
659   membank("bank9")->set_base(m_extra_RAM->base() + (4 + offset) * 256 );
643660}
644static void modeDC_switch(running_machine &machine, UINT16 offset, UINT8 data)
661
662void a2600_state::modeDC_switch(UINT16 offset, UINT8 data)
645663{
646   a2600_state *state = machine.driver_data<a2600_state>();
647   state->m_bank_base[1] = CART + 0x1000 * next_bank(state);
648   state->membank("bank1")->set_base(state->m_bank_base[1]);
664   m_bank_base[1] = m_cart + 0x1000 * next_bank();
665   membank("bank1")->set_base(m_bank_base[1]);
649666}
650static void mode3E_switch(running_machine &machine, UINT16 offset, UINT8 data)
667
668void a2600_state::mode3E_switch(UINT16 offset, UINT8 data)
651669{
652   a2600_state *state = machine.driver_data<a2600_state>();
653   state->m_bank_base[1] = CART + 0x800 * (data & (state->m_number_banks - 1));
654   state->membank("bank1")->set_base(state->m_bank_base[1]);
655   state->m_mode3E_ram_enabled = 0;
670   m_bank_base[1] = m_cart + 0x800 * (data & (m_number_banks - 1));
671   membank("bank1")->set_base(m_bank_base[1]);
672   m_mode3E_ram_enabled = 0;
656673}
657static void mode3E_RAM_switch(running_machine &machine, UINT16 offset, UINT8 data)
674
675void a2600_state::mode3E_RAM_switch(UINT16 offset, UINT8 data)
658676{
659   a2600_state *state = machine.driver_data<a2600_state>();
660   state->m_ram_base = state->m_extra_RAM->base() + 0x200 * ( data & 0x3F );
661   state->membank("bank1")->set_base(state->m_ram_base );
662   state->m_mode3E_ram_enabled = 1;
677   m_ram_base = m_extra_RAM->base() + 0x200 * ( data & 0x3F );
678   membank("bank1")->set_base(m_ram_base);
679   m_mode3E_ram_enabled = 1;
663680}
664static void modeFV_switch(running_machine &machine, UINT16 offset, UINT8 data)
681
682void a2600_state::modeFV_switch(UINT16 offset, UINT8 data)
665683{
666   a2600_state *state = machine.driver_data<a2600_state>();
667   //printf("ModeFV %04x\n",offset);
668   if (!state->m_FVlocked && ( machine.device("maincpu")->safe_pc() & 0x1F00 ) == 0x1F00 )
684   if (!m_FVlocked && ( machine().device("maincpu")->safe_pc() & 0x1F00 ) == 0x1F00 )
669685   {
670      state->m_FVlocked = 1;
671      state->m_current_bank = state->m_current_bank ^ 0x01;
672      state->m_bank_base[1] = CART + 0x1000 * state->m_current_bank;
673      state->membank("bank1")->set_base(state->m_bank_base[1]);
686      m_FVlocked = 1;
687      m_current_bank = m_current_bank ^ 0x01;
688      m_bank_base[1] = m_cart + 0x1000 * m_current_bank;
689      membank("bank1")->set_base(m_bank_base[1]);
674690   }
675691}
676static void modeJVP_switch(running_machine &machine, UINT16 offset, UINT8 data)
692
693void a2600_state::modeJVP_switch(UINT16 offset, UINT8 data)
677694{
678   a2600_state *state = machine.driver_data<a2600_state>();
679695   switch( offset )
680696   {
681697   case 0x00:
682698   case 0x20:
683      state->m_current_bank ^= 1;
699      m_current_bank ^= 1;
684700      break;
685701   default:
686      printf("%04X: write to unknown mapper address %02X\n", machine.device("maincpu")->safe_pc(), 0xfa0 + offset );
702      printf("%04X: write to unknown mapper address %02X\n", machine().device("maincpu")->safe_pc(), 0xfa0 + offset );
687703      break;
688704   }
689   state->m_bank_base[1] = CART + 0x1000 * state->m_current_bank;
690   state->membank("bank1")->set_base(state->m_bank_base[1] );
705   m_bank_base[1] = m_cart + 0x1000 * m_current_bank;
706   membank("bank1")->set_base(m_bank_base[1] );
691707}
692708
693709
694710/* These read handlers will return the byte from the new bank */
695711READ8_MEMBER(a2600_state::modeF8_switch_r)
696712{
697   modeF8_switch(machine(), offset, 0);
713   modeF8_switch(offset, 0);
698714   return m_bank_base[1][0xff8 + offset];
699715}
700716
701717READ8_MEMBER(a2600_state::modeFA_switch_r)
702718{
703   modeFA_switch(machine(), offset, 0);
719   modeFA_switch(offset, 0);
704720   return m_bank_base[1][0xff8 + offset];
705721}
706722
707723READ8_MEMBER(a2600_state::modeF6_switch_r)
708724{
709   modeF6_switch(machine(), offset, 0);
725   modeF6_switch(offset, 0);
710726   return m_bank_base[1][0xff6 + offset];
711727}
712728
713729READ8_MEMBER(a2600_state::modeF4_switch_r)
714730{
715   modeF4_switch(machine(), offset, 0);
731   modeF4_switch(offset, 0);
716732   return m_bank_base[1][0xff4 + offset];
717733}
718734
719735READ8_MEMBER(a2600_state::modeE0_switch_r)
720736{
721   modeE0_switch(machine(), offset, 0);
737   modeE0_switch(offset, 0);
722738   return m_bank_base[4][0x3e0 + offset];
723739}
724740
725741READ8_MEMBER(a2600_state::modeE7_switch_r)
726742{
727   modeE7_switch(machine(), offset, 0);
743   modeE7_switch(offset, 0);
728744   return m_bank_base[1][0xfe0 + offset];
729745}
730746
731747READ8_MEMBER(a2600_state::modeE7_RAM_switch_r)
732748{
733   modeE7_RAM_switch(machine(), offset, 0);
749   modeE7_RAM_switch(offset, 0);
734750   return 0;
735751}
736752
737753READ8_MEMBER(a2600_state::modeUA_switch_r)
738754{
739   modeUA_switch(machine(), offset, 0);
755   modeUA_switch(offset, 0);
740756   return 0;
741757}
742758
743759READ8_MEMBER(a2600_state::modeDC_switch_r)
744760{
745   modeDC_switch(machine(), offset, 0);
761   modeDC_switch(offset, 0);
746762   return m_bank_base[1][0xff0 + offset];
747763}
748764
749765READ8_MEMBER(a2600_state::modeFV_switch_r)
750766{
751   modeFV_switch(machine(), offset, 0);
767   modeFV_switch(offset, 0);
752768   return m_bank_base[1][0xfd0 + offset];
753769}
754770
755771READ8_MEMBER(a2600_state::modeJVP_switch_r)
756772{
757   modeJVP_switch(machine(), offset, 0);
773   modeJVP_switch(offset, 0);
758774   return m_riot_ram[ 0x20 + offset ];
759775}
760776
761777
762WRITE8_MEMBER(a2600_state::modeF8_switch_w){ modeF8_switch(machine(), offset, data); }
763WRITE8_MEMBER(a2600_state::modeFA_switch_w){ modeFA_switch(machine(), offset, data); }
764WRITE8_MEMBER(a2600_state::modeF6_switch_w){ modeF6_switch(machine(), offset, data); }
765WRITE8_MEMBER(a2600_state::modeF4_switch_w){ modeF4_switch(machine(), offset, data); }
766WRITE8_MEMBER(a2600_state::modeE0_switch_w){ modeE0_switch(machine(), offset, data); }
767WRITE8_MEMBER(a2600_state::modeE7_switch_w){ modeE7_switch(machine(), offset, data); }
768WRITE8_MEMBER(a2600_state::modeE7_RAM_switch_w){ modeE7_RAM_switch(machine(), offset, data); }
769WRITE8_MEMBER(a2600_state::mode3F_switch_w){ mode3F_switch(machine(), offset, data); }
770WRITE8_MEMBER(a2600_state::modeUA_switch_w){ modeUA_switch(machine(), offset, data); }
771WRITE8_MEMBER(a2600_state::modeDC_switch_w){ modeDC_switch(machine(), offset, data); }
772WRITE8_MEMBER(a2600_state::mode3E_switch_w){ mode3E_switch(machine(), offset, data); }
773WRITE8_MEMBER(a2600_state::mode3E_RAM_switch_w){ mode3E_RAM_switch(machine(), offset, data); }
778WRITE8_MEMBER(a2600_state::modeF8_switch_w){ modeF8_switch(offset, data); }
779WRITE8_MEMBER(a2600_state::modeFA_switch_w){ modeFA_switch(offset, data); }
780WRITE8_MEMBER(a2600_state::modeF6_switch_w){ modeF6_switch(offset, data); }
781WRITE8_MEMBER(a2600_state::modeF4_switch_w){ modeF4_switch(offset, data); }
782WRITE8_MEMBER(a2600_state::modeE0_switch_w){ modeE0_switch(offset, data); }
783WRITE8_MEMBER(a2600_state::modeE7_switch_w){ modeE7_switch(offset, data); }
784WRITE8_MEMBER(a2600_state::modeE7_RAM_switch_w){ modeE7_RAM_switch(offset, data); }
785WRITE8_MEMBER(a2600_state::mode3F_switch_w){ mode3F_switch(offset, data); }
786WRITE8_MEMBER(a2600_state::modeUA_switch_w){ modeUA_switch(offset, data); }
787WRITE8_MEMBER(a2600_state::modeDC_switch_w){ modeDC_switch(offset, data); }
788WRITE8_MEMBER(a2600_state::mode3E_switch_w){ mode3E_switch(offset, data); }
789WRITE8_MEMBER(a2600_state::mode3E_RAM_switch_w){ mode3E_RAM_switch(offset, data); }
774790WRITE8_MEMBER(a2600_state::mode3E_RAM_w)
775791{
776792   if ( m_mode3E_ram_enabled )
r18247r18248
778794      m_ram_base[offset] = data;
779795   }
780796}
781WRITE8_MEMBER(a2600_state::modeFV_switch_w){ modeFV_switch(machine(), offset, data); }
797WRITE8_MEMBER(a2600_state::modeFV_switch_w){ modeFV_switch(offset, data); }
782798WRITE8_MEMBER(a2600_state::modeJVP_switch_w)
783799{
784   modeJVP_switch(machine(), offset, data); m_riot_ram[ 0x20 + offset ] = data;
800   modeJVP_switch(offset, data); m_riot_ram[ 0x20 + offset ] = data;
785801}
786802
787803
r18247r18248
15851601};
15861602
15871603
1588static void common_init(running_machine &machine)
1589{
1590   a2600_state *state = machine.driver_data<a2600_state>();
1591   screen_device *screen = machine.first_screen();
1592   state->m_current_screen_height = screen->height();
1593   state->m_extra_RAM = machine.memory().region_alloc("user2", 0x8600, 1, ENDIANNESS_LITTLE);
1594   memset( state->m_riot_ram, 0x00, 0x80 );
1595   state->m_current_reset_bank_counter = 0xFF;
1596   state->m_dpc.oscillator = machine.scheduler().timer_alloc(timer_expired_delegate(FUNC(a2600_state::modeDPC_timer_callback),state));
1597}
1598
15991604MACHINE_START_MEMBER(a2600_state,a2600)
16001605{
1601   common_init(machine());
1606   screen_device *screen = machine().first_screen();
1607   m_current_screen_height = screen->height();
1608   m_extra_RAM = machine().memory().region_alloc("user2", 0x8600, 1, ENDIANNESS_LITTLE);
1609   memset( m_riot_ram, 0x00, 0x80 );
1610   m_current_reset_bank_counter = 0xFF;
1611   m_dpc.oscillator = machine().scheduler().timer_alloc(timer_expired_delegate(FUNC(a2600_state::modeDPC_timer_callback),this));
1612   m_cart = CART_MEMBER;
16021613}
16031614
1604MACHINE_START_MEMBER(a2600_state,a2600p)
1605{
1606   common_init(machine());
1607}
16081615
16091616#ifdef UNUSED_FUNCTIONS
16101617// try to detect 2600 controller setup. returns 32bits with left/right controller info
r18247r18248
22692276   MCFG_CPU_ADD("maincpu", M6502, MASTER_CLOCK_PAL / 3)    /* actually M6507 */
22702277   MCFG_CPU_PROGRAM_MAP(a2600_mem)
22712278
2272   MCFG_MACHINE_START_OVERRIDE(a2600_state,a2600p)
2279   MCFG_MACHINE_START_OVERRIDE(a2600_state,a2600)
22732280
22742281   /* video hardware */
22752282   MCFG_TIA_VIDEO_ADD("tia_video", a2600_tia_interface_pal)

Previous 199869 Revisions Next

© 1997-2024 The MAME Team