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r18200 Saturday 29th September, 2012 at 12:41:50 UTC by Miodrag Milanović
New NOT WORKING game
--------------------
VLC Nevada [Yves]
[src/mame]mame.lst mame.mak
[src/mame/drivers]vlc.c*

trunk/src/mame/drivers/vlc.c
r0r18200
1/*     vlc.c
2Multi-games from VLC Nevada 1995
3CGA monitor 15Khz 60hz
4// CPU    CLOCK use Crystal 16.000MHZ
5// VIDEO  CLOCK use Crystal 33.000MHZ
6
7    - 1x MC68000  (CPU)  8mhz
8    - 1x MC68B45P (CRTC)
9    - 1x AY3-8912 (sound)
10    - 1x M4262B oki (RTC CLOCK)
11    - 3x MC68681  (2 x UART)
12    - 4x 27C512
13    - 2x 62256 NVRAM  + batt  (connect in 16bits)
14    - 2x 6264  BACKUP + batt  (connect in  8bits)
15    - 1x MODEM XE1214 from XECOM (300/1200 Baud)
16   
17   
18   
19on MAME 0.145u4
20Yves
21Todo :
22Video Section
23Security PAL U35 decoding
24In/Out interface Board communication (included mechanical METER + some switch Door open ,etc..)
25JCM Bill acceptor communication (probably ID-003 protocol)
26PRINTER communication (Star Printer )
27
28******************************************************
29******************************************************
30SECURITY SYSTEM
31
32ADRESS A40000..A40001
33U35 PAL16R8  SECURITY
34PAL is connect on the BUS D15..D8
35Write Clock 8 bits in D15..D8
36Read  OE    8 bit  on D15..D8
37
38U50 4Bit D Flop Register is connect on D3..D0
39this one seem to have 2 use.
401. keep track of the PAL16R8 state
412. DOOR SWITCH is connect on U50 Clear pin (D3..D0 LOW = Door Open)
42Write Clock 4 bits in D-Flop Register
43Read  OE    4 bits on D3..D0
44
45
46Boot Section is locate in NVRAM. Interrupts Pointers are changed on the fly.
47seem to check hardware WDT ,Power Failure , interrupt system,etc..  before game start.
48
49INT7 seem to control POWER FAILURE ,WDT.
50INT7 initialisation is needed to boot the game.
51
52******************************************************
53******************************************************
54VIDEO REGISTER of 6845
55
56BOOT:FE1A82 00A5 0000           CRTC_TYPE1:     dc.l unk_A50000
57BOOT:FE1A86 0000                                dc.b   0
58BOOT:FE1A87 0000                                dc.b   0
59BOOT:FE1A88 0000                                dc.b   0
60BOOT:FE1A89 0000                                dc.b   0
61BOOT:FE1A8A 0000                                dc.b   0
62BOOT:FE1A8B 0007                                dc.b   7
63BOOT:FE1A8C 0000                                dc.b   0
64BOOT:FE1A8D 001F                                dc.b $1F
65BOOT:FE1A8E 001F                                dc.b $1F
66BOOT:FE1A8F 0002                                dc.b   2
67BOOT:FE1A90 0020                                dc.b $20
68BOOT:FE1A91 0003                                dc.b   3
69BOOT:FE1A92 0023                                dc.b $23 * #
70BOOT:FE1A93 001F                                dc.b $1F
71BOOT:FE1A94 002A                                dc.b $2A * *
72BOOT:FE1A95 0000                                dc.b   0
73BOOT:FE1A96 00A5 8000           CRTC_TYPE2:     dc.l unk_A58000
74BOOT:FE1A9A 00FF                                dc.b $FF
75BOOT:FE1A9B 0000                                dc.b   0
76BOOT:FE1A9C 0000                                dc.b   0
77BOOT:FE1A9D 0000                                dc.b   0
78BOOT:FE1A9E 0000                                dc.b   0
79BOOT:FE1A9F 0007                                dc.b   7
80BOOT:FE1AA0 0000                                dc.b   0
81BOOT:FE1AA1 001F                                dc.b $1F
82BOOT:FE1AA2 001F                                dc.b $1F
83BOOT:FE1AA3 0002                                dc.b   2
84BOOT:FE1AA4 0020                                dc.b $20
85BOOT:FE1AA5 0006                                dc.b   6
86BOOT:FE1AA6 0033                                dc.b $33 * 3
87BOOT:FE1AA7 002D                                dc.b $2D * -
88BOOT:FE1AA8 0040                                dc.b $40 * @
89BOOT:FE1AA9 0000                                dc.b   0
90
91
92BOOT:FE19F0                     INI_CRTC6845:                           
93BOOT:FE19F0 48E7 8140                           movem.l d0/d7/a1,-(sp)
94BOOT:FE19F4 2258                                movea.l (a0)+,a1        * type1 = 0xA50000, type2 = 0xA80000
95BOOT:FE19F6 50D1                                st      (a1)
96BOOT:FE19F8 11D8 0435                           move.b  (a0)+,(ScreenMode)
97BOOT:FE19FC 4278 0412                           clr.w   (word_412)
98BOOT:FE1A00 2248                                movea.l a0,a1
99BOOT:FE1A02 3E3C 0FFF                           move.w  #$FFF,d7
100BOOT:FE1A06 307C 0000                           movea.w #0,a0
101BOOT:FE1A0A 6100 0108                           bsr     set_vid_D0_A0   * D0 = 0x800020
102BOOT:FE1A0A                                                             * A0 = 0xB00000
103BOOT:FE1A0E 7E0D                                moveq   #$D,d7
104BOOT:FE1A10
105BOOT:FE1A10                     LOOP:                                   
106BOOT:FE1A10 13C7 0090 0001                      move.b  d7,(CRTC_ADR)
107BOOT:FE1A16 13D9 0090 8001                      move.b  (a1)+,(CRTC_DAT)
108BOOT:FE1A1C 51CF FFF2                           dbf     d7,LOOP
109BOOT:FE1A20 4CDF 0281                           movem.l (sp)+,d0/d7/a1
110BOOT:FE1A24 4E75                                rts
111
112
113    *** MC6845 Initialization ***
114                Htotal   Hdisp   HsyncPos HsyncW   Vtotal  VtotalAdj Vdisp  VsyncPos InterMode MaxScanAdr CurStart CurEnd StartAdrH StartAdrL CurH  CurL  LightPenH LightPenL
115    -------------------------------------------------------------------------------------------------------------------------------------------------------------------------
116    register:   00       01      02       03       04      05        06     07       08        09         10       11     12        13        14    15    16        17
117    -------------------------------------------------------------------------------------------------------------------------------------------------------------------------
118nevada TYPE1 :  42       31      35       03       32      02        31     31       00        07         00       00     00        00        00    00    00        00
119nevada TYPE2 :  64       45      51       06       32      02        31     31       00        07         00       00     00        00        00    00    00        00
120       
121*/
122
123
124#define MASTER_CLOCK   XTAL_16MHz
125#define MASTER_CPU            ((MASTER_CLOCK)/2)    // 8mhz
126#define SOUND_CLOCK           ((MASTER_CLOCK) /8)   // 2mhz
127
128#define VIDEO_CLOCK           XTAL_33MHz
129#define MC6845_CLOCK          ((VIDEO_CLOCK)/4/16)  // 0.515625 MHZ
130
131
132#include "emu.h"
133#include "cpu/m68000/m68000.h"
134#include "machine/68681.h"
135#include "video/mc6845.h"
136#include "sound/ay8910.h"
137#include "machine/msm6242.h"
138#include "machine/microtch.h"
139
140
141/***************************************************************************
142
143                                 General
144
145***************************************************************************/
146
147
148class nevada_state : public driver_device
149{
150public:
151   nevada_state(const machine_config &mconfig, device_type type, const char *tag)
152      : driver_device(mconfig, type, tag),
153      m_maincpu(*this,"maincpu"),
154      m_microtouch(*this,"microtouch"),
155        m_nvram(*this, "nvram"),
156        m_backup(*this, "backup")
157      { }
158
159   DECLARE_WRITE8_MEMBER(microtouch_tx);
160   device_t *m_duart18_68681;
161   device_t *m_duart39_68681;
162   device_t *m_duart40_68681;
163   
164   required_device<cpu_device> m_maincpu;
165   optional_device<microtouch_device> m_microtouch;
166
167   required_shared_ptr<UINT16>   m_nvram;
168   required_shared_ptr<UINT16> m_backup;
169   
170   UINT16  m_datA40000;
171   
172        //UINT8* m_videoram;
173        //UINT8* m_colorram;
174       
175   UINT16* m_videoram;
176   tilemap_t *m_bg_tilemap;
177
178   
179   DECLARE_DRIVER_INIT(nevada);
180};
181
182/*
183need further test on PAL16R8 (FlipFlop Trick with other bits ?)
184this DUMP is done writing 0 to 255 and reading output (probably not the good way.)
185
186PAL is connected on the UPPER byte D15..D8
187Adress A40000..A40001
1882 Type of PAL (one for game, the other is to set game to fabric default)       
189
190there is a 74LS173 on the LOWER byte that used bit D3..D0
191funny thing , the DOOR ACCESS Switch is connected on the CLEAR  PIN of this 4bits register
192so when D3..D0 are LOW , DOOR is OPEN
193*/
194static const UINT8 pal35[256] = {
1950x11, 0x42, 0x5B, 0xCA, 0x19, 0x42, 0x5B, 0xCA, 0x38, 0x63, 0x3A, 0x63, 0x3A, 0x63, 0x3A, 0x63,
1960xD3, 0x08, 0x5B, 0xCA, 0x19, 0xCA, 0x19, 0xCA, 0x18, 0xEB, 0x18, 0xEB, 0x18, 0xEB, 0x18, 0xEB,
1970xD3, 0xCA, 0x5B, 0xCC, 0x5B, 0xCC, 0x5B, 0xCC, 0xBA, 0x63, 0x38, 0x65, 0x38, 0x65, 0x38, 0x65,
1980xD1, 0xCA, 0x5B, 0xC8, 0x5B, 0xC8, 0x5B, 0xC8, 0x9A, 0xEB, 0x1A, 0xED, 0x1A, 0xED, 0x1A, 0xED,
1990x0C, 0x65, 0xF0, 0x00, 0x64, 0xF5, 0x04, 0x65, 0xB8, 0x25, 0x20, 0x20, 0x24, 0x24, 0x24, 0x24,
2000xF0, 0x00, 0xF8, 0x00, 0xFC, 0x00, 0xFC, 0x00, 0xB8, 0x3D, 0xFC, 0x19, 0xFC, 0x19, 0xFC, 0x19,
2010x44, 0xF9, 0xC4, 0xF9, 0xC4, 0xFD, 0xC4, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD, 0xFC, 0xFD,
2020xC0, 0xD9, 0xC8, 0xD9, 0xC8, 0xD9, 0xC8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9, 0xD8, 0xD9,
2030x0C, 0x44, 0xFB, 0x04, 0x67, 0xD4, 0x0C, 0x44, 0xBA, 0x24, 0x22, 0x02, 0x26, 0x06, 0x26, 0x06,
2040xFB, 0x00, 0xFB, 0x00, 0xEF, 0x10, 0xCE, 0x18, 0xEF, 0x18, 0xEF, 0x18, 0xFF, 0x18, 0xFF, 0x18,
2050x44, 0xF8, 0xC6, 0xD8, 0xCE, 0xDC, 0xCE, 0xDC, 0xEF, 0x9E, 0x67, 0xB8, 0x67, 0xBC, 0x67, 0xBC,
2060xC6, 0xD8, 0xCA, 0xD8, 0xCA, 0xD8, 0xCA, 0xD8, 0xCB, 0x9A, 0xEF, 0x9A, 0xFF, 0xD8, 0xDB, 0xD8,
2070x66, 0xF4, 0x00, 0x64, 0xBA, 0x25, 0x22, 0x22, 0x26, 0x26, 0x26, 0x26, 0xF2, 0x00, 0xFA, 0x00,
2080xFA, 0x00, 0xFA, 0x00, 0xBA, 0x3D, 0xFA, 0x19, 0xFA, 0x19, 0xFA, 0x19, 0x44, 0xF9, 0xC2, 0xF0,
2090xC2, 0xF4, 0xC2, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xFA, 0xF4, 0xC2, 0xD0, 0xCA, 0xD0,
2100xCA, 0xD0, 0xCA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0xDA, 0xD0, 0x08, 0x63, 0xD3, 0x08   
211};
212
213
214/***************************************************************************/
215/********************   VIDEO SECTION   ************************************/
216/***************************************************************************/
217
218static const mc6845_interface mc6845_intf =
219{
220   "screen",      /* screen we are acting on */
221   8,      /* number of pixels per video memory address */
222   NULL,      /* before pixel update callback */
223   NULL,      /* row update callback */
224   NULL,      /* after pixel update callback */
225   DEVCB_NULL,   /* callback for display state changes */
226   DEVCB_NULL,   /* callback for cursor state changes */
227   DEVCB_NULL,   /* HSYNC callback */
228   DEVCB_NULL,   /* VSYNC callback */
229   NULL      /* update address callback */
230};
231
232static const gfx_layout charlayout =
233{
234 /* Todo  , just for sample */   
235   
236   8,8,
237   RGN_FRAC(1,4),
238   4,
239   { RGN_FRAC(0,4), RGN_FRAC(1,4), RGN_FRAC(2,4), RGN_FRAC(3,4) },
240   { 0, 1, 2, 3, 4, 5, 6, 7 },
241   { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 },
242   8*8
243};
244
245/***************************************************************************/
246/*
247static WRITE16_HANDLER( nevada_videoram_w )
248{
249// Todo, Just for sample   
250
251   nevada_state *state = space->machine().driver_data<nevada_state>();
252   state->m_videoram[offset] = data;
253   state->m_bg_tilemap->mark_tile_dirty(offset);
254
255}
256*/
257/***************************************************************************/
258static GFXDECODE_START( nevada )
259  /* Todo  , just for sample */   
260  GFXDECODE_ENTRY( "gfx1", 0x0000, charlayout,   0, 8 )
261GFXDECODE_END
262
263/***************************************************************************/
264/*
265static TILE_GET_INFO( get_bg_tile_info )
266{
267// Todo, Just for sample   
268   nevada_state *state = machine.driver_data<nevada_state>();
269
270   int attr = state->m_colorram[tile_index];
271   int code = ((attr & 1) << 8) | state->m_videoram[tile_index];
272   int bank = (attr & 0x02) >> 1;
273   int color = (attr & 0x3c) >> 2;
274
275   SET_TILE_INFO(bank, code, color, 0);
276
277}
278*/
279
280/***************************************************************************/
281static VIDEO_START( nevada )
282{
283// todo   
284/*
285   nevada_state *state = machine.driver_data<nevada_state>();
286   state->m_bg_tilemap = tilemap_create(machine, get_bg_tile_info, tilemap_scan_rows, 8, 8, 32, 32);
287*/   
288}
289
290/***************************************************************************/
291static SCREEN_UPDATE_IND16( nevada )
292{
293 // Todo
294/*
295   nevada_state *state = screen.machine().driver_data<nevada_state>();
296   state->m_bg_tilemap->draw(bitmap, cliprect, 0, 0);
297*/   
298  return 0;   
299}
300
301/***************************************************************************/
302static PALETTE_INIT( nevada )
303{
304
305   // Palette init
306}
307
308/***************************************************************************/
309/********************   NVRAM SECTION   ************************************/
310/***************************************************************************/
311
312static  NVRAM_HANDLER( nevada )
313{
314   nevada_state *state = machine.driver_data<nevada_state>();
315   if (read_or_write)
316      file->write(state->m_nvram,state->m_nvram.bytes());
317   else
318   {
319      if (file)
320         file->read(state->m_nvram,state->m_nvram.bytes());
321      else
322      {   
323        UINT16* defaultram = (UINT16 *) state->memregion("defaults")->base();
324        memset(state->m_nvram,0x00,state->m_nvram.bytes());
325        if (defaultram) memcpy(state->m_nvram, state->memregion("defaults")->base(), state->memregion("defaults")->bytes());
326      }     
327   }
328}
329
330/***************************************************************************
331
332    U18 MC68681 RS232 UART  SIDEA = MODEM 1200 Baud
333    U18 MC68681 RS232 UART  SIDEB = not used
334    Interrupt 4
335***************************************************************************/
336
337static void duart18_irq_handler(device_t *device, int state, UINT8 vector )
338{     
339   device->machine().device("maincpu")->execute().set_input_line_and_vector(4, state, vector);
340};
341
342/***************************************************************************/
343static void duart18_tx(device_t *device, int channel, UINT8 data)
344{
345//   nevada_state *state = device->machine().driver_data<nevada_state>();
346/* Todo  , just for sample */     
347   if ( channel == 0 )
348   {
349            // Modem 1200 Baud
350   }     
351};
352
353/***************************************************************************/
354static UINT8 duart18_input( device_t *device )
355{
356   return device->machine().root_device().ioport("DSW1")->read();
357}
358
359/***************************************************************************/
360/***************************************************************************/
361/***************************************************************************/
362/***************************************************************************
363
364    U39 MC68681 RS232 UART SIDEA = Printer J3 (rs232)
365    U39 MC68681 RS232 UART SIDEB = Player Tracking Interface J2 (not used)
366    Interrupt 3
367***************************************************************************/
368
369static void duart39_irq_handler( device_t *device, int state, UINT8 vector )
370{   
371   device->machine().device("maincpu")->execute().set_input_line_and_vector(3, state, vector);
372};
373
374/***************************************************************************/
375static void duart39_tx(device_t *device, int channel, UINT8 data)
376{
377//   nevada_state *state = device->machine().driver_data<nevada_state>();
378/* Todo  , just for sample */     
379   if ( channel == 0 )
380   {
381            // Printer
382   }   
383   else
384   {
385     // Player Tracking Interface J2 (not used)
386   }   
387         
388};
389
390/***************************************************************************/
391static UINT8 duart39_input( device_t *device )
392{
393   return device->machine().root_device().ioport("DSW2")->read();
394}
395
396/***************************************************************************/
397/***************************************************************************/
398/***************************************************************************/
399/***************************************************************************
400
401    68681 DUART <-> Microtouch touch screen controller communication
402    U40 MC68681 RS232 UART  SIDEA = TouchScreen J1 (RS232)
403    U40 MC68681 RS232 UART  SIDEB = JCM Bill Acceptor (RS422)
404    Interrupt 5
405***************************************************************************/
406
407static void duart40_irq_handler( device_t *device, int state, UINT8 vector )
408{
409/* Todo  , just for sample */   
410   device->machine().device("maincpu")->execute().set_input_line_and_vector(5, state, vector);
411};
412
413/***************************************************************************/
414static void duart40_tx( device_t *device, int channel, UINT8 data )
415{
416/* Todo  , just for sample */   
417          nevada_state *state = device->machine().driver_data<nevada_state>();
418   if ( channel == 0 )
419   {
420     state->m_microtouch->rx(state->generic_space(), 0, data);
421   }
422   else
423          {
424           // JCM Bill Acceptor   
425          }     
426};
427/***************************************************************************/
428WRITE8_MEMBER( nevada_state::microtouch_tx )
429{
430   /* Todo  , just for sample */   
431   duart68681_rx_data(m_duart40_68681, 0, data);
432}
433
434static const microtouch_interface nevada_microtouch_config =
435{
436   DEVCB_DRIVER_MEMBER(nevada_state, microtouch_tx),
437   NULL
438};
439/***************************************************************************/
440static UINT8 duart40_input( device_t *device )
441{
442   return device->machine().root_device().ioport("DSW3")->read();
443}
444
445
446/***************************************************************************/
447/*********************    RTC SECTION       ********************************/
448/***************************************************************************/
449static WRITE_LINE_DEVICE_HANDLER(nevada_rtc_irq)
450{
451   device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ1, HOLD_LINE);   // rtc interrupt on INT1
452}
453
454/***************************************************************************/
455static MSM6242_INTERFACE( nevada_rtc_intf )
456{
457   DEVCB_LINE(nevada_rtc_irq)
458};
459
460/***************************************************************************/
461/*********************    SOUND SECTION     ********************************/
462/***************************************************************************/
463static const ay8910_interface ay8910_config =
464{
465   AY8910_LEGACY_OUTPUT,
466   AY8910_DEFAULT_LOADS,
467//   DEVCB_INPUT_PORT("DSW1"),  /* not used */
468//   DEVCB_INPUT_PORT("DSW2"),  /* not used */
469   DEVCB_NULL,   /* callback for display state changes */
470   DEVCB_NULL,   /* callback for cursor state changes */
471   DEVCB_NULL,
472   DEVCB_NULL
473};
474
475/***************************************************************************/
476static READ16_HANDLER(io_board_r)
477{   
478  // IO board Serial communication 0xA00000     
479  return 1;   
480}
481/***************************************************************************/
482static WRITE16_HANDLER(io_board_w)
483{
484  // IO board Serial communication 0xA00000 on bit0
485}
486/***************************************************************************/
487static WRITE16_HANDLER (io_board_x)
488{
489 // IO board Serial communication 0xA80000  on bit15
490}
491
492/***************************************************************************/
493static READ16_HANDLER( nevada_sec_r )
494{         
495   nevada_state *state = space.machine().driver_data<nevada_state>();   
496//   D3..D0 = DOOR OPEN or Track STATE of PAL35
497  UINT16 res;   
498    /* UPPER byte is use for input in PAL35 */         
499           // 74LS173 $bits Register used LOWER bits D3..D0 for PAL35 state and DOOR LOGIC SWITCH
500          res = pal35[state->m_datA40000 >> 8];
501          res = res << 8;
502          res = res | (state->m_datA40000 & 0x00FF);
503         
504   return res;
505}
506/***************************************************************************/
507static WRITE16_HANDLER( nevada_sec_w )
508{   
509   nevada_state *state = space.machine().driver_data<nevada_state>();   
510   // 74LS173 $bits Register used LOWER bits D3..D0 for DOOR LOGIC SWITCH
511   state->m_datA40000 = data | 0x00f0;     // since D7..D4 are not used and are connected to PULLUP
512//   popmessage("WRITE %04x %04x  ",datA40000,data);
513}
514
515/***************************************************************************/
516
517/*
518DOOR Switch desc
5191 x FRONT DOOR SW
5201 x REAR DOOR SW
5211 x COIN DOOR SW
5221 x TOP DOOR SW
5231 x COMPUTER DOOR SW
524 
525Interrupt Vector
526INT1  RTC MSM6242
527INT2  nc
528INT3  UART U39
529INT4  UART U18
530INT5  UART U40
531INT6  nc
532INT7  Seem to be used for confirmation of Ds1232 WDT work (need futher check)
533
534U40 MC68681 RS232 UART  SIDEA = TouchScreen J1 (RS232)
535U40 MC68681 RS232 UART  SIDEB = JCM Bill Acceptor (RS422)
536
537U39 MC68681 RS232 UART SIDEA = Printer J3 (rs232)
538U39 MC68681 RS232 UART SIDEB = Player Tracking Interface J2 (not used)
539
540U18 MC68681 RS232 UART SIDEA = MODEM LOW SPEED 1200 BAUD from XECOM
541
542U18 MC68681 PIN4  IP1  from U16 (75HC189 pin6) from PIN2 J90 UNKNOWN !
543U18 MC68681 PIN36 IP2  ACCESS DOOR SWITCH
544U18 MC68681 PIN2  IP3  LOW Battery Detector for ACCESS DOOR SWITCH
545U18 MC68681 PIN39 IP4  from U12 75174  UNKNOWN !
546U18 MC68681 PIN38 IP5  from U8 smart Battery (not used)
547
548U39 MC68681 PIN7  IP0  Printer Data Terminal Ready
549U39 MC68681 PIN4  IP1  COIN INPUT
550U39 MC68681 PIN2  IP3  COIN INPUT
551U39 MC68681 Pin38 IP5  JCM Bill Acceptor (J4-1,J4-2)
552U39 MC68681 PIN29 OP0  Printer Clear To Send
553
554U40 MC68681 PIN4  IP1  COIN INPUT
555U40 MC68681 PIN2  IP3  COIN INPUT
556U40 MC68681 PIN38 IP5  from U51 DS1260 smart Battery POWER FAIL FLAG
557
558U40 MC68681 Pin12 OP1  JCM Bill Acceptor  (Enable Comm. U34)
559U40 MC68681 Pin27 OP4  JCM Bill Acceptor  (J4-6, J4-7 Control)
560
561// missing adress for :
562// external I/O board communication via PAL23
563
564    A23 A22 A21 A20  | A19 A18 A17 A16 | A15 A14 A13 A12 | A11 A10 A9 A8 | A7 A6 A5 A4 | A3 A2 A1 xx
565    Memory Map (generic)
566    --------------------
567    00000000 0000FFFF  NVRAM  (only 0..FFFF vector and jump)  16bits
568    00010000 00011FFF  BACKUP1                                 8bits
569    00020000 00021FFF  BACKUP2                                 8bits 
570    00B00000 00B01FFF  VIDEO RAM                               8bits
571    00FA0000 00FBFFFF  Not used (Expension board  SRAM)
572    00FC0000 00FDFFFF  PROGRAM                                16bits
573    00FE0000 00FFFFFF  BOOTLOADER                             16bits
574
575    00010001
576    00014001
577    00020001
578    00024001
579    00900001 6845  CS  CRTC U8  RS=LOW   ADRESS REGISTER    (A15 ON RS)  Data bus on D7..D0
580    00980001 6845  CS  CRTC U8  RS=HIGH  DATA   REGISTER    (A15 ON RS)
581    00A00001           I/O Board Communication
582    00A08001           I/O Board Communication
583    00A10000 WDT    STROBE DS1232 WatchDog Controller (this adress reset Strobe of Ds1232)
584    00A20001 AY8912 BDIR  AUDIO  Data bus on D7..D0
585    00A28001 AY8912 BC1   AUDIO   
586    00A300x1 6242  CS  RTC  U41 A0..A3   (A4..A7 ON A0..A3)  Data bus on D3..D0
587    00A4000x PAL   CS  READ   U35 SECURITY PAL16R8           Data bus on D15..D8
588    00A4000x PAL   CLK WRITE  U35 SECURITY PAL16R8
589    00A4000x       CLK WRITE  U50 74LS173  for DOOR LOGIC SW on D3..D0
590    00A70000 ???
591    00B100x0 68681 CS  UART U40 RS1..RS4 REGISTER (A4..A7 ON RS1..RS4)  Data bus on D7..D0
592    00B200x0 68681 CS  UART U39 RS1..RS4 REGISTER (A4..A7 ON RS1..RS4)  Data bus on D7..D0
593    00E000x0 68681 CS  UART U18 RS1..RS4 REGISTER (A4..A7 ON RS1..RS4)  Data bus on D15..D8
594*/   
595/***************************************************************************/
596static ADDRESS_MAP_START( nevada_map, AS_PROGRAM, 16,nevada_state )
597   AM_RANGE(0x00000000, 0x0000ffff) AM_RAM AM_SHARE("nvram")
598   AM_RANGE(0x00010000, 0x00021fff) AM_RAM AM_SHARE("backup")
599   AM_RANGE(0x00900000, 0x00900001) AM_DEVWRITE8("crtc",mc6845_device, address_w,0x00ff ) 
600   AM_RANGE(0x00908000, 0x00908001) AM_DEVWRITE8("crtc",mc6845_device,register_w,0x00ff )
601   AM_RANGE(0x00a00000, 0x00a00001) AM_READWRITE_LEGACY (io_board_r,io_board_w)
602   AM_RANGE(0x00a08000, 0x00a08001) AM_WRITE_LEGACY(io_board_x)
603   AM_RANGE(0x00a10000, 0x00a10001) AM_WRITE(watchdog_reset16_w )
604   AM_RANGE(0x00a20000, 0x00a20001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_address_w,0x00ff ) 
605   AM_RANGE(0x00a28000, 0x00a28001) AM_DEVWRITE8_LEGACY("aysnd", ay8910_data_w   ,0x00ff )   
606   AM_RANGE(0x00a30000, 0x00A300ff) AM_DEVREADWRITE8("rtc",msm6242_device, read, write, 0x00ff)
607   AM_RANGE(0x00a40000, 0x00A40001) AM_READWRITE_LEGACY( nevada_sec_r, nevada_sec_w)
608        //AM_RANGE(0x00b00000, 0x00b01fff) AM_RAM_WRITE(nevada_videoram_w) AM_BASE_MEMBER(nevada_state, m_videoram)
609          AM_RANGE(0x00b00000, 0x00b01fff) AM_RAM // Video
610   AM_RANGE(0x00b10000, 0x00b100ff) AM_DEVREADWRITE8_LEGACY( "duart40_68681", duart68681_r, duart68681_w, 0x00ff ) // Lower byte
611   AM_RANGE(0x00b20000, 0x00b200ff) AM_DEVREADWRITE8_LEGACY( "duart39_68681", duart68681_r, duart68681_w, 0x00ff ) // Lower byte
612   AM_RANGE(0x00e00000, 0x00e000ff) AM_DEVREADWRITE8_LEGACY( "duart18_68681", duart68681_r, duart68681_w, 0xff00 ) // Upper byte
613   AM_RANGE(0x00fa0000, 0x00fbffff) AM_RAM  // not used
614   AM_RANGE(0x00fc0000, 0x00ffffff) AM_ROM  // ROM ext + ROM boot
615ADDRESS_MAP_END
616
617
618/***************************************************************************/
619static ADDRESS_MAP_START( nevada_iomap, AS_IO, 8, nevada_state )
620// todo
621
622ADDRESS_MAP_END
623/*
624U18 MC68681 PIN4  IP1  from U16 (75HC189 pin6) from PIN2 J90 UNKNOWN !
625U18 MC68681 PIN36 IP2  ACCESS DOOR SWITCH
626U18 MC68681 PIN2  IP3  LOW Battery Detector for ACCESS DOOR SWITCH
627U18 MC68681 PIN39 IP4  from U12 75174  UNKNOWN !
628U18 MC68681 PIN38 IP5  from U8 smart Battery (not used)
629
630U39 MC68681 PIN7  IP0  Printer Data Terminal Ready
631U39 MC68681 PIN4  IP1  COIN INPUT
632U39 MC68681 PIN2  IP3  COIN INPUT
633U39 MC68681 Pin38 IP5  JCM Bill Acceptor (J4-1,J4-2)
634U39 MC68681 PIN29 OP0  Printer Clear To Send
635U39 MC68681 PIN27 OP4  ROM CHAR A14
636
637U40 MC68681 PIN4  IP1  COIN INPUT
638U40 MC68681 PIN2  IP3  COIN INPUT
639U40 MC68681 PIN38 IP5  from U51 DS1260 smart Battery POWER FAIL FLAG
640
641U40 MC68681 Pin12 OP1  JCM Bill Acceptor  (Enable Comm. U34)
642U40 MC68681 Pin27 OP4  JCM Bill Acceptor  (J4-6, J4-7 Control)
643
644*/
645/***************************************************************************/
646static INPUT_PORTS_START( nevada )
647   PORT_START("DSW1")
648   PORT_BIT( 0x0001, IP_ACTIVE_LOW,  IPT_BUTTON1  ) PORT_NAME("U16 pin6")
649   PORT_BIT( 0x0002, IP_ACTIVE_LOW,  IPT_BUTTON2  ) PORT_NAME("DOOR SW1")
650   PORT_BIT( 0x0004, IP_ACTIVE_LOW,  IPT_BUTTON3  ) PORT_NAME("LOW BATT on DOOR ACCESS")
651   PORT_BIT( 0x0008, IP_ACTIVE_LOW,  IPT_BUTTON4  ) PORT_NAME("U12 ??")
652   PORT_BIT( 0x0080, IP_ACTIVE_LOW,  IPT_BUTTON5  ) PORT_NAME("LOW BATT U8")
653   PORT_START("DSW2")
654   PORT_BIT( 0x0001, IP_ACTIVE_LOW,  IPT_BUTTON6  ) PORT_NAME("PRINTER READY")
655   PORT_BIT( 0x0002, IP_ACTIVE_LOW,  IPT_COIN1    )
656   PORT_BIT( 0x0008, IP_ACTIVE_LOW,  IPT_COIN2    )
657   PORT_START("DSW3")
658   PORT_BIT( 0x0002, IP_ACTIVE_LOW,  IPT_COIN3    )
659   PORT_BIT( 0x0008, IP_ACTIVE_LOW,  IPT_COIN4    )   
660   PORT_BIT( 0x0080, IP_ACTIVE_LOW,  IPT_BUTTON7  ) PORT_NAME("LOW BATT U51")
661INPUT_PORTS_END
662
663/***************************************************************************/
664static const duart68681_config nevada_duart18_68681_config =
665{
666   duart18_irq_handler,
667   duart18_tx,
668   duart18_input,
669   NULL
670};
671/***************************************************************************/
672static const duart68681_config nevada_duart39_68681_config =
673{
674   duart39_irq_handler,
675   duart39_tx,
676   duart39_input,
677   NULL
678};
679/***************************************************************************/
680static const duart68681_config nevada_duart40_68681_config =
681{
682   duart40_irq_handler,
683   duart40_tx,
684   duart40_input,
685   NULL
686};
687
688/***************************************************************************/
689/*************************
690*     Machine Reset      *
691*************************/
692
693static MACHINE_RESET( nevada )
694{
695
696  nevada_state *state = machine.driver_data<nevada_state>();
697 
698  state->m_duart18_68681 = machine.device( "duart18_68681" );
699  state->m_duart39_68681 = machine.device( "duart39_68681" );
700  state->m_duart40_68681 = machine.device( "duart40_68681" );
701}
702/***************************************************************************/
703
704/*************************
705*     Machine Driver     *
706*************************/
707
708static MACHINE_CONFIG_START( nevada, nevada_state )
709   // basic machine hardware
710   MCFG_CPU_ADD("maincpu", M68000, MASTER_CPU)
711   MCFG_CPU_PROGRAM_MAP(nevada_map)
712   MCFG_CPU_IO_MAP(nevada_iomap)  //0x10000 0x20000
713     
714   MCFG_MACHINE_RESET(nevada)
715          MCFG_WATCHDOG_TIME_INIT(attotime::from_msec(150))   /* 150ms Ds1232 TD to Ground */
716   
717   
718   MCFG_NVRAM_HANDLER(nevada)   
719
720   // video hardware
721   MCFG_SCREEN_ADD("screen", RASTER)
722   MCFG_SCREEN_REFRESH_RATE(60)
723   MCFG_SCREEN_VBLANK_TIME(ATTOSECONDS_IN_USEC(0))         
724   MCFG_SCREEN_SIZE((42+1)*8, (32+1)*8)                  /* From MC6845 init, registers 00 & 04 (programmed with value-1). */
725   MCFG_SCREEN_VISIBLE_AREA(0*8, 31*8-1, 0*8, 31*8-1)    /* From MC6845 init, registers 01 & 06. */
726   MCFG_SCREEN_UPDATE_STATIC(nevada)
727
728   MCFG_GFXDECODE(nevada)
729          MCFG_PALETTE_LENGTH(256)
730   MCFG_PALETTE_INIT(nevada)
731   MCFG_VIDEO_START(nevada)
732   
733   MCFG_MC6845_ADD("crtc", MC6845, MC6845_CLOCK, mc6845_intf)
734   
735   // sound hardware
736   MCFG_SPEAKER_STANDARD_MONO("mono")
737
738   MCFG_SOUND_ADD("aysnd", AY8912, SOUND_CLOCK)
739   MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.75)
740   
741   MCFG_DUART68681_ADD( "duart18_68681", XTAL_3_6864MHz , nevada_duart18_68681_config )  // UARTA = Modem 1200Baud
742   MCFG_DUART68681_ADD( "duart39_68681", XTAL_3_6864MHz , nevada_duart39_68681_config )  // UARTA = Printer
743   MCFG_DUART68681_ADD( "duart40_68681", XTAL_3_6864MHz , nevada_duart40_68681_config )  // UARTA = Touch , UARTB = Bill Acceptor
744   MCFG_MICROTOUCH_ADD( "microtouch", nevada_microtouch_config )
745   /* devices */
746   MCFG_MSM6242_ADD("rtc", nevada_rtc_intf)
747     
748MACHINE_CONFIG_END
749
750/***************************************************************************/
751ROM_START( nevada )
752   ROM_REGION( 0x1000000, "maincpu", 0 )   /* 2 x 27C512 */     
753   ROM_LOAD16_BYTE( "u9even.bin" ,     0xfc0000, 0x010000, CRC(ADB207BD) SHA1(3E3509B78FDF32785F92CB21272694673D25C563) )  // program fc0000..fdffff
754   ROM_LOAD16_BYTE( "u10odd.bin" ,     0xfc0001, 0x010000, CRC(A79778D7) SHA1(6FF969F09D9781479360BCA3403B927099AD6481) )
755   
756   ROM_LOAD16_BYTE( "u31even.bin",     0xfe0000, 0x010000, CRC(C9779F30) SHA1(5310B3D8B5E887313CE8059BD72D0730A295074F) )  // Boot fe0000..ffffff
757   ROM_LOAD16_BYTE( "u32odd.bin" ,     0xfe0001, 0x010000, CRC(51035ED1) SHA1(66CBF582CDF34CF3DDE30CF8A99BBCED4AF1CE6F) )   
758     
759   ROM_REGION16_BE( 0x0010000, "defaults", 0 )   /* 2 x 62256  NVRAM */
760   ROM_LOAD16_BYTE( "u30nv_even.bin",  0x000000, 0x008000, CRC(11f5c663) SHA1(f447fd59010bc7fbbda321c5aaf13e23c2aebd40) )  // NVRAM even  (RESET + Vector table in NVRAM)
761   ROM_LOAD16_BYTE( "u33nv_odd.bin" ,  0x000001, 0x008000, CRC(20623da2) SHA1(2dd31a96f0a3454855cd975e8ee95e43316344e0) )  // NVRAM odd
762
763   ROM_REGION( 0x08000, "gfx1", 0 )
764   ROM_LOAD( "u34char.bin",            0x00000  , 0x08000, CRC(6F1C6953) SHA1(E8DB3B1D3FC3EC1C3DCA155517553BD0000A2249) )   /* Characters */
765
766        /*
767        BACKUP RAM
768        PAL DUMP
769        */ 
770ROM_END
771
772/***************************************************************************/
773/*************************
774*      Driver Init       *
775*************************/
776DRIVER_INIT_MEMBER(nevada_state,nevada)
777{
778  UINT16 *ROM = (UINT16 *)memregion("maincpu")->base();   
779 
780   memset(m_backup,0x00,m_backup.bytes()); // temp
781   
782  /* Patch for WDT test with int Level7 */
783  /* PATCH FE0086   4278 0414 Clrf $0414 */
784  /* this skip the test for the WDT */
785//   ROM[0xFE0086/2] = 0x4278; 
786//   ROM[0xFE0088/2] = 0x0414; 
787   
788 // Skip PAL SECURITY   
789   ROM[0xFE0248/2] = 0x4E71; // nop
790   ROM[0xFE05D0/2] = 0x4E71; // nop
791   ROM[0xFE05D8/2] = 0x6014; // bra
792   ROM[0xFE0606/2] = 0x600A; // bra
793//   ROM[0xFE18B4/2] = 0x4E71; // nop
794 
795 
796}
797/***************************************************************************/
798
799/*************************
800*      Game Drivers      *
801*************************/
802
803/*    YEAR  NAME     PARENT MACHINE INPUT   INIT    ROT    COMPANY    FULLNAME             FLAGS... */
804
805GAME( 1995, nevada,  0,     nevada, nevada, nevada_state, nevada, ROT0, "vlc inc.", "vlc nevada",        GAME_NO_SOUND | GAME_NOT_WORKING )
trunk/src/mame/mame.lst
r18199r18200
2827928279strike
2828028280
2828128281
28282// VLC Nevada
28283nevada
2828228284
28283
2828428285/* Below are misc lazy adds, or yet to be sorted out... */
2828528286
trunk/src/mame/mame.mak
r18199r18200
19131913   $(DRIVERS)/vcombat.o \
19141914   $(DRIVERS)/vectrex.o $(VIDEO)/vectrex.o $(MACHINE)/vectrex.o \
19151915   $(DRIVERS)/videopkr.o \
1916   $(DRIVERS)/vlc.o \
19161917    $(DRIVERS)/voyager.o \
19171918   $(DRIVERS)/vp101.o \
19181919   $(DRIVERS)/vpoker.o \

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