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r18181 Thursday 27th September, 2012 at 18:09:04 UTC by Angelo Salese
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[src/emu/machine]

seibu_cop.c seibu_cop.h

trunk/src/emu/machine/seibu_cop.c

r18180	r18181
2	2
3	3	Seibu COP protection device
4	4
5		(this header needs expanding)
	5	(this header needs expanding!)
6	6
7	7	***************************************************************************/
8	8
r18180	r18181
18	18	// device type definition
19	19	const device_type SEIBU_COP = &device_creator<seibu_cop_device>;
20	20
21		#if 0
22		static ADDRESS_MAP_START( seibu_cop_vram, AS_0, 16, seibu_cop_device )
	21
	22	static ADDRESS_MAP_START( seibu_cop_io, AS_0, 16, seibu_cop_device )
	23	AM_RANGE(0x0028, 0x0029) AM_WRITE(dma_fill_val_lo_w)
	24	AM_RANGE(0x002a, 0x002b) AM_WRITE(dma_fill_val_hi_w)
	25	AM_RANGE(0x005a, 0x005b) AM_WRITE(pal_brightness_val_w)
	26	AM_RANGE(0x005c, 0x005d) AM_WRITE(pal_brightness_mode_w)
	27	AM_RANGE(0x0074, 0x0075) AM_WRITE(dma_unk_param_w)
	28	AM_RANGE(0x0076, 0x0077) AM_WRITE(dma_pal_fade_table_w)
	29	AM_RANGE(0x0078, 0x0079) AM_WRITE(dma_src_w)
	30	AM_RANGE(0x007a, 0x007b) AM_WRITE(dma_size_w)
	31	AM_RANGE(0x007c, 0x007d) AM_WRITE(dma_dst_w)
	32	AM_RANGE(0x007e, 0x007f) AM_WRITE(dma_trigger_w)
23	33	ADDRESS_MAP_END
24		#endif
25	34
	35
26	36	//**************************************************************************
	37	//  INLINE HELPERS
	38	//**************************************************************************
	39
	40	//-------------------------------------------------
	41	//  readbyte - read a byte at the given address
	42	//-------------------------------------------------
	43
	44	inline UINT16 seibu_cop_device::read_word(offs_t address)
	45	{
	46	return space().read_word(address);
	47	}
	48
	49	//-------------------------------------------------
	50	//  writebyte - write a byte at the given address
	51	//-------------------------------------------------
	52
	53	inline void seibu_cop_device::write_word(offs_t address, UINT16 data)
	54	{
	55	space().write_word(address, data);
	56	}
	57
	58
	59	//**************************************************************************
27	60	//  LIVE DEVICE
28	61	//**************************************************************************
29	62
r18180	r18181
32	65	//-------------------------------------------------
33	66
34	67	seibu_cop_device::seibu_cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock)
35		: device_t(mconfig, SEIBU_COP, "seibu_cop", tag, owner, clock)
	68	: device_t(mconfig, SEIBU_COP, "seibu_cop", tag, owner, clock),
	69	device_memory_interface(mconfig, *this),
	70	m_space_config("io", ENDIANNESS_LITTLE, 16, 16, 0, NULL, *ADDRESS_MAP_NAME(seibu_cop_io))
36	71	{
37	72
38	73	}
r18180	r18181
87	122	{
88	123	}
89	124
	125	//-------------------------------------------------
	126	//  memory_space_config - return a description of
	127	//  any address spaces owned by this device
	128	//-------------------------------------------------
90	129
	130	const address_space_config *seibu_cop_device::memory_space_config(address_spacenum spacenum) const
	131	{
	132	return (spacenum == AS_0) ? &m_space_config : NULL;
	133	}
	134
91	135	//**************************************************************************
92	136	//  READ/WRITE HANDLERS
93	137	//**************************************************************************
94	138
95		READ16_MEMBER( seibu_cop_device::read )
	139	WRITE16_MEMBER(seibu_cop_device::dma_fill_val_lo_w)
96	140	{
97		return 0;
	141	COMBINE_DATA(&m_dma_fill_val_lo);
	142	m_dma_fill_val = (m_dma_fill_val_lo) | (m_dma_fill_val_hi << 16);
98	143	}
99	144
100		WRITE16_MEMBER( seibu_cop_device::write )
	145	WRITE16_MEMBER(seibu_cop_device::dma_fill_val_hi_w)
101	146	{
102		switch(offset)
103		{
104		case 0x028/2:
105		COMBINE_DATA(&m_dma_fill_val_lo);
106		m_dma_fill_val = (m_dma_fill_val_lo) | (m_dma_fill_val_hi << 16);
107		break;
	147	COMBINE_DATA(&m_dma_fill_val_hi);
	148	m_dma_fill_val = (m_dma_fill_val_lo) | (m_dma_fill_val_hi << 16);
	149	}
108	150
109		case 0x02a/2:
110		COMBINE_DATA(&m_dma_fill_val_hi);
111		m_dma_fill_val = (m_dma_fill_val_lo) | (m_dma_fill_val_hi << 16);
112		break;
	151	WRITE16_MEMBER(seibu_cop_device::pal_brightness_val_w)
	152	{
	153	COMBINE_DATA(&m_pal_brightness_val);
113	154
114		case (0x05a/2): COMBINE_DATA(&m_pal_brightness_val); break;
115		case (0x05c/2): COMBINE_DATA(&m_pal_brightness_mode); break;
	155	/* TODO: add checks for bits 15-6 */
	156	}
116	157
117		case 0x074/2:
118		/*
119		This sets up a DMA mode of some sort
120		0x0e00: grainbow, cupsoc
121		0x0a00: legionna, godzilla, denjinmk
122		0x0600: heatbrl
123		0x1e00: zeroteam, xsedae
124		raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
125		(both only uses 0x14 and 0x15 as DMAs)
126		*/
127		COMBINE_DATA(&m_dma_unk_param);
128		break;
	158	WRITE16_MEMBER(seibu_cop_device::pal_brightness_mode_w)
	159	{
	160	COMBINE_DATA(&m_pal_brightness_mode);
129	161
130		case (0x076/2):
131		COMBINE_DATA(&m_cop_dma_fade_table);
132		break;
	162	/* TODO: add checks for anything that isn't 4 or 5 */
	163	}
133	164
134		case (0x078/2): /* DMA source address */
135		COMBINE_DATA(&m_cop_dma_src[m_cop_dma_trigger]);
136		break;
	165	WRITE16_MEMBER(seibu_cop_device::dma_unk_param_w)
	166	{
	167	/*
	168	This sets up a DMA mode of some sort
	169	0x0e00: grainbow, cupsoc
	170	0x0a00: legionna, godzilla, denjinmk
	171	0x0600: heatbrl
	172	0x1e00: zeroteam, xsedae
	173	raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
	174	(both only uses 0x14 and 0x15 as DMAs afaik)
	175	*/
	176	COMBINE_DATA(&m_dma_unk_param);
	177	}
137	178
138		case (0x07a/2): /* DMA length */
139		COMBINE_DATA(&m_cop_dma_size[m_cop_dma_trigger]);
140		break;
	179	WRITE16_MEMBER(seibu_cop_device::dma_pal_fade_table_w)
	180	{
	181	COMBINE_DATA(&m_dma_pal_fade_table);
	182	}
141	183
142		case (0x07c/2): /* DMA destination */
143		COMBINE_DATA(&m_cop_dma_dst[m_cop_dma_trigger]);
144		break;
	184	WRITE16_MEMBER(seibu_cop_device::dma_src_w)
	185	{
	186	COMBINE_DATA(&m_dma_src[m_dma_trigger]);
	187	}
145	188
146		case (0x07e/2): /* DMA parameter */
147		COMBINE_DATA(&m_cop_dma_exec_param);
148		m_cop_dma_trigger = m_cop_dma_exec_param & 7;
149		break;
150		}
	189	WRITE16_MEMBER(seibu_cop_device::dma_size_w)
	190	{
	191	COMBINE_DATA(&m_dma_size[m_dma_trigger]);
151	192	}
	193
	194	WRITE16_MEMBER(seibu_cop_device::dma_dst_w)
	195	{
	196	COMBINE_DATA(&m_dma_dst[m_dma_trigger]);
	197	}
	198
	199	WRITE16_MEMBER(seibu_cop_device::dma_trigger_w)
	200	{
	201	COMBINE_DATA(&m_dma_exec_param);
	202	m_dma_trigger = m_dma_exec_param & 7;
	203	}
	204
	205	READ16_MEMBER( seibu_cop_device::read )
	206	{
	207	return read_word(offset);
	208	}
	209
	210	WRITE16_MEMBER( seibu_cop_device::write )
	211	{
	212	write_word(offset,data);
	213	}

trunk/src/emu/machine/seibu_cop.h

r18180	r18181
37	37	// ======================> seibu_cop_device
38	38
39	39	class seibu_cop_device :   public device_t,
	40	public device_memory_interface,
40	41	public seibu_cop_interface
41	42	{
42	43	public:
r18180	r18181
46	47	// I/O operations
47	48	DECLARE_WRITE16_MEMBER( write );
48	49	DECLARE_READ16_MEMBER( read );
	50	DECLARE_WRITE16_MEMBER(dma_fill_val_lo_w);
	51	DECLARE_WRITE16_MEMBER(dma_fill_val_hi_w);
	52	DECLARE_WRITE16_MEMBER(pal_brightness_val_w);
	53	DECLARE_WRITE16_MEMBER(pal_brightness_mode_w);
	54	DECLARE_WRITE16_MEMBER(dma_unk_param_w);
	55	DECLARE_WRITE16_MEMBER(dma_pal_fade_table_w);
	56	DECLARE_WRITE16_MEMBER(dma_src_w);
	57	DECLARE_WRITE16_MEMBER(dma_size_w);
	58	DECLARE_WRITE16_MEMBER(dma_dst_w);
	59	DECLARE_WRITE16_MEMBER(dma_trigger_w);
49	60
50	61	protected:
51	62	// device-level overrides
r18180	r18181
53	64	virtual void device_validity_check(validity_checker &valid) const;
54	65	virtual void device_start();
55	66	virtual void device_reset();
	67	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
56	68
57	69	private:
58	70	devcb_resolved_read8      m_in_mreq_func;
59	71	devcb_resolved_write8      m_out_mreq_func;
	72	inline UINT16 read_word(offs_t address);
	73	inline void write_word(offs_t address, UINT16 data);
60	74
61		UINT16 m_dma_unk_param, m_cop_dma_fade_table, m_cop_dma_src[8], m_cop_dma_dst[8], m_cop_dma_size[8], m_cop_dma_exec_param;
62		UINT8 m_cop_dma_trigger;
	75	UINT16 m_dma_unk_param, m_dma_pal_fade_table, m_dma_src[8], m_dma_dst[8], m_dma_size[8], m_dma_exec_param;
	76	UINT8 m_dma_trigger;
63	77	UINT16 m_dma_fill_val_lo,m_dma_fill_val_hi;
64	78	UINT32 m_dma_fill_val;
65		UINT8 m_pal_brightness_val, m_pal_brightness_mode;
	79	UINT16 m_pal_brightness_val, m_pal_brightness_mode;
	80
	81	const address_space_config      m_space_config;
66	82	};
67	83
68	84

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