trunk/src/mame/drivers/m10.c
r18177 | r18178 | |
754 | 754 | PORT_DIPSETTING ( 0x10, "1 Coin 1 Play" ) |
755 | 755 | PORT_DIPSETTING ( 0x20, "1 Coin 2 Plays" ) |
756 | 756 | |
| 757 | // PORT_START("VR1") |
| 758 | // PORT_ADJUSTER( 50, "Car Rumble Volume" ) |
| 759 | |
| 760 | // PORT_START("VR2") |
| 761 | // PORT_ADJUSTER( 50, "Collision Volume" ) |
| 762 | |
| 763 | // PORT_START("VR3") |
| 764 | // PORT_ADJUSTER( 50, "Tire Screech Volume" ) |
| 765 | |
| 766 | // PORT_START("VR4") |
| 767 | // PORT_ADJUSTER( 50, "Score Counter Volume" ) |
| 768 | |
| 769 | // PORT_START("VR5") |
| 770 | // PORT_ADJUSTER( 50, "Master Volume" ) |
| 771 | |
757 | 772 | PORT_START("FAKE") |
758 | 773 | PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, m10_state,coin_inserted, 0) |
759 | 774 | |
trunk/src/mame/drivers/vicdual.c
r18177 | r18178 | |
52 | 52 | #include "depthch.lh" |
53 | 53 | |
54 | 54 | |
| 55 | #define VICDUAL_MASTER_CLOCK (XTAL_15_468MHz) |
| 56 | #define VICDUAL_MAIN_CPU_CLOCK (VICDUAL_MASTER_CLOCK/8) |
| 57 | #define VICDUAL_PIXEL_CLOCK (VICDUAL_MASTER_CLOCK/3) |
55 | 58 | |
| 59 | #define VICDUAL_HTOTAL (0x148) |
| 60 | #define VICDUAL_HBEND (0x000) |
| 61 | #define VICDUAL_HBSTART (0x100) |
| 62 | #define VICDUAL_HSSTART (0x110) |
| 63 | #define VICDUAL_HSEND (0x130) |
| 64 | #define VICDUAL_VTOTAL (0x106) |
| 65 | #define VICDUAL_VBEND (0x000) |
| 66 | #define VICDUAL_VBSTART (0x0e0) |
| 67 | #define VICDUAL_VSSTART (0x0ec) |
| 68 | #define VICDUAL_VSEND (0x0f0) |
| 69 | |
| 70 | |
| 71 | |
56 | 72 | /************************************* |
57 | 73 | * |
58 | 74 | * Coin handling |
r18177 | r18178 | |
2515 | 2531 | ROM_LOAD( "316-0042.u66", 0x0020, 0x0020, CRC(a1506b9d) SHA1(037c3db2ea40eca459e8acba9d1506dd28d72d10) ) /* sequence PROM */ |
2516 | 2532 | ROM_END |
2517 | 2533 | |
2518 | | |
2519 | | /* |
2520 | | Head On |
2521 | | Irem, 1979? / 1980? |
2522 | | |
2523 | | PCB Layout |
2524 | | ---------- |
2525 | | |
2526 | | M-15L |
2527 | | |---------------------------------------------------------------------------------| |
2528 | | | | |
2529 | | | DSW(8) 74175 74175 7400 74LS08 74121 M53214 |-------| E1.9A | |
2530 | | | | 6502 | | |
2531 | | | 7432 74175 7404 7427 7442 74LS241 |-------| | |
2532 | | | E2.9B | |
2533 | | | | |
2534 | | | 74LS74 7432 74161 74161 7442 74LS241 74LS367 74LS367 | |
2535 | | |-| E3.9C | |
2536 | | | M53214 74LS367 7442 7486 8216 2114 74LS157 74LS367 | |
2537 | | | | |
2538 | | |4 M53214 74LS367 74161 7486 8216 2114 74LS157 2111 E4.9D | |
2539 | | |4 | |
2540 | | |W M53214 74LS367 74161 7486 8216 2114 74LS157 2111 | |
2541 | | |A E5.9F | |
2542 | | |Y M53214 74LS367 74161 7486 8216 74166 2114 74LS157 | |
2543 | | | 11.73MHz | |
2544 | | | 7400 7432 7404 74161 8216 74166 2114 74LS157 E6.9G | |
2545 | | |-| | |
2546 | | | VR3 VR2 VR1 7432 7404 7400 *74173 7400 74LS139 74LS157 | |
2547 | | | *74S04 | |
2548 | | | | |
2549 | | |---------------------------------------------------------------------------------| |
2550 | | Notes: |
2551 | | All IC's are listed |
2552 | | All ROMs type 2708 (1K x8) |
2553 | | |
2554 | | 6502 clock: 733.125kHz (11.73 /16) |
2555 | | *: These 2 IC's piggybacked. 74S04 on top |
2556 | | VR1/2/3: 5K potentiometers, controls RGB saturation levels |
2557 | | 2114: 1K x4 SRAM |
2558 | | 2111: 256bytes x4 SRAM |
2559 | | 8216: 256bytes x1 SRAM |
2560 | | |
2561 | | Sound PCB |
2562 | | --------- |
2563 | | |
2564 | | M-15S |
2565 | | |---------------------------| |
2566 | | | | |
2567 | | | NE555 NE555 | |
2568 | | | | |
2569 | | | NE555 NE555 | |
2570 | | | LM3900 VR1| |
2571 | | | | |
2572 | | | C1815x9 VR2| |
2573 | | | | |
2574 | | | LM3900 VR3| |
2575 | | | | |
2576 | | | VR4| |
2577 | | | | |
2578 | | | VR5| |
2579 | | | TA7222 | |
2580 | | |---------------------------| |
2581 | | Notes: |
2582 | | PCB contains lots of resistors, capacitors, transistors etc. |
2583 | | |
2584 | | VR1/2/3/4/5: Potentiometers for volume of each sound |
2585 | | VR1 - Car rumble |
2586 | | VR2 - Collision bang |
2587 | | VR3 - Tire screech (when changing lanes) |
2588 | | VR4 - Score counter (numbers incrementing etc) |
2589 | | VR5 - Master volume |
2590 | | C1815: Transistor (x9) |
2591 | | TA7222: Power Amp |
2592 | | */ |
2593 | | |
2594 | 2534 | ROM_START( headon ) |
2595 | 2535 | ROM_REGION( 0x10000, "maincpu", 0 ) |
2596 | 2536 | ROM_LOAD( "316-163a.u27", 0x0000, 0x0400, CRC(4bb51259) SHA1(43411ffda3fe03b1d694f70791b0bab5786759c0) ) |
trunk/src/mame/includes/vicdual.h
r18177 | r18178 | |
7 | 7 | #include "sound/discrete.h" |
8 | 8 | |
9 | 9 | |
10 | | #define VICDUAL_MASTER_CLOCK (15468480) |
11 | | #define VICDUAL_MAIN_CPU_CLOCK (VICDUAL_MASTER_CLOCK/8) |
12 | | #define VICDUAL_PIXEL_CLOCK (VICDUAL_MASTER_CLOCK/3) |
13 | | #define VICDUAL_HTOTAL (0x148) |
14 | | #define VICDUAL_HBEND (0x000) |
15 | | #define VICDUAL_HBSTART (0x100) |
16 | | #define VICDUAL_HSSTART (0x110) |
17 | | #define VICDUAL_HSEND (0x130) |
18 | | #define VICDUAL_VTOTAL (0x106) |
19 | | #define VICDUAL_VBEND (0x000) |
20 | | #define VICDUAL_VBSTART (0x0e0) |
21 | | #define VICDUAL_VSSTART (0x0ec) |
22 | | #define VICDUAL_VSEND (0x0f0) |
23 | | |
24 | | |
25 | 10 | class vicdual_state : public driver_device |
26 | 11 | { |
27 | 12 | public: |
trunk/src/emu/drivers/xtal.h
r18177 | r18178 | |
126 | 126 | XTAL_14_7456MHz = 14745600, /* Namco System 12 & System Super 22/23 for H8/3002 CPU */ |
127 | 127 | XTAL_15MHz = 15000000, /* Sinclair QL */ |
128 | 128 | XTAL_15_36MHz = 15360000, /* Visual 1050 */ |
129 | | XTAL_15_468MHz = 15468000, /* Bank Panic h/w, Sega G80 */ |
| 129 | XTAL_15_468MHz = 15468480, /* Bank Panic h/w, Sega G80 */ |
130 | 130 | XTAL_16MHz = 16000000, /* Extremely common, used on 100's of PCBs */ |
131 | 131 | XTAL_16_9344MHz = 16934400, /* Usually used to drive 90's Yamaha OPL/FM chips */ |
132 | 132 | XTAL_17_36MHz = 17360000, /* OMTI Series 10 SCSI controller */ |