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r18174 Thursday 27th September, 2012 at 13:58:05 UTC by hap
small cleanup before i do the next one

[src/mame/drivers]	vicdual.c
[src/mame/includes]	vicdual.h

trunk/src/mame/drivers/vicdual.c

r18173	r18174
64	64	m_coin_status = 0;
65	65	}
66	66
67
68		static void assert_coin_status(running_machine &machine)
	67	void vicdual_state::assert_coin_status()
69	68	{
70		vicdual_state *state = machine.driver_data<vicdual_state>();
71		state->m_coin_status = 1;
	69	m_coin_status = 1;
72	70	}
73	71
74
75	72	CUSTOM_INPUT_MEMBER(vicdual_state::vicdual_read_coin_status)
76	73	{
77	74	return m_coin_status;
r18173	r18174
79	76
80	77
81	78	/* the main CPU is reset when a coin is inserted */
	79	void vicdual_state::coin_in()
	80	{
	81	m_maincpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
	82
	83	/* simulate the coin switch being closed for a while */
	84	machine().scheduler().timer_set(4 * machine().primary_screen->frame_period(), timer_expired_delegate(FUNC(vicdual_state::clear_coin_status),this));
	85	}
	86
82	87	INPUT_CHANGED_MEMBER(vicdual_state::coin_changed)
83	88	{
84	89	if (newval)
r18173	r18174
86	91	/* increment the coin counter */
87	92	coin_counter_w(machine(), 0, 1);
88	93	coin_counter_w(machine(), 0, 0);
89
90		m_maincpu->set_input_line(INPUT_LINE_RESET, PULSE_LINE);
91
92		/* simulate the coin switch being closed for a while */
93		machine().scheduler().timer_set(4 * machine().primary_screen->frame_period(), timer_expired_delegate(FUNC(vicdual_state::clear_coin_status),this));
	94
	95	coin_in();
94	96	}
95	97	}
96	98
97	99
98		#define PORT_COIN                              \
	100	#define PORT_COIN_DEFAULT                        \
99	101	PORT_START("COIN")                           \
100	102	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, vicdual_state,coin_changed, NULL)
101	103
r18173	r18174
231	233
232	234	WRITE8_MEMBER(vicdual_state::depthch_io_w)
233	235	{
234		if (offset & 0x01)  assert_coin_status(machine());
	236	if (offset & 0x01)  assert_coin_status();
235	237	if (offset & 0x04)  depthch_audio_w(space, 0, data);
236	238	}
237	239
r18173	r18174
271	273	PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNUSED )
272	274	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
273	275
274		PORT_COIN
	276	PORT_COIN_DEFAULT
275	277	INPUT_PORTS_END
276	278
277	279
r18173	r18174
312	314
313	315	WRITE8_MEMBER(vicdual_state::safari_io_w)
314	316	{
315		if (offset & 0x01)  assert_coin_status(machine());
	317	if (offset & 0x01)  assert_coin_status();
316	318	if (offset & 0x02) { /* safari_audio_w(0, data) */ }
317	319	}
318	320
r18173	r18174
358	360	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
359	361	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
360	362
361		PORT_COIN
	363	PORT_COIN_DEFAULT
362	364	INPUT_PORTS_END
363	365
364	366
r18173	r18174
395	397
396	398	WRITE8_MEMBER(vicdual_state::frogs_io_w)
397	399	{
398		if (offset & 0x01)  assert_coin_status(machine());
	400	if (offset & 0x01)  assert_coin_status();
399	401	if (offset & 0x02)  frogs_audio_w(space, 0, data);
400	402	}
401	403
r18173	r18174
444	446	PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
445	447	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
446	448
447		PORT_COIN
	449	PORT_COIN_DEFAULT
448	450
449	451	//  PORT_START("IN2")
450	452	//  PORT_ADJUSTER( 25, "Boing Volume" )
r18173	r18174
517	519
518	520	WRITE8_MEMBER(vicdual_state::headon_io_w)
519	521	{
520		if (offset & 0x01)  assert_coin_status(machine());
	522	if (offset & 0x01)  assert_coin_status();
521	523	if (offset & 0x02)  headon_audio_w(space, 0, data);
522	524	if (offset & 0x04) { /* vicdual_palette_bank_w(0, data)  */ }    /* not written to */
523	525	}
r18173	r18174
573	575
574	576	PORT_CABINET_COLOR_OR_BW
575	577
576		PORT_COIN
	578	PORT_COIN_DEFAULT
577	579	INPUT_PORTS_END
578	580
579	581
r18173	r18174
604	606
605	607	PORT_CABINET_COLOR_OR_BW
606	608
607		PORT_COIN
	609	PORT_COIN_DEFAULT
608	610	INPUT_PORTS_END
609	611
610	612
r18173	r18174
626	628
627	629	PORT_CABINET_COLOR_OR_BW
628	630
629		PORT_COIN
	631	PORT_COIN_DEFAULT
630	632	INPUT_PORTS_END
631	633
632	634
r18173	r18174
670	672
671	673	PORT_CABINET_COLOR_OR_BW
672	674
673		PORT_COIN
	675	PORT_COIN_DEFAULT
674	676	INPUT_PORTS_END
675	677
676	678
r18173	r18174
735	737
736	738	WRITE8_MEMBER(vicdual_state::headon2_io_w)
737	739	{
738		if (offset & 0x01)  assert_coin_status(machine());
	740	if (offset & 0x01)  assert_coin_status();
739	741	if (offset & 0x02)  headon_audio_w(space, 0, data);
740	742	if (offset & 0x04)  vicdual_palette_bank_w(space, 0, data);
741	743	if (offset & 0x08) { /* schematics show this as going into a shifter circuit, but never written to */ }
r18173	r18174
746	748
747	749	WRITE8_MEMBER(vicdual_state::digger_io_w)
748	750	{
749		if (offset & 0x01)  assert_coin_status(machine());
	751	if (offset & 0x01)  assert_coin_status();
750	752	if (offset & 0x02) { /* digger_audio_1_w(0, data) */ }
751	753	if (offset & 0x04)
752	754	{
r18173	r18174
815	817	PORT_BIT( 0x7c, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
816	818	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
817	819
818		PORT_COIN
	820	PORT_COIN_DEFAULT
819	821	INPUT_PORTS_END
820	822
821	823
r18173	r18174
849	851	PORT_BIT( 0x7c, IP_ACTIVE_LOW, IPT_UNKNOWN ) /* probably unused */
850	852	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
851	853
852		PORT_COIN
	854	PORT_COIN_DEFAULT
853	855	INPUT_PORTS_END
854	856
855	857
r18173	r18174
890	892	PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* probably unused */
891	893	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
892	894
893		PORT_COIN
	895	PORT_COIN_DEFAULT
894	896	INPUT_PORTS_END
895	897
896	898
r18173	r18174
952	954	{
953	955	if (offset & 0x01)  invho2_audio_w(space, 0, data);
954	956	if (offset & 0x02)  invinco_audio_w(space, 0, data);
955		if (offset & 0x08)  assert_coin_status(machine());
	957	if (offset & 0x08)  assert_coin_status();
956	958	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
957	959	}
958	960
r18173	r18174
961	963	{
962	964	if (offset & 0x01)  invinco_audio_w(space, 0, data);
963	965	if (offset & 0x02) { /* deepscan_audio_w(0, data) */ }
964		if (offset & 0x08)  assert_coin_status(machine());
	966	if (offset & 0x08)  assert_coin_status();
965	967	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
966	968	}
967	969
r18173	r18174
970	972	{
971	973	if (offset & 0x01)  invho2_audio_w(space, 0, data);
972	974	if (offset & 0x02) { /* s&spaceatt_audio_w(space, 0, data) */ }
973		if (offset & 0x08)  assert_coin_status(machine());
	975	if (offset & 0x08)  assert_coin_status();
974	976	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
975	977	}
976	978
r18173	r18174
979	981	{
980	982	if (offset & 0x01) { /* tranqgun_audio_w(space, 0, data) */ }
981	983	if (offset & 0x02)  vicdual_palette_bank_w(space, 0, data);
982		if (offset & 0x08)  assert_coin_status(machine());
	984	if (offset & 0x08)  assert_coin_status();
983	985	}
984	986
985	987
r18173	r18174
987	989	{
988	990	if (offset & 0x01) { /* &spacetrk_audio_w(space, 0, data) */ }
989	991	if (offset & 0x02) { /* &spacetrk_audio_w(space, 0, data) */ }
990		if (offset & 0x08)  assert_coin_status(machine());
	992	if (offset & 0x08)  assert_coin_status();
991	993	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
992	994	}
993	995
r18173	r18174
996	998	{
997	999	if (offset & 0x01)  carnival_audio_1_w(space, 0, data);
998	1000	if (offset & 0x02)  carnival_audio_2_w(space, 0, data);
999		if (offset & 0x08)  assert_coin_status(machine());
	1001	if (offset & 0x08)  assert_coin_status();
1000	1002	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
1001	1003	}
1002	1004
r18173	r18174
1005	1007	{
1006	1008	if (offset & 0x01) { /* brdrline_audio_w(space, 0, data) */ }
1007	1009	if (offset & 0x02)  vicdual_palette_bank_w(space, 0, data);
1008		if (offset & 0x08)  assert_coin_status(machine());
	1010	if (offset & 0x08)  assert_coin_status();
1009	1011	}
1010	1012
1011	1013
r18173	r18174
1013	1015	{
1014	1016	if (offset & 0x01)  pulsar_audio_1_w(space, 0, data);
1015	1017	if (offset & 0x02)  pulsar_audio_2_w(space, 0, data);
1016		if (offset & 0x08)  assert_coin_status(machine());
	1018	if (offset & 0x08)  assert_coin_status();
1017	1019	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
1018	1020	}
1019	1021
r18173	r18174
1021	1023	WRITE8_MEMBER(vicdual_state::heiankyo_io_w)
1022	1024	{
1023	1025	if (offset & 0x01) { /* heiankyo_audio_1_w(0, data) */ }
1024
1025		if (offset & 0x02)
1026		{
1027		vicdual_palette_bank_w(space, 0, data >> 6);
1028		/* heiankyo_audio_2_w(0, data & 0x3f); */
1029		}
1030
1031		if (offset & 0x08)  assert_coin_status(machine());
	1026	if (offset & 0x02) { /* heiankyo_audio_2_w(0, data) */ }
	1027	if (offset & 0x08)  assert_coin_status();
1032	1028	}
1033	1029
1034	1030
r18173	r18174
1036	1032	{
1037	1033	if (offset & 0x01) { /* headon_audio_w(0, data) */ }
1038	1034	if (offset & 0x02) { /* alphaf_audio_w(0, data) */ }
1039		if (offset & 0x08)  assert_coin_status(machine());
	1035	if (offset & 0x08)  assert_coin_status();
1040	1036	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
1041	1037	}
1042	1038
r18173	r18174
1242	1238	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1243	1239	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1244	1240
1245		PORT_COIN
	1241	PORT_COIN_DEFAULT
1246	1242
1247	1243	PORT_START("FAKE_LIVES1")
1248	1244	PORT_DIPNAME( 0x03, 0x01, "Head On 2 Lives" )   PORT_DIPLOCATION("SW1:1,2")
r18173	r18174
1305	1301	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1306	1302	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1307	1303
1308		PORT_COIN
	1304	PORT_COIN_DEFAULT
1309	1305
1310	1306	// SW1 @ C1, 6-pos (where are 5 & 6?)
1311	1307	PORT_START("FAKE_LIVES1")
r18173	r18174
1367	1363	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1368	1364	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1369	1365
1370		PORT_COIN
	1366	PORT_COIN_DEFAULT
1371	1367
1372	1368	PORT_START("FAKE_LIVES1")
1373	1369	PORT_DIPNAME( 0x03, 0x03, "Space Attack Lives" )   PORT_DIPLOCATION("SW1:1,2")
r18173	r18174
1425	1421	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1426	1422	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1427	1423
1428		PORT_COIN
	1424	PORT_COIN_DEFAULT
1429	1425	INPUT_PORTS_END
1430	1426
1431	1427
r18173	r18174
1476	1472	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1477	1473	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1478	1474
1479		PORT_COIN
	1475	PORT_COIN_DEFAULT
1480	1476	INPUT_PORTS_END
1481	1477
1482	1478
r18173	r18174
1548	1544	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1549	1545	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1550	1546
1551		PORT_COIN
	1547	PORT_COIN_DEFAULT
1552	1548	INPUT_PORTS_END
1553	1549
1554	1550
r18173	r18174
1609	1605	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1610	1606	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1611	1607
1612		PORT_COIN
	1608	PORT_COIN_DEFAULT
1613	1609
1614	1610	PORT_START("FAKE_LIVES1")
1615	1611	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) )      PORT_DIPLOCATION("SW1:2,3")
r18173	r18174
1663	1659	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1664	1660	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1665	1661
1666		PORT_COIN
	1662	PORT_COIN_DEFAULT
1667	1663
1668	1664	PORT_START("FAKE_LIVES1")
1669	1665	PORT_DIPNAME( 0x03, 0x00, DEF_STR( Lives ) )      PORT_DIPLOCATION("SW1:2,3")
r18173	r18174
1717	1713	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1718	1714	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1719	1715
1720		PORT_COIN
	1716	PORT_COIN_DEFAULT
1721	1717
1722	1718	PORT_START("FAKE_LIVES1")
1723	1719	PORT_DIPNAME( 0x03, 0x02, DEF_STR( Lives ) )   PORT_DIPLOCATION("SW1:1,2")
r18173	r18174
1775	1771	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 )
1776	1772	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1777	1773
1778		PORT_COIN
	1774	PORT_COIN_DEFAULT
1779	1775	INPUT_PORTS_END
1780	1776
1781	1777
r18173	r18174
1822	1818	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
1823	1819	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
1824	1820
1825		PORT_COIN
	1821	PORT_COIN_DEFAULT
1826	1822
1827	1823	PORT_START("FAKE_LIVES1")
1828	1824	PORT_DIPNAME( 0x03, 0x03, "Alpha Fighter Lives" )   PORT_DIPLOCATION("SW1:1,2")
r18173	r18174
1989	1985	WRITE8_MEMBER(vicdual_state::samurai_io_w)
1990	1986	{
1991	1987	if (offset & 0x02) { /* samurai_audio_w(0, data) */ }
1992		if (offset & 0x08)  assert_coin_status(machine());
	1988	if (offset & 0x08)  assert_coin_status();
1993	1989	if (offset & 0x40)  vicdual_palette_bank_w(space, 0, data);
1994	1990	}
1995	1991
r18173	r18174
2064	2060	PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START2 )
2065	2061	PORT_BIT( 0xc0, IP_ACTIVE_LOW, IPT_UNUSED )
2066	2062
2067		PORT_COIN
	2063	PORT_COIN_DEFAULT
2068	2064	INPUT_PORTS_END
2069	2065
2070	2066
r18173	r18174
2101	2097
2102	2098	WRITE8_MEMBER(vicdual_state::nsub_io_w)
2103	2099	{
2104		if (offset & 0x01)  assert_coin_status(machine());
	2100	if (offset & 0x01)  assert_coin_status();
2105	2101	if (offset & 0x02) { /* nsub_audio_w(0, data) */ }
2106	2102	if (offset & 0x04)  vicdual_palette_bank_w(space, 0, data);
2107	2103	}
r18173	r18174
2136	2132	PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT  ) PORT_8WAY
2137	2133	PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_JOYSTICK_UP    ) PORT_8WAY
2138	2134
2139		// according to the manual, there's also an 8-pos dipswitch for coinage settings (MT 4717), where is it read?
2140	2135	PORT_START("IN1")
2141	2136	PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_get_composite_blank_comp, NULL)
2142	2137	PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) )
r18173	r18174
2159	2154	PORT_DIPSETTING(    0x00, DEF_STR( On ) )
2160	2155	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
2161	2156
2162		PORT_COIN
	2157	PORT_COIN_DEFAULT
2163	2158	INPUT_PORTS_END
2164	2159
2165	2160
r18173	r18174
2197	2192
2198	2193	WRITE8_MEMBER(vicdual_state::invinco_io_w)
2199	2194	{
2200		if (offset & 0x01)  assert_coin_status(machine());
	2195	if (offset & 0x01)  assert_coin_status();
2201	2196	if (offset & 0x02)  invinco_audio_w(space, 0, data);
2202	2197	if (offset & 0x04)  vicdual_palette_bank_w(space, 0, data);
2203	2198	}
r18173	r18174
2257	2252	PORT_BIT( 0x7e, IP_ACTIVE_LOW, IPT_UNKNOWN )   /* probably unused */
2258	2253	PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_SPECIAL ) PORT_CUSTOM_MEMBER(DEVICE_SELF, vicdual_state,vicdual_read_coin_status, NULL)
2259	2254
2260		PORT_COIN
	2255	PORT_COIN_DEFAULT
2261	2256	INPUT_PORTS_END
2262	2257
2263	2258
r18173	r18174
2672	2667	/* this one is the same PCB but does show the Sidam copyright */
2673	2668	ROM_START( headonsa )
2674	2669	ROM_REGION( 0x10000, "maincpu", 0 )
2675		ROM_LOAD( "10305.0.9a",         0x0000, 0x0400, CRC(9a37407b) SHA1(3cd3dbd13c76d01b7541307de92f69d6779046f5) )
2676		ROM_LOAD( "10305.1.8a",         0x0400, 0x0400, CRC(aeac8c5f) SHA1(ef9ad63d13076a559ba12c6421ad61de21dd4c90) )
2677		ROM_LOAD( "10305.2.7a",         0x0800, 0x0400, CRC(f1a0cb72) SHA1(540b30225ef176c416ea5b142fe7dbb67b7a78fb) )
2678		ROM_LOAD( "10305.3.6a",         0x0c00, 0x0400, CRC(ae33fcc4) SHA1(7e0a27f1f502c5293f294875b49186e800a2c749) )
2679		ROM_LOAD( "10305.4.5a",         0x1000, 0x0400, CRC(e87f6fd8) SHA1(7fc1ade66c6783861ab310790f023b02a8db7e08) )
2680		ROM_LOAD( "10305.5.4a",         0x1400, 0x0400, CRC(387e2eba) SHA1(9feca874e795710884d17ca5122280c30c6b6af0) )
2681		ROM_LOAD( "10305.6b.3a",        0x1800, 0x0400, CRC(18749071) SHA1(6badb5cf6f6017d884492e9ef16195f1112d23b5) )
	2670	ROM_LOAD( "10305.0.9a",      0x0000, 0x0400, CRC(9a37407b) SHA1(3cd3dbd13c76d01b7541307de92f69d6779046f5) )
	2671	ROM_LOAD( "10305.1.8a",      0x0400, 0x0400, CRC(aeac8c5f) SHA1(ef9ad63d13076a559ba12c6421ad61de21dd4c90) )
	2672	ROM_LOAD( "10305.2.7a",      0x0800, 0x0400, CRC(f1a0cb72) SHA1(540b30225ef176c416ea5b142fe7dbb67b7a78fb) )
	2673	ROM_LOAD( "10305.3.6a",      0x0c00, 0x0400, CRC(ae33fcc4) SHA1(7e0a27f1f502c5293f294875b49186e800a2c749) )
	2674	ROM_LOAD( "10305.4.5a",      0x1000, 0x0400, CRC(e87f6fd8) SHA1(7fc1ade66c6783861ab310790f023b02a8db7e08) )
	2675	ROM_LOAD( "10305.5.4a",      0x1400, 0x0400, CRC(387e2eba) SHA1(9feca874e795710884d17ca5122280c30c6b6af0) )
	2676	ROM_LOAD( "10305.6b.3a",     0x1800, 0x0400, CRC(18749071) SHA1(6badb5cf6f6017d884492e9ef16195f1112d23b5) )
2682	2677
2683	2678	ROM_REGION( 0x0040, "user1", 0 )   /* timing PROMs */
2684	2679	ROM_LOAD( "10303.3e", 0x0000, 0x0020, CRC(e60a7960) SHA1(b8b8716e859c57c35310efc4594262afedb84823) )   /* control PROM */
r18173	r18174
2742	2737
2743	2738	ROM_START( hocrash )
2744	2739	ROM_REGION( 0x10000, "maincpu", 0 )
2745		ROM_LOAD( "1-0s.0s",         0x0000, 0x0400, CRC(4bb51259) SHA1(43411ffda3fe03b1d694f70791b0bab5786759c0) )
2746		ROM_LOAD( "2-0r.0r",         0x0400, 0x0400, CRC(aeac8c5f) SHA1(ef9ad63d13076a559ba12c6421ad61de21dd4c90) )
2747		ROM_LOAD( "3-0p.0p",         0x0800, 0x0400, CRC(f1a0cb72) SHA1(540b30225ef176c416ea5b142fe7dbb67b7a78fb) )
2748		ROM_LOAD( "4-0m.0m",         0x0c00, 0x0400, CRC(fd67208d) SHA1(539b0db174aef66ac7d8137e4eca4e3237bc7a82) )
2749		ROM_LOAD( "5-0l.0l",         0x1000, 0x0400, CRC(069e839e) SHA1(e1ed68573c13c0c88a2bb7b2096860523de952c0) )
2750		ROM_LOAD( "6-0k.0k",         0x1400, 0x0400, CRC(11960190) SHA1(f3908fece95b7e5468ae4bba5a9f2d2482ed6656) )
2751		ROM_LOAD( "7-0j.0j",         0x1800, 0x0400, CRC(d3782c1d) SHA1(340782374b7015a0aaf98aeb6503b759e199a58a) )
	2740	ROM_LOAD( "1-0s.0s",      0x0000, 0x0400, CRC(4bb51259) SHA1(43411ffda3fe03b1d694f70791b0bab5786759c0) )
	2741	ROM_LOAD( "2-0r.0r",      0x0400, 0x0400, CRC(aeac8c5f) SHA1(ef9ad63d13076a559ba12c6421ad61de21dd4c90) )
	2742	ROM_LOAD( "3-0p.0p",      0x0800, 0x0400, CRC(f1a0cb72) SHA1(540b30225ef176c416ea5b142fe7dbb67b7a78fb) )
	2743	ROM_LOAD( "4-0m.0m",      0x0c00, 0x0400, CRC(fd67208d) SHA1(539b0db174aef66ac7d8137e4eca4e3237bc7a82) )
	2744	ROM_LOAD( "5-0l.0l",      0x1000, 0x0400, CRC(069e839e) SHA1(e1ed68573c13c0c88a2bb7b2096860523de952c0) )
	2745	ROM_LOAD( "6-0k.0k",      0x1400, 0x0400, CRC(11960190) SHA1(f3908fece95b7e5468ae4bba5a9f2d2482ed6656) )
	2746	ROM_LOAD( "7-0j.0j",      0x1800, 0x0400, CRC(d3782c1d) SHA1(340782374b7015a0aaf98aeb6503b759e199a58a) )
2752	2747
2753	2748	ROM_REGION( 0x0040, "user1", 0 )   /* timing PROMs */
2754	2749	ROM_LOAD( "316-0043.u87", 0x0000, 0x0020, CRC(e60a7960) SHA1(b8b8716e859c57c35310efc4594262afedb84823) )   /* control PROM */
r18173	r18174
3230	3225	ROM_LOAD( "16.1",       0x3c00, 0x0400, CRC(cc138bed) SHA1(7d3eebdeaff19783d5ef20a7ececec00773434fc) )
3231	3226
3232	3227	ROM_REGION( 0x0020, "proms", 0 )
3233		ROM_LOAD( "5610.49",   0x0000, 0x0020, CRC(bc6be94e) SHA1(34e113ec25e19212b74907d35be5cb8714a8249c) )
	3228	ROM_LOAD( "5610.49",    0x0000, 0x0020, CRC(bc6be94e) SHA1(34e113ec25e19212b74907d35be5cb8714a8249c) )
3234	3229
3235	3230	ROM_REGION( 0x0800, "cpu1", 0 )   /* sound ROM */
3236		ROM_LOAD( "au.bin",       0x0000, 0x0400, CRC(a23e1d9f) SHA1(ce209571f6341aa6f036a015e666673098bc98ea) )
	3231	ROM_LOAD( "au.bin",     0x0000, 0x0400, CRC(a23e1d9f) SHA1(ce209571f6341aa6f036a015e666673098bc98ea) )
3237	3232
3238	3233	ROM_REGION( 0x0100, "user1", 0 )   /* misc PROM */
3239		ROM_LOAD( "82s123.bin",   0x0000, 0x0020, CRC(c128d0ba) SHA1(0ce9febbb7e2f5388ed999a479e3d385dba0b342) )
3240		ROM_LOAD( "5610.15",  0x0000, 0x0020, CRC(6449e678) SHA1(421c45c8fba3c2bc2a7ebbea2c837c8fa1a5a2f3) )
3241		ROM_LOAD( "5610.14",  0x0000, 0x0020, CRC(55dcdef1) SHA1(6fbd041edc258b7e1b99bbe9526612cfb1b541f8) )
	3234	ROM_LOAD( "82s123.bin", 0x0000, 0x0020, CRC(c128d0ba) SHA1(0ce9febbb7e2f5388ed999a479e3d385dba0b342) )
	3235	ROM_LOAD( "5610.15",    0x0000, 0x0020, CRC(6449e678) SHA1(421c45c8fba3c2bc2a7ebbea2c837c8fa1a5a2f3) )
	3236	ROM_LOAD( "5610.14",    0x0000, 0x0020, CRC(55dcdef1) SHA1(6fbd041edc258b7e1b99bbe9526612cfb1b541f8) )
3242	3237	/* following 2 from sound board */
3243		ROM_LOAD( "93427.1", 0x0000, 0x0100, CRC(64b98dc7) SHA1(f0bb7d0b4b56cc2936ce4cbec165394f3026ed6d) )
3244		ROM_LOAD( "93427.2", 0x0000, 0x0100, CRC(bda82367) SHA1(1c96453c2ae372892c39b5657cf2b252a90a10a9) )
	3238	ROM_LOAD( "93427.1",    0x0000, 0x0100, CRC(64b98dc7) SHA1(f0bb7d0b4b56cc2936ce4cbec165394f3026ed6d) )
	3239	ROM_LOAD( "93427.2",    0x0000, 0x0100, CRC(bda82367) SHA1(1c96453c2ae372892c39b5657cf2b252a90a10a9) )
3245	3240	ROM_END
3246	3241
3247	3242	ROM_START( brdrlinb )
r18173	r18174
3325	3320	ROM_LOAD( "ha7.u7",       0x2400, 0x0400, CRC(6d2f9527) SHA1(4e51c5404d0302547c1ae85b27ffe4de11d68224) )
3326	3321	ROM_LOAD( "ha6.u6",       0x2800, 0x0400, CRC(e467c353) SHA1(a76b4f6d9702f760f287b5285f76ea4206c6934a) )
3327	3322	ROM_LOAD( "ha3.u3",       0x2c00, 0x0400, CRC(6a55eda8) SHA1(f526ebf18a33271b798e53cfcadb27e4c3a03466) )
3328		/* 3000-37ff empty */
	3323	ROM_FILL(                 0x3000, 0x0400, 0 )
	3324	ROM_FILL(                 0x3400, 0x0400, 0 )
3329	3325	ROM_LOAD( "ha2.u2",       0x3800, 0x0400, CRC(056b3b8b) SHA1(3cce6c928599604ffdcdb767caa7b32d8ec1e03d) )
3330	3326	ROM_LOAD( "ha1.u1",       0x3c00, 0x0400, CRC(b8da2b5e) SHA1(70d97b89cb3162bd479203c53148319179a9873f) )
3331	3327
3332	3328	ROM_REGION( 0x0020, "proms", 0 )
3333		ROM_LOAD( "316-138.u49",  0x0000, 0x0020, CRC(67104ea9) SHA1(26b6bd2a1973b83bb9af4e3385d8cb14cb3f62f2) )
	3329	ROM_LOAD( "316-138.u49",  0x0010, 0x0010, CRC(67104ea9) SHA1(26b6bd2a1973b83bb9af4e3385d8cb14cb3f62f2) )
	3330	ROM_CONTINUE(             0x0000, 0x0010 )
3334	3331
3335	3332	ROM_REGION( 0x0040, "user1", 0 )   /* misc PROMs */
3336	3333	ROM_LOAD( "316-0043.u87", 0x0000, 0x0020, CRC(e60a7960) SHA1(b8b8716e859c57c35310efc4594262afedb84823) )   /* control PROM */

trunk/src/mame/includes/vicdual.h

r18173	r18174
40	40	UINT8 m_palette_bank;
41	41	UINT8 m_samurai_protection_data;
42	42
	43	void coin_in();
	44	void assert_coin_status();
	45
43	46	DECLARE_WRITE8_MEMBER(vicdual_videoram_w);
44	47	DECLARE_WRITE8_MEMBER(vicdual_characterram_w);
45	48	DECLARE_READ8_MEMBER(depthch_io_r);

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