trunk/src/emu/video/m50458.h
| r18141 | r18142 | |
| 52 | 52 | m50458_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 53 | 53 | |
| 54 | 54 | // I/O operations |
| 55 | | WRITE_LINE_MEMBER( write_bit ); |
| 56 | | WRITE_LINE_MEMBER( set_cs_line ); |
| 57 | | WRITE_LINE_MEMBER( set_clock_line ); |
| 55 | DECLARE_WRITE_LINE_MEMBER( write_bit ); |
| 56 | DECLARE_WRITE_LINE_MEMBER( set_cs_line ); |
| 57 | DECLARE_WRITE_LINE_MEMBER( set_clock_line ); |
| 58 | 58 | DECLARE_WRITE16_MEMBER(vreg_120_w); |
| 59 | 59 | DECLARE_WRITE16_MEMBER(vreg_121_w); |
| 60 | 60 | DECLARE_WRITE16_MEMBER(vreg_122_w); |
trunk/src/emu/cpu/psx/psx.h
| r18141 | r18142 | |
| 125 | 125 | psxcpu_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 126 | 126 | |
| 127 | 127 | // public interfaces |
| 128 | | WRITE32_MEMBER( biu_w ); |
| 129 | | READ32_MEMBER( biu_r ); |
| 130 | | WRITE32_MEMBER( berr_w ); |
| 131 | | READ32_MEMBER( berr_r ); |
| 128 | DECLARE_WRITE32_MEMBER( biu_w ); |
| 129 | DECLARE_READ32_MEMBER( biu_r ); |
| 130 | DECLARE_WRITE32_MEMBER( berr_w ); |
| 131 | DECLARE_READ32_MEMBER( berr_r ); |
| 132 | 132 | |
| 133 | 133 | static psxcpu_device *getcpu( device_t &device, const char *cputag ); |
| 134 | 134 | static void install_sio_handler( device_t &device, const char *cputag, int n_port, psx_sio_handler p_f_sio_handler ); |
trunk/src/emu/machine/m6m80011ap.h
| r18141 | r18142 | |
| 45 | 45 | m6m80011ap_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 46 | 46 | |
| 47 | 47 | // I/O operations |
| 48 | | READ_LINE_MEMBER( read_bit ); |
| 49 | | READ_LINE_MEMBER( ready_line ); |
| 50 | | WRITE_LINE_MEMBER( set_cs_line ); |
| 51 | | WRITE_LINE_MEMBER( set_clock_line ); |
| 52 | | WRITE_LINE_MEMBER( write_bit ); |
| 48 | DECLARE_READ_LINE_MEMBER( read_bit ); |
| 49 | DECLARE_READ_LINE_MEMBER( ready_line ); |
| 50 | DECLARE_WRITE_LINE_MEMBER( set_cs_line ); |
| 51 | DECLARE_WRITE_LINE_MEMBER( set_clock_line ); |
| 52 | DECLARE_WRITE_LINE_MEMBER( write_bit ); |
| 53 | 53 | |
| 54 | 54 | protected: |
| 55 | 55 | // device-level overrides |
trunk/src/emu/machine/s3520cf.h
| r18141 | r18142 | |
| 44 | 44 | s3520cf_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock); |
| 45 | 45 | |
| 46 | 46 | // I/O operations |
| 47 | | READ_LINE_MEMBER( read_bit ); |
| 48 | | WRITE_LINE_MEMBER( set_dir_line ); |
| 49 | | WRITE_LINE_MEMBER( set_cs_line ); |
| 50 | | WRITE_LINE_MEMBER( set_clock_line ); |
| 51 | | WRITE_LINE_MEMBER( write_bit ); |
| 47 | DECLARE_READ_LINE_MEMBER( read_bit ); |
| 48 | DECLARE_WRITE_LINE_MEMBER( set_dir_line ); |
| 49 | DECLARE_WRITE_LINE_MEMBER( set_cs_line ); |
| 50 | DECLARE_WRITE_LINE_MEMBER( set_clock_line ); |
| 51 | DECLARE_WRITE_LINE_MEMBER( write_bit ); |
| 52 | 52 | void timer_callback(); |
| 53 | 53 | |
| 54 | 54 | protected: |
trunk/src/mess/drivers/geneve.c
| r18141 | r18142 | |
| 242 | 242 | |
| 243 | 243 | DECLARE_WRITE8_MEMBER(tms9901_interrupt); |
| 244 | 244 | |
| 245 | | WRITE_LINE_MEMBER( keyboard_interrupt ); |
| 245 | DECLARE_WRITE_LINE_MEMBER( keyboard_interrupt ); |
| 246 | 246 | |
| 247 | 247 | geneve_keyboard_device* m_keyboard; |
| 248 | 248 | geneve_mouse_device* m_mouse; |
| r18141 | r18142 | |
| 252 | 252 | tms9995_device* m_cpu; |
| 253 | 253 | joyport_device* m_joyport; |
| 254 | 254 | |
| 255 | | WRITE_LINE_MEMBER( inta ); |
| 256 | | WRITE_LINE_MEMBER( intb ); |
| 257 | | WRITE_LINE_MEMBER( ext_ready ); |
| 258 | | WRITE_LINE_MEMBER( mapper_ready ); |
| 255 | DECLARE_WRITE_LINE_MEMBER( inta ); |
| 256 | DECLARE_WRITE_LINE_MEMBER( intb ); |
| 257 | DECLARE_WRITE_LINE_MEMBER( ext_ready ); |
| 258 | DECLARE_WRITE_LINE_MEMBER( mapper_ready ); |
| 259 | 259 | |
| 260 | 260 | DECLARE_DRIVER_INIT(geneve); |
| 261 | 261 | virtual void machine_start(); |
trunk/src/mess/drivers/h19.c
| r18141 | r18142 | |
| 46 | 46 | public: |
| 47 | 47 | h19_state(const machine_config &mconfig, device_type type, const char *tag) |
| 48 | 48 | : driver_device(mconfig, type, tag), |
| 49 | | m_maincpu(*this, "maincpu"), |
| 50 | | m_crtc(*this, "crtc"), |
| 51 | | m_ace(*this, "ins8250"), |
| 52 | | m_beep(*this, BEEPER_TAG) |
| 53 | | , |
| 54 | | m_p_videoram(*this, "p_videoram"){ } |
| 49 | m_maincpu(*this, "maincpu"), |
| 50 | m_crtc(*this, "crtc"), |
| 51 | m_ace(*this, "ins8250"), |
| 52 | m_beep(*this, BEEPER_TAG), |
| 53 | m_p_videoram(*this, "p_videoram") |
| 54 | { } |
| 55 | 55 | |
| 56 | 56 | required_device<cpu_device> m_maincpu; |
| 57 | 57 | required_device<mc6845_device> m_crtc; |
| r18141 | r18142 | |
| 60 | 60 | DECLARE_READ8_MEMBER(h19_80_r); |
| 61 | 61 | DECLARE_READ8_MEMBER(h19_a0_r); |
| 62 | 62 | DECLARE_WRITE8_MEMBER(h19_c0_w); |
| 63 | | WRITE8_MEMBER(h19_kbd_put); |
| 63 | DECLARE_WRITE8_MEMBER(h19_kbd_put); |
| 64 | 64 | required_shared_ptr<UINT8> m_p_videoram; |
| 65 | 65 | UINT8 *m_p_chargen; |
| 66 | 66 | UINT8 m_term_data; |
trunk/src/mess/includes/studio2.h
| r18141 | r18142 | |
| 40 | 40 | DECLARE_READ8_MEMBER( dispon_r ); |
| 41 | 41 | DECLARE_WRITE8_MEMBER( keylatch_w ); |
| 42 | 42 | DECLARE_WRITE8_MEMBER( dispon_w ); |
| 43 | | READ_LINE_MEMBER( clear_r ); |
| 44 | | READ_LINE_MEMBER( ef3_r ); |
| 45 | | READ_LINE_MEMBER( ef4_r ); |
| 46 | | WRITE_LINE_MEMBER( q_w ); |
| 43 | DECLARE_READ_LINE_MEMBER( clear_r ); |
| 44 | DECLARE_READ_LINE_MEMBER( ef3_r ); |
| 45 | DECLARE_READ_LINE_MEMBER( ef4_r ); |
| 46 | DECLARE_WRITE_LINE_MEMBER( q_w ); |
| 47 | 47 | DECLARE_INPUT_CHANGED_MEMBER( reset_w ); |
| 48 | 48 | |
| 49 | 49 | /* keyboard state */ |
trunk/src/mess/includes/next.h
| r18141 | r18142 | |
| 48 | 48 | |
| 49 | 49 | void setup(UINT32 scr1, int size_x, int size_y, int skip, bool color); |
| 50 | 50 | |
| 51 | | READ8_MEMBER( io_r ); |
| 52 | | WRITE8_MEMBER( io_w ); |
| 53 | | READ32_MEMBER( rom_map_r ); |
| 54 | | READ32_MEMBER( scr2_r ); |
| 55 | | WRITE32_MEMBER( scr2_w ); |
| 56 | | READ32_MEMBER( scr1_r ); |
| 57 | | READ32_MEMBER( irq_status_r ); |
| 58 | | READ32_MEMBER( irq_mask_r ); |
| 59 | | WRITE32_MEMBER( irq_mask_w ); |
| 60 | | READ32_MEMBER( modisk_r ); |
| 61 | | READ32_MEMBER( network_r ); |
| 62 | | READ32_MEMBER( event_counter_r ); |
| 63 | | READ32_MEMBER( dsp_r ); |
| 64 | | READ32_MEMBER( fdc_control_r ); |
| 65 | | WRITE32_MEMBER( fdc_control_w ); |
| 66 | | READ32_MEMBER( dma_ctrl_r ); |
| 67 | | WRITE32_MEMBER( dma_ctrl_w ); |
| 68 | | WRITE32_MEMBER( dma_040_ctrl_w ); |
| 69 | | READ32_MEMBER( dma_regs_r ); |
| 70 | | WRITE32_MEMBER( dma_regs_w ); |
| 71 | | READ32_MEMBER( scsictrl_r ); |
| 72 | | WRITE32_MEMBER( scsictrl_w ); |
| 73 | | READ32_MEMBER( phy_r ); |
| 74 | | WRITE32_MEMBER( phy_w ); |
| 75 | | READ32_MEMBER( timer_data_r ); |
| 76 | | WRITE32_MEMBER( timer_data_w ); |
| 77 | | READ32_MEMBER( timer_ctrl_r ); |
| 78 | | WRITE32_MEMBER( timer_ctrl_w ); |
| 51 | DECLARE_READ8_MEMBER( io_r ); |
| 52 | DECLARE_WRITE8_MEMBER( io_w ); |
| 53 | DECLARE_READ32_MEMBER( rom_map_r ); |
| 54 | DECLARE_READ32_MEMBER( scr2_r ); |
| 55 | DECLARE_WRITE32_MEMBER( scr2_w ); |
| 56 | DECLARE_READ32_MEMBER( scr1_r ); |
| 57 | DECLARE_READ32_MEMBER( irq_status_r ); |
| 58 | DECLARE_READ32_MEMBER( irq_mask_r ); |
| 59 | DECLARE_WRITE32_MEMBER( irq_mask_w ); |
| 60 | DECLARE_READ32_MEMBER( modisk_r ); |
| 61 | DECLARE_READ32_MEMBER( network_r ); |
| 62 | DECLARE_READ32_MEMBER( event_counter_r ); |
| 63 | DECLARE_READ32_MEMBER( dsp_r ); |
| 64 | DECLARE_READ32_MEMBER( fdc_control_r ); |
| 65 | DECLARE_WRITE32_MEMBER( fdc_control_w ); |
| 66 | DECLARE_READ32_MEMBER( dma_ctrl_r ); |
| 67 | DECLARE_WRITE32_MEMBER( dma_ctrl_w ); |
| 68 | DECLARE_WRITE32_MEMBER( dma_040_ctrl_w ); |
| 69 | DECLARE_READ32_MEMBER( dma_regs_r ); |
| 70 | DECLARE_WRITE32_MEMBER( dma_regs_w ); |
| 71 | DECLARE_READ32_MEMBER( scsictrl_r ); |
| 72 | DECLARE_WRITE32_MEMBER( scsictrl_w ); |
| 73 | DECLARE_READ32_MEMBER( phy_r ); |
| 74 | DECLARE_WRITE32_MEMBER( phy_w ); |
| 75 | DECLARE_READ32_MEMBER( timer_data_r ); |
| 76 | DECLARE_WRITE32_MEMBER( timer_data_w ); |
| 77 | DECLARE_READ32_MEMBER( timer_ctrl_r ); |
| 78 | DECLARE_WRITE32_MEMBER( timer_ctrl_w ); |
| 79 | 79 | |
| 80 | 80 | UINT32 scr1; |
| 81 | 81 | UINT32 scr2; |
trunk/src/mess/includes/tiki100.h
| r18141 | r18142 | |
| 55 | 55 | |
| 56 | 56 | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 57 | 57 | |
| 58 | | READ8_MEMBER( gfxram_r ); |
| 59 | | WRITE8_MEMBER( gfxram_w ); |
| 60 | | READ8_MEMBER( keyboard_r ); |
| 61 | | WRITE8_MEMBER( keyboard_w ); |
| 62 | | WRITE8_MEMBER( video_mode_w ); |
| 63 | | WRITE8_MEMBER( palette_w ); |
| 64 | | WRITE8_MEMBER( system_w ); |
| 65 | | WRITE_LINE_MEMBER( ctc_z1_w ); |
| 66 | | WRITE8_MEMBER( video_scroll_w ); |
| 58 | DECLARE_READ8_MEMBER( gfxram_r ); |
| 59 | DECLARE_WRITE8_MEMBER( gfxram_w ); |
| 60 | DECLARE_READ8_MEMBER( keyboard_r ); |
| 61 | DECLARE_WRITE8_MEMBER( keyboard_w ); |
| 62 | DECLARE_WRITE8_MEMBER( video_mode_w ); |
| 63 | DECLARE_WRITE8_MEMBER( palette_w ); |
| 64 | DECLARE_WRITE8_MEMBER( system_w ); |
| 65 | DECLARE_WRITE_LINE_MEMBER( ctc_z1_w ); |
| 66 | DECLARE_WRITE8_MEMBER( video_scroll_w ); |
| 67 | 67 | |
| 68 | 68 | void bankswitch(); |
| 69 | 69 | |
trunk/src/mess/includes/dgn_beta.h
| r18141 | r18142 | |
| 144 | 144 | int m_DrawInterlace; |
| 145 | 145 | virtual void machine_start(); |
| 146 | 146 | virtual void palette_init(); |
| 147 | | WRITE8_MEMBER(dgnbeta_ram_b0_w); |
| 148 | | WRITE8_MEMBER(dgnbeta_ram_b1_w); |
| 149 | | WRITE8_MEMBER(dgnbeta_ram_b2_w); |
| 150 | | WRITE8_MEMBER(dgnbeta_ram_b3_w); |
| 151 | | WRITE8_MEMBER(dgnbeta_ram_b4_w); |
| 152 | | WRITE8_MEMBER(dgnbeta_ram_b5_w); |
| 153 | | WRITE8_MEMBER(dgnbeta_ram_b6_w); |
| 154 | | WRITE8_MEMBER(dgnbeta_ram_b7_w); |
| 155 | | WRITE8_MEMBER(dgnbeta_ram_b8_w); |
| 156 | | WRITE8_MEMBER(dgnbeta_ram_b9_w); |
| 157 | | WRITE8_MEMBER(dgnbeta_ram_bA_w); |
| 158 | | WRITE8_MEMBER(dgnbeta_ram_bB_w); |
| 159 | | WRITE8_MEMBER(dgnbeta_ram_bC_w); |
| 160 | | WRITE8_MEMBER(dgnbeta_ram_bD_w); |
| 161 | | WRITE8_MEMBER(dgnbeta_ram_bE_w); |
| 162 | | WRITE8_MEMBER(dgnbeta_ram_bF_w); |
| 163 | | WRITE8_MEMBER(dgnbeta_ram_bG_w); |
| 147 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b0_w); |
| 148 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b1_w); |
| 149 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b2_w); |
| 150 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b3_w); |
| 151 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b4_w); |
| 152 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b5_w); |
| 153 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b6_w); |
| 154 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b7_w); |
| 155 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b8_w); |
| 156 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_b9_w); |
| 157 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_bA_w); |
| 158 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_bB_w); |
| 159 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_bC_w); |
| 160 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_bD_w); |
| 161 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_bE_w); |
| 162 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_bF_w); |
| 163 | DECLARE_WRITE8_MEMBER(dgnbeta_ram_bG_w); |
| 164 | 164 | }; |
| 165 | 165 | |
| 166 | 166 | |
trunk/src/mess/includes/px8.h
| r18141 | r18142 | |
| 46 | 46 | |
| 47 | 47 | UINT32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); |
| 48 | 48 | |
| 49 | | READ8_MEMBER( gah40m_r ); |
| 50 | | WRITE8_MEMBER( gah40m_w ); |
| 51 | | READ8_MEMBER( gah40s_r ); |
| 52 | | WRITE8_MEMBER( gah40s_w ); |
| 53 | | WRITE8_MEMBER( gah40s_ier_w ); |
| 54 | | READ8_MEMBER( krtn_0_3_r ); |
| 55 | | READ8_MEMBER( krtn_4_7_r ); |
| 56 | | WRITE8_MEMBER( ksc_w ); |
| 49 | DECLARE_READ8_MEMBER( gah40m_r ); |
| 50 | DECLARE_WRITE8_MEMBER( gah40m_w ); |
| 51 | DECLARE_READ8_MEMBER( gah40s_r ); |
| 52 | DECLARE_WRITE8_MEMBER( gah40s_w ); |
| 53 | DECLARE_WRITE8_MEMBER( gah40s_ier_w ); |
| 54 | DECLARE_READ8_MEMBER( krtn_0_3_r ); |
| 55 | DECLARE_READ8_MEMBER( krtn_4_7_r ); |
| 56 | DECLARE_WRITE8_MEMBER( ksc_w ); |
| 57 | 57 | |
| 58 | 58 | void bankswitch(); |
| 59 | 59 | UINT8 krtn_read(); |
trunk/src/mess/includes/super80.h
| r18141 | r18142 | |
| 38 | 38 | required_device<device_t> m_speaker; |
| 39 | 39 | required_device<centronics_device> m_centronics; |
| 40 | 40 | optional_device<mc6845_device> m_6845; |
| 41 | | READ8_MEMBER( super80v_low_r ); |
| 42 | | READ8_MEMBER( super80v_high_r ); |
| 43 | | WRITE8_MEMBER( super80v_low_w ); |
| 44 | | WRITE8_MEMBER( super80v_high_w ); |
| 45 | | WRITE8_MEMBER( super80v_10_w ); |
| 46 | | WRITE8_MEMBER( super80v_11_w ); |
| 47 | | WRITE8_MEMBER( super80_f1_w ); |
| 48 | | READ8_MEMBER( super80_dc_r ); |
| 49 | | READ8_MEMBER( super80_f2_r ); |
| 50 | | WRITE8_MEMBER( super80_dc_w ); |
| 51 | | WRITE8_MEMBER( super80_f0_w ); |
| 52 | | WRITE8_MEMBER( super80r_f0_w ); |
| 53 | | READ8_MEMBER( super80_read_ff ); |
| 54 | | WRITE8_MEMBER( pio_port_a_w ); |
| 55 | | //READ8_MEMBER( pio_port_b_r ); |
| 41 | DECLARE_READ8_MEMBER( super80v_low_r ); |
| 42 | DECLARE_READ8_MEMBER( super80v_high_r ); |
| 43 | DECLARE_WRITE8_MEMBER( super80v_low_w ); |
| 44 | DECLARE_WRITE8_MEMBER( super80v_high_w ); |
| 45 | DECLARE_WRITE8_MEMBER( super80v_10_w ); |
| 46 | DECLARE_WRITE8_MEMBER( super80v_11_w ); |
| 47 | DECLARE_WRITE8_MEMBER( super80_f1_w ); |
| 48 | DECLARE_READ8_MEMBER( super80_dc_r ); |
| 49 | DECLARE_READ8_MEMBER( super80_f2_r ); |
| 50 | DECLARE_WRITE8_MEMBER( super80_dc_w ); |
| 51 | DECLARE_WRITE8_MEMBER( super80_f0_w ); |
| 52 | DECLARE_WRITE8_MEMBER( super80r_f0_w ); |
| 53 | DECLARE_READ8_MEMBER( super80_read_ff ); |
| 54 | DECLARE_WRITE8_MEMBER( pio_port_a_w ); |
| 55 | //DECLARE_READ8_MEMBER( pio_port_b_r ); |
| 56 | 56 | virtual void machine_reset(); |
| 57 | 57 | UINT8 m_shared; |
| 58 | 58 | UINT8 m_keylatch; |
trunk/src/mess/includes/atarist.h
| r18141 | r18142 | |
| 305 | 305 | |
| 306 | 306 | void video_start(); |
| 307 | 307 | |
| 308 | | READ8_MEMBER( shifter_base_low_r ); |
| 309 | | WRITE8_MEMBER( shifter_base_low_w ); |
| 310 | | READ8_MEMBER( shifter_counter_r ); |
| 311 | | WRITE8_MEMBER( shifter_counter_w ); |
| 312 | | WRITE16_MEMBER( shifter_palette_w ); |
| 313 | | READ8_MEMBER( shifter_lineofs_r ); |
| 314 | | WRITE8_MEMBER( shifter_lineofs_w ); |
| 315 | | READ8_MEMBER( shifter_pixelofs_r ); |
| 316 | | WRITE8_MEMBER( shifter_pixelofs_w ); |
| 308 | DECLARE_READ8_MEMBER( shifter_base_low_r ); |
| 309 | DECLARE_WRITE8_MEMBER( shifter_base_low_w ); |
| 310 | DECLARE_READ8_MEMBER( shifter_counter_r ); |
| 311 | DECLARE_WRITE8_MEMBER( shifter_counter_w ); |
| 312 | DECLARE_WRITE16_MEMBER( shifter_palette_w ); |
| 313 | DECLARE_READ8_MEMBER( shifter_lineofs_r ); |
| 314 | DECLARE_WRITE8_MEMBER( shifter_lineofs_w ); |
| 315 | DECLARE_READ8_MEMBER( shifter_pixelofs_r ); |
| 316 | DECLARE_WRITE8_MEMBER( shifter_pixelofs_w ); |
| 317 | 317 | |
| 318 | 318 | DECLARE_READ8_MEMBER( sound_dma_control_r ); |
| 319 | 319 | DECLARE_READ8_MEMBER( sound_dma_base_r ); |
trunk/src/mame/includes/segaxbd.h
| r18141 | r18142 | |
| 75 | 75 | void sound_data_w(UINT8 data); |
| 76 | 76 | |
| 77 | 77 | // YM2151 chip callbacks |
| 78 | | WRITE_LINE_MEMBER( sound_cpu_irq ); |
| 78 | DECLARE_WRITE_LINE_MEMBER( sound_cpu_irq ); |
| 79 | 79 | |
| 80 | 80 | // main CPU read/write handlers |
| 81 | | READ16_MEMBER( adc_r ); |
| 82 | | WRITE16_MEMBER( adc_w ); |
| 81 | DECLARE_READ16_MEMBER( adc_r ); |
| 82 | DECLARE_WRITE16_MEMBER( adc_w ); |
| 83 | 83 | UINT16 iochip_r(int which, int port, int inputval); |
| 84 | | READ16_MEMBER( iochip_0_r ); |
| 85 | | WRITE16_MEMBER( iochip_0_w ); |
| 86 | | READ16_MEMBER( iochip_1_r ); |
| 87 | | WRITE16_MEMBER( iochip_1_w ); |
| 88 | | WRITE16_MEMBER( iocontrol_w ); |
| 84 | DECLARE_READ16_MEMBER( iochip_0_r ); |
| 85 | DECLARE_WRITE16_MEMBER( iochip_0_w ); |
| 86 | DECLARE_READ16_MEMBER( iochip_1_r ); |
| 87 | DECLARE_WRITE16_MEMBER( iochip_1_w ); |
| 88 | DECLARE_WRITE16_MEMBER( iocontrol_w ); |
| 89 | 89 | |
| 90 | 90 | // game-specific main CPU read/write handlers |
| 91 | | WRITE16_MEMBER( loffire_sync0_w ); |
| 92 | | READ16_MEMBER( rascot_excs_r ); |
| 93 | | WRITE16_MEMBER( rascot_excs_w ); |
| 94 | | READ16_MEMBER( smgp_excs_r ); |
| 95 | | WRITE16_MEMBER( smgp_excs_w ); |
| 91 | DECLARE_WRITE16_MEMBER( loffire_sync0_w ); |
| 92 | DECLARE_READ16_MEMBER( rascot_excs_r ); |
| 93 | DECLARE_WRITE16_MEMBER( rascot_excs_w ); |
| 94 | DECLARE_READ16_MEMBER( smgp_excs_r ); |
| 95 | DECLARE_WRITE16_MEMBER( smgp_excs_w ); |
| 96 | 96 | |
| 97 | 97 | // sound Z80 CPU read/write handlers |
| 98 | | READ8_MEMBER( sound_data_r ); |
| 98 | DECLARE_READ8_MEMBER( sound_data_r ); |
| 99 | 99 | |
| 100 | 100 | // game-specific driver init |
| 101 | 101 | DECLARE_DRIVER_INIT(generic); |
trunk/src/mame/includes/segaybd.h
| r18141 | r18142 | |
| 68 | 68 | } |
| 69 | 69 | |
| 70 | 70 | // YM2151 chip callbacks |
| 71 | | WRITE_LINE_MEMBER( sound_cpu_irq ); |
| 71 | DECLARE_WRITE_LINE_MEMBER( sound_cpu_irq ); |
| 72 | 72 | |
| 73 | 73 | // main CPU read/write handlers |
| 74 | | READ16_MEMBER( analog_r ); |
| 75 | | WRITE16_MEMBER( analog_w ); |
| 76 | | READ16_MEMBER( io_chip_r ); |
| 77 | | WRITE16_MEMBER( io_chip_w ); |
| 78 | | WRITE16_MEMBER( sound_data_w ); |
| 74 | DECLARE_READ16_MEMBER( analog_r ); |
| 75 | DECLARE_WRITE16_MEMBER( analog_w ); |
| 76 | DECLARE_READ16_MEMBER( io_chip_r ); |
| 77 | DECLARE_WRITE16_MEMBER( io_chip_w ); |
| 78 | DECLARE_WRITE16_MEMBER( sound_data_w ); |
| 79 | 79 | |
| 80 | 80 | // sound Z80 CPU read/write handlers |
| 81 | | READ8_MEMBER( sound_data_r ); |
| 81 | DECLARE_READ8_MEMBER( sound_data_r ); |
| 82 | 82 | |
| 83 | 83 | // game-specific output handlers |
| 84 | 84 | void gforce2_output_cb2(UINT16 data); |