trunk/src/mame/video/dkong.c
r18100 | r18101 | |
119 | 119 | darlington. The blue channel has a pulldown resistor (R8, 0M15) as well. |
120 | 120 | */ |
121 | 121 | |
| 122 | |
| 123 | #define TRS_J1 (1) // (1) = Closed (0) = Open |
| 124 | |
| 125 | |
122 | 126 | static const res_net_info radarscp_net_info = |
123 | 127 | { |
124 | 128 | RES_NET_VCC_5V | RES_NET_VBIAS_TTL | RES_NET_VIN_MB7052 | RES_NET_MONITOR_SANYO_EZV20, |
125 | 129 | { |
126 | | { RES_NET_AMP_DARLINGTON, 470, 0, 3, { 1000, 470, 220 } }, |
127 | | { RES_NET_AMP_DARLINGTON, 470, 0, 3, { 1000, 470, 220 } }, |
128 | | { RES_NET_AMP_DARLINGTON, 680, 150000, 2, { 470, 220, 0 } } /* radarscp */ |
| 130 | { RES_NET_AMP_DARLINGTON, 470 * TRS_J1, 470*(1-TRS_J1), 3, { 1000, 470, 220 } }, |
| 131 | { RES_NET_AMP_DARLINGTON, 470 * TRS_J1, 470*(1-TRS_J1), 3, { 1000, 470, 220 } }, |
| 132 | { RES_NET_AMP_EMITTER, 680 * TRS_J1, 680*(1-TRS_J1), 2, { 470, 220, 0 } } /* radarscp */ |
129 | 133 | } |
130 | 134 | }; |
131 | 135 | |
r18100 | r18101 | |
133 | 137 | { |
134 | 138 | RES_NET_VCC_5V | RES_NET_VBIAS_TTL | RES_NET_VIN_MB7052 | RES_NET_MONITOR_SANYO_EZV20, |
135 | 139 | { |
136 | | { RES_NET_AMP_DARLINGTON, 470, 0, 0, { 0 } }, |
137 | | { RES_NET_AMP_DARLINGTON, 470, 0, 0, { 0 } }, |
138 | | { RES_NET_AMP_DARLINGTON, 680, 150000, 0, { 0 } } /* radarscp */ |
| 140 | { RES_NET_AMP_DARLINGTON, 470, 4700, 0, { 0 } }, |
| 141 | { RES_NET_AMP_DARLINGTON, 470, 4700, 0, { 0 } }, |
| 142 | { RES_NET_AMP_EMITTER, 470, 4700, 0, { 0 } } /* radarscp */ |
139 | 143 | } |
140 | 144 | }; |
141 | 145 | |
r18100 | r18101 | |
153 | 157 | { |
154 | 158 | { RES_NET_AMP_DARLINGTON, 0, 0, 4, { 39000, 20000, 10000, 4990 } }, |
155 | 159 | { RES_NET_AMP_DARLINGTON, 0, 0, 4, { 39000, 20000, 10000, 4990 } }, |
156 | | { RES_NET_AMP_DARLINGTON, 0, 0, 4, { 39000, 20000, 10000, 4990 } } |
| 160 | { RES_NET_AMP_EMITTER, 0, 0, 4, { 39000, 20000, 10000, 4990 } } |
157 | 161 | } |
158 | 162 | }; |
159 | 163 | |
r18100 | r18101 | |
165 | 169 | { |
166 | 170 | { RES_NET_AMP_DARLINGTON, 4700, 470, 0, { 0 } }, |
167 | 171 | { RES_NET_AMP_DARLINGTON, 1, 0, 0, { 0 } }, /* dummy */ |
168 | | { RES_NET_AMP_DARLINGTON, 1, 0, 0, { 0 } }, /* dummy */ |
| 172 | { RES_NET_AMP_EMITTER, 1, 0, 0, { 0 } }, /* dummy */ |
169 | 173 | } |
170 | 174 | }; |
171 | 175 | |
r18100 | r18101 | |
177 | 181 | { |
178 | 182 | { RES_NET_AMP_DARLINGTON, 470, 4700, 0, { 0 } }, /* bias/gnd exist in schematics, readable in TKG3 schematics */ |
179 | 183 | { RES_NET_AMP_DARLINGTON, 470, 4700, 0, { 0 } }, /* bias/gnd exist in schematics, readable in TKG3 schematics */ |
180 | | { RES_NET_AMP_DARLINGTON, 0, 0, 8, { 128,64,32,16,8,4,2,1 } }, /* dummy */ |
| 184 | { RES_NET_AMP_EMITTER, 0, 0, 8, { 128,64,32,16,8,4,2,1 } }, /* dummy */ |
181 | 185 | } |
182 | 186 | }; |
183 | 187 | |
r18100 | r18101 | |
189 | 193 | { |
190 | 194 | { RES_NET_AMP_DARLINGTON, 0, 0, 1, { 1 } }, /* dummy */ |
191 | 195 | { RES_NET_AMP_DARLINGTON, 0, 0, 1, { 1 } }, /* dummy */ |
192 | | { RES_NET_AMP_DARLINGTON, 0, 0, 1, { 1 } }, /* dummy */ |
| 196 | { RES_NET_AMP_EMITTER, 0, 0, 1, { 1 } }, /* dummy */ |
193 | 197 | } |
194 | 198 | }; |
195 | 199 | |
r18100 | r18101 | |
291 | 295 | /* Now treat tri-state black background generation */ |
292 | 296 | |
293 | 297 | for (i=0;i<256;i++) |
294 | | if ( (i & 0x03) == 0x00 ) /* NOR => CS=1 => Tristate => real black */ |
| 298 | if ( (m_vidhw != DKONG_RADARSCP_CONVERSION) && ( (i & 0x03) == 0x00 )) /* NOR => CS=1 => Tristate => real black */ |
295 | 299 | { |
296 | 300 | r = compute_res_net( 1, 0, &radarscp_net_bck_info ); |
297 | 301 | g = compute_res_net( 1, 1, &radarscp_net_bck_info ); |
r18100 | r18101 | |
708 | 712 | double diff; |
709 | 713 | int sig; |
710 | 714 | |
711 | | line_cnt += 256; |
712 | | if (line_cnt>511) |
713 | | line_cnt -= VTOTAL; |
| 715 | /* vsync is divided by 2 by a LS161 |
| 716 | * The resulting 30 Hz signal clocks a LFSR (LS164) operating as a |
| 717 | * random number generator. |
| 718 | */ |
714 | 719 | |
| 720 | if ( line_cnt == 0) |
| 721 | { |
| 722 | state->m_sig30Hz = (1-state->m_sig30Hz); |
| 723 | if (state->m_sig30Hz) |
| 724 | state->m_lfsr_5I = (machine.rand() > RAND_MAX/2); |
| 725 | } |
| 726 | |
715 | 727 | /* sound2 mixes in a 30Hz noise signal. |
716 | 728 | * With the current model this has no real effect |
717 | 729 | * Included for completeness |
718 | 730 | */ |
719 | 731 | |
720 | | line_cnt++; |
721 | | if (line_cnt>=512) |
722 | | line_cnt=512-VTOTAL; |
723 | | |
724 | | if ( ( !(line_cnt & 0x40) && ((line_cnt+1) & 0x40) ) && (machine.rand() > RAND_MAX/2)) |
725 | | state->m_sig30Hz = (1-state->m_sig30Hz); |
726 | | |
727 | 732 | /* Now mix with SND02 (sound 2) line - on 74ls259, bit2 */ |
728 | 733 | address_space &space = machine.driver_data()->generic_space(); |
729 | | state->m_rflip_sig = latch8_bit2_r(state->m_dev_6h, space, 0) & state->m_sig30Hz; |
| 734 | state->m_rflip_sig = latch8_bit2_r(state->m_dev_6h, space, 0) & state->m_lfsr_5I; |
730 | 735 | |
| 736 | /* blue background generation */ |
| 737 | |
| 738 | line_cnt += (256 - 8) + 1; // offset 8 needed to match monitor pictures |
| 739 | if (line_cnt>511) |
| 740 | line_cnt -= VTOTAL; |
| 741 | |
731 | 742 | sig = state->m_rflip_sig ^ ((line_cnt & 0x80)>>7); |
732 | 743 | |
733 | 744 | if (state->m_hardware_type == HARDWARE_TRS01) |
r18100 | r18101 | |
736 | 747 | if (sig) /* 128VF */ |
737 | 748 | diff = (0.0 - state->m_cv1); |
738 | 749 | else |
739 | | diff = (3.4 - state->m_cv1); |
| 750 | diff = (4.8 - state->m_cv1); |
740 | 751 | diff = diff - diff*exp(0.0 - (1.0/RC1 * dt) ); |
741 | 752 | state->m_cv1 += diff; |
742 | 753 | |
r18100 | r18101 | |
744 | 755 | diff = diff - diff*exp(0.0 - (1.0/RC2 * dt) ); |
745 | 756 | state->m_cv2 += diff; |
746 | 757 | |
747 | | state->m_vg1 = (state->m_cv1 - state->m_cv2)*0.9 + 0.1 * state->m_vg2; |
748 | | state->m_vg2 = 5*CD4049(machine, state->m_vg1/5); |
| 758 | // FIXME: use the inverse function |
| 759 | // Solve the amplifier by iteration |
| 760 | for (int j=1; j<=11; j++)// 11% = 1/75 / (1/75+1/10) |
| 761 | { |
| 762 | double f = (double) j / 100.0f; |
| 763 | state->m_vg1 = (state->m_cv1 - state->m_cv2)*(1-f) + f * state->m_vg2; |
| 764 | state->m_vg2 = 5*CD4049(machine, state->m_vg1/5); |
| 765 | } |
| 766 | // FIXME: use the inverse function |
| 767 | // Solve the amplifier by iteration 50% = both resistors equal |
| 768 | for (int j=10; j<=20; j++) |
| 769 | { |
| 770 | double f = (double) j / 40.0f; |
| 771 | vg3i = (1.0f-f) * state->m_vg2 + f * state->m_vg3; |
| 772 | state->m_vg3 = 5*CD4049(machine, vg3i/5); |
| 773 | } |
749 | 774 | |
750 | | /* on the real hardware, the gain would be 1. |
751 | | * This will not work here. |
752 | | */ |
753 | | vg3i = 0.9*state->m_vg2 + 0.1 * state->m_vg3; |
754 | | state->m_vg3 = 5*CD4049(machine, vg3i/5); |
| 775 | #define RC17 (33e-6 * 1e3 * (0*4.7+1.0/(1.0/10.0+1.0/20.0+0.0/0.3))) |
| 776 | diff = (state->m_vg3 - state->m_vc17); |
| 777 | diff = diff - diff*exp(0.0 - (1.0/RC17 * dt) ); |
| 778 | state->m_vc17 += diff; |
755 | 779 | |
756 | | state->m_blue_level = (int)(state->m_vg3/5.0*255); |
| 780 | double vo = (state->m_vg3 - state->m_vc17); |
| 781 | vo = vo + 20.0 / (20.0+10.0) * 5; |
757 | 782 | |
| 783 | // Transistor is marked as OMIT in TRS-02 schems. |
| 784 | //vo = vo - 0.7; |
| 785 | |
| 786 | |
| 787 | //double vo = (vg3o - vg3)/4.7 + 5.0/16.0; |
| 788 | //vo = vo / (1.0 / 4.7 + 1.0 / 16.0 + 1.0 / 30.0 ); |
| 789 | //printf("%f %f\n", vg3, vc17); |
| 790 | |
| 791 | state->m_blue_level = (int)(vo/5.0*255); |
| 792 | //printf("%d\n", state->m_blue_level); |
| 793 | |
758 | 794 | /* |
759 | 795 | * Grid signal |
760 | 796 | * |
r18100 | r18101 | |
776 | 812 | diff = diff - diff*exp(0.0 - (1.0/RC4 * dt) ); |
777 | 813 | state->m_cv4 += diff; |
778 | 814 | |
779 | | if (CD4049(machine, CD4049(machine, state->m_vg2 - state->m_cv4))>2.4/5.0) /* TTL - Level */ |
| 815 | if (CD4049(machine, CD4049(machine, (state->m_vg2 - state->m_cv4)/5.0))>2.4/5.0) /* TTL - Level */ |
780 | 816 | state->m_grid_sig = 0; |
781 | 817 | else |
782 | 818 | state->m_grid_sig = 1; |
r18100 | r18101 | |
886 | 922 | state->m_vidhw = newset; |
887 | 923 | switch (newset) |
888 | 924 | { |
889 | | case 0x00: |
| 925 | case DKONG_RADARSCP_CONVERSION: |
890 | 926 | state->PALETTE_INIT_CALL_MEMBER(radarscp); |
891 | 927 | break; |
892 | | case 0x01: |
| 928 | case DKONG_BOARD: |
893 | 929 | state->PALETTE_INIT_CALL_MEMBER(dkong2b); |
894 | 930 | break; |
895 | 931 | } |