Previous

199869 Revisions

Next

r18073 Saturday 22nd September, 2012 at 15:25:56 UTC by Fabio Priuli
(MESS) nes.c: moved cart class where it actually belongs. no whatsnew. eventually, nes_mmc and its pieces (nes_pcb, nes_ines & nes_unif) will contain a cart slot device and allow for things like on-cart sound chips and eeprom devices to be properly emulated

[src/mess/drivers]	nes.c
[src/mess/includes]	nes.h nes_mmc.h*
[src/mess/machine]	nes.c nes_mmc.c nes_mmc.h
[src/mess/video]	nes.c

trunk/src/mess/machine/nes_mmc.h

r18072	r18073
1		#ifndef __MMC_H
2		#define __MMC_H
3
4		/* Boards */
5		enum
6		{
7		STD_NROM = 0,
8		STD_AXROM, STD_BXROM, STD_CNROM, STD_CPROM,
9		STD_DXROM, STD_EXROM, STD_FXROM, STD_GXROM,
10		STD_HKROM, STD_JXROM, STD_MXROM, STD_NXROM,
11		STD_PXROM, STD_SXROM, STD_TXROM, STD_TXSROM,
12		STD_TKROM, STD_TQROM, STD_TVROM,
13		STD_UN1ROM, STD_UXROM,
14		HVC_FAMBASIC, NES_QJ, PAL_ZZ, UXROM_CC,
15		STD_DRROM, STD_SXROM_A, STD_SOROM, STD_SOROM_A,
16		/* Discrete components boards (by various manufacturer) */
17		DIS_74X161X138, DIS_74X139X74,
18		DIS_74X377, DIS_74X161X161X32,
19		/* Active Enterprises */
20		ACTENT_ACT52,
21		/* AGCI */
22		AGCI_50282,
23		/* AVE */
24		AVE_NINA01, AVE_NINA06,
25		/* Bandai */
26		BANDAI_JUMP2, BANDAI_PT554,
27		BANDAI_DATACH, BANDAI_KARAOKE, BANDAI_OEKAKIDS,
28		BANDAI_FCG, BANDAI_LZ93, BANDAI_LZ93EX,
29		/* Caltron */
30		CALTRON_6IN1,
31		/* Camerica */
32		CAMERICA_BF9093, CAMERICA_BF9097, CAMERICA_BF9096,
33		CAMERICA_GOLDENFIVE, GG_NROM,
34		/* Dreamtech */
35		DREAMTECH_BOARD,
36		/* Irem */
37		IREM_G101, IREM_H3001, IREM_LROG017,
38		IREM_TAM_S1, IREM_HOLYDIV,
39		/* Jaleco */
40		JALECO_SS88006, JALECO_JF11, JALECO_JF13,
41		JALECO_JF16, JALECO_JF17, JALECO_JF19,
42		/* Konami */
43		KONAMI_VRC1, KONAMI_VRC2, KONAMI_VRC3,
44		KONAMI_VRC4, KONAMI_VRC6, KONAMI_VRC7,
45		/* Namcot */
46		NAMCOT_163, NAMCOT_3453,
47		NAMCOT_3425, NAMCOT_34X3, NAMCOT_3446,
48		/* NTDEC */
49		NTDEC_ASDER, NTDEC_FIGHTINGHERO,
50		/* Rex Soft */
51		REXSOFT_SL1632, REXSOFT_DBZ5,
52		/* Sachen */
53		SACHEN_8259A, SACHEN_8259B, SACHEN_8259C, SACHEN_8259D,
54		SACHEN_SA009, SACHEN_SA0036, SACHEN_SA0037,
55		SACHEN_SA72007, SACHEN_SA72008, SACHEN_TCA01,
56		SACHEN_TCU01, SACHEN_TCU02,
57		SACHEN_74LS374, SACHEN_74LS374_A,
58		/* Sunsoft */
59		SUNSOFT_1, SUNSOFT_2, SUNSOFT_3, SUNSOFT_4,
60		SUNSOFT_DCS, SUNSOFT_5B, SUNSOFT_FME7,
61		/* Taito */
62		TAITO_TC0190FMC, TAITO_TC0190FMCP,
63		TAITO_X1_005, TAITO_X1_005_A, TAITO_X1_017,
64		/* Tengen */
65		TENGEN_800008, TENGEN_800032, TENGEN_800037,
66		/* TXC */
67		TXC_22211A, TXC_22211B, TXC_22211C,
68		TXC_MXMDHTWO, TXC_TW, TXC_STRIKEWOLF,
69		/* Multigame Carts */
70		BMC_64IN1NR, BMC_190IN1, BMC_A65AS, BMC_GS2004, BMC_GS2013,
71		BMC_HIK8IN1, BMC_NOVELDIAMOND, BMC_S24IN1SC03, BMC_T262,
72		BMC_WS, BMC_SUPERBIG_7IN1, BMC_SUPERHIK_4IN1, BMC_BALLGAMES_11IN1,
73		BMC_MARIOPARTY_7IN1, BMC_GOLD_7IN1, BMC_SUPER_700IN1, BMC_FAMILY_4646B,
74		BMC_36IN1, BMC_21IN1, BMC_150IN1, BMC_35IN1, BMC_64IN1,
75		BMC_15IN1, BMC_SUPERHIK_300IN1, BMC_9999999IN1, BMC_SUPERGUN_20IN1,
76		BMC_GOLDENCARD_6IN1, BMC_72IN1, BMC_SUPER_42IN1, BMC_76IN1,
77		BMC_1200IN1, BMC_31IN1, BMC_22GAMES, BMC_20IN1, BMC_110IN1,
78		BMC_GKA, BMC_GKB, BMC_VT5201, BMC_BENSHENG_BS5, BMC_810544,
79		BMC_NTD_03, BMC_G63IN1, BMC_FK23C, BMC_FK23CA, BMC_PJOY84,
80		BMC_POWERFUL_255,
81		/* Unlicensed */
82		UNL_8237, UNL_CC21, UNL_AX5705, UNL_KOF97, UNL_KS7057,
83		UNL_N625092, UNL_SC127, UNL_SMB2J, UNL_T230, UNL_FS304,
84		UNL_UXROM, UNL_MK2, UNL_XZY, UNL_KOF96,
85		UNL_SUPERFIGHTER3, UNL_RACERMATE, UNL_EDU2K,
86		UNL_SHJY3, UNL_STUDYNGAME, UNL_603_5052, UNL_H2288,
87		/* Bootleg boards */
88		BTL_SMB2A, BTL_MARIOBABY, BTL_AISENSHINICOL, BTL_TOBIDASE,
89		BTL_SMB2B, BTL_SMB3, BTL_SUPERBROS11, BTL_DRAGONNINJA,
90		BTL_PIKACHUY2K,
91		/* Misc: these are needed to convert mappers to boards, I will sort them later */
92		OPENCORP_DAOU306, HES_BOARD, HES6IN1_BOARD, RUMBLESTATION_BOARD,
93		MAGICSERIES_MD, KASING_BOARD, FUTUREMEDIA_BOARD, FUKUTAKE_BOARD, SOMERI_SL12,
94		HENGEDIANZI_BOARD, HENGEDIANZI_XJZB, SUBOR_TYPE0, SUBOR_TYPE1,
95		KAISER_KS7058, KAISER_KS7032, KAISER_KS7022, KAISER_KS7017, KAISER_KS7012, KAISER_KS202,
96		CNE_DECATHLON, CNE_FSB, CNE_SHLZ, CONY_BOARD, YOKO_BOARD, RCM_GS2015, RCM_TETRISFAMILY,
97		WAIXING_TYPE_A, WAIXING_TYPE_A_1, WAIXING_TYPE_B, WAIXING_TYPE_C, WAIXING_TYPE_D,
98		WAIXING_TYPE_E, WAIXING_TYPE_F, WAIXING_TYPE_G, WAIXING_TYPE_H,
99		WAIXING_TYPE_I, WAIXING_TYPE_J,
100		WAIXING_SGZLZ, WAIXING_SGZ, WAIXING_ZS, WAIXING_SECURITY, WAIXING_SH2,
101		WAIXING_DQ8, WAIXING_FFV, WAIXING_PS2, SUPERGAME_LIONKING, SUPERGAME_BOOGERMAN,
102		KAY_PANDAPRINCE, HOSENKAN_BOARD, NITRA_TDA, GOUDER_37017, NANJING_BOARD,
103		WHIRLWIND_2706,
104		/* FFE boards, for mappers 6, 8, 17 */
105		FFE_MAPPER6, FFE_MAPPER8, FFE_MAPPER17,
106		/* Unsupported (for place-holder boards, with no working emulation) & no-board (at init) */
107		UNSUPPORTED_BOARD, UNKNOWN_BOARD, NO_BOARD
108		};
109
110		// these are used to setup the proper PCB ID, for each supported type of files
111		int nes_get_pcb_id(running_machine &machine, const char *feature);   // for softlist
112		void unif_mapr_setup(running_machine &machine, const char *board);   // for UNIF files
113		int nes_get_mmc_id(running_machine &machine, int mapper);   // for iNES files
114
115		// these are used to setup handlers and callbacks necessary to the emulation (resp. at start and reset)
116		void pcb_handlers_setup(running_machine &machine);
117		int nes_pcb_reset(running_machine &machine);
118
119		//TEMPORARY PPU STUFF
120
121		/* mirroring types */
122		#define PPU_MIRROR_NONE      0
123		#define PPU_MIRROR_VERT      1
124		#define PPU_MIRROR_HORZ      2
125		#define PPU_MIRROR_HIGH      3
126		#define PPU_MIRROR_LOW      4
127		#define PPU_MIRROR_4SCREEN   5   // Same effect as NONE, but signals that we should never mirror
128
129		void set_nt_mirroring(running_machine &machine, int mirroring);
130
131
132		#endif

trunk/src/mess/machine/nes_mmc.c

r18072	r18073
124	124	#include "cpu/m6502/m6502.h"
125	125	#include "video/ppu2c0x.h"
126	126	#include "includes/nes.h"
127		#include "nes_mmc.h"
	127	#include "includes/nes_mmc.h"
128	128	#include "sound/nes_apu.h"
129	129
130	130	#ifdef MAME_DEBUG

trunk/src/mess/machine/nes.c

r18072	r18073
3	3	#include "cpu/m6502/m6502.h"
4	4	#include "video/ppu2c0x.h"
5	5	#include "includes/nes.h"
6		#include "machine/nes_mmc.h"
	6	//#include "includes/nes_mmc.h"
7	7	#include "imagedev/cartslot.h"
8	8	#include "imagedev/flopdrv.h"
9	9	#include "hashfile.h"

trunk/src/mess/includes/nes_mmc.h

r0	r18073
	1	#ifndef __MMC_H
	2	#define __MMC_H
	3
	4	/* Boards */
	5	enum
	6	{
	7	STD_NROM = 0,
	8	STD_AXROM, STD_BXROM, STD_CNROM, STD_CPROM,
	9	STD_DXROM, STD_EXROM, STD_FXROM, STD_GXROM,
	10	STD_HKROM, STD_JXROM, STD_MXROM, STD_NXROM,
	11	STD_PXROM, STD_SXROM, STD_TXROM, STD_TXSROM,
	12	STD_TKROM, STD_TQROM, STD_TVROM,
	13	STD_UN1ROM, STD_UXROM,
	14	HVC_FAMBASIC, NES_QJ, PAL_ZZ, UXROM_CC,
	15	STD_DRROM, STD_SXROM_A, STD_SOROM, STD_SOROM_A,
	16	/* Discrete components boards (by various manufacturer) */
	17	DIS_74X161X138, DIS_74X139X74,
	18	DIS_74X377, DIS_74X161X161X32,
	19	/* Active Enterprises */
	20	ACTENT_ACT52,
	21	/* AGCI */
	22	AGCI_50282,
	23	/* AVE */
	24	AVE_NINA01, AVE_NINA06,
	25	/* Bandai */
	26	BANDAI_JUMP2, BANDAI_PT554,
	27	BANDAI_DATACH, BANDAI_KARAOKE, BANDAI_OEKAKIDS,
	28	BANDAI_FCG, BANDAI_LZ93, BANDAI_LZ93EX,
	29	/* Caltron */
	30	CALTRON_6IN1,
	31	/* Camerica */
	32	CAMERICA_BF9093, CAMERICA_BF9097, CAMERICA_BF9096,
	33	CAMERICA_GOLDENFIVE, GG_NROM,
	34	/* Dreamtech */
	35	DREAMTECH_BOARD,
	36	/* Irem */
	37	IREM_G101, IREM_H3001, IREM_LROG017,
	38	IREM_TAM_S1, IREM_HOLYDIV,
	39	/* Jaleco */
	40	JALECO_SS88006, JALECO_JF11, JALECO_JF13,
	41	JALECO_JF16, JALECO_JF17, JALECO_JF19,
	42	/* Konami */
	43	KONAMI_VRC1, KONAMI_VRC2, KONAMI_VRC3,
	44	KONAMI_VRC4, KONAMI_VRC6, KONAMI_VRC7,
	45	/* Namcot */
	46	NAMCOT_163, NAMCOT_3453,
	47	NAMCOT_3425, NAMCOT_34X3, NAMCOT_3446,
	48	/* NTDEC */
	49	NTDEC_ASDER, NTDEC_FIGHTINGHERO,
	50	/* Rex Soft */
	51	REXSOFT_SL1632, REXSOFT_DBZ5,
	52	/* Sachen */
	53	SACHEN_8259A, SACHEN_8259B, SACHEN_8259C, SACHEN_8259D,
	54	SACHEN_SA009, SACHEN_SA0036, SACHEN_SA0037,
	55	SACHEN_SA72007, SACHEN_SA72008, SACHEN_TCA01,
	56	SACHEN_TCU01, SACHEN_TCU02,
	57	SACHEN_74LS374, SACHEN_74LS374_A,
	58	/* Sunsoft */
	59	SUNSOFT_1, SUNSOFT_2, SUNSOFT_3, SUNSOFT_4,
	60	SUNSOFT_DCS, SUNSOFT_5B, SUNSOFT_FME7,
	61	/* Taito */
	62	TAITO_TC0190FMC, TAITO_TC0190FMCP,
	63	TAITO_X1_005, TAITO_X1_005_A, TAITO_X1_017,
	64	/* Tengen */
	65	TENGEN_800008, TENGEN_800032, TENGEN_800037,
	66	/* TXC */
	67	TXC_22211A, TXC_22211B, TXC_22211C,
	68	TXC_MXMDHTWO, TXC_TW, TXC_STRIKEWOLF,
	69	/* Multigame Carts */
	70	BMC_64IN1NR, BMC_190IN1, BMC_A65AS, BMC_GS2004, BMC_GS2013,
	71	BMC_HIK8IN1, BMC_NOVELDIAMOND, BMC_S24IN1SC03, BMC_T262,
	72	BMC_WS, BMC_SUPERBIG_7IN1, BMC_SUPERHIK_4IN1, BMC_BALLGAMES_11IN1,
	73	BMC_MARIOPARTY_7IN1, BMC_GOLD_7IN1, BMC_SUPER_700IN1, BMC_FAMILY_4646B,
	74	BMC_36IN1, BMC_21IN1, BMC_150IN1, BMC_35IN1, BMC_64IN1,
	75	BMC_15IN1, BMC_SUPERHIK_300IN1, BMC_9999999IN1, BMC_SUPERGUN_20IN1,
	76	BMC_GOLDENCARD_6IN1, BMC_72IN1, BMC_SUPER_42IN1, BMC_76IN1,
	77	BMC_1200IN1, BMC_31IN1, BMC_22GAMES, BMC_20IN1, BMC_110IN1,
	78	BMC_GKA, BMC_GKB, BMC_VT5201, BMC_BENSHENG_BS5, BMC_810544,
	79	BMC_NTD_03, BMC_G63IN1, BMC_FK23C, BMC_FK23CA, BMC_PJOY84,
	80	BMC_POWERFUL_255,
	81	/* Unlicensed */
	82	UNL_8237, UNL_CC21, UNL_AX5705, UNL_KOF97, UNL_KS7057,
	83	UNL_N625092, UNL_SC127, UNL_SMB2J, UNL_T230, UNL_FS304,
	84	UNL_UXROM, UNL_MK2, UNL_XZY, UNL_KOF96,
	85	UNL_SUPERFIGHTER3, UNL_RACERMATE, UNL_EDU2K,
	86	UNL_SHJY3, UNL_STUDYNGAME, UNL_603_5052, UNL_H2288,
	87	/* Bootleg boards */
	88	BTL_SMB2A, BTL_MARIOBABY, BTL_AISENSHINICOL, BTL_TOBIDASE,
	89	BTL_SMB2B, BTL_SMB3, BTL_SUPERBROS11, BTL_DRAGONNINJA,
	90	BTL_PIKACHUY2K,
	91	/* Misc: these are needed to convert mappers to boards, I will sort them later */
	92	OPENCORP_DAOU306, HES_BOARD, HES6IN1_BOARD, RUMBLESTATION_BOARD,
	93	MAGICSERIES_MD, KASING_BOARD, FUTUREMEDIA_BOARD, FUKUTAKE_BOARD, SOMERI_SL12,
	94	HENGEDIANZI_BOARD, HENGEDIANZI_XJZB, SUBOR_TYPE0, SUBOR_TYPE1,
	95	KAISER_KS7058, KAISER_KS7032, KAISER_KS7022, KAISER_KS7017, KAISER_KS7012, KAISER_KS202,
	96	CNE_DECATHLON, CNE_FSB, CNE_SHLZ, CONY_BOARD, YOKO_BOARD, RCM_GS2015, RCM_TETRISFAMILY,
	97	WAIXING_TYPE_A, WAIXING_TYPE_A_1, WAIXING_TYPE_B, WAIXING_TYPE_C, WAIXING_TYPE_D,
	98	WAIXING_TYPE_E, WAIXING_TYPE_F, WAIXING_TYPE_G, WAIXING_TYPE_H,
	99	WAIXING_TYPE_I, WAIXING_TYPE_J,
	100	WAIXING_SGZLZ, WAIXING_SGZ, WAIXING_ZS, WAIXING_SECURITY, WAIXING_SH2,
	101	WAIXING_DQ8, WAIXING_FFV, WAIXING_PS2, SUPERGAME_LIONKING, SUPERGAME_BOOGERMAN,
	102	KAY_PANDAPRINCE, HOSENKAN_BOARD, NITRA_TDA, GOUDER_37017, NANJING_BOARD,
	103	WHIRLWIND_2706,
	104	/* FFE boards, for mappers 6, 8, 17 */
	105	FFE_MAPPER6, FFE_MAPPER8, FFE_MAPPER17,
	106	/* Unsupported (for place-holder boards, with no working emulation) & no-board (at init) */
	107	UNSUPPORTED_BOARD, UNKNOWN_BOARD, NO_BOARD
	108	};
	109
	110	// these are used to setup the proper PCB ID, for each supported type of files
	111	int nes_get_pcb_id(running_machine &machine, const char *feature);   // for softlist
	112	void unif_mapr_setup(running_machine &machine, const char *board);   // for UNIF files
	113	int nes_get_mmc_id(running_machine &machine, int mapper);   // for iNES files
	114
	115	// these are used to setup handlers and callbacks necessary to the emulation (resp. at start and reset)
	116	void pcb_handlers_setup(running_machine &machine);
	117	int nes_pcb_reset(running_machine &machine);
	118
	119	//TEMPORARY PPU STUFF
	120
	121	/* mirroring types */
	122	#define PPU_MIRROR_NONE      0
	123	#define PPU_MIRROR_VERT      1
	124	#define PPU_MIRROR_HORZ      2
	125	#define PPU_MIRROR_HIGH      3
	126	#define PPU_MIRROR_LOW      4
	127	#define PPU_MIRROR_4SCREEN   5   // Same effect as NONE, but signals that we should never mirror
	128
	129	void set_nt_mirroring(running_machine &machine, int mirroring);
	130
	131	struct chr_bank
	132	{
	133	int source;   //defines source of base pointer
	134	int origin; //defines offset of 0x400 byte segment at base pointer
	135	UINT8* access;   //source translated + origin -> valid pointer!
	136	};
	137
	138
	139	struct name_table
	140	{
	141	int source;      /* defines source of base pointer */
	142	int origin;      /* defines offset of 0x400 byte segment at base pointer */
	143	int writable;   /* ExRAM, at least, can be write-protected AND used as nametable */
	144	UINT8* access;   /* direct access when possible */
	145	};
	146
	147	typedef void (*nes_prg_callback)(running_machine &machine, int start, int bank);
	148	typedef void (*nes_chr_callback)(running_machine &machine, int start, int bank, int source);
	149
	150	class nes_carts_state : public driver_device
	151	{
	152	public:
	153	nes_carts_state(const machine_config &mconfig, device_type type, const char *tag)
	154	: driver_device(mconfig, type, tag) { }
	155
	156	int           m_prg_bank[5];
	157	chr_bank      m_chr_map[8];  //quick banking structure, because some of this changes multiple times per scanline!
	158	name_table    m_nt_page[4];  //quick banking structure for a maximum of 4K of RAM/ROM/ExRAM
	159
	160	nes_prg_callback    m_mmc3_prg_cb;   // these are used to simplify a lot emulation of some MMC3 pirate clones
	161	nes_chr_callback    m_mmc3_chr_cb;
	162
	163	int m_chr_open_bus;
	164	int m_prgram_bank5_start, m_battery_bank5_start, m_empty_bank5_start;
	165
	166	UINT8 m_ce_mask, m_ce_state;
	167	UINT8 m_vrc_ls_prg_a, m_vrc_ls_prg_b, m_vrc_ls_chr;
	168
	169	int m_MMC5_floodtile;
	170	int m_MMC5_floodattr;
	171	int m_mmc5_vram_control;
	172	UINT8 m_mmc5_high_chr;
	173	UINT8 m_mmc5_split_scr;
	174	UINT8 *m_extended_ntram;
	175
	176	UINT8 m_mmc5_last_chr_a;
	177	UINT16 m_mmc5_vrom_regA[8];
	178	UINT16 m_mmc5_vrom_regB[4];
	179	UINT8 m_mmc5_prg_regs[4];
	180	UINT8 m_mmc5_bank_security;
	181	UINT8 m_mmc5_prg_mode;
	182	UINT8 m_mmc5_chr_mode;
	183	UINT8 m_mmc5_chr_high;
	184	UINT8 m_mmc5_split_ctrl;
	185	UINT8 m_mmc5_split_yst;
	186	UINT8 m_mmc5_split_bank;
	187
	188	/***** Mapper-related variables *****/
	189
	190	// common ones
	191	int        m_IRQ_enable, m_IRQ_enable_latch;
	192	UINT16     m_IRQ_count, m_IRQ_count_latch;
	193	UINT8      m_IRQ_toggle;
	194	UINT8      m_IRQ_reset;
	195	UINT8      m_IRQ_status;
	196	UINT8      m_IRQ_mode;
	197	UINT8      m_IRQ_clear;
	198	int        m_mult1, m_mult2;
	199
	200	UINT8 m_mmc_chr_source;         // This is set at init to CHRROM or CHRRAM. a few mappers can swap between
	201	// the two (this is done in the specific handlers).
	202
	203	UINT8 m_mmc_cmd1, m_mmc_cmd2;      // These represent registers where the mapper writes important values
	204	UINT8 m_mmc_count;            // This is used as counter in mappers like 1 and 45
	205
	206	int m_mmc_prg_base, m_mmc_prg_mask;   // MMC3 based multigame carts select a block of banks by using these (and then act like normal MMC3),
	207	int m_mmc_chr_base, m_mmc_chr_mask;   // while MMC3 and clones (mapper 118 & 119) simply set them as 0 and 0xff resp.
	208
	209	UINT8 m_mmc_prg_bank[6];            // Many mappers writes only some bits of the selected bank (for both PRG and CHR),
	210	UINT8 m_mmc_vrom_bank[16];         // hence these are handy to latch bank values.
	211
	212	UINT16 m_MMC5_vrom_bank[12];         // MMC5 has 10bit wide VROM regs!
	213	UINT8 m_mmc_extra_bank[16];         // some MMC3 clone have 2 series of PRG/CHR banks...
	214	// we collect them all here: first 4 elements PRG banks, then 6/8 CHR banks
	215
	216	UINT8 m_mmc_latch1, m_mmc_latch2;
	217	UINT8 m_mmc_reg[16];
	218
	219	UINT8 m_mmc_dipsetting;
	220
	221	// misc mapper related variables which should be merged with the above one, where possible
	222	int m_mmc1_reg_write_enable;
	223	int m_mmc1_latch;
	224	int m_mmc1_count;
	225
	226	int m_mmc3_latch;
	227	int m_mmc3_wram_protect;
	228	int m_mmc3_alt_irq;
	229
	230	int m_MMC5_rom_bank_mode;
	231	int m_MMC5_vrom_bank_mode;
	232	int m_MMC5_vram_protect;
	233	int m_MMC5_scanline;
	234	int m_vrom_page_a;
	235	int m_vrom_page_b;
	236	// int vrom_next[4];
	237
	238	UINT8 m_mmc6_reg;
	239
	240	// these might be unified in single mmc_reg[] array, together with state->m_mmc_cmd1 & state->m_mmc_cmd2
	241	// but be careful that MMC3 clones often use state->m_mmc_cmd1/state->m_mmc_cmd2 (from base MMC3) AND additional regs below!
	242	UINT8 m_mapper83_reg[10];
	243	UINT8 m_mapper83_low_reg[4];
	244	UINT8 m_txc_reg[4];   // used by mappers 132, 172 & 173
	245	UINT8 m_subor_reg[4];   // used by mappers 166 & 167
	246	UINT8 m_sachen_reg[8];   // used by mappers 137, 138, 139 & 141
	247	UINT8 m_map52_reg_written;
	248	UINT8 m_map114_reg, m_map114_reg_enabled;
	249
	250	// i/o handlers
	251	DECLARE_WRITE8_MEMBER(mapper6_l_w);
	252	DECLARE_WRITE8_MEMBER(mapper6_w);
	253	DECLARE_WRITE8_MEMBER(mapper8_w);
	254	DECLARE_WRITE8_MEMBER(mapper17_l_w);
	255	DECLARE_WRITE8_MEMBER(uxrom_w);
	256	DECLARE_WRITE8_MEMBER(uxrom_cc_w);
	257	DECLARE_WRITE8_MEMBER(un1rom_w);
	258	DECLARE_WRITE8_MEMBER(cnrom_w);
	259	DECLARE_WRITE8_MEMBER(bandai_pt554_m_w);
	260	DECLARE_WRITE8_MEMBER(cprom_w);
	261	DECLARE_WRITE8_MEMBER(axrom_w);
	262	DECLARE_WRITE8_MEMBER(bxrom_w);
	263	DECLARE_WRITE8_MEMBER(gxrom_w);
	264	DECLARE_WRITE8_MEMBER(sxrom_w);
	265	DECLARE_WRITE8_MEMBER(pxrom_w);
	266	DECLARE_WRITE8_MEMBER(fxrom_w);
	267	DECLARE_WRITE8_MEMBER(txrom_w);
	268	DECLARE_WRITE8_MEMBER(hkrom_m_w);
	269	DECLARE_READ8_MEMBER(hkrom_m_r);
	270	DECLARE_WRITE8_MEMBER(hkrom_w);
	271	DECLARE_WRITE8_MEMBER(txsrom_w);
	272	DECLARE_WRITE8_MEMBER(tqrom_w);
	273	DECLARE_WRITE8_MEMBER(zz_m_w);
	274	DECLARE_WRITE8_MEMBER(qj_m_w);
	275	DECLARE_READ8_MEMBER(exrom_l_r);
	276	DECLARE_WRITE8_MEMBER(exrom_l_w);
	277	DECLARE_WRITE8_MEMBER(ntbrom_w);
	278	DECLARE_WRITE8_MEMBER(jxrom_w);
	279	DECLARE_WRITE8_MEMBER(dxrom_w);
	280	DECLARE_WRITE8_MEMBER(namcot3453_w);
	281	DECLARE_WRITE8_MEMBER(namcot3446_w);
	282	DECLARE_WRITE8_MEMBER(namcot3425_w);
	283	DECLARE_WRITE8_MEMBER(dis_74x377_w);
	284	DECLARE_WRITE8_MEMBER(dis_74x139x74_m_w);
	285	DECLARE_WRITE8_MEMBER(dis_74x161x138_m_w);
	286	DECLARE_WRITE8_MEMBER(dis_74x161x161x32_w);
	287	DECLARE_WRITE8_MEMBER(lz93d50_w);
	288	DECLARE_WRITE8_MEMBER(lz93d50_m_w);
	289	DECLARE_WRITE8_MEMBER(fjump2_w);
	290	DECLARE_WRITE8_MEMBER(bandai_ks_w);
	291	DECLARE_WRITE8_MEMBER(bandai_ok_w);
	292	DECLARE_WRITE8_MEMBER(lrog017_w);
	293	DECLARE_WRITE8_MEMBER(irem_hd_w);
	294	DECLARE_WRITE8_MEMBER(tam_s1_w);
	295	DECLARE_WRITE8_MEMBER(g101_w);
	296	DECLARE_WRITE8_MEMBER(h3001_w);
	297	DECLARE_WRITE8_MEMBER(ss88006_w);
	298	DECLARE_WRITE8_MEMBER(jf11_m_w);
	299	DECLARE_WRITE8_MEMBER(jf13_m_w);
	300	DECLARE_WRITE8_MEMBER(jf16_w);
	301	DECLARE_WRITE8_MEMBER(jf17_w);
	302	DECLARE_WRITE8_MEMBER(jf19_w);
	303	DECLARE_WRITE8_MEMBER(konami_vrc1_w);
	304	DECLARE_WRITE8_MEMBER(konami_vrc2_w);
	305	DECLARE_WRITE8_MEMBER(konami_vrc3_w);
	306	DECLARE_WRITE8_MEMBER(konami_vrc4_w);
	307	DECLARE_WRITE8_MEMBER(konami_vrc6_w);
	308	DECLARE_WRITE8_MEMBER(konami_vrc7_w);
	309	DECLARE_WRITE8_MEMBER(namcot163_l_w);
	310	DECLARE_READ8_MEMBER(namcot163_l_r);
	311	DECLARE_WRITE8_MEMBER(namcot163_w);
	312	DECLARE_WRITE8_MEMBER(sunsoft1_m_w);
	313	DECLARE_WRITE8_MEMBER(sunsoft2_w);
	314	DECLARE_WRITE8_MEMBER(sunsoft3_w);
	315	DECLARE_WRITE8_MEMBER(tc0190fmc_w);
	316	DECLARE_WRITE8_MEMBER(tc0190fmc_p16_w);
	317	DECLARE_WRITE8_MEMBER(x1005_m_w);
	318	DECLARE_READ8_MEMBER(x1005_m_r);
	319	DECLARE_WRITE8_MEMBER(x1005a_m_w);
	320	DECLARE_WRITE8_MEMBER(x1017_m_w);
	321	DECLARE_READ8_MEMBER(x1017_m_r);
	322	DECLARE_WRITE8_MEMBER(agci_50282_w);
	323	DECLARE_WRITE8_MEMBER(nina01_m_w);
	324	DECLARE_WRITE8_MEMBER(nina06_l_w);
	325	DECLARE_WRITE8_MEMBER(ae_act52_w);
	326	DECLARE_WRITE8_MEMBER(cne_decathl_w);
	327	DECLARE_WRITE8_MEMBER(cne_fsb_m_w);
	328	DECLARE_WRITE8_MEMBER(cne_shlz_l_w);
	329	DECLARE_WRITE8_MEMBER(caltron6in1_m_w);
	330	DECLARE_WRITE8_MEMBER(caltron6in1_w);
	331	DECLARE_WRITE8_MEMBER(bf9093_w);
	332	DECLARE_WRITE8_MEMBER(bf9096_w);
	333	DECLARE_WRITE8_MEMBER(golden5_w);
	334	DECLARE_WRITE8_MEMBER(cony_l_w);
	335	DECLARE_READ8_MEMBER(cony_l_r);
	336	DECLARE_WRITE8_MEMBER(cony_w);
	337	DECLARE_WRITE8_MEMBER(yoko_l_w);
	338	DECLARE_READ8_MEMBER(yoko_l_r);
	339	DECLARE_WRITE8_MEMBER(yoko_w);
	340	DECLARE_WRITE8_MEMBER(dreamtech_l_w);
	341	DECLARE_WRITE8_MEMBER(fukutake_l_w);
	342	DECLARE_READ8_MEMBER(fukutake_l_r);
	343	DECLARE_WRITE8_MEMBER(futuremedia_w);
	344	DECLARE_WRITE8_MEMBER(gouder_sf4_l_w);
	345	DECLARE_READ8_MEMBER(gouder_sf4_l_r);
	346	DECLARE_WRITE8_MEMBER(henggedianzi_w);
	347	DECLARE_WRITE8_MEMBER(heng_xjzb_l_w);
	348	DECLARE_WRITE8_MEMBER(heng_xjzb_w);
	349	DECLARE_WRITE8_MEMBER(hes6in1_l_w);
	350	DECLARE_WRITE8_MEMBER(hes_l_w);
	351	DECLARE_WRITE8_MEMBER(hosenkan_w);
	352	DECLARE_WRITE8_MEMBER(ks7058_w);
	353	DECLARE_WRITE8_MEMBER(ks7022_w);
	354	DECLARE_READ8_MEMBER(ks7022_r);
	355	DECLARE_WRITE8_MEMBER(ks7032_w);
	356	DECLARE_WRITE8_MEMBER(ks202_w);
	357	DECLARE_WRITE8_MEMBER(ks7017_l_w);
	358	DECLARE_WRITE8_MEMBER(ks7017_extra_w);
	359	DECLARE_READ8_MEMBER(ks7017_extra_r);
	360	DECLARE_WRITE8_MEMBER(kay_pp_l_w);
	361	DECLARE_READ8_MEMBER(kay_pp_l_r);
	362	DECLARE_WRITE8_MEMBER(kay_pp_w);
	363	DECLARE_WRITE8_MEMBER(kasing_m_w);
	364	DECLARE_WRITE8_MEMBER(magics_md_w);
	365	DECLARE_WRITE8_MEMBER(nanjing_l_w);
	366	DECLARE_READ8_MEMBER(nanjing_l_r);
	367	DECLARE_WRITE8_MEMBER(nitra_w);
	368	DECLARE_WRITE8_MEMBER(ntdec_asder_w);
	369	DECLARE_WRITE8_MEMBER(ntdec_fh_m_w);
	370	DECLARE_WRITE8_MEMBER(daou306_w);
	371	DECLARE_WRITE8_MEMBER(gs2015_w);
	372	DECLARE_WRITE8_MEMBER(rcm_tf_w);
	373	DECLARE_WRITE8_MEMBER(rex_dbz_l_w);
	374	DECLARE_READ8_MEMBER(rex_dbz_l_r);
	375	DECLARE_WRITE8_MEMBER(rex_sl1632_w);
	376	DECLARE_WRITE8_MEMBER(rumblestation_m_w);
	377	DECLARE_WRITE8_MEMBER(rumblestation_w);
	378	DECLARE_WRITE8_MEMBER(sachen_74x374_l_w);
	379	DECLARE_READ8_MEMBER(sachen_74x374_l_r);
	380	DECLARE_WRITE8_MEMBER(sachen_74x374a_l_w);
	381	DECLARE_WRITE8_MEMBER(s8259_l_w);
	382	DECLARE_WRITE8_MEMBER(s8259_m_w);
	383	DECLARE_WRITE8_MEMBER(sa009_l_w);
	384	DECLARE_WRITE8_MEMBER(sa0036_w);
	385	DECLARE_WRITE8_MEMBER(sa0037_w);
	386	DECLARE_WRITE8_MEMBER(sa72007_l_w);
	387	DECLARE_WRITE8_MEMBER(sa72008_l_w);
	388	DECLARE_READ8_MEMBER(tca01_l_r);
	389	DECLARE_WRITE8_MEMBER(tcu01_l_w);
	390	DECLARE_WRITE8_MEMBER(tcu01_m_w);
	391	DECLARE_WRITE8_MEMBER(tcu01_w);
	392	DECLARE_WRITE8_MEMBER(tcu02_l_w);
	393	DECLARE_READ8_MEMBER(tcu02_l_r);
	394	DECLARE_WRITE8_MEMBER(subor0_w);
	395	DECLARE_WRITE8_MEMBER(subor1_w);
	396	DECLARE_WRITE8_MEMBER(sgame_boog_l_w);
	397	DECLARE_WRITE8_MEMBER(sgame_boog_m_w);
	398	DECLARE_WRITE8_MEMBER(sgame_boog_w);
	399	DECLARE_WRITE8_MEMBER(sgame_lion_m_w);
	400	DECLARE_WRITE8_MEMBER(sgame_lion_w);
	401	DECLARE_WRITE8_MEMBER(tengen_800008_w);
	402	DECLARE_WRITE8_MEMBER(tengen_800032_w);
	403	DECLARE_WRITE8_MEMBER(tengen_800037_w);
	404	DECLARE_WRITE8_MEMBER(txc_22211_l_w);
	405	DECLARE_READ8_MEMBER(txc_22211_l_r);
	406	DECLARE_WRITE8_MEMBER(txc_22211_w);
	407	DECLARE_WRITE8_MEMBER(txc_22211b_w);
	408	DECLARE_READ8_MEMBER(txc_22211c_l_r);
	409	DECLARE_WRITE8_MEMBER(txc_tw_l_w);
	410	DECLARE_WRITE8_MEMBER(txc_tw_m_w);
	411	DECLARE_WRITE8_MEMBER(txc_strikewolf_w);
	412	DECLARE_READ8_MEMBER(txc_mxmdhtwo_l_r);
	413	DECLARE_WRITE8_MEMBER(txc_mxmdhtwo_w);
	414	DECLARE_WRITE8_MEMBER(waixing_a_w);
	415	DECLARE_WRITE8_MEMBER(waixing_f_w);
	416	DECLARE_WRITE8_MEMBER(waixing_g_w);
	417	DECLARE_WRITE8_MEMBER(waixing_h_w);
	418	DECLARE_WRITE8_MEMBER(waixing_sgz_w);
	419	DECLARE_WRITE8_MEMBER(waixing_sgzlz_l_w);
	420	DECLARE_WRITE8_MEMBER(waixing_ffv_l_w);
	421	DECLARE_WRITE8_MEMBER(waixing_zs_w);
	422	DECLARE_WRITE8_MEMBER(waixing_dq8_w);
	423	DECLARE_WRITE8_MEMBER(waixing_ps2_w);
	424	DECLARE_WRITE8_MEMBER(waixing_sec_l_w);
	425	DECLARE_READ8_MEMBER(waixing_sh2_chr_r);
	426	DECLARE_WRITE8_MEMBER(unl_8237_l_w);
	427	DECLARE_WRITE8_MEMBER(unl_8237_w);
	428	DECLARE_WRITE8_MEMBER(unl_ax5705_w);
	429	DECLARE_WRITE8_MEMBER(unl_cc21_w);
	430	DECLARE_WRITE8_MEMBER(unl_kof97_w);
	431	DECLARE_WRITE8_MEMBER(ks7057_w);
	432	DECLARE_WRITE8_MEMBER(unl_t230_w);
	433	DECLARE_WRITE8_MEMBER(kof96_l_w);
	434	DECLARE_READ8_MEMBER(kof96_l_r);
	435	DECLARE_WRITE8_MEMBER(kof96_w);
	436	DECLARE_WRITE8_MEMBER(mk2_m_w);
	437	DECLARE_WRITE8_MEMBER(n625092_w);
	438	DECLARE_WRITE8_MEMBER(sc127_w);
	439	DECLARE_WRITE8_MEMBER(smb2j_w);
	440	DECLARE_WRITE8_MEMBER(smb2jb_l_w);
	441	DECLARE_WRITE8_MEMBER(smb2jb_extra_w);
	442	DECLARE_WRITE8_MEMBER(unl_sf3_w);
	443	DECLARE_WRITE8_MEMBER(unl_xzy_l_w);
	444	DECLARE_WRITE8_MEMBER(unl_racmate_w);
	445	DECLARE_WRITE8_MEMBER(unl_fs304_l_w);
	446	DECLARE_WRITE8_MEMBER(btl_smb11_w);
	447	DECLARE_WRITE8_MEMBER(btl_mariobaby_w);
	448	DECLARE_WRITE8_MEMBER(btl_smb2a_w);
	449	DECLARE_WRITE8_MEMBER(whirl2706_w);
	450	DECLARE_WRITE8_MEMBER(btl_tobi_l_w);
	451	DECLARE_WRITE8_MEMBER(btl_smb3_w);
	452	DECLARE_WRITE8_MEMBER(btl_dn_w);
	453	DECLARE_WRITE8_MEMBER(btl_pika_y2k_w);
	454	DECLARE_WRITE8_MEMBER(btl_pika_y2k_m_w);
	455	DECLARE_READ8_MEMBER(btl_pika_y2k_m_r);
	456	DECLARE_WRITE8_MEMBER(fk23c_l_w);
	457	DECLARE_WRITE8_MEMBER(fk23c_w);
	458	DECLARE_WRITE8_MEMBER(bmc_64in1nr_l_w);
	459	DECLARE_WRITE8_MEMBER(bmc_64in1nr_w);
	460	DECLARE_WRITE8_MEMBER(bmc_190in1_w);
	461	DECLARE_WRITE8_MEMBER(bmc_a65as_w);
	462	DECLARE_WRITE8_MEMBER(bmc_gs2004_w);
	463	DECLARE_WRITE8_MEMBER(bmc_gs2013_w);
	464	DECLARE_WRITE8_MEMBER(bmc_s24in1sc03_l_w);
	465	DECLARE_WRITE8_MEMBER(bmc_t262_w);
	466	DECLARE_WRITE8_MEMBER(bmc_ws_m_w);
	467	DECLARE_WRITE8_MEMBER(novel1_w);
	468	DECLARE_WRITE8_MEMBER(novel2_w);
	469	DECLARE_WRITE8_MEMBER(bmc_gka_w);
	470	DECLARE_WRITE8_MEMBER(sng32_w);
	471	DECLARE_WRITE8_MEMBER(bmc_gkb_w);
	472	DECLARE_WRITE8_MEMBER(bmc_super700in1_w);
	473	DECLARE_WRITE8_MEMBER(bmc_36in1_w);
	474	DECLARE_WRITE8_MEMBER(bmc_21in1_w);
	475	DECLARE_WRITE8_MEMBER(bmc_150in1_w);
	476	DECLARE_WRITE8_MEMBER(bmc_35in1_w);
	477	DECLARE_WRITE8_MEMBER(bmc_64in1_w);
	478	DECLARE_WRITE8_MEMBER(bmc_15in1_m_w);
	479	DECLARE_WRITE8_MEMBER(bmc_hik300_w);
	480	DECLARE_WRITE8_MEMBER(supergun20in1_w);
	481	DECLARE_WRITE8_MEMBER(bmc_72in1_w);
	482	DECLARE_WRITE8_MEMBER(bmc_76in1_w);
	483	DECLARE_WRITE8_MEMBER(bmc_1200in1_w);
	484	DECLARE_WRITE8_MEMBER(bmc_31in1_w);
	485	DECLARE_WRITE8_MEMBER(bmc_22g_w);
	486	DECLARE_WRITE8_MEMBER(bmc_20in1_w);
	487	DECLARE_WRITE8_MEMBER(bmc_110in1_w);
	488	DECLARE_WRITE8_MEMBER(bmc_sbig7_w);
	489	DECLARE_WRITE8_MEMBER(bmc_hik8_m_w);
	490	DECLARE_WRITE8_MEMBER(bmc_hik4in1_m_w);
	491	DECLARE_WRITE8_MEMBER(bmc_ball11_m_w);
	492	DECLARE_WRITE8_MEMBER(bmc_ball11_w);
	493	DECLARE_WRITE8_MEMBER(bmc_mario7in1_m_w);
	494	DECLARE_WRITE8_MEMBER(bmc_gold7in1_m_w);
	495	DECLARE_WRITE8_MEMBER(bmc_gc6in1_l_w);
	496	DECLARE_WRITE8_MEMBER(bmc_gc6in1_w);
	497	DECLARE_WRITE8_MEMBER(bmc_family4646_m_w);
	498	DECLARE_WRITE8_MEMBER(bmc_vt5201_w);
	499	DECLARE_READ8_MEMBER(bmc_vt5201_r);
	500	DECLARE_WRITE8_MEMBER(bmc_bs5_w);
	501	DECLARE_WRITE8_MEMBER(bmc_810544_w);
	502	DECLARE_WRITE8_MEMBER(bmc_ntd03_w);
	503	DECLARE_WRITE8_MEMBER(bmc_gb63_w);
	504	DECLARE_READ8_MEMBER(bmc_gb63_r);
	505	DECLARE_WRITE8_MEMBER(edu2k_w);
	506	DECLARE_WRITE8_MEMBER(h2288_l_w);
	507	DECLARE_READ8_MEMBER(h2288_l_r);
	508	DECLARE_WRITE8_MEMBER(h2288_w);
	509	DECLARE_WRITE8_MEMBER(shjy3_w);
	510	DECLARE_WRITE8_MEMBER(unl_6035052_extra_w);
	511	DECLARE_READ8_MEMBER(unl_6035052_extra_r);
	512	DECLARE_WRITE8_MEMBER(pjoy84_m_w);
	513	DECLARE_WRITE8_MEMBER(someri_mmc1_w);
	514	DECLARE_WRITE8_MEMBER(someri_mmc3_w);
	515	DECLARE_WRITE8_MEMBER(someri_vrc2_w);
	516	DECLARE_WRITE8_MEMBER(someri_w);
	517	DECLARE_WRITE8_MEMBER(someri_l_w);
	518	DECLARE_WRITE8_MEMBER(fujiya_m_w);
	519	DECLARE_READ8_MEMBER(fujiya_m_r);
	520	DECLARE_WRITE8_MEMBER(dummy_l_w);
	521	DECLARE_WRITE8_MEMBER(dummy_m_w);
	522	DECLARE_WRITE8_MEMBER(dummy_w);
	523	DECLARE_READ8_MEMBER(dummy_l_r);
	524	DECLARE_READ8_MEMBER(dummy_m_r);
	525	DECLARE_READ8_MEMBER(dummy_r);
	526
	527	UINT8      *m_wram;
	528	UINT8      *m_battery_ram;
	529	UINT8      *m_mapper_ram;
	530	UINT8      *m_mapper_bram;
	531	UINT32      m_mapper_ram_size;
	532	UINT32      m_mapper_bram_size;
	533
	534	/* load-time cart variables which remain constant */
	535	UINT16 m_prg_chunks;      // iNES 2.0 allows for more chunks (a recently dumped multigame cart has 256 chunks of both PRG & CHR!)
	536	UINT16 m_chr_chunks;
	537	UINT16 m_vram_chunks;
	538	UINT8 m_trainer;
	539	UINT8 m_battery;         // if there is PRG RAM with battery backup
	540	UINT32 m_battery_size;
	541	UINT8 m_prg_ram;         // if there is PRG RAM with no backup
	542	UINT32 m_wram_size;
	543
	544	/* system variables which don't change at run-time */
	545	UINT16 m_mapper;      // for iNES
	546	UINT16 m_pcb_id;      // for UNIF & xml
	547	UINT8 m_four_screen_vram;
	548	UINT8 m_hard_mirroring;
	549	UINT8 m_crc_hack;   // this is needed to detect different boards sharing the same Mappers (shame on .nes format)
	550	UINT8 m_ines20;
	551
	552	// things below are included here for the moment, even if probably would better fit nes_state
	553	// to allow compilation while progressing with the work
	554
	555	/* devices */
	556	cpu_device        *m_maincpu;
	557	ppu2c0x_device    *m_ppu;
	558	device_t          *m_sound;
	559	emu_timer         *m_irq_timer;
	560	};
	561
	562
	563
	564	#endif

trunk/src/mess/includes/nes.h

r18072	r18073
9	9	#ifndef NES_H_
10	10	#define NES_H_
11	11
	12	#include "includes/nes_mmc.h"
12	13
	14
13	15	/***************************************************************************
14	16	CONSTANTS
15	17	***************************************************************************/
r18072	r18073
35	37	#define CHRROM 0
36	38	#define CHRRAM 1
37	39
38		struct chr_bank
39		{
40		int source;   //defines source of base pointer
41		int origin; //defines offset of 0x400 byte segment at base pointer
42		UINT8* access;   //source translated + origin -> valid pointer!
43		};
44	40
45	41	/*PPU nametable fast banking constants and structures */
46	42
r18072	r18073
53	49	#define NES_BATTERY 0
54	50	#define NES_WRAM 1
55	51
56		struct name_table
57		{
58		int source;      /* defines source of base pointer */
59		int origin;      /* defines offset of 0x400 byte segment at base pointer */
60		int writable;   /* ExRAM, at least, can be write-protected AND used as nametable */
61		UINT8* access;   /* direct access when possible */
62		};
63	52
64		typedef void (*nes_prg_callback)(running_machine &machine, int start, int bank);
65		typedef void (*nes_chr_callback)(running_machine &machine, int start, int bank, int source);
66
67		class nes_carts_state : public driver_device
68		{
69		public:
70		nes_carts_state(const machine_config &mconfig, device_type type, const char *tag)
71		: driver_device(mconfig, type, tag) { }
72
73		int           m_prg_bank[5];
74		chr_bank      m_chr_map[8];  //quick banking structure, because some of this changes multiple times per scanline!
75		name_table    m_nt_page[4];  //quick banking structure for a maximum of 4K of RAM/ROM/ExRAM
76
77		nes_prg_callback    m_mmc3_prg_cb;   // these are used to simplify a lot emulation of some MMC3 pirate clones
78		nes_chr_callback    m_mmc3_chr_cb;
79
80		int m_chr_open_bus;
81		int m_prgram_bank5_start, m_battery_bank5_start, m_empty_bank5_start;
82
83		UINT8 m_ce_mask, m_ce_state;
84		UINT8 m_vrc_ls_prg_a, m_vrc_ls_prg_b, m_vrc_ls_chr;
85
86		int m_MMC5_floodtile;
87		int m_MMC5_floodattr;
88		int m_mmc5_vram_control;
89		UINT8 m_mmc5_high_chr;
90		UINT8 m_mmc5_split_scr;
91		UINT8 *m_extended_ntram;
92
93		UINT8 m_mmc5_last_chr_a;
94		UINT16 m_mmc5_vrom_regA[8];
95		UINT16 m_mmc5_vrom_regB[4];
96		UINT8 m_mmc5_prg_regs[4];
97		UINT8 m_mmc5_bank_security;
98		UINT8 m_mmc5_prg_mode;
99		UINT8 m_mmc5_chr_mode;
100		UINT8 m_mmc5_chr_high;
101		UINT8 m_mmc5_split_ctrl;
102		UINT8 m_mmc5_split_yst;
103		UINT8 m_mmc5_split_bank;
104
105		/***** Mapper-related variables *****/
106
107		// common ones
108		int        m_IRQ_enable, m_IRQ_enable_latch;
109		UINT16     m_IRQ_count, m_IRQ_count_latch;
110		UINT8      m_IRQ_toggle;
111		UINT8      m_IRQ_reset;
112		UINT8      m_IRQ_status;
113		UINT8      m_IRQ_mode;
114		UINT8      m_IRQ_clear;
115		int        m_mult1, m_mult2;
116
117		UINT8 m_mmc_chr_source;         // This is set at init to CHRROM or CHRRAM. a few mappers can swap between
118		// the two (this is done in the specific handlers).
119
120		UINT8 m_mmc_cmd1, m_mmc_cmd2;      // These represent registers where the mapper writes important values
121		UINT8 m_mmc_count;            // This is used as counter in mappers like 1 and 45
122
123		int m_mmc_prg_base, m_mmc_prg_mask;   // MMC3 based multigame carts select a block of banks by using these (and then act like normal MMC3),
124		int m_mmc_chr_base, m_mmc_chr_mask;   // while MMC3 and clones (mapper 118 & 119) simply set them as 0 and 0xff resp.
125
126		UINT8 m_mmc_prg_bank[6];            // Many mappers writes only some bits of the selected bank (for both PRG and CHR),
127		UINT8 m_mmc_vrom_bank[16];         // hence these are handy to latch bank values.
128
129		UINT16 m_MMC5_vrom_bank[12];         // MMC5 has 10bit wide VROM regs!
130		UINT8 m_mmc_extra_bank[16];         // some MMC3 clone have 2 series of PRG/CHR banks...
131		// we collect them all here: first 4 elements PRG banks, then 6/8 CHR banks
132
133		UINT8 m_mmc_latch1, m_mmc_latch2;
134		UINT8 m_mmc_reg[16];
135
136		UINT8 m_mmc_dipsetting;
137
138		// misc mapper related variables which should be merged with the above one, where possible
139		int m_mmc1_reg_write_enable;
140		int m_mmc1_latch;
141		int m_mmc1_count;
142
143		int m_mmc3_latch;
144		int m_mmc3_wram_protect;
145		int m_mmc3_alt_irq;
146
147		int m_MMC5_rom_bank_mode;
148		int m_MMC5_vrom_bank_mode;
149		int m_MMC5_vram_protect;
150		int m_MMC5_scanline;
151		int m_vrom_page_a;
152		int m_vrom_page_b;
153		// int vrom_next[4];
154
155		UINT8 m_mmc6_reg;
156
157		// these might be unified in single mmc_reg[] array, together with state->m_mmc_cmd1 & state->m_mmc_cmd2
158		// but be careful that MMC3 clones often use state->m_mmc_cmd1/state->m_mmc_cmd2 (from base MMC3) AND additional regs below!
159		UINT8 m_mapper83_reg[10];
160		UINT8 m_mapper83_low_reg[4];
161		UINT8 m_txc_reg[4];   // used by mappers 132, 172 & 173
162		UINT8 m_subor_reg[4];   // used by mappers 166 & 167
163		UINT8 m_sachen_reg[8];   // used by mappers 137, 138, 139 & 141
164		UINT8 m_map52_reg_written;
165		UINT8 m_map114_reg, m_map114_reg_enabled;
166
167		// i/o handlers
168		DECLARE_WRITE8_MEMBER(mapper6_l_w);
169		DECLARE_WRITE8_MEMBER(mapper6_w);
170		DECLARE_WRITE8_MEMBER(mapper8_w);
171		DECLARE_WRITE8_MEMBER(mapper17_l_w);
172		DECLARE_WRITE8_MEMBER(uxrom_w);
173		DECLARE_WRITE8_MEMBER(uxrom_cc_w);
174		DECLARE_WRITE8_MEMBER(un1rom_w);
175		DECLARE_WRITE8_MEMBER(cnrom_w);
176		DECLARE_WRITE8_MEMBER(bandai_pt554_m_w);
177		DECLARE_WRITE8_MEMBER(cprom_w);
178		DECLARE_WRITE8_MEMBER(axrom_w);
179		DECLARE_WRITE8_MEMBER(bxrom_w);
180		DECLARE_WRITE8_MEMBER(gxrom_w);
181		DECLARE_WRITE8_MEMBER(sxrom_w);
182		DECLARE_WRITE8_MEMBER(pxrom_w);
183		DECLARE_WRITE8_MEMBER(fxrom_w);
184		DECLARE_WRITE8_MEMBER(txrom_w);
185		DECLARE_WRITE8_MEMBER(hkrom_m_w);
186		DECLARE_READ8_MEMBER(hkrom_m_r);
187		DECLARE_WRITE8_MEMBER(hkrom_w);
188		DECLARE_WRITE8_MEMBER(txsrom_w);
189		DECLARE_WRITE8_MEMBER(tqrom_w);
190		DECLARE_WRITE8_MEMBER(zz_m_w);
191		DECLARE_WRITE8_MEMBER(qj_m_w);
192		DECLARE_READ8_MEMBER(exrom_l_r);
193		DECLARE_WRITE8_MEMBER(exrom_l_w);
194		DECLARE_WRITE8_MEMBER(ntbrom_w);
195		DECLARE_WRITE8_MEMBER(jxrom_w);
196		DECLARE_WRITE8_MEMBER(dxrom_w);
197		DECLARE_WRITE8_MEMBER(namcot3453_w);
198		DECLARE_WRITE8_MEMBER(namcot3446_w);
199		DECLARE_WRITE8_MEMBER(namcot3425_w);
200		DECLARE_WRITE8_MEMBER(dis_74x377_w);
201		DECLARE_WRITE8_MEMBER(dis_74x139x74_m_w);
202		DECLARE_WRITE8_MEMBER(dis_74x161x138_m_w);
203		DECLARE_WRITE8_MEMBER(dis_74x161x161x32_w);
204		DECLARE_WRITE8_MEMBER(lz93d50_w);
205		DECLARE_WRITE8_MEMBER(lz93d50_m_w);
206		DECLARE_WRITE8_MEMBER(fjump2_w);
207		DECLARE_WRITE8_MEMBER(bandai_ks_w);
208		DECLARE_WRITE8_MEMBER(bandai_ok_w);
209		DECLARE_WRITE8_MEMBER(lrog017_w);
210		DECLARE_WRITE8_MEMBER(irem_hd_w);
211		DECLARE_WRITE8_MEMBER(tam_s1_w);
212		DECLARE_WRITE8_MEMBER(g101_w);
213		DECLARE_WRITE8_MEMBER(h3001_w);
214		DECLARE_WRITE8_MEMBER(ss88006_w);
215		DECLARE_WRITE8_MEMBER(jf11_m_w);
216		DECLARE_WRITE8_MEMBER(jf13_m_w);
217		DECLARE_WRITE8_MEMBER(jf16_w);
218		DECLARE_WRITE8_MEMBER(jf17_w);
219		DECLARE_WRITE8_MEMBER(jf19_w);
220		DECLARE_WRITE8_MEMBER(konami_vrc1_w);
221		DECLARE_WRITE8_MEMBER(konami_vrc2_w);
222		DECLARE_WRITE8_MEMBER(konami_vrc3_w);
223		DECLARE_WRITE8_MEMBER(konami_vrc4_w);
224		DECLARE_WRITE8_MEMBER(konami_vrc6_w);
225		DECLARE_WRITE8_MEMBER(konami_vrc7_w);
226		DECLARE_WRITE8_MEMBER(namcot163_l_w);
227		DECLARE_READ8_MEMBER(namcot163_l_r);
228		DECLARE_WRITE8_MEMBER(namcot163_w);
229		DECLARE_WRITE8_MEMBER(sunsoft1_m_w);
230		DECLARE_WRITE8_MEMBER(sunsoft2_w);
231		DECLARE_WRITE8_MEMBER(sunsoft3_w);
232		DECLARE_WRITE8_MEMBER(tc0190fmc_w);
233		DECLARE_WRITE8_MEMBER(tc0190fmc_p16_w);
234		DECLARE_WRITE8_MEMBER(x1005_m_w);
235		DECLARE_READ8_MEMBER(x1005_m_r);
236		DECLARE_WRITE8_MEMBER(x1005a_m_w);
237		DECLARE_WRITE8_MEMBER(x1017_m_w);
238		DECLARE_READ8_MEMBER(x1017_m_r);
239		DECLARE_WRITE8_MEMBER(agci_50282_w);
240		DECLARE_WRITE8_MEMBER(nina01_m_w);
241		DECLARE_WRITE8_MEMBER(nina06_l_w);
242		DECLARE_WRITE8_MEMBER(ae_act52_w);
243		DECLARE_WRITE8_MEMBER(cne_decathl_w);
244		DECLARE_WRITE8_MEMBER(cne_fsb_m_w);
245		DECLARE_WRITE8_MEMBER(cne_shlz_l_w);
246		DECLARE_WRITE8_MEMBER(caltron6in1_m_w);
247		DECLARE_WRITE8_MEMBER(caltron6in1_w);
248		DECLARE_WRITE8_MEMBER(bf9093_w);
249		DECLARE_WRITE8_MEMBER(bf9096_w);
250		DECLARE_WRITE8_MEMBER(golden5_w);
251		DECLARE_WRITE8_MEMBER(cony_l_w);
252		DECLARE_READ8_MEMBER(cony_l_r);
253		DECLARE_WRITE8_MEMBER(cony_w);
254		DECLARE_WRITE8_MEMBER(yoko_l_w);
255		DECLARE_READ8_MEMBER(yoko_l_r);
256		DECLARE_WRITE8_MEMBER(yoko_w);
257		DECLARE_WRITE8_MEMBER(dreamtech_l_w);
258		DECLARE_WRITE8_MEMBER(fukutake_l_w);
259		DECLARE_READ8_MEMBER(fukutake_l_r);
260		DECLARE_WRITE8_MEMBER(futuremedia_w);
261		DECLARE_WRITE8_MEMBER(gouder_sf4_l_w);
262		DECLARE_READ8_MEMBER(gouder_sf4_l_r);
263		DECLARE_WRITE8_MEMBER(henggedianzi_w);
264		DECLARE_WRITE8_MEMBER(heng_xjzb_l_w);
265		DECLARE_WRITE8_MEMBER(heng_xjzb_w);
266		DECLARE_WRITE8_MEMBER(hes6in1_l_w);
267		DECLARE_WRITE8_MEMBER(hes_l_w);
268		DECLARE_WRITE8_MEMBER(hosenkan_w);
269		DECLARE_WRITE8_MEMBER(ks7058_w);
270		DECLARE_WRITE8_MEMBER(ks7022_w);
271		DECLARE_READ8_MEMBER(ks7022_r);
272		DECLARE_WRITE8_MEMBER(ks7032_w);
273		DECLARE_WRITE8_MEMBER(ks202_w);
274		DECLARE_WRITE8_MEMBER(ks7017_l_w);
275		DECLARE_WRITE8_MEMBER(ks7017_extra_w);
276		DECLARE_READ8_MEMBER(ks7017_extra_r);
277		DECLARE_WRITE8_MEMBER(kay_pp_l_w);
278		DECLARE_READ8_MEMBER(kay_pp_l_r);
279		DECLARE_WRITE8_MEMBER(kay_pp_w);
280		DECLARE_WRITE8_MEMBER(kasing_m_w);
281		DECLARE_WRITE8_MEMBER(magics_md_w);
282		DECLARE_WRITE8_MEMBER(nanjing_l_w);
283		DECLARE_READ8_MEMBER(nanjing_l_r);
284		DECLARE_WRITE8_MEMBER(nitra_w);
285		DECLARE_WRITE8_MEMBER(ntdec_asder_w);
286		DECLARE_WRITE8_MEMBER(ntdec_fh_m_w);
287		DECLARE_WRITE8_MEMBER(daou306_w);
288		DECLARE_WRITE8_MEMBER(gs2015_w);
289		DECLARE_WRITE8_MEMBER(rcm_tf_w);
290		DECLARE_WRITE8_MEMBER(rex_dbz_l_w);
291		DECLARE_READ8_MEMBER(rex_dbz_l_r);
292		DECLARE_WRITE8_MEMBER(rex_sl1632_w);
293		DECLARE_WRITE8_MEMBER(rumblestation_m_w);
294		DECLARE_WRITE8_MEMBER(rumblestation_w);
295		DECLARE_WRITE8_MEMBER(sachen_74x374_l_w);
296		DECLARE_READ8_MEMBER(sachen_74x374_l_r);
297		DECLARE_WRITE8_MEMBER(sachen_74x374a_l_w);
298		DECLARE_WRITE8_MEMBER(s8259_l_w);
299		DECLARE_WRITE8_MEMBER(s8259_m_w);
300		DECLARE_WRITE8_MEMBER(sa009_l_w);
301		DECLARE_WRITE8_MEMBER(sa0036_w);
302		DECLARE_WRITE8_MEMBER(sa0037_w);
303		DECLARE_WRITE8_MEMBER(sa72007_l_w);
304		DECLARE_WRITE8_MEMBER(sa72008_l_w);
305		DECLARE_READ8_MEMBER(tca01_l_r);
306		DECLARE_WRITE8_MEMBER(tcu01_l_w);
307		DECLARE_WRITE8_MEMBER(tcu01_m_w);
308		DECLARE_WRITE8_MEMBER(tcu01_w);
309		DECLARE_WRITE8_MEMBER(tcu02_l_w);
310		DECLARE_READ8_MEMBER(tcu02_l_r);
311		DECLARE_WRITE8_MEMBER(subor0_w);
312		DECLARE_WRITE8_MEMBER(subor1_w);
313		DECLARE_WRITE8_MEMBER(sgame_boog_l_w);
314		DECLARE_WRITE8_MEMBER(sgame_boog_m_w);
315		DECLARE_WRITE8_MEMBER(sgame_boog_w);
316		DECLARE_WRITE8_MEMBER(sgame_lion_m_w);
317		DECLARE_WRITE8_MEMBER(sgame_lion_w);
318		DECLARE_WRITE8_MEMBER(tengen_800008_w);
319		DECLARE_WRITE8_MEMBER(tengen_800032_w);
320		DECLARE_WRITE8_MEMBER(tengen_800037_w);
321		DECLARE_WRITE8_MEMBER(txc_22211_l_w);
322		DECLARE_READ8_MEMBER(txc_22211_l_r);
323		DECLARE_WRITE8_MEMBER(txc_22211_w);
324		DECLARE_WRITE8_MEMBER(txc_22211b_w);
325		DECLARE_READ8_MEMBER(txc_22211c_l_r);
326		DECLARE_WRITE8_MEMBER(txc_tw_l_w);
327		DECLARE_WRITE8_MEMBER(txc_tw_m_w);
328		DECLARE_WRITE8_MEMBER(txc_strikewolf_w);
329		DECLARE_READ8_MEMBER(txc_mxmdhtwo_l_r);
330		DECLARE_WRITE8_MEMBER(txc_mxmdhtwo_w);
331		DECLARE_WRITE8_MEMBER(waixing_a_w);
332		DECLARE_WRITE8_MEMBER(waixing_f_w);
333		DECLARE_WRITE8_MEMBER(waixing_g_w);
334		DECLARE_WRITE8_MEMBER(waixing_h_w);
335		DECLARE_WRITE8_MEMBER(waixing_sgz_w);
336		DECLARE_WRITE8_MEMBER(waixing_sgzlz_l_w);
337		DECLARE_WRITE8_MEMBER(waixing_ffv_l_w);
338		DECLARE_WRITE8_MEMBER(waixing_zs_w);
339		DECLARE_WRITE8_MEMBER(waixing_dq8_w);
340		DECLARE_WRITE8_MEMBER(waixing_ps2_w);
341		DECLARE_WRITE8_MEMBER(waixing_sec_l_w);
342		DECLARE_READ8_MEMBER(waixing_sh2_chr_r);
343		DECLARE_WRITE8_MEMBER(unl_8237_l_w);
344		DECLARE_WRITE8_MEMBER(unl_8237_w);
345		DECLARE_WRITE8_MEMBER(unl_ax5705_w);
346		DECLARE_WRITE8_MEMBER(unl_cc21_w);
347		DECLARE_WRITE8_MEMBER(unl_kof97_w);
348		DECLARE_WRITE8_MEMBER(ks7057_w);
349		DECLARE_WRITE8_MEMBER(unl_t230_w);
350		DECLARE_WRITE8_MEMBER(kof96_l_w);
351		DECLARE_READ8_MEMBER(kof96_l_r);
352		DECLARE_WRITE8_MEMBER(kof96_w);
353		DECLARE_WRITE8_MEMBER(mk2_m_w);
354		DECLARE_WRITE8_MEMBER(n625092_w);
355		DECLARE_WRITE8_MEMBER(sc127_w);
356		DECLARE_WRITE8_MEMBER(smb2j_w);
357		DECLARE_WRITE8_MEMBER(smb2jb_l_w);
358		DECLARE_WRITE8_MEMBER(smb2jb_extra_w);
359		DECLARE_WRITE8_MEMBER(unl_sf3_w);
360		DECLARE_WRITE8_MEMBER(unl_xzy_l_w);
361		DECLARE_WRITE8_MEMBER(unl_racmate_w);
362		DECLARE_WRITE8_MEMBER(unl_fs304_l_w);
363		DECLARE_WRITE8_MEMBER(btl_smb11_w);
364		DECLARE_WRITE8_MEMBER(btl_mariobaby_w);
365		DECLARE_WRITE8_MEMBER(btl_smb2a_w);
366		DECLARE_WRITE8_MEMBER(whirl2706_w);
367		DECLARE_WRITE8_MEMBER(btl_tobi_l_w);
368		DECLARE_WRITE8_MEMBER(btl_smb3_w);
369		DECLARE_WRITE8_MEMBER(btl_dn_w);
370		DECLARE_WRITE8_MEMBER(btl_pika_y2k_w);
371		DECLARE_WRITE8_MEMBER(btl_pika_y2k_m_w);
372		DECLARE_READ8_MEMBER(btl_pika_y2k_m_r);
373		DECLARE_WRITE8_MEMBER(fk23c_l_w);
374		DECLARE_WRITE8_MEMBER(fk23c_w);
375		DECLARE_WRITE8_MEMBER(bmc_64in1nr_l_w);
376		DECLARE_WRITE8_MEMBER(bmc_64in1nr_w);
377		DECLARE_WRITE8_MEMBER(bmc_190in1_w);
378		DECLARE_WRITE8_MEMBER(bmc_a65as_w);
379		DECLARE_WRITE8_MEMBER(bmc_gs2004_w);
380		DECLARE_WRITE8_MEMBER(bmc_gs2013_w);
381		DECLARE_WRITE8_MEMBER(bmc_s24in1sc03_l_w);
382		DECLARE_WRITE8_MEMBER(bmc_t262_w);
383		DECLARE_WRITE8_MEMBER(bmc_ws_m_w);
384		DECLARE_WRITE8_MEMBER(novel1_w);
385		DECLARE_WRITE8_MEMBER(novel2_w);
386		DECLARE_WRITE8_MEMBER(bmc_gka_w);
387		DECLARE_WRITE8_MEMBER(sng32_w);
388		DECLARE_WRITE8_MEMBER(bmc_gkb_w);
389		DECLARE_WRITE8_MEMBER(bmc_super700in1_w);
390		DECLARE_WRITE8_MEMBER(bmc_36in1_w);
391		DECLARE_WRITE8_MEMBER(bmc_21in1_w);
392		DECLARE_WRITE8_MEMBER(bmc_150in1_w);
393		DECLARE_WRITE8_MEMBER(bmc_35in1_w);
394		DECLARE_WRITE8_MEMBER(bmc_64in1_w);
395		DECLARE_WRITE8_MEMBER(bmc_15in1_m_w);
396		DECLARE_WRITE8_MEMBER(bmc_hik300_w);
397		DECLARE_WRITE8_MEMBER(supergun20in1_w);
398		DECLARE_WRITE8_MEMBER(bmc_72in1_w);
399		DECLARE_WRITE8_MEMBER(bmc_76in1_w);
400		DECLARE_WRITE8_MEMBER(bmc_1200in1_w);
401		DECLARE_WRITE8_MEMBER(bmc_31in1_w);
402		DECLARE_WRITE8_MEMBER(bmc_22g_w);
403		DECLARE_WRITE8_MEMBER(bmc_20in1_w);
404		DECLARE_WRITE8_MEMBER(bmc_110in1_w);
405		DECLARE_WRITE8_MEMBER(bmc_sbig7_w);
406		DECLARE_WRITE8_MEMBER(bmc_hik8_m_w);
407		DECLARE_WRITE8_MEMBER(bmc_hik4in1_m_w);
408		DECLARE_WRITE8_MEMBER(bmc_ball11_m_w);
409		DECLARE_WRITE8_MEMBER(bmc_ball11_w);
410		DECLARE_WRITE8_MEMBER(bmc_mario7in1_m_w);
411		DECLARE_WRITE8_MEMBER(bmc_gold7in1_m_w);
412		DECLARE_WRITE8_MEMBER(bmc_gc6in1_l_w);
413		DECLARE_WRITE8_MEMBER(bmc_gc6in1_w);
414		DECLARE_WRITE8_MEMBER(bmc_family4646_m_w);
415		DECLARE_WRITE8_MEMBER(bmc_vt5201_w);
416		DECLARE_READ8_MEMBER(bmc_vt5201_r);
417		DECLARE_WRITE8_MEMBER(bmc_bs5_w);
418		DECLARE_WRITE8_MEMBER(bmc_810544_w);
419		DECLARE_WRITE8_MEMBER(bmc_ntd03_w);
420		DECLARE_WRITE8_MEMBER(bmc_gb63_w);
421		DECLARE_READ8_MEMBER(bmc_gb63_r);
422		DECLARE_WRITE8_MEMBER(edu2k_w);
423		DECLARE_WRITE8_MEMBER(h2288_l_w);
424		DECLARE_READ8_MEMBER(h2288_l_r);
425		DECLARE_WRITE8_MEMBER(h2288_w);
426		DECLARE_WRITE8_MEMBER(shjy3_w);
427		DECLARE_WRITE8_MEMBER(unl_6035052_extra_w);
428		DECLARE_READ8_MEMBER(unl_6035052_extra_r);
429		DECLARE_WRITE8_MEMBER(pjoy84_m_w);
430		DECLARE_WRITE8_MEMBER(someri_mmc1_w);
431		DECLARE_WRITE8_MEMBER(someri_mmc3_w);
432		DECLARE_WRITE8_MEMBER(someri_vrc2_w);
433		DECLARE_WRITE8_MEMBER(someri_w);
434		DECLARE_WRITE8_MEMBER(someri_l_w);
435		DECLARE_WRITE8_MEMBER(fujiya_m_w);
436		DECLARE_READ8_MEMBER(fujiya_m_r);
437		DECLARE_WRITE8_MEMBER(dummy_l_w);
438		DECLARE_WRITE8_MEMBER(dummy_m_w);
439		DECLARE_WRITE8_MEMBER(dummy_w);
440		DECLARE_READ8_MEMBER(dummy_l_r);
441		DECLARE_READ8_MEMBER(dummy_m_r);
442		DECLARE_READ8_MEMBER(dummy_r);
443
444		UINT8      *m_wram;
445		UINT8      *m_battery_ram;
446		UINT8      *m_mapper_ram;
447		UINT8      *m_mapper_bram;
448		UINT32      m_mapper_ram_size;
449		UINT32      m_mapper_bram_size;
450
451		// things below are included here for the moment, even if probably would better fit nes_state
452		// to allow compilation while progressing with the work
453
454		/* devices */
455		cpu_device        *m_maincpu;
456		ppu2c0x_device    *m_ppu;
457		device_t          *m_sound;
458		emu_timer         *m_irq_timer;
459
460		/* load-time cart variables which remain constant */
461		UINT16 m_prg_chunks;      // iNES 2.0 allows for more chunks (a recently dumped multigame cart has 256 chunks of both PRG & CHR!)
462		UINT16 m_chr_chunks;
463		UINT8 m_battery;         // if there is PRG RAM with battery backup
464
465		/* system variables which don't change at run-time */
466		UINT16 m_pcb_id;      // for UNIF & xml
467		UINT8 m_hard_mirroring;
468		};
469
470	53	class nes_state : public nes_carts_state
471	54	{
472	55	public:
r18072	r18073
513	96	UINT8      *m_prg;
514	97	UINT8      *m_vrom;
515	98	UINT8      *m_vram;
516		UINT8      *m_ciram; //PPU nametable RAM - external to PPU!
	99	UINT8      *m_ciram; //PPU nametable RAM - external to PPU!
517	100
518
519		/* load-time cart variables which remain constant */
520		//   UINT16 m_prg_chunks;      // iNES 2.0 allows for more chunks (a recently dumped multigame cart has 256 chunks of both PRG & CHR!)
521		//   UINT16 m_chr_chunks;
522		UINT16 m_vram_chunks;
523		UINT8 m_trainer;
524		//   UINT8 m_battery;         // if there is PRG RAM with battery backup
525		UINT32 m_battery_size;
526		UINT8 m_prg_ram;         // if there is PRG RAM with no backup
527		UINT32 m_wram_size;
528
529		/* system variables which don't change at run-time */
530		UINT16 m_mapper;      // for iNES
531		//   UINT16 m_pcb_id;      // for UNIF & xml
532		UINT8 m_four_screen_vram;
533		//   UINT8 m_hard_mirroring;
534		UINT8 m_crc_hack;   // this is needed to detect different boards sharing the same Mappers (shame on .nes format)
535		UINT8 m_ines20;
536
537
538	101	/***** FDS-floppy related *****/
539	102
540	103	int     m_disk_expansion;

trunk/src/mess/video/nes.c

r18072	r18073
9	9	#include "emu.h"
10	10	#include "video/ppu2c0x.h"
11	11	#include "includes/nes.h"
12		#include "machine/nes_mmc.h"
	12	//#include "includes/nes_mmc.h"
13	13
14	14	static void nes_vh_reset( running_machine &machine )
15	15	{

trunk/src/mess/drivers/nes.c

r18072	r18073
12	12
13	13	#include "emu.h"
14	14	#include "video/ppu2c0x.h"
15		#include "machine/nes_mmc.h"
16	15	#include "includes/nes.h"
	16	//#include "includes/nes_mmc.h"
17	17	#include "cpu/m6502/m6502.h"
18	18	#include "imagedev/cartslot.h"
19	19	#include "sound/nes_apu.h"

Previous

199869 Revisions

Next

---

© 1997-2024 The MAME Team