trunk/src/mess/drivers/astrocde.c
| r18016 | r18017 | |
| 13 | 13 | #include "imagedev/cartslot.h" |
| 14 | 14 | #include "machine/ram.h" |
| 15 | 15 | |
| 16 | | MACHINE_RESET( astrocde ); |
| 17 | | void get_ram_expansion_settings(address_space &space, int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end); |
| 16 | class astrocde_mess_state : public astrocde_state |
| 17 | { |
| 18 | public: |
| 19 | astrocde_mess_state(const machine_config &mconfig, device_type type, const char *tag) |
| 20 | : astrocde_state(mconfig, type, tag) |
| 21 | { } |
| 18 | 22 | |
| 23 | void get_ram_expansion_settings(int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end); |
| 24 | DECLARE_MACHINE_RESET(astrocde); |
| 25 | DECLARE_INPUT_CHANGED_MEMBER(set_write_protect); |
| 26 | }; |
| 27 | |
| 28 | |
| 19 | 29 | /************************************* |
| 20 | 30 | * |
| 21 | 31 | * Memory maps |
| r18016 | r18017 | |
| 76 | 86 | * |
| 77 | 87 | *************************************/ |
| 78 | 88 | |
| 79 | | static ADDRESS_MAP_START( astrocade_mem, AS_PROGRAM, 8, astrocde_state ) |
| 89 | static ADDRESS_MAP_START( astrocade_mem, AS_PROGRAM, 8, astrocde_mess_state ) |
| 80 | 90 | AM_RANGE(0x0000, 0x0fff) AM_ROM AM_WRITE(astrocade_funcgen_w) |
| 81 | 91 | AM_RANGE(0x1000, 0x3fff) AM_ROM /* Star Fortress writes in here?? */ |
| 82 | 92 | AM_RANGE(0x4000, 0x4fff) AM_RAM AM_SHARE("videoram") /* ASG */ |
| 83 | 93 | ADDRESS_MAP_END |
| 84 | 94 | |
| 85 | 95 | |
| 86 | | static ADDRESS_MAP_START( astrocade_io, AS_IO, 8, astrocde_state ) |
| 96 | static ADDRESS_MAP_START( astrocade_io, AS_IO, 8, astrocde_mess_state ) |
| 87 | 97 | AM_RANGE(0x00, 0x1f) AM_MIRROR(0xff00) AM_MASK(0xffff) AM_READWRITE(astrocade_data_chip_register_r, astrocade_data_chip_register_w) |
| 88 | 98 | ADDRESS_MAP_END |
| 89 | 99 | |
| 90 | | static INPUT_CHANGED( set_write_protect ) // run when RAM expansion write protect switch is changed |
| 100 | INPUT_CHANGED_MEMBER(astrocde_mess_state::set_write_protect) // run when RAM expansion write protect switch is changed |
| 91 | 101 | { |
| 92 | 102 | int ram_expansion_installed = 0, write_protect_on = 0, expansion_ram_start = 0, expansion_ram_end = 0, shadow_ram_end = 0; |
| 93 | | address_space &space = *field.machine().device("maincpu")->memory().space(AS_PROGRAM); |
| 94 | | UINT8 *expram = field.machine().device<ram_device>("ram_tag")->pointer(); |
| 103 | address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM); |
| 104 | UINT8 *expram = machine().device<ram_device>("ram_tag")->pointer(); |
| 95 | 105 | |
| 96 | | get_ram_expansion_settings(space, ram_expansion_installed, write_protect_on, expansion_ram_start, expansion_ram_end, shadow_ram_end); // passing by reference |
| 106 | get_ram_expansion_settings(ram_expansion_installed, write_protect_on, expansion_ram_start, expansion_ram_end, shadow_ram_end); // passing by reference |
| 97 | 107 | |
| 98 | 108 | if (ram_expansion_installed == 1) |
| 99 | 109 | { |
| r18016 | r18017 | |
| 225 | 235 | PORT_DIPSETTING( 0x20, "32KB Blue RAM Expansion") |
| 226 | 236 | |
| 227 | 237 | PORT_START("PROTECT") /* Write protect RAM */ |
| 228 | | PORT_DIPNAME( 0x01, 0x00, "Write Protect RAM") PORT_CHANGED(set_write_protect, 0) |
| 238 | PORT_DIPNAME( 0x01, 0x00, "Write Protect RAM") PORT_CHANGED_MEMBER(DEVICE_SELF, astrocde_mess_state, set_write_protect, 0) |
| 229 | 239 | PORT_DIPSETTING( 0x00, "Write Protect Off") |
| 230 | 240 | PORT_DIPSETTING( 0x01, "Write Protect On") |
| 231 | 241 | INPUT_PORTS_END |
| r18016 | r18017 | |
| 237 | 247 | * |
| 238 | 248 | *************************************/ |
| 239 | 249 | |
| 240 | | static MACHINE_CONFIG_START( astrocde, astrocde_state ) |
| 250 | static MACHINE_CONFIG_START( astrocde, astrocde_mess_state ) |
| 241 | 251 | /* basic machine hardware */ |
| 242 | 252 | MCFG_CPU_ADD("maincpu", Z80, ASTROCADE_CLOCK/4) /* 1.789 MHz */ |
| 243 | 253 | MCFG_CPU_PROGRAM_MAP(astrocade_mem) |
| 244 | 254 | MCFG_CPU_IO_MAP(astrocade_io) |
| 245 | 255 | |
| 246 | | MCFG_MACHINE_RESET( astrocde ) |
| 256 | MCFG_MACHINE_RESET_OVERRIDE(astrocde_mess_state, astrocde) |
| 247 | 257 | |
| 248 | 258 | /* video hardware */ |
| 249 | 259 | MCFG_SCREEN_ADD("screen", RASTER) |
| r18016 | r18017 | |
| 307 | 317 | m_video_config = AC_SOUND_PRESENT | AC_LIGHTPEN_INTS; |
| 308 | 318 | } |
| 309 | 319 | |
| 310 | | MACHINE_RESET( astrocde ) |
| 320 | MACHINE_RESET_MEMBER(astrocde_mess_state, astrocde) |
| 311 | 321 | { |
| 312 | 322 | int ram_expansion_installed = 0, write_protect_on = 0, expansion_ram_start = 0, expansion_ram_end = 0, shadow_ram_end = 0; |
| 313 | | address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM); |
| 314 | | UINT8 *expram = machine.device<ram_device>("ram_tag")->pointer(); |
| 323 | address_space &space = *machine().device("maincpu")->memory().space(AS_PROGRAM); |
| 324 | UINT8 *expram = machine().device<ram_device>("ram_tag")->pointer(); |
| 315 | 325 | space.unmap_readwrite(0x5000, 0xffff); // unmap any previously installed expansion RAM |
| 316 | 326 | |
| 317 | | get_ram_expansion_settings(space, ram_expansion_installed, write_protect_on, expansion_ram_start, expansion_ram_end, shadow_ram_end); // passing by reference |
| 327 | get_ram_expansion_settings(ram_expansion_installed, write_protect_on, expansion_ram_start, expansion_ram_end, shadow_ram_end); // passing by reference |
| 318 | 328 | |
| 319 | 329 | if (ram_expansion_installed == 1) |
| 320 | 330 | { |
| r18016 | r18017 | |
| 331 | 341 | } |
| 332 | 342 | } |
| 333 | 343 | |
| 334 | | void get_ram_expansion_settings(address_space &space, int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end) |
| 344 | void astrocde_mess_state::get_ram_expansion_settings(int &ram_expansion_installed, int &write_protect_on, int &expansion_ram_start, int &expansion_ram_end, int &shadow_ram_end) |
| 335 | 345 | { |
| 336 | | if (space.machine().root_device().ioport("PROTECT")->read() == 0x01) |
| 346 | if (machine().root_device().ioport("PROTECT")->read() == 0x01) |
| 337 | 347 | write_protect_on = 1; |
| 338 | 348 | else |
| 339 | 349 | write_protect_on = 0; |
| 340 | 350 | |
| 341 | 351 | ram_expansion_installed = 1; |
| 342 | 352 | |
| 343 | | switch(space.machine().root_device().ioport("CFG")->read()) // check RAM expansion configuration and set address ranges |
| 353 | switch(machine().root_device().ioport("CFG")->read()) // check RAM expansion configuration and set address ranges |
| 344 | 354 | { |
| 345 | 355 | case 0x00: // No RAM Expansion |
| 346 | 356 | ram_expansion_installed = 0; |
trunk/src/mess/drivers/n64.c
| r18016 | r18017 | |
| 14 | 14 | #include "imagedev/cartslot.h" |
| 15 | 15 | #include "includes/n64.h" |
| 16 | 16 | |
| 17 | | static READ32_HANDLER( dd_null_r ) |
| 17 | class n64_mess_state : public n64_state |
| 18 | 18 | { |
| 19 | public: |
| 20 | n64_mess_state(const machine_config &mconfig, device_type type, const char *tag) |
| 21 | : n64_state(mconfig, type, tag) |
| 22 | { } |
| 23 | |
| 24 | DECLARE_READ32_MEMBER(dd_null_r); |
| 25 | DECLARE_MACHINE_START(n64dd); |
| 26 | INTERRUPT_GEN_MEMBER(n64_reset_poll); |
| 27 | }; |
| 28 | |
| 29 | READ32_MEMBER(n64_mess_state::dd_null_r) |
| 30 | { |
| 19 | 31 | return 0xffffffff; |
| 20 | 32 | } |
| 21 | 33 | |
| 22 | | static ADDRESS_MAP_START( n64_map, AS_PROGRAM, 32, n64_state ) |
| 34 | static ADDRESS_MAP_START( n64_map, AS_PROGRAM, 32, n64_mess_state ) |
| 23 | 35 | AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_SHARE("rdram") // RDRAM |
| 24 | 36 | AM_RANGE(0x03f00000, 0x03f00027) AM_DEVREADWRITE("rcp", n64_periphs, rdram_reg_r, rdram_reg_w) |
| 25 | 37 | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("rsp_dmem") // RSP DMEM |
| r18016 | r18017 | |
| 32 | 44 | AM_RANGE(0x04600000, 0x046fffff) AM_DEVREADWRITE("rcp", n64_periphs, pi_reg_r, pi_reg_w) // Peripheral Interface |
| 33 | 45 | AM_RANGE(0x04700000, 0x047fffff) AM_DEVREADWRITE("rcp", n64_periphs, ri_reg_r, ri_reg_w) // RDRAM Interface |
| 34 | 46 | AM_RANGE(0x04800000, 0x048fffff) AM_DEVREADWRITE("rcp", n64_periphs, si_reg_r, si_reg_w) // Serial Interface |
| 35 | | AM_RANGE(0x05000508, 0x0500050b) AM_READ_LEGACY(dd_null_r); |
| 47 | AM_RANGE(0x05000508, 0x0500050b) AM_READ(dd_null_r); |
| 36 | 48 | AM_RANGE(0x08000000, 0x0801ffff) AM_RAM AM_SHARE("sram") // Cartridge SRAM |
| 37 | 49 | AM_RANGE(0x10000000, 0x13ffffff) AM_ROM AM_REGION("user2", 0) // Cartridge |
| 38 | 50 | AM_RANGE(0x1fc00000, 0x1fc007bf) AM_ROM AM_REGION("user1", 0) // PIF ROM |
| 39 | 51 | AM_RANGE(0x1fc007c0, 0x1fc007ff) AM_DEVREADWRITE("rcp", n64_periphs, pif_ram_r, pif_ram_w) |
| 40 | 52 | ADDRESS_MAP_END |
| 41 | 53 | |
| 42 | | static ADDRESS_MAP_START( n64dd_map, AS_PROGRAM, 32, n64_state ) |
| 54 | static ADDRESS_MAP_START( n64dd_map, AS_PROGRAM, 32, n64_mess_state ) |
| 43 | 55 | AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_SHARE("rdram") // RDRAM |
| 44 | 56 | AM_RANGE(0x03f00000, 0x03f00027) AM_DEVREADWRITE("rcp", n64_periphs, rdram_reg_r, rdram_reg_w) |
| 45 | 57 | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("rsp_dmem") // RSP DMEM |
| r18016 | r18017 | |
| 60 | 72 | AM_RANGE(0x1fc007c0, 0x1fc007ff) AM_DEVREADWRITE("rcp", n64_periphs, pif_ram_r, pif_ram_w) |
| 61 | 73 | ADDRESS_MAP_END |
| 62 | 74 | |
| 63 | | static ADDRESS_MAP_START( rsp_map, AS_PROGRAM, 32, n64_state ) |
| 75 | static ADDRESS_MAP_START( rsp_map, AS_PROGRAM, 32, n64_mess_state ) |
| 64 | 76 | AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("rsp_dmem") |
| 65 | 77 | AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("rsp_imem") |
| 66 | 78 | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("rsp_dmem") |
| r18016 | r18017 | |
| 232 | 244 | return IMAGE_INIT_PASS; |
| 233 | 245 | } |
| 234 | 246 | |
| 235 | | MACHINE_START( n64dd ) |
| 247 | MACHINE_START_MEMBER(n64_mess_state,n64dd) |
| 236 | 248 | { |
| 237 | | n64_state *state = machine.driver_data<n64_state>(); |
| 238 | | state->machine_start(); |
| 249 | machine_start(); |
| 239 | 250 | |
| 240 | | UINT8 *ipl = machine.root_device().memregion("ddipl")->base(); |
| 251 | UINT8 *ipl = machine().root_device().memregion("ddipl")->base(); |
| 241 | 252 | |
| 242 | 253 | for (int i = 0; i < 0x400000; i += 4) |
| 243 | 254 | { |
| r18016 | r18017 | |
| 252 | 263 | } |
| 253 | 264 | } |
| 254 | 265 | |
| 255 | | static INTERRUPT_GEN( n64_reset_poll ) |
| 266 | INTERRUPT_GEN_MEMBER(n64_mess_state::n64_reset_poll) |
| 256 | 267 | { |
| 257 | | n64_periphs *periphs = device->machine().device<n64_periphs>("rcp"); |
| 258 | | periphs->poll_reset_button((device->machine().root_device().ioport("RESET")->read() & 1) ? true : false); |
| 268 | n64_periphs *periphs = machine().device<n64_periphs>("rcp"); |
| 269 | periphs->poll_reset_button((machine().root_device().ioport("RESET")->read() & 1) ? true : false); |
| 259 | 270 | } |
| 260 | 271 | |
| 261 | | static MACHINE_CONFIG_START( n64, n64_state ) |
| 272 | static MACHINE_CONFIG_START( n64, n64_mess_state ) |
| 262 | 273 | |
| 263 | 274 | /* basic machine hardware */ |
| 264 | 275 | MCFG_CPU_ADD("maincpu", VR4300BE, 93750000) |
| 265 | 276 | MCFG_CPU_CONFIG(config) |
| 266 | 277 | MCFG_CPU_PROGRAM_MAP(n64_map) |
| 267 | | MCFG_CPU_VBLANK_INT("screen", n64_reset_poll) |
| 278 | MCFG_CPU_VBLANK_INT_DRIVER("screen", n64_mess_state, n64_reset_poll) |
| 268 | 279 | |
| 269 | 280 | MCFG_CPU_ADD("rsp", RSP, 62500000) |
| 270 | 281 | MCFG_CPU_CONFIG(n64_rsp_config) |
| r18016 | r18017 | |
| 308 | 319 | MCFG_CPU_MODIFY("maincpu") |
| 309 | 320 | MCFG_CPU_PROGRAM_MAP(n64dd_map) |
| 310 | 321 | |
| 311 | | MCFG_MACHINE_START( n64dd ) |
| 322 | MCFG_MACHINE_START_OVERRIDE(n64_mess_state, n64dd) |
| 312 | 323 | |
| 313 | 324 | MCFG_CARTSLOT_MODIFY("cart") |
| 314 | 325 | MCFG_CARTSLOT_NOT_MANDATORY |