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r17962 Monday 17th September, 2012 at 07:43:37 UTC by Aaron Giles

Memory handler normalization, part 1. READ/WRITE_DEVICE*_HANDLERs are now passed an address_space &, and the 8-bit variants get a mem_mask as well. This means they are now directly compatible with the member function delegates. Added a generic address space to the driver_device that can be used when no specific address space is available. Also added DECLARE_READ/WRITE_DEVICE*_HANDLER macros to declare device callbacks with default mem_mask parameters. [Aaron Giles]

[src/emu]	addrmap.c addrmap.h devcb.c devcb.h devconv.h dimemory.c driver.c driver.h memory.c memory.h
[src/emu/cpu/arm7]	arm7.c arm7ops.c
[src/emu/cpu/cubeqcpu]	cubeqcpu.h
[src/emu/cpu/esrip]	esrip.c
[src/emu/cpu/m68000]	68307ser.c
[src/emu/cpu/powerpc]	ppccom.c
[src/emu/cpu/rsp]	rspdrc.c
[src/emu/cpu/tms0980]	tms0980.c
[src/emu/imagedev]	flopdrv.h
[src/emu/machine]	6525tpi.h 6526cia.h 6532riot.h 68681.h 74123.c 74123.h 8237dma.h 8257dma.h adc1213x.h at28c16.h ds2404.h f3853.h i8243.h idectrl.h ins8154.h k033906.h k053252.h k056230.h latch8.c latch8.h mb14241.h pd4990a.h pic8259.h pit8253.h rp5h01.h s3c2410.h s3c24xx.c smc91c9x.h timekpr.h tms6100.h upd4701.h wd17xx.c wd17xx.h z80dart.c z80dart.h z80dma.h z80sio.c z80sio.h z80sti.h
[src/emu/sound]	2151intf.c 2151intf.h 2203intf.c 2203intf.h 2413intf.c 2413intf.h 2608intf.c 2608intf.h 2610intf.c 2610intf.h 2612intf.c 2612intf.h 262intf.c 262intf.h 3526intf.c 3526intf.h 3812intf.c 3812intf.h 8950intf.c 8950intf.h aica.c aica.h astrocde.h ay8910.c ay8910.h c140.h c6280.h digitalk.h discrete.h es5506.h es8712.h gaelco.h ics2115.h iremga20.h k005289.h k007232.h k051649.c k051649.h k053260.h k056800.h msm5232.c msm5232.h multipcm.h n63701x.h namco.c namco.h nes_apu.h nile.h okim6258.h okim6376.h qsound.h rf5c400.h rf5c68.h saa1099.h scsp.c scsp.h segapcm.h sn76496.h snkwave.h sp0250.h sp0256.c sp0256.h st0016.h t6w28.h tiaintf.h tms5110.h tms5220.h upd7759.h vlm5030.h vrender0.h x1_010.c x1_010.h ym2151.c ym2151.h ymf271.h ymf278b.h ymz280b.h zsg2.h
[src/emu/video]	hd63484.h i8275.h pc_vga.h s2636.h tlc34076.h tms9927.c tms9927.h voodoo.c voodoo.h
[src/mame/audio]	8080bw.c asteroid.c atarijsa.c avalnche.c blockade.c bsktball.c bzone.c canyon.c carnival.c circus.c copsnrob.c crbaloon.c dkong.c exidy.c exidy.h firetrk.c galaxian.c galaxian.h gottlieb.c hyprolyb.h irem.c jedi.c leland.c llander.c m72.h m79amb.c mario.c micro3d.c midway.c mw8080bw.c namco52.c namco52.h namco54.c namco54.h orbit.c phoenix.c pleiads.h poolshrk.c qix.c redalert.c scramble.c segag80r.c segasnd.h seibu.h skyraid.c snes_snd.c snes_snd.h snk6502.c spiders.c sprint8.c subs.c taitosnd.h trackfld.h vicdual.c wiping.h
[src/mame/drivers]	40love.c 4enraya.c 5clown.c 88games.c aliens.c amspdwy.c aristmk4.c asterix.c atarisy1.c atarisy2.c bagman.c berzerk.c bfcobra.c bfm_sc1.c bfm_sc2.c bfm_sc4h.c bigevglf.c bishi.c blockhl.c bogeyman.c bottom9.c buggychl.c bzone.c calchase.c cd32.c centiped.c cham24.c cidelsa.c circusc.c cliffhgr.c cninja.c contra.c crbaloon.c crimfght.c cubeqst.c cvs.c cybertnk.c dambustr.c darius.c dblewing.c djmain.c dkong.c dlair.c dogfgt.c dragrace.c drw80pkr.c dynadice.c dynax.c equites.c esripsys.c ettrivia.c exterm.c famibox.c fastlane.c fgoal.c firetrk.c flstory.c funkball.c fuukifg3.c gaelco3d.c galaxian.c gamecstl.c gbusters.c ghosteo.c goldnpkr.c gradius3.c grchamp.c gsword.c gticlub.c gyruss.c highvdeo.c hitme.c homedata.c homerun.c hornet.c icecold.c igs011.c ironhors.c jpmimpct.c jpmsys5.c kaneko16.c kinst.c kncljoe.c ksys573.c labyrunr.c ladyfrog.c laserbat.c lethal.c m10.c m63.c m72.c m90.c madalien.c mainevt.c malzak.c maygay1b.c mcr.c mediagx.c mermaid.c metro.c mexico86.c midqslvr.c midzeus.c mirage.c mirax.c mlanding.c model2.c model3.c mpu4hw.c msisaac.c multfish.c multigam.c munchmo.c mw8080bw.c mystston.c namcona1.c namcos86.c neogeo.c neoprint.c ninjaw.c norautp.c nss.c nwk-tr.c nycaptor.c nyny.c orbit.c othello.c othunder.c overdriv.c pacman.c parodius.c playch10.c polepos.c ppmast93.c prehisle.c proconn.c qdrmfgp.c queen.c r2dtank.c rbmk.c rollerg.c royalmah.c rpunch.c sauro.c savquest.c seattle.c segac2.c segag80r.c segag80v.c segas16a.c segas16b.c seta.c sfcbox.c shanghai.c sigmab52.c skeetsht.c skydiver.c slapshot.c snesb.c snk.c snk68.c spiders.c sprint2.c sprint4.c spy.c starshp1.c surpratk.c system1.c taito_b.c taito_h.c taito_l.c taito_z.c taitogn.c taitowlf.c tank8.c thunderx.c tmnt.c toaplan2.c topspeed.c triplhnt.c uapce.c ultratnk.c ultrsprt.c vega.c vegas.c vendetta.c vertigo.c videopin.c videopkr.c viper.c vmetal.c voyager.c vsnes.c warpwarp.c warriorb.c wecleman.c wgp.c wiz.c xtom3d.c zaccaria.c zn.c
[src/mame/includes]	8080bw.h asteroid.h atari.h avalnche.h beezer.h blockade.h bsktball.h bzone.h canyon.h cd32.h cps3.h crbaloon.h dc.h firetrk.h flower.h gaelco2.h gomoku.h gridlee.h hanaawas.h harddriv.h homerun.h leland.h m79amb.h mario.h mcr.h megadriv.h micro3d.h mw8080bw.h n64.h orbit.h phoenix.h polepos.h poolshrk.h qix.h scramble.h segas16a.h simpsons.h skyraid.h spiders.h sprint8.h stfight.h subs.h suna8.h system1.h tatsumi.h tiamc1.h turbo.h tx1.h vectrex.h warpwarp.h xxmissio.h zaxxon.h
[src/mame/machine]	amiga.c archimds.c atarifb.c beezer.c buggychl.h cd32.c cdicdic.h cdislave.h dc.c gaelco3d.h konppc.c konppc.h leland.c mathbox.h mcr.c mcr68.c megadriv.c megavdp.c mhavoc.c midwayic.c midwayic.h namco06.c namco06.h namco50.h namco51.h namco53.h namco62.h namcoio.h namcos1.c nitedrvr.c nmk004.c nmk112.c nmk112.h playch10.c qix.c simpsons.c snes.c taitoio.c taitoio.h tatsumi.c vectrex.c williams.c
[src/mame/video]	astrocde.c atarirle.h boogwing.c btoads.c cbuster.c cninja.c combatsc.c contra.c dassault.c dec0.c decbac06.c decbac06.h deco16ic.c deco16ic.h decocomn.h dietgo.c dkong.c fastlane.c flkatck.c funkyjet.c gp9001.c gp9001.h gradius3.c groundfx.c hcastle.c itech8.c kan_pand.h konicdev.c konicdev.h labyrunr.c naughtyb.c phoenix.c pktgaldx.c rohga.c seta001.h simpsons.c skydiver.c slapshot.c sprint4.c subs.c supbtime.c taito_b.c taito_f2.c taito_h.c taito_o.c taitoair.c taitoic.c taitoic.h tia.c triplhnt.c tumblep.c ultratnk.c undrfire.c vaportra.c vectrex.c xmen.c
[src/mess/audio]	dave.c dave.h gb.h mea8000.c mea8000.h t6721.h upd1771.h
[src/mess/drivers]	abc1600.c abc80x.c ace.c ami1200.c amiga.c apf.c apollo.c apricot.c at.c bebox.c bigbord2.c bml3.c c128.c c64.c c65.c elwro800.c exelv.c fm7.c fmtowns.c gba.c homelab.c ip22.c m20.c mikromik.c msx.c multi8.c mz2000.c mz2500.c mz6500.c nanos.c nascom1.c nes.c ng_aes.c ngp.c osi.c p8k.c palm.c pasopia7.c pc1512.c pc8801.c pc88va.c pc9801.c pcm.c pcw.c pes.c plus4.c ptcsol.c ql.c rt1715.c smc777.c snes.c sorcerer.c specpls3.c ssystem3.c svision.c trs80.c trs80m2.c vic10.c vidbrain.c vip.c vixen.c vt100.c wangpc.c x1.c x1twin.c x68k.c z100.c z80ne.c
[src/mess/formats]	m65_snqk.c spec_snqk.c
[src/mess/includes]	amstrad.h apollo.h c16.h c64.h c64_legacy.h cbmb.h cgenie.h kaypro.h mc68328.h msx.h mtx.h nascom1.h pc.h pokemini.h svision.h vic10.h wswan.h z80ne.h
[src/mess/machine]	3c505.h 990_tap.h a2diskii.c a2echoii.c a2mockingboard.c a7800.c abc77.c aim65.c amigacd.c amigacd.h amstr_pc.c amstrad.c apollo.c apollo_kbd.c apollo_kbd.h apple1.c apple2gs.c apple3.c applefdc.h ataridev.h ay31015.c ay31015.h bbc.c bebox.c beta.c beta.h c128.c c1551.c c64.c c64_currah_speech.c c64_ieee488.c c64_sfx_sound_expander.c c65.c cgenie.c coco_fdc.c compis.c comx_fd.c concept.c cpc_ssa1.c dai.c dgn_beta.c dgnalpha.c ds1315.h e05a03.h gb.c hd63450.h hec2hrp.c hecdisk2.c i8271.c i8271.h iq151_disc2.c isa_adlib.c isa_fdc.c isa_gblaster.c isa_hdc.c isa_ibm_mfc.c isa_ide.c isa_sblaster.c kaypro.c kr2376.c kr2376.h lisa.c lux10828.c mac.c macpci.c mbc55x.c mc68328.c mc68328.h mc6843.h mc6846.c mc6846.h mc6854.h mc80.c micropolis.c micropolis.h mm58274c.h mos6530.h msx.c msx_slot.c mtx.c mz700.c nes_pcb.c odyssey2.c omti8621.c omti8621.h oric.c orion.c osborne1.c partner.c pc.c pc_fdc.c pc_fdc.h pc_lpt.c pc_lpt.h pk8020.c pmd85.c rmnimbus.c s100.c s100.h s100_dj2db.c s100_dj2db.h s100_mm65k16s.c s100_mm65k16s.h s100_wunderbus.c s100_wunderbus.h s3c44b0.c sc499.h sms.c southbridge.c super80.c svi318.c thomflop.c thomson.c trs80.c tvc_hbf.c upd7002.h upd71071.c upd71071.h upd765.c upd765.h v1050kb.c wswan.c z80ne.c
[src/mess/machine/ti99]	bwg.c genboard.c hfdc.c ti_fdc.c
[src/mess/video]	733_asr.h 911_vdt.h dl1416.h isa_mda.c k1ge.h vdc8563.h vic4567.h vic6567.h vtvideo.h x68k.c

trunk/src/mame/audio/micro3d.c

r17961	r17962
395	395
396	396	WRITE8_DEVICE_HANDLER( micro3d_upd7759_w )
397	397	{
398		upd7759_port_w(device, 0, data);
	398	upd7759_port_w(device, space, 0, data);
399	399	upd7759_start_w(device, 0);
400	400	upd7759_start_w(device, 1);
401	401	}

trunk/src/mame/audio/phoenix.c

r17961	r17962
494	494	{
495	495	phoenix_sound_state *state = get_safe_token(device);
496	496
497		discrete_sound_w(state->m_discrete, PHOENIX_EFFECT_2_DATA, data & 0x0f);
498		discrete_sound_w(state->m_discrete, PHOENIX_EFFECT_2_FREQ, (data & 0x30) >> 4);
	497	discrete_sound_w(state->m_discrete, space, PHOENIX_EFFECT_2_DATA, data & 0x0f);
	498	discrete_sound_w(state->m_discrete, space, PHOENIX_EFFECT_2_FREQ, (data & 0x30) >> 4);
499	499	#if 0
500	500	/* future handling of noise sounds */
501		discrete_sound_w(state->m_discrete, PHOENIX_EFFECT_3_EN  , data & 0x40);
502		discrete_sound_w(state->m_discrete, PHOENIX_EFFECT_4_EN  , data & 0x80);
	501	discrete_sound_w(state->m_discrete, space, PHOENIX_EFFECT_3_EN  , data & 0x40);
	502	discrete_sound_w(state->m_discrete, space, PHOENIX_EFFECT_4_EN  , data & 0x80);
503	503	#endif
504	504	state->m_channel->update();
505	505	state->m_sound_latch_a = data;
r17961	r17962
526	526	{
527	527	phoenix_sound_state *state = get_safe_token(device);
528	528
529		discrete_sound_w(state->m_discrete, PHOENIX_EFFECT_1_DATA, data & 0x0f);
530		discrete_sound_w(state->m_discrete, PHOENIX_EFFECT_1_FILT, data & 0x20);
531		discrete_sound_w(state->m_discrete, PHOENIX_EFFECT_1_FREQ, data & 0x10);
	529	discrete_sound_w(state->m_discrete, space, PHOENIX_EFFECT_1_DATA, data & 0x0f);
	530	discrete_sound_w(state->m_discrete, space, PHOENIX_EFFECT_1_FILT, data & 0x20);
	531	discrete_sound_w(state->m_discrete, space, PHOENIX_EFFECT_1_FREQ, data & 0x10);
532	532
533	533	/* update the tune that the MM6221AA is playing */
534	534	mm6221aa_tune_w(state->m_tms, data >> 6);

trunk/src/mame/audio/avalnche.c

r17961	r17962
22	22
23	23	WRITE8_DEVICE_HANDLER( avalnche_noise_amplitude_w )
24	24	{
25		discrete_sound_w(device, AVALNCHE_SOUNDLVL_DATA, data & 0x3f);
	25	discrete_sound_w(device, space, AVALNCHE_SOUNDLVL_DATA, data & 0x3f);
26	26	}
27	27
28	28	WRITE8_DEVICE_HANDLER( avalnche_attract_enable_w )
29	29	{
30		discrete_sound_w(device, AVALNCHE_ATTRACT_EN, data & 0x01);
	30	discrete_sound_w(device, space, AVALNCHE_ATTRACT_EN, data & 0x01);
31	31	}
32	32
33	33	WRITE8_DEVICE_HANDLER( avalnche_audio_w )
r17961	r17962
37	37	switch (offset & 0x07)
38	38	{
39	39	case 0x00:      /* AUD0 */
40		discrete_sound_w(device, AVALNCHE_AUD0_EN, bit);
	40	discrete_sound_w(device, space, AVALNCHE_AUD0_EN, bit);
41	41	break;
42	42
43	43	case 0x01:      /* AUD1 */
44		discrete_sound_w(device, AVALNCHE_AUD1_EN, bit);
	44	discrete_sound_w(device, space, AVALNCHE_AUD1_EN, bit);
45	45	break;
46	46
47	47	case 0x02:      /* AUD2 */
48	48	default:
49		discrete_sound_w(device, AVALNCHE_AUD2_EN, bit);
	49	discrete_sound_w(device, space, AVALNCHE_AUD2_EN, bit);
50	50	break;
51	51	}
52	52	}

trunk/src/mame/audio/galaxian.c

r17961	r17962
408	408	/* IC 9J */
409	409	WRITE8_DEVICE_HANDLER( galaxian_pitch_w )
410	410	{
411		discrete_sound_w(device, GAL_INP_PITCH, data );
	411	discrete_sound_w(device, space, GAL_INP_PITCH, data );
412	412	}
413	413
414	414	WRITE8_DEVICE_HANDLER( galaxian_lfo_freq_w )
r17961	r17962
418	418	if (lfo_val != lfo_val_new)
419	419	{
420	420	lfo_val = lfo_val_new;
421		discrete_sound_w(device, GAL_INP_BG_DAC, lfo_val);
	421	discrete_sound_w(device, space, GAL_INP_BG_DAC, lfo_val);
422	422	}
423	423	}
424	424
425	425	WRITE8_DEVICE_HANDLER( galaxian_background_enable_w )
426	426	{
427		discrete_sound_w(device, NODE_RELATIVE(GAL_INP_FS1, offset), data & 0x01);
	427	discrete_sound_w(device, space, NODE_RELATIVE(GAL_INP_FS1, offset), data & 0x01);
428	428	}
429	429
430	430	WRITE8_DEVICE_HANDLER( galaxian_noise_enable_w )
431	431	{
432		discrete_sound_w(device, GAL_INP_HIT, data & 0x01);
	432	discrete_sound_w(device, space, GAL_INP_HIT, data & 0x01);
433	433	}
434	434
435	435	WRITE8_DEVICE_HANDLER( galaxian_vol_w )
436	436	{
437		discrete_sound_w(device, NODE_RELATIVE(GAL_INP_VOL1,offset), data & 0x01);
	437	discrete_sound_w(device, space, NODE_RELATIVE(GAL_INP_VOL1,offset), data & 0x01);
438	438	}
439	439
440	440	/* FIXME: rename to fire to be consistent */
441	441	WRITE8_DEVICE_HANDLER( galaxian_shoot_enable_w )
442	442	{
443		discrete_sound_w(device, GAL_INP_FIRE, data & 0x01);
	443	discrete_sound_w(device, space, GAL_INP_FIRE, data & 0x01);
444	444	}
445	445
446	446	/* FIXME: May be replaced by one call! */
r17961	r17962
452	452	case 0:      /* FS1 (controls 555 timer at 8R) */
453	453	case 1:      /* FS2 (controls 555 timer at 8S) */
454	454	case 2:      /* FS3 (controls 555 timer at 8T) */
455		galaxian_background_enable_w(device, offset, data);
	455	galaxian_background_enable_w(device, space, offset, data);
456	456	break;
457	457
458	458	case 3:      /* HIT */
459		galaxian_noise_enable_w(device, 0, data);
	459	galaxian_noise_enable_w(device, space, 0, data);
460	460	break;
461	461
462	462	case 4:      /* n/c */
463	463	break;
464	464
465	465	case 5:      /* FIRE */
466		galaxian_shoot_enable_w(device, 0, data);
	466	galaxian_shoot_enable_w(device, space, 0, data);
467	467	break;
468	468
469	469	case 6:      /* VOL1 */
470	470	case 7:      /* VOL2 */
471		galaxian_vol_w(device, offset & 1, data);
	471	galaxian_vol_w(device, space, offset & 1, data);
472	472	break;
473	473	}
474	474	}

trunk/src/mame/audio/galaxian.h

r17961	r17962
3	3	MACHINE_CONFIG_EXTERN( mooncrst_audio );
4	4	MACHINE_CONFIG_EXTERN( galaxian_audio );
5	5
6		WRITE8_DEVICE_HANDLER( galaxian_sound_w );
7		WRITE8_DEVICE_HANDLER( galaxian_pitch_w );
8		WRITE8_DEVICE_HANDLER( galaxian_vol_w );
9		WRITE8_DEVICE_HANDLER( galaxian_noise_enable_w );
10		WRITE8_DEVICE_HANDLER( galaxian_background_enable_w );
11		WRITE8_DEVICE_HANDLER( galaxian_shoot_enable_w );
12		WRITE8_DEVICE_HANDLER( galaxian_lfo_freq_w );
	6	DECLARE_WRITE8_DEVICE_HANDLER( galaxian_sound_w );
	7	DECLARE_WRITE8_DEVICE_HANDLER( galaxian_pitch_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( galaxian_vol_w );
	9	DECLARE_WRITE8_DEVICE_HANDLER( galaxian_noise_enable_w );
	10	DECLARE_WRITE8_DEVICE_HANDLER( galaxian_background_enable_w );
	11	DECLARE_WRITE8_DEVICE_HANDLER( galaxian_shoot_enable_w );
	12	DECLARE_WRITE8_DEVICE_HANDLER( galaxian_lfo_freq_w );
13	13

trunk/src/mame/audio/atarijsa.c

r17961	r17962
269	269
270	270	case 0x200:      /* /VOICE */
271	271	if (tms5220 != NULL)
272		tms5220_data_w(tms5220, 0, data);
	272	tms5220_data_w(tms5220, *space, 0, data);
273	273	break;
274	274
275	275	case 0x202:      /* /WRP */

trunk/src/mame/audio/namco52.c

r17961	r17962
104	104	static WRITE8_HANDLER( namco_52xx_P_w )
105	105	{
106	106	namco_52xx_state *state = get_safe_token(space->device().owner());
107		discrete_sound_w(state->m_discrete, NAMCO_52XX_P_DATA(state->m_basenode), data & 0x0f);
	107	discrete_sound_w(state->m_discrete, *space, NAMCO_52XX_P_DATA(state->m_basenode), data & 0x0f);
108	108	}
109	109
110	110	static WRITE8_HANDLER( namco_52xx_R2_w )

trunk/src/mame/audio/namco52.h

r17961	r17962
21	21	MCFG_DEVICE_CONFIG(_interface)
22	22
23	23
24		WRITE8_DEVICE_HANDLER( namco_52xx_write );
	24	DECLARE_WRITE8_DEVICE_HANDLER( namco_52xx_write );
25	25
26	26
27	27	class namco_52xx_device : public device_t

trunk/src/mame/audio/asteroid.c

r17961	r17962
280	280
281	281	WRITE8_DEVICE_HANDLER( asteroid_explode_w )
282	282	{
283		discrete_sound_w(device,ASTEROID_EXPLODE_DATA,(data&0x3c)>>2);            // Volume
	283	discrete_sound_w(device,space,ASTEROID_EXPLODE_DATA,(data&0x3c)>>2);            // Volume
284	284	/* We will modify the pitch data to send the divider value. */
285	285	switch ((data&0xc0))
286	286	{
r17961	r17962
297	297	data = 5;
298	298	break;
299	299	}
300		discrete_sound_w(device,ASTEROID_EXPLODE_PITCH, data);
	300	discrete_sound_w(device, space, ASTEROID_EXPLODE_PITCH, data);
301	301	}
302	302
303	303	WRITE8_DEVICE_HANDLER( asteroid_thump_w )
304	304	{
305		discrete_sound_w(device, ASTEROID_THUMP_EN,   data & 0x10);
306		discrete_sound_w(device, ASTEROID_THUMP_DATA, data & 0x0f);
	305	discrete_sound_w(device, space, ASTEROID_THUMP_EN,   data & 0x10);
	306	discrete_sound_w(device, space, ASTEROID_THUMP_DATA, data & 0x0f);
307	307	}
308	308
309	309	WRITE8_DEVICE_HANDLER( asteroid_sounds_w )
310	310	{
311		discrete_sound_w(device, NODE_RELATIVE(ASTEROID_SAUCER_SND_EN, offset), data & 0x80);
	311	discrete_sound_w(device, space, NODE_RELATIVE(ASTEROID_SAUCER_SND_EN, offset), data & 0x80);
312	312	}
313	313
314	314	WRITE8_DEVICE_HANDLER( astdelux_sounds_w )
315	315	{
316	316	/* Only ever activates the thrusters in Astdelux */
317		discrete_sound_w(device, ASTEROID_THRUST_EN, data & 0x80);
	317	discrete_sound_w(device, space, ASTEROID_THRUST_EN, data & 0x80);
318	318	}
319	319
320	320	WRITE8_DEVICE_HANDLER( asteroid_noise_reset_w )
321	321	{
322		discrete_sound_w(device, ASTEROID_NOISE_RESET, 0);
	322	discrete_sound_w(device, space, ASTEROID_NOISE_RESET, 0);
323	323	}

trunk/src/mame/audio/bzone.c

r17961	r17962
389	389
390	390	WRITE8_DEVICE_HANDLER( bzone_sounds_w )
391	391	{
392		discrete_sound_w(device, BZ_INPUT, data);
	392	discrete_sound_w(device, space, BZ_INPUT, data);
393	393
394	394	output_set_value("startled", (data >> 6) & 1);
395	395	device->machine().sound().system_enable(data & 0x20);

trunk/src/mame/audio/copsnrob.c

r17961	r17962
704	704	switch (offset)
705	705	{
706	706	case 0x00:
707		discrete_sound_w(device, COPSNROB_MOTOR3_INV, special_data);
	707	discrete_sound_w(device, space, COPSNROB_MOTOR3_INV, special_data);
708	708	break;
709	709
710	710	case 0x01:
711		discrete_sound_w(device, COPSNROB_MOTOR2_INV, special_data);
	711	discrete_sound_w(device, space, COPSNROB_MOTOR2_INV, special_data);
712	712	break;
713	713
714	714	case 0x02:
715		discrete_sound_w(device, COPSNROB_MOTOR1_INV, special_data);
	715	discrete_sound_w(device, space, COPSNROB_MOTOR1_INV, special_data);
716	716	break;
717	717
718	718	case 0x03:
719		discrete_sound_w(device, COPSNROB_MOTOR0_INV, special_data);
	719	discrete_sound_w(device, space, COPSNROB_MOTOR0_INV, special_data);
720	720	break;
721	721
722	722	case 0x04:
723		discrete_sound_w(device, COPSNROB_SCREECH_INV, special_data);
	723	discrete_sound_w(device, space, COPSNROB_SCREECH_INV, special_data);
724	724	break;
725	725
726	726	case 0x05:
727		discrete_sound_w(device, COPSNROB_CRASH_INV, special_data);
	727	discrete_sound_w(device, space, COPSNROB_CRASH_INV, special_data);
728	728	break;
729	729
730	730	case 0x06:
r17961	r17962
733	733	break;
734	734
735	735	case 0x07:
736		discrete_sound_w(device, COPSNROB_AUDIO_ENABLE, special_data);
	736	discrete_sound_w(device, space, COPSNROB_AUDIO_ENABLE, special_data);
737	737	//machine().sound().system_mute(special_data);
738	738	break;
739	739

trunk/src/mame/audio/segasnd.h

r17961	r17962
6	6
7	7	MACHINE_CONFIG_EXTERN( sega_speech_board );
8	8
9		WRITE8_DEVICE_HANDLER( sega_speech_data_w );
10		WRITE8_DEVICE_HANDLER( sega_speech_control_w );
	9	DECLARE_WRITE8_DEVICE_HANDLER( sega_speech_data_w );
	10	DECLARE_WRITE8_DEVICE_HANDLER( sega_speech_control_w );
11	11
12	12
13	13
14	14	MACHINE_CONFIG_EXTERN( sega_universal_sound_board );
15	15	MACHINE_CONFIG_EXTERN( sega_universal_sound_board_rom );
16	16
17		READ8_DEVICE_HANDLER( sega_usb_status_r );
18		WRITE8_DEVICE_HANDLER( sega_usb_data_w );
19		READ8_DEVICE_HANDLER( sega_usb_ram_r );
20		WRITE8_DEVICE_HANDLER( sega_usb_ram_w );
	17	DECLARE_READ8_DEVICE_HANDLER( sega_usb_status_r );
	18	DECLARE_WRITE8_DEVICE_HANDLER( sega_usb_data_w );
	19	DECLARE_READ8_DEVICE_HANDLER( sega_usb_ram_r );
	20	DECLARE_WRITE8_DEVICE_HANDLER( sega_usb_ram_w );

trunk/src/mame/audio/taitosnd.h

r17961	r17962
48	48	***************************************************************************/
49	49
50	50	/* MASTER (8bit bus) control functions */
51		WRITE8_DEVICE_HANDLER( tc0140syt_port_w );
52		WRITE8_DEVICE_HANDLER( tc0140syt_comm_w );
53		READ8_DEVICE_HANDLER( tc0140syt_comm_r );
	51	DECLARE_WRITE8_DEVICE_HANDLER( tc0140syt_port_w );
	52	DECLARE_WRITE8_DEVICE_HANDLER( tc0140syt_comm_w );
	53	DECLARE_READ8_DEVICE_HANDLER( tc0140syt_comm_r );
54	54
55	55
56	56	/* SLAVE (8bit bus) control functions ONLY */
57		WRITE8_DEVICE_HANDLER( tc0140syt_slave_port_w );
58		READ8_DEVICE_HANDLER( tc0140syt_slave_comm_r );
59		WRITE8_DEVICE_HANDLER( tc0140syt_slave_comm_w );
	57	DECLARE_WRITE8_DEVICE_HANDLER( tc0140syt_slave_port_w );
	58	DECLARE_READ8_DEVICE_HANDLER( tc0140syt_slave_comm_r );
	59	DECLARE_WRITE8_DEVICE_HANDLER( tc0140syt_slave_comm_w );
60	60
61	61
62	62	#endif /*__TAITOSND_H__*/

trunk/src/mame/audio/carnival.c

r17961	r17962
274	274	break;
275	275
276	276	case PSG_BC_WRITE:
277		ay8910_data_w( device, 0, psgData );
	277	ay8910_data_w( device, space, 0, psgData );
278	278	break;
279	279
280	280	case PSG_BC_LATCH_ADDRESS:
281		ay8910_address_w( device, 0, psgData );
	281	ay8910_address_w( device, space, 0, psgData );
282	282	break;
283	283	}
284	284	}

trunk/src/mame/audio/leland.c

r17961	r17962
307	307
308	308	static void set_dac_frequency(leland_sound_state *state, int which, int frequency);
309	309
310		static READ16_DEVICE_HANDLER( peripheral_r );
311		static WRITE16_DEVICE_HANDLER( peripheral_w );
	310	static DECLARE_READ16_DEVICE_HANDLER( peripheral_r );
	311	static DECLARE_WRITE16_DEVICE_HANDLER( peripheral_w );
312	312
313	313
314	314
r17961	r17962
1441	1441
1442	1442	/* handle partials */
1443	1443	if (!ACCESSING_BITS_8_15)
1444		data = (i80186_internal_port_r(device, offset, 0xff00) & 0xff00) | (data & 0x00ff);
	1444	data = (i80186_internal_port_r(device, space, offset, 0xff00) & 0xff00) | (data & 0x00ff);
1445	1445	else if (!ACCESSING_BITS_0_7)
1446		data = (i80186_internal_port_r(device, offset, 0x00ff) & 0x00ff) | (data & 0xff00);
	1446	data = (i80186_internal_port_r(device, space, offset, 0x00ff) & 0x00ff) | (data & 0xff00);
1447	1447
1448	1448	switch (offset)
1449	1449	{
r17961	r17962
2118	2118	case 0x01:
2119	2119	case 0x02:
2120	2120	if (ACCESSING_BITS_0_7)
2121		dac_w(device, offset, data, 0x00ff);
	2121	dac_w(device, space, offset, data, 0x00ff);
2122	2122	return;
2123	2123
2124	2124	case 0x03:
2125		dac_w(device, 0, ((data << 13) & 0xe000) | ((data << 10) & 0x1c00) | ((data << 7) & 0x0300), 0xff00);
2126		dac_w(device, 2, ((data << 10) & 0xe000) | ((data <<  7) & 0x1c00) | ((data << 4) & 0x0300), 0xff00);
2127		dac_w(device, 4, ((data <<  8) & 0xc000) | ((data <<  6) & 0x3000) | ((data << 4) & 0x0c00) | ((data << 2) & 0x0300), 0xff00);
	2125	dac_w(device, space, 0, ((data << 13) & 0xe000) | ((data << 10) & 0x1c00) | ((data << 7) & 0x0300), 0xff00);
	2126	dac_w(device, space, 2, ((data << 10) & 0xe000) | ((data <<  7) & 0x1c00) | ((data << 4) & 0x0300), 0xff00);
	2127	dac_w(device, space, 4, ((data <<  8) & 0xc000) | ((data <<  6) & 0x3000) | ((data << 4) & 0x0c00) | ((data << 2) & 0x0300), 0xff00);
2128	2128	return;
2129	2129	}
2130	2130
r17961	r17962
2159	2159	return;
2160	2160
2161	2161	case 0x21:
2162		dac_w(device, offset - 0x21 + 7, data, mem_mask);
	2162	dac_w(device, space, offset - 0x21 + 7, data, mem_mask);
2163	2163	return;
2164	2164	}
2165	2165	}
r17961	r17962
2195	2195	return ((state->m_clock_active << 1) & 0x7e);
2196	2196
2197	2197	case 1:
2198		return main_to_sound_comm_r(device, offset, mem_mask);
	2198	return main_to_sound_comm_r(device, space, offset, mem_mask);
2199	2199
2200	2200	case 2:
2201		return pit8254_r(device, offset, mem_mask);
	2201	return pit8254_r(device, space, offset, mem_mask);
2202	2202
2203	2203	case 3:
2204	2204	if (!state->m_has_ym2151)
2205		return pit8254_r(device, offset | 0x40, mem_mask);
	2205	return pit8254_r(device, space, offset | 0x40, mem_mask);
2206	2206	else
2207		return ym2151_r(device->machine().device("ymsnd"), offset);
	2207	return ym2151_r(device->machine().device("ymsnd"), space, offset);
2208	2208
2209	2209	case 4:
2210	2210	if (state->m_is_redline)
2211		return pit8254_r(device, offset | 0x80, mem_mask);
	2211	return pit8254_r(device, space, offset | 0x80, mem_mask);
2212	2212	else
2213	2213	logerror("%05X:Unexpected peripheral read %d/%02X\n", state->m_i80186.cpu->safe_pc(), select, offset*2);
2214	2214	break;
r17961	r17962
2230	2230	switch (select)
2231	2231	{
2232	2232	case 1:
2233		sound_to_main_comm_w(device, offset, data, mem_mask);
	2233	sound_to_main_comm_w(device, space, offset, data, mem_mask);
2234	2234	break;
2235	2235
2236	2236	case 2:
2237		pit8254_w(device, offset, data, mem_mask);
	2237	pit8254_w(device, space, offset, data, mem_mask);
2238	2238	break;
2239	2239
2240	2240	case 3:
2241	2241	if (!state->m_has_ym2151)
2242		pit8254_w(device, offset | 0x40, data, mem_mask);
	2242	pit8254_w(device, space, offset | 0x40, data, mem_mask);
2243	2243	else
2244		ym2151_w(device->machine().device("ymsnd"), offset, data);
	2244	ym2151_w(device->machine().device("ymsnd"), space, offset, data);
2245	2245	break;
2246	2246
2247	2247	case 4:
2248	2248	if (state->m_is_redline)
2249		pit8254_w(device, offset | 0x80, data, mem_mask);
	2249	pit8254_w(device, space, offset | 0x80, data, mem_mask);
2250	2250	else
2251		dac_10bit_w(device, offset, data, mem_mask);
	2251	dac_10bit_w(device, space, offset, data, mem_mask);
2252	2252	break;
2253	2253
2254	2254	case 5:   /* Ataxx/WSF/Indy Heat only */
2255		ataxx_dac_control(device, offset, data, mem_mask);
	2255	ataxx_dac_control(device, space, offset, data, mem_mask);
2256	2256	break;
2257	2257
2258	2258	default:
r17961	r17962
2276	2276	((data & 0x02) << 5) |
2277	2277	((data & 0x04) << 3) |
2278	2278	((data & 0x08) << 1);
2279		leland_80186_control_w(device, offset, modified);
	2279	leland_80186_control_w(device, space, offset, modified);
2280	2280	}
2281	2281
2282	2282

trunk/src/mame/audio/poolshrk.c

r17961	r17962
157	157
158	158	WRITE8_DEVICE_HANDLER( poolshrk_scratch_sound_w )
159	159	{
160		discrete_sound_w(device, POOLSHRK_SCRATCH_SND, offset & 1);
	160	discrete_sound_w(device, space, POOLSHRK_SCRATCH_SND, offset & 1);
161	161	}
162	162
163	163	WRITE8_DEVICE_HANDLER( poolshrk_score_sound_w )
164	164	{
165		discrete_sound_w(device, POOLSHRK_SCORE_EN, 1); /* this will trigger the sound code for 1 sample */
	165	discrete_sound_w(device, space, POOLSHRK_SCORE_EN, 1); /* this will trigger the sound code for 1 sample */
166	166	}
167	167
168	168	WRITE8_DEVICE_HANDLER( poolshrk_click_sound_w )
169	169	{
170		discrete_sound_w(device, POOLSHRK_CLICK_EN, 1); /* this will trigger the sound code for 1 sample */
	170	discrete_sound_w(device, space, POOLSHRK_CLICK_EN, 1); /* this will trigger the sound code for 1 sample */
171	171	}
172	172
173	173	WRITE8_DEVICE_HANDLER( poolshrk_bump_sound_w )
174	174	{
175		discrete_sound_w(device, POOLSHRK_BUMP_EN, offset & 1);
	175	discrete_sound_w(device, space, POOLSHRK_BUMP_EN, offset & 1);
176	176	}

trunk/src/mame/audio/wiping.h

r17961	r17962
22	22	extern const device_type WIPING;
23	23
24	24
25		WRITE8_DEVICE_HANDLER( wiping_sound_w );
	25	DECLARE_WRITE8_DEVICE_HANDLER( wiping_sound_w );

trunk/src/mame/audio/blockade.c

r17961	r17962
38	38
39	39	WRITE8_DEVICE_HANDLER( blockade_sound_freq_w )
40	40	{
41		discrete_sound_w(device,BLOCKADE_NOTE_DATA, data);
	41	discrete_sound_w(device,space,BLOCKADE_NOTE_DATA, data);
42	42	return;
43	43	}
44	44

trunk/src/mame/audio/firetrk.c

r17961	r17962
16	16	state->m_skid[1] = 0;
17	17
18	18	// also SUPERBUG_SKID_EN
19		discrete_sound_w(device, FIRETRUCK_SKID_EN, 1);
	19	discrete_sound_w(device, space, FIRETRUCK_SKID_EN, 1);
20	20	}
21	21
22	22
23	23	WRITE8_DEVICE_HANDLER( montecar_skid_reset_w )
24	24	{
25		discrete_sound_w(device, MONTECAR_SKID_EN, 1);
	25	discrete_sound_w(device, space, MONTECAR_SKID_EN, 1);
26	26	}
27	27
28	28
29	29	WRITE8_DEVICE_HANDLER( firetrk_crash_snd_w )
30	30	{
31	31	// also SUPERBUG_CRASH_DATA and MONTECAR_CRASH_DATA
32		discrete_sound_w(device, FIRETRUCK_CRASH_DATA, data >> 4);
	32	discrete_sound_w(device, space, FIRETRUCK_CRASH_DATA, data >> 4);
33	33	}
34	34
35	35
36	36	WRITE8_DEVICE_HANDLER( firetrk_skid_snd_w )
37	37	{
38	38	// also SUPERBUG_SKID_EN and MONTECAR_SKID_EN
39		discrete_sound_w(device, FIRETRUCK_SKID_EN, 0);
	39	discrete_sound_w(device, space, FIRETRUCK_SKID_EN, 0);
40	40	}
41	41
42	42
43	43	WRITE8_DEVICE_HANDLER( firetrk_motor_snd_w )
44	44	{
45	45	// also MONTECAR_DRONE_MOTOR_DATA
46		discrete_sound_w(device, FIRETRUCK_SIREN_DATA, data >> 4);
	46	discrete_sound_w(device, space, FIRETRUCK_SIREN_DATA, data >> 4);
47	47
48	48	// also MONTECAR_MOTOR_DATA
49		discrete_sound_w(device, FIRETRUCK_MOTOR_DATA, data & 0x0f);
	49	discrete_sound_w(device, space, FIRETRUCK_MOTOR_DATA, data & 0x0f);
50	50	}
51	51
52	52
53	53	WRITE8_DEVICE_HANDLER( superbug_motor_snd_w )
54	54	{
55		discrete_sound_w(device, SUPERBUG_SPEED_DATA, data & 0x0f);
	55	discrete_sound_w(device, space, SUPERBUG_SPEED_DATA, data & 0x0f);
56	56	}
57	57
58	58
59	59	WRITE8_DEVICE_HANDLER( firetrk_xtndply_w )
60	60	{
61	61	// also SUPERBUG_ASR_EN (extended play)
62		discrete_sound_w(device, FIRETRUCK_XTNDPLY_EN, data);
	62	discrete_sound_w(device, space, FIRETRUCK_XTNDPLY_EN, data);
63	63	}
64	64
65	65

trunk/src/mame/audio/seibu.h

r17961	r17962
60	60	void seibu_sound_decrypt(running_machine &machine,const char *cpu,int length);
61	61
62	62	void seibu_adpcm_decrypt(running_machine &machine, const char *region);
63		WRITE8_DEVICE_HANDLER( seibu_adpcm_adr_w );
64		WRITE8_DEVICE_HANDLER( seibu_adpcm_ctl_w );
	63	DECLARE_WRITE8_DEVICE_HANDLER( seibu_adpcm_adr_w );
	64	DECLARE_WRITE8_DEVICE_HANDLER( seibu_adpcm_ctl_w );
65	65
66	66	class seibu_adpcm_device : public device_t,
67	67	public device_sound_interface

trunk/src/mame/audio/orbit.c

r17961	r17962
15	15
16	16	WRITE8_DEVICE_HANDLER( orbit_note_w )
17	17	{
18		discrete_sound_w(device, ORBIT_NOTE_FREQ, (~data) & 0xff);
	18	discrete_sound_w(device, space, ORBIT_NOTE_FREQ, (~data) & 0xff);
19	19	}
20	20
21	21	WRITE8_DEVICE_HANDLER( orbit_note_amp_w )
22	22	{
23		discrete_sound_w(device, ORBIT_ANOTE1_AMP, data & 0x0f);
24		discrete_sound_w(device, ORBIT_ANOTE2_AMP, data >> 4);
	23	discrete_sound_w(device, space, ORBIT_ANOTE1_AMP, data & 0x0f);
	24	discrete_sound_w(device, space, ORBIT_ANOTE2_AMP, data >> 4);
25	25	}
26	26
27	27	WRITE8_DEVICE_HANDLER( orbit_noise_amp_w )
28	28	{
29		discrete_sound_w(device, ORBIT_NOISE1_AMP, data & 0x0f);
30		discrete_sound_w(device, ORBIT_NOISE2_AMP, data >> 4);
	29	discrete_sound_w(device, space, ORBIT_NOISE1_AMP, data & 0x0f);
	30	discrete_sound_w(device, space, ORBIT_NOISE2_AMP, data >> 4);
31	31	}
32	32
33	33	WRITE8_DEVICE_HANDLER( orbit_noise_rst_w )
34	34	{
35		discrete_sound_w(device, ORBIT_NOISE_EN, 0);
	35	discrete_sound_w(device, space, ORBIT_NOISE_EN, 0);
36	36	}
37	37
38	38

trunk/src/mame/audio/segag80r.c

r17961	r17962
376	376	static SOUND_START( sega005 );
377	377	static STREAM_UPDATE( sega005_stream_update );
378	378	static TIMER_CALLBACK( sega005_auto_timer );
379		static WRITE8_DEVICE_HANDLER( sega005_sound_a_w );
380		static WRITE8_DEVICE_HANDLER( sega005_sound_b_w );
	379	static DECLARE_WRITE8_DEVICE_HANDLER( sega005_sound_a_w );
	380	static DECLARE_WRITE8_DEVICE_HANDLER( sega005_sound_b_w );
381	381
382	382	/*
383	383	005
r17961	r17962
783	783	*************************************/
784	784
785	785	static SOUND_START( monsterb );
786		static WRITE8_DEVICE_HANDLER( monsterb_sound_a_w );
787		static WRITE8_DEVICE_HANDLER( monsterb_sound_b_w );
788		static READ8_DEVICE_HANDLER( n7751_status_r );
789		static WRITE8_DEVICE_HANDLER( n7751_command_w );
790		static WRITE8_DEVICE_HANDLER( n7751_rom_control_w );
	786	static DECLARE_WRITE8_DEVICE_HANDLER( monsterb_sound_a_w );
	787	static DECLARE_WRITE8_DEVICE_HANDLER( monsterb_sound_b_w );
	788	static DECLARE_READ8_DEVICE_HANDLER( n7751_status_r );
	789	static DECLARE_WRITE8_DEVICE_HANDLER( n7751_command_w );
	790	static DECLARE_WRITE8_DEVICE_HANDLER( n7751_rom_control_w );
791	791
792	792
793		static WRITE8_DEVICE_HANDLER( n7751_p2_w );
	793	static DECLARE_WRITE8_DEVICE_HANDLER( n7751_p2_w );
794	794
795	795
796	796	/*
r17961	r17962
1032	1032	{
1033	1033	segag80r_state *state = device->machine().driver_data<segag80r_state>();
1034	1034	/* write to P2; low 4 bits go to 8243 */
1035		i8243_p2_w(device, offset, data & 0x0f);
	1035	i8243_p2_w(device, space, offset, data & 0x0f);
1036	1036
1037	1037	/* output of bit $80 indicates we are ready (1) or busy (0) */
1038	1038	/* no other outputs are used */

trunk/src/mame/audio/scramble.c

r17961	r17962
247	247	{
248	248	static const int tbl[8] = {0,4,2,6,1,5,3,7};
249	249
250		tmsprom_bit_w(device, 0, tbl[data & 0x07]);
	250	tmsprom_bit_w(device, space, 0, tbl[data & 0x07]);
251	251	switch (data>>3)
252	252	{
253	253	case 0x01:
254		tmsprom_rom_csq_w(device, 1, 0);
	254	tmsprom_rom_csq_w(device, space, 1, 0);
255	255	break;
256	256	case 0x03:
257		tmsprom_rom_csq_w(device, 0, 0);
	257	tmsprom_rom_csq_w(device, space, 0, 0);
258	258	break;
259	259	case 0x00:
260	260	/* Rom 2 select */

trunk/src/mame/audio/gottlieb.c

r17961	r17962
772	772	// bit 3 selects which of the two 8913 to enable
773	773	// bit 4 goes to the 8913 BC1 pin
774	774	if ((data & 0x08) != 0)
775		ay8910_data_address_w(m_ay1, data >> 4, m_psg_latch);
	775	ay8910_data_address_w(m_ay1, space, data >> 4, m_psg_latch);
776	776	else
777		ay8910_data_address_w(m_ay2, data >> 4, m_psg_latch);
	777	ay8910_data_address_w(m_ay2, space, data >> 4, m_psg_latch);
778	778	}
779	779	}
780	780	else
r17961	r17962
786	786	else
787	787	{
788	788	ay8913_device *ay = (data & 0x08) ? m_ay1 : m_ay2;
789		ay8910_address_w(ay, 0, m_psg_latch);
790		ay8910_data_w(ay, 0, m_psg_data_latch);
	789	ay8910_address_w(ay, space, 0, m_psg_latch);
	790	ay8910_data_w(ay, space, 0, m_psg_data_latch);
791	791	}
792	792	}
793	793
r17961	r17962
795	795
796	796	// bit 6 = speech chip DATA PRESENT pin; high then low to make the chip read data
797	797	if ((previous & 0x40) == 0 && (data & 0x40) != 0)
798		sp0250_w(m_sp0250, 0, m_sp0250_latch);
	798	sp0250_w(m_sp0250, space, 0, m_sp0250_latch);
799	799
800	800	// bit 7 goes to the speech chip RESET pin
801	801	if ((previous ^ data) & 0x80)

trunk/src/mame/audio/jedi.c

r17961	r17962
143	143	if ((new_speech_strobe_state != m_speech_strobe_state) && new_speech_strobe_state)
144	144	{
145	145	device_t *tms = machine().device("tms");
146		tms5220_data_w(tms, 0, *m_speech_data);
	146	tms5220_data_w(tms, space, 0, *m_speech_data);
147	147	}
148	148	m_speech_strobe_state = new_speech_strobe_state;
149	149	}

trunk/src/mame/audio/exidy.c

r17961	r17962
533	533	if (state->m_tms != NULL)
534	534	{
535	535	logerror("(%f)%s:TMS5220 data write = %02X\n", device->machine().time().as_double(), device->machine().describe_context(), riot6532_porta_out_get(state->m_riot));
536		tms5220_data_w(state->m_tms, 0, data);
	536	tms5220_data_w(state->m_tms, space, 0, data);
537	537	}
538	538	}
539	539
r17961	r17962
542	542	exidy_sound_state *state = get_safe_token(device);
543	543	if (state->m_tms != NULL)
544	544	{
545		logerror("(%f)%s:TMS5220 status read = %02X\n", device->machine().time().as_double(), device->machine().describe_context(), tms5220_status_r(state->m_tms, 0));
546		return tms5220_status_r(state->m_tms, 0);
	545	logerror("(%f)%s:TMS5220 status read = %02X\n", device->machine().time().as_double(), device->machine().describe_context(), tms5220_status_r(state->m_tms, space, 0));
	546	return tms5220_status_r(state->m_tms, space, 0);
547	547	}
548	548	else
549	549	return 0xff;

trunk/src/mame/audio/exidy.h

r17961	r17962
60	60	extern const device_type EXIDY_VICTORY;
61	61
62	62
63		READ8_DEVICE_HANDLER( exidy_sh6840_r );
64		WRITE8_DEVICE_HANDLER( exidy_sh6840_w );
65		WRITE8_DEVICE_HANDLER( exidy_sfxctrl_w );
	63	DECLARE_READ8_DEVICE_HANDLER( exidy_sh6840_r );
	64	DECLARE_WRITE8_DEVICE_HANDLER( exidy_sh6840_w );
	65	DECLARE_WRITE8_DEVICE_HANDLER( exidy_sfxctrl_w );
66	66
67	67	MACHINE_CONFIG_EXTERN( venture_audio );
68	68
69	69	MACHINE_CONFIG_EXTERN( mtrap_cvsd_audio );
70	70
71	71	MACHINE_CONFIG_EXTERN( victory_audio );
72		READ8_DEVICE_HANDLER( victory_sound_response_r );
73		READ8_DEVICE_HANDLER( victory_sound_status_r );
74		WRITE8_DEVICE_HANDLER( victory_sound_command_w );
	72	DECLARE_READ8_DEVICE_HANDLER( victory_sound_response_r );
	73	DECLARE_READ8_DEVICE_HANDLER( victory_sound_status_r );
	74	DECLARE_WRITE8_DEVICE_HANDLER( victory_sound_command_w );

trunk/src/mame/audio/8080bw.c

r17961	r17962
282	282
283	283	WRITE8_DEVICE_HANDLER( indianbt_sh_port_3_w )
284	284	{
285		discrete_sound_w(device, INDIANBT_MUSIC_DATA, data);
	285	discrete_sound_w(device, space, INDIANBT_MUSIC_DATA, data);
286	286	}
287	287
288	288
r17961	r17962
600	600
601	601	WRITE8_DEVICE_HANDLER( polaris_sh_port_1_w )
602	602	{
603		discrete_sound_w(device, POLARIS_MUSIC_DATA, data);
	603	discrete_sound_w(device, space, POLARIS_MUSIC_DATA, data);
604	604	}
605	605
606	606	WRITE8_DEVICE_HANDLER( polaris_sh_port_2_w )
607	607	{
608	608	/* 0x01 - SX0 - Shot */
609		discrete_sound_w(device, POLARIS_SX0_EN, data & 0x01);
	609	discrete_sound_w(device, space, POLARIS_SX0_EN, data & 0x01);
610	610
611	611	/* 0x02 - SX1 - Ship Hit (Sub) */
612		discrete_sound_w(device, POLARIS_SX1_EN, data & 0x02);
	612	discrete_sound_w(device, space, POLARIS_SX1_EN, data & 0x02);
613	613
614	614	/* 0x04 - SX2 - Ship */
615		discrete_sound_w(device, POLARIS_SX2_EN, data & 0x04);
	615	discrete_sound_w(device, space, POLARIS_SX2_EN, data & 0x04);
616	616
617	617	/* 0x08 - SX3 - Explosion */
618		discrete_sound_w(device, POLARIS_SX3_EN, data & 0x08);
	618	discrete_sound_w(device, space, POLARIS_SX3_EN, data & 0x08);
619	619
620	620	/* 0x10 - SX4 */
621	621
622	622	/* 0x20 - SX5 - Sound Enable */
623		discrete_sound_w(device, POLARIS_SX5_EN, data & 0x20);
	623	discrete_sound_w(device, space, POLARIS_SX5_EN, data & 0x20);
624	624	}
625	625
626	626	WRITE8_DEVICE_HANDLER( polaris_sh_port_3_w )
r17961	r17962
632	632	state->m_c8080bw_flip_screen = data & 0x20;      /* SX11 */
633	633
634	634	/* 0x01 - SX6 - Plane Down */
635		discrete_sound_w(device, POLARIS_SX6_EN, data & 0x01);
	635	discrete_sound_w(device, space, POLARIS_SX6_EN, data & 0x01);
636	636
637	637	/* 0x02 - SX7 - Plane Up */
638		discrete_sound_w(device, POLARIS_SX7_EN, data & 0x02);
	638	discrete_sound_w(device, space, POLARIS_SX7_EN, data & 0x02);
639	639
640	640	/* 0x08 - SX9 - Hit */
641		discrete_sound_w(device, POLARIS_SX9_EN, data & 0x08);
	641	discrete_sound_w(device, space, POLARIS_SX9_EN, data & 0x08);
642	642
643	643	/* 0x10 - SX10 - Hit */
644		discrete_sound_w(device, POLARIS_SX10_EN, data & 0x10);
	644	discrete_sound_w(device, space, POLARIS_SX10_EN, data & 0x10);
645	645	}
646	646
647	647
r17961	r17962
789	789	bit 5 - Explosion (SX5) */
790	790
791	791	//printf( "schaser_sh_port_1_w: %02x\n", data );
792		discrete_sound_w(m_discrete, SCHASER_DOT_EN, data & 0x01);
793		discrete_sound_w(m_discrete, SCHASER_DOT_SEL, data & 0x02);
	792	discrete_sound_w(m_discrete, space, SCHASER_DOT_EN, data & 0x01);
	793	discrete_sound_w(m_discrete, space, SCHASER_DOT_SEL, data & 0x02);
794	794
795	795	/* The effect is a variable rate 555 timer.  A diode/resistor array is used to
796	796	* select the frequency.  Because of the diode voltage drop, we can not use the
r17961	r17962
854	854
855	855	//printf( "schaser_sh_port_2_w: %02x\n", data );
856	856
857		discrete_sound_w(m_discrete, SCHASER_MUSIC_BIT, data & 0x01);
	857	discrete_sound_w(m_discrete, space, SCHASER_MUSIC_BIT, data & 0x01);
858	858
859		discrete_sound_w(m_discrete, SCHASER_SND_EN, data & 0x02);
	859	discrete_sound_w(m_discrete, space, SCHASER_SND_EN, data & 0x02);
860	860	machine().sound().system_enable(data & 0x02);
861	861
862	862	coin_lockout_global_w(machine(), data & 0x04);

trunk/src/mame/audio/m79amb.c

r17961	r17962
325	325	/* these values are not latched */
326	326	/* they are pulsed when the port is addressed */
327	327	/* the discrete system will just trigger from them */
328		discrete_sound_w(device, M79AMB_SHOT_EN, data & 0x01);
329		discrete_sound_w(device, M79AMB_BOOM_EN, data & 0x02);
330		discrete_sound_w(device, M79AMB_THUD_EN, data & 0x04);
	328	discrete_sound_w(device, space, M79AMB_SHOT_EN, data & 0x01);
	329	discrete_sound_w(device, space, M79AMB_BOOM_EN, data & 0x02);
	330	discrete_sound_w(device, space, M79AMB_THUD_EN, data & 0x04);
331	331	};
332	332
333	333	WRITE8_DEVICE_HANDLER( m79amb_8003_w )
r17961	r17962
335	335	/* Self Test goes low on reset and lights LED */
336	336	/* LED goes off on pass */
337	337	output_set_value("SELF_TEST", data & 0x01);
338		discrete_sound_w(device, M79AMB_MC_REV_EN, data & 0x02);
339		discrete_sound_w(device, M79AMB_MC_CONTROL_EN, data & 0x04);
340		discrete_sound_w(device, M79AMB_TANK_TRUCK_JEEP_EN, data & 0x08);
341		discrete_sound_w(device, M79AMB_WHISTLE_B_EN, data & 0x10);
342		discrete_sound_w(device, M79AMB_WHISTLE_A_EN, data & 0x20);
	338	discrete_sound_w(device, space, M79AMB_MC_REV_EN, data & 0x02);
	339	discrete_sound_w(device, space, M79AMB_MC_CONTROL_EN, data & 0x04);
	340	discrete_sound_w(device, space, M79AMB_TANK_TRUCK_JEEP_EN, data & 0x08);
	341	discrete_sound_w(device, space, M79AMB_WHISTLE_B_EN, data & 0x10);
	342	discrete_sound_w(device, space, M79AMB_WHISTLE_A_EN, data & 0x20);
343	343	}

trunk/src/mame/audio/qix.c

r17961	r17962
28	28
29	29	static WRITE8_DEVICE_HANDLER( qix_dac_w )
30	30	{
31		discrete_sound_w(device, QIX_DAC_DATA, data);
	31	discrete_sound_w(device, space, QIX_DAC_DATA, data);
32	32	}
33	33
34	34	static WRITE8_DEVICE_HANDLER( qix_vol_w )
35	35	{
36		discrete_sound_w(device, QIX_VOL_DATA, data);
	36	discrete_sound_w(device, space, QIX_VOL_DATA, data);
37	37	}
38	38
39	39

trunk/src/mame/audio/spiders.c

r17961	r17962
182	182
183	183	WRITE8_DEVICE_HANDLER( spiders_audio_a_w )
184	184	{
185		discrete_sound_w(device, SPIDER_WEB_SOUND_MOD_DATA, 1 + (data & 4) * 8 + (data & 2) * 4 + (data & 1) * 2);
	185	discrete_sound_w(device, space, SPIDER_WEB_SOUND_MOD_DATA, 1 + (data & 4) * 8 + (data & 2) * 4 + (data & 1) * 2);
186	186	}
187	187
188	188	WRITE8_DEVICE_HANDLER( spiders_audio_b_w )
189	189	{
190		discrete_sound_w(device, SPIDERS_WEB_SOUND_DATA, data);
	190	discrete_sound_w(device, space, SPIDERS_WEB_SOUND_DATA, data);
191	191	}
192	192
193	193
194	194	WRITE8_DEVICE_HANDLER( spiders_audio_ctrl_w )
195	195	{
196		discrete_sound_w(device, SPIDERS_FIRE_EN, data & 0x10 ? 1 : 0);
197		discrete_sound_w(device, SPIDERS_EXP_EN, data & 0x08 ? 1 : 0);
198		discrete_sound_w(device, SPIDERS_SUPER_WEB_EXPL_EN, data & 0x04 ? 1 : 0);
199		discrete_sound_w(device, SPIDERS_SUPER_WEB_EN, data & 0x02 ? 1 : 0);
200		discrete_sound_w(device, SPIDERS_X_EN, data & 0x01 ? 1 : 0);
	196	discrete_sound_w(device, space, SPIDERS_FIRE_EN, data & 0x10 ? 1 : 0);
	197	discrete_sound_w(device, space, SPIDERS_EXP_EN, data & 0x08 ? 1 : 0);
	198	discrete_sound_w(device, space, SPIDERS_SUPER_WEB_EXPL_EN, data & 0x04 ? 1 : 0);
	199	discrete_sound_w(device, space, SPIDERS_SUPER_WEB_EN, data & 0x02 ? 1 : 0);
	200	discrete_sound_w(device, space, SPIDERS_X_EN, data & 0x01 ? 1 : 0);
201	201	}
202	202
203	203

trunk/src/mame/audio/hyprolyb.h

r17961	r17962
1		WRITE8_DEVICE_HANDLER( hyprolyb_adpcm_w );
2		READ8_DEVICE_HANDLER( hyprolyb_adpcm_busy_r );
	1	DECLARE_WRITE8_DEVICE_HANDLER( hyprolyb_adpcm_w );
	2	DECLARE_READ8_DEVICE_HANDLER( hyprolyb_adpcm_busy_r );
3	3
4	4	MACHINE_CONFIG_EXTERN( hyprolyb_adpcm );
5	5

trunk/src/mame/audio/llander.c

r17961	r17962
83	83	WRITE8_DEVICE_HANDLER( llander_snd_reset_w )
84	84	{
85	85	/* Resets the LFSR that is used for the white noise generator       */
86		discrete_sound_w(device, LLANDER_NOISE_RESET, 0);            /* Reset */
	86	discrete_sound_w(device, space, LLANDER_NOISE_RESET, 0);            /* Reset */
87	87	}
88	88
89	89	WRITE8_DEVICE_HANDLER( llander_sounds_w )
90	90	{
91		discrete_sound_w(device, LLANDER_THRUST_DATA, data & 0x07);      /* Thrust volume */
92		discrete_sound_w(device, LLANDER_TONE3K_EN, data & 0x10);      /* Tone 3KHz enable */
93		discrete_sound_w(device, LLANDER_TONE6K_EN, data & 0x20);      /* Tone 6KHz enable */
94		discrete_sound_w(device, LLANDER_EXPLOD_EN, data & 0x08);      /* Explosion */
	91	discrete_sound_w(device, space, LLANDER_THRUST_DATA, data & 0x07);      /* Thrust volume */
	92	discrete_sound_w(device, space, LLANDER_TONE3K_EN, data & 0x10);      /* Tone 3KHz enable */
	93	discrete_sound_w(device, space, LLANDER_TONE6K_EN, data & 0x20);      /* Tone 6KHz enable */
	94	discrete_sound_w(device, space, LLANDER_EXPLOD_EN, data & 0x08);      /* Explosion */
95	95	}
96	96

trunk/src/mame/audio/canyon.c

r17961	r17962
16	16
17	17	WRITE8_DEVICE_HANDLER( canyon_motor_w )
18	18	{
19		discrete_sound_w(device, NODE_RELATIVE(CANYON_MOTOR1_DATA, (offset & 0x01)), data & 0x0f);
	19	discrete_sound_w(device, space, NODE_RELATIVE(CANYON_MOTOR1_DATA, (offset & 0x01)), data & 0x0f);
20	20	}
21	21
22	22
23	23	WRITE8_DEVICE_HANDLER( canyon_explode_w )
24	24	{
25		discrete_sound_w(device, CANYON_EXPLODE_DATA, data >> 4);
	25	discrete_sound_w(device, space, CANYON_EXPLODE_DATA, data >> 4);
26	26	}
27	27
28	28
29	29	WRITE8_DEVICE_HANDLER( canyon_attract_w )
30	30	{
31		discrete_sound_w(device, NODE_RELATIVE(CANYON_ATTRACT1_EN, (offset & 0x01)), offset & 0x02);
	31	discrete_sound_w(device, space, NODE_RELATIVE(CANYON_ATTRACT1_EN, (offset & 0x01)), offset & 0x02);
32	32	}
33	33
34	34
35	35	WRITE8_DEVICE_HANDLER( canyon_whistle_w )
36	36	{
37		discrete_sound_w(device, NODE_RELATIVE(CANYON_WHISTLE1_EN, (offset & 0x01)), offset & 0x02);
	37	discrete_sound_w(device, space, NODE_RELATIVE(CANYON_WHISTLE1_EN, (offset & 0x01)), offset & 0x02);
38	38	}
39	39
40	40

trunk/src/mame/audio/circus.c

r17961	r17962
184	184	switch ((data & 0x70) >> 4)
185	185	{
186	186	case 0 : /* All Off */
187		discrete_sound_w(m_discrete, CIRCUS_MUSIC_BIT, 0);
	187	discrete_sound_w(m_discrete, space, CIRCUS_MUSIC_BIT, 0);
188	188	break;
189	189
190	190	case 1 : /* Music */
191		discrete_sound_w(m_discrete, CIRCUS_MUSIC_BIT, 1);
	191	discrete_sound_w(m_discrete, space, CIRCUS_MUSIC_BIT, 1);
192	192	break;
193	193
194	194	case 2 : /* Circus = Pop; Rip Cord = Splash */
r17961	r17962
217	217	break;
218	218
219	219	case 2:   /* robotbwl */
220		discrete_sound_w(m_discrete, ROBOTBWL_MUSIC_BIT, data & 0x08);   /* Footsteps */
	220	discrete_sound_w(m_discrete, space, ROBOTBWL_MUSIC_BIT, data & 0x08);   /* Footsteps */
221	221
222	222	if (data & 0x40)   /* Hit */
223	223	m_samples->start(0, 0);
r17961	r17962
242	242	switch ((data & 0x70) >> 4)
243	243	{
244	244	case 0 : /* All Off */
245		discrete_sound_w(m_discrete, CRASH_MUSIC_BIT, 0);
	245	discrete_sound_w(m_discrete, space, CRASH_MUSIC_BIT, 0);
246	246	break;
247	247
248	248	case 1 : /* Music */
249		discrete_sound_w(m_discrete, CRASH_MUSIC_BIT, 1);
	249	discrete_sound_w(m_discrete, space, CRASH_MUSIC_BIT, 1);
250	250	break;
251	251
252	252	case 2 : /* Crash */
r17961	r17962
254	254	break;
255	255
256	256	case 3 : /* Normal Video and Beep */
257		discrete_sound_w(m_discrete, CRASH_BEEPER_EN, 0);
	257	discrete_sound_w(m_discrete, space, CRASH_BEEPER_EN, 0);
258	258	break;
259	259
260	260	case 4 : /* Skid */
261	261	break;
262	262
263	263	case 5 : /* Invert Video and Beep */
264		discrete_sound_w(m_discrete, CRASH_BEEPER_EN, 0);
	264	discrete_sound_w(m_discrete, space, CRASH_BEEPER_EN, 0);
265	265	break;
266	266
267	267	case 6 : /* Hi Motor */

trunk/src/mame/audio/midway.c

r17961	r17962
1198	1198	// write strobe -- pass the current command to the TMS5200
1199	1199	if (((data ^ m_tms_strobes) & 0x02) && !(data & 0x02))
1200	1200	{
1201		tms5220_data_w(m_tms5200, offset, m_tms_command);
	1201	tms5220_data_w(m_tms5200, space, offset, m_tms_command);
1202	1202
1203	1203	// DoT expects the ready line to transition on a command/write here, so we oblige
1204	1204	m_pia1->ca2_w(1);
r17961	r17962
1208	1208	// read strobe -- read the current status from the TMS5200
1209	1209	else if (((data ^ m_tms_strobes) & 0x01) && !(data & 0x01))
1210	1210	{
1211		m_pia1->porta_w(tms5220_status_r(m_tms5200, offset));
	1211	m_pia1->porta_w(tms5220_status_r(m_tms5200, space, offset));
1212	1212
1213	1213	// DoT expects the ready line to transition on a command/write here, so we oblige
1214	1214	m_pia1->ca2_w(1);

trunk/src/mame/audio/trackfld.h

r17961	r17962
1	1	WRITE8_HANDLER( konami_sh_irqtrigger_w );
2	2	READ8_HANDLER( trackfld_sh_timer_r );
3		READ8_DEVICE_HANDLER( trackfld_speech_r );
4		WRITE8_DEVICE_HANDLER( trackfld_sound_w );
	3	DECLARE_READ8_DEVICE_HANDLER( trackfld_speech_r );
	4	DECLARE_WRITE8_DEVICE_HANDLER( trackfld_sound_w );
5	5	READ8_HANDLER( hyperspt_sh_timer_r );
6		WRITE8_DEVICE_HANDLER( hyperspt_sound_w );
	6	DECLARE_WRITE8_DEVICE_HANDLER( hyperspt_sound_w );
7	7	WRITE8_HANDLER( konami_SN76496_latch_w );
8		WRITE8_DEVICE_HANDLER( konami_SN76496_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( konami_SN76496_w );
9	9
10	10	class trackfld_audio_device : public device_t,
11	11	public device_sound_interface

trunk/src/mame/audio/crbaloon.c

r17961	r17962
32	32
33	33	WRITE8_DEVICE_HANDLER( crbaloon_audio_set_music_freq )
34	34	{
35		discrete_sound_w(device, CRBALOON_MUSIC_DATA, data);
	35	discrete_sound_w(device, space, CRBALOON_MUSIC_DATA, data);
36	36	}
37	37
38	38
39	39	WRITE8_DEVICE_HANDLER( crbaloon_audio_set_music_enable )
40	40	{
41		discrete_sound_w(device, CRBALOON_MUSIC_EN, data);
	41	discrete_sound_w(device, space, CRBALOON_MUSIC_EN, data);
42	42	}
43	43
44	44
r17961	r17962
66	66
67	67	WRITE8_DEVICE_HANDLER( crbaloon_audio_set_laugh_enable )
68	68	{
69		discrete_sound_w(device, CRBALOON_LAUGH_EN, data);
	69	discrete_sound_w(device, space, CRBALOON_LAUGH_EN, data);
70	70	}
71	71
72	72

trunk/src/mame/audio/namco54.c

r17961	r17962
93	93	namco_54xx_state *state = get_safe_token(space->device().owner());
94	94	UINT8 out = (data & 0x0f);
95	95	if (data & 0x10)
96		discrete_sound_w(state->m_discrete, NAMCO_54XX_1_DATA(state->m_basenode), out);
	96	discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_1_DATA(state->m_basenode), out);
97	97	else
98		discrete_sound_w(state->m_discrete, NAMCO_54XX_0_DATA(state->m_basenode), out);
	98	discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_0_DATA(state->m_basenode), out);
99	99	}
100	100
101	101	static WRITE8_HANDLER( namco_54xx_R1_w )
r17961	r17962
103	103	namco_54xx_state *state = get_safe_token(space->device().owner());
104	104	UINT8 out = (data & 0x0f);
105	105
106		discrete_sound_w(state->m_discrete, NAMCO_54XX_2_DATA(state->m_basenode), out);
	106	discrete_sound_w(state->m_discrete, *space, NAMCO_54XX_2_DATA(state->m_basenode), out);
107	107	}
108	108
109	109

trunk/src/mame/audio/snk6502.c

r17961	r17962
957	957	}
958	958
959	959	/* BOMB */
960		discrete_sound_w(space->machine().device("discrete"), FANTASY_BOMB_EN, data & 0x80);
	960	discrete_sound_w(space->machine().device("discrete"), *space, FANTASY_BOMB_EN, data & 0x80);
961	961
962	962	state->m_LastPort1 = data;
963	963	break;

trunk/src/mame/audio/namco54.h

r17961	r17962
17	17	MCFG_DEVICE_CONFIG(_config)
18	18
19	19
20		WRITE8_DEVICE_HANDLER( namco_54xx_write );
	20	DECLARE_WRITE8_DEVICE_HANDLER( namco_54xx_write );
21	21
22	22
23	23	class namco_54xx_device : public device_t

trunk/src/mame/audio/vicdual.c

r17961	r17962
151	151	int new_croak = data & 0x08;
152	152	int new_buzzz = data & 0x10;
153	153
154		//  discrete_sound_w(discrete, FROGS_HOP_EN, data & 0x01);
155		//  discrete_sound_w(discrete, FROGS_JUMP_EN, data & 0x02);
156		discrete_sound_w(discrete, FROGS_TONGUE_EN, data & 0x04);
157		//  discrete_sound_w(discrete, FROGS_CAPTURE_EN, data & 0x08);
158		//  discrete_sound_w(discrete, FROGS_FLY_EN, data & 0x10);
159		//  discrete_sound_w(discrete, FROGS_SPLASH_EN, data & 0x80);
	154	//  discrete_sound_w(discrete, *space, FROGS_HOP_EN, data & 0x01);
	155	//  discrete_sound_w(discrete, *space, FROGS_JUMP_EN, data & 0x02);
	156	discrete_sound_w(discrete, *space, FROGS_TONGUE_EN, data & 0x04);
	157	//  discrete_sound_w(discrete, *space, FROGS_CAPTURE_EN, data & 0x08);
	158	//  discrete_sound_w(discrete, *space, FROGS_FLY_EN, data & 0x10);
	159	//  discrete_sound_w(discrete, *space, FROGS_SPLASH_EN, data & 0x80);
160	160
161	161	if (data & 0x01)
162	162	samples->start(3, 3);   // Hop
r17961	r17962
464	464	device_t *discrete = space->machine().device("discrete");
465	465	if (discrete == NULL)
466	466	return;
467		discrete_sound_w(discrete, HEADON_HISPEED_PC_EN, data & 0x01);
468		discrete_sound_w(discrete, HEADON_SCREECH1_EN, data & 0x02);
469		discrete_sound_w(discrete, HEADON_CRASH_EN, data & 0x04);
470		discrete_sound_w(discrete, HEADON_HISPEED_CC_EN, data & 0x08);
471		discrete_sound_w(discrete, HEADON_SCREECH2_EN, data & 0x10);
472		discrete_sound_w(discrete, HEADON_BONUS_EN, data & 0x20);
473		discrete_sound_w(discrete, HEADON_CAR_ON_EN, data & 0x40);
	467	discrete_sound_w(discrete, *space, HEADON_HISPEED_PC_EN, data & 0x01);
	468	discrete_sound_w(discrete, *space, HEADON_SCREECH1_EN, data & 0x02);
	469	discrete_sound_w(discrete, *space, HEADON_CRASH_EN, data & 0x04);
	470	discrete_sound_w(discrete, *space, HEADON_HISPEED_CC_EN, data & 0x08);
	471	discrete_sound_w(discrete, *space, HEADON_SCREECH2_EN, data & 0x10);
	472	discrete_sound_w(discrete, *space, HEADON_BONUS_EN, data & 0x20);
	473	discrete_sound_w(discrete, *space, HEADON_CAR_ON_EN, data & 0x40);
474	474
475	475	}
476	476
r17961	r17962
479	479	device_t *discrete = space->machine().device("discrete");
480	480	if (discrete == NULL)
481	481	return;
482		discrete_sound_w(discrete, HEADON_HISPEED_PC_EN, data & 0x10);
483		discrete_sound_w(discrete, HEADON_SCREECH1_EN, data & 0x08);
484		discrete_sound_w(discrete, HEADON_CRASH_EN, data & 0x80);
485		discrete_sound_w(discrete, HEADON_HISPEED_CC_EN, data & 0x40);
486		discrete_sound_w(discrete, HEADON_SCREECH2_EN, data & 0x04);
487		discrete_sound_w(discrete, HEADON_BONUS_EN, data & 0x02);
488		discrete_sound_w(discrete, HEADON_CAR_ON_EN, data & 0x20);
	482	discrete_sound_w(discrete, *space, HEADON_HISPEED_PC_EN, data & 0x10);
	483	discrete_sound_w(discrete, *space, HEADON_SCREECH1_EN, data & 0x08);
	484	discrete_sound_w(discrete, *space, HEADON_CRASH_EN, data & 0x80);
	485	discrete_sound_w(discrete, *space, HEADON_HISPEED_CC_EN, data & 0x40);
	486	discrete_sound_w(discrete, *space, HEADON_SCREECH2_EN, data & 0x04);
	487	discrete_sound_w(discrete, *space, HEADON_BONUS_EN, data & 0x02);
	488	discrete_sound_w(discrete, *space, HEADON_CAR_ON_EN, data & 0x20);
489	489
490	490	}
491	491

trunk/src/mame/audio/irem.c

r17961	r17962
98	98	{
99	99	/* PSG 0 or 1? */
100	100	if (state->m_port2 & 0x08)
101		ay8910_address_w(state->m_ay1, 0, state->m_port1);
	101	ay8910_address_w(state->m_ay1, space, 0, state->m_port1);
102	102	if (state->m_port2 & 0x10)
103		ay8910_address_w(state->m_ay2, 0, state->m_port1);
	103	ay8910_address_w(state->m_ay2, space, 0, state->m_port1);
104	104	}
105	105	else
106	106	{
107	107	/* PSG 0 or 1? */
108	108	if (state->m_port2 & 0x08)
109		ay8910_data_w(state->m_ay1, 0, state->m_port1);
	109	ay8910_data_w(state->m_ay1, space, 0, state->m_port1);
110	110	if (state->m_port2 & 0x10)
111		ay8910_data_w(state->m_ay2, 0, state->m_port1);
	111	ay8910_data_w(state->m_ay2, space, 0, state->m_port1);
112	112	}
113	113	}
114	114	state->m_port2 = data;
r17961	r17962
128	128
129	129	/* PSG 0 or 1? */
130	130	if (state->m_port2 & 0x08)
131		return ay8910_r(state->m_ay1, 0);
	131	return ay8910_r(state->m_ay1, space, 0);
132	132	if (state->m_port2 & 0x10)
133		return ay8910_r(state->m_ay2, 0);
	133	return ay8910_r(state->m_ay2, space, 0);
134	134	return 0xff;
135	135	}
136	136

trunk/src/mame/audio/bsktball.c

r17961	r17962
12	12	***************************************************************************/
13	13	WRITE8_DEVICE_HANDLER( bsktball_bounce_w )
14	14	{
15		discrete_sound_w(device, BSKTBALL_CROWD_DATA, data & 0x0f);   // Crowd
16		discrete_sound_w(device, BSKTBALL_BOUNCE_EN, data & 0x10);   // Bounce
	15	discrete_sound_w(device, space, BSKTBALL_CROWD_DATA, data & 0x0f);   // Crowd
	16	discrete_sound_w(device, space, BSKTBALL_BOUNCE_EN, data & 0x10);   // Bounce
17	17	}
18	18
19	19	WRITE8_DEVICE_HANDLER( bsktball_note_w )
20	20	{
21		discrete_sound_w(device, BSKTBALL_NOTE_DATA, data);   // Note
	21	discrete_sound_w(device, space, BSKTBALL_NOTE_DATA, data);   // Note
22	22	}
23	23
24	24	WRITE8_DEVICE_HANDLER( bsktball_noise_reset_w )
25	25	{
26		discrete_sound_w(device, BSKTBALL_NOISE_EN, offset & 0x01);
	26	discrete_sound_w(device, space, BSKTBALL_NOISE_EN, offset & 0x01);
27	27	}
28	28
29	29

trunk/src/mame/audio/dkong.c

r17961	r17962
1214	1214
1215	1215	static WRITE8_DEVICE_HANDLER( M58817_command_w )
1216	1216	{
1217		tms5110_ctl_w(device, 0, data & 0x0f);
	1217	tms5110_ctl_w(device, space, 0, data & 0x0f);
1218	1218	tms5110_pdc_w(device, (data>>4) & 0x01);
1219	1219	/* FIXME 0x20 is CS */
1220	1220	}
r17961	r17962
1234	1234	logerror("dkong_speech_w: 0x%02x\n", data);
1235	1235	}
1236	1236
	1237	static DECLARE_READ8_DEVICE_HANDLER( dkong_voice_status_r );
1237	1238	static READ8_DEVICE_HANDLER( dkong_voice_status_r )
1238	1239	{
1239	1240	/* only provided for documentation purposes
r17961	r17962
1245	1246	static READ8_DEVICE_HANDLER( dkong_tune_r )
1246	1247	{
1247	1248	dkong_state *state = device->machine().driver_data<dkong_state>();
1248		UINT8 page = latch8_r(state->m_dev_vp2, 0) & 0x47;
	1249	UINT8 page = latch8_r(state->m_dev_vp2, space, 0) & 0x47;
1249	1250
1250	1251	if ( page & 0x40 )
1251	1252	{
1252		return (latch8_r(device, 0) & 0x0F) | (dkong_voice_status_r(device, 0) << 4);
	1253	return (latch8_r(device, space, 0) & 0x0F) | (dkong_voice_status_r(device, space, 0) << 4);
1253	1254	}
1254	1255	else
1255	1256	{
r17961	r17962
1260	1261
1261	1262	static WRITE8_DEVICE_HANDLER( dkong_p1_w )
1262	1263	{
1263		discrete_sound_w(device,DS_DAC,data);
	1264	discrete_sound_w(device,space,DS_DAC,data);
1264	1265	}
1265	1266
1266	1267

trunk/src/mame/audio/skyraid.c

r17961	r17962
292	292	/* BIT4 => PLANE ON    */
293	293	/* BIT5 => ATTRACT     */
294	294
295		discrete_sound_w(device, SKYRAID_PLANE_SWEEP_EN, data & 0x01);
296		discrete_sound_w(device, SKYRAID_MISSILE_EN, data & 0x02);
297		discrete_sound_w(device, SKYRAID_EXPLOSION_EN, data & 0x04);
	295	discrete_sound_w(device, space, SKYRAID_PLANE_SWEEP_EN, data & 0x01);
	296	discrete_sound_w(device, space, SKYRAID_MISSILE_EN, data & 0x02);
	297	discrete_sound_w(device, space, SKYRAID_EXPLOSION_EN, data & 0x04);
298	298	set_led_status(device->machine(), 0, !(data & 0x08));
299		discrete_sound_w(device, SKYRAID_PLANE_ON_EN, data & 0x10);
300		discrete_sound_w(device, SKYRAID_ATTRACT_EN, data & 0x20);
	299	discrete_sound_w(device, space, SKYRAID_PLANE_ON_EN, data & 0x10);
	300	discrete_sound_w(device, space, SKYRAID_ATTRACT_EN, data & 0x20);
301	301	}

trunk/src/mame/audio/sprint8.c

r17961	r17962
295	295
296	296	WRITE8_DEVICE_HANDLER( sprint8_crash_w )
297	297	{
298		discrete_sound_w(device, SPRINT8_CRASH_EN, data & 0x01);
	298	discrete_sound_w(device, space, SPRINT8_CRASH_EN, data & 0x01);
299	299	}
300	300
301	301	WRITE8_DEVICE_HANDLER( sprint8_screech_w )
302	302	{
303		discrete_sound_w(device, SPRINT8_SCREECH_EN, data & 0x01);
	303	discrete_sound_w(device, space, SPRINT8_SCREECH_EN, data & 0x01);
304	304	}
305	305
306	306	WRITE8_DEVICE_HANDLER( sprint8_attract_w )
307	307	{
308		discrete_sound_w(device, SPRINT8_ATTRACT_EN, data & 0x01);
	308	discrete_sound_w(device, space, SPRINT8_ATTRACT_EN, data & 0x01);
309	309	}
310	310
311	311	WRITE8_DEVICE_HANDLER( sprint8_motor_w )
312	312	{
313		discrete_sound_w(device, NODE_RELATIVE(SPRINT8_MOTOR1_EN, offset & 0x07), data & 0x01);
	313	discrete_sound_w(device, space, NODE_RELATIVE(SPRINT8_MOTOR1_EN, offset & 0x07), data & 0x01);
314	314	}

trunk/src/mame/audio/m72.h

r17961	r17962
5	5	****************************************************************************/
6	6
7	7	void m72_ym2151_irq_handler(device_t *device, int irq);
8		WRITE8_DEVICE_HANDLER( m72_sound_command_byte_w );
9		WRITE16_DEVICE_HANDLER( m72_sound_command_w );
10		WRITE8_DEVICE_HANDLER( m72_sound_irq_ack_w );
11		READ8_DEVICE_HANDLER( m72_sample_r );
12		WRITE8_DEVICE_HANDLER( m72_sample_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( m72_sound_command_byte_w );
	9	DECLARE_WRITE16_DEVICE_HANDLER( m72_sound_command_w );
	10	DECLARE_WRITE8_DEVICE_HANDLER( m72_sound_irq_ack_w );
	11	DECLARE_READ8_DEVICE_HANDLER( m72_sample_r );
	12	DECLARE_WRITE8_DEVICE_HANDLER( m72_sample_w );
13	13
14	14	/* the port goes to different address bits depending on the game */
15	15	void m72_set_sample_start(device_t *device, int start);
16		WRITE8_DEVICE_HANDLER( vigilant_sample_addr_w );
17		WRITE8_DEVICE_HANDLER( shisen_sample_addr_w );
18		WRITE8_DEVICE_HANDLER( rtype2_sample_addr_w );
19		WRITE8_DEVICE_HANDLER( poundfor_sample_addr_w );
	16	DECLARE_WRITE8_DEVICE_HANDLER( vigilant_sample_addr_w );
	17	DECLARE_WRITE8_DEVICE_HANDLER( shisen_sample_addr_w );
	18	DECLARE_WRITE8_DEVICE_HANDLER( rtype2_sample_addr_w );
	19	DECLARE_WRITE8_DEVICE_HANDLER( poundfor_sample_addr_w );
20	20
21	21	class m72_audio_device : public device_t,
22	22	public device_sound_interface

trunk/src/mame/audio/snes_snd.c

r17961	r17962
1068	1068	I/O for DSP
1069	1069	***************************/
1070	1070
	1071	static DECLARE_READ8_DEVICE_HANDLER( snes_dsp_io_r );
1071	1072	static READ8_DEVICE_HANDLER( snes_dsp_io_r )
1072	1073	{
1073	1074	snes_sound_state *spc700 = get_safe_token(device);
r17961	r17962
1083	1084	return spc700->dsp_regs[offset & 0x7f];
1084	1085	}
1085	1086
	1087	static DECLARE_WRITE8_DEVICE_HANDLER( snes_dsp_io_w );
1086	1088	static WRITE8_DEVICE_HANDLER( snes_dsp_io_w )
1087	1089	{
1088	1090	snes_sound_state *spc700 = get_safe_token(device);
r17961	r17962
1118	1120	case 0x2:      /* Register address */
1119	1121	return spc700->ram[0xf2];
1120	1122	case 0x3:      /* Register data */
1121		return snes_dsp_io_r(device, spc700->ram[0xf2]);
	1123	return snes_dsp_io_r(device, space, spc700->ram[0xf2]);
1122	1124	case 0x4:      /* Port 0 */
1123	1125	case 0x5:      /* Port 1 */
1124	1126	case 0x6:      /* Port 2 */
r17961	r17962
1186	1188	break;
1187	1189	case 0x3:      /* Register data - 0x80-0xff is a read-only mirror of 0x00-0x7f */
1188	1190	if (!(spc700->ram[0xf2] & 0x80))
1189		snes_dsp_io_w(device, spc700->ram[0xf2] & 0x7f, data);
	1191	snes_dsp_io_w(device, space, spc700->ram[0xf2] & 0x7f, data);
1190	1192	break;
1191	1193	case 0x4:      /* Port 0 */
1192	1194	case 0x5:      /* Port 1 */

trunk/src/mame/audio/snes_snd.h

r17961	r17962
46	46	I/O PROTOTYPES
47	47	***************************************************************************/
48	48
49		READ8_DEVICE_HANDLER( spc_io_r );
50		WRITE8_DEVICE_HANDLER( spc_io_w );
51		READ8_DEVICE_HANDLER( spc_ram_r );
52		WRITE8_DEVICE_HANDLER( spc_ram_w );
53		READ8_DEVICE_HANDLER( spc_port_out );
54		WRITE8_DEVICE_HANDLER( spc_port_in );
	49	DECLARE_READ8_DEVICE_HANDLER( spc_io_r );
	50	DECLARE_WRITE8_DEVICE_HANDLER( spc_io_w );
	51	DECLARE_READ8_DEVICE_HANDLER( spc_ram_r );
	52	DECLARE_WRITE8_DEVICE_HANDLER( spc_ram_w );
	53	DECLARE_READ8_DEVICE_HANDLER( spc_port_out );
	54	DECLARE_WRITE8_DEVICE_HANDLER( spc_port_in );
55	55
56	56	UINT8 *spc_get_ram(device_t *device);
57	57	void spc700_set_volume(device_t *device,int volume);

trunk/src/mame/audio/pleiads.h

r17961	r17962
1		WRITE8_DEVICE_HANDLER( pleiads_sound_control_a_w );
2		WRITE8_DEVICE_HANDLER( pleiads_sound_control_b_w );
3		WRITE8_DEVICE_HANDLER( pleiads_sound_control_c_w );
	1	DECLARE_WRITE8_DEVICE_HANDLER( pleiads_sound_control_a_w );
	2	DECLARE_WRITE8_DEVICE_HANDLER( pleiads_sound_control_b_w );
	3	DECLARE_WRITE8_DEVICE_HANDLER( pleiads_sound_control_c_w );
4	4
5	5	class pleiads_sound_device : public device_t,
6	6	public device_sound_interface

trunk/src/mame/audio/redalert.c

r17961	r17962
86	86
87	87	/* BC1=1, BDIR=0 : read from PSG */
88	88	case 0x01:
89		state->m_ay8910_latch_1 = ay8910_r(device, 0);
	89	state->m_ay8910_latch_1 = ay8910_r(device, space, 0);
90	90	break;
91	91
92	92	/* BC1=0, BDIR=1 : write to PSG */
r17961	r17962
94	94	case 0x02:
95	95	case 0x03:
96	96	default:
97		ay8910_data_address_w(device, data, state->m_ay8910_latch_2);
	97	ay8910_data_address_w(device, space, data, state->m_ay8910_latch_2);
98	98	break;
99	99	}
100	100	}
r17961	r17962
310	310	{
311	311	case 0x00:
312	312	if (state->m_ay8910_latch_1 & 0x10)
313		ay8910_data_w(ay1, 0, data);
	313	ay8910_data_w(ay1, space, 0, data);
314	314
315	315	if (state->m_ay8910_latch_1 & 0x20)
316		ay8910_data_w(ay2, 0, data);
	316	ay8910_data_w(ay2, space, 0, data);
317	317
318	318	break;
319	319
320	320	case 0x01:
321	321	if (state->m_ay8910_latch_1 & 0x10)
322		state->m_ay8910_latch_2 = ay8910_r(ay1, 0);
	322	state->m_ay8910_latch_2 = ay8910_r(ay1, space, 0);
323	323
324	324	if (state->m_ay8910_latch_1 & 0x20)
325		state->m_ay8910_latch_2 = ay8910_r(ay2, 0);
	325	state->m_ay8910_latch_2 = ay8910_r(ay2, space, 0);
326	326
327	327	break;
328	328
329	329	case 0x03:
330	330	if (state->m_ay8910_latch_1 & 0x10)
331		ay8910_address_w(ay1, 0, data);
	331	ay8910_address_w(ay1, space, 0, data);
332	332
333	333	if (state->m_ay8910_latch_1 & 0x20)
334		ay8910_address_w(ay2, 0, data);
	334	ay8910_address_w(ay2, space, 0, data);
335	335
336	336	break;
337	337

trunk/src/mame/audio/mario.c

r17961	r17962
494	494
495	495	static WRITE8_DEVICE_HANDLER( mario_sh_sound_w )
496	496	{
497		discrete_sound_w(device, DS_DAC, data);
	497	discrete_sound_w(device, space, DS_DAC, data);
498	498	}
499	499
500	500	WRITE8_MEMBER(mario_state::mario_sh_p1_w)
r17961	r17962
536	536	/* Mario running sample */
537	537	WRITE8_DEVICE_HANDLER( mario_sh1_w )
538	538	{
539		discrete_sound_w(device, DS_SOUND0_INP, 0);
	539	discrete_sound_w(device, space, DS_SOUND0_INP, 0);
540	540	}
541	541
542	542	/* Luigi running sample */
543	543	WRITE8_DEVICE_HANDLER( mario_sh2_w )
544	544	{
545		discrete_sound_w(device, DS_SOUND1_INP, 0);
	545	discrete_sound_w(device, space, DS_SOUND1_INP, 0);
546	546	}
547	547
548	548	/* Misc samples */
r17961	r17962
576	576	I8035_P1_W_AH(space, 3, data & 1);
577	577	break;
578	578	case 7: /* skid */
579		discrete_sound_w(machine().device("discrete"), DS_SOUND7_INP, data & 1);
	579	discrete_sound_w(machine().device("discrete"), space, DS_SOUND7_INP, data & 1);
580	580	break;
581	581	}
582	582	}

trunk/src/mame/audio/subs.c

r17961	r17962
14	14
15	15	WRITE8_DEVICE_HANDLER( subs_sonar1_w )
16	16	{
17		discrete_sound_w(device, SUBS_SONAR1_EN, offset & 0x01);
	17	discrete_sound_w(device, space, SUBS_SONAR1_EN, offset & 0x01);
18	18	}
19	19
20	20	WRITE8_DEVICE_HANDLER( subs_sonar2_w )
21	21	{
22		discrete_sound_w(device, SUBS_SONAR2_EN, offset & 0x01);
	22	discrete_sound_w(device, space, SUBS_SONAR2_EN, offset & 0x01);
23	23	}
24	24
25	25	WRITE8_DEVICE_HANDLER( subs_crash_w )
26	26	{
27		discrete_sound_w(device, SUBS_CRASH_EN, offset & 0x01);
	27	discrete_sound_w(device, space, SUBS_CRASH_EN, offset & 0x01);
28	28	}
29	29
30	30	WRITE8_DEVICE_HANDLER( subs_explode_w )
31	31	{
32		discrete_sound_w(device, SUBS_EXPLODE_EN, offset & 0x01);
	32	discrete_sound_w(device, space, SUBS_EXPLODE_EN, offset & 0x01);
33	33	}
34	34
35	35	WRITE8_DEVICE_HANDLER( subs_noise_reset_w )
36	36	{
37	37	/* Pulse noise reset */
38		discrete_sound_w(device, SUBS_NOISE_RESET, 0);
	38	discrete_sound_w(device, space, SUBS_NOISE_RESET, 0);
39	39	}
40	40
41	41

trunk/src/mame/audio/mw8080bw.c

r17961	r17962
85	85
86	86	WRITE8_DEVICE_HANDLER( midway_tone_generator_lo_w )
87	87	{
88		discrete_sound_w(device, MIDWAY_TONE_EN, (data >> 0) & 0x01);
	88	discrete_sound_w(device, space, MIDWAY_TONE_EN, (data >> 0) & 0x01);
89	89
90		discrete_sound_w(device, MIDWAY_TONE_DATA_L, (data >> 1) & 0x1f);
	90	discrete_sound_w(device, space, MIDWAY_TONE_DATA_L, (data >> 1) & 0x1f);
91	91
92	92	/* D6 and D7 are not connected */
93	93	}
r17961	r17962
95	95
96	96	WRITE8_DEVICE_HANDLER( midway_tone_generator_hi_w )
97	97	{
98		discrete_sound_w(device, MIDWAY_TONE_DATA_H, data & 0x3f);
	98	discrete_sound_w(device, space, MIDWAY_TONE_DATA_H, data & 0x3f);
99	99
100	100	/* D6 and D7 are not connected */
101	101	}
r17961	r17962
328	328
329	329	WRITE8_DEVICE_HANDLER( tornbase_audio_w )
330	330	{
331		discrete_sound_w(device, TORNBASE_TONE_240_EN, (data >> 0) & 0x01);
	331	discrete_sound_w(device, space, TORNBASE_TONE_240_EN, (data >> 0) & 0x01);
332	332
333		discrete_sound_w(device, TORNBASE_TONE_960_EN, (data >> 1) & 0x01);
	333	discrete_sound_w(device, space, TORNBASE_TONE_960_EN, (data >> 1) & 0x01);
334	334
335		discrete_sound_w(device, TORNBASE_TONE_120_EN, (data >> 2) & 0x01);
	335	discrete_sound_w(device, space, TORNBASE_TONE_120_EN, (data >> 2) & 0x01);
336	336
337	337	/* if (data & 0x08)  enable SIREN sound */
338	338
r17961	r17962
577	577	/* controls need to be active low */
578	578	int controls = ~device->machine().root_device().ioport("IN0")->read() & 0xff;
579	579
580		discrete_sound_w(device, MAZE_TONE_TIMING, maze_tone_timing_state);
581		discrete_sound_w(device, MAZE_P1_DATA, controls & 0x0f);
582		discrete_sound_w(device, MAZE_P2_DATA, (controls >> 4) & 0x0f);
583		discrete_sound_w(device, MAZE_JOYSTICK_IN_USE, controls != 0xff);
	580	address_space &space = device->machine().driver_data()->generic_space();
	581	discrete_sound_w(device, space, MAZE_TONE_TIMING, maze_tone_timing_state);
	582	discrete_sound_w(device, space, MAZE_P1_DATA, controls & 0x0f);
	583	discrete_sound_w(device, space, MAZE_P2_DATA, (controls >> 4) & 0x0f);
	584	discrete_sound_w(device, space, MAZE_JOYSTICK_IN_USE, controls != 0xff);
584	585
585	586	/* The coin line is connected directly to the discrete circuit. */
586	587	/* We can't really do that, so updating it with the tone timing is close enough. */
587	588	/* A better option might be to update it at vblank or set a timer to do it. */
588	589	/* The only noticeable difference doing it here, is that the controls don't */
589	590	/* immediately start making tones if pressed right after the coin is inserted. */
590		discrete_sound_w(device, MAZE_COIN, (~device->machine().root_device().ioport("IN1")->read() >> 3) & 0x01);
	591	discrete_sound_w(device, space, MAZE_COIN, (~device->machine().root_device().ioport("IN1")->read() >> 3) & 0x01);
591	592	}
592	593
593	594
r17961	r17962
825	826
826	827	coin_counter_w(device->machine(), 0, (data >> 2) & 0x01);
827	828
828		discrete_sound_w(device, BOOTHILL_GAME_ON_EN, (data >> 3) & 0x01);
	829	discrete_sound_w(device, space, BOOTHILL_GAME_ON_EN, (data >> 3) & 0x01);
829	830
830		discrete_sound_w(device, BOOTHILL_LEFT_SHOT_EN, (data >> 4) & 0x01);
	831	discrete_sound_w(device, space, BOOTHILL_LEFT_SHOT_EN, (data >> 4) & 0x01);
831	832
832		discrete_sound_w(device, BOOTHILL_RIGHT_SHOT_EN, (data >> 5) & 0x01);
	833	discrete_sound_w(device, space, BOOTHILL_RIGHT_SHOT_EN, (data >> 5) & 0x01);
833	834
834		discrete_sound_w(device, BOOTHILL_LEFT_HIT_EN, (data >> 6) & 0x01);
	835	discrete_sound_w(device, space, BOOTHILL_LEFT_HIT_EN, (data >> 6) & 0x01);
835	836
836		discrete_sound_w(device, BOOTHILL_RIGHT_HIT_EN, (data >> 7) & 0x01);
	837	discrete_sound_w(device, space, BOOTHILL_RIGHT_HIT_EN, (data >> 7) & 0x01);
837	838	}
838	839
839	840
r17961	r17962
1050	1051
1051	1052	WRITE8_DEVICE_HANDLER( checkmat_audio_w )
1052	1053	{
1053		discrete_sound_w(device, CHECKMAT_TONE_EN, data & 0x01);
	1054	discrete_sound_w(device, space, CHECKMAT_TONE_EN, data & 0x01);
1054	1055
1055		discrete_sound_w(device, CHECKMAT_BOOM_EN, (data >> 1) & 0x01);
	1056	discrete_sound_w(device, space, CHECKMAT_BOOM_EN, (data >> 1) & 0x01);
1056	1057
1057	1058	coin_counter_w(device->machine(), 0, (data >> 2) & 0x01);
1058	1059
1059	1060	device->machine().sound().system_enable((data >> 3) & 0x01);
1060	1061
1061		discrete_sound_w(device, CHECKMAT_TONE_DATA_45, (data >> 4) & 0x03);
1062		discrete_sound_w(device, CHECKMAT_TONE_DATA_67, (data >> 6) & 0x03);
	1062	discrete_sound_w(device, space, CHECKMAT_TONE_DATA_45, (data >> 4) & 0x03);
	1063	discrete_sound_w(device, space, CHECKMAT_TONE_DATA_67, (data >> 6) & 0x03);
1063	1064	}
1064	1065
1065	1066
r17961	r17962
1265	1266
1266	1267	coin_counter_w(device->machine(), 0, (data >> 2) & 0x01);
1267	1268
1268		discrete_sound_w(device, DESERTGU_GAME_ON_EN, (data >> 3) & 0x01);
	1269	discrete_sound_w(device, space, DESERTGU_GAME_ON_EN, (data >> 3) & 0x01);
1269	1270
1270		discrete_sound_w(device, DESERTGU_RIFLE_SHOT_EN, (data >> 4) & 0x01);
	1271	discrete_sound_w(device, space, DESERTGU_RIFLE_SHOT_EN, (data >> 4) & 0x01);
1271	1272
1272		discrete_sound_w(device, DESERTGU_BOTTLE_HIT_EN, (data >> 5) & 0x01);
	1273	discrete_sound_w(device, space, DESERTGU_BOTTLE_HIT_EN, (data >> 5) & 0x01);
1273	1274
1274		discrete_sound_w(device, DESERTGU_ROAD_RUNNER_HIT_EN, (data >> 6) & 0x01);
	1275	discrete_sound_w(device, space, DESERTGU_ROAD_RUNNER_HIT_EN, (data >> 6) & 0x01);
1275	1276
1276		discrete_sound_w(device, DESERTGU_CREATURE_HIT_EN, (data >> 7) & 0x01);
	1277	discrete_sound_w(device, space, DESERTGU_CREATURE_HIT_EN, (data >> 7) & 0x01);
1277	1278	}
1278	1279
1279	1280
r17961	r17962
1281	1282	{
1282	1283	mw8080bw_state *state = device->machine().driver_data<mw8080bw_state>();
1283	1284
1284		discrete_sound_w(device, DESERTGU_ROADRUNNER_BEEP_BEEP_EN, (data >> 0) & 0x01);
	1285	discrete_sound_w(device, space, DESERTGU_ROADRUNNER_BEEP_BEEP_EN, (data >> 0) & 0x01);
1285	1286
1286		discrete_sound_w(device, DESERTGU_TRIGGER_CLICK_EN, (data >> 1) & 0x01);
	1287	discrete_sound_w(device, space, DESERTGU_TRIGGER_CLICK_EN, (data >> 1) & 0x01);
1287	1288
1288	1289	output_set_value("Player1_Gun_Recoil", (data >> 2) & 0x01);
1289	1290
r17961	r17962
1528	1529
1529	1530	WRITE8_DEVICE_HANDLER( dplay_audio_w )
1530	1531	{
1531		discrete_sound_w(device, DPLAY_TONE_ON_EN, (data >> 0) & 0x01);
	1532	discrete_sound_w(device, space, DPLAY_TONE_ON_EN, (data >> 0) & 0x01);
1532	1533
1533		discrete_sound_w(device, DPLAY_CHEER_EN, (data >> 1) & 0x01);
	1534	discrete_sound_w(device, space, DPLAY_CHEER_EN, (data >> 1) & 0x01);
1534	1535
1535		discrete_sound_w(device, DPLAY_SIREN_EN, (data >> 2) & 0x01);
	1536	discrete_sound_w(device, space, DPLAY_SIREN_EN, (data >> 2) & 0x01);
1536	1537
1537		discrete_sound_w(device, DPLAY_WHISTLE_EN, (data >> 3) & 0x01);
	1538	discrete_sound_w(device, space, DPLAY_WHISTLE_EN, (data >> 3) & 0x01);
1538	1539
1539		discrete_sound_w(device, DPLAY_GAME_ON_EN, (data >> 4) & 0x01);
	1540	discrete_sound_w(device, space, DPLAY_GAME_ON_EN, (data >> 4) & 0x01);
1540	1541
1541	1542	coin_counter_w(device->machine(), 0, (data >> 5) & 0x01);
1542	1543
r17961	r17962
1950	1951	mw8080bw_state *state = device->machine().driver_data<mw8080bw_state>();
1951	1952	UINT8 rising_bits = data & ~state->m_port_2_last;
1952	1953
1953		discrete_sound_w(device, CLOWNS_POP_BOTTOM_EN, (data >> 0) & 0x01);
	1954	discrete_sound_w(device, space, CLOWNS_POP_BOTTOM_EN, (data >> 0) & 0x01);
1954	1955
1955		discrete_sound_w(device, CLOWNS_POP_MIDDLE_EN, (data >> 1) & 0x01);
	1956	discrete_sound_w(device, space, CLOWNS_POP_MIDDLE_EN, (data >> 1) & 0x01);
1956	1957
1957		discrete_sound_w(device, CLOWNS_POP_TOP_EN, (data >> 2) & 0x01);
	1958	discrete_sound_w(device, space, CLOWNS_POP_TOP_EN, (data >> 2) & 0x01);
1958	1959
1959	1960	device->machine().sound().system_enable((data >> 3) & 0x01);
1960	1961
1961		discrete_sound_w(device, CLOWNS_SPRINGBOARD_HIT_EN, (data >> 4) & 0x01);
	1962	discrete_sound_w(device, space, CLOWNS_SPRINGBOARD_HIT_EN, (data >> 4) & 0x01);
1962	1963
1963	1964	if (rising_bits & 0x20) state->m_samples->start(0, 0);  /* springboard miss */
1964	1965
r17961	r17962
2311	2312
2312	2313	device->machine().sound().system_enable((data >> 2) & 0x01);
2313	2314
2314		discrete_sound_w(device, SPACWALK_SPACE_SHIP_EN, (data >> 3) & 0x01);
	2315	discrete_sound_w(device, space, SPACWALK_SPACE_SHIP_EN, (data >> 3) & 0x01);
2315	2316	}
2316	2317
2317	2318	WRITE8_DEVICE_HANDLER( spacwalk_audio_2_w )
2318	2319	{
2319		discrete_sound_w(device, SPACWALK_TARGET_HIT_BOTTOM_EN, (data >> 0) & 0x01);
	2320	discrete_sound_w(device, space, SPACWALK_TARGET_HIT_BOTTOM_EN, (data >> 0) & 0x01);
2320	2321
2321		discrete_sound_w(device, SPACWALK_TARGET_HIT_MIDDLE_EN, (data >> 1) & 0x01);
	2322	discrete_sound_w(device, space, SPACWALK_TARGET_HIT_MIDDLE_EN, (data >> 1) & 0x01);
2322	2323
2323		discrete_sound_w(device, SPACWALK_TARGET_HIT_TOP_EN, (data >> 2) & 0x01);
	2324	discrete_sound_w(device, space, SPACWALK_TARGET_HIT_TOP_EN, (data >> 2) & 0x01);
2324	2325
2325		discrete_sound_w(device, SPACWALK_SPRINGBOARD_HIT1_EN, (data >> 3) & 0x01);
	2326	discrete_sound_w(device, space, SPACWALK_SPRINGBOARD_HIT1_EN, (data >> 3) & 0x01);
2326	2327
2327		discrete_sound_w(device, SPACWALK_SPRINGBOARD_HIT2_EN, (data >> 4) & 0x01);
	2328	discrete_sound_w(device, space, SPACWALK_SPRINGBOARD_HIT2_EN, (data >> 4) & 0x01);
2328	2329
2329		discrete_sound_w(device, SPACWALK_SPRINGBOARD_MISS_EN, (data >> 5) & 0x01);
	2330	discrete_sound_w(device, space, SPACWALK_SPRINGBOARD_MISS_EN, (data >> 5) & 0x01);
2330	2331	}
2331	2332
2332	2333
r17961	r17962
2535	2536
2536	2537	WRITE8_DEVICE_HANDLER( shuffle_audio_1_w )
2537	2538	{
2538		discrete_sound_w(device, SHUFFLE_CLICK_EN, (data >> 0) & 0x01);
	2539	discrete_sound_w(device, space, SHUFFLE_CLICK_EN, (data >> 0) & 0x01);
2539	2540
2540		discrete_sound_w(device, SHUFFLE_ROLLOVER_EN, (data >> 1) & 0x01);
	2541	discrete_sound_w(device, space, SHUFFLE_ROLLOVER_EN, (data >> 1) & 0x01);
2541	2542
2542	2543	device->machine().sound().system_enable((data >> 2) & 0x01);
2543	2544
2544		discrete_sound_w(device, NODE_29, (data >> 3) & 0x07);
	2545	discrete_sound_w(device, space, NODE_29, (data >> 3) & 0x07);
2545	2546
2546		discrete_sound_w(device, SHUFFLE_ROLLING_3_EN, (data >> 3) & 0x01);
2547		discrete_sound_w(device, SHUFFLE_ROLLING_2_EN, (data >> 4) & 0x01);
2548		discrete_sound_w(device, SHUFFLE_ROLLING_1_EN, (data >> 5) & 0x01);
	2547	discrete_sound_w(device, space, SHUFFLE_ROLLING_3_EN, (data >> 3) & 0x01);
	2548	discrete_sound_w(device, space, SHUFFLE_ROLLING_2_EN, (data >> 4) & 0x01);
	2549	discrete_sound_w(device, space, SHUFFLE_ROLLING_1_EN, (data >> 5) & 0x01);
2549	2550
2550	2551	/* D6 and D7 are not connected */
2551	2552	}
r17961	r17962
2553	2554
2554	2555	WRITE8_DEVICE_HANDLER( shuffle_audio_2_w )
2555	2556	{
2556		discrete_sound_w(device, SHUFFLE_FOUL_EN, (data >> 0) & 0x01);
	2557	discrete_sound_w(device, space, SHUFFLE_FOUL_EN, (data >> 0) & 0x01);
2557	2558
2558	2559	coin_counter_w(device->machine(), 0, (data >> 1) & 0x01);
2559	2560
r17961	r17962
2720	2721	coin_counter_w(device->machine(), 0, (data >> 2) & 0x01);
2721	2722
2722	2723	device->machine().sound().system_enable((data >> 3) & 0x01);
2723		discrete_sound_w(device, DOGPATCH_GAME_ON_EN, (data >> 3) & 0x01);
	2724	discrete_sound_w(device, space, DOGPATCH_GAME_ON_EN, (data >> 3) & 0x01);
2724	2725
2725		discrete_sound_w(device, DOGPATCH_LEFT_SHOT_EN, (data >> 4) & 0x01);
	2726	discrete_sound_w(device, space, DOGPATCH_LEFT_SHOT_EN, (data >> 4) & 0x01);
2726	2727
2727		discrete_sound_w(device, DOGPATCH_RIGHT_SHOT_EN, (data >> 5) & 0x01);
	2728	discrete_sound_w(device, space, DOGPATCH_RIGHT_SHOT_EN, (data >> 5) & 0x01);
2728	2729
2729		discrete_sound_w(device, DOGPATCH_HIT_EN, (data >> 6) & 0x01);
	2730	discrete_sound_w(device, space, DOGPATCH_HIT_EN, (data >> 6) & 0x01);
2730	2731	}
2731	2732
2732	2733
r17961	r17962
3258	3259	/* D1 is marked as 'OPTIONAL SWITCH VIDEO FOR COCKTAIL',
3259	3260	but it is never set by the software */
3260	3261
3261		discrete_sound_w(device, SPCENCTR_CRASH_EN, (data >> 2) & 0x01);
	3262	discrete_sound_w(device, space, SPCENCTR_CRASH_EN, (data >> 2) & 0x01);
3262	3263
3263	3264	/* D3-D7 are not connected */
3264	3265	}
r17961	r17962
3270	3271
3271	3272	/* set WIND SOUND FREQ(data & 0x0f)  0, if no wind */
3272	3273
3273		discrete_sound_w(device, SPCENCTR_EXPLOSION_EN, (data >> 4) & 0x01);
	3274	discrete_sound_w(device, space, SPCENCTR_EXPLOSION_EN, (data >> 4) & 0x01);
3274	3275
3275		discrete_sound_w(device, SPCENCTR_PLAYER_SHOT_EN, (data >> 5) & 0x01);
	3276	discrete_sound_w(device, space, SPCENCTR_PLAYER_SHOT_EN, (data >> 5) & 0x01);
3276	3277
3277	3278	/* D6 and D7 are not connected */
3278	3279
r17961	r17962
3286	3287
3287	3288	/* if (data & 0x01)  enable SCREECH (hit the sides) sound */
3288	3289
3289		discrete_sound_w(device, SPCENCTR_ENEMY_SHIP_SHOT_EN, (data >> 1) & 0x01);
	3290	discrete_sound_w(device, space, SPCENCTR_ENEMY_SHIP_SHOT_EN, (data >> 1) & 0x01);
3290	3291
3291	3292	state->m_spcenctr_strobe_state = (data >> 2) & 0x01;
3292	3293
3293	3294	output_set_value("LAMP", (data >> 3) & 0x01);
3294	3295
3295		discrete_sound_w(device, SPCENCTR_BONUS_EN, (data >> 4) & 0x01);
	3296	discrete_sound_w(device, space, SPCENCTR_BONUS_EN, (data >> 4) & 0x01);
3296	3297
3297	3298	sn76477_enable_w(state->m_sn, (data >> 5) & 0x01);   /* saucer sound */
3298	3299
r17961	r17962
3468	3469
3469	3470	device->machine().sound().system_enable((data >> 2) & 0x01);
3470	3471
3471		discrete_sound_w(device, BOWLER_FOWL_EN, (data >> 3) & 0x01);
	3472	discrete_sound_w(device, space, BOWLER_FOWL_EN, (data >> 3) & 0x01);
3472	3473
3473	3474	/* D4 - appears to be a screen flip, but it's
3474	3475	shown unconnected on the schematics for both the
r17961	r17962
4189	4190
4190	4191	sn76477_enable_w(state->m_sn, (~data >> 0) & 0x01);   /* saucer sound */
4191	4192
4192		discrete_sound_w(device, INVADERS_NODE(INVADERS_MISSILE_EN, 1), data & 0x02);
4193		discrete_sound_w(device, INVADERS_NODE(INVADERS_EXPLOSION_EN, 1), data & 0x04);
4194		discrete_sound_w(device, INVADERS_NODE(INVADERS_INVADER_HIT_EN, 1), data & 0x08);
4195		discrete_sound_w(device, INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, 1), data & 0x10);
	4193	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_MISSILE_EN, 1), data & 0x02);
	4194	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_EXPLOSION_EN, 1), data & 0x04);
	4195	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_INVADER_HIT_EN, 1), data & 0x08);
	4196	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, 1), data & 0x10);
4196	4197
4197	4198	device->machine().sound().system_enable(data & 0x20);
4198	4199
r17961	r17962
4204	4205	{
4205	4206	mw8080bw_state *state = device->machine().driver_data<mw8080bw_state>();
4206	4207
4207		discrete_sound_w(device, INVADERS_NODE(INVADERS_FLEET_DATA, 1), data & 0x0f);
4208		discrete_sound_w(device, INVADERS_NODE(INVADERS_SAUCER_HIT_EN, 1), data & 0x10);
	4208	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_FLEET_DATA, 1), data & 0x0f);
	4209	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_SAUCER_HIT_EN, 1), data & 0x10);
4209	4210
4210	4211	/* the flip screen line is only connected on the cocktail PCB */
4211	4212	if (invaders_is_cabinet_cocktail(device->machine()))
r17961	r17962
4590	4591
4591	4592	WRITE8_DEVICE_HANDLER( blueshrk_audio_w )
4592	4593	{
4593		discrete_sound_w(device, BLUESHRK_GAME_ON_EN, (data >> 0) & 0x01);
	4594	discrete_sound_w(device, space, BLUESHRK_GAME_ON_EN, (data >> 0) & 0x01);
4594	4595
4595		discrete_sound_w(device, BLUESHRK_SHOT_EN, (data >> 1) & 0x01);
	4596	discrete_sound_w(device, space, BLUESHRK_SHOT_EN, (data >> 1) & 0x01);
4596	4597
4597		discrete_sound_w(device, BLUESHRK_HIT_EN, (data >> 2) & 0x01);
	4598	discrete_sound_w(device, space, BLUESHRK_HIT_EN, (data >> 2) & 0x01);
4598	4599
4599		discrete_sound_w(device, BLUESHRK_SHARK_EN, (data >> 3) & 0x01);
	4600	discrete_sound_w(device, space, BLUESHRK_SHARK_EN, (data >> 3) & 0x01);
4600	4601
4601	4602	/* if (data & 0x10)  enable KILLED DIVER sound, this circuit
4602	4603	doesn't appear to be on the schematics */
4603	4604
4604		discrete_sound_w(device, BLUESHRK_OCTOPUS_EN, (data >> 5) & 0x01);
	4605	discrete_sound_w(device, space, BLUESHRK_OCTOPUS_EN, (data >> 5) & 0x01);
4605	4606
4606	4607	/* D6 and D7 are not connected */
4607	4608	}
r17961	r17962
4822	4823
4823	4824	sn76477_enable_w(state->m_sn1, (~data >> 0) & 0x01);   /* saucer sound */
4824	4825
4825		discrete_sound_w(device, INVADERS_NODE(INVADERS_MISSILE_EN, 1), data & 0x02);
4826		discrete_sound_w(device, INVADERS_NODE(INVADERS_EXPLOSION_EN, 1), data & 0x04);
4827		discrete_sound_w(device, INVADERS_NODE(INVADERS_INVADER_HIT_EN, 1), data & 0x08);
4828		discrete_sound_w(device, INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, 1), data & 0x10);
	4826	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_MISSILE_EN, 1), data & 0x02);
	4827	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_EXPLOSION_EN, 1), data & 0x04);
	4828	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_INVADER_HIT_EN, 1), data & 0x08);
	4829	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, 1), data & 0x10);
4829	4830
4830	4831	device->machine().sound().system_enable(data & 0x20);
4831	4832
r17961	r17962
4835	4836
4836	4837	WRITE8_DEVICE_HANDLER( invad2ct_audio_2_w )
4837	4838	{
4838		discrete_sound_w(device, INVADERS_NODE(INVADERS_FLEET_DATA, 1), data & 0x0f);
4839		discrete_sound_w(device, INVADERS_NODE(INVADERS_SAUCER_HIT_EN, 1), data & 0x10);
	4839	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_FLEET_DATA, 1), data & 0x0f);
	4840	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_SAUCER_HIT_EN, 1), data & 0x10);
4840	4841
4841	4842	/* D5-D7 are not connected */
4842	4843	}
r17961	r17962
4848	4849
4849	4850	sn76477_enable_w(state->m_sn2, (~data >> 0) & 0x01);   /* saucer sound */
4850	4851
4851		discrete_sound_w(device, INVADERS_NODE(INVADERS_MISSILE_EN, 2), data & 0x02);
4852		discrete_sound_w(device, INVADERS_NODE(INVADERS_EXPLOSION_EN, 2), data & 0x04);
4853		discrete_sound_w(device, INVADERS_NODE(INVADERS_INVADER_HIT_EN, 2), data & 0x08);
4854		discrete_sound_w(device, INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, 2), data & 0x10);
	4852	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_MISSILE_EN, 2), data & 0x02);
	4853	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_EXPLOSION_EN, 2), data & 0x04);
	4854	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_INVADER_HIT_EN, 2), data & 0x08);
	4855	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_BONUS_MISSLE_BASE_EN, 2), data & 0x10);
4855	4856
4856	4857	/* D5-D7 are not connected */
4857	4858	}
r17961	r17962
4859	4860
4860	4861	WRITE8_DEVICE_HANDLER( invad2ct_audio_4_w )
4861	4862	{
4862		discrete_sound_w(device, INVADERS_NODE(INVADERS_FLEET_DATA, 2), data & 0x0f);
4863		discrete_sound_w(device, INVADERS_NODE(INVADERS_SAUCER_HIT_EN, 2), data & 0x10);
	4863	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_FLEET_DATA, 2), data & 0x0f);
	4864	discrete_sound_w(device, space, INVADERS_NODE(INVADERS_SAUCER_HIT_EN, 2), data & 0x10);
4864	4865
4865	4866	/* D5-D7 are not connected */
4866	4867	}

trunk/src/mame/machine/taitoio.c

r17961	r17962
162	162	READ8_DEVICE_HANDLER( tc0220ioc_portreg_r )
163	163	{
164	164	tc0220ioc_state *tc0220ioc =  tc0220ioc_get_safe_token(device);
165		return tc0220ioc_r(device, tc0220ioc->port);
	165	return tc0220ioc_r(device, space, tc0220ioc->port);
166	166	}
167	167
168	168	WRITE8_DEVICE_HANDLER( tc0220ioc_portreg_w )
169	169	{
170	170	tc0220ioc_state *tc0220ioc =  tc0220ioc_get_safe_token(device);
171		tc0220ioc_w(device, tc0220ioc->port, data);
	171	tc0220ioc_w(device, space, tc0220ioc->port, data);
172	172	}
173	173
174	174
r17961	r17962
300	300
301	301	READ16_DEVICE_HANDLER( tc0510nio_halfword_r )
302	302	{
303		return tc0510nio_r(device, offset);
	303	return tc0510nio_r(device, space, offset);
304	304	}
305	305
306	306	WRITE16_DEVICE_HANDLER( tc0510nio_halfword_w )
307	307	{
308	308	if (ACCESSING_BITS_0_7)
309		tc0510nio_w(device, offset, data & 0xff);
	309	tc0510nio_w(device, space, offset, data & 0xff);
310	310	else
311	311	{
312	312	/* driftout writes the coin counters here - bug? */
313	313	//logerror("CPU #0 PC %06x: warning - write to MSB of TC0510NIO address %02x\n",space->device().safe_pc(),offset);
314		tc0510nio_w(device, offset, (data >> 8) & 0xff);
	314	tc0510nio_w(device, space, offset, (data >> 8) & 0xff);
315	315	}
316	316	}
317	317
318	318	READ16_DEVICE_HANDLER( tc0510nio_halfword_wordswap_r )
319	319	{
320		return tc0510nio_halfword_r(device, offset ^ 1, mem_mask);
	320	return tc0510nio_halfword_r(device, space, offset ^ 1, mem_mask);
321	321	}
322	322
323	323	WRITE16_DEVICE_HANDLER( tc0510nio_halfword_wordswap_w )
324	324	{
325		tc0510nio_halfword_w(device, offset ^ 1,data, mem_mask);
	325	tc0510nio_halfword_w(device, space, offset ^ 1,data, mem_mask);
326	326	}
327	327
328	328
r17961	r17962
450	450
451	451	READ16_DEVICE_HANDLER( tc0640fio_halfword_r )
452	452	{
453		return tc0640fio_r(device, offset);
	453	return tc0640fio_r(device, space, offset);
454	454	}
455	455
456	456	WRITE16_DEVICE_HANDLER( tc0640fio_halfword_w )
457	457	{
458	458	if (ACCESSING_BITS_0_7)
459		tc0640fio_w(device, offset, data & 0xff);
	459	tc0640fio_w(device, space, offset, data & 0xff);
460	460	else
461	461	{
462		tc0640fio_w(device, offset, (data >> 8) & 0xff);
	462	tc0640fio_w(device, space, offset, (data >> 8) & 0xff);
463	463	//logerror("CPU #0 PC %06x: warning - write to MSB of TC0640FIO address %02x\n",space->device().safe_pc(),offset);
464	464	}
465	465	}
466	466
467	467	READ16_DEVICE_HANDLER( tc0640fio_halfword_byteswap_r )
468	468	{
469		return tc0640fio_halfword_r(device, offset, mem_mask) << 8;
	469	return tc0640fio_halfword_r(device, space, offset, mem_mask) << 8;
470	470	}
471	471
472	472	WRITE16_DEVICE_HANDLER( tc0640fio_halfword_byteswap_w )
473	473	{
474	474	if (ACCESSING_BITS_8_15)
475		tc0640fio_w(device, offset, (data >> 8) & 0xff);
	475	tc0640fio_w(device, space, offset, (data >> 8) & 0xff);
476	476	else
477	477	{
478		tc0640fio_w(device, offset, data & 0xff);
	478	tc0640fio_w(device, space, offset, data & 0xff);
479	479	//logerror("CPU #0 PC %06x: warning - write to LSB of TC0640FIO address %02x\n",space->device().safe_pc(),offset);
480	480	}
481	481	}

trunk/src/mame/machine/nmk004.c

r17961	r17962
311	311	static void fm_update(int channel)
312	312	{
313	313	struct fm_control *fm = &NMK004_state.fm_control[channel];
	314	address_space &space = *NMK004_state.machine().firstcpu->space(AS_PROGRAM);
314	315
315	316	// advance the timers
316	317	if (fm->timer1)
r17961	r17962
356	357	fm->slot = read8(fm->current++);
357	358	if (channel < 3 || !(NMK004_state.fm_control[channel-3].flags & FM_FLAG_ACTIVE))
358	359	{
359		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x28);   // keyon/off
360		ym2203_write_port_w(NMK004_state.ymdevice, 0, channel % 3);
	360	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0x28);   // keyon/off
	361	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, channel % 3);
361	362	}
362	363	break;
363	364
r17961	r17962
594	595	};
595	596	int channel,i;
596	597
	598	address_space &space = *NMK004_state.machine().firstcpu->space(AS_PROGRAM);
597	599	for (channel = 0; channel < 3;channel++)
598	600	{
599	601	struct fm_control *fm1 = &NMK004_state.fm_control[channel];
r17961	r17962
605	607
606	608	for (i = 0; i < 0x18; i++)
607	609	{
608		ym2203_control_port_w(NMK004_state.ymdevice, 0, ym2203_registers[i] + channel);
609		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm1->voice_params[i]);
	610	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, ym2203_registers[i] + channel);
	611	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm1->voice_params[i]);
610	612	}
611	613	}
612	614
r17961	r17962
618	620	{
619	621	for (i = 0; i < 0x18; i++)
620	622	{
621		ym2203_control_port_w(NMK004_state.ymdevice, 0, ym2203_registers[i] + channel);
622		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm2->voice_params[i]);
	623	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, ym2203_registers[i] + channel);
	624	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm2->voice_params[i]);
623	625	}
624	626	}
625	627	}
r17961	r17962
627	629
628	630	if (fm1->flags & FM_FLAG_ACTIVE)
629	631	{
630		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0xb0 + channel);   // self-feedback
631		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm1->self_feedback);
	632	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0xb0 + channel);   // self-feedback
	633	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm1->self_feedback);
632	634
633		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0xa4 + channel);   // F-number
634		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm1->f_number >> 8);
	635	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0xa4 + channel);   // F-number
	636	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm1->f_number >> 8);
635	637
636		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0xa0 + channel);   // F-number
637		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm1->f_number & 0xff);
	638	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0xa0 + channel);   // F-number
	639	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm1->f_number & 0xff);
638	640	}
639	641	else
640	642	{
641		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0xb0 + channel);   // self-feedback
642		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm2->self_feedback);
	643	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0xb0 + channel);   // self-feedback
	644	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm2->self_feedback);
643	645
644		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0xa4 + channel);   // F-number
645		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm2->f_number >> 8);
	646	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0xa4 + channel);   // F-number
	647	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm2->f_number >> 8);
646	648
647		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0xa0 + channel);   // F-number
648		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm2->f_number & 0xff);
	649	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0xa0 + channel);   // F-number
	650	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm2->f_number & 0xff);
649	651	}
650	652
651	653
r17961	r17962
654	656	{
655	657	fm1->flags &= ~FM_FLAG_MUST_SEND_KEYON;
656	658
657		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x28);   // keyon/off
658		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm1->slot | channel);
	659	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0x28);   // keyon/off
	660	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm1->slot | channel);
659	661	}
660	662
661	663	if (fm2->flags & FM_FLAG_MUST_SEND_KEYON)
r17961	r17962
664	666
665	667	if (!(fm1->flags & FM_FLAG_ACTIVE))
666	668	{
667		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x28);   // keyon/off
668		ym2203_write_port_w(NMK004_state.ymdevice, 0, fm2->slot | channel);
	669	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0x28);   // keyon/off
	670	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, fm2->slot | channel);
669	671	}
670	672	}
671	673	}
r17961	r17962
682	684	static void psg_update(int channel)
683	685	{
684	686	struct psg_control *psg = &NMK004_state.psg_control[channel];
	687	address_space &space = *NMK004_state.machine().firstcpu->space(AS_PROGRAM);
685	688
686	689	// advance the timers
687	690	if (psg->note_timer)
r17961	r17962
703	706	psg->flags &= ~PSG_FLAG_NOISE_NOT_ENABLED;
704	707
705	708	// enable noise, disable tone on this channel
706		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x07);
707		enable = ym2203_read_port_r(NMK004_state.ymdevice, 0);
	709	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0x07);
	710	enable = ym2203_read_port_r(NMK004_state.ymdevice, space, 0);
708	711	enable |=  (0x01 << channel);   // disable tone
709	712	enable &= ~(0x08 << channel);   // enable noise
710		ym2203_write_port_w(NMK004_state.ymdevice, 0, enable);
	713	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, enable);
711	714	}
712	715
713	716
r17961	r17962
741	744	psg->flags &= ~PSG_FLAG_NOISE_NOT_ENABLED;
742	745
743	746	// enable noise, disable tone on this channel
744		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x07);
745		enable = ym2203_read_port_r(NMK004_state.ymdevice, 0);
	747	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0x07);
	748	enable = ym2203_read_port_r(NMK004_state.ymdevice, space, 0);
746	749	enable |=  (0x01 << channel);   // disable tone
747	750	enable &= ~(0x08 << channel);   // enable noise
748		ym2203_write_port_w(NMK004_state.ymdevice, 0, enable);
	751	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, enable);
749	752	break;
750	753
751	754	case 0xf2:   // set volume shape
r17961	r17962
790	793	psg->volume_shape = 0;
791	794
792	795	// mute channel
793		ym2203_control_port_w(NMK004_state.ymdevice, 0, 8 + channel);
794		ym2203_write_port_w(NMK004_state.ymdevice, 0, 0);
	796	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 8 + channel);
	797	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, 0);
795	798	return;
796	799	}
797	800	}
r17961	r17962
831	834
832	835	period >>= octave;
833	836
834		ym2203_control_port_w(NMK004_state.ymdevice, 0, 2 * channel + 1);
835		ym2203_write_port_w(NMK004_state.ymdevice, 0, (period & 0x0f00) >> 8);
836		ym2203_control_port_w(NMK004_state.ymdevice, 0, 2 * channel + 0);
837		ym2203_write_port_w(NMK004_state.ymdevice, 0, (period & 0x00ff));
	837	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 2 * channel + 1);
	838	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, (period & 0x0f00) >> 8);
	839	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 2 * channel + 0);
	840	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, (period & 0x00ff));
838	841
839	842	psg->note_period_hi_bits = (period & 0x0f00) >> 8;
840	843	}
r17961	r17962
847	850	psg->flags |= PSG_FLAG_NOISE_NOT_ENABLED;
848	851
849	852	// disable noise, enable tone on this channel
850		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x07);
851		enable = ym2203_read_port_r(NMK004_state.ymdevice, 0);
	853	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0x07);
	854	enable = ym2203_read_port_r(NMK004_state.ymdevice, space, 0);
852	855	enable &= ~(0x01 << channel);   // enable tone
853	856	enable |=  (0x08 << channel);   // disable noise
854		ym2203_write_port_w(NMK004_state.ymdevice, 0, enable);
	857	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, enable);
855	858	}
856	859
857		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x06);   // noise period
858		ym2203_write_port_w(NMK004_state.ymdevice, 0, psg->note);
	860	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0x06);   // noise period
	861	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, psg->note);
859	862	psg->note_period_hi_bits = psg->note;
860	863	}
861	864	}
r17961	r17962
880	883	volume = 0;
881	884
882	885	// set volume
883		ym2203_control_port_w(NMK004_state.ymdevice, 0, 8 + channel);
884		ym2203_write_port_w(NMK004_state.ymdevice, 0, volume & 0x0f);
	886	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 8 + channel);
	887	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, volume & 0x0f);
885	888	}
886	889	}
887	890	}
r17961	r17962
1000	1003	{
1001	1004	if (irq)
1002	1005	{
1003		int status = ym2203_status_port_r(device,0);
	1006	address_space &space = *NMK004_state.machine().firstcpu->space(AS_PROGRAM);
	1007	int status = ym2203_status_port_r(device,space,0);
1004	1008
1005	1009	if (status & 1)   // timer A expired
1006	1010	{
r17961	r17962
1009	1013	update_music();
1010	1014
1011	1015	// restart timer
1012		ym2203_control_port_w(device, 0, 0x27);
1013		ym2203_write_port_w(device, 0, 0x15);
	1016	ym2203_control_port_w(device, space, 0, 0x27);
	1017	ym2203_write_port_w(device, space, 0, 0x15);
1014	1018	}
1015	1019	}
1016	1020	}
r17961	r17962
1035	1039
1036	1040	NMK004_state.rom = machine.root_device().memregion("audiocpu")->base();
1037	1041
1038		ym2203_control_port_w(NMK004_state.ymdevice, 0, 0x2f);
	1042	address_space &space = *NMK004_state.machine().firstcpu->space(AS_PROGRAM);
	1043	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, 0x2f);
1039	1044
1040	1045	i = 0;
1041	1046	while (ym2203_init[i] != 0xff)
1042	1047	{
1043		ym2203_control_port_w(NMK004_state.ymdevice, 0, ym2203_init[i++]);
1044		ym2203_write_port_w(NMK004_state.ymdevice, 0, ym2203_init[i++]);
	1048	ym2203_control_port_w(NMK004_state.ymdevice, space, 0, ym2203_init[i++]);
	1049	ym2203_write_port_w(NMK004_state.ymdevice, space, 0, ym2203_init[i++]);
1045	1050	}
1046	1051
1047	1052	NMK004_state.oki_playing = 0;

trunk/src/mame/machine/taitoio.h

r17961	r17962
127	127	***************************************************************************/
128	128
129	129	/** TC0220IOC **/
130		READ8_DEVICE_HANDLER( tc0220ioc_r );
131		WRITE8_DEVICE_HANDLER( tc0220ioc_w );
132		READ8_DEVICE_HANDLER( tc0220ioc_port_r );
133		WRITE8_DEVICE_HANDLER( tc0220ioc_port_w );
134		READ8_DEVICE_HANDLER( tc0220ioc_portreg_r );
135		WRITE8_DEVICE_HANDLER( tc0220ioc_portreg_w );
	130	DECLARE_READ8_DEVICE_HANDLER( tc0220ioc_r );
	131	DECLARE_WRITE8_DEVICE_HANDLER( tc0220ioc_w );
	132	DECLARE_READ8_DEVICE_HANDLER( tc0220ioc_port_r );
	133	DECLARE_WRITE8_DEVICE_HANDLER( tc0220ioc_port_w );
	134	DECLARE_READ8_DEVICE_HANDLER( tc0220ioc_portreg_r );
	135	DECLARE_WRITE8_DEVICE_HANDLER( tc0220ioc_portreg_w );
136	136
137	137
138	138	/** TC0510NIO **/
139		READ8_DEVICE_HANDLER( tc0510nio_r );
140		WRITE8_DEVICE_HANDLER( tc0510nio_w );
141		READ16_DEVICE_HANDLER( tc0510nio_halfword_r );
142		WRITE16_DEVICE_HANDLER( tc0510nio_halfword_w );
143		READ16_DEVICE_HANDLER( tc0510nio_halfword_wordswap_r );
144		WRITE16_DEVICE_HANDLER( tc0510nio_halfword_wordswap_w );
	139	DECLARE_READ8_DEVICE_HANDLER( tc0510nio_r );
	140	DECLARE_WRITE8_DEVICE_HANDLER( tc0510nio_w );
	141	DECLARE_READ16_DEVICE_HANDLER( tc0510nio_halfword_r );
	142	DECLARE_WRITE16_DEVICE_HANDLER( tc0510nio_halfword_w );
	143	DECLARE_READ16_DEVICE_HANDLER( tc0510nio_halfword_wordswap_r );
	144	DECLARE_WRITE16_DEVICE_HANDLER( tc0510nio_halfword_wordswap_w );
145	145
146	146
147	147	/** TC0640FIO**/
148		READ8_DEVICE_HANDLER( tc0640fio_r );
149		WRITE8_DEVICE_HANDLER( tc0640fio_w );
150		READ16_DEVICE_HANDLER( tc0640fio_halfword_r );
151		WRITE16_DEVICE_HANDLER( tc0640fio_halfword_w );
152		READ16_DEVICE_HANDLER( tc0640fio_halfword_byteswap_r );
153		WRITE16_DEVICE_HANDLER( tc0640fio_halfword_byteswap_w );
	148	DECLARE_READ8_DEVICE_HANDLER( tc0640fio_r );
	149	DECLARE_WRITE8_DEVICE_HANDLER( tc0640fio_w );
	150	DECLARE_READ16_DEVICE_HANDLER( tc0640fio_halfword_r );
	151	DECLARE_WRITE16_DEVICE_HANDLER( tc0640fio_halfword_w );
	152	DECLARE_READ16_DEVICE_HANDLER( tc0640fio_halfword_byteswap_r );
	153	DECLARE_WRITE16_DEVICE_HANDLER( tc0640fio_halfword_byteswap_w );
154	154
155	155
156	156	#endif   /* __TAITOIO_H__ */

trunk/src/mame/machine/mhavoc.c

r17961	r17962
311	311	WRITE8_MEMBER(mhavoc_state::mhavocrv_speech_strobe_w)
312	312	{
313	313	device_t *tms = machine().device("tms");
314		tms5220_data_w(tms, 0, m_speech_write_buffer);
	314	tms5220_data_w(tms, space, 0, m_speech_write_buffer);
315	315	}
316	316
317	317	/*************************************

trunk/src/mame/machine/namco06.c

r17961	r17962
145	145
146	146	for (devnum = 0; devnum < 4; devnum++)
147	147	if ((state->m_control & (1 << devnum)) && state->m_read[devnum] != NULL)
148		result &= (*state->m_read[devnum])(state->m_device[devnum], 0);
	148	result &= (*state->m_read[devnum])(state->m_device[devnum], space, 0, 0xff);
149	149
150	150	return result;
151	151	}
r17961	r17962
166	166
167	167	for (devnum = 0; devnum < 4; devnum++)
168	168	if ((state->m_control & (1 << devnum)) && state->m_write[devnum] != NULL)
169		(*state->m_write[devnum])(state->m_device[devnum], 0, data);
	169	(*state->m_write[devnum])(state->m_device[devnum], space, 0, data, 0xff);
170	170	}
171	171
172	172

trunk/src/mame/machine/namco06.h

r17961	r17962
19	19	MCFG_DEVICE_CONFIG(_config)
20	20
21	21
22		READ8_DEVICE_HANDLER( namco_06xx_data_r );
23		WRITE8_DEVICE_HANDLER( namco_06xx_data_w );
24		READ8_DEVICE_HANDLER( namco_06xx_ctrl_r );
25		WRITE8_DEVICE_HANDLER( namco_06xx_ctrl_w );
	22	DECLARE_READ8_DEVICE_HANDLER( namco_06xx_data_r );
	23	DECLARE_WRITE8_DEVICE_HANDLER( namco_06xx_data_w );
	24	DECLARE_READ8_DEVICE_HANDLER( namco_06xx_ctrl_r );
	25	DECLARE_WRITE8_DEVICE_HANDLER( namco_06xx_ctrl_w );
26	26
27	27
28	28	/* device get info callback */

trunk/src/mame/machine/cdicdic.h

r17961	r17962
128	128	//  READ/WRITE HANDLERS
129	129	//**************************************************************************
130	130
131		READ16_DEVICE_HANDLER( cdic_r );
132		WRITE16_DEVICE_HANDLER( cdic_w );
133		READ16_DEVICE_HANDLER( cdic_ram_r );
134		WRITE16_DEVICE_HANDLER( cdic_ram_w );
	131	DECLARE_READ16_DEVICE_HANDLER( cdic_r );
	132	DECLARE_WRITE16_DEVICE_HANDLER( cdic_w );
	133	DECLARE_READ16_DEVICE_HANDLER( cdic_ram_r );
	134	DECLARE_WRITE16_DEVICE_HANDLER( cdic_ram_w );
135	135
136	136
137	137	#endif // __CDICDIC_H__

trunk/src/mame/machine/namcoio.h

r17961	r17962
59	59	DEVICE I/O FUNCTIONS
60	60	***************************************************************************/
61	61
62		READ8_DEVICE_HANDLER( namcoio_r );
63		WRITE8_DEVICE_HANDLER( namcoio_w );
	62	DECLARE_READ8_DEVICE_HANDLER( namcoio_r );
	63	DECLARE_WRITE8_DEVICE_HANDLER( namcoio_w );
64	64
65	65	WRITE_LINE_DEVICE_HANDLER( namcoio_set_reset_line );
66	66	READ_LINE_DEVICE_HANDLER( namcoio_read_reset_line );

trunk/src/mame/machine/namcos1.c

r17961	r17962
611	611	offset &= 0x3ff;
612	612
613	613	/* CUS 30 */
614		return namcos1_cus30_r(space->machine().device("namco"),offset);
	614	return namcos1_cus30_r(space->machine().device("namco"),*space,offset);
615	615	}
616	616	else
617	617	{
r17961	r17962
630	630	offset &= 0x3ff;
631	631
632	632	/* CUS 30 */
633		namcos1_cus30_w(space->machine().device("namco"),offset,data);
	633	namcos1_cus30_w(space->machine().device("namco"),*space,offset,data);
634	634	}
635	635	else
636	636	{

trunk/src/mame/machine/nmk112.c

r17961	r17962
92	92	{
93	93	if (ACCESSING_BITS_0_7)
94	94	{
95		nmk112_okibank_w(device, offset, data & 0xff);
	95	nmk112_okibank_w(device, space, offset, data & 0xff);
96	96	}
97	97	}
98	98

trunk/src/mame/machine/nmk112.h

r17961	r17962
52	52	DEVICE I/O FUNCTIONS
53	53	***************************************************************************/
54	54
55		WRITE8_DEVICE_HANDLER( nmk112_okibank_w );
56		WRITE16_DEVICE_HANDLER( nmk112_okibank_lsb_w );
	55	DECLARE_WRITE8_DEVICE_HANDLER( nmk112_okibank_w );
	56	DECLARE_WRITE16_DEVICE_HANDLER( nmk112_okibank_lsb_w );
57	57
58	58
59	59	#endif /* __NMK112_H__ */

trunk/src/mame/machine/megadriv.c

r17961	r17962
110	110	//mame_printf_debug("megadriv_68k_YM2612_read %02x %04x\n",offset,mem_mask);
111	111	if ( (genz80.z80_has_bus==0) && (genz80.z80_is_reset==0) )
112	112	{
113		return ym2612_r(device, offset);
	113	return ym2612_r(device, space, offset);
114	114	}
115	115	else
116	116	{
r17961	r17962
127	127	//mame_printf_debug("megadriv_68k_YM2612_write %02x %04x %04x\n",offset,data,mem_mask);
128	128	if ( (genz80.z80_has_bus==0) && (genz80.z80_is_reset==0) )
129	129	{
130		ym2612_w(device, offset, data);
	130	ym2612_w(device, space, offset, data);
131	131	}
132	132	else
133	133	{
r17961	r17962
820	820	case 0x13:
821	821	case 0x15:
822	822	case 0x17:
823		sn76496_w(space->machine().device("snsnd"), 0, data);
	823	sn76496_w(space->machine().device("snsnd"), *space, 0, data);
824	824	break;
825	825
826	826	default:

trunk/src/mame/machine/amiga.c

r17961	r17962
1039	1039	}
1040	1040
1041	1041	/* handle the reads */
1042		data = mos6526_r(cia, offset >> 7);
	1042	data = mos6526_r(cia, *space, offset >> 7);
1043	1043
1044	1044	if (LOG_CIA)
1045	1045	logerror("%06x:cia_%c_read(%03x) = %04x & %04x\n", space->device().safe_pc(), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data << shift, mem_mask);
r17961	r17962
1081	1081	}
1082	1082
1083	1083	/* handle the writes */
1084		mos6526_w(cia, offset >> 7, (UINT8) data);
	1084	mos6526_w(cia, *space, offset >> 7, (UINT8) data);
1085	1085	}
1086	1086
1087	1087

trunk/src/mame/machine/cdislave.h

r17961	r17962
119	119	//  READ/WRITE HANDLERS
120	120	//**************************************************************************
121	121
122		READ16_DEVICE_HANDLER( slave_r );
123		WRITE16_DEVICE_HANDLER( slave_w );
	122	DECLARE_READ16_DEVICE_HANDLER( slave_r );
	123	DECLARE_WRITE16_DEVICE_HANDLER( slave_w );
124	124
125	125
126	126	#endif // __CDISLAVE_H__

trunk/src/mame/machine/namco50.h

r17961	r17962
8	8	MCFG_DEVICE_ADD(_tag, NAMCO_50XX, _clock) \
9	9
10	10
11		READ8_DEVICE_HANDLER( namco_50xx_read );
	11	DECLARE_READ8_DEVICE_HANDLER( namco_50xx_read );
12	12	void namco_50xx_read_request(device_t *device);
13		WRITE8_DEVICE_HANDLER( namco_50xx_write );
	13	DECLARE_WRITE8_DEVICE_HANDLER( namco_50xx_write );
14	14
15	15
16	16	/* device get info callback */

trunk/src/mame/machine/tatsumi.c

r17961	r17962
337	337	// self-test in Tatsumi games.  Needs fixed, but hack it here for now.
338	338	READ8_DEVICE_HANDLER(tatsumi_hack_ym2151_r)
339	339	{
340		address_space *space = device->machine().device("audiocpu")->memory().space(AS_PROGRAM);
341		int r=ym2151_status_port_r(device,0);
	340	int r=ym2151_status_port_r(device,space,0);
342	341
343		if (space->device().safe_pc()==0x2aca || space->device().safe_pc()==0x29fe
344		|| space->device().safe_pc()==0xf9721
345		|| space->device().safe_pc()==0x1b96 || space->device().safe_pc()==0x1c65) // BigFight
	342	if (space.device().safe_pc()==0x2aca || space.device().safe_pc()==0x29fe
	343	|| space.device().safe_pc()==0xf9721
	344	|| space.device().safe_pc()==0x1b96 || space.device().safe_pc()==0x1c65) // BigFight
346	345	return 0x80;
347	346	return r;
348	347	}
r17961	r17962
351	350	// Mame really should emulate the OKI status reads even with Mame sound off.
352	351	READ8_DEVICE_HANDLER(tatsumi_hack_oki_r)
353	352	{
354		address_space *space = device->machine().device("audiocpu")->memory().space(AS_PROGRAM);
355		int r=downcast<okim6295_device *>(device)->read(*space,0);
	353	int r=downcast<okim6295_device *>(device)->read(space,0);
356	354
357		if (space->device().safe_pc()==0x2b70 || space->device().safe_pc()==0x2bb5
358		|| space->device().safe_pc()==0x2acc
359		|| space->device().safe_pc()==0x1c79 // BigFight
360		|| space->device().safe_pc()==0x1cbe // BigFight
361		|| space->device().safe_pc()==0xf9881)
	355	if (space.device().safe_pc()==0x2b70 || space.device().safe_pc()==0x2bb5
	356	|| space.device().safe_pc()==0x2acc
	357	|| space.device().safe_pc()==0x1c79 // BigFight
	358	|| space.device().safe_pc()==0x1cbe // BigFight
	359	|| space.device().safe_pc()==0xf9881)
362	360	return 0xf;
363		if (space->device().safe_pc()==0x2ba3 || space->device().safe_pc()==0x2a9b || space->device().safe_pc()==0x2adc
364		|| space->device().safe_pc()==0x1cac) // BigFight
	361	if (space.device().safe_pc()==0x2ba3 || space.device().safe_pc()==0x2a9b || space.device().safe_pc()==0x2adc
	362	|| space.device().safe_pc()==0x1cac) // BigFight
365	363	return 0;
366	364	return r;
367	365	}

trunk/src/mame/machine/beezer.c

r17961	r17962
4	4	#include "includes/beezer.h"
5	5
6	6
7		static READ8_DEVICE_HANDLER( b_via_0_pa_r );
8		static READ8_DEVICE_HANDLER( b_via_0_pb_r );
9		static WRITE8_DEVICE_HANDLER( b_via_0_pa_w );
10		static WRITE8_DEVICE_HANDLER( b_via_0_pb_w );
	7	static DECLARE_READ8_DEVICE_HANDLER( b_via_0_pa_r );
	8	static DECLARE_READ8_DEVICE_HANDLER( b_via_0_pb_r );
	9	static DECLARE_WRITE8_DEVICE_HANDLER( b_via_0_pa_w );
	10	static DECLARE_WRITE8_DEVICE_HANDLER( b_via_0_pb_w );
11	11	static READ_LINE_DEVICE_HANDLER( b_via_0_ca2_r );
12	12
13		static READ8_DEVICE_HANDLER( b_via_1_pa_r );
14		static READ8_DEVICE_HANDLER( b_via_1_pb_r );
15		static WRITE8_DEVICE_HANDLER( b_via_1_pa_w );
16		static WRITE8_DEVICE_HANDLER( b_via_1_pb_w );
	13	static DECLARE_READ8_DEVICE_HANDLER( b_via_1_pa_r );
	14	static DECLARE_READ8_DEVICE_HANDLER( b_via_1_pb_r );
	15	static DECLARE_WRITE8_DEVICE_HANDLER( b_via_1_pa_w );
	16	static DECLARE_WRITE8_DEVICE_HANDLER( b_via_1_pb_w );
17	17
18	18
19	19	/* VIA 0 (aka "PPCNP74", U6 @1C on schematics)
r17961	r17962
140	140
141	141	static READ8_DEVICE_HANDLER( b_via_1_pb_r )
142	142	{
143		return 0x1F | (beezer_noise_r(device->machine().device("custom"), 0)?0x40:0);
	143	return 0x1F | (beezer_noise_r(device->machine().device("custom"), space, 0)?0x40:0);
144	144	}
145	145
146	146	static WRITE8_DEVICE_HANDLER( b_via_1_pa_w )
r17961	r17962
151	151
152	152	static WRITE8_DEVICE_HANDLER( b_via_1_pb_w )
153	153	{
154		beezer_timer1_w(device->machine().device("custom"), 0, data&0x80);
	154	beezer_timer1_w(device->machine().device("custom"), space, 0, data&0x80);
155	155	//if ((data&0x1f) != 0x01)
156	156	//  popmessage("via1 pb low write of 0x%02x is not supported! contact mamedev!", data&0x1f);
157	157	}

trunk/src/mame/machine/mcr68.c

r17961	r17962
24	24	static TIMER_CALLBACK( mcr68_493_callback );
25	25	static TIMER_CALLBACK( zwackery_493_callback );
26	26
27		static WRITE8_DEVICE_HANDLER( zwackery_pia0_w );
28		static WRITE8_DEVICE_HANDLER( zwackery_pia1_w );
	27	static DECLARE_WRITE8_DEVICE_HANDLER( zwackery_pia0_w );
	28	static DECLARE_WRITE8_DEVICE_HANDLER( zwackery_pia1_w );
29	29	static WRITE_LINE_DEVICE_HANDLER( zwackery_ca2_w );
30	30	static WRITE_LINE_DEVICE_HANDLER( zwackery_pia_irq );
31	31

trunk/src/mame/machine/atarifb.c

r17961	r17962
15	15
16	16	m_CTRLD = data;
17	17
18		discrete_sound_w(discrete, ATARIFB_WHISTLE_EN, data & 0x01);      // Whistle
19		discrete_sound_w(discrete, ATARIFB_HIT_EN, data & 0x02);         // Hit
20		discrete_sound_w(discrete, ATARIFB_ATTRACT_EN, data & 0x10);      // Attract
21		discrete_sound_w(discrete, ATARIFB_NOISE_EN, data & 0x04);         // Noise Enable / Kicker
	18	discrete_sound_w(discrete, space, ATARIFB_WHISTLE_EN, data & 0x01);      // Whistle
	19	discrete_sound_w(discrete, space, ATARIFB_HIT_EN, data & 0x02);         // Hit
	20	discrete_sound_w(discrete, space, ATARIFB_ATTRACT_EN, data & 0x10);      // Attract
	21	discrete_sound_w(discrete, space, ATARIFB_NOISE_EN, data & 0x04);         // Noise Enable / Kicker
22	22	}
23	23
24	24
r17961	r17962
28	28
29	29	m_CTRLD = data;
30	30
31		discrete_sound_w(discrete, ATARIFB_WHISTLE_EN, data & 0x01);      // Whistle
32		discrete_sound_w(discrete, ATARIFB_HIT_EN, data & 0x02);         // Hit
33		discrete_sound_w(discrete, ATARIFB_ATTRACT_EN, data & 0x10);      // Attract
34		discrete_sound_w(discrete, ATARIFB_NOISE_EN, data & 0x04);         // Noise Enable / Kicker
	31	discrete_sound_w(discrete, space, ATARIFB_WHISTLE_EN, data & 0x01);      // Whistle
	32	discrete_sound_w(discrete, space, ATARIFB_HIT_EN, data & 0x02);         // Hit
	33	discrete_sound_w(discrete, space, ATARIFB_ATTRACT_EN, data & 0x10);      // Attract
	34	discrete_sound_w(discrete, space, ATARIFB_NOISE_EN, data & 0x04);         // Noise Enable / Kicker
35	35
36	36	coin_counter_w(machine(), 1, data & 0x80);
37	37	}
r17961	r17962
43	43
44	44	m_CTRLD = data;
45	45
46		discrete_sound_w(discrete, ATARIFB_WHISTLE_EN, data & 0x01);      // Whistle
47		discrete_sound_w(discrete, ATARIFB_HIT_EN, data & 0x02);         // Hit
48		discrete_sound_w(discrete, ATARIFB_ATTRACT_EN, data & 0x10);      // Attract
49		discrete_sound_w(discrete, ATARIFB_NOISE_EN, data & 0x04);         // Noise Enable / Kicker
	46	discrete_sound_w(discrete, space, ATARIFB_WHISTLE_EN, data & 0x01);      // Whistle
	47	discrete_sound_w(discrete, space, ATARIFB_HIT_EN, data & 0x02);         // Hit
	48	discrete_sound_w(discrete, space, ATARIFB_ATTRACT_EN, data & 0x10);      // Attract
	49	discrete_sound_w(discrete, space, ATARIFB_NOISE_EN, data & 0x04);         // Noise Enable / Kicker
50	50
51	51	if (data & 0x80)
52	52	{
r17961	r17962
77	77	/* bit 5-6 = trackball CTRL bits */
78	78	/* bit 7 = Rule LED */
79	79
80		discrete_sound_w(discrete, ATARIFB_WHISTLE_EN, data & 0x01);      // Whistle
81		discrete_sound_w(discrete, ATARIFB_HIT_EN, data & 0x02);         // Hit
82		discrete_sound_w(discrete, ATARIFB_ATTRACT_EN, data & 0x10);      // Attract
83		discrete_sound_w(discrete, ATARIFB_NOISE_EN, data & 0x04);         // Noise Enable / Kicker
	80	discrete_sound_w(discrete, space, ATARIFB_WHISTLE_EN, data & 0x01);      // Whistle
	81	discrete_sound_w(discrete, space, ATARIFB_HIT_EN, data & 0x02);         // Hit
	82	discrete_sound_w(discrete, space, ATARIFB_ATTRACT_EN, data & 0x10);      // Attract
	83	discrete_sound_w(discrete, space, ATARIFB_NOISE_EN, data & 0x04);         // Noise Enable / Kicker
84	84
85	85	//  set_led_status(machine(), 0, data & 0x10);  // !!!!!!!!!! Is this correct????
86	86	set_led_status(machine(), 1, data & 0x80);
r17961	r17962
91	91	{
92	92	device_t *discrete = machine().device("discrete");
93	93
94		discrete_sound_w(discrete, ATARIFB_CROWD_DATA, data & 0x0f);   // Crowd
	94	discrete_sound_w(discrete, space, ATARIFB_CROWD_DATA, data & 0x0f);   // Crowd
95	95
96	96	coin_counter_w (machine(), 0, data & 0x10);
97	97	}
r17961	r17962
101	101	{
102	102	device_t *discrete = machine().device("discrete");
103	103
104		discrete_sound_w(discrete, ATARIFB_CROWD_DATA, data & 0x0f);   // Crowd
	104	discrete_sound_w(discrete, space, ATARIFB_CROWD_DATA, data & 0x0f);   // Crowd
105	105
106	106	coin_counter_w (machine(), 0, data & 0x10);
107	107	coin_counter_w (machine(), 1, data & 0x20);

trunk/src/mame/machine/namco51.h

r17961	r17962
16	16	MCFG_DEVICE_CONFIG(_interface)
17	17
18	18
19		READ8_DEVICE_HANDLER( namco_51xx_read );
20		WRITE8_DEVICE_HANDLER( namco_51xx_write );
	19	DECLARE_READ8_DEVICE_HANDLER( namco_51xx_read );
	20	DECLARE_WRITE8_DEVICE_HANDLER( namco_51xx_write );
21	21
22	22
23	23	class namco_51xx_device : public device_t

trunk/src/mame/machine/simpsons.c

r17961	r17962
53	53
54	54	READ8_DEVICE_HANDLER( simpsons_sound_r )
55	55	{
56		return k053260_r(device, 2 + offset);
	56	return k053260_r(device, space, 2 + offset);
57	57	}
58	58
59	59

trunk/src/mame/machine/megavdp.c

r17961	r17962
854	854	case 0x12:
855	855	case 0x14:
856	856	case 0x16:
857		if (ACCESSING_BITS_0_7) sn76496_w(space.machine().device(":snsnd"), 0, data & 0xff);
	857	if (ACCESSING_BITS_0_7) sn76496_w(space.machine().device(":snsnd"), space, 0, data & 0xff);
858	858	//if (ACCESSING_BITS_8_15) sn76496_w(space->machine().device("snsnd"), 0, (data >>8) & 0xff);
859	859	break;
860	860

trunk/src/mame/machine/cd32.c

r17961	r17962
774	774	READ32_DEVICE_HANDLER( amiga_akiko32_r )
775	775	{
776	776	akiko_state *state = get_safe_token(device);
777		address_space *space = state->m_space;
778	777	UINT32      retval;
779	778
780	779	if ( LOG_AKIKO && offset < (0x30/4) )
781	780	{
782		logerror( "Reading AKIKO reg %0x [%s] at PC=%06x\n", offset, get_akiko_reg_name(offset), space->device().safe_pc() );
	781	logerror( "Reading AKIKO reg %0x [%s] at PC=%06x\n", offset, get_akiko_reg_name(offset), state->m_space->device().safe_pc() );
783	782	}
784	783
785	784	switch( offset )
786	785	{
787	786	case 0x00/4:   /* ID */
788		if ( state->m_cdrom != NULL ) cdda_set_cdrom(space->machine().device("cdda"), state->m_cdrom);
	787	if ( state->m_cdrom != NULL ) cdda_set_cdrom(state->m_space->machine().device("cdda"), state->m_cdrom);
789	788	return 0x0000cafe;
790	789
791	790	case 0x04/4:   /* CDROM STATUS 1 */
r17961	r17962
838	837	WRITE32_DEVICE_HANDLER( amiga_akiko32_w )
839	838	{
840	839	akiko_state *state = get_safe_token(device);
841		address_space *space = state->m_space;
842	840
843	841	if ( LOG_AKIKO && offset < (0x30/4) )
844	842	{
845		logerror( "Writing AKIKO reg %0x [%s] with %08x at PC=%06x\n", offset, get_akiko_reg_name(offset), data, space->device().safe_pc() );
	843	logerror( "Writing AKIKO reg %0x [%s] with %08x at PC=%06x\n", offset, get_akiko_reg_name(offset), data, state->m_space->device().safe_pc() );
846	844	}
847	845
848	846	switch( offset )

trunk/src/mame/machine/playch10.c

r17961	r17962
34	34	m_MMC2_bank_latch[0] = m_MMC2_bank_latch[1] = 0xfe;
35	35
36	36	/* reset the security chip */
37		rp5h01_enable_w(rp5h01, 0, 0);
38		rp5h01_reset_w(rp5h01, 0, 0);
39		rp5h01_reset_w(rp5h01, 0, 1);
40		rp5h01_enable_w(rp5h01, 0, 1);
	37	address_space &space = generic_space();
	38	rp5h01_enable_w(rp5h01, space, 0, 0);
	39	rp5h01_reset_w(rp5h01, space, 0, 0);
	40	rp5h01_reset_w(rp5h01, space, 0, 1);
	41	rp5h01_enable_w(rp5h01, space, 0, 1);
41	42
42	43	pc10_set_mirroring(m_mirroring);
43	44	}
r17961	r17962
168	169	/* we only support a single cart connected at slot 0 */
169	170	if (m_cart_sel == 0)
170	171	{
171		rp5h01_enable_w(rp5h01, 0, 0);
172		data |= ((~rp5h01_counter_r(rp5h01, 0)) << 4) & 0x10;   /* D4 */
173		data |= ((rp5h01_data_r(rp5h01, 0)) << 3) & 0x08;      /* D3 */
174		rp5h01_enable_w(rp5h01, 0, 1);
	172	rp5h01_enable_w(rp5h01, space, 0, 0);
	173	data |= ((~rp5h01_counter_r(rp5h01, space, 0)) << 4) & 0x10;   /* D4 */
	174	data |= ((rp5h01_data_r(rp5h01, space, 0)) << 3) & 0x08;      /* D3 */
	175	rp5h01_enable_w(rp5h01, space, 0, 1);
175	176	}
176	177	return data;
177	178	}
r17961	r17962
182	183	/* we only support a single cart connected at slot 0 */
183	184	if (m_cart_sel == 0)
184	185	{
185		rp5h01_enable_w(rp5h01, 0, 0);
186		rp5h01_test_w(rp5h01, 0, data & 0x10);      /* D4 */
187		rp5h01_clock_w(rp5h01, 0, data & 0x08);      /* D3 */
188		rp5h01_reset_w(rp5h01, 0, ~data & 0x01);   /* D0 */
189		rp5h01_enable_w(rp5h01, 0, 1);
	186	rp5h01_enable_w(rp5h01, space, 0, 0);
	187	rp5h01_test_w(rp5h01, space, 0, data & 0x10);      /* D4 */
	188	rp5h01_clock_w(rp5h01, space, 0, data & 0x08);      /* D3 */
	189	rp5h01_reset_w(rp5h01, space, 0, ~data & 0x01);   /* D0 */
	190	rp5h01_enable_w(rp5h01, space, 0, 1);
190	191
191	192	/* this thing gets dense at some point                      */
192	193	/* it wants to jump and execute an opcode at $ffff, wich    */

trunk/src/mame/machine/gaelco3d.h

r17961	r17962
44	44	FUNCTION PROTOTYPES
45	45	***************************************************************************/
46	46
47		READ8_DEVICE_HANDLER( gaelco_serial_status_r);
48		WRITE8_DEVICE_HANDLER( gaelco_serial_data_w);
49		READ8_DEVICE_HANDLER( gaelco_serial_data_r);
50		WRITE8_DEVICE_HANDLER( gaelco_serial_rts_w );
	47	DECLARE_READ8_DEVICE_HANDLER( gaelco_serial_status_r);
	48	DECLARE_WRITE8_DEVICE_HANDLER( gaelco_serial_data_w);
	49	DECLARE_READ8_DEVICE_HANDLER( gaelco_serial_data_r);
	50	DECLARE_WRITE8_DEVICE_HANDLER( gaelco_serial_rts_w );
51	51	/* Set to 1 during transmit, 0 for receive */
52		WRITE8_DEVICE_HANDLER( gaelco_serial_tr_w);
	52	DECLARE_WRITE8_DEVICE_HANDLER( gaelco_serial_tr_w);
53	53
54	54
55	55	/* Big questions marks, related to serial i/o */
r17961	r17962
57	57	/* Not used in surfplnt, but in radikalb
58	58	* Set at beginning of transfer sub, cleared at end
59	59	*/
60		WRITE8_DEVICE_HANDLER( gaelco_serial_unknown_w);
	60	DECLARE_WRITE8_DEVICE_HANDLER( gaelco_serial_unknown_w);
61	61
62	62
63	63	/* only used in radikalb, set at beginning of receive isr, cleared at end */
64		WRITE8_DEVICE_HANDLER( gaelco_serial_irq_enable );
	64	DECLARE_WRITE8_DEVICE_HANDLER( gaelco_serial_irq_enable );
65	65
66	66
67	67

trunk/src/mame/machine/konppc.c

r17961	r17962
413	413	if (nwk_device_sel[0] & 0x01)
414	414	return nwk_fifo_r(space, 0);
415	415	else
416		return k033906_r(k033906_1, offset, mem_mask);
	416	return k033906_r(k033906_1, *space, offset, mem_mask);
417	417	}
418	418
419	419	WRITE32_HANDLER( K033906_0_w )
420	420	{
421	421	device_t *k033906_1 = space->machine().device("k033906_1");
422		k033906_w(k033906_1, offset, data, mem_mask);
	422	k033906_w(k033906_1, *space, offset, data, mem_mask);
423	423	}
424	424
425	425	READ32_HANDLER( K033906_1_r )
r17961	r17962
428	428	if (nwk_device_sel[1] & 0x01)
429	429	return nwk_fifo_r(space, 1);
430	430	else
431		return k033906_r(k033906_2, offset, mem_mask);
	431	return k033906_r(k033906_2, *space, offset, mem_mask);
432	432	}
433	433
434	434	WRITE32_HANDLER(K033906_1_w)
435	435	{
436	436	device_t *k033906_2 = space->machine().device("k033906_2");
437		k033906_w(k033906_2, offset, data, mem_mask);
	437	k033906_w(k033906_2, *space, offset, data, mem_mask);
438	438	}
439	439
440	440	/*****************************************************************************/
r17961	r17962
452	452	}
453	453	else
454	454	{
455		voodoo_w(device, offset ^ 0x80000, data, mem_mask);
	455	voodoo_w(device, space, offset ^ 0x80000, data, mem_mask);
456	456	}
457	457	}
458	458
r17961	r17962
469	469	}
470	470	else
471	471	{
472		voodoo_w(device, offset ^ 0x80000, data, mem_mask);
	472	voodoo_w(device, space, offset ^ 0x80000, data, mem_mask);
473	473	}
474	474	}
475	475
r17961	r17962
481	481	}
482	482	else
483	483	{
484		return voodoo_r(device, offset, mem_mask);
	484	return voodoo_r(device, space, offset, mem_mask);
485	485	}
486	486	}
487	487
r17961	r17962
493	493	}
494	494	else
495	495	{
496		return voodoo_r(device, offset, mem_mask);
	496	return voodoo_r(device, space, offset, mem_mask);
497	497	}
498	498	}
499	499
r17961	r17962
510	510	}
511	511	else
512	512	{
513		voodoo_w(device, offset, data, mem_mask);
	513	voodoo_w(device, space, offset, data, mem_mask);
514	514	}
515	515	}
516	516
r17961	r17962
527	527	}
528	528	else
529	529	{
530		voodoo_w(device, offset, data, mem_mask);
	530	voodoo_w(device, space, offset, data, mem_mask);
531	531	}
532	532	}
533	533

trunk/src/mame/machine/leland.c

r17961	r17962
332	332
333	333	/* reset globals */
334	334	m_gfx_control = 0x00;
335		leland_sound_port_w(machine().device("ay8910.1"), 0, 0xff);
	335	address_space &space = generic_space();
	336	leland_sound_port_w(machine().device("ay8910.1"), space, 0, 0xff);
336	337	m_wcol_enable = 0;
337	338
338	339	m_dangerz_x = 512;
r17961	r17962
470	471	(*m_update_master_bank)(machine());
471	472
472	473	/* sound control is in the rest */
473		leland_80186_control_w(machine().device("custom"), offset, data);
	474	leland_80186_control_w(machine().device("custom"), space, offset, data);
474	475	}
475	476
476	477
r17961	r17962
1103	1104
1104	1105	case 0x03:   /* /IGID */
1105	1106	case 0x13:
1106		result = ay8910_r(machine().device("ay8910.1"), offset);
	1107	result = ay8910_r(machine().device("ay8910.1"), space, offset);
1107	1108	break;
1108	1109
1109	1110	case 0x10:   /* /GIN0 */
r17961	r17962
1145	1146
1146	1147	case 0x0a:   /* /OGIA */
1147	1148	case 0x0b:   /* /OGID */
1148		ay8910_address_data_w(machine().device("ay8910.1"), offset, data);
	1149	ay8910_address_data_w(machine().device("ay8910.1"), space, offset, data);
1149	1150	break;
1150	1151
1151	1152	case 0x0c:   /* /BKXL */
r17961	r17962
1314	1315	{
1315	1316	leland_state *state = device->machine().driver_data<leland_state>();
1316	1317	/* update the graphics banking */
1317		leland_gfx_port_w(device, 0, data);
	1318	leland_gfx_port_w(device, space, 0, data);
1318	1319
1319	1320	/* set the new value */
1320	1321	state->m_gfx_control = data;

trunk/src/mame/machine/konppc.h

r17961	r17962
31	31	READ32_HANDLER(K033906_1_r);
32	32	WRITE32_HANDLER(K033906_1_w);
33	33
34		WRITE32_DEVICE_HANDLER(nwk_fifo_0_w);
35		WRITE32_DEVICE_HANDLER(nwk_fifo_1_w);
36		READ32_DEVICE_HANDLER(nwk_voodoo_0_r);
37		READ32_DEVICE_HANDLER(nwk_voodoo_1_r);
38		WRITE32_DEVICE_HANDLER(nwk_voodoo_0_w);
39		WRITE32_DEVICE_HANDLER(nwk_voodoo_1_w);
	34	DECLARE_WRITE32_DEVICE_HANDLER(nwk_fifo_0_w);
	35	DECLARE_WRITE32_DEVICE_HANDLER(nwk_fifo_1_w);
	36	DECLARE_READ32_DEVICE_HANDLER(nwk_voodoo_0_r);
	37	DECLARE_READ32_DEVICE_HANDLER(nwk_voodoo_1_r);
	38	DECLARE_WRITE32_DEVICE_HANDLER(nwk_voodoo_0_w);
	39	DECLARE_WRITE32_DEVICE_HANDLER(nwk_voodoo_1_w);
40	40
41	41	void draw_7segment_led(bitmap_rgb32 &bitmap, int x, int y, UINT8 value);
42	42

trunk/src/mame/machine/midwayic.c

r17961	r17962
1067	1067
1068	1068	/* offset 0 is a special case */
1069	1069	if (offset == 0)
1070		result = ide_controller32_r(device, ideoffs, 0x0000ffff);
	1070	result = ide_controller32_r(device, space, ideoffs, 0x0000ffff);
1071	1071
1072	1072	/* everything else is byte-sized */
1073	1073	else
1074		result = ide_controller32_r(device, ideoffs, 0xff << shift) >> shift;
	1074	result = ide_controller32_r(device, space, ideoffs, 0xff << shift) >> shift;
1075	1075	return result;
1076	1076	}
1077	1077
r17961	r17962
1084	1084
1085	1085	/* offset 0 is a special case */
1086	1086	if (offset == 0)
1087		ide_controller32_w(device, ideoffs, data, 0x0000ffff);
	1087	ide_controller32_w(device, space, ideoffs, data, 0x0000ffff);
1088	1088
1089	1089	/* everything else is byte-sized */
1090	1090	else
1091		ide_controller32_w(device, ideoffs, data << shift, 0xff << shift);
	1091	ide_controller32_w(device, space, ideoffs, data << shift, 0xff << shift);
1092	1092	}

trunk/src/mame/machine/midwayic.h

r17961	r17962
51	51
52	52
53	53	/* IDE ASIC maps the IDE registers */
54		READ32_DEVICE_HANDLER( midway_ide_asic_r );
55		WRITE32_DEVICE_HANDLER( midway_ide_asic_w );
	54	DECLARE_READ32_DEVICE_HANDLER( midway_ide_asic_r );
	55	DECLARE_WRITE32_DEVICE_HANDLER( midway_ide_asic_w );

trunk/src/mame/machine/vectrex.c

r17961	r17962
252	252	{
253	253	device_t *ay = device->machine().device("ay8912");
254	254
255		state->m_via_out[PORTA] = ay8910_r(ay, 0)
	255	state->m_via_out[PORTA] = ay8910_r(ay, space, 0)
256	256	& ~(state->m_imager_pinlevel & 0x80);
257	257	}
258	258	return state->m_via_out[PORTA];

trunk/src/mame/machine/dc.c

r17961	r17962
843	843
844	844	//  mame_printf_verbose("AICA REG: [%08x] read %" I64FMT "x, mask %" I64FMT "x\n", 0x700000+reg*4, (UINT64)offset, mem_mask);
845	845
846		return (UINT64) aica_r(device, offset*2, 0xffff)<<shift;
	846	return (UINT64) aica_r(device, space, offset*2, 0xffff)<<shift;
847	847	}
848	848
849	849	WRITE64_DEVICE_HANDLER( dc_aica_reg_w )
r17961	r17962
870	870	}
871	871	}
872	872
873		aica_w(device, offset*2, dat, shift ? ((mem_mask>>32)&0xffff) : (mem_mask & 0xffff));
	873	aica_w(device, space, offset*2, dat, shift ? ((mem_mask>>32)&0xffff) : (mem_mask & 0xffff));
874	874
875	875	//  mame_printf_verbose("AICA REG: [%08x=%x] write %" I64FMT "x to %x, mask %" I64FMT "x\n", 0x700000+reg*4, dat, data, offset, mem_mask);
876	876	}
877	877
878	878	READ32_DEVICE_HANDLER( dc_arm_aica_r )
879	879	{
880		return aica_r(device, offset*2, 0xffff) & 0xffff;
	880	return aica_r(device, space, offset*2, 0xffff) & 0xffff;
881	881	}
882	882
883	883	WRITE32_DEVICE_HANDLER( dc_arm_aica_w )
884	884	{
885		aica_w(device, offset*2, data, mem_mask&0xffff);
	885	aica_w(device, space, offset*2, data, mem_mask&0xffff);
886	886	}
887	887

trunk/src/mame/machine/buggychl.h

r17961	r17962
1	1	ADDRESS_MAP_EXTERN( buggychl_mcu_map, 8 );
2	2
3		WRITE8_DEVICE_HANDLER( buggychl_mcu_w );
4		READ8_DEVICE_HANDLER( buggychl_mcu_r );
5		READ8_DEVICE_HANDLER( buggychl_mcu_status_r );
	3	DECLARE_WRITE8_DEVICE_HANDLER( buggychl_mcu_w );
	4	DECLARE_READ8_DEVICE_HANDLER( buggychl_mcu_r );
	5	DECLARE_READ8_DEVICE_HANDLER( buggychl_mcu_status_r );
6	6
7	7	class buggychl_mcu_device : public device_t
8	8	{

trunk/src/mame/machine/namco53.h

r17961	r17962
18	18
19	19
20	20	void namco_53xx_read_request(device_t *device);
21		READ8_DEVICE_HANDLER( namco_53xx_read );
	21	DECLARE_READ8_DEVICE_HANDLER( namco_53xx_read );
22	22
23	23
24	24	class namco_53xx_device : public device_t

trunk/src/mame/machine/qix.c

r17961	r17962
22	22	*
23	23	*************************************/
24	24
25		static READ8_DEVICE_HANDLER( qixmcu_coin_r );
26		static WRITE8_DEVICE_HANDLER( qixmcu_coinctrl_w );
27		static WRITE8_DEVICE_HANDLER( qixmcu_coin_w );
	25	static DECLARE_READ8_DEVICE_HANDLER( qixmcu_coin_r );
	26	static DECLARE_WRITE8_DEVICE_HANDLER( qixmcu_coinctrl_w );
	27	static DECLARE_WRITE8_DEVICE_HANDLER( qixmcu_coin_w );
28	28
29		static WRITE8_DEVICE_HANDLER( qix_coinctl_w );
	29	static DECLARE_WRITE8_DEVICE_HANDLER( qix_coinctl_w );
30	30
31		static WRITE8_DEVICE_HANDLER( slither_76489_0_w );
32		static WRITE8_DEVICE_HANDLER( slither_76489_1_w );
	31	static DECLARE_WRITE8_DEVICE_HANDLER( slither_76489_0_w );
	32	static DECLARE_WRITE8_DEVICE_HANDLER( slither_76489_1_w );
33	33
34		static READ8_DEVICE_HANDLER( slither_trak_lr_r );
35		static READ8_DEVICE_HANDLER( slither_trak_ud_r );
	34	static DECLARE_READ8_DEVICE_HANDLER( slither_trak_lr_r );
	35	static DECLARE_READ8_DEVICE_HANDLER( slither_trak_ud_r );
36	36
37	37
38	38

trunk/src/mame/machine/snes.c

r17961	r17962
442	442	// APU is mirrored from 2140 to 217f
443	443	if (offset >= APU00 && offset < WMDATA)
444	444	{
445		return spc_port_out(state->m_spc700, offset & 0x3);
	445	return spc_port_out(state->m_spc700, *space, offset & 0x3);
446	446	}
447	447
448	448	if (state->m_has_addon_chip == HAS_SUPERFX && state->m_superfx != NULL)
r17961	r17962
605	605	if (offset >= APU00 && offset < WMDATA)
606	606	{
607	607	//      printf("816: %02x to APU @ %d (PC=%06x)\n", data, offset & 3,space->device().safe_pc());
608		spc_port_in(state->m_spc700, offset & 0x3, data);
	608	spc_port_in(state->m_spc700, *space, offset & 0x3, data);
609	609	space->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
610	610	return;
611	611	}

trunk/src/mame/machine/namco62.h

r17961	r17962
16	16	MCFG_DEVICE_CONFIG(_interface)
17	17
18	18
19		READ8_DEVICE_HANDLER( namco_62xx_read );
20		WRITE8_DEVICE_HANDLER( namco_62xx_write );
	19	DECLARE_READ8_DEVICE_HANDLER( namco_62xx_read );
	20	DECLARE_WRITE8_DEVICE_HANDLER( namco_62xx_write );
21	21
22	22
23	23	class namco_62xx_device : public device_t

trunk/src/mame/machine/mcr.c

r17961	r17962
41	41	*************************************/
42	42
43	43	static TIMER_CALLBACK( ipu_watchdog_reset );
44		static WRITE8_DEVICE_HANDLER( ipu_break_changed );
	44	static DECLARE_WRITE8_DEVICE_HANDLER( ipu_break_changed );
45	45
46	46
47	47
r17961	r17962
140	140
141	141	const z80sio_interface nflfoot_sio_intf =
142	142	{
143		ipu_ctc_interrupt,   /* interrupt handler */
144		0,               /* DTR changed handler */
145		0,               /* RTS changed handler */
146		ipu_break_changed,   /* BREAK changed handler */
147		mcr_ipu_sio_transmit/* transmit handler */
	143	DEVCB_LINE(ipu_ctc_interrupt),   /* interrupt handler */
	144	DEVCB_NULL,               /* DTR changed handler */
	145	DEVCB_NULL,               /* RTS changed handler */
	146	DEVCB_HANDLER(ipu_break_changed),   /* BREAK changed handler */
	147	DEVCB_HANDLER(mcr_ipu_sio_transmit)/* transmit handler */
148	148	};
149	149
150	150

trunk/src/mame/machine/archimds.c

r17961	r17962
684	684	case 1:
685	685	if (fdc) {
686	686	logerror("17XX: R @ addr %x mask %08x\n", offset*4, mem_mask);
687		return wd17xx_data_r(fdc, offset&0xf);
	687	return wd17xx_data_r(fdc, *space, offset&0xf);
688	688	} else {
689	689	logerror("Read from FDC device?\n");
690	690	return 0;
r17961	r17962
740	740	case 1:
741	741	if (fdc) {
742	742	logerror("17XX: %x to addr %x mask %08x\n", data, offset*4, mem_mask);
743		wd17xx_data_w(fdc, offset&0xf, data&0xff);
	743	wd17xx_data_w(fdc, *space, offset&0xf, data&0xff);
744	744	} else {
745	745	logerror("Write to FDC device?\n");
746	746	}

trunk/src/mame/machine/mathbox.h

r17961	r17962
20	20	FUNCTION PROTOTYPES
21	21	***************************************************************************/
22	22
23		WRITE8_DEVICE_HANDLER( mathbox_go_w );
24		READ8_DEVICE_HANDLER( mathbox_status_r );
25		READ8_DEVICE_HANDLER( mathbox_lo_r );
26		READ8_DEVICE_HANDLER( mathbox_hi_r );
	23	DECLARE_WRITE8_DEVICE_HANDLER( mathbox_go_w );
	24	DECLARE_READ8_DEVICE_HANDLER( mathbox_status_r );
	25	DECLARE_READ8_DEVICE_HANDLER( mathbox_lo_r );
	26	DECLARE_READ8_DEVICE_HANDLER( mathbox_hi_r );
27	27
28	28	/* ----- device interface ----- */
29	29	class mathbox_device : public device_t

trunk/src/mame/machine/williams.c

r17961	r17962
19	19	static void williams_main_firq(device_t *device, int state);
20	20	static void williams_snd_irq(device_t *device, int state);
21	21	static void williams_snd_irq_b(device_t *device, int state);
22		static WRITE8_DEVICE_HANDLER( williams_snd_cmd_w );
23		static WRITE8_DEVICE_HANDLER( playball_snd_cmd_w );
24		static WRITE8_DEVICE_HANDLER( blaster_snd_cmd_w );
	22	static DECLARE_WRITE8_DEVICE_HANDLER( williams_snd_cmd_w );
	23	static DECLARE_WRITE8_DEVICE_HANDLER( playball_snd_cmd_w );
	24	static DECLARE_WRITE8_DEVICE_HANDLER( blaster_snd_cmd_w );
25	25
26	26	/* input port mapping */
27		static WRITE8_DEVICE_HANDLER( williams_port_select_w );
28		static READ8_DEVICE_HANDLER( williams_input_port_49way_0_5_r );
29		static READ8_DEVICE_HANDLER( williams_49way_port_0_r );
	27	static DECLARE_WRITE8_DEVICE_HANDLER( williams_port_select_w );
	28	static DECLARE_READ8_DEVICE_HANDLER( williams_input_port_49way_0_5_r );
	29	static DECLARE_READ8_DEVICE_HANDLER( williams_49way_port_0_r );
30	30
31	31	/* newer-Williams routines */
32		static WRITE8_DEVICE_HANDLER( williams2_snd_cmd_w );
	32	static DECLARE_WRITE8_DEVICE_HANDLER( williams2_snd_cmd_w );
33	33	static void mysticm_main_irq(device_t *device, int state);
34	34	static void tshoot_main_irq(device_t *device, int state);
35	35
36	36	/* Lotto Fun-specific code */
37		static WRITE8_DEVICE_HANDLER( lottofun_coin_lock_w );
	37	static DECLARE_WRITE8_DEVICE_HANDLER( lottofun_coin_lock_w );
38	38
39	39	/* Turkey Shoot-specific code */
40		static READ8_DEVICE_HANDLER( tshoot_input_port_0_3_r );
41		static WRITE8_DEVICE_HANDLER( tshoot_lamp_w );
42		static WRITE8_DEVICE_HANDLER( tshoot_maxvol_w );
	40	static DECLARE_READ8_DEVICE_HANDLER( tshoot_input_port_0_3_r );
	41	static DECLARE_WRITE8_DEVICE_HANDLER( tshoot_lamp_w );
	42	static DECLARE_WRITE8_DEVICE_HANDLER( tshoot_maxvol_w );
43	43
44	44	/* Joust 2-specific code */
45		static WRITE8_DEVICE_HANDLER( joust2_snd_cmd_w );
46		static WRITE8_DEVICE_HANDLER( joust2_pia_3_cb1_w );
	45	static DECLARE_WRITE8_DEVICE_HANDLER( joust2_snd_cmd_w );
	46	static DECLARE_WRITE8_DEVICE_HANDLER( joust2_pia_3_cb1_w );
47	47
48	48
49	49	/*************************************
r17961	r17962
658	658	{
659	659	williams_state *state = device->machine().driver_data<williams_state>();
660	660	if (state->m_port_select)
661		return williams_49way_port_0_r(device, 0);
	661	return williams_49way_port_0_r(device, space, 0);
662	662	else
663	663	return state->ioport("IN3")->read();
664	664	}

trunk/src/mame/machine/nitedrvr.c

r17961	r17962
209	209	WRITE8_MEMBER(nitedrvr_state::nitedrvr_out0_w)
210	210	{
211	211
212		discrete_sound_w(m_discrete, NITEDRVR_MOTOR_DATA, data & 0x0f);   // Motor freq data
213		discrete_sound_w(m_discrete, NITEDRVR_SKID1_EN, data & 0x10);   // Skid1 enable
214		discrete_sound_w(m_discrete, NITEDRVR_SKID2_EN, data & 0x20);   // Skid2 enable
	212	discrete_sound_w(m_discrete, space, NITEDRVR_MOTOR_DATA, data & 0x0f);   // Motor freq data
	213	discrete_sound_w(m_discrete, space, NITEDRVR_SKID1_EN, data & 0x10);   // Skid1 enable
	214	discrete_sound_w(m_discrete, space, NITEDRVR_SKID2_EN, data & 0x20);   // Skid2 enable
215	215	}
216	216
217	217	/***************************************************************************
r17961	r17962
232	232
233	233	m_crash_en = data & 0x01;
234	234
235		discrete_sound_w(m_discrete, NITEDRVR_CRASH_EN, m_crash_en);   // Crash enable
236		discrete_sound_w(m_discrete, NITEDRVR_ATTRACT_EN, data & 0x02);      // Attract enable (sound disable)
	235	discrete_sound_w(m_discrete, space, NITEDRVR_CRASH_EN, m_crash_en);   // Crash enable
	236	discrete_sound_w(m_discrete, space, NITEDRVR_ATTRACT_EN, data & 0x02);      // Attract enable (sound disable)
237	237
238	238	if (!m_crash_en)
239	239	{
r17961	r17962
244	244	palette_set_color(machine(), 1, MAKE_RGB(0x00,0x00,0x00)); /* BLACK */
245	245	palette_set_color(machine(), 0, MAKE_RGB(0xff,0xff,0xff)); /* WHITE */
246	246	}
247		discrete_sound_w(m_discrete, NITEDRVR_BANG_DATA, m_crash_data_en ? m_crash_data : 0);   // Crash Volume
	247	discrete_sound_w(m_discrete, space, NITEDRVR_BANG_DATA, m_crash_data_en ? m_crash_data : 0);   // Crash Volume
248	248	}
249	249
250	250
r17961	r17962
255	255	if (state->m_crash_en && state->m_crash_data_en)
256	256	{
257	257	state->m_crash_data--;
258		discrete_sound_w(state->m_discrete, NITEDRVR_BANG_DATA, state->m_crash_data);   // Crash Volume
	258	address_space &space = timer.machine().driver_data()->generic_space();
	259	discrete_sound_w(state->m_discrete, space, NITEDRVR_BANG_DATA, state->m_crash_data);   // Crash Volume
259	260	if (!state->m_crash_data)
260	261	state->m_crash_data_en = 0;   // Done counting?
261	262

trunk/src/mame/video/hcastle.c

r17961	r17962
73	73
74	74	TILE_GET_INFO_MEMBER(hcastle_state::get_fg_tile_info)
75	75	{
76		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_1, 5);
77		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, 6);
	76	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_1, generic_space(), 5);
	77	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, generic_space(), 6);
78	78	int bit0 = (ctrl_5 >> 0) & 0x03;
79	79	int bit1 = (ctrl_5 >> 2) & 0x03;
80	80	int bit2 = (ctrl_5 >> 4) & 0x03;
r17961	r17962
97	97
98	98	TILE_GET_INFO_MEMBER(hcastle_state::get_bg_tile_info)
99	99	{
100		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_2, 5);
101		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_2, 6);
	100	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_2, generic_space(), 5);
	101	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_2, generic_space(), 6);
102	102	int bit0 = (ctrl_5 >> 0) & 0x03;
103	103	int bit1 = (ctrl_5 >> 2) & 0x03;
104	104	int bit2 = (ctrl_5 >> 4) & 0x03;
r17961	r17962
180	180	{
181	181	m_fg_tilemap->set_flip((data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
182	182	}
183		k007121_ctrl_w(m_k007121_1, offset, data);
	183	k007121_ctrl_w(m_k007121_1, space, offset, data);
184	184	}
185	185
186	186	WRITE8_MEMBER(hcastle_state::hcastle_pf2_control_w)
r17961	r17962
197	197	{
198	198	m_bg_tilemap->set_flip((data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
199	199	}
200		k007121_ctrl_w(m_k007121_2, offset, data);
	200	k007121_ctrl_w(m_k007121_2, space, offset, data);
201	201	}
202	202
203	203	/*****************************************************************************/
r17961	r17962
206	206	{
207	207	hcastle_state *state = machine.driver_data<hcastle_state>();
208	208	device_t *k007121 = bank ? state->m_k007121_2 : state->m_k007121_1;
209		int base_color = (k007121_ctrlram_r(k007121, 6) & 0x30) * 2;
	209	address_space &space = machine.driver_data()->generic_space();
	210	int base_color = (k007121_ctrlram_r(k007121, space, 6) & 0x30) * 2;
210	211	int bank_base = (bank == 0) ? 0x4000 * (state->m_gfx_bank & 1) : 0;
211	212
212	213	k007121_sprites_draw(k007121, bitmap, cliprect, machine.gfx[bank], machine.colortable, sbank, base_color, 0, bank_base, (UINT32)-1);
r17961	r17962
217	218	SCREEN_UPDATE_IND16( hcastle )
218	219	{
219	220	hcastle_state *state = screen.machine().driver_data<hcastle_state>();
	221	address_space &space = screen.machine().driver_data()->generic_space();
220	222
221		UINT8 ctrl_1_0 = k007121_ctrlram_r(state->m_k007121_1, 0);
222		UINT8 ctrl_1_1 = k007121_ctrlram_r(state->m_k007121_1, 1);
223		UINT8 ctrl_1_2 = k007121_ctrlram_r(state->m_k007121_1, 2);
224		UINT8 ctrl_1_3 = k007121_ctrlram_r(state->m_k007121_1, 3);
225		UINT8 ctrl_2_0 = k007121_ctrlram_r(state->m_k007121_2, 0);
226		UINT8 ctrl_2_1 = k007121_ctrlram_r(state->m_k007121_2, 1);
227		UINT8 ctrl_2_2 = k007121_ctrlram_r(state->m_k007121_2, 2);
228		UINT8 ctrl_2_3 = k007121_ctrlram_r(state->m_k007121_2, 3);
	223	UINT8 ctrl_1_0 = k007121_ctrlram_r(state->m_k007121_1, space, 0);
	224	UINT8 ctrl_1_1 = k007121_ctrlram_r(state->m_k007121_1, space, 1);
	225	UINT8 ctrl_1_2 = k007121_ctrlram_r(state->m_k007121_1, space, 2);
	226	UINT8 ctrl_1_3 = k007121_ctrlram_r(state->m_k007121_1, space, 3);
	227	UINT8 ctrl_2_0 = k007121_ctrlram_r(state->m_k007121_2, space, 0);
	228	UINT8 ctrl_2_1 = k007121_ctrlram_r(state->m_k007121_2, space, 1);
	229	UINT8 ctrl_2_2 = k007121_ctrlram_r(state->m_k007121_2, space, 2);
	230	UINT8 ctrl_2_3 = k007121_ctrlram_r(state->m_k007121_2, space, 3);
229	231
230	232	set_pens(screen.machine());
231	233

trunk/src/mame/video/labyrunr.c

r17961	r17962
66	66
67	67	TILE_GET_INFO_MEMBER(labyrunr_state::get_tile_info0)
68	68	{
69		UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, 3);
70		UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, 4);
71		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, 5);
72		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121, 6);
	69	UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, generic_space(), 3);
	70	UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, generic_space(), 4);
	71	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, generic_space(), 5);
	72	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121, generic_space(), 6);
73	73	int attr = m_videoram1[tile_index];
74	74	int code = m_videoram1[tile_index + 0x400];
75	75	int bit0 = (ctrl_5 >> 0) & 0x03;
r17961	r17962
95	95
96	96	TILE_GET_INFO_MEMBER(labyrunr_state::get_tile_info1)
97	97	{
98		UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, 3);
99		UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, 4);
100		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, 5);
101		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121, 6);
	98	UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, generic_space(), 3);
	99	UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, generic_space(), 4);
	100	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, generic_space(), 5);
	101	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121, generic_space(), 6);
102	102	int attr = m_videoram2[tile_index];
103	103	int code = m_videoram2[tile_index + 0x400];
104	104	int bit0 = (ctrl_5 >> 0) & 0x03;
r17961	r17962
179	179	SCREEN_UPDATE_IND16( labyrunr )
180	180	{
181	181	labyrunr_state *state = screen.machine().driver_data<labyrunr_state>();
182		UINT8 ctrl_0 = k007121_ctrlram_r(state->m_k007121, 0);
	182	address_space &space = screen.machine().driver_data()->generic_space();
	183	UINT8 ctrl_0 = k007121_ctrlram_r(state->m_k007121, space, 0);
183	184	rectangle finalclip0, finalclip1;
184	185
185	186	set_pens(screen.machine());
r17961	r17962
187	188	screen.machine().priority_bitmap.fill(0, cliprect);
188	189	bitmap.fill(get_black_pen(screen.machine()), cliprect);
189	190
190		if (~k007121_ctrlram_r(state->m_k007121, 3) & 0x20)
	191	if (~k007121_ctrlram_r(state->m_k007121, space, 3) & 0x20)
191	192	{
192	193	int i;
193	194
r17961	r17962
203	204	for(i = 0; i < 32; i++)
204	205	{
205	206	/* enable colscroll */
206		if((k007121_ctrlram_r(state->m_k007121, 1) & 6) == 6) // it's probably just one bit, but it's only used once in the game so I don't know which it's
207		state->m_layer0->set_scrolly((i + 2) & 0x1f, k007121_ctrlram_r(state->m_k007121, 2) + state->m_scrollram[i]);
	207	if((k007121_ctrlram_r(state->m_k007121, space, 1) & 6) == 6) // it's probably just one bit, but it's only used once in the game so I don't know which it's
	208	state->m_layer0->set_scrolly((i + 2) & 0x1f, k007121_ctrlram_r(state->m_k007121, space, 2) + state->m_scrollram[i]);
208	209	else
209		state->m_layer0->set_scrolly((i + 2) & 0x1f, k007121_ctrlram_r(state->m_k007121, 2));
	210	state->m_layer0->set_scrolly((i + 2) & 0x1f, k007121_ctrlram_r(state->m_k007121, space, 2));
210	211	}
211	212
212	213	state->m_layer0->draw(bitmap, finalclip0, TILEMAP_DRAW_OPAQUE, 0);
213		k007121_sprites_draw(state->m_k007121, bitmap, cliprect, screen.machine().gfx[0], screen.machine().colortable, state->m_spriteram,(k007121_ctrlram_r(state->m_k007121, 6) & 0x30) * 2, 40,0,(k007121_ctrlram_r(state->m_k007121, 3) & 0x40) >> 5);
	214	k007121_sprites_draw(state->m_k007121, bitmap, cliprect, screen.machine().gfx[0], screen.machine().colortable, state->m_spriteram,(k007121_ctrlram_r(state->m_k007121, space, 6) & 0x30) * 2, 40,0,(k007121_ctrlram_r(state->m_k007121, space, 3) & 0x40) >> 5);
214	215	/* we ignore the transparency because layer1 is drawn only at the top of the screen also covering sprites */
215	216	state->m_layer1->draw(bitmap, finalclip1, TILEMAP_DRAW_OPAQUE, 0);
216	217	}
r17961	r17962
223	224	finalclip0.min_y = finalclip1.min_y = cliprect.min_y;
224	225	finalclip0.max_y = finalclip1.max_y = cliprect.max_y;
225	226
226		if(k007121_ctrlram_r(state->m_k007121, 1) & 1)
	227	if(k007121_ctrlram_r(state->m_k007121, space, 1) & 1)
227	228	{
228	229	finalclip0.min_x = cliprect.max_x - ctrl_0 + 8;
229	230	finalclip0.max_x = cliprect.max_x;
r17961	r17962
280	281	if(use_clip3[1])
281	282	state->m_layer1->draw(bitmap, finalclip3, 0, 1);
282	283
283		k007121_sprites_draw(state->m_k007121, bitmap, cliprect, screen.machine().gfx[0], screen.machine().colortable, state->m_spriteram, (k007121_ctrlram_r(state->m_k007121, 6) & 0x30) * 2,40,0,(k007121_ctrlram_r(state->m_k007121, 3) & 0x40) >> 5);
	284	k007121_sprites_draw(state->m_k007121, bitmap, cliprect, screen.machine().gfx[0], screen.machine().colortable, state->m_spriteram, (k007121_ctrlram_r(state->m_k007121, space, 6) & 0x30) * 2,40,0,(k007121_ctrlram_r(state->m_k007121, space, 3) & 0x40) >> 5);
284	285	}
285	286	return 0;
286	287	}

trunk/src/mame/video/taito_o.c

r17961	r17962
31	31	is always 64 pixels. */
32	32
33	33	taitoo_state *state = machine.driver_data<taitoo_state>();
	34	address_space &space = machine.driver_data()->generic_space();
34	35	static const int size[] = { 1, 2, 4, 4 };
35	36	int x0, y0, x, y, dx, dy, ex, ey, zx, zy;
36	37	int ysize;
r17961	r17962
44	45	if (offs <  0x01b0 && priority == 0)   continue;
45	46	if (offs >= 0x01b0 && priority == 1)   continue;
46	47
47		x0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 1, 0xffff) & 0x3ff;
48		y0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 0, 0xffff) & 0x3ff;
49		zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 2, 0xffff) & 0x7f00) >> 8;
50		zoomy     = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 2, 0xffff) & 0x007f);
51		tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 3, 0xffff) & 0x1fff) << 2;
52		ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, offs, 0xffff) & 0x0c00) >> 10];
	48	x0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 1, 0xffff) & 0x3ff;
	49	y0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 0, 0xffff) & 0x3ff;
	50	zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 2, 0xffff) & 0x7f00) >> 8;
	51	zoomy     = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 2, 0xffff) & 0x007f);
	52	tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 3, 0xffff) & 0x1fff) << 2;
	53	ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, space, offs, 0xffff) & 0x0c00) >> 10];
53	54
54	55	if (tile_offs)
55	56	{
r17961	r17962
108	109	{
109	110	int tile, color, flipx, flipy;
110	111
111		tile  = tc0080vco_cram_0_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x7fff;
112		color = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x001f;
113		flipx = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0040;
114		flipy = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0080;
	112	tile  = tc0080vco_cram_0_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x7fff;
	113	color = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x001f;
	114	flipx = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0040;
	115	flipy = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0080;
115	116
116	117	if (tc0080vco_flipscreen_r(state->m_tc0080vco))
117	118	{

trunk/src/mame/video/decbac06.c

r17961	r17962
389	389	WRITE8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_w )
390	390	{
391	391	if (offset&1)
392		deco_bac06_pf_data_w(device,offset/2,data,0x00ff);
	392	deco_bac06_pf_data_w(device,space,offset/2,data,0x00ff);
393	393	else
394		deco_bac06_pf_data_w(device,offset/2,data<<8,0xff00);
	394	deco_bac06_pf_data_w(device,space,offset/2,data<<8,0xff00);
395	395	}
396	396
397	397	READ8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_r )
398	398	{
399	399	if (offset&1) /* MSB */
400		return deco_bac06_pf_data_r(device,offset/2,0x00ff);
	400	return deco_bac06_pf_data_r(device,space,offset/2,0x00ff);
401	401	else
402		return deco_bac06_pf_data_r(device,offset/2,0xff00)>>8;
	402	return deco_bac06_pf_data_r(device,space,offset/2,0xff00)>>8;
403	403	}
404	404
405	405	WRITE16_DEVICE_HANDLER( deco_bac06_pf_rowscroll_w )
r17961	r17962
430	430	WRITE8_DEVICE_HANDLER( deco_bac06_pf_control0_8bit_w )
431	431	{
432	432	if (offset&1)
433		deco_bac06_pf_control_0_w(device,offset/2,data,0x00ff); // oscar (mirrors?)
	433	deco_bac06_pf_control_0_w(device,space,offset/2,data,0x00ff); // oscar (mirrors?)
434	434	else
435		deco_bac06_pf_control_0_w(device,offset/2,data,0x00ff);
	435	deco_bac06_pf_control_0_w(device,space,offset/2,data,0x00ff);
436	436	}
437	437
438	438	/* used by dec8.c */
439	439	READ8_DEVICE_HANDLER( deco_bac06_pf_control1_8bit_r )
440	440	{
441	441	if (offset&1)
442		return deco_bac06_pf_control_1_r(device,offset/2,0x00ff);
	442	return deco_bac06_pf_control_1_r(device,space,offset/2,0x00ff);
443	443	else
444		return deco_bac06_pf_control_1_r(device,offset/2,0xff00)>>8;
	444	return deco_bac06_pf_control_1_r(device,space,offset/2,0xff00)>>8;
445	445	}
446	446
447	447	/* used by dec8.c */
r17961	r17962
450	450	if (offset<4) // these registers are 16-bit?
451	451	{
452	452	if (offset&1)
453		deco_bac06_pf_control_1_w(device,offset/2,data,0x00ff);
	453	deco_bac06_pf_control_1_w(device,space,offset/2,data,0x00ff);
454	454	else
455		deco_bac06_pf_control_1_w(device,offset/2,data<<8,0xff00);
	455	deco_bac06_pf_control_1_w(device,space,offset/2,data<<8,0xff00);
456	456	}
457	457	else // these registers are 8-bit and mirror? (triothep vs actfancr)
458	458	{
459	459	if (offset&1)
460		deco_bac06_pf_control_1_w(device,offset/2,data,0x00ff);
	460	deco_bac06_pf_control_1_w(device,space,offset/2,data,0x00ff);
461	461	else
462		deco_bac06_pf_control_1_w(device,offset/2,data,0x00ff);
	462	deco_bac06_pf_control_1_w(device,space,offset/2,data,0x00ff);
463	463	}
464	464	}
465	465
466	466	READ8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_r )
467	467	{
468	468	if (offset&1)
469		return deco_bac06_pf_rowscroll_r(device,offset/2,0x00ff);
	469	return deco_bac06_pf_rowscroll_r(device,space,offset/2,0x00ff);
470	470	else
471		return deco_bac06_pf_rowscroll_r(device,offset/2,0xff00)>>8;
	471	return deco_bac06_pf_rowscroll_r(device,space,offset/2,0xff00)>>8;
472	472	}
473	473
474	474
475	475	WRITE8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_w )
476	476	{
477	477	if (offset&1)
478		deco_bac06_pf_rowscroll_w(device,offset/2,data,0x00ff);
	478	deco_bac06_pf_rowscroll_w(device,space,offset/2,data,0x00ff);
479	479	else
480		deco_bac06_pf_rowscroll_w(device,offset/2,data<<8,0xff00);
	480	deco_bac06_pf_rowscroll_w(device,space,offset/2,data<<8,0xff00);
481	481	}
482	482
483	483	READ8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_swap_r )
484	484	{
485	485	if (offset&1)
486		return deco_bac06_pf_rowscroll_r(device,offset/2,0xff00)>>8;
	486	return deco_bac06_pf_rowscroll_r(device,space,offset/2,0xff00)>>8;
487	487	else
488		return deco_bac06_pf_rowscroll_r(device,offset/2,0x00ff);
	488	return deco_bac06_pf_rowscroll_r(device,space,offset/2,0x00ff);
489	489	}
490	490
491	491	WRITE8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_swap_w )
492	492	{
493	493	if (offset&1)
494		deco_bac06_pf_rowscroll_w(device,offset/2,data<<8,0xff00);
	494	deco_bac06_pf_rowscroll_w(device,space,offset/2,data<<8,0xff00);
495	495	else
496		deco_bac06_pf_rowscroll_w(device,offset/2,data,0x00ff);
	496	deco_bac06_pf_rowscroll_w(device,space,offset/2,data,0x00ff);
497	497	}
498	498
499	499
r17961	r17962
502	502	WRITE8_DEVICE_HANDLER( deco_bac06_pf_control0_8bit_packed_w )
503	503	{
504	504	if (offset&1)
505		deco_bac06_pf_control_0_w(device,offset/2,data<<8,0xff00);
	505	deco_bac06_pf_control_0_w(device,space,offset/2,data<<8,0xff00);
506	506	else
507		deco_bac06_pf_control_0_w(device,offset/2,data,0x00ff);
	507	deco_bac06_pf_control_0_w(device,space,offset/2,data,0x00ff);
508	508	}
509	509
510	510	/* used by hippodrm */
511	511	WRITE8_DEVICE_HANDLER( deco_bac06_pf_control1_8bit_swap_w )
512	512	{
513		deco_bac06_pf_control1_8bit_w(device, offset^1, data);
	513	deco_bac06_pf_control1_8bit_w(device,space, offset^1, data);
514	514	}
515	515
516	516	/* used by hippodrm */
517	517	READ8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_swap_r )
518	518	{
519		return deco_bac06_pf_data_8bit_r(device, offset^1);
	519	return deco_bac06_pf_data_8bit_r(device,space, offset^1);
520	520	}
521	521
522	522	/* used by hippodrm */
523	523	WRITE8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_swap_w )
524	524	{
525		deco_bac06_pf_data_8bit_w(device, offset^1, data);
	525	deco_bac06_pf_data_8bit_w(device,space, offset^1, data);
526	526	}

trunk/src/mame/video/decbac06.h

r17961	r17962
65	65
66	66	/* 16-bit accessors */
67	67
68		WRITE16_DEVICE_HANDLER( deco_bac06_pf_control_0_w );
69		READ16_DEVICE_HANDLER( deco_bac06_pf_control_1_r );
70		WRITE16_DEVICE_HANDLER( deco_bac06_pf_control_1_w );
	68	DECLARE_WRITE16_DEVICE_HANDLER( deco_bac06_pf_control_0_w );
	69	DECLARE_READ16_DEVICE_HANDLER( deco_bac06_pf_control_1_r );
	70	DECLARE_WRITE16_DEVICE_HANDLER( deco_bac06_pf_control_1_w );
71	71
72		WRITE16_DEVICE_HANDLER( deco_bac06_pf_data_w );
73		READ16_DEVICE_HANDLER( deco_bac06_pf_data_r );
74		WRITE16_DEVICE_HANDLER( deco_bac06_pf_rowscroll_w );
75		READ16_DEVICE_HANDLER( deco_bac06_pf_rowscroll_r );
76		WRITE16_DEVICE_HANDLER( deco_bac06_pf_colscroll_w );
77		READ16_DEVICE_HANDLER( deco_bac06_pf_colscroll_r );
	72	DECLARE_WRITE16_DEVICE_HANDLER( deco_bac06_pf_data_w );
	73	DECLARE_READ16_DEVICE_HANDLER( deco_bac06_pf_data_r );
	74	DECLARE_WRITE16_DEVICE_HANDLER( deco_bac06_pf_rowscroll_w );
	75	DECLARE_READ16_DEVICE_HANDLER( deco_bac06_pf_rowscroll_r );
	76	DECLARE_WRITE16_DEVICE_HANDLER( deco_bac06_pf_colscroll_w );
	77	DECLARE_READ16_DEVICE_HANDLER( deco_bac06_pf_colscroll_r );
78	78
79	79	/* 8-bit accessors */
80	80
81	81	/* for dec8.c, pcktgal.c */
82		READ8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_r );
83		WRITE8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_w );
	82	DECLARE_READ8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_r );
	83	DECLARE_WRITE8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_w );
84	84
85		WRITE8_DEVICE_HANDLER( deco_bac06_pf_control0_8bit_w );
86		READ8_DEVICE_HANDLER( deco_bac06_pf_control1_8bit_r );
87		WRITE8_DEVICE_HANDLER( deco_bac06_pf_control1_8bit_w );
	85	DECLARE_WRITE8_DEVICE_HANDLER( deco_bac06_pf_control0_8bit_w );
	86	DECLARE_READ8_DEVICE_HANDLER( deco_bac06_pf_control1_8bit_r );
	87	DECLARE_WRITE8_DEVICE_HANDLER( deco_bac06_pf_control1_8bit_w );
88	88
89		READ8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_r );
90		WRITE8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_w );
	89	DECLARE_READ8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_r );
	90	DECLARE_WRITE8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_w );
91	91
92	92	/* for hippodrm (dec0.c) and actfancr / triothep (H6280 based games)*/
93		WRITE8_DEVICE_HANDLER( deco_bac06_pf_control0_8bit_packed_w );
94		WRITE8_DEVICE_HANDLER( deco_bac06_pf_control1_8bit_swap_w );
95		READ8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_swap_r );
96		WRITE8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_swap_w );
97		READ8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_swap_r );
98		WRITE8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_swap_w );
	93	DECLARE_WRITE8_DEVICE_HANDLER( deco_bac06_pf_control0_8bit_packed_w );
	94	DECLARE_WRITE8_DEVICE_HANDLER( deco_bac06_pf_control1_8bit_swap_w );
	95	DECLARE_READ8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_swap_r );
	96	DECLARE_WRITE8_DEVICE_HANDLER( deco_bac06_pf_data_8bit_swap_w );
	97	DECLARE_READ8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_swap_r );
	98	DECLARE_WRITE8_DEVICE_HANDLER( deco_bac06_pf_rowscroll_8bit_swap_w );
99	99
100	100	extern const device_type DECO_BAC06;
101	101

trunk/src/mame/video/flkatck.c

r17961	r17962
16	16
17	17	TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_A)
18	18	{
19		UINT8 ctrl_0 = k007121_ctrlram_r(m_k007121, 0);
20		UINT8 ctrl_2 = k007121_ctrlram_r(m_k007121, 2);
21		UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, 3);
22		UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, 4);
23		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, 5);
	19	UINT8 ctrl_0 = k007121_ctrlram_r(m_k007121, generic_space(), 0);
	20	UINT8 ctrl_2 = k007121_ctrlram_r(m_k007121, generic_space(), 2);
	21	UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, generic_space(), 3);
	22	UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, generic_space(), 4);
	23	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, generic_space(), 5);
24	24	int attr = m_k007121_ram[tile_index];
25	25	int code = m_k007121_ram[tile_index + 0x400];
26	26	int bit0 = (ctrl_5 >> 0) & 0x03;
r17961	r17962
99	99	switch (offset)
100	100	{
101	101	case 0x04:   /* ROM bank select */
102		if (data != k007121_ctrlram_r(m_k007121, 4))
	102	if (data != k007121_ctrlram_r(m_k007121, space, 4))
103	103	machine().tilemap().mark_all_dirty();
104	104	break;
105	105
r17961	r17962
110	110	break;
111	111	}
112	112
113		k007121_ctrl_w(m_k007121, offset, data);
	113	k007121_ctrl_w(m_k007121, space, offset, data);
114	114	}
115	115
116	116
r17961	r17962
133	133	rectangle clip[2];
134	134	const rectangle &visarea = screen.visible_area();
135	135
	136	address_space &space = screen.machine().driver_data()->generic_space();
136	137	if (state->m_flipscreen)
137	138	{
138	139	clip[0] = visarea;
r17961	r17962
141	142	clip[1] = visarea;
142	143	clip[1].min_x = clip[1].max_x - 40;
143	144
144		state->m_k007121_tilemap[0]->set_scrollx(0, k007121_ctrlram_r(state->m_k007121, 0) - 56 );
145		state->m_k007121_tilemap[0]->set_scrolly(0, k007121_ctrlram_r(state->m_k007121, 2));
	145	state->m_k007121_tilemap[0]->set_scrollx(0, k007121_ctrlram_r(state->m_k007121, space, 0) - 56 );
	146	state->m_k007121_tilemap[0]->set_scrolly(0, k007121_ctrlram_r(state->m_k007121, space, 2));
146	147	state->m_k007121_tilemap[1]->set_scrollx(0, -16);
147	148	}
148	149	else
r17961	r17962
154	155	clip[1].max_x = 39;
155	156	clip[1].min_x = 0;
156	157
157		state->m_k007121_tilemap[0]->set_scrollx(0, k007121_ctrlram_r(state->m_k007121, 0) - 40 );
158		state->m_k007121_tilemap[0]->set_scrolly(0, k007121_ctrlram_r(state->m_k007121, 2));
	158	state->m_k007121_tilemap[0]->set_scrollx(0, k007121_ctrlram_r(state->m_k007121, space, 0) - 40 );
	159	state->m_k007121_tilemap[0]->set_scrolly(0, k007121_ctrlram_r(state->m_k007121, space, 2));
159	160	state->m_k007121_tilemap[1]->set_scrollx(0, 0);
160	161	}
161	162

trunk/src/mame/video/contra.c

r17961	r17962
78	78
79	79	TILE_GET_INFO_MEMBER(contra_state::get_fg_tile_info)
80	80	{
81		UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121_1, 3);
82		UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121_1, 4);
83		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_1, 5);
84		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, 6);
	81	UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121_1, generic_space(), 3);
	82	UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121_1, generic_space(), 4);
	83	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_1, generic_space(), 5);
	84	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, generic_space(), 6);
85	85	int attr = m_fg_cram[tile_index];
86	86	int bit0 = (ctrl_5 >> 0) & 0x03;
87	87	int bit1 = (ctrl_5 >> 2) & 0x03;
r17961	r17962
106	106
107	107	TILE_GET_INFO_MEMBER(contra_state::get_bg_tile_info)
108	108	{
109		UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121_2, 3);
110		UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121_2, 4);
111		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_2, 5);
112		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_2, 6);
	109	UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121_2, generic_space(), 3);
	110	UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121_2, generic_space(), 4);
	111	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_2, generic_space(), 5);
	112	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_2, generic_space(), 6);
113	113	int attr = m_bg_cram[tile_index];
114	114	int bit0 = (ctrl_5 >> 0) & 0x03;
115	115	int bit1 = (ctrl_5 >> 2) & 0x03;
r17961	r17962
135	135
136	136	TILE_GET_INFO_MEMBER(contra_state::get_tx_tile_info)
137	137	{
138		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_1, 5);
139		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, 6);
	138	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121_1, generic_space(), 5);
	139	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, generic_space(), 6);
140	140	int attr = m_tx_cram[tile_index];
141	141	int bit0 = (ctrl_5 >> 0) & 0x03;
142	142	int bit1 = (ctrl_5 >> 2) & 0x03;
r17961	r17962
238	238
239	239	WRITE8_MEMBER(contra_state::contra_K007121_ctrl_0_w)
240	240	{
241		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, 6);
	241	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, space, 6);
242	242
243	243	if (offset == 3)
244	244	{
r17961	r17962
257	257	if (offset == 7)
258	258	m_fg_tilemap->set_flip((data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
259	259
260		k007121_ctrl_w(m_k007121_1, offset, data);
	260	k007121_ctrl_w(m_k007121_1, space, offset, data);
261	261	}
262	262
263	263	WRITE8_MEMBER(contra_state::contra_K007121_ctrl_1_w)
264	264	{
265		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_2, 6);
	265	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_2, space, 6);
266	266
267	267	if (offset == 3)
268	268	{
r17961	r17962
279	279	if (offset == 7)
280	280	m_bg_tilemap->set_flip((data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
281	281
282		k007121_ctrl_w(m_k007121_2, offset, data);
	282	k007121_ctrl_w(m_k007121_2, space, offset, data);
283	283	}
284	284
285	285
r17961	r17962
294	294	{
295	295	contra_state *state = machine.driver_data<contra_state>();
296	296	device_t *k007121 = bank ? state->m_k007121_2 : state->m_k007121_1;
297		int base_color = (k007121_ctrlram_r(k007121, 6) & 0x30) * 2;
	297	address_space &space = machine.driver_data()->generic_space();
	298	int base_color = (k007121_ctrlram_r(k007121, space, 6) & 0x30) * 2;
298	299	const UINT8 *source;
299	300
300	301	if (bank == 0)
r17961	r17962
308	309	SCREEN_UPDATE_IND16( contra )
309	310	{
310	311	contra_state *state = screen.machine().driver_data<contra_state>();
311		UINT8 ctrl_1_0 = k007121_ctrlram_r(state->m_k007121_1, 0);
312		UINT8 ctrl_1_2 = k007121_ctrlram_r(state->m_k007121_1, 2);
313		UINT8 ctrl_2_0 = k007121_ctrlram_r(state->m_k007121_2, 0);
314		UINT8 ctrl_2_2 = k007121_ctrlram_r(state->m_k007121_2, 2);
	312	address_space &space = screen.machine().driver_data()->generic_space();
	313	UINT8 ctrl_1_0 = k007121_ctrlram_r(state->m_k007121_1, space, 0);
	314	UINT8 ctrl_1_2 = k007121_ctrlram_r(state->m_k007121_1, space, 2);
	315	UINT8 ctrl_2_0 = k007121_ctrlram_r(state->m_k007121_2, space, 0);
	316	UINT8 ctrl_2_2 = k007121_ctrlram_r(state->m_k007121_2, space, 2);
315	317	rectangle bg_finalclip = state->m_bg_clip;
316	318	rectangle fg_finalclip = state->m_fg_clip;
317	319	rectangle tx_finalclip = state->m_tx_clip;

trunk/src/mame/video/undrfire.c

r17961	r17962
350	350	{
351	351	device_t *tc0100scn = screen.machine().device("tc0100scn");
352	352	device_t *tc0480scp = screen.machine().device("tc0480scp");
	353	address_space &space = screen.machine().driver_data()->generic_space();
353	354	UINT8 layer[5];
354	355	UINT8 pivlayer[3];
355	356	UINT16 priority;
r17961	r17962
445	446	#endif
446	447	/* Sprites have variable priority (we kludge this on road levels) */
447	448	{
448		if ((tc0480scp_pri_reg_r(tc0480scp, 0) & 0x3) == 3)   /* on road levels kludge sprites up 1 priority */
	449	if ((tc0480scp_pri_reg_r(tc0480scp, space, 0) & 0x3) == 3)   /* on road levels kludge sprites up 1 priority */
449	450	{
450	451	static const int primasks[4] = {0xfff0, 0xff00, 0x0, 0x0};
451	452	draw_sprites(screen.machine(), bitmap, cliprect, primasks, 44, -574);
r17961	r17962
493	494	{
494	495	device_t *tc0100scn = screen.machine().device("tc0100scn");
495	496	device_t *tc0480scp = screen.machine().device("tc0480scp");
	497	address_space &space = screen.machine().driver_data()->generic_space();
496	498	UINT8 layer[5];
497	499	UINT8 pivlayer[3];
498	500	UINT16 priority;
r17961	r17962
588	590	#endif
589	591	/* Sprites have variable priority (we kludge this on road levels) */
590	592	{
591		if ((tc0480scp_pri_reg_r(tc0480scp, 0) & 0x3) == 3)   /* on road levels kludge sprites up 1 priority */
	593	if ((tc0480scp_pri_reg_r(tc0480scp, space, 0) & 0x3) == 3)   /* on road levels kludge sprites up 1 priority */
592	594	{
593	595	static const int primasks[4] = {0xfff0, 0xff00, 0x0, 0x0};
594	596	draw_sprites_cbombers(screen.machine(), bitmap, cliprect, primasks, 80, -208);

trunk/src/mame/video/dkong.c

r17961	r17962
725	725	state->m_sig30Hz = (1-state->m_sig30Hz);
726	726
727	727	/* Now mix with SND02 (sound 2) line - on 74ls259, bit2 */
728		state->m_rflip_sig = latch8_bit2_r(state->m_dev_6h, 0) & state->m_sig30Hz;
	728	address_space &space = machine.driver_data()->generic_space();
	729	state->m_rflip_sig = latch8_bit2_r(state->m_dev_6h, space, 0) & state->m_sig30Hz;
729	730
730	731	sig = state->m_rflip_sig ^ ((line_cnt & 0x80)>>7);
731	732
r17961	r17962
759	760	*
760	761	* Mixed with ANS line (bit 5) from Port B of 8039
761	762	*/
762		if (state->m_grid_on && latch8_bit5_r(state->m_dev_vp2, 0))
	763	if (state->m_grid_on && latch8_bit5_r(state->m_dev_vp2, space, 0))
763	764	{
764	765	diff = (0.0 - state->m_cv3);
765	766	diff = diff - diff*exp(0.0 - (1.0/RC32 * dt) );

trunk/src/mame/video/sprint4.c

r17961	r17962
139	139
140	140	/* update sound status */
141	141
142		discrete_sound_w(discrete, SPRINT4_MOTOR_DATA_1, videoram[0x391] & 15);
143		discrete_sound_w(discrete, SPRINT4_MOTOR_DATA_2, videoram[0x393] & 15);
144		discrete_sound_w(discrete, SPRINT4_MOTOR_DATA_3, videoram[0x395] & 15);
145		discrete_sound_w(discrete, SPRINT4_MOTOR_DATA_4, videoram[0x397] & 15);
	142	address_space &space = screen.machine().driver_data()->generic_space();
	143	discrete_sound_w(discrete, space, SPRINT4_MOTOR_DATA_1, videoram[0x391] & 15);
	144	discrete_sound_w(discrete, space, SPRINT4_MOTOR_DATA_2, videoram[0x393] & 15);
	145	discrete_sound_w(discrete, space, SPRINT4_MOTOR_DATA_3, videoram[0x395] & 15);
	146	discrete_sound_w(discrete, space, SPRINT4_MOTOR_DATA_4, videoram[0x397] & 15);
146	147	}
147	148	}
148	149

trunk/src/mame/video/simpsons.c

r17961	r17962
48	48
49	49	READ8_MEMBER(simpsons_state::simpsons_k052109_r)
50	50	{
51		return k052109_r(m_k052109, offset + 0x2000);
	51	return k052109_r(m_k052109, space, offset + 0x2000);
52	52	}
53	53
54	54	WRITE8_MEMBER(simpsons_state::simpsons_k052109_w)
55	55	{
56		k052109_w(m_k052109, offset + 0x2000, data);
	56	k052109_w(m_k052109, space, offset + 0x2000, data);
57	57	}
58	58
59	59	READ8_MEMBER(simpsons_state::simpsons_k053247_r)

trunk/src/mame/video/taito_b.c

r17961	r17962
264	264	taitob_state *state = machine.driver_data<taitob_state>();
265	265	rectangle myclip = cliprect;
266	266	int x, y;
267		UINT8 video_control = tc0180vcu_get_videoctrl(state->m_tc0180vcu, 0);
268		UINT8 framebuffer_page = tc0180vcu_get_fb_page(state->m_tc0180vcu, 0);
	267	address_space &space = machine.driver_data()->generic_space();
	268	UINT8 video_control = tc0180vcu_get_videoctrl(state->m_tc0180vcu, space, 0);
	269	UINT8 framebuffer_page = tc0180vcu_get_fb_page(state->m_tc0180vcu, space, 0);
269	270
270	271	g_profiler.start(PROFILER_USER1);
271	272
r17961	r17962
367	368	SCREEN_UPDATE_IND16( taitob )
368	369	{
369	370	taitob_state *state = screen.machine().driver_data<taitob_state>();
370		UINT8 video_control = tc0180vcu_get_videoctrl(state->m_tc0180vcu, 0);
	371	address_space &space = screen.machine().driver_data()->generic_space();
	372	UINT8 video_control = tc0180vcu_get_videoctrl(state->m_tc0180vcu, space, 0);
371	373
372	374	if ((video_control & 0x20) == 0)
373	375	{
r17961	r17962
403	405	SCREEN_UPDATE_RGB32( realpunc )
404	406	{
405	407	taitob_state *state = screen.machine().driver_data<taitob_state>();
	408	address_space &space = screen.machine().driver_data()->generic_space();
406	409	const rgb_t *palette = palette_entry_list_adjusted(screen.machine().palette);
407		UINT8 video_control = tc0180vcu_get_videoctrl(state->m_tc0180vcu, 0);
	410	UINT8 video_control = tc0180vcu_get_videoctrl(state->m_tc0180vcu, space, 0);
408	411	int x, y;
409	412
410	413	/* Video blanked? */
r17961	r17962
434	437	{
435	438	device_t *hd63484 = screen.machine().device("hd63484");
436	439
437		int base = (hd63484_regs_r(hd63484, 0xcc/2, 0xffff) << 16) + hd63484_regs_r(hd63484, 0xce/2, 0xffff);
438		int stride = hd63484_regs_r(hd63484, 0xca/2, 0xffff);
	440	int base = (hd63484_regs_r(hd63484, space, 0xcc/2, 0xffff) << 16) + hd63484_regs_r(hd63484, space, 0xce/2, 0xffff);
	441	int stride = hd63484_regs_r(hd63484, space, 0xca/2, 0xffff);
439	442
440	443	//      scrollx = taitob_scroll[0];
441	444	//      scrolly = taitob_scroll[1];
r17961	r17962
446	449	for (x = 0; x <= cliprect.max_x; x++)
447	450	{
448	451	int r, g, b;
449		UINT16 srcpix = hd63484_ram_r(hd63484, addr++, 0xffff);
	452	UINT16 srcpix = hd63484_ram_r(hd63484, space, addr++, 0xffff);
450	453
451	454	r = (BIT(srcpix, 1)) | ((srcpix >> 11) & 0x1e);
452	455	g = (BIT(srcpix, 2)) | ((srcpix >> 7) & 0x1e);
r17961	r17962
498	501	if (vblank_on)
499	502	{
500	503	taitob_state *state = screen.machine().driver_data<taitob_state>();
501		UINT8 video_control = tc0180vcu_get_videoctrl(state->m_tc0180vcu, 0);
502		UINT8 framebuffer_page = tc0180vcu_get_fb_page(state->m_tc0180vcu, 0);
	504	address_space &space = screen.machine().driver_data()->generic_space();
	505	UINT8 video_control = tc0180vcu_get_videoctrl(state->m_tc0180vcu, space, 0);
	506	UINT8 framebuffer_page = tc0180vcu_get_fb_page(state->m_tc0180vcu, space, 0);
503	507
504	508	if (~video_control & 0x01)
505	509	state->m_framebuffer[framebuffer_page]->fill(0, screen.machine().primary_screen->visible_area());
r17961	r17962
507	511	if (~video_control & 0x80)
508	512	{
509	513	framebuffer_page ^= 1;
510		tc0180vcu_set_fb_page(state->m_tc0180vcu, 0, framebuffer_page);
	514	tc0180vcu_set_fb_page(state->m_tc0180vcu, space, 0, framebuffer_page);
511	515	}
512	516
513	517	draw_sprites(screen.machine(), *state->m_framebuffer[framebuffer_page], screen.machine().primary_screen->visible_area());

trunk/src/mame/video/taitoic.c

r17961	r17962
1550	1550	else if (offset < 0x20800 / 2)   /* sprite ram */
1551	1551	{}
1552	1552	else if (offset < 0x20fff / 2)
1553		tc0080vco_scrollram_w(device, offset - (0x20800 / 2), tc0080vco->ram[offset], mem_mask);
	1553	tc0080vco_scrollram_w(device, space, offset - (0x20800 / 2), tc0080vco->ram[offset], mem_mask);
1554	1554	}
1555	1555
1556	1556	void tc0080vco_tilemap_update( device_t *device )
r17961	r17962
2344	2344
2345	2345	READ32_DEVICE_HANDLER( tc0100scn_ctrl_long_r )
2346	2346	{
2347		return (tc0100scn_ctrl_word_r(device, offset * 2, 0xffff) << 16) | tc0100scn_ctrl_word_r(device, offset * 2 + 1, 0xffff);
	2347	return (tc0100scn_ctrl_word_r(device, space, offset * 2, 0xffff) << 16) | tc0100scn_ctrl_word_r(device, space, offset * 2 + 1, 0xffff);
2348	2348	}
2349	2349
2350	2350	WRITE32_DEVICE_HANDLER( tc0100scn_ctrl_long_w )
2351	2351	{
2352	2352	if (ACCESSING_BITS_16_31)
2353		tc0100scn_ctrl_word_w(device, offset * 2, data >> 16, mem_mask >> 16);
	2353	tc0100scn_ctrl_word_w(device, space, offset * 2, data >> 16, mem_mask >> 16);
2354	2354	if (ACCESSING_BITS_0_15)
2355		tc0100scn_ctrl_word_w(device, (offset * 2) + 1, data & 0xffff, mem_mask & 0xffff);
	2355	tc0100scn_ctrl_word_w(device, space, (offset * 2) + 1, data & 0xffff, mem_mask & 0xffff);
2356	2356	}
2357	2357
2358	2358	READ32_DEVICE_HANDLER( tc0100scn_long_r )
2359	2359	{
2360		return (tc0100scn_word_r(device, offset * 2, 0xffff) << 16) | tc0100scn_word_r(device, offset * 2 + 1, 0xffff);
	2360	return (tc0100scn_word_r(device, space, offset * 2, 0xffff) << 16) | tc0100scn_word_r(device, space, offset * 2 + 1, 0xffff);
2361	2361	}
2362	2362
2363	2363	WRITE32_DEVICE_HANDLER( tc0100scn_long_w )
2364	2364	{
2365	2365	if (ACCESSING_BITS_16_31)
2366	2366	{
2367		int oldword = tc0100scn_word_r(device, offset * 2, 0xffff);
	2367	int oldword = tc0100scn_word_r(device, space, offset * 2, 0xffff);
2368	2368	int newword = data >> 16;
2369	2369	if (!ACCESSING_BITS_16_23)
2370	2370	newword |= (oldword & 0x00ff);
2371	2371	if (!ACCESSING_BITS_24_31)
2372	2372	newword |= (oldword & 0xff00);
2373		tc0100scn_word_w(device, offset * 2, newword, 0xffff);
	2373	tc0100scn_word_w(device, space, offset * 2, newword, 0xffff);
2374	2374	}
2375	2375	if (ACCESSING_BITS_0_15)
2376	2376	{
2377		int oldword = tc0100scn_word_r(device, (offset * 2) + 1, 0xffff);
	2377	int oldword = tc0100scn_word_r(device, space, (offset * 2) + 1, 0xffff);
2378	2378	int newword = data& 0xffff;
2379	2379	if (!ACCESSING_BITS_0_7)
2380	2380	newword |= (oldword & 0x00ff);
2381	2381	if (!ACCESSING_BITS_8_15)
2382	2382	newword |= (oldword & 0xff00);
2383		tc0100scn_word_w(device, (offset * 2) + 1, newword, 0xffff);
	2383	tc0100scn_word_w(device, space, (offset * 2) + 1, newword, 0xffff);
2384	2384	}
2385	2385	}
2386	2386
r17961	r17962
2699	2699
2700	2700	READ16_DEVICE_HANDLER( tc0430grw_word_r )
2701	2701	{
2702		return tc0280grd_word_r(device, offset, mem_mask);
	2702	return tc0280grd_word_r(device, space, offset, mem_mask);
2703	2703	}
2704	2704
2705	2705	WRITE16_DEVICE_HANDLER( tc0430grw_word_w )
2706	2706	{
2707		tc0280grd_word_w(device, offset, data, mem_mask);
	2707	tc0280grd_word_w(device, space, offset, data, mem_mask);
2708	2708	}
2709	2709
2710	2710	WRITE16_DEVICE_HANDLER( tc0430grw_ctrl_word_w )
2711	2711	{
2712		tc0280grd_ctrl_word_w(device, offset, data, mem_mask);
	2712	tc0280grd_ctrl_word_w(device, space, offset, data, mem_mask);
2713	2713	}
2714	2714
2715	2715	void tc0280grd_tilemap_update( device_t *device, int base_color )
r17961	r17962
3276	3276
3277	3277	READ32_DEVICE_HANDLER( tc0480scp_ctrl_long_r )
3278	3278	{
3279		return (tc0480scp_ctrl_word_r(device, offset * 2, 0xffff) << 16) | tc0480scp_ctrl_word_r(device, offset * 2 + 1, 0xffff);
	3279	return (tc0480scp_ctrl_word_r(device, space, offset * 2, 0xffff) << 16) | tc0480scp_ctrl_word_r(device, space, offset * 2 + 1, 0xffff);
3280	3280	}
3281	3281
3282	3282	/* TODO: byte access ? */
r17961	r17962
3284	3284	WRITE32_DEVICE_HANDLER( tc0480scp_ctrl_long_w )
3285	3285	{
3286	3286	if (ACCESSING_BITS_16_31)
3287		tc0480scp_ctrl_word_w(device, offset * 2, data >> 16, mem_mask >> 16);
	3287	tc0480scp_ctrl_word_w(device, space, offset * 2, data >> 16, mem_mask >> 16);
3288	3288	if (ACCESSING_BITS_0_15)
3289		tc0480scp_ctrl_word_w(device, (offset * 2) + 1, data & 0xffff, mem_mask & 0xffff);
	3289	tc0480scp_ctrl_word_w(device, space, (offset * 2) + 1, data & 0xffff, mem_mask & 0xffff);
3290	3290	}
3291	3291
3292	3292	READ32_DEVICE_HANDLER( tc0480scp_long_r )
3293	3293	{
3294		return (tc0480scp_word_r(device, offset * 2, 0xffff) << 16) | tc0480scp_word_r(device, offset * 2 + 1, 0xffff);
	3294	return (tc0480scp_word_r(device, space, offset * 2, 0xffff) << 16) | tc0480scp_word_r(device, space, offset * 2 + 1, 0xffff);
3295	3295	}
3296	3296
3297	3297	WRITE32_DEVICE_HANDLER( tc0480scp_long_w )
3298	3298	{
3299	3299	if (ACCESSING_BITS_16_31)
3300	3300	{
3301		int oldword = tc0480scp_word_r(device, offset * 2, 0xffff);
	3301	int oldword = tc0480scp_word_r(device, space, offset * 2, 0xffff);
3302	3302	int newword = data >> 16;
3303	3303	if (!ACCESSING_BITS_16_23)
3304	3304	newword |= (oldword & 0x00ff);
3305	3305	if (!ACCESSING_BITS_24_31)
3306	3306	newword |= (oldword & 0xff00);
3307		tc0480scp_word_w(device, offset * 2, newword, 0xffff);
	3307	tc0480scp_word_w(device, space, offset * 2, newword, 0xffff);
3308	3308	}
3309	3309	if (ACCESSING_BITS_0_15)
3310	3310	{
3311		int oldword = tc0480scp_word_r(device, (offset * 2) + 1, 0xffff);
	3311	int oldword = tc0480scp_word_r(device, space, (offset * 2) + 1, 0xffff);
3312	3312	int newword = data & 0xffff;
3313	3313	if (!ACCESSING_BITS_0_7)
3314	3314	newword |= (oldword & 0x00ff);
3315	3315	if (!ACCESSING_BITS_8_15)
3316	3316	newword |= (oldword & 0xff00);
3317		tc0480scp_word_w(device, (offset * 2) + 1, newword, 0xffff);
	3317	tc0480scp_word_w(device, space, (offset * 2) + 1, newword, 0xffff);
3318	3318	}
3319	3319	}
3320	3320

trunk/src/mame/video/vaportra.c

r17961	r17962
53	53	SCREEN_UPDATE_IND16( vaportra )
54	54	{
55	55	vaportra_state *state = screen.machine().driver_data<vaportra_state>();
56		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	56	address_space &space = screen.machine().driver_data()->generic_space();
	57	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
57	58	int pri = state->m_priority[0] & 0x03;
58	59
59	60	state->flip_screen_set(!BIT(flip, 7));

trunk/src/mame/video/taitoic.h

r17961	r17962
372	372	***************************************************************************/
373	373
374	374	/**  PC080SN  **/
375		READ16_DEVICE_HANDLER( pc080sn_word_r );
376		WRITE16_DEVICE_HANDLER( pc080sn_word_w );
377		WRITE16_DEVICE_HANDLER( pc080sn_xscroll_word_w );
378		WRITE16_DEVICE_HANDLER( pc080sn_yscroll_word_w );
379		WRITE16_DEVICE_HANDLER( pc080sn_ctrl_word_w );
	375	DECLARE_READ16_DEVICE_HANDLER( pc080sn_word_r );
	376	DECLARE_WRITE16_DEVICE_HANDLER( pc080sn_word_w );
	377	DECLARE_WRITE16_DEVICE_HANDLER( pc080sn_xscroll_word_w );
	378	DECLARE_WRITE16_DEVICE_HANDLER( pc080sn_yscroll_word_w );
	379	DECLARE_WRITE16_DEVICE_HANDLER( pc080sn_ctrl_word_w );
380	380
381	381	void pc080sn_set_scroll(device_t *device, int tilemap_num, int scrollx, int scrolly);
382	382	void pc080sn_set_trans_pen(device_t *device, int tilemap_num, int pen);
r17961	r17962
389	389
390	390
391	391	/**  PC090OJ  **/
392		READ16_DEVICE_HANDLER( pc090oj_word_r );
393		WRITE16_DEVICE_HANDLER( pc090oj_word_w );
	392	DECLARE_READ16_DEVICE_HANDLER( pc090oj_word_r );
	393	DECLARE_WRITE16_DEVICE_HANDLER( pc090oj_word_w );
394	394
395	395	void pc090oj_set_sprite_ctrl(device_t *device, UINT16 sprctrl);
396	396	void pc090oj_eof_callback(device_t *device);
r17961	r17962
398	398
399	399
400	400	/** TC0080VCO **/
401		READ16_DEVICE_HANDLER( tc0080vco_word_r );
402		WRITE16_DEVICE_HANDLER( tc0080vco_word_w );
	401	DECLARE_READ16_DEVICE_HANDLER( tc0080vco_word_r );
	402	DECLARE_WRITE16_DEVICE_HANDLER( tc0080vco_word_w );
403	403
404	404	void tc0080vco_tilemap_update(device_t *device);
405	405	void tc0080vco_tilemap_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int layer, int flags, UINT32 priority);
406	406
407		READ16_DEVICE_HANDLER( tc0080vco_cram_0_r );
408		READ16_DEVICE_HANDLER( tc0080vco_cram_1_r );
409		READ16_DEVICE_HANDLER( tc0080vco_sprram_r );
410		READ16_DEVICE_HANDLER( tc0080vco_scrram_r );
	407	DECLARE_READ16_DEVICE_HANDLER( tc0080vco_cram_0_r );
	408	DECLARE_READ16_DEVICE_HANDLER( tc0080vco_cram_1_r );
	409	DECLARE_READ16_DEVICE_HANDLER( tc0080vco_sprram_r );
	410	DECLARE_READ16_DEVICE_HANDLER( tc0080vco_scrram_r );
411	411	READ_LINE_DEVICE_HANDLER( tc0080vco_flipscreen_r );
412	412
413	413
r17961	r17962
426	426	void tc0100scn_set_bg_tilemask(device_t *device, int mask);
427	427
428	428	/* Function to for Mjnquest to select gfx bank */
429		WRITE16_DEVICE_HANDLER( tc0100scn_gfxbank_w );
	429	DECLARE_WRITE16_DEVICE_HANDLER( tc0100scn_gfxbank_w );
430	430
431		READ16_DEVICE_HANDLER( tc0100scn_word_r );
432		WRITE16_DEVICE_HANDLER( tc0100scn_word_w );
433		READ16_DEVICE_HANDLER( tc0100scn_ctrl_word_r );
434		WRITE16_DEVICE_HANDLER( tc0100scn_ctrl_word_w );
	431	DECLARE_READ16_DEVICE_HANDLER( tc0100scn_word_r );
	432	DECLARE_WRITE16_DEVICE_HANDLER( tc0100scn_word_w );
	433	DECLARE_READ16_DEVICE_HANDLER( tc0100scn_ctrl_word_r );
	434	DECLARE_WRITE16_DEVICE_HANDLER( tc0100scn_ctrl_word_w );
435	435
436	436	/* Functions for use with 68020 (Under Fire) */
437		READ32_DEVICE_HANDLER( tc0100scn_long_r );
438		WRITE32_DEVICE_HANDLER( tc0100scn_long_w );
439		READ32_DEVICE_HANDLER( tc0100scn_ctrl_long_r );
440		WRITE32_DEVICE_HANDLER( tc0100scn_ctrl_long_w );
	437	DECLARE_READ32_DEVICE_HANDLER( tc0100scn_long_r );
	438	DECLARE_WRITE32_DEVICE_HANDLER( tc0100scn_long_w );
	439	DECLARE_READ32_DEVICE_HANDLER( tc0100scn_ctrl_long_r );
	440	DECLARE_WRITE32_DEVICE_HANDLER( tc0100scn_ctrl_long_w );
441	441
442	442	void tc0100scn_tilemap_update(device_t *device);
443	443	int tc0100scn_tilemap_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int layer, int flags, UINT32 priority);
r17961	r17962
448	448
449	449
450	450	/** TC0280GRD & TC0430GRW **/
451		READ16_DEVICE_HANDLER( tc0280grd_word_r );
452		WRITE16_DEVICE_HANDLER( tc0280grd_word_w );
453		WRITE16_DEVICE_HANDLER( tc0280grd_ctrl_word_w );
	451	DECLARE_READ16_DEVICE_HANDLER( tc0280grd_word_r );
	452	DECLARE_WRITE16_DEVICE_HANDLER( tc0280grd_word_w );
	453	DECLARE_WRITE16_DEVICE_HANDLER( tc0280grd_ctrl_word_w );
454	454	void tc0280grd_tilemap_update(device_t *device, int base_color);
455	455	void tc0280grd_zoom_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int xoffset, int yoffset, UINT32 priority);
456	456
457		READ16_DEVICE_HANDLER( tc0430grw_word_r );
458		WRITE16_DEVICE_HANDLER( tc0430grw_word_w );
459		WRITE16_DEVICE_HANDLER( tc0430grw_ctrl_word_w );
	457	DECLARE_READ16_DEVICE_HANDLER( tc0430grw_word_r );
	458	DECLARE_WRITE16_DEVICE_HANDLER( tc0430grw_word_w );
	459	DECLARE_WRITE16_DEVICE_HANDLER( tc0430grw_ctrl_word_w );
460	460	void tc0430grw_tilemap_update(device_t *device, int base_color);
461	461	void tc0430grw_zoom_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int xoffset, int yoffset, UINT32 priority);
462	462
463	463
464	464	/** TC0360PRI **/
465		WRITE8_DEVICE_HANDLER( tc0360pri_w );
466		READ8_DEVICE_HANDLER( tc0360pri_r );
	465	DECLARE_WRITE8_DEVICE_HANDLER( tc0360pri_w );
	466	DECLARE_READ8_DEVICE_HANDLER( tc0360pri_r );
467	467
468	468
469	469	/** TC0480SCP **/
r17961	r17962
471	471	then tweak them once you have the 4 bg layer positions correct. Col_base
472	472	may be needed when tilemaps use a palette area from sprites. */
473	473
474		READ16_DEVICE_HANDLER( tc0480scp_word_r );
475		WRITE16_DEVICE_HANDLER( tc0480scp_word_w );
476		READ16_DEVICE_HANDLER( tc0480scp_ctrl_word_r );
477		WRITE16_DEVICE_HANDLER( tc0480scp_ctrl_word_w );
	474	DECLARE_READ16_DEVICE_HANDLER( tc0480scp_word_r );
	475	DECLARE_WRITE16_DEVICE_HANDLER( tc0480scp_word_w );
	476	DECLARE_READ16_DEVICE_HANDLER( tc0480scp_ctrl_word_r );
	477	DECLARE_WRITE16_DEVICE_HANDLER( tc0480scp_ctrl_word_w );
478	478
479	479	/* Functions for use with 68020 (Super-Z system) */
480		READ32_DEVICE_HANDLER( tc0480scp_long_r );
481		WRITE32_DEVICE_HANDLER( tc0480scp_long_w );
482		READ32_DEVICE_HANDLER( tc0480scp_ctrl_long_r );
483		WRITE32_DEVICE_HANDLER( tc0480scp_ctrl_long_w );
	480	DECLARE_READ32_DEVICE_HANDLER( tc0480scp_long_r );
	481	DECLARE_WRITE32_DEVICE_HANDLER( tc0480scp_long_w );
	482	DECLARE_READ32_DEVICE_HANDLER( tc0480scp_ctrl_long_r );
	483	DECLARE_WRITE32_DEVICE_HANDLER( tc0480scp_ctrl_long_w );
484	484
485	485	void tc0480scp_tilemap_update(device_t *device);
486	486	void tc0480scp_tilemap_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int layer, int flags, UINT32 priority);
r17961	r17962
491	491	int tc0480scp_get_bg_priority(device_t *device);
492	492
493	493	/* Undrfire needs to read this for a sprite/tile priority hack */
494		READ8_DEVICE_HANDLER( tc0480scp_pri_reg_r );
	494	DECLARE_READ8_DEVICE_HANDLER( tc0480scp_pri_reg_r );
495	495
496	496
497	497	/** TC0150ROD **/
498		READ16_DEVICE_HANDLER( tc0150rod_word_r );
499		WRITE16_DEVICE_HANDLER( tc0150rod_word_w );
	498	DECLARE_READ16_DEVICE_HANDLER( tc0150rod_word_r );
	499	DECLARE_WRITE16_DEVICE_HANDLER( tc0150rod_word_w );
500	500	void tc0150rod_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int y_offs, int palette_offs, int type, int road_trans, UINT32 low_priority, UINT32 high_priority);
501	501
502	502
503	503	/** TC0110PCR **/
504		READ16_DEVICE_HANDLER( tc0110pcr_word_r );
505		WRITE16_DEVICE_HANDLER( tc0110pcr_word_w );   /* color index goes up in step of 2 */
506		WRITE16_DEVICE_HANDLER( tc0110pcr_step1_word_w );   /* color index goes up in step of 1 */
507		WRITE16_DEVICE_HANDLER( tc0110pcr_step1_rbswap_word_w );   /* swaps red and blue components */
508		WRITE16_DEVICE_HANDLER( tc0110pcr_step1_4bpg_word_w );   /* only 4 bits per color gun */
	504	DECLARE_READ16_DEVICE_HANDLER( tc0110pcr_word_r );
	505	DECLARE_WRITE16_DEVICE_HANDLER( tc0110pcr_word_w );   /* color index goes up in step of 2 */
	506	DECLARE_WRITE16_DEVICE_HANDLER( tc0110pcr_step1_word_w );   /* color index goes up in step of 1 */
	507	DECLARE_WRITE16_DEVICE_HANDLER( tc0110pcr_step1_rbswap_word_w );   /* swaps red and blue components */
	508	DECLARE_WRITE16_DEVICE_HANDLER( tc0110pcr_step1_4bpg_word_w );   /* only 4 bits per color gun */
509	509
510	510
511	511	/** TC0180VCU **/
512		READ8_DEVICE_HANDLER( tc0180vcu_get_fb_page );
513		WRITE8_DEVICE_HANDLER( tc0180vcu_set_fb_page );
514		READ8_DEVICE_HANDLER( tc0180vcu_get_videoctrl );
515		READ16_DEVICE_HANDLER( tc0180vcu_ctrl_r );
516		WRITE16_DEVICE_HANDLER( tc0180vcu_ctrl_w );
517		READ16_DEVICE_HANDLER( tc0180vcu_scroll_r );
518		WRITE16_DEVICE_HANDLER( tc0180vcu_scroll_w );
519		READ16_DEVICE_HANDLER( tc0180vcu_word_r );
520		WRITE16_DEVICE_HANDLER( tc0180vcu_word_w );
	512	DECLARE_READ8_DEVICE_HANDLER( tc0180vcu_get_fb_page );
	513	DECLARE_WRITE8_DEVICE_HANDLER( tc0180vcu_set_fb_page );
	514	DECLARE_READ8_DEVICE_HANDLER( tc0180vcu_get_videoctrl );
	515	DECLARE_READ16_DEVICE_HANDLER( tc0180vcu_ctrl_r );
	516	DECLARE_WRITE16_DEVICE_HANDLER( tc0180vcu_ctrl_w );
	517	DECLARE_READ16_DEVICE_HANDLER( tc0180vcu_scroll_r );
	518	DECLARE_WRITE16_DEVICE_HANDLER( tc0180vcu_scroll_w );
	519	DECLARE_READ16_DEVICE_HANDLER( tc0180vcu_word_r );
	520	DECLARE_WRITE16_DEVICE_HANDLER( tc0180vcu_word_w );
521	521	void tc0180vcu_tilemap_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int tmap_num, int plane);

trunk/src/mame/video/itech8.c

r17961	r17962
188	188
189	189	WRITE8_MEMBER(itech8_state::itech8_palette_w)
190	190	{
191		tlc34076_w(machine().device("tlc34076"), offset/2, data);
	191	tlc34076_w(machine().device("tlc34076"), space, offset/2, data);
192	192	}
193	193
194	194

trunk/src/mame/video/tia.c

r17961	r17962
1804	1804	case 0x18: /* AUDF1 */
1805	1805	case 0x19: /* AUDV0 */
1806	1806	case 0x1A: /* AUDV1 */
1807		tia_sound_w(machine().device("tia"), offset, data);
	1807	tia_sound_w(machine().device("tia"), space, offset, data);
1808	1808	break;
1809	1809
1810	1810	case 0x1B:

trunk/src/mame/video/funkyjet.c

r17961	r17962
14	14	SCREEN_UPDATE_IND16( funkyjet )
15	15	{
16	16	funkyjet_state *state = screen.machine().driver_data<funkyjet_state>();
17		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	17	address_space &space = screen.machine().driver_data()->generic_space();
	18	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
18	19
19	20	state->flip_screen_set(BIT(flip, 7));
20	21	deco16ic_pf_update(state->m_deco_tilegen1, state->m_pf1_rowscroll, state->m_pf2_rowscroll);

trunk/src/mame/video/atarirle.h

r17961	r17962
97	97	void atarirle_command_w(device_t *device, UINT8 command);
98	98
99	99	/* read/write handlers */
100		READ16_DEVICE_HANDLER( atarirle_spriteram_r );
101		READ32_DEVICE_HANDLER( atarirle_spriteram32_r );
102		WRITE16_DEVICE_HANDLER( atarirle_spriteram_w );
103		WRITE32_DEVICE_HANDLER( atarirle_spriteram32_w );
	100	DECLARE_READ16_DEVICE_HANDLER( atarirle_spriteram_r );
	101	DECLARE_READ32_DEVICE_HANDLER( atarirle_spriteram32_r );
	102	DECLARE_WRITE16_DEVICE_HANDLER( atarirle_spriteram_w );
	103	DECLARE_WRITE32_DEVICE_HANDLER( atarirle_spriteram32_w );
104	104
105	105	/* render helpers */
106	106	void atarirle_eof(device_t *device);

trunk/src/mame/video/btoads.c

r17961	r17962
123	123
124	124	WRITE16_MEMBER( btoads_state::paletteram_w )
125	125	{
126		tlc34076_w(m_tlc34076, offset/2, data);
	126	tlc34076_w(m_tlc34076, space, offset/2, data);
127	127	}
128	128
129	129
130	130	READ16_MEMBER( btoads_state::paletteram_r )
131	131	{
132		return tlc34076_r(m_tlc34076, offset/2);
	132	return tlc34076_r(m_tlc34076, space, offset/2);
133	133	}
134	134
135	135

trunk/src/mame/video/dec0.c

r17961	r17962
155	155	// layer enables seem different... where are they?
156	156
157	157	// the bootleg doesn't write these registers, I think they're hardcoded?, so fake them for compatibility with our implementation..
158		deco_bac06_pf_control_0_w(state->m_tilegen1,0,0x0003, 0x00ff); // 8x8
159		deco_bac06_pf_control_0_w(state->m_tilegen1,1,0x0003, 0x00ff);
160		deco_bac06_pf_control_0_w(state->m_tilegen1,2,0x0000, 0x00ff);
161		deco_bac06_pf_control_0_w(state->m_tilegen1,3,0x0001, 0x00ff); // dimensions
	158	address_space &space = screen.machine().driver_data()->generic_space();
	159	deco_bac06_pf_control_0_w(state->m_tilegen1,space,0,0x0003, 0x00ff); // 8x8
	160	deco_bac06_pf_control_0_w(state->m_tilegen1,space,1,0x0003, 0x00ff);
	161	deco_bac06_pf_control_0_w(state->m_tilegen1,space,2,0x0000, 0x00ff);
	162	deco_bac06_pf_control_0_w(state->m_tilegen1,space,3,0x0001, 0x00ff); // dimensions
162	163
163		deco_bac06_pf_control_0_w(state->m_tilegen2,0,0x0082, 0x00ff); // 16x16
164		deco_bac06_pf_control_0_w(state->m_tilegen2,1,0x0000, 0x00ff);
165		deco_bac06_pf_control_0_w(state->m_tilegen2,2,0x0000, 0x00ff);
166		deco_bac06_pf_control_0_w(state->m_tilegen2,3,0x0001, 0x00ff); // dimensions
	164	deco_bac06_pf_control_0_w(state->m_tilegen2,space,0,0x0082, 0x00ff); // 16x16
	165	deco_bac06_pf_control_0_w(state->m_tilegen2,space,1,0x0000, 0x00ff);
	166	deco_bac06_pf_control_0_w(state->m_tilegen2,space,2,0x0000, 0x00ff);
	167	deco_bac06_pf_control_0_w(state->m_tilegen2,space,3,0x0001, 0x00ff); // dimensions
167	168
168		deco_bac06_pf_control_0_w(state->m_tilegen3,0,0x0082, 0x00ff); // 16x16
169		deco_bac06_pf_control_0_w(state->m_tilegen3,1,0x0003, 0x00ff);
170		deco_bac06_pf_control_0_w(state->m_tilegen3,2,0x0000, 0x00ff);
171		deco_bac06_pf_control_0_w(state->m_tilegen3,3,0x0001, 0x00ff); // dimensions
	169	deco_bac06_pf_control_0_w(state->m_tilegen3,space,0,0x0082, 0x00ff); // 16x16
	170	deco_bac06_pf_control_0_w(state->m_tilegen3,space,1,0x0003, 0x00ff);
	171	deco_bac06_pf_control_0_w(state->m_tilegen3,space,2,0x0000, 0x00ff);
	172	deco_bac06_pf_control_0_w(state->m_tilegen3,space,3,0x0001, 0x00ff); // dimensions
172	173
173	174	// scroll registers got written elsewhere, copy them across
174		deco_bac06_pf_control_1_w(state->m_tilegen1,0,0x0000, 0xffff); // no scroll?
175		deco_bac06_pf_control_1_w(state->m_tilegen1,1,0x0000, 0xffff); // no scroll?
	175	deco_bac06_pf_control_1_w(state->m_tilegen1,space,0,0x0000, 0xffff); // no scroll?
	176	deco_bac06_pf_control_1_w(state->m_tilegen1,space,1,0x0000, 0xffff); // no scroll?
176	177
177		deco_bac06_pf_control_1_w(state->m_tilegen2,0,state->m_automat_scroll_regs[3] - 0x010a, 0xffff);
178		deco_bac06_pf_control_1_w(state->m_tilegen2,1,state->m_automat_scroll_regs[2], 0xffff);
	178	deco_bac06_pf_control_1_w(state->m_tilegen2,space,0,state->m_automat_scroll_regs[3] - 0x010a, 0xffff);
	179	deco_bac06_pf_control_1_w(state->m_tilegen2,space,1,state->m_automat_scroll_regs[2], 0xffff);
179	180
180		deco_bac06_pf_control_1_w(state->m_tilegen3,0,state->m_automat_scroll_regs[1] - 0x0108, 0xffff);
181		deco_bac06_pf_control_1_w(state->m_tilegen3,1,state->m_automat_scroll_regs[0], 0xffff);
	181	deco_bac06_pf_control_1_w(state->m_tilegen3,space,0,state->m_automat_scroll_regs[1] - 0x0108, 0xffff);
	182	deco_bac06_pf_control_1_w(state->m_tilegen3,space,1,state->m_automat_scroll_regs[0], 0xffff);
182	183
183	184
184	185	state->flip_screen_set(state->m_tilegen1->get_flip_state());
r17961	r17962
223	224	// layer enables seem different... where are they?
224	225
225	226	// the bootleg doesn't write these registers, I think they're hardcoded?, so fake them for compatibility with our implementation..
226		deco_bac06_pf_control_0_w(state->m_tilegen1,0,0x0003, 0x00ff); // 8x8
227		deco_bac06_pf_control_0_w(state->m_tilegen1,1,0x0003, 0x00ff);
228		deco_bac06_pf_control_0_w(state->m_tilegen1,2,0x0000, 0x00ff);
229		deco_bac06_pf_control_0_w(state->m_tilegen1,3,0x0001, 0x00ff); // dimensions
	227	address_space &space = screen.machine().driver_data()->generic_space();
	228	deco_bac06_pf_control_0_w(state->m_tilegen1,space,0,0x0003, 0x00ff); // 8x8
	229	deco_bac06_pf_control_0_w(state->m_tilegen1,space,1,0x0003, 0x00ff);
	230	deco_bac06_pf_control_0_w(state->m_tilegen1,space,2,0x0000, 0x00ff);
	231	deco_bac06_pf_control_0_w(state->m_tilegen1,space,3,0x0001, 0x00ff); // dimensions
230	232
231		deco_bac06_pf_control_0_w(state->m_tilegen2,0,0x0082, 0x00ff); // 16x16
232		deco_bac06_pf_control_0_w(state->m_tilegen2,1,0x0000, 0x00ff);
233		deco_bac06_pf_control_0_w(state->m_tilegen2,2,0x0000, 0x00ff);
234		deco_bac06_pf_control_0_w(state->m_tilegen2,3,0x0001, 0x00ff); // dimensions
	233	deco_bac06_pf_control_0_w(state->m_tilegen2,space,0,0x0082, 0x00ff); // 16x16
	234	deco_bac06_pf_control_0_w(state->m_tilegen2,space,1,0x0000, 0x00ff);
	235	deco_bac06_pf_control_0_w(state->m_tilegen2,space,2,0x0000, 0x00ff);
	236	deco_bac06_pf_control_0_w(state->m_tilegen2,space,3,0x0001, 0x00ff); // dimensions
235	237
236		deco_bac06_pf_control_0_w(state->m_tilegen3,0,0x0082, 0x00ff); // 16x16
237		deco_bac06_pf_control_0_w(state->m_tilegen3,1,0x0003, 0x00ff);
238		deco_bac06_pf_control_0_w(state->m_tilegen3,2,0x0000, 0x00ff);
239		deco_bac06_pf_control_0_w(state->m_tilegen3,3,0x0001, 0x00ff); // dimensions
	238	deco_bac06_pf_control_0_w(state->m_tilegen3,space,0,0x0082, 0x00ff); // 16x16
	239	deco_bac06_pf_control_0_w(state->m_tilegen3,space,1,0x0003, 0x00ff);
	240	deco_bac06_pf_control_0_w(state->m_tilegen3,space,2,0x0000, 0x00ff);
	241	deco_bac06_pf_control_0_w(state->m_tilegen3,space,3,0x0001, 0x00ff); // dimensions
240	242
241	243	// scroll registers got written elsewhere, copy them across
242		deco_bac06_pf_control_1_w(state->m_tilegen1,0,0x0000, 0xffff); // no scroll?
243		deco_bac06_pf_control_1_w(state->m_tilegen1,1,0x0000, 0xffff); // no scroll?
	244	deco_bac06_pf_control_1_w(state->m_tilegen1,space,0,0x0000, 0xffff); // no scroll?
	245	deco_bac06_pf_control_1_w(state->m_tilegen1,space,1,0x0000, 0xffff); // no scroll?
244	246
245		deco_bac06_pf_control_1_w(state->m_tilegen2,0,state->m_automat_scroll_regs[3] - 0x010a, 0xffff);
246		deco_bac06_pf_control_1_w(state->m_tilegen2,1,state->m_automat_scroll_regs[2], 0xffff);
	247	deco_bac06_pf_control_1_w(state->m_tilegen2,space,0,state->m_automat_scroll_regs[3] - 0x010a, 0xffff);
	248	deco_bac06_pf_control_1_w(state->m_tilegen2,space,1,state->m_automat_scroll_regs[2], 0xffff);
247	249
248		deco_bac06_pf_control_1_w(state->m_tilegen3,0,state->m_automat_scroll_regs[1] - 0x0108, 0xffff);
249		deco_bac06_pf_control_1_w(state->m_tilegen3,1,state->m_automat_scroll_regs[0], 0xffff);
	250	deco_bac06_pf_control_1_w(state->m_tilegen3,space,0,state->m_automat_scroll_regs[1] - 0x0108, 0xffff);
	251	deco_bac06_pf_control_1_w(state->m_tilegen3,space,1,state->m_automat_scroll_regs[0], 0xffff);
250	252
251	253	state->flip_screen_set(state->m_tilegen1->get_flip_state());
252	254

trunk/src/mame/video/taitoair.c

r17961	r17962
75	75	is always 64 pixels. */
76	76
77	77	taitoair_state *state = machine.driver_data<taitoair_state>();
	78	address_space &space = machine.driver_data()->generic_space();
78	79	static const int size[] = { 1, 2, 4, 4 };
79	80	int x0, y0, x, y, dx, dy, ex, ey, zx, zy;
80	81	int ysize;
r17961	r17962
89	90	if (offs <  0x01b0 && priority == 0)   continue;
90	91	if (offs >= 0x01b0 && priority == 1)   continue;
91	92
92		x0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 1, 0xffff) & 0x3ff;
93		y0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 0, 0xffff) & 0x3ff;
94		zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 2, 0xffff) & 0x7f00) >> 8;
95		zoomy     = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 2, 0xffff) & 0x007f);
96		tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 3, 0xffff) & 0x1fff) << 2;
97		ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, offs, 0xffff) & 0x0c00) >> 10];
	93	x0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 1, 0xffff) & 0x3ff;
	94	y0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 0, 0xffff) & 0x3ff;
	95	zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 2, 0xffff) & 0x7f00) >> 8;
	96	zoomy     = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 2, 0xffff) & 0x007f);
	97	tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 3, 0xffff) & 0x1fff) << 2;
	98	ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, space, offs, 0xffff) & 0x0c00) >> 10];
98	99
99	100	if (tile_offs)
100	101	{
r17961	r17962
153	154	{
154	155	int tile, color, flipx, flipy;
155	156
156		tile  = tc0080vco_cram_0_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x7fff;
157		color = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x001f;
158		flipx = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0040;
159		flipy = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0080;
	157	tile  = tc0080vco_cram_0_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x7fff;
	158	color = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x001f;
	159	flipx = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0040;
	160	flipy = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0080;
160	161
161	162	if (tc0080vco_flipscreen_r(state->m_tc0080vco))
162	163	{

trunk/src/mame/video/seta001.h

r17961	r17962
57	57
58	58	};
59	59
60		WRITE8_DEVICE_HANDLER( spritebgflag_w8 );
	60	DECLARE_WRITE8_DEVICE_HANDLER( spritebgflag_w8 );
61	61
62	62
63		READ16_DEVICE_HANDLER( spritectrl_r16 );
64		WRITE16_DEVICE_HANDLER( spritectrl_w16 );
65		READ8_DEVICE_HANDLER( spritectrl_r8 );
66		WRITE8_DEVICE_HANDLER( spritectrl_w8 );
	63	DECLARE_READ16_DEVICE_HANDLER( spritectrl_r16 );
	64	DECLARE_WRITE16_DEVICE_HANDLER( spritectrl_w16 );
	65	DECLARE_READ8_DEVICE_HANDLER( spritectrl_r8 );
	66	DECLARE_WRITE8_DEVICE_HANDLER( spritectrl_w8 );
67	67
68		READ16_DEVICE_HANDLER( spriteylow_r16 );
69		WRITE16_DEVICE_HANDLER( spriteylow_w16 );
70		READ8_DEVICE_HANDLER( spriteylow_r8 );
71		WRITE8_DEVICE_HANDLER( spriteylow_w8 );
	68	DECLARE_READ16_DEVICE_HANDLER( spriteylow_r16 );
	69	DECLARE_WRITE16_DEVICE_HANDLER( spriteylow_w16 );
	70	DECLARE_READ8_DEVICE_HANDLER( spriteylow_r8 );
	71	DECLARE_WRITE8_DEVICE_HANDLER( spriteylow_w8 );
72	72
73		READ8_DEVICE_HANDLER( spritecodelow_r8 );
74		WRITE8_DEVICE_HANDLER( spritecodelow_w8 );
75		READ8_DEVICE_HANDLER( spritecodehigh_r8 );
76		WRITE8_DEVICE_HANDLER( spritecodehigh_w8 );
77		READ16_DEVICE_HANDLER( spritecode_r16 );
78		WRITE16_DEVICE_HANDLER( spritecode_w16 );
	73	DECLARE_READ8_DEVICE_HANDLER( spritecodelow_r8 );
	74	DECLARE_WRITE8_DEVICE_HANDLER( spritecodelow_w8 );
	75	DECLARE_READ8_DEVICE_HANDLER( spritecodehigh_r8 );
	76	DECLARE_WRITE8_DEVICE_HANDLER( spritecodehigh_w8 );
	77	DECLARE_READ16_DEVICE_HANDLER( spritecode_r16 );
	78	DECLARE_WRITE16_DEVICE_HANDLER( spritecode_w16 );
79	79
80	80	extern const device_type SETA001_SPRITE;
81	81

trunk/src/mame/video/skydiver.c

r17961	r17962
144	144	output_set_value("lampr", bit);
145	145	break;
146	146	case (0x0a):
147		discrete_sound_w(discrete, SKYDIVER_OCT1_EN, bit);
	147	discrete_sound_w(discrete, space, SKYDIVER_OCT1_EN, bit);
148	148	break;
149	149	case (0x0c):
150		discrete_sound_w(discrete, SKYDIVER_OCT2_EN, bit);
	150	discrete_sound_w(discrete, space, SKYDIVER_OCT2_EN, bit);
151	151	break;
152	152	case (0x0e):
153		discrete_sound_w(discrete, SKYDIVER_NOISE_RST, bit);
	153	discrete_sound_w(discrete, space, SKYDIVER_NOISE_RST, bit);
154	154	break;
155	155	}
156	156	}

trunk/src/mame/video/cbuster.c

r17961	r17962
51	51	SCREEN_UPDATE_RGB32( twocrude )
52	52	{
53	53	cbuster_state *state = screen.machine().driver_data<cbuster_state>();
54		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	54	address_space &space = screen.machine().driver_data()->generic_space();
	55	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
55	56
56	57	state->flip_screen_set(!BIT(flip, 7));
57	58

trunk/src/mame/video/rohga.c

r17961	r17962
64	64	SCREEN_UPDATE_IND16( rohga )
65	65	{
66	66	rohga_state *state = screen.machine().driver_data<rohga_state>();
67		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
68		UINT16 priority = decocomn_priority_r(state->m_decocomn, 0, 0xffff);
	67	address_space &space = screen.machine().driver_data()->generic_space();
	68	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
	69	UINT16 priority = decocomn_priority_r(state->m_decocomn, space, 0, 0xffff);
69	70
70	71	/* Update playfields */
71	72	state->flip_screen_set(BIT(flip, 7));
r17961	r17962
167	168	SCREEN_UPDATE_RGB32( wizdfire )
168	169	{
169	170	rohga_state *state = screen.machine().driver_data<rohga_state>();
170		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
171		UINT16 priority = decocomn_priority_r(state->m_decocomn, 0, 0xffff);
	171	address_space &space = screen.machine().driver_data()->generic_space();
	172	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
	173	UINT16 priority = decocomn_priority_r(state->m_decocomn, space, 0, 0xffff);
172	174
173	175	/* draw sprite gfx to temp bitmaps */
174	176	screen.machine().device<decospr_device>("spritegen2")->draw_sprites(bitmap, cliprect, state->m_spriteram2->buffer(), 0x400, true);
r17961	r17962
203	205	SCREEN_UPDATE_RGB32( nitrobal )
204	206	{
205	207	rohga_state *state = screen.machine().driver_data<rohga_state>();
206		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	208	address_space &space = screen.machine().driver_data()->generic_space();
	209	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
207	210
208	211	/* draw sprite gfx to temp bitmaps */
209	212	screen.machine().device<decospr_device>("spritegen1")->set_alt_format(true);

trunk/src/mame/video/deco16ic.c

r17961	r17962
585	585
586	586	READ32_DEVICE_HANDLER ( deco16ic_pf_control_dword_r )
587	587	{
588		return deco16ic_pf_control_r(device, offset, 0xffff)^0xffff0000;
	588	return deco16ic_pf_control_r(device, space, offset, 0xffff)^0xffff0000;
589	589	}
590	590
591	591	WRITE32_DEVICE_HANDLER( deco16ic_pf_control_dword_w )
592	592	{
593		deco16ic_pf_control_w(device, offset, data & 0xffff, mem_mask & 0xffff);
	593	deco16ic_pf_control_w(device, space, offset, data & 0xffff, mem_mask & 0xffff);
594	594	}
595	595
596	596	READ32_DEVICE_HANDLER( deco16ic_pf1_data_dword_r )
597	597	{
598		return deco16ic_pf1_data_r(device, offset, 0xffff)^0xffff0000;
	598	return deco16ic_pf1_data_r(device, space, offset, 0xffff)^0xffff0000;
599	599	}
600	600
601	601	WRITE32_DEVICE_HANDLER( deco16ic_pf1_data_dword_w )
602	602	{
603		deco16ic_pf1_data_w(device, offset, data & 0xffff, mem_mask & 0xffff);
	603	deco16ic_pf1_data_w(device, space, offset, data & 0xffff, mem_mask & 0xffff);
604	604	}
605	605
606	606	READ32_DEVICE_HANDLER( deco16ic_pf2_data_dword_r )
607	607	{
608		return deco16ic_pf2_data_r(device, offset, 0xffff)^0xffff0000;
	608	return deco16ic_pf2_data_r(device, space, offset, 0xffff)^0xffff0000;
609	609	}
610	610
611	611	WRITE32_DEVICE_HANDLER( deco16ic_pf2_data_dword_w )
612	612	{
613		deco16ic_pf2_data_w(device, offset, data & 0xffff, mem_mask & 0xffff);
	613	deco16ic_pf2_data_w(device, space, offset, data & 0xffff, mem_mask & 0xffff);
614	614	}
615	615
616	616

trunk/src/mame/video/deco16ic.h

r17961	r17962
74	74	DEVICE I/O FUNCTIONS
75	75	***************************************************************************/
76	76
77		WRITE16_DEVICE_HANDLER( deco16ic_pf1_data_w );
78		WRITE16_DEVICE_HANDLER( deco16ic_pf2_data_w );
	77	DECLARE_WRITE16_DEVICE_HANDLER( deco16ic_pf1_data_w );
	78	DECLARE_WRITE16_DEVICE_HANDLER( deco16ic_pf2_data_w );
79	79
80		READ16_DEVICE_HANDLER( deco16ic_pf1_data_r );
81		READ16_DEVICE_HANDLER( deco16ic_pf2_data_r );
	80	DECLARE_READ16_DEVICE_HANDLER( deco16ic_pf1_data_r );
	81	DECLARE_READ16_DEVICE_HANDLER( deco16ic_pf2_data_r );
82	82
83		WRITE16_DEVICE_HANDLER( deco16ic_pf_control_w );
	83	DECLARE_WRITE16_DEVICE_HANDLER( deco16ic_pf_control_w );
84	84
85		READ16_DEVICE_HANDLER( deco16ic_pf_control_r );
	85	DECLARE_READ16_DEVICE_HANDLER( deco16ic_pf_control_r );
86	86
87		WRITE32_DEVICE_HANDLER( deco16ic_pf1_data_dword_w );
88		WRITE32_DEVICE_HANDLER( deco16ic_pf2_data_dword_w );
	87	DECLARE_WRITE32_DEVICE_HANDLER( deco16ic_pf1_data_dword_w );
	88	DECLARE_WRITE32_DEVICE_HANDLER( deco16ic_pf2_data_dword_w );
89	89
90		READ32_DEVICE_HANDLER( deco16ic_pf1_data_dword_r );
91		READ32_DEVICE_HANDLER( deco16ic_pf2_data_dword_r );
	90	DECLARE_READ32_DEVICE_HANDLER( deco16ic_pf1_data_dword_r );
	91	DECLARE_READ32_DEVICE_HANDLER( deco16ic_pf2_data_dword_r );
92	92
93		WRITE32_DEVICE_HANDLER( deco16ic_pf_control_dword_w );
	93	DECLARE_WRITE32_DEVICE_HANDLER( deco16ic_pf_control_dword_w );
94	94
95		READ32_DEVICE_HANDLER( deco16ic_pf_control_dword_r );
	95	DECLARE_READ32_DEVICE_HANDLER( deco16ic_pf_control_dword_r );
96	96
97	97	void deco16ic_print_debug_info(device_t *device, bitmap_ind16 &bitmap);
98	98

trunk/src/mame/video/astrocde.c

r17961	r17962
598	598	case 0x17:   /* noise volume register */
599	599	case 0x18:   /* sound block transfer */
600	600	if (m_video_config & AC_SOUND_PRESENT)
601		astrocade_sound_w(machine().device("astrocade1"), offset, data);
	601	astrocade_sound_w(machine().device("astrocade1"), space, offset, data);
602	602	break;
603	603
604	604	case 0x19:   /* expand register */

trunk/src/mame/video/taito_h.c

r17961	r17962
76	76	is always 64 pixels. */
77	77
78	78	taitoh_state *state = machine.driver_data<taitoh_state>();
	79	address_space &space = machine.driver_data()->generic_space();
79	80	static const int size[] = { 1, 2, 4, 4 };
80	81	int x0, y0, x, y, dx, ex, zx;
81	82	int ysize;
r17961	r17962
86	87
87	88	for (offs = 0x03f8 / 2; offs >= 0; offs -= 0x008 / 2)
88	89	{
89		x0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 1, 0xffff) & 0x3ff;
90		y0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 0, 0xffff) & 0x3ff;
91		zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 2, 0xffff) & 0x7f00) >> 8;
92		tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 3, 0xffff) & 0x1fff) << 2;
93		ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, offs, 0xffff) & 0x0c00) >> 10];
	90	x0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 1, 0xffff) & 0x3ff;
	91	y0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 0, 0xffff) & 0x3ff;
	92	zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 2, 0xffff) & 0x7f00) >> 8;
	93	tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 3, 0xffff) & 0x1fff) << 2;
	94	ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, space, offs, 0xffff) & 0x0c00) >> 10];
94	95
95	96	if (tile_offs)
96	97	{
r17961	r17962
134	135	{
135	136	int tile, color, flipx, flipy;
136	137
137		tile  = tc0080vco_cram_0_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x7fff;
138		color = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x001f;
139		flipx = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0040;
140		flipy = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0080;
	138	tile  = tc0080vco_cram_0_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x7fff;
	139	color = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x001f;
	140	flipx = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0040;
	141	flipy = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0080;
141	142
142	143	if (tc0080vco_flipscreen_r(state->m_tc0080vco))
143	144	{
r17961	r17962
169	170	is always 64 pixels. */
170	171
171	172	taitoh_state *state = machine.driver_data<taitoh_state>();
	173	address_space &space = machine.driver_data()->generic_space();
172	174	static const int size[] = { 1, 2, 4, 4 };
173	175	int x0, y0, x, y, dx, dy, ex, ey, zx, zy;
174	176	int ysize;
r17961	r17962
182	184	if (offs <  0x01b0 && priority == 0)   continue;
183	185	if (offs >= 0x01b0 && priority == 1)   continue;
184	186
185		x0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 1, 0xffff) & 0x3ff;
186		y0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 0, 0xffff) & 0x3ff;
187		zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 2, 0xffff) & 0x7f00) >> 8;
188		zoomy     = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 2, 0xffff) & 0x007f);
189		tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 3, 0xffff) & 0x1fff) << 2;
190		ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, offs, 0xffff) & 0x0c00) >> 10];
	187	x0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 1, 0xffff) & 0x3ff;
	188	y0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 0, 0xffff) & 0x3ff;
	189	zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 2, 0xffff) & 0x7f00) >> 8;
	190	zoomy     = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 2, 0xffff) & 0x007f);
	191	tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 3, 0xffff) & 0x1fff) << 2;
	192	ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, space, offs, 0xffff) & 0x0c00) >> 10];
191	193
192	194	if (tile_offs)
193	195	{
r17961	r17962
246	248	{
247	249	int tile, color, flipx, flipy;
248	250
249		tile  = tc0080vco_cram_0_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x7fff;
250		color = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x001f;
251		flipx = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0040;
252		flipy = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0080;
	251	tile  = tc0080vco_cram_0_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x7fff;
	252	color = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x001f;
	253	flipx = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0040;
	254	flipy = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0080;
253	255
254	256	if (tc0080vco_flipscreen_r(state->m_tc0080vco))
255	257	{
r17961	r17962
281	283	is always 64 pixels. */
282	284
283	285	taitoh_state *state = machine.driver_data<taitoh_state>();
	286	address_space &space = machine.driver_data()->generic_space();
284	287	static const int size[] = { 1, 2, 4, 4 };
285	288	int x0, y0, x, y, dx, ex, zx;
286	289	int ysize;
r17961	r17962
292	295
293	296	for (offs = 0x03f8 / 2; offs >= 0; offs -= 0x008 / 2)
294	297	{
295		x0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 1, 0xffff) & 0x3ff;
296		y0        =  tc0080vco_sprram_r(state->m_tc0080vco, offs + 0, 0xffff) & 0x3ff;
297		zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 2, 0xffff) & 0x7f00) >> 8;
298		tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 3, 0xffff) & 0x1fff) << 2;
299		pribit    = (tc0080vco_sprram_r(state->m_tc0080vco, offs + 0, 0xffff) & 0x1000) >> 12;
300		ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, offs, 0xffff) & 0x0c00) >> 10];
	298	x0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 1, 0xffff) & 0x3ff;
	299	y0        =  tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 0, 0xffff) & 0x3ff;
	300	zoomx     = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 2, 0xffff) & 0x7f00) >> 8;
	301	tile_offs = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 3, 0xffff) & 0x1fff) << 2;
	302	pribit    = (tc0080vco_sprram_r(state->m_tc0080vco, space, offs + 0, 0xffff) & 0x1000) >> 12;
	303	ysize     = size[(tc0080vco_sprram_r(state->m_tc0080vco, space, offs, 0xffff) & 0x0c00) >> 10];
301	304
302	305	if (tile_offs)
303	306	{
r17961	r17962
317	320	zx = (dx + ex) << 12;
318	321	}
319	322
320		if (tc0080vco_scrram_r(state->m_tc0080vco, 0x0002, 0xffff) & 0x8000)
	323	if (tc0080vco_scrram_r(state->m_tc0080vco, space, 0x0002, 0xffff) & 0x8000)
321	324	pribit = 1;
322	325
323	326	if (x0 >= 0x200) x0 -= 0x400;
r17961	r17962
347	350	{
348	351	int tile, color, flipx, flipy;
349	352
350		tile  = tc0080vco_cram_0_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x7fff;
351		color = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x001f;
352		flipx = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0040;
353		flipy = tc0080vco_cram_1_r(state->m_tc0080vco, tile_offs, 0xffff) & 0x0080;
	353	tile  = tc0080vco_cram_0_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x7fff;
	354	color = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x001f;
	355	flipx = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0040;
	356	flipy = tc0080vco_cram_1_r(state->m_tc0080vco, space, tile_offs, 0xffff) & 0x0080;
354	357
355	358
356	359	if (tc0080vco_flipscreen_r(state->m_tc0080vco))

trunk/src/mame/video/slapshot.c

r17961	r17962
460	460	SCREEN_UPDATE_IND16( slapshot )
461	461	{
462	462	slapshot_state *state = screen.machine().driver_data<slapshot_state>();
	463	address_space &space = screen.machine().driver_data()->generic_space();
463	464	UINT8 layer[5];
464	465	UINT8 tilepri[5];
465	466	UINT8 spritepri[4];
r17961	r17962
509	510	layer[3] = (priority & 0x000f) >>  0;   /* tells us which is top */
510	511	layer[4] = 4;   /* text layer always over bg layers */
511	512
512		tilepri[0] = tc0360pri_r(state->m_tc0360pri, 4) & 0x0f;     /* bg0 */
513		tilepri[1] = tc0360pri_r(state->m_tc0360pri, 4) >> 4;       /* bg1 */
514		tilepri[2] = tc0360pri_r(state->m_tc0360pri, 5) & 0x0f;     /* bg2 */
515		tilepri[3] = tc0360pri_r(state->m_tc0360pri, 5) >> 4;       /* bg3 */
	513	tilepri[0] = tc0360pri_r(state->m_tc0360pri, space, 4) & 0x0f;     /* bg0 */
	514	tilepri[1] = tc0360pri_r(state->m_tc0360pri, space, 4) >> 4;       /* bg1 */
	515	tilepri[2] = tc0360pri_r(state->m_tc0360pri, space, 5) & 0x0f;     /* bg2 */
	516	tilepri[3] = tc0360pri_r(state->m_tc0360pri, space, 5) >> 4;       /* bg3 */
516	517
517	518	/* we actually assume text layer is on top of everything anyway, but FWIW... */
518		tilepri[layer[4]] = tc0360pri_r(state->m_tc0360pri, 7) & 0x0f;    /* fg (text layer) */
	519	tilepri[layer[4]] = tc0360pri_r(state->m_tc0360pri, space, 7) & 0x0f;    /* fg (text layer) */
519	520
520		spritepri[0] = tc0360pri_r(state->m_tc0360pri, 6) & 0x0f;
521		spritepri[1] = tc0360pri_r(state->m_tc0360pri, 6) >> 4;
522		spritepri[2] = tc0360pri_r(state->m_tc0360pri, 7) & 0x0f;
523		spritepri[3] = tc0360pri_r(state->m_tc0360pri, 7) >> 4;
	521	spritepri[0] = tc0360pri_r(state->m_tc0360pri, space, 6) & 0x0f;
	522	spritepri[1] = tc0360pri_r(state->m_tc0360pri, space, 6) >> 4;
	523	spritepri[2] = tc0360pri_r(state->m_tc0360pri, space, 7) & 0x0f;
	524	spritepri[3] = tc0360pri_r(state->m_tc0360pri, space, 7) >> 4;
524	525
525	526	screen.machine().priority_bitmap.fill(0, cliprect);
526	527	bitmap.fill(0, cliprect);

trunk/src/mame/video/cninja.c

r17961	r17962
127	127	SCREEN_UPDATE_IND16( cninja )
128	128	{
129	129	cninja_state *state = screen.machine().driver_data<cninja_state>();
130		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	130	address_space &space = screen.machine().driver_data()->generic_space();
	131	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
131	132
132	133	state->flip_screen_set(BIT(flip, 7));
133	134	deco16ic_pf_update(state->m_deco_tilegen1, state->m_pf1_rowscroll, state->m_pf2_rowscroll);
r17961	r17962
148	149	SCREEN_UPDATE_IND16( cninjabl )
149	150	{
150	151	cninja_state *state = screen.machine().driver_data<cninja_state>();
151		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	152	address_space &space = screen.machine().driver_data()->generic_space();
	153	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
152	154
153	155	/* force layers to be enabled */
154	156	deco16ic_set_enable(state->m_deco_tilegen2, 0, 1 );
r17961	r17962
173	175	SCREEN_UPDATE_IND16( edrandy )
174	176	{
175	177	cninja_state *state = screen.machine().driver_data<cninja_state>();
176		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	178	address_space &space = screen.machine().driver_data()->generic_space();
	179	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
177	180
178	181	state->flip_screen_set(BIT(flip, 7));
179	182	deco16ic_pf_update(state->m_deco_tilegen1, state->m_pf1_rowscroll, state->m_pf2_rowscroll);
r17961	r17962
192	195	SCREEN_UPDATE_IND16( robocop2 )
193	196	{
194	197	cninja_state *state = screen.machine().driver_data<cninja_state>();
195		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
196		UINT16 priority = decocomn_priority_r(state->m_decocomn, 0, 0xffff);
	198	address_space &space = screen.machine().driver_data()->generic_space();
	199	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
	200	UINT16 priority = decocomn_priority_r(state->m_decocomn, space, 0, 0xffff);
197	201
198	202	/* One of the tilemap chips can switch between 2 tilemaps at 4bpp, or 1 at 8bpp */
199	203	if (priority & 4)
r17961	r17962
249	253	SCREEN_UPDATE_RGB32( mutantf )
250	254	{
251	255	cninja_state *state = screen.machine().driver_data<cninja_state>();
252		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
253		UINT16 priority = decocomn_priority_r(state->m_decocomn, 0, 0xffff);
	256	address_space &space = screen.machine().driver_data()->generic_space();
	257	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
	258	UINT16 priority = decocomn_priority_r(state->m_decocomn, space, 0, 0xffff);
254	259
255	260
256	261	state->flip_screen_set(BIT(flip, 7));

trunk/src/mame/video/tumblep.c

r17961	r17962
22	22	SCREEN_UPDATE_IND16( tumblep )
23	23	{
24	24	tumblep_state *state = screen.machine().driver_data<tumblep_state>();
25		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	25	address_space &space = screen.machine().driver_data()->generic_space();
	26	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
26	27
27	28	state->flip_screen_set(BIT(flip, 7));
28	29	deco16ic_pf_update(state->m_deco_tilegen1, state->m_pf1_rowscroll, state->m_pf2_rowscroll);

trunk/src/mame/video/dietgo.c

r17961	r17962
6	6	SCREEN_UPDATE_IND16( dietgo )
7	7	{
8	8	dietgo_state *state = screen.machine().driver_data<dietgo_state>();
9		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	9	address_space &space = screen.machine().driver_data()->generic_space();
	10	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
10	11
11	12	state->flip_screen_set(BIT(flip, 7));
12	13	deco16ic_pf_update(state->m_deco_tilegen1, state->m_pf1_rowscroll, state->m_pf2_rowscroll);

trunk/src/mame/video/dassault.c

r17961	r17962
77	77	SCREEN_UPDATE_RGB32( dassault )
78	78	{
79	79	dassault_state *state = screen.machine().driver_data<dassault_state>();
80		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
81		UINT16 priority = decocomn_priority_r(state->m_decocomn, 0, 0xffff);
	80	address_space &space = screen.machine().driver_data()->generic_space();
	81	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
	82	UINT16 priority = decocomn_priority_r(state->m_decocomn, space, 0, 0xffff);
82	83
83	84	screen.machine().device<decospr_device>("spritegen2")->draw_sprites(bitmap, cliprect, state->m_spriteram2->buffer(), 0x400, false);
84	85	screen.machine().device<decospr_device>("spritegen1")->draw_sprites(bitmap, cliprect, state->m_spriteram->buffer(), 0x400, false);

trunk/src/mame/video/supbtime.c

r17961	r17962
24	24	SCREEN_UPDATE_IND16(supbtime)
25	25	{
26	26	supbtime_state *state = screen.machine().driver_data<supbtime_state>();
27		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	27	address_space &space = screen.machine().driver_data()->generic_space();
	28	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
28	29
29	30	state->flip_screen_set(BIT(flip, 7));
30	31	deco16ic_pf_update(state->m_deco_tilegen1, state->m_pf1_rowscroll, state->m_pf2_rowscroll);

trunk/src/mame/video/decocomn.h

r17961	r17962
55	55	DEVICE I/O FUNCTIONS
56	56	***************************************************************************/
57	57
58		WRITE16_DEVICE_HANDLER( decocomn_nonbuffered_palette_w );
59		WRITE16_DEVICE_HANDLER( decocomn_buffered_palette_w );
60		WRITE16_DEVICE_HANDLER( decocomn_palette_dma_w );
	58	DECLARE_WRITE16_DEVICE_HANDLER( decocomn_nonbuffered_palette_w );
	59	DECLARE_WRITE16_DEVICE_HANDLER( decocomn_buffered_palette_w );
	60	DECLARE_WRITE16_DEVICE_HANDLER( decocomn_palette_dma_w );
61	61
62		WRITE16_DEVICE_HANDLER( decocomn_priority_w );
63		READ16_DEVICE_HANDLER( decocomn_priority_r );
	62	DECLARE_WRITE16_DEVICE_HANDLER( decocomn_priority_w );
	63	DECLARE_READ16_DEVICE_HANDLER( decocomn_priority_r );
64	64
65		READ16_DEVICE_HANDLER( decocomn_71_r );
	65	DECLARE_READ16_DEVICE_HANDLER( decocomn_71_r );
66	66
67	67	#endif

trunk/src/mame/video/xmen.c

r17961	r17962
158	158	cliprect.set(0, 64 * 8 - 1, 2 * 8, 30 * 8 - 1);
159	159
160	160
	161	address_space &space = screen.machine().driver_data()->generic_space();
161	162	if (screen.machine().primary_screen->frame_number() & 0x01)
162	163	{
163	164
r17961	r17962
171	172	for (offset = 0; offset < (0xc000 / 2); offset++)
172	173	{
173	174	//          K052109_lsb_w
174		k052109_w(state->m_k052109, offset, state->m_xmen6p_tilemapright[offset] & 0x00ff);
	175	k052109_w(state->m_k052109, space, offset, state->m_xmen6p_tilemapright[offset] & 0x00ff);
175	176	}
176	177
177	178
r17961	r17962
190	191	for (offset = 0; offset < (0xc000 / 2); offset++)
191	192	{
192	193	//          K052109_lsb_w
193		k052109_w(state->m_k052109, offset, state->m_xmen6p_tilemapleft[offset] & 0x00ff);
	194	k052109_w(state->m_k052109, space, offset, state->m_xmen6p_tilemapleft[offset] & 0x00ff);
194	195	}
195	196
196	197

trunk/src/mame/video/naughtyb.c

r17961	r17962
113	113	WRITE8_MEMBER(naughtyb_state::naughtyb_videoreg_w)
114	114	{
115	115	// bits 4+5 control the sound circuit
116		pleiads_sound_control_c_w(machine().device("cust"),offset,data);
	116	pleiads_sound_control_c_w(machine().device("cust"),space,offset,data);
117	117
118	118	m_cocktail =
119	119	( ( ioport("DSW0")->read() & 0x80 ) &&   // cabinet == cocktail
r17961	r17962
125	125	WRITE8_MEMBER(naughtyb_state::popflame_videoreg_w)
126	126	{
127	127	// bits 4+5 control the sound circuit
128		pleiads_sound_control_c_w(machine().device("cust"),offset,data);
	128	pleiads_sound_control_c_w(machine().device("cust"),space,offset,data);
129	129
130	130	m_cocktail =
131	131	( ( ioport("DSW0")->read() & 0x80 ) &&   // cabinet == cocktail

trunk/src/mame/video/ultratnk.c

r17961	r17962
142	142
143	143	/* update sound status */
144	144
145		discrete_sound_w(discrete, ULTRATNK_MOTOR_DATA_1, videoram[0x391] & 15);
146		discrete_sound_w(discrete, ULTRATNK_MOTOR_DATA_2, videoram[0x393] & 15);
	145	address_space &space = screen.machine().driver_data()->generic_space();
	146	discrete_sound_w(discrete, space, ULTRATNK_MOTOR_DATA_1, videoram[0x391] & 15);
	147	discrete_sound_w(discrete, space, ULTRATNK_MOTOR_DATA_2, videoram[0x393] & 15);
147	148	}
148	149	}
149	150

trunk/src/mame/video/phoenix.c

r17961	r17962
294	294	m_pleiads_protection_question = data & 0xfc;
295	295
296	296	/* send two bits to sound control C (not sure if they are there) */
297		pleiads_sound_control_c_w(machine().device("cust"), offset, data);
	297	pleiads_sound_control_c_w(machine().device("cust"), space, offset, data);
298	298	}
299	299
300	300

trunk/src/mame/video/boogwing.c

r17961	r17962
28	28	bitmap_ind16 *sprite_bitmap1, *sprite_bitmap2;
29	29	bitmap_ind8* priority_bitmap;
30	30
31		UINT16 priority = decocomn_priority_r(state->m_decocomn, 0, 0xffff);
	31	address_space &space = machine.driver_data()->generic_space();
	32	UINT16 priority = decocomn_priority_r(state->m_decocomn, space, 0, 0xffff);
32	33
33	34	sprite_bitmap1 = &machine.device<decospr_device>("spritegen1")->get_sprite_temp_bitmap();
34	35	sprite_bitmap2 = &machine.device<decospr_device>("spritegen2")->get_sprite_temp_bitmap();
r17961	r17962
180	181	SCREEN_UPDATE_RGB32( boogwing )
181	182	{
182	183	boogwing_state *state = screen.machine().driver_data<boogwing_state>();
183		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
184		UINT16 priority = decocomn_priority_r(state->m_decocomn, 0, 0xffff);
	184	address_space &space = screen.machine().driver_data()->generic_space();
	185	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
	186	UINT16 priority = decocomn_priority_r(state->m_decocomn, space, 0, 0xffff);
185	187
186	188	/* Draw sprite planes to bitmaps for later mixing */
187	189	screen.machine().device<decospr_device>("spritegen2")->draw_sprites(bitmap, cliprect, state->m_spriteram2->buffer(), 0x400, true);

trunk/src/mame/video/kan_pand.h

r17961	r17962
62	62	void pandora_set_clear_bitmap(device_t *device, int clear);
63	63	void pandora_set_bg_pen( device_t *device, int pen );
64	64
65		WRITE8_DEVICE_HANDLER ( pandora_spriteram_w );
66		READ8_DEVICE_HANDLER( pandora_spriteram_r );
	65	DECLARE_WRITE8_DEVICE_HANDLER ( pandora_spriteram_w );
	66	DECLARE_READ8_DEVICE_HANDLER( pandora_spriteram_r );
67	67
68		WRITE16_DEVICE_HANDLER( pandora_spriteram_LSB_w );
69		READ16_DEVICE_HANDLER( pandora_spriteram_LSB_r );
	68	DECLARE_WRITE16_DEVICE_HANDLER( pandora_spriteram_LSB_w );
	69	DECLARE_READ16_DEVICE_HANDLER( pandora_spriteram_LSB_r );
70	70
71	71	#endif /* __KAN_PAND_H__ */
72	72

trunk/src/mame/video/gradius3.c

r17961	r17962
126	126	gradius3_state *state = screen.machine().driver_data<gradius3_state>();
127	127
128	128	/* TODO: this kludge enforces the char banks. For some reason, they don't work otherwise. */
129		k052109_w(state->m_k052109, 0x1d80, 0x10);
130		k052109_w(state->m_k052109, 0x1f00, 0x32);
	129	address_space &space = screen.machine().driver_data()->generic_space();
	130	k052109_w(state->m_k052109, space, 0x1d80, 0x10);
	131	k052109_w(state->m_k052109, space, 0x1f00, 0x32);
131	132
132	133	k052109_tilemap_update(state->m_k052109);
133	134

trunk/src/mame/video/konicdev.c

r17961	r17962
2455	2455
2456	2456	READ16_DEVICE_HANDLER( k052109_word_r )
2457	2457	{
2458		return k052109_r(device, offset + 0x2000) | (k052109_r(device, offset) << 8);
	2458	return k052109_r(device, space, offset + 0x2000) | (k052109_r(device, space, offset) << 8);
2459	2459	}
2460	2460
2461	2461	WRITE16_DEVICE_HANDLER( k052109_word_w )
2462	2462	{
2463	2463	if (ACCESSING_BITS_8_15)
2464		k052109_w(device, offset, (data >> 8) & 0xff);
	2464	k052109_w(device, space, offset, (data >> 8) & 0xff);
2465	2465	if (ACCESSING_BITS_0_7)
2466		k052109_w(device, offset + 0x2000, data & 0xff);
	2466	k052109_w(device, space, offset + 0x2000, data & 0xff);
2467	2467	}
2468	2468
2469	2469	READ16_DEVICE_HANDLER( k052109_lsb_r )
2470	2470	{
2471		return k052109_r(device, offset);
	2471	return k052109_r(device, space, offset);
2472	2472	}
2473	2473
2474	2474	WRITE16_DEVICE_HANDLER( k052109_lsb_w )
2475	2475	{
2476	2476	if(ACCESSING_BITS_0_7)
2477		k052109_w(device, offset, data & 0xff);
	2477	k052109_w(device, space, offset, data & 0xff);
2478	2478	}
2479	2479
2480	2480	void k052109_set_rmrd_line( device_t *device, int state )
r17961	r17962
2978	2978
2979	2979	READ16_DEVICE_HANDLER( k051960_word_r )
2980	2980	{
2981		return k051960_r(device, offset * 2 + 1) | (k051960_r(device, offset * 2) << 8);
	2981	return k051960_r(device, space, offset * 2 + 1) | (k051960_r(device, space, offset * 2) << 8);
2982	2982	}
2983	2983
2984	2984	WRITE16_DEVICE_HANDLER( k051960_word_w )
2985	2985	{
2986	2986	if (ACCESSING_BITS_8_15)
2987		k051960_w(device, offset * 2, (data >> 8) & 0xff);
	2987	k051960_w(device, space, offset * 2, (data >> 8) & 0xff);
2988	2988	if (ACCESSING_BITS_0_7)
2989		k051960_w(device, offset * 2 + 1, data & 0xff);
	2989	k051960_w(device, space, offset * 2 + 1, data & 0xff);
2990	2990	}
2991	2991
2992	2992
r17961	r17962
3075	3075
3076	3076	READ16_DEVICE_HANDLER( k051937_word_r )
3077	3077	{
3078		return k051937_r(device, offset * 2 + 1) | (k051937_r(device, offset * 2) << 8);
	3078	return k051937_r(device, space, offset * 2 + 1) | (k051937_r(device, space, offset * 2) << 8);
3079	3079	}
3080	3080
3081	3081	WRITE16_DEVICE_HANDLER( k051937_word_w )
3082	3082	{
3083	3083	if (ACCESSING_BITS_8_15)
3084		k051937_w(device, offset * 2,(data >> 8) & 0xff);
	3084	k051937_w(device, space, offset * 2,(data >> 8) & 0xff);
3085	3085	if (ACCESSING_BITS_0_7)
3086		k051937_w(device, offset * 2 + 1,data & 0xff);
	3086	k051937_w(device, space, offset * 2 + 1,data & 0xff);
3087	3087	}
3088	3088
3089	3089	/*
r17961	r17962
3624	3624
3625	3625	READ16_DEVICE_HANDLER( k053244_lsb_r )
3626	3626	{
3627		return k053244_r(device, offset);
	3627	return k053244_r(device, space, offset);
3628	3628	}
3629	3629
3630	3630	WRITE16_DEVICE_HANDLER( k053244_lsb_w )
3631	3631	{
3632	3632	if (ACCESSING_BITS_0_7)
3633		k053244_w(device, offset, data & 0xff);
	3633	k053244_w(device, space, offset, data & 0xff);
3634	3634	}
3635	3635
3636	3636	READ16_DEVICE_HANDLER( k053244_word_r )
3637	3637	{
3638		return (k053244_r(device, offset * 2) << 8) | k053244_r(device, offset * 2 + 1);
	3638	return (k053244_r(device, space, offset * 2) << 8) | k053244_r(device, space, offset * 2 + 1);
3639	3639	}
3640	3640
3641	3641	WRITE16_DEVICE_HANDLER( k053244_word_w )
3642	3642	{
3643	3643	if (ACCESSING_BITS_8_15)
3644		k053244_w(device, offset * 2, (data >> 8) & 0xff);
	3644	k053244_w(device, space, offset * 2, (data >> 8) & 0xff);
3645	3645	if (ACCESSING_BITS_0_7)
3646		k053244_w(device, offset * 2 + 1, data & 0xff);
	3646	k053244_w(device, space, offset * 2 + 1, data & 0xff);
3647	3647	}
3648	3648
3649	3649	void k053244_bankselect( device_t *device, int bank )
r17961	r17962
4574	4574	READ16_DEVICE_HANDLER( k053246_word_r )
4575	4575	{
4576	4576	offset <<= 1;
4577		return k053246_r(device, offset + 1) | (k053246_r(device, offset) << 8);
	4577	return k053246_r(device, space, offset + 1) | (k053246_r(device, space, offset) << 8);
4578	4578	}
4579	4579
4580	4580	WRITE16_DEVICE_HANDLER( k053246_word_w )
4581	4581	{
4582	4582	if (ACCESSING_BITS_8_15)
4583		k053246_w(device, offset << 1,(data >> 8) & 0xff);
	4583	k053246_w(device, space, offset << 1,(data >> 8) & 0xff);
4584	4584	if (ACCESSING_BITS_0_7)
4585		k053246_w(device, (offset << 1) + 1,data & 0xff);
	4585	k053246_w(device, space, (offset << 1) + 1,data & 0xff);
4586	4586	}
4587	4587
4588	4588	READ32_DEVICE_HANDLER( k053246_long_r )
4589	4589	{
4590	4590	offset <<= 1;
4591		return (k053246_word_r(device, offset + 1, 0xffff) | k053246_word_r(device, offset, 0xffff) << 16);
	4591	return (k053246_word_r(device, space, offset + 1, 0xffff) | k053246_word_r(device, space, offset, 0xffff) << 16);
4592	4592	}
4593	4593
4594	4594	WRITE32_DEVICE_HANDLER( k053246_long_w )
4595	4595	{
4596	4596	offset <<= 1;
4597		k053246_word_w(device, offset, data >> 16, mem_mask >> 16);
4598		k053246_word_w(device, offset + 1, data, mem_mask);
	4597	k053246_word_w(device, space, offset, data >> 16, mem_mask >> 16);
	4598	k053246_word_w(device, space, offset + 1, data, mem_mask);
4599	4599	}
4600	4600
4601	4601	void k053246_set_objcha_line( device_t *device, int state )
r17961	r17962
6026	6026	WRITE16_DEVICE_HANDLER( k053251_lsb_w )
6027	6027	{
6028	6028	if (ACCESSING_BITS_0_7)
6029		k053251_w(device, offset, data & 0xff);
	6029	k053251_w(device, space, offset, data & 0xff);
6030	6030	}
6031	6031
6032	6032	WRITE16_DEVICE_HANDLER( k053251_msb_w )
6033	6033	{
6034	6034	if (ACCESSING_BITS_8_15)
6035		k053251_w(device, offset, (data >> 8) & 0xff);
	6035	k053251_w(device, space, offset, (data >> 8) & 0xff);
6036	6036	}
6037	6037
6038	6038	int k053251_get_priority( device_t *device, int ci )
r17961	r17962
6216	6216
6217	6217	READ16_DEVICE_HANDLER( k054000_lsb_r )
6218	6218	{
6219		return k054000_r(device, offset);
	6219	return k054000_r(device, space, offset);
6220	6220	}
6221	6221
6222	6222	WRITE16_DEVICE_HANDLER( k054000_lsb_w )
6223	6223	{
6224	6224	if (ACCESSING_BITS_0_7)
6225		k054000_w(device, offset, data & 0xff);
	6225	k054000_w(device, space, offset, data & 0xff);
6226	6226	}
6227	6227
6228	6228	/*****************************************************************************
r17961	r17962
6995	6995	READ32_DEVICE_HANDLER( k056832_rom_long_r )
6996	6996	{
6997	6997	offset <<= 1;
6998		return (k056832_rom_word_r(device, offset + 1, 0xffff) | (k056832_rom_word_r(device, offset, 0xffff) << 16));
	6998	return (k056832_rom_word_r(device, space, offset + 1, 0xffff) | (k056832_rom_word_r(device, space, offset, 0xffff) << 16));
6999	6999	}
7000	7000
7001	7001	/* only one page is mapped to videoram at a time through a window */
r17961	r17962
7352	7352	// if (ACCESSING_xxx) trick.  in particular, 8-bit writes
7353	7353	// are used to the tilemap bank register.
7354	7354	offset <<= 1;
7355		k056832_word_w(device, offset, data >> 16, mem_mask >> 16);
7356		k056832_word_w(device, offset + 1, data, mem_mask);
	7355	k056832_word_w(device, space, offset, data >> 16, mem_mask >> 16);
	7356	k056832_word_w(device, space, offset + 1, data, mem_mask);
7357	7357	}
7358	7358
7359	7359	WRITE16_DEVICE_HANDLER( k056832_b_word_w )
r17961	r17962
7366	7366	{
7367	7367	if (offset & 1)
7368	7368	{
7369		k056832_word_w(device, (offset >> 1), data, 0x00ff);
	7369	k056832_word_w(device, space, (offset >> 1), data, 0x00ff);
7370	7370	}
7371	7371	else
7372	7372	{
7373		k056832_word_w(device, (offset >> 1), data << 8, 0xff00);
	7373	k056832_word_w(device, space, (offset >> 1), data << 8, 0xff00);
7374	7374	}
7375	7375	}
7376	7376
r17961	r17962
7378	7378	{
7379	7379	if (offset & 1)
7380	7380	{
7381		k056832_b_word_w(device, (offset >> 1), data, 0x00ff);
	7381	k056832_b_word_w(device, space, (offset >> 1), data, 0x00ff);
7382	7382	}
7383	7383	else
7384	7384	{
7385		k056832_b_word_w(device, (offset >> 1), data<<8, 0xff00);
	7385	k056832_b_word_w(device, space, (offset >> 1), data<<8, 0xff00);
7386	7386	}
7387	7387	}
7388	7388
r17961	r17962
7390	7390	{
7391	7391	if (ACCESSING_BITS_16_31)
7392	7392	{
7393		k056832_b_word_w(device, offset << 1, data >> 16, mem_mask >> 16);
	7393	k056832_b_word_w(device, space, offset << 1, data >> 16, mem_mask >> 16);
7394	7394	}
7395	7395	if (ACCESSING_BITS_0_15)
7396	7396	{
7397		k056832_b_word_w(device, (offset << 1) + 1, data, mem_mask);
	7397	k056832_b_word_w(device, space, (offset << 1) + 1, data, mem_mask);
7398	7398	}
7399	7399	}
7400	7400
r17961	r17962
8661	8661	WRITE32_DEVICE_HANDLER( k054338_long_w )
8662	8662	{
8663	8663	offset <<= 1;
8664		k054338_word_w(device, offset, data >> 16, mem_mask >> 16);
8665		k054338_word_w(device, offset + 1, data, mem_mask);
	8664	k054338_word_w(device, space, offset, data >> 16, mem_mask >> 16);
	8665	k054338_word_w(device, space, offset + 1, data, mem_mask);
8666	8666	}
8667	8667
8668	8668	// returns a 16-bit '338 register
r17961	r17962
10897	10897	READ32_DEVICE_HANDLER( k056832_long_r )
10898	10898	{
10899	10899	offset <<= 1;
10900		return (k056832_word_r(device, offset + 1, 0xffff) | k056832_word_r(device, offset, 0xffff) << 16);
	10900	return (k056832_word_r(device, space, offset + 1, 0xffff) | k056832_word_r(device, space, offset, 0xffff) << 16);
10901	10901	}
10902	10902
10903	10903	READ32_DEVICE_HANDLER( k053247_reg_long_r )
10904	10904	{
10905	10905	offset <<= 1;
10906		return (k053247_reg_word_r(device, offset + 1, 0xffff) | k053247_reg_word_r(device, offset, 0xffff) << 16);
	10906	return (k053247_reg_word_r(device, space, offset + 1, 0xffff) | k053247_reg_word_r(device, space, offset, 0xffff) << 16);
10907	10907	}
10908	10908
10909	10909	READ32_DEVICE_HANDLER( k055555_long_r )
10910	10910	{
10911	10911	offset <<= 1;
10912		return (k055555_word_r(device, offset + 1, 0xffff) | k055555_word_r(device, offset, 0xffff) << 16);
	10912	return (k055555_word_r(device, space, offset + 1, 0xffff) | k055555_word_r(device, space, offset, 0xffff) << 16);
10913	10913	}
10914	10914
10915	10915	READ16_DEVICE_HANDLER( k053244_reg_word_r )

trunk/src/mame/video/konicdev.h

r17961	r17962
713	713	***************************************************************************/
714	714
715	715	/**  Konami 007121  **/
716		READ8_DEVICE_HANDLER( k007121_ctrlram_r );
717		WRITE8_DEVICE_HANDLER( k007121_ctrl_w );
	716	DECLARE_READ8_DEVICE_HANDLER( k007121_ctrlram_r );
	717	DECLARE_WRITE8_DEVICE_HANDLER( k007121_ctrl_w );
718	718
719	719	/* shall we move source in the interface? */
720	720	/* also notice that now we directly pass *gfx[chip] instead of **gfx !! */
r17961	r17962
723	723
724	724
725	725	/**  Konami 007342  **/
726		READ8_DEVICE_HANDLER( k007342_r );
727		WRITE8_DEVICE_HANDLER( k007342_w );
728		READ8_DEVICE_HANDLER( k007342_scroll_r );
729		WRITE8_DEVICE_HANDLER( k007342_scroll_w );
730		WRITE8_DEVICE_HANDLER( k007342_vreg_w );
	726	DECLARE_READ8_DEVICE_HANDLER( k007342_r );
	727	DECLARE_WRITE8_DEVICE_HANDLER( k007342_w );
	728	DECLARE_READ8_DEVICE_HANDLER( k007342_scroll_r );
	729	DECLARE_WRITE8_DEVICE_HANDLER( k007342_scroll_w );
	730	DECLARE_WRITE8_DEVICE_HANDLER( k007342_vreg_w );
731	731
732	732	void k007342_tilemap_update(device_t *device);
733	733	void k007342_tilemap_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int num, int flags, UINT32 priority);
r17961	r17962
737	737	/**  Konami 007420  **/
738	738	#define K007420_SPRITERAM_SIZE 0x200
739	739
740		READ8_DEVICE_HANDLER( k007420_r );
741		WRITE8_DEVICE_HANDLER( k007420_w );
	740	DECLARE_READ8_DEVICE_HANDLER( k007420_r );
	741	DECLARE_WRITE8_DEVICE_HANDLER( k007420_w );
742	742	void k007420_sprites_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, gfx_element *gfx);
743	743
744	744
r17961	r17962
772	772	chip so it must not be set by the callback.
773	773	*/
774	774
775		READ8_DEVICE_HANDLER( k052109_r );
776		WRITE8_DEVICE_HANDLER( k052109_w );
777		READ16_DEVICE_HANDLER( k052109_word_r );
778		WRITE16_DEVICE_HANDLER( k052109_word_w );
779		READ16_DEVICE_HANDLER( k052109_lsb_r );
780		WRITE16_DEVICE_HANDLER( k052109_lsb_w );
	775	DECLARE_READ8_DEVICE_HANDLER( k052109_r );
	776	DECLARE_WRITE8_DEVICE_HANDLER( k052109_w );
	777	DECLARE_READ16_DEVICE_HANDLER( k052109_word_r );
	778	DECLARE_WRITE16_DEVICE_HANDLER( k052109_word_w );
	779	DECLARE_READ16_DEVICE_HANDLER( k052109_lsb_r );
	780	DECLARE_WRITE16_DEVICE_HANDLER( k052109_lsb_w );
781	781
782	782	void k052109_set_rmrd_line(device_t *device, int state);
783	783	int k052109_get_rmrd_line(device_t *device);
r17961	r17962
803	803	the game has special treatment (Aliens)
804	804	*/
805	805
806		READ8_DEVICE_HANDLER( k051960_r );
807		WRITE8_DEVICE_HANDLER( k051960_w );
808		READ16_DEVICE_HANDLER( k051960_word_r );
809		WRITE16_DEVICE_HANDLER( k051960_word_w );
	806	DECLARE_READ8_DEVICE_HANDLER( k051960_r );
	807	DECLARE_WRITE8_DEVICE_HANDLER( k051960_w );
	808	DECLARE_READ16_DEVICE_HANDLER( k051960_word_r );
	809	DECLARE_WRITE16_DEVICE_HANDLER( k051960_word_w );
810	810
811		READ8_DEVICE_HANDLER( k051937_r );
812		WRITE8_DEVICE_HANDLER( k051937_w );
813		READ16_DEVICE_HANDLER( k051937_word_r );
814		WRITE16_DEVICE_HANDLER( k051937_word_w );
	811	DECLARE_READ8_DEVICE_HANDLER( k051937_r );
	812	DECLARE_WRITE8_DEVICE_HANDLER( k051937_w );
	813	DECLARE_READ16_DEVICE_HANDLER( k051937_word_r );
	814	DECLARE_WRITE16_DEVICE_HANDLER( k051937_word_w );
815	815
816	816	void k051960_sprites_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int min_priority, int max_priority);
817	817	int k051960_is_irq_enabled(device_t *device);
r17961	r17962
826	826
827	827
828	828	/**  Konami 053244 / 053245  **/
829		READ16_DEVICE_HANDLER( k053245_word_r );
830		WRITE16_DEVICE_HANDLER( k053245_word_w );
831		READ8_DEVICE_HANDLER( k053245_r );
832		WRITE8_DEVICE_HANDLER( k053245_w );
833		READ8_DEVICE_HANDLER( k053244_r );
834		WRITE8_DEVICE_HANDLER( k053244_w );
835		READ16_DEVICE_HANDLER( k053244_lsb_r );
836		WRITE16_DEVICE_HANDLER( k053244_lsb_w );
837		READ16_DEVICE_HANDLER( k053244_word_r );
838		WRITE16_DEVICE_HANDLER( k053244_word_w );
	829	DECLARE_READ16_DEVICE_HANDLER( k053245_word_r );
	830	DECLARE_WRITE16_DEVICE_HANDLER( k053245_word_w );
	831	DECLARE_READ8_DEVICE_HANDLER( k053245_r );
	832	DECLARE_WRITE8_DEVICE_HANDLER( k053245_w );
	833	DECLARE_READ8_DEVICE_HANDLER( k053244_r );
	834	DECLARE_WRITE8_DEVICE_HANDLER( k053244_w );
	835	DECLARE_READ16_DEVICE_HANDLER( k053244_lsb_r );
	836	DECLARE_WRITE16_DEVICE_HANDLER( k053244_lsb_w );
	837	DECLARE_READ16_DEVICE_HANDLER( k053244_word_r );
	838	DECLARE_WRITE16_DEVICE_HANDLER( k053244_word_w );
839	839	void k053244_bankselect(device_t *device, int bank);   /* used by TMNT2, Asterix and Premier Soccer for ROM testing */
840	840	void k053245_sprites_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect);
841	841	void k053245_sprites_draw_lethal(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect); /* for lethal enforcers */
r17961	r17962
850	850	#define K055673_LAYOUT_LE2 2
851	851	#define K055673_LAYOUT_GX6 3
852	852
853		READ16_DEVICE_HANDLER( k055673_rom_word_r );
854		READ16_DEVICE_HANDLER( k055673_GX6bpp_rom_word_r );
	853	DECLARE_READ16_DEVICE_HANDLER( k055673_rom_word_r );
	854	DECLARE_READ16_DEVICE_HANDLER( k055673_GX6bpp_rom_word_r );
855	855
856	856	/*
857	857	Callback procedures for non-standard shadows:
r17961	r17962
863	863	#define K053247_CUSTOMSHADOW   0x20000000
864	864	#define K053247_SHDSHIFT      20
865	865
866		READ8_DEVICE_HANDLER( k053247_r );
867		WRITE8_DEVICE_HANDLER( k053247_w );
868		READ16_DEVICE_HANDLER( k053247_word_r );
869		WRITE16_DEVICE_HANDLER( k053247_word_w );
870		READ32_DEVICE_HANDLER( k053247_long_r );
871		WRITE32_DEVICE_HANDLER( k053247_long_w );
872		WRITE16_DEVICE_HANDLER( k053247_reg_word_w ); // "OBJSET2" registers
873		WRITE32_DEVICE_HANDLER( k053247_reg_long_w );
	866	DECLARE_READ8_DEVICE_HANDLER( k053247_r );
	867	DECLARE_WRITE8_DEVICE_HANDLER( k053247_w );
	868	DECLARE_READ16_DEVICE_HANDLER( k053247_word_r );
	869	DECLARE_WRITE16_DEVICE_HANDLER( k053247_word_w );
	870	DECLARE_READ32_DEVICE_HANDLER( k053247_long_r );
	871	DECLARE_WRITE32_DEVICE_HANDLER( k053247_long_w );
	872	DECLARE_WRITE16_DEVICE_HANDLER( k053247_reg_word_w ); // "OBJSET2" registers
	873	DECLARE_WRITE32_DEVICE_HANDLER( k053247_reg_long_w );
874	874
875	875	void k053247_sprites_draw(device_t *device, bitmap_ind16 &bitmap,const rectangle &cliprect);
876	876	void k053247_sprites_draw(device_t *device, bitmap_rgb32 &bitmap,const rectangle &cliprect);
r17961	r17962
883	883	int k053247_get_dx(device_t *device);
884	884	int k053247_get_dy(device_t *device);
885	885
886		READ8_DEVICE_HANDLER( k053246_r );
887		WRITE8_DEVICE_HANDLER( k053246_w );
888		READ16_DEVICE_HANDLER( k053246_word_r );
889		WRITE16_DEVICE_HANDLER( k053246_word_w );
890		READ32_DEVICE_HANDLER( k053246_long_r );
891		WRITE32_DEVICE_HANDLER( k053246_long_w );
	886	DECLARE_READ8_DEVICE_HANDLER( k053246_r );
	887	DECLARE_WRITE8_DEVICE_HANDLER( k053246_w );
	888	DECLARE_READ16_DEVICE_HANDLER( k053246_word_r );
	889	DECLARE_WRITE16_DEVICE_HANDLER( k053246_word_w );
	890	DECLARE_READ32_DEVICE_HANDLER( k053246_long_r );
	891	DECLARE_WRITE32_DEVICE_HANDLER( k053246_long_w );
892	892
893	893	void k053246_set_objcha_line(device_t *device, int state);
894	894	int k053246_is_irq_enabled(device_t *device);
r17961	r17962
907	907	structure (e.g. TILE_FLIPX)
908	908	*/
909	909
910		READ8_DEVICE_HANDLER( k051316_r );
911		WRITE8_DEVICE_HANDLER( k051316_w );
912		READ8_DEVICE_HANDLER( k051316_rom_r );
913		WRITE8_DEVICE_HANDLER( k051316_ctrl_w );
	910	DECLARE_READ8_DEVICE_HANDLER( k051316_r );
	911	DECLARE_WRITE8_DEVICE_HANDLER( k051316_w );
	912	DECLARE_READ8_DEVICE_HANDLER( k051316_rom_r );
	913	DECLARE_WRITE8_DEVICE_HANDLER( k051316_ctrl_w );
914	914	void k051316_zoom_draw(device_t *device, bitmap_ind16 &bitmap,const rectangle &cliprect,int flags,UINT32 priority);
915	915	void k051316_wraparound_enable(device_t *device, int status);
916	916
917	917
918	918	/**  Konami 053936  **/
919		WRITE16_DEVICE_HANDLER( k053936_ctrl_w );
920		READ16_DEVICE_HANDLER( k053936_ctrl_r );   // FIXME: this is probably unused... to be checked!
921		WRITE16_DEVICE_HANDLER( k053936_linectrl_w );
922		READ16_DEVICE_HANDLER( k053936_linectrl_r );
	919	DECLARE_WRITE16_DEVICE_HANDLER( k053936_ctrl_w );
	920	DECLARE_READ16_DEVICE_HANDLER( k053936_ctrl_r );   // FIXME: this is probably unused... to be checked!
	921	DECLARE_WRITE16_DEVICE_HANDLER( k053936_linectrl_w );
	922	DECLARE_READ16_DEVICE_HANDLER( k053936_linectrl_r );
923	923	void k053936_zoom_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, tilemap_t *tmap, int flags, UINT32 priority, int glfgreat_hack);
924	924	void k053936_wraparound_enable(device_t *device, int status);   // shall we merge this into the configuration intf?
925	925	void k053936_set_offset(device_t *device, int xoffs, int yoffs);   // shall we merge this into the configuration intf?
r17961	r17962
931	931	when some palette index changes. If ALL_TILEMAPS is too expensive, use
932	932	k053251_set_tilemaps() to indicate which tilemap is associated with each index.
933	933	*/
934		WRITE8_DEVICE_HANDLER( k053251_w );
935		WRITE16_DEVICE_HANDLER( k053251_lsb_w );
936		WRITE16_DEVICE_HANDLER( k053251_msb_w );
	934	DECLARE_WRITE8_DEVICE_HANDLER( k053251_w );
	935	DECLARE_WRITE16_DEVICE_HANDLER( k053251_lsb_w );
	936	DECLARE_WRITE16_DEVICE_HANDLER( k053251_msb_w );
937	937	int k053251_get_priority(device_t *device, int ci);
938	938	int k053251_get_palette_index(device_t *device, int ci);
939	939	int k053251_get_tmap_dirty(device_t *device, int tmap_num);
r17961	r17962
949	949	};
950	950
951	951	/**  Konami 054000 **/
952		WRITE8_DEVICE_HANDLER( k054000_w );
953		READ8_DEVICE_HANDLER( k054000_r );
954		WRITE16_DEVICE_HANDLER( k054000_lsb_w );
955		READ16_DEVICE_HANDLER( k054000_lsb_r );
	952	DECLARE_WRITE8_DEVICE_HANDLER( k054000_w );
	953	DECLARE_READ8_DEVICE_HANDLER( k054000_r );
	954	DECLARE_WRITE16_DEVICE_HANDLER( k054000_lsb_w );
	955	DECLARE_READ16_DEVICE_HANDLER( k054000_lsb_r );
956	956
957	957
958	958	/**  Konami 051733 **/
959		WRITE8_DEVICE_HANDLER( k051733_w );
960		READ8_DEVICE_HANDLER( k051733_r );
	959	DECLARE_WRITE8_DEVICE_HANDLER( k051733_w );
	960	DECLARE_READ8_DEVICE_HANDLER( k051733_r );
961	961
962	962
963	963	/**  Konami 056832 **/
964	964	void k056832_SetExtLinescroll(device_t *device);   /* Lethal Enforcers */
965	965
966		READ16_DEVICE_HANDLER( k056832_ram_word_r );
967		WRITE16_DEVICE_HANDLER( k056832_ram_word_w );
968		READ16_DEVICE_HANDLER( k056832_ram_half_word_r );
969		WRITE16_DEVICE_HANDLER( k056832_ram_half_word_w );
970		READ16_DEVICE_HANDLER( k056832_5bpp_rom_word_r );
971		READ32_DEVICE_HANDLER( k056832_5bpp_rom_long_r );
972		READ32_DEVICE_HANDLER( k056832_6bpp_rom_long_r );
973		READ16_DEVICE_HANDLER( k056832_rom_word_r );
974		READ16_DEVICE_HANDLER( k056832_mw_rom_word_r );
975		READ16_DEVICE_HANDLER( k056832_bishi_rom_word_r );
976		READ16_DEVICE_HANDLER( k056832_old_rom_word_r );
977		READ16_DEVICE_HANDLER( k056832_rom_word_8000_r );
978		WRITE16_DEVICE_HANDLER( k056832_word_w ); // "VRAM" registers
979		WRITE16_DEVICE_HANDLER( k056832_b_word_w );
980		READ8_DEVICE_HANDLER( k056832_ram_code_lo_r );
981		READ8_DEVICE_HANDLER( k056832_ram_code_hi_r );
982		READ8_DEVICE_HANDLER( k056832_ram_attr_lo_r );
983		READ8_DEVICE_HANDLER( k056832_ram_attr_hi_r );
984		WRITE8_DEVICE_HANDLER( k056832_ram_code_lo_w );
985		WRITE8_DEVICE_HANDLER( k056832_ram_code_hi_w );
986		WRITE8_DEVICE_HANDLER( k056832_ram_attr_lo_w );
987		WRITE8_DEVICE_HANDLER( k056832_ram_attr_hi_w );
988		WRITE8_DEVICE_HANDLER( k056832_w );
989		WRITE8_DEVICE_HANDLER( k056832_b_w );
	966	DECLARE_READ16_DEVICE_HANDLER( k056832_ram_word_r );
	967	DECLARE_WRITE16_DEVICE_HANDLER( k056832_ram_word_w );
	968	DECLARE_READ16_DEVICE_HANDLER( k056832_ram_half_word_r );
	969	DECLARE_WRITE16_DEVICE_HANDLER( k056832_ram_half_word_w );
	970	DECLARE_READ16_DEVICE_HANDLER( k056832_5bpp_rom_word_r );
	971	DECLARE_READ32_DEVICE_HANDLER( k056832_5bpp_rom_long_r );
	972	DECLARE_READ32_DEVICE_HANDLER( k056832_6bpp_rom_long_r );
	973	DECLARE_READ16_DEVICE_HANDLER( k056832_rom_word_r );
	974	DECLARE_READ16_DEVICE_HANDLER( k056832_mw_rom_word_r );
	975	DECLARE_READ16_DEVICE_HANDLER( k056832_bishi_rom_word_r );
	976	DECLARE_READ16_DEVICE_HANDLER( k056832_old_rom_word_r );
	977	DECLARE_READ16_DEVICE_HANDLER( k056832_rom_word_8000_r );
	978	DECLARE_WRITE16_DEVICE_HANDLER( k056832_word_w ); // "VRAM" registers
	979	DECLARE_WRITE16_DEVICE_HANDLER( k056832_b_word_w );
	980	DECLARE_READ8_DEVICE_HANDLER( k056832_ram_code_lo_r );
	981	DECLARE_READ8_DEVICE_HANDLER( k056832_ram_code_hi_r );
	982	DECLARE_READ8_DEVICE_HANDLER( k056832_ram_attr_lo_r );
	983	DECLARE_READ8_DEVICE_HANDLER( k056832_ram_attr_hi_r );
	984	DECLARE_WRITE8_DEVICE_HANDLER( k056832_ram_code_lo_w );
	985	DECLARE_WRITE8_DEVICE_HANDLER( k056832_ram_code_hi_w );
	986	DECLARE_WRITE8_DEVICE_HANDLER( k056832_ram_attr_lo_w );
	987	DECLARE_WRITE8_DEVICE_HANDLER( k056832_ram_attr_hi_w );
	988	DECLARE_WRITE8_DEVICE_HANDLER( k056832_w );
	989	DECLARE_WRITE8_DEVICE_HANDLER( k056832_b_w );
990	990	void k056832_mark_plane_dirty(device_t *device, int num);
991	991	void k056832_mark_all_tmaps_dirty(device_t *device);
992	992	void k056832_tilemap_draw(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int num, UINT32 flags, UINT32 priority);
r17961	r17962
1004	1004	int k056832_get_lookup(device_t *device, int bits);   /* Asterix */
1005	1005	void k056832_set_tile_bank(device_t *device, int bank);   /* Asterix */
1006	1006
1007		READ32_DEVICE_HANDLER( k056832_ram_long_r );
1008		READ32_DEVICE_HANDLER( k056832_rom_long_r );
1009		WRITE32_DEVICE_HANDLER( k056832_ram_long_w );
1010		READ32_DEVICE_HANDLER( k056832_unpaged_ram_long_r );
1011		WRITE32_DEVICE_HANDLER( k056832_unpaged_ram_long_w );
1012		WRITE32_DEVICE_HANDLER( k056832_long_w );
1013		WRITE32_DEVICE_HANDLER( k056832_b_long_w );
	1007	DECLARE_READ32_DEVICE_HANDLER( k056832_ram_long_r );
	1008	DECLARE_READ32_DEVICE_HANDLER( k056832_rom_long_r );
	1009	DECLARE_WRITE32_DEVICE_HANDLER( k056832_ram_long_w );
	1010	DECLARE_READ32_DEVICE_HANDLER( k056832_unpaged_ram_long_r );
	1011	DECLARE_WRITE32_DEVICE_HANDLER( k056832_unpaged_ram_long_w );
	1012	DECLARE_WRITE32_DEVICE_HANDLER( k056832_long_w );
	1013	DECLARE_WRITE32_DEVICE_HANDLER( k056832_b_long_w );
1014	1014
1015	1015	/* bit depths for the 56832 */
1016	1016	#define K056832_BPP_4   0
r17961	r17962
1023	1023
1024	1024	/**  Konami 055555  **/
1025	1025	void k055555_write_reg(device_t *device, UINT8 regnum, UINT8 regdat);
1026		WRITE16_DEVICE_HANDLER( k055555_word_w );
1027		WRITE32_DEVICE_HANDLER( k055555_long_w );
	1026	DECLARE_WRITE16_DEVICE_HANDLER( k055555_word_w );
	1027	DECLARE_WRITE32_DEVICE_HANDLER( k055555_long_w );
1028	1028	int k055555_read_register(device_t *device, int regnum);
1029	1029	int k055555_get_palette_index(device_t *device, int idx);
1030	1030
r17961	r17962
1098	1098	/**  Konami 054338  **/
1099	1099	/* mixer/alpha blender */
1100	1100
1101		WRITE16_DEVICE_HANDLER( k054338_word_w ); // "CLCT" registers
1102		WRITE32_DEVICE_HANDLER( k054338_long_w );
	1101	DECLARE_WRITE16_DEVICE_HANDLER( k054338_word_w ); // "CLCT" registers
	1102	DECLARE_WRITE32_DEVICE_HANDLER( k054338_long_w );
1103	1103	int k054338_register_r(device_t *device, int reg);
1104	1104	void k054338_update_all_shadows(device_t *device, int rushingheroes_hack);         // called at the beginning of SCREEN_UPDATE()
1105	1105	void k054338_fill_solid_bg(device_t *device, bitmap_ind16 &bitmap);            // solid backcolor fill
r17961	r17962
1126	1126	/**  Konami 001006  **/
1127	1127	UINT32 k001006_get_palette(device_t *device, int index);
1128	1128
1129		READ32_DEVICE_HANDLER( k001006_r );
1130		WRITE32_DEVICE_HANDLER( k001006_w );
	1129	DECLARE_READ32_DEVICE_HANDLER( k001006_r );
	1130	DECLARE_WRITE32_DEVICE_HANDLER( k001006_w );
1131	1131
1132	1132
1133	1133	/**  Konami 001005  **/
r17961	r17962
1135	1135	void k001005_swap_buffers(device_t *device);
1136	1136	void k001005_preprocess_texture_data(UINT8 *rom, int length, int gticlub);
1137	1137
1138		READ32_DEVICE_HANDLER( k001005_r );
1139		WRITE32_DEVICE_HANDLER( k001005_w );
	1138	DECLARE_READ32_DEVICE_HANDLER( k001005_r );
	1139	DECLARE_WRITE32_DEVICE_HANDLER( k001005_w );
1140	1140
1141	1141
1142	1142	/**  Konami 001604  **/
1143	1143	void k001604_draw_back_layer( device_t *device, bitmap_rgb32 &bitmap, const rectangle &cliprect );
1144	1144	void k001604_draw_front_layer( device_t *device, bitmap_rgb32 &bitmap, const rectangle &cliprect );
1145		WRITE32_DEVICE_HANDLER( k001604_tile_w );
1146		READ32_DEVICE_HANDLER( k001604_tile_r );
1147		WRITE32_DEVICE_HANDLER( k001604_char_w );
1148		READ32_DEVICE_HANDLER( k001604_char_r );
1149		WRITE32_DEVICE_HANDLER( k001604_reg_w );
1150		READ32_DEVICE_HANDLER( k001604_reg_r );
	1145	DECLARE_WRITE32_DEVICE_HANDLER( k001604_tile_w );
	1146	DECLARE_READ32_DEVICE_HANDLER( k001604_tile_r );
	1147	DECLARE_WRITE32_DEVICE_HANDLER( k001604_char_w );
	1148	DECLARE_READ32_DEVICE_HANDLER( k001604_char_r );
	1149	DECLARE_WRITE32_DEVICE_HANDLER( k001604_reg_w );
	1150	DECLARE_READ32_DEVICE_HANDLER( k001604_reg_r );
1151	1151
1152	1152
1153	1153	/**  Konami 037122  **/
1154	1154	void k037122_tile_draw( device_t *device, bitmap_rgb32 &bitmap, const rectangle &cliprect );
1155		READ32_DEVICE_HANDLER( k037122_sram_r );
1156		WRITE32_DEVICE_HANDLER( k037122_sram_w );
1157		READ32_DEVICE_HANDLER( k037122_char_r );
1158		WRITE32_DEVICE_HANDLER( k037122_char_w );
1159		READ32_DEVICE_HANDLER( k037122_reg_r );
1160		WRITE32_DEVICE_HANDLER( k037122_reg_w );
	1155	DECLARE_READ32_DEVICE_HANDLER( k037122_sram_r );
	1156	DECLARE_WRITE32_DEVICE_HANDLER( k037122_sram_w );
	1157	DECLARE_READ32_DEVICE_HANDLER( k037122_char_r );
	1158	DECLARE_WRITE32_DEVICE_HANDLER( k037122_char_w );
	1159	DECLARE_READ32_DEVICE_HANDLER( k037122_reg_r );
	1160	DECLARE_WRITE32_DEVICE_HANDLER( k037122_reg_w );
1161	1161
1162	1162	#define K056832_DRAW_FLAG_MIRROR      0x00800000
1163	1163
1164	1164	// debug handlers
1165		READ16_DEVICE_HANDLER( k056832_word_r );        // VACSET
1166		READ16_DEVICE_HANDLER( k056832_b_word_r );      // VSCCS  (board dependent)
1167		READ16_DEVICE_HANDLER( k053246_reg_word_r );    // OBJSET1
1168		READ16_DEVICE_HANDLER( k053247_reg_word_r );    // OBJSET2
1169		READ16_DEVICE_HANDLER( k053251_lsb_r );         // PCU1
1170		READ16_DEVICE_HANDLER( k053251_msb_r );         // PCU1
1171		READ16_DEVICE_HANDLER( k055555_word_r );        // PCU2
1172		READ16_DEVICE_HANDLER( k054338_word_r );        // CLTC
	1165	DECLARE_READ16_DEVICE_HANDLER( k056832_word_r );        // VACSET
	1166	DECLARE_READ16_DEVICE_HANDLER( k056832_b_word_r );      // VSCCS  (board dependent)
	1167	DECLARE_READ16_DEVICE_HANDLER( k053246_reg_word_r );    // OBJSET1
	1168	DECLARE_READ16_DEVICE_HANDLER( k053247_reg_word_r );    // OBJSET2
	1169	DECLARE_READ16_DEVICE_HANDLER( k053251_lsb_r );         // PCU1
	1170	DECLARE_READ16_DEVICE_HANDLER( k053251_msb_r );         // PCU1
	1171	DECLARE_READ16_DEVICE_HANDLER( k055555_word_r );        // PCU2
	1172	DECLARE_READ16_DEVICE_HANDLER( k054338_word_r );        // CLTC
1173	1173
1174		READ32_DEVICE_HANDLER( k056832_long_r );        // VACSET
1175		READ32_DEVICE_HANDLER( k053247_reg_long_r );    // OBJSET2
1176		READ32_DEVICE_HANDLER( k055555_long_r );        // PCU2
	1174	DECLARE_READ32_DEVICE_HANDLER( k056832_long_r );        // VACSET
	1175	DECLARE_READ32_DEVICE_HANDLER( k053247_reg_long_r );    // OBJSET2
	1176	DECLARE_READ32_DEVICE_HANDLER( k055555_long_r );        // PCU2
1177	1177
1178		READ16_DEVICE_HANDLER( k053244_reg_word_r );    // OBJSET0
	1178	DECLARE_READ16_DEVICE_HANDLER( k053244_reg_word_r );    // OBJSET0
1179	1179
1180	1180	#endif

trunk/src/mame/video/vectrex.c

r17961	r17962
42	42
43	43	*********************************************************************/
44	44
45		static WRITE8_DEVICE_HANDLER (v_via_pa_w);
46		static WRITE8_DEVICE_HANDLER(v_via_pb_w);
47		static WRITE8_DEVICE_HANDLER (v_via_ca2_w);
48		static WRITE8_DEVICE_HANDLER (v_via_cb2_w);
	45	static DECLARE_WRITE8_DEVICE_HANDLER (v_via_pa_w);
	46	static DECLARE_WRITE8_DEVICE_HANDLER(v_via_pb_w);
	47	static DECLARE_WRITE8_DEVICE_HANDLER (v_via_ca2_w);
	48	static DECLARE_WRITE8_DEVICE_HANDLER (v_via_cb2_w);
49	49
50	50
51	51	/*********************************************************************
r17961	r17962
399	399	device_t *ay8912 = device->machine().device("ay8912");
400	400
401	401	if (data & 0x08) /* BC1 (do we select a reg or write it ?) */
402		ay8910_address_w(ay8912, 0, state->m_via_out[PORTA]);
	402	ay8910_address_w(ay8912, space, 0, state->m_via_out[PORTA]);
403	403	else
404		ay8910_data_w(ay8912, 0, state->m_via_out[PORTA]);
	404	ay8910_data_w(ay8912, space, 0, state->m_via_out[PORTA]);
405	405	}
406	406
407	407	if (!(data & 0x1) && (state->m_via_out[PORTB] & 0x1))

trunk/src/mame/video/combatsc.c

r17961	r17962
115	115
116	116	TILE_GET_INFO_MEMBER(combatsc_state::get_tile_info0)
117	117	{
118		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, 6);
	118	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_1, generic_space(), 6);
119	119	UINT8 attributes = m_page[0][tile_index];
120	120	int bank = 4 * ((m_vreg & 0x0f) - 1);
121	121	int number, color;
r17961	r17962
149	149
150	150	TILE_GET_INFO_MEMBER(combatsc_state::get_tile_info1)
151	151	{
152		UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_2, 6);
	152	UINT8 ctrl_6 = k007121_ctrlram_r(m_k007121_2, generic_space(), 6);
153	153	UINT8 attributes = m_page[1][tile_index];
154	154	int bank = 4 * ((m_vreg >> 4) - 1);
155	155	int number, color;
r17961	r17962
350	350	WRITE8_MEMBER(combatsc_state::combatsc_pf_control_w)
351	351	{
352	352	device_t *k007121 = m_video_circuit ? m_k007121_2 : m_k007121_1;
353		k007121_ctrl_w(k007121, offset, data);
	353	k007121_ctrl_w(k007121, space, offset, data);
354	354
355	355	if (offset == 7)
356	356	m_bg_tilemap[m_video_circuit]->set_flip((data & 0x08) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
r17961	r17962
386	386	{
387	387	combatsc_state *state = machine.driver_data<combatsc_state>();
388	388	device_t *k007121 = circuit ? state->m_k007121_2 : state->m_k007121_1;
389		int base_color = (circuit * 4) * 16 + (k007121_ctrlram_r(k007121, 6) & 0x10) * 2;
	389	address_space &space = machine.driver_data()->generic_space();
	390	int base_color = (circuit * 4) * 16 + (k007121_ctrlram_r(k007121, space, 6) & 0x10) * 2;
390	391
391	392	k007121_sprites_draw(k007121, bitmap, cliprect, machine.gfx[circuit], machine.colortable, source, base_color, 0, 0, pri_mask);
392	393	}
r17961	r17962
399	400
400	401	set_pens(screen.machine());
401	402
402		if (k007121_ctrlram_r(state->m_k007121_1, 1) & 0x02)
	403	address_space &space = screen.machine().driver_data()->generic_space();
	404	if (k007121_ctrlram_r(state->m_k007121_1, space, 1) & 0x02)
403	405	{
404	406	state->m_bg_tilemap[0]->set_scroll_rows(32);
405	407	for (i = 0; i < 32; i++)
r17961	r17962
408	410	else
409	411	{
410	412	state->m_bg_tilemap[0]->set_scroll_rows(1);
411		state->m_bg_tilemap[0]->set_scrollx(0, k007121_ctrlram_r(state->m_k007121_1, 0) | ((k007121_ctrlram_r(state->m_k007121_1, 1) & 0x01) << 8));
	413	state->m_bg_tilemap[0]->set_scrollx(0, k007121_ctrlram_r(state->m_k007121_1, space, 0) | ((k007121_ctrlram_r(state->m_k007121_1, space, 1) & 0x01) << 8));
412	414	}
413	415
414		if (k007121_ctrlram_r(state->m_k007121_2, 1) & 0x02)
	416	if (k007121_ctrlram_r(state->m_k007121_2, space, 1) & 0x02)
415	417	{
416	418	state->m_bg_tilemap[1]->set_scroll_rows(32);
417	419	for (i = 0; i < 32; i++)
r17961	r17962
420	422	else
421	423	{
422	424	state->m_bg_tilemap[1]->set_scroll_rows(1);
423		state->m_bg_tilemap[1]->set_scrollx(0, k007121_ctrlram_r(state->m_k007121_2, 0) | ((k007121_ctrlram_r(state->m_k007121_2, 1) & 0x01) << 8));
	425	state->m_bg_tilemap[1]->set_scrollx(0, k007121_ctrlram_r(state->m_k007121_2, space, 0) | ((k007121_ctrlram_r(state->m_k007121_2, space, 1) & 0x01) << 8));
424	426	}
425	427
426		state->m_bg_tilemap[0]->set_scrolly(0, k007121_ctrlram_r(state->m_k007121_1, 2));
427		state->m_bg_tilemap[1]->set_scrolly(0, k007121_ctrlram_r(state->m_k007121_2, 2));
	428	state->m_bg_tilemap[0]->set_scrolly(0, k007121_ctrlram_r(state->m_k007121_1, space, 2));
	429	state->m_bg_tilemap[1]->set_scrolly(0, k007121_ctrlram_r(state->m_k007121_2, space, 2));
428	430
429	431	screen.machine().priority_bitmap.fill(0, cliprect);
430	432
r17961	r17962
451	453	draw_sprites(screen.machine(), bitmap, cliprect, state->m_spriteram[0], 0, 0x4444);
452	454	}
453	455
454		if (k007121_ctrlram_r(state->m_k007121_1, 1) & 0x08)
	456	if (k007121_ctrlram_r(state->m_k007121_1, space, 1) & 0x08)
455	457	{
456	458	for (i = 0; i < 32; i++)
457	459	{
r17961	r17962
461	463	}
462	464
463	465	/* chop the extreme columns if necessary */
464		if (k007121_ctrlram_r(state->m_k007121_1, 3) & 0x40)
	466	if (k007121_ctrlram_r(state->m_k007121_1, space, 3) & 0x40)
465	467	{
466	468	rectangle clip;
467	469

trunk/src/mame/video/taito_f2.c

r17961	r17962
1039	1039	SCREEN_UPDATE_IND16( taitof2_pri )
1040	1040	{
1041	1041	taitof2_state *state = screen.machine().driver_data<taitof2_state>();
	1042	address_space &space = screen.machine().driver_data()->generic_space();
1042	1043	int layer[3];
1043	1044
1044	1045	taitof2_handle_sprite_buffering(screen.machine());
r17961	r17962
1048	1049	layer[0] = tc0100scn_bottomlayer(state->m_tc0100scn);
1049	1050	layer[1] = layer[0] ^ 1;
1050	1051	layer[2] = 2;
1051		state->m_tilepri[layer[0]] = tc0360pri_r(state->m_tc0360pri, 5) & 0x0f;
1052		state->m_tilepri[layer[1]] = tc0360pri_r(state->m_tc0360pri, 5) >> 4;
1053		state->m_tilepri[layer[2]] = tc0360pri_r(state->m_tc0360pri, 4) >> 4;
	1052	state->m_tilepri[layer[0]] = tc0360pri_r(state->m_tc0360pri, space, 5) & 0x0f;
	1053	state->m_tilepri[layer[1]] = tc0360pri_r(state->m_tc0360pri, space, 5) >> 4;
	1054	state->m_tilepri[layer[2]] = tc0360pri_r(state->m_tc0360pri, space, 4) >> 4;
1054	1055
1055		state->m_spritepri[0] = tc0360pri_r(state->m_tc0360pri, 6) & 0x0f;
1056		state->m_spritepri[1] = tc0360pri_r(state->m_tc0360pri, 6) >> 4;
1057		state->m_spritepri[2] = tc0360pri_r(state->m_tc0360pri, 7) & 0x0f;
1058		state->m_spritepri[3] = tc0360pri_r(state->m_tc0360pri, 7) >> 4;
	1056	state->m_spritepri[0] = tc0360pri_r(state->m_tc0360pri, space, 6) & 0x0f;
	1057	state->m_spritepri[1] = tc0360pri_r(state->m_tc0360pri, space, 6) >> 4;
	1058	state->m_spritepri[2] = tc0360pri_r(state->m_tc0360pri, space, 7) & 0x0f;
	1059	state->m_spritepri[3] = tc0360pri_r(state->m_tc0360pri, space, 7) >> 4;
1059	1060
1060		state->m_spriteblendmode = tc0360pri_r(state->m_tc0360pri, 0) & 0xc0;
	1061	state->m_spriteblendmode = tc0360pri_r(state->m_tc0360pri, space, 0) & 0xc0;
1061	1062
1062	1063	screen.machine().priority_bitmap.fill(0, cliprect);
1063	1064	bitmap.fill(0, cliprect);   /* wrong color? */
r17961	r17962
1086	1087	SCREEN_UPDATE_IND16( taitof2_pri_roz )
1087	1088	{
1088	1089	taitof2_state *state = screen.machine().driver_data<taitof2_state>();
	1090	address_space &space = screen.machine().driver_data()->generic_space();
1089	1091	int tilepri[3];
1090	1092	int rozpri;
1091	1093	int layer[3];
1092	1094	int drawn;
1093	1095	int i,j;
1094		int roz_base_color = (tc0360pri_r(state->m_tc0360pri, 1) & 0x3f) << 2;
	1096	int roz_base_color = (tc0360pri_r(state->m_tc0360pri, space, 1) & 0x3f) << 2;
1095	1097
1096	1098	taitof2_handle_sprite_buffering(screen.machine());
1097	1099
r17961	r17962
1103	1105
1104	1106	tc0100scn_tilemap_update(state->m_tc0100scn);
1105	1107
1106		rozpri = (tc0360pri_r(state->m_tc0360pri, 1) & 0xc0) >> 6;
1107		rozpri = (tc0360pri_r(state->m_tc0360pri, 8 + rozpri / 2) >> 4 * (rozpri & 1)) & 0x0f;
	1108	rozpri = (tc0360pri_r(state->m_tc0360pri, space, 1) & 0xc0) >> 6;
	1109	rozpri = (tc0360pri_r(state->m_tc0360pri, space, 8 + rozpri / 2) >> 4 * (rozpri & 1)) & 0x0f;
1108	1110
1109	1111	layer[0] = tc0100scn_bottomlayer(state->m_tc0100scn);
1110	1112	layer[1] = layer[0] ^ 1;
1111	1113	layer[2] = 2;
1112	1114
1113		tilepri[layer[0]] = tc0360pri_r(state->m_tc0360pri, 5) & 0x0f;
1114		tilepri[layer[1]] = tc0360pri_r(state->m_tc0360pri, 5) >> 4;
1115		tilepri[layer[2]] = tc0360pri_r(state->m_tc0360pri, 4) >> 4;
	1115	tilepri[layer[0]] = tc0360pri_r(state->m_tc0360pri, space, 5) & 0x0f;
	1116	tilepri[layer[1]] = tc0360pri_r(state->m_tc0360pri, space, 5) >> 4;
	1117	tilepri[layer[2]] = tc0360pri_r(state->m_tc0360pri, space, 4) >> 4;
1116	1118
1117		state->m_spritepri[0] = tc0360pri_r(state->m_tc0360pri, 6) & 0x0f;
1118		state->m_spritepri[1] = tc0360pri_r(state->m_tc0360pri, 6) >> 4;
1119		state->m_spritepri[2] = tc0360pri_r(state->m_tc0360pri, 7) & 0x0f;
1120		state->m_spritepri[3] = tc0360pri_r(state->m_tc0360pri, 7) >> 4;
	1119	state->m_spritepri[0] = tc0360pri_r(state->m_tc0360pri, space, 6) & 0x0f;
	1120	state->m_spritepri[1] = tc0360pri_r(state->m_tc0360pri, space, 6) >> 4;
	1121	state->m_spritepri[2] = tc0360pri_r(state->m_tc0360pri, space, 7) & 0x0f;
	1122	state->m_spritepri[3] = tc0360pri_r(state->m_tc0360pri, space, 7) >> 4;
1121	1123
1122		state->m_spriteblendmode = tc0360pri_r(state->m_tc0360pri, 0) & 0xc0;
	1124	state->m_spriteblendmode = tc0360pri_r(state->m_tc0360pri, space, 0) & 0xc0;
1123	1125
1124	1126	screen.machine().priority_bitmap.fill(0, cliprect);
1125	1127	bitmap.fill(0, cliprect);   /* wrong color? */
r17961	r17962
1155	1157	SCREEN_UPDATE_IND16( taitof2_thundfox )
1156	1158	{
1157	1159	taitof2_state *state = screen.machine().driver_data<taitof2_state>();
	1160	address_space &space = screen.machine().driver_data()->generic_space();
1158	1161	int tilepri[2][3];
1159	1162	int spritepri[4];
1160	1163	int layer[2][3];
r17961	r17962
1168	1171	layer[0][0] = tc0100scn_bottomlayer(state->m_tc0100scn_1);
1169	1172	layer[0][1] = layer[0][0] ^ 1;
1170	1173	layer[0][2] = 2;
1171		tilepri[0][layer[0][0]] = tc0360pri_r(state->m_tc0360pri, 5) & 0x0f;
1172		tilepri[0][layer[0][1]] = tc0360pri_r(state->m_tc0360pri, 5) >> 4;
1173		tilepri[0][layer[0][2]] = tc0360pri_r(state->m_tc0360pri, 4) >> 4;
	1174	tilepri[0][layer[0][0]] = tc0360pri_r(state->m_tc0360pri, space, 5) & 0x0f;
	1175	tilepri[0][layer[0][1]] = tc0360pri_r(state->m_tc0360pri, space, 5) >> 4;
	1176	tilepri[0][layer[0][2]] = tc0360pri_r(state->m_tc0360pri, space, 4) >> 4;
1174	1177
1175	1178	layer[1][0] = tc0100scn_bottomlayer(state->m_tc0100scn_2);
1176	1179	layer[1][1] = layer[1][0] ^ 1;
1177	1180	layer[1][2] = 2;
1178		tilepri[1][layer[1][0]] = tc0360pri_r(state->m_tc0360pri, 9) & 0x0f;
1179		tilepri[1][layer[1][1]] = tc0360pri_r(state->m_tc0360pri, 9) >> 4;
1180		tilepri[1][layer[1][2]] = tc0360pri_r(state->m_tc0360pri, 8) >> 4;
	1181	tilepri[1][layer[1][0]] = tc0360pri_r(state->m_tc0360pri, space, 9) & 0x0f;
	1182	tilepri[1][layer[1][1]] = tc0360pri_r(state->m_tc0360pri, space, 9) >> 4;
	1183	tilepri[1][layer[1][2]] = tc0360pri_r(state->m_tc0360pri, space, 8) >> 4;
1181	1184
1182		spritepri[0] = tc0360pri_r(state->m_tc0360pri, 6) & 0x0f;
1183		spritepri[1] = tc0360pri_r(state->m_tc0360pri, 6) >> 4;
1184		spritepri[2] = tc0360pri_r(state->m_tc0360pri, 7) & 0x0f;
1185		spritepri[3] = tc0360pri_r(state->m_tc0360pri, 7) >> 4;
	1185	spritepri[0] = tc0360pri_r(state->m_tc0360pri, space, 6) & 0x0f;
	1186	spritepri[1] = tc0360pri_r(state->m_tc0360pri, space, 6) >> 4;
	1187	spritepri[2] = tc0360pri_r(state->m_tc0360pri, space, 7) & 0x0f;
	1188	spritepri[3] = tc0360pri_r(state->m_tc0360pri, space, 7) >> 4;
1186	1189
1187	1190	screen.machine().priority_bitmap.fill(0, cliprect);
1188	1191	bitmap.fill(0, cliprect);   /* wrong color? */
r17961	r17962
1292	1295	SCREEN_UPDATE_IND16( taitof2_metalb )
1293	1296	{
1294	1297	taitof2_state *state = screen.machine().driver_data<taitof2_state>();
	1298	address_space &space = screen.machine().driver_data()->generic_space();
1295	1299	UINT8 layer[5], invlayer[4];
1296	1300	UINT16 priority;
1297	1301
r17961	r17962
1312	1316	invlayer[layer[2]] = 2;
1313	1317	invlayer[layer[3]] = 3;
1314	1318
1315		state->m_tilepri[invlayer[0]] = tc0360pri_r(state->m_tc0360pri, 4) & 0x0f;   /* bg0 */
1316		state->m_tilepri[invlayer[1]] = tc0360pri_r(state->m_tc0360pri, 4) >> 4;   /* bg1 */
1317		state->m_tilepri[invlayer[2]] = tc0360pri_r(state->m_tc0360pri, 5) & 0x0f;   /* bg2 */
1318		state->m_tilepri[invlayer[3]] = tc0360pri_r(state->m_tc0360pri, 5) >> 4;   /* bg3 */
1319		state->m_tilepri[4] = tc0360pri_r(state->m_tc0360pri, 9) & 0x0f;         /* fg (text layer) */
	1319	state->m_tilepri[invlayer[0]] = tc0360pri_r(state->m_tc0360pri, space, 4) & 0x0f;   /* bg0 */
	1320	state->m_tilepri[invlayer[1]] = tc0360pri_r(state->m_tc0360pri, space, 4) >> 4;   /* bg1 */
	1321	state->m_tilepri[invlayer[2]] = tc0360pri_r(state->m_tc0360pri, space, 5) & 0x0f;   /* bg2 */
	1322	state->m_tilepri[invlayer[3]] = tc0360pri_r(state->m_tc0360pri, space, 5) >> 4;   /* bg3 */
	1323	state->m_tilepri[4] = tc0360pri_r(state->m_tc0360pri, space, 9) & 0x0f;         /* fg (text layer) */
1320	1324
1321		state->m_spritepri[0] = tc0360pri_r(state->m_tc0360pri, 6) & 0x0f;
1322		state->m_spritepri[1] = tc0360pri_r(state->m_tc0360pri, 6) >> 4;
1323		state->m_spritepri[2] = tc0360pri_r(state->m_tc0360pri, 7) & 0x0f;
1324		state->m_spritepri[3] = tc0360pri_r(state->m_tc0360pri, 7) >> 4;
	1325	state->m_spritepri[0] = tc0360pri_r(state->m_tc0360pri, space, 6) & 0x0f;
	1326	state->m_spritepri[1] = tc0360pri_r(state->m_tc0360pri, space, 6) >> 4;
	1327	state->m_spritepri[2] = tc0360pri_r(state->m_tc0360pri, space, 7) & 0x0f;
	1328	state->m_spritepri[3] = tc0360pri_r(state->m_tc0360pri, space, 7) >> 4;
1325	1329
1326		state->m_spriteblendmode = tc0360pri_r(state->m_tc0360pri, 0) & 0xc0;
	1330	state->m_spriteblendmode = tc0360pri_r(state->m_tc0360pri, space, 0) & 0xc0;
1327	1331
1328	1332	screen.machine().priority_bitmap.fill(0, cliprect);
1329	1333	bitmap.fill(0, cliprect);
r17961	r17962
1343	1347	SCREEN_UPDATE_IND16( taitof2_deadconx )
1344	1348	{
1345	1349	taitof2_state *state = screen.machine().driver_data<taitof2_state>();
	1350	address_space &space = screen.machine().driver_data()->generic_space();
1346	1351	UINT8 layer[5];
1347	1352	UINT8 tilepri[5];
1348	1353	UINT8 spritepri[4];
r17961	r17962
1360	1365	layer[3] = (priority & 0x000f) >>  0;   /* tells us which is top */
1361	1366	layer[4] = 4;   /* text layer always over bg layers */
1362	1367
1363		tilepri[0] = tc0360pri_r(state->m_tc0360pri, 4) >> 4;      /* bg0 */
1364		tilepri[1] = tc0360pri_r(state->m_tc0360pri, 5) & 0x0f;    /* bg1 */
1365		tilepri[2] = tc0360pri_r(state->m_tc0360pri, 5) >> 4;      /* bg2 */
1366		tilepri[3] = tc0360pri_r(state->m_tc0360pri, 4) & 0x0f;    /* bg3 */
	1368	tilepri[0] = tc0360pri_r(state->m_tc0360pri, space, 4) >> 4;      /* bg0 */
	1369	tilepri[1] = tc0360pri_r(state->m_tc0360pri, space, 5) & 0x0f;    /* bg1 */
	1370	tilepri[2] = tc0360pri_r(state->m_tc0360pri, space, 5) >> 4;      /* bg2 */
	1371	tilepri[3] = tc0360pri_r(state->m_tc0360pri, space, 4) & 0x0f;    /* bg3 */
1367	1372
1368	1373	/* we actually assume text layer is on top of everything anyway, but FWIW... */
1369		tilepri[layer[4]] = tc0360pri_r(state->m_tc0360pri, 7) >> 4;    /* fg (text layer) */
	1374	tilepri[layer[4]] = tc0360pri_r(state->m_tc0360pri, space, 7) >> 4;    /* fg (text layer) */
1370	1375
1371		spritepri[0] = tc0360pri_r(state->m_tc0360pri, 6) & 0x0f;
1372		spritepri[1] = tc0360pri_r(state->m_tc0360pri, 6) >> 4;
1373		spritepri[2] = tc0360pri_r(state->m_tc0360pri, 7) & 0x0f;
1374		spritepri[3] = tc0360pri_r(state->m_tc0360pri, 7) >> 4;
	1376	spritepri[0] = tc0360pri_r(state->m_tc0360pri, space, 6) & 0x0f;
	1377	spritepri[1] = tc0360pri_r(state->m_tc0360pri, space, 6) >> 4;
	1378	spritepri[2] = tc0360pri_r(state->m_tc0360pri, space, 7) & 0x0f;
	1379	spritepri[3] = tc0360pri_r(state->m_tc0360pri, space, 7) >> 4;
1375	1380
1376	1381	screen.machine().priority_bitmap.fill(0, cliprect);
1377	1382	bitmap.fill(0, cliprect);

trunk/src/mame/video/groundfx.c

r17961	r17962
198	198	SCREEN_UPDATE_IND16( groundfx )
199	199	{
200	200	groundfx_state *state = screen.machine().driver_data<groundfx_state>();
	201	address_space &space = screen.machine().driver_data()->generic_space();
201	202	device_t *tc0100scn = screen.machine().device("tc0100scn");
202	203	device_t *tc0480scp = screen.machine().device("tc0480scp");
203	204	UINT8 layer[5];
r17961	r17962
241	242	it's contents the usual way.
242	243
243	244	*/
244		if (tc0100scn_long_r(tc0100scn, 0x4090 / 4, 0xffffffff) ||
245		tc0480scp_long_r(tc0480scp, 0x20 / 4, 0xffffffff) == 0x240866)  /* Anything in text layer - really stupid hack */
	245	if (tc0100scn_long_r(tc0100scn, space, 0x4090 / 4, 0xffffffff) ||
	246	tc0480scp_long_r(tc0480scp, space, 0x20 / 4, 0xffffffff) == 0x240866)  /* Anything in text layer - really stupid hack */
246	247	{
247	248	tc0480scp_tilemap_draw(tc0480scp, bitmap, cliprect, layer[1], 0, 2);
248	249	tc0480scp_tilemap_draw(tc0480scp, bitmap, cliprect, layer[2], 0, 4);
r17961	r17962
250	251
251	252	//tc0100scn_tilemap_draw(tc0100scn, bitmap, cliprect, 0, pivlayer[2], 0, 0);
252	253
253		if (tc0480scp_long_r(tc0480scp, 0x20 / 4, 0xffffffff) != 0x240866) /* Stupid hack for start of race */
	254	if (tc0480scp_long_r(tc0480scp, space, 0x20 / 4, 0xffffffff) != 0x240866) /* Stupid hack for start of race */
254	255	tc0480scp_tilemap_draw(tc0480scp, bitmap, state->m_hack_cliprect, layer[0], 0, 0);
255	256	draw_sprites(screen.machine(), bitmap, cliprect, 1, 44, -574);
256	257	}

trunk/src/mame/video/fastlane.c

r17961	r17962
49	49
50	50	TILE_GET_INFO_MEMBER(fastlane_state::get_tile_info0)
51	51	{
52		UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, 3);
53		UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, 4);
54		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, 5);
	52	UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, generic_space(), 3);
	53	UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, generic_space(), 4);
	54	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, generic_space(), 5);
55	55	int attr = m_videoram1[tile_index];
56	56	int code = m_videoram1[tile_index + 0x400];
57	57	int bit0 = (ctrl_5 >> 0) & 0x03;
r17961	r17962
77	77
78	78	TILE_GET_INFO_MEMBER(fastlane_state::get_tile_info1)
79	79	{
80		UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, 3);
81		UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, 4);
82		UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, 5);
	80	UINT8 ctrl_3 = k007121_ctrlram_r(m_k007121, generic_space(), 3);
	81	UINT8 ctrl_4 = k007121_ctrlram_r(m_k007121, generic_space(), 4);
	82	UINT8 ctrl_5 = k007121_ctrlram_r(m_k007121, generic_space(), 5);
83	83	int attr = m_videoram2[tile_index];
84	84	int code = m_videoram2[tile_index + 0x400];
85	85	int bit0 = (ctrl_5 >> 0) & 0x03;
r17961	r17962
163	163	set_pens(screen.machine());
164	164
165	165	/* set scroll registers */
166		xoffs = k007121_ctrlram_r(state->m_k007121, 0);
	166	address_space &space = screen.machine().driver_data()->generic_space();
	167	xoffs = k007121_ctrlram_r(state->m_k007121, space, 0);
167	168	for (i = 0; i < 32; i++)
168	169	state->m_layer0->set_scrollx(i, state->m_k007121_regs[0x20 + i] + xoffs - 40);
169	170
170		state->m_layer0->set_scrolly(0, k007121_ctrlram_r(state->m_k007121, 2));
	171	state->m_layer0->set_scrolly(0, k007121_ctrlram_r(state->m_k007121, space, 2));
171	172
172	173	state->m_layer0->draw(bitmap, finalclip0, 0, 0);
173	174	k007121_sprites_draw(state->m_k007121, bitmap, cliprect, screen.machine().gfx[0], screen.machine().colortable, state->m_spriteram, 0, 40, 0, (UINT32)-1);

trunk/src/mame/video/pktgaldx.c

r17961	r17962
8	8	SCREEN_UPDATE_IND16( pktgaldx )
9	9	{
10	10	pktgaldx_state *state = screen.machine().driver_data<pktgaldx_state>();
11		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	11	address_space &space = screen.machine().driver_data()->generic_space();
	12	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
12	13
13	14	state->flip_screen_set(BIT(flip, 7));
14	15	deco16ic_pf_update(state->m_deco_tilegen1, state->m_pf1_rowscroll, state->m_pf2_rowscroll);

trunk/src/mame/video/triplhnt.c

r17961	r17962
114	114
115	115	draw_sprites(screen.machine(), bitmap, cliprect);
116	116
117		discrete_sound_w(discrete, TRIPLHNT_BEAR_ROAR_DATA, state->m_playfield_ram[0xfa] & 15);
118		discrete_sound_w(discrete, TRIPLHNT_SHOT_DATA, state->m_playfield_ram[0xfc] & 15);
	117	address_space &space = screen.machine().driver_data()->generic_space();
	118	discrete_sound_w(discrete, space, TRIPLHNT_BEAR_ROAR_DATA, state->m_playfield_ram[0xfa] & 15);
	119	discrete_sound_w(discrete, space, TRIPLHNT_SHOT_DATA, state->m_playfield_ram[0xfc] & 15);
119	120	return 0;
120	121	}

trunk/src/mame/video/subs.c

r17961	r17962
114	114	}
115	115
116	116	/* Update sound */
117		discrete_sound_w(discrete, SUBS_LAUNCH_DATA, spriteram[5] & 0x0f);   // Launch data
118		discrete_sound_w(discrete, SUBS_CRASH_DATA, spriteram[5] >> 4);      // Crash/explode data
	117	address_space &space = screen.machine().driver_data()->generic_space();
	118	discrete_sound_w(discrete, space, SUBS_LAUNCH_DATA, spriteram[5] & 0x0f);   // Launch data
	119	discrete_sound_w(discrete, space, SUBS_CRASH_DATA, spriteram[5] >> 4);      // Crash/explode data
119	120	return 0;
120	121	}
121	122

trunk/src/mame/video/gp9001.c

r17961	r17962
594	594	{
595	595	case 0x04/2:
596	596	case 0x06/2:
597		return gp9001_devvideoram16_r(device, offset-0x04/2, mem_mask);
	597	return gp9001_devvideoram16_r(device, space, offset-0x04/2, mem_mask);
598	598
599	599	case 0x0c/2:
600		return gp9001_vdpstatus_r(device, offset-0x0c/2, mem_mask);
	600	return gp9001_vdpstatus_r(device, space, offset-0x0c/2, mem_mask);
601	601
602	602	default:
603	603	logerror("gp9001_vdp_r: read from unhandled offset %04x\n",offset*2);
r17961	r17962
611	611	switch (offset)
612	612	{
613	613	case 0x00/2:
614		gp9001_devvoffs_w(device, offset-0x00/2, data, mem_mask);
	614	gp9001_devvoffs_w(device, space, offset-0x00/2, data, mem_mask);
615	615	break;
616	616
617	617	case 0x04/2:
618	618	case 0x06/2:
619		gp9001_devvideoram16_w(device, offset-0x04/2, data, mem_mask);
	619	gp9001_devvideoram16_w(device, space, offset-0x04/2, data, mem_mask);
620	620	break;
621	621
622	622	case 0x08/2:
623		gp9001_scroll_reg_select_w(device, offset-0x08/2, data, mem_mask);
	623	gp9001_scroll_reg_select_w(device, space, offset-0x08/2, data, mem_mask);
624	624	break;
625	625
626	626	case 0x0c/2:
627		gp9001_scroll_reg_devvdata_w(device, offset-0x0c/2, data, mem_mask);
	627	gp9001_scroll_reg_devvdata_w(device, space, offset-0x0c/2, data, mem_mask);
628	628	break;
629	629
630	630	default:
r17961	r17962
639	639	switch (offset)
640	640	{
641	641	case 0x00/2:
642		return gp9001_vdpstatus_r(device, offset-0x0c/2, mem_mask);
	642	return gp9001_vdpstatus_r(device, space, offset-0x0c/2, mem_mask);
643	643
644	644	case 0x08/2:
645	645	case 0x0a/2:
646		return gp9001_devvideoram16_r(device, offset-0x04/2, mem_mask);
	646	return gp9001_devvideoram16_r(device, space, offset-0x04/2, mem_mask);
647	647
648	648
649	649	default:
r17961	r17962
658	658	switch (offset)
659	659	{
660	660	case 0x00/2:
661		gp9001_scroll_reg_devvdata_w(device, offset-0x0c/2, data, mem_mask);
	661	gp9001_scroll_reg_devvdata_w(device, space, offset-0x0c/2, data, mem_mask);
662	662	break;
663	663
664	664	case 0x04/2:
665		gp9001_scroll_reg_select_w(device, offset-0x08/2, data, mem_mask);
	665	gp9001_scroll_reg_select_w(device, space, offset-0x08/2, data, mem_mask);
666	666	break;
667	667
668	668	case 0x08/2:
669	669	case 0x0a/2:
670		gp9001_devvideoram16_w(device, offset-0x04/2, data, mem_mask);
	670	gp9001_devvideoram16_w(device, space, offset-0x04/2, data, mem_mask);
671	671	break;
672	672
673	673	case 0x0c/2:
674		gp9001_devvoffs_w(device, offset-0x00/2, data, mem_mask);
	674	gp9001_devvoffs_w(device, space, offset-0x00/2, data, mem_mask);
675	675	break;
676	676
677	677	default:

trunk/src/mame/video/gp9001.h

r17961	r17962
101	101
102	102
103	103	// access to VDP
104		READ16_DEVICE_HANDLER( gp9001_vdp_r );
105		WRITE16_DEVICE_HANDLER( gp9001_vdp_w );
106		READ16_DEVICE_HANDLER( gp9001_vdp_alt_r );
107		WRITE16_DEVICE_HANDLER( gp9001_vdp_alt_w );
	104	DECLARE_READ16_DEVICE_HANDLER( gp9001_vdp_r );
	105	DECLARE_WRITE16_DEVICE_HANDLER( gp9001_vdp_w );
	106	DECLARE_READ16_DEVICE_HANDLER( gp9001_vdp_alt_r );
	107	DECLARE_WRITE16_DEVICE_HANDLER( gp9001_vdp_alt_w );
108	108	// this bootleg has strange access
109		READ16_DEVICE_HANDLER ( pipibibi_bootleg_videoram16_r );
110		WRITE16_DEVICE_HANDLER( pipibibi_bootleg_videoram16_w  );
111		READ16_DEVICE_HANDLER ( pipibibi_bootleg_spriteram16_r );
112		WRITE16_DEVICE_HANDLER( pipibibi_bootleg_spriteram16_w );
113		WRITE16_DEVICE_HANDLER( pipibibi_bootleg_scroll_w );
	109	DECLARE_READ16_DEVICE_HANDLER ( pipibibi_bootleg_videoram16_r );
	110	DECLARE_WRITE16_DEVICE_HANDLER( pipibibi_bootleg_videoram16_w  );
	111	DECLARE_READ16_DEVICE_HANDLER ( pipibibi_bootleg_spriteram16_r );
	112	DECLARE_WRITE16_DEVICE_HANDLER( pipibibi_bootleg_spriteram16_w );
	113	DECLARE_WRITE16_DEVICE_HANDLER( pipibibi_bootleg_scroll_w );

trunk/src/mame/includes/bzone.h

r17961	r17962
31	31
32	32	/*----------- defined in audio/bzone.c -----------*/
33	33
34		WRITE8_DEVICE_HANDLER( bzone_sounds_w );
	34	DECLARE_WRITE8_DEVICE_HANDLER( bzone_sounds_w );
35	35
36	36	MACHINE_CONFIG_EXTERN( bzone_audio );
37	37
38	38	/*----------- defined in audio/redbaron.c -----------*/
39	39
40		WRITE8_DEVICE_HANDLER( redbaron_sounds_w );
	40	DECLARE_WRITE8_DEVICE_HANDLER( redbaron_sounds_w );
41	41
42	42	class redbaron_sound_device : public device_t,
43	43	public device_sound_interface

trunk/src/mame/includes/orbit.h

r17961	r17962
48	48
49	49	/*----------- defined in audio/orbit.c -----------*/
50	50
51		WRITE8_DEVICE_HANDLER( orbit_note_w );
52		WRITE8_DEVICE_HANDLER( orbit_note_amp_w );
53		WRITE8_DEVICE_HANDLER( orbit_noise_amp_w );
54		WRITE8_DEVICE_HANDLER( orbit_noise_rst_w );
	51	DECLARE_WRITE8_DEVICE_HANDLER( orbit_note_w );
	52	DECLARE_WRITE8_DEVICE_HANDLER( orbit_note_amp_w );
	53	DECLARE_WRITE8_DEVICE_HANDLER( orbit_noise_amp_w );
	54	DECLARE_WRITE8_DEVICE_HANDLER( orbit_noise_rst_w );
55	55
56	56	DISCRETE_SOUND_EXTERN( orbit );
57	57

trunk/src/mame/includes/system1.h

r17961	r17962
113	113
114	114
115	115
116		WRITE8_DEVICE_HANDLER( system1_videoram_bank_w );
	116	DECLARE_WRITE8_DEVICE_HANDLER( system1_videoram_bank_w );
117	117
118	118
119	119

trunk/src/mame/includes/megadriv.h

r17961	r17962
73	73	extern WRITE16_HANDLER( megadriv_68k_io_write );
74	74
75	75	/* These handlers are needed by puckpkmn.c for his memory map */
76		extern READ8_DEVICE_HANDLER( megadriv_68k_YM2612_read);
77		extern WRITE8_DEVICE_HANDLER( megadriv_68k_YM2612_write);
	76	extern DECLARE_READ8_DEVICE_HANDLER( megadriv_68k_YM2612_read);
	77	extern DECLARE_WRITE8_DEVICE_HANDLER( megadriv_68k_YM2612_write);
78	78
79	79	/* These are needed to create external input handlers (see e.g. MESS) */
80	80	/* Regs are also used by Megaplay! */

trunk/src/mame/includes/zaxxon.h

r17961	r17962
73	73
74	74	/*----------- defined in audio/zaxxon.c -----------*/
75	75
76		WRITE8_DEVICE_HANDLER( zaxxon_sound_a_w );
77		WRITE8_DEVICE_HANDLER( zaxxon_sound_b_w );
78		WRITE8_DEVICE_HANDLER( zaxxon_sound_c_w );
	76	DECLARE_WRITE8_DEVICE_HANDLER( zaxxon_sound_a_w );
	77	DECLARE_WRITE8_DEVICE_HANDLER( zaxxon_sound_b_w );
	78	DECLARE_WRITE8_DEVICE_HANDLER( zaxxon_sound_c_w );
79	79
80		WRITE8_DEVICE_HANDLER( congo_sound_b_w );
81		WRITE8_DEVICE_HANDLER( congo_sound_c_w );
	80	DECLARE_WRITE8_DEVICE_HANDLER( congo_sound_b_w );
	81	DECLARE_WRITE8_DEVICE_HANDLER( congo_sound_c_w );
82	82
83	83	MACHINE_CONFIG_EXTERN( zaxxon_samples );
84	84	MACHINE_CONFIG_EXTERN( congo_samples );

trunk/src/mame/includes/bsktball.h

r17961	r17962
66	66
67	67	/*----------- defined in audio/bsktball.c -----------*/
68	68
69		WRITE8_DEVICE_HANDLER( bsktball_bounce_w );
70		WRITE8_DEVICE_HANDLER( bsktball_note_w );
71		WRITE8_DEVICE_HANDLER( bsktball_noise_reset_w );
	69	DECLARE_WRITE8_DEVICE_HANDLER( bsktball_bounce_w );
	70	DECLARE_WRITE8_DEVICE_HANDLER( bsktball_note_w );
	71	DECLARE_WRITE8_DEVICE_HANDLER( bsktball_noise_reset_w );
72	72
73	73	DISCRETE_SOUND_EXTERN( bsktball );
74	74

trunk/src/mame/includes/skyraid.h

r17961	r17962
32	32
33	33	DISCRETE_SOUND_EXTERN( skyraid );
34	34
35		WRITE8_DEVICE_HANDLER( skyraid_sound_w );
	35	DECLARE_WRITE8_DEVICE_HANDLER( skyraid_sound_w );
36	36
37	37
38	38	/*----------- defined in video/skyraid.c -----------*/

trunk/src/mame/includes/beezer.h

r17961	r17962
53	53	extern const device_type BEEZER;
54	54
55	55
56		READ8_DEVICE_HANDLER( beezer_sh6840_r );
57		WRITE8_DEVICE_HANDLER( beezer_sh6840_w );
58		WRITE8_DEVICE_HANDLER( beezer_sfxctrl_w );
59		WRITE8_DEVICE_HANDLER( beezer_timer1_w );
60		READ8_DEVICE_HANDLER( beezer_noise_r );
	56	DECLARE_READ8_DEVICE_HANDLER( beezer_sh6840_r );
	57	DECLARE_WRITE8_DEVICE_HANDLER( beezer_sh6840_w );
	58	DECLARE_WRITE8_DEVICE_HANDLER( beezer_sfxctrl_w );
	59	DECLARE_WRITE8_DEVICE_HANDLER( beezer_timer1_w );
	60	DECLARE_READ8_DEVICE_HANDLER( beezer_noise_r );
61	61
62	62	/*----------- defined in video/beezer.c -----------*/
63	63

trunk/src/mame/includes/simpsons.h

r17961	r17962
43	43
44	44	/*----------- defined in machine/simpsons.c -----------*/
45	45
46		READ8_DEVICE_HANDLER( simpsons_sound_r );
	46	DECLARE_READ8_DEVICE_HANDLER( simpsons_sound_r );
47	47
48	48
49	49

trunk/src/mame/includes/polepos.h

r17961	r17962
109	109	extern const device_type POLEPOS;
110	110
111	111
112		WRITE8_DEVICE_HANDLER( polepos_engine_sound_lsb_w );
113		WRITE8_DEVICE_HANDLER( polepos_engine_sound_msb_w );
	112	DECLARE_WRITE8_DEVICE_HANDLER( polepos_engine_sound_lsb_w );
	113	DECLARE_WRITE8_DEVICE_HANDLER( polepos_engine_sound_msb_w );
114	114
115	115	DISCRETE_SOUND_EXTERN( polepos );
116	116

trunk/src/mame/includes/mw8080bw.h

r17961	r17962
199	199
200	200	/*----------- defined in audio/mw8080bw.c -----------*/
201	201
202		WRITE8_DEVICE_HANDLER( midway_tone_generator_lo_w );
203		WRITE8_DEVICE_HANDLER( midway_tone_generator_hi_w );
	202	DECLARE_WRITE8_DEVICE_HANDLER( midway_tone_generator_lo_w );
	203	DECLARE_WRITE8_DEVICE_HANDLER( midway_tone_generator_hi_w );
204	204
205	205	MACHINE_CONFIG_EXTERN( seawolf_audio );
206	206
207	207	MACHINE_CONFIG_EXTERN( gunfight_audio );
208	208
209	209	MACHINE_CONFIG_EXTERN( tornbase_audio );
210		WRITE8_DEVICE_HANDLER( tornbase_audio_w );
	210	DECLARE_WRITE8_DEVICE_HANDLER( tornbase_audio_w );
211	211
212	212	MACHINE_CONFIG_EXTERN( zzzap_audio );
213	213
r17961	r17962
215	215	void maze_write_discrete(device_t *device, UINT8 maze_tone_timing_state);
216	216
217	217	MACHINE_CONFIG_EXTERN( boothill_audio );
218		WRITE8_DEVICE_HANDLER( boothill_audio_w );
	218	DECLARE_WRITE8_DEVICE_HANDLER( boothill_audio_w );
219	219
220	220	MACHINE_CONFIG_EXTERN( checkmat_audio );
221		WRITE8_DEVICE_HANDLER( checkmat_audio_w );
	221	DECLARE_WRITE8_DEVICE_HANDLER( checkmat_audio_w );
222	222
223	223	MACHINE_CONFIG_EXTERN( desertgu_audio );
224		WRITE8_DEVICE_HANDLER( desertgu_audio_1_w );
225		WRITE8_DEVICE_HANDLER( desertgu_audio_2_w );
	224	DECLARE_WRITE8_DEVICE_HANDLER( desertgu_audio_1_w );
	225	DECLARE_WRITE8_DEVICE_HANDLER( desertgu_audio_2_w );
226	226
227	227	MACHINE_CONFIG_EXTERN( dplay_audio );
228		WRITE8_DEVICE_HANDLER( dplay_audio_w );
	228	DECLARE_WRITE8_DEVICE_HANDLER( dplay_audio_w );
229	229
230	230	MACHINE_CONFIG_EXTERN( gmissile_audio );
231	231
232	232	MACHINE_CONFIG_EXTERN( m4_audio );
233	233
234	234	MACHINE_CONFIG_EXTERN( clowns_audio );
235		WRITE8_DEVICE_HANDLER( clowns_audio_2_w );
	235	DECLARE_WRITE8_DEVICE_HANDLER( clowns_audio_2_w );
236	236
237	237	MACHINE_CONFIG_EXTERN( spacwalk_audio );
238		WRITE8_DEVICE_HANDLER( spacwalk_audio_1_w );
239		WRITE8_DEVICE_HANDLER( spacwalk_audio_2_w );
	238	DECLARE_WRITE8_DEVICE_HANDLER( spacwalk_audio_1_w );
	239	DECLARE_WRITE8_DEVICE_HANDLER( spacwalk_audio_2_w );
240	240
241	241	MACHINE_CONFIG_EXTERN( shuffle_audio );
242		WRITE8_DEVICE_HANDLER( shuffle_audio_1_w );
243		WRITE8_DEVICE_HANDLER( shuffle_audio_2_w );
	242	DECLARE_WRITE8_DEVICE_HANDLER( shuffle_audio_1_w );
	243	DECLARE_WRITE8_DEVICE_HANDLER( shuffle_audio_2_w );
244	244
245	245	MACHINE_CONFIG_EXTERN( dogpatch_audio );
246		WRITE8_DEVICE_HANDLER( dogpatch_audio_w );
	246	DECLARE_WRITE8_DEVICE_HANDLER( dogpatch_audio_w );
247	247
248	248	MACHINE_CONFIG_EXTERN( spcenctr_audio );
249		WRITE8_DEVICE_HANDLER( spcenctr_audio_1_w );
250		WRITE8_DEVICE_HANDLER( spcenctr_audio_2_w );
251		WRITE8_DEVICE_HANDLER( spcenctr_audio_3_w );
	249	DECLARE_WRITE8_DEVICE_HANDLER( spcenctr_audio_1_w );
	250	DECLARE_WRITE8_DEVICE_HANDLER( spcenctr_audio_2_w );
	251	DECLARE_WRITE8_DEVICE_HANDLER( spcenctr_audio_3_w );
252	252
253	253	MACHINE_CONFIG_EXTERN( phantom2_audio );
254	254
255	255	MACHINE_CONFIG_EXTERN( bowler_audio );
256		WRITE8_DEVICE_HANDLER( bowler_audio_1_w );
	256	DECLARE_WRITE8_DEVICE_HANDLER( bowler_audio_1_w );
257	257
258	258	MACHINE_CONFIG_EXTERN( invaders_samples_audio );
259	259	MACHINE_CONFIG_EXTERN( invaders_audio );
260		WRITE8_DEVICE_HANDLER( invaders_audio_1_w );
261		WRITE8_DEVICE_HANDLER( invaders_audio_2_w );
	260	DECLARE_WRITE8_DEVICE_HANDLER( invaders_audio_1_w );
	261	DECLARE_WRITE8_DEVICE_HANDLER( invaders_audio_2_w );
262	262
263	263	MACHINE_CONFIG_EXTERN( blueshrk_audio );
264		WRITE8_DEVICE_HANDLER( blueshrk_audio_w );
	264	DECLARE_WRITE8_DEVICE_HANDLER( blueshrk_audio_w );
265	265
266	266	MACHINE_CONFIG_EXTERN( invad2ct_audio );
267		WRITE8_DEVICE_HANDLER( invad2ct_audio_1_w );
268		WRITE8_DEVICE_HANDLER( invad2ct_audio_2_w );
269		WRITE8_DEVICE_HANDLER( invad2ct_audio_3_w );
270		WRITE8_DEVICE_HANDLER( invad2ct_audio_4_w );
	267	DECLARE_WRITE8_DEVICE_HANDLER( invad2ct_audio_1_w );
	268	DECLARE_WRITE8_DEVICE_HANDLER( invad2ct_audio_2_w );
	269	DECLARE_WRITE8_DEVICE_HANDLER( invad2ct_audio_3_w );
	270	DECLARE_WRITE8_DEVICE_HANDLER( invad2ct_audio_4_w );
271	271
272	272	/*----------- defined in video/mw8080bw.c -----------*/
273	273

trunk/src/mame/includes/suna8.h

r17961	r17962
108	108
109	109	/*----------- defined in audio/suna8.c -----------*/
110	110
111		WRITE8_DEVICE_HANDLER( suna8_play_samples_w );
112		WRITE8_DEVICE_HANDLER( rranger_play_samples_w );
113		WRITE8_DEVICE_HANDLER( suna8_samples_number_w );
	111	DECLARE_WRITE8_DEVICE_HANDLER( suna8_play_samples_w );
	112	DECLARE_WRITE8_DEVICE_HANDLER( rranger_play_samples_w );
	113	DECLARE_WRITE8_DEVICE_HANDLER( suna8_samples_number_w );
114	114	SAMPLES_START( suna8_sh_start );
115	115
116	116

trunk/src/mame/includes/avalnche.h

r17961	r17962
30	30	/*----------- defined in audio/avalnche.c -----------*/
31	31
32	32	DISCRETE_SOUND_EXTERN( avalnche );
33		WRITE8_DEVICE_HANDLER( avalnche_noise_amplitude_w );
34		WRITE8_DEVICE_HANDLER( avalnche_attract_enable_w );
35		WRITE8_DEVICE_HANDLER( avalnche_audio_w );
	33	DECLARE_WRITE8_DEVICE_HANDLER( avalnche_noise_amplitude_w );
	34	DECLARE_WRITE8_DEVICE_HANDLER( avalnche_attract_enable_w );
	35	DECLARE_WRITE8_DEVICE_HANDLER( avalnche_audio_w );
36	36
37	37	WRITE8_HANDLER( catch_audio_w );

trunk/src/mame/includes/leland.h

r17961	r17962
177	177	void leland_init_eeprom(running_machine &machine, UINT8 default_val, const UINT16 *data, UINT8 serial_offset, UINT8 serial_type);
178	178	void ataxx_init_eeprom(running_machine &machine, const UINT16 *data);
179	179
180		READ8_DEVICE_HANDLER( ataxx_eeprom_r );
181		WRITE8_DEVICE_HANDLER( ataxx_eeprom_w );
	180	DECLARE_READ8_DEVICE_HANDLER( ataxx_eeprom_r );
	181	DECLARE_WRITE8_DEVICE_HANDLER( ataxx_eeprom_w );
182	182
183	183
184	184
185	185
186	186
187		READ8_DEVICE_HANDLER( leland_sound_port_r );
188		WRITE8_DEVICE_HANDLER( leland_sound_port_w );
	187	DECLARE_READ8_DEVICE_HANDLER( leland_sound_port_r );
	188	DECLARE_WRITE8_DEVICE_HANDLER( leland_sound_port_w );
189	189
190	190
191	191
r17961	r17962
257	257
258	258	void leland_dac_update(device_t *device, int dacnum, UINT8 sample);
259	259
260		READ8_DEVICE_HANDLER( leland_80186_response_r );
	260	DECLARE_READ8_DEVICE_HANDLER( leland_80186_response_r );
261	261
262		WRITE8_DEVICE_HANDLER( leland_80186_control_w );
263		WRITE8_DEVICE_HANDLER( leland_80186_command_lo_w );
264		WRITE8_DEVICE_HANDLER( leland_80186_command_hi_w );
265		WRITE8_DEVICE_HANDLER( ataxx_80186_control_w );
	262	DECLARE_WRITE8_DEVICE_HANDLER( leland_80186_control_w );
	263	DECLARE_WRITE8_DEVICE_HANDLER( leland_80186_command_lo_w );
	264	DECLARE_WRITE8_DEVICE_HANDLER( leland_80186_command_hi_w );
	265	DECLARE_WRITE8_DEVICE_HANDLER( ataxx_80186_control_w );
266	266
267	267	ADDRESS_MAP_EXTERN(leland_80186_map_program, 16);
268	268	ADDRESS_MAP_EXTERN(leland_80186_map_io, 16);
r17961	r17962
272	272
273	273	/*----------- defined in video/leland.c -----------*/
274	274
275		WRITE8_DEVICE_HANDLER( leland_gfx_port_w );
	275	DECLARE_WRITE8_DEVICE_HANDLER( leland_gfx_port_w );
276	276
277	277
278	278

trunk/src/mame/includes/blockade.h

r17961	r17962
40	40	extern const samples_interface blockade_samples_interface;
41	41	DISCRETE_SOUND_EXTERN( blockade );
42	42
43		WRITE8_DEVICE_HANDLER( blockade_sound_freq_w );
	43	DECLARE_WRITE8_DEVICE_HANDLER( blockade_sound_freq_w );

trunk/src/mame/includes/tiamc1.h

r17961	r17962
62	62	extern const device_type TIAMC1;
63	63
64	64
65		WRITE8_DEVICE_HANDLER( tiamc1_timer0_w );
66		WRITE8_DEVICE_HANDLER( tiamc1_timer1_w );
67		WRITE8_DEVICE_HANDLER( tiamc1_timer1_gate_w );
	65	DECLARE_WRITE8_DEVICE_HANDLER( tiamc1_timer0_w );
	66	DECLARE_WRITE8_DEVICE_HANDLER( tiamc1_timer1_w );
	67	DECLARE_WRITE8_DEVICE_HANDLER( tiamc1_timer1_gate_w );
68	68
69	69
70	70	/*----------- defined in video/tiamc1.c -----------*/

trunk/src/mame/includes/dc.h

r17961	r17962
115	115	WRITE64_HANDLER( dc_modem_w );
116	116	READ64_HANDLER( dc_rtc_r );
117	117	WRITE64_HANDLER( dc_rtc_w );
118		READ64_DEVICE_HANDLER( dc_aica_reg_r );
119		WRITE64_DEVICE_HANDLER( dc_aica_reg_w );
	118	DECLARE_READ64_DEVICE_HANDLER( dc_aica_reg_r );
	119	DECLARE_WRITE64_DEVICE_HANDLER( dc_aica_reg_w );
120	120
121		READ32_DEVICE_HANDLER( dc_arm_aica_r );
122		WRITE32_DEVICE_HANDLER( dc_arm_aica_w );
	121	DECLARE_READ32_DEVICE_HANDLER( dc_arm_aica_r );
	122	DECLARE_WRITE32_DEVICE_HANDLER( dc_arm_aica_w );
123	123
124	124
125	125

trunk/src/mame/includes/scramble.h

r17961	r17962
72	72	READ8_HANDLER( hunchbks_mirror_r );
73	73	WRITE8_HANDLER( hunchbks_mirror_w );
74	74
75		READ8_DEVICE_HANDLER( scramble_protection_r );
76		WRITE8_DEVICE_HANDLER( scramble_protection_w );
	75	DECLARE_READ8_DEVICE_HANDLER( scramble_protection_r );
	76	DECLARE_WRITE8_DEVICE_HANDLER( scramble_protection_w );
77	77
78	78
79	79	/*----------- defined in audio/scramble.c -----------*/
r17961	r17962
82	82	WRITE_LINE_DEVICE_HANDLER( scramble_sh_7474_q_callback );
83	83
84	84
85		READ8_DEVICE_HANDLER( scramble_portB_r );
86		READ8_DEVICE_HANDLER( frogger_portB_r );
	85	DECLARE_READ8_DEVICE_HANDLER( scramble_portB_r );
	86	DECLARE_READ8_DEVICE_HANDLER( frogger_portB_r );
87	87
88		READ8_DEVICE_HANDLER( hotshock_soundlatch_r );
	88	DECLARE_READ8_DEVICE_HANDLER( hotshock_soundlatch_r );
89	89
90		WRITE8_DEVICE_HANDLER( scramble_sh_irqtrigger_w );
91		WRITE8_DEVICE_HANDLER( mrkougar_sh_irqtrigger_w );
	90	DECLARE_WRITE8_DEVICE_HANDLER( scramble_sh_irqtrigger_w );
	91	DECLARE_WRITE8_DEVICE_HANDLER( mrkougar_sh_irqtrigger_w );
92	92
93	93	MACHINE_CONFIG_EXTERN( ad2083_audio );
94	94

trunk/src/mame/includes/qix.h

r17961	r17962
105	105
106	106
107	107
108		WRITE8_DEVICE_HANDLER( qix_pia_w );
	108	DECLARE_WRITE8_DEVICE_HANDLER( qix_pia_w );
109	109
110	110	WRITE_LINE_DEVICE_HANDLER( qix_vsync_changed );
111	111
r17961	r17962
116	116	MACHINE_CONFIG_EXTERN( zookeep_video );
117	117	MACHINE_CONFIG_EXTERN( slither_video );
118	118
119		WRITE8_DEVICE_HANDLER( qix_flip_screen_w );
	119	DECLARE_WRITE8_DEVICE_HANDLER( qix_flip_screen_w );
120	120
121	121
122	122	/*----------- defined in audio/qix.c -----------*/

trunk/src/mame/includes/cps3.h

r17961	r17962
134	134	extern const device_type CPS3;
135	135
136	136
137		WRITE32_DEVICE_HANDLER( cps3_sound_w );
138		READ32_DEVICE_HANDLER( cps3_sound_r );
	137	DECLARE_WRITE32_DEVICE_HANDLER( cps3_sound_w );
	138	DECLARE_READ32_DEVICE_HANDLER( cps3_sound_r );

trunk/src/mame/includes/spiders.h

r17961	r17962
34	34
35	35	/*----------- defined in audio/spiders.c -----------*/
36	36
37		WRITE8_DEVICE_HANDLER( spiders_audio_command_w );
38		WRITE8_DEVICE_HANDLER( spiders_audio_a_w );
39		WRITE8_DEVICE_HANDLER( spiders_audio_b_w );
40		WRITE8_DEVICE_HANDLER( spiders_audio_ctrl_w );
	37	DECLARE_WRITE8_DEVICE_HANDLER( spiders_audio_command_w );
	38	DECLARE_WRITE8_DEVICE_HANDLER( spiders_audio_a_w );
	39	DECLARE_WRITE8_DEVICE_HANDLER( spiders_audio_b_w );
	40	DECLARE_WRITE8_DEVICE_HANDLER( spiders_audio_ctrl_w );
41	41
42	42	MACHINE_CONFIG_EXTERN( spiders_audio );

trunk/src/mame/includes/crbaloon.h

r17961	r17962
41	41
42	42	/*----------- defined in audio/crbaloon.c -----------*/
43	43
44		WRITE8_DEVICE_HANDLER( crbaloon_audio_set_music_freq );
45		WRITE8_DEVICE_HANDLER( crbaloon_audio_set_music_enable );
	44	DECLARE_WRITE8_DEVICE_HANDLER( crbaloon_audio_set_music_freq );
	45	DECLARE_WRITE8_DEVICE_HANDLER( crbaloon_audio_set_music_enable );
46	46	void crbaloon_audio_set_explosion_enable(device_t *sn, int enabled);
47	47	void crbaloon_audio_set_breath_enable(device_t *sn, int enabled);
48	48	void crbaloon_audio_set_appear_enable(device_t *sn, int enabled);
49		WRITE8_DEVICE_HANDLER( crbaloon_audio_set_laugh_enable );
	49	DECLARE_WRITE8_DEVICE_HANDLER( crbaloon_audio_set_laugh_enable );
50	50
51	51	MACHINE_CONFIG_EXTERN( crbaloon_audio );
52	52

trunk/src/mame/includes/sprint8.h

r17961	r17962
56	56
57	57	DISCRETE_SOUND_EXTERN( sprint8 );
58	58
59		WRITE8_DEVICE_HANDLER( sprint8_crash_w );
60		WRITE8_DEVICE_HANDLER( sprint8_screech_w );
61		WRITE8_DEVICE_HANDLER( sprint8_attract_w );
62		WRITE8_DEVICE_HANDLER( sprint8_motor_w );
	59	DECLARE_WRITE8_DEVICE_HANDLER( sprint8_crash_w );
	60	DECLARE_WRITE8_DEVICE_HANDLER( sprint8_screech_w );
	61	DECLARE_WRITE8_DEVICE_HANDLER( sprint8_attract_w );
	62	DECLARE_WRITE8_DEVICE_HANDLER( sprint8_motor_w );

trunk/src/mame/includes/hanaawas.h

r17961	r17962
35	35
36	36	/*----------- defined in video/hanaawas.c -----------*/
37	37
38		WRITE8_DEVICE_HANDLER( hanaawas_portB_w );
	38	DECLARE_WRITE8_DEVICE_HANDLER( hanaawas_portB_w );
39	39
40	40
41	41

trunk/src/mame/includes/warpwarp.h

r17961	r17962
62	62
63	63	/*----------- defined in audio/geebee.c -----------*/
64	64
65		WRITE8_DEVICE_HANDLER( geebee_sound_w );
	65	DECLARE_WRITE8_DEVICE_HANDLER( geebee_sound_w );
66	66
67	67	class geebee_sound_device : public device_t,
68	68	public device_sound_interface
r17961	r17962
91	91
92	92	/*----------- defined in audio/warpwarp.c -----------*/
93	93
94		WRITE8_DEVICE_HANDLER( warpwarp_sound_w );
95		WRITE8_DEVICE_HANDLER( warpwarp_music1_w );
96		WRITE8_DEVICE_HANDLER( warpwarp_music2_w );
	94	DECLARE_WRITE8_DEVICE_HANDLER( warpwarp_sound_w );
	95	DECLARE_WRITE8_DEVICE_HANDLER( warpwarp_music1_w );
	96	DECLARE_WRITE8_DEVICE_HANDLER( warpwarp_music2_w );
97	97
98	98	class warpwarp_sound_device : public device_t,
99	99	public device_sound_interface

trunk/src/mame/includes/turbo.h

r17961	r17962
137	137	MACHINE_CONFIG_EXTERN( subroc3d_samples );
138	138	MACHINE_CONFIG_EXTERN( buckrog_samples );
139	139
140		WRITE8_DEVICE_HANDLER( turbo_sound_a_w );
141		WRITE8_DEVICE_HANDLER( turbo_sound_b_w );
142		WRITE8_DEVICE_HANDLER( turbo_sound_c_w );
	140	DECLARE_WRITE8_DEVICE_HANDLER( turbo_sound_a_w );
	141	DECLARE_WRITE8_DEVICE_HANDLER( turbo_sound_b_w );
	142	DECLARE_WRITE8_DEVICE_HANDLER( turbo_sound_c_w );
143	143
144		WRITE8_DEVICE_HANDLER( subroc3d_sound_a_w );
145		WRITE8_DEVICE_HANDLER( subroc3d_sound_b_w );
146		WRITE8_DEVICE_HANDLER( subroc3d_sound_c_w );
	144	DECLARE_WRITE8_DEVICE_HANDLER( subroc3d_sound_a_w );
	145	DECLARE_WRITE8_DEVICE_HANDLER( subroc3d_sound_b_w );
	146	DECLARE_WRITE8_DEVICE_HANDLER( subroc3d_sound_c_w );
147	147
148		WRITE8_DEVICE_HANDLER( buckrog_sound_a_w );
149		WRITE8_DEVICE_HANDLER( buckrog_sound_b_w );
	148	DECLARE_WRITE8_DEVICE_HANDLER( buckrog_sound_a_w );
	149	DECLARE_WRITE8_DEVICE_HANDLER( buckrog_sound_b_w );
150	150
151	151
152	152	/*----------- defined in video/turbo.c -----------*/

trunk/src/mame/includes/asteroid.h

r17961	r17962
48	48	DISCRETE_SOUND_EXTERN( asteroid );
49	49	DISCRETE_SOUND_EXTERN( astdelux );
50	50
51		WRITE8_DEVICE_HANDLER( asteroid_explode_w );
52		WRITE8_DEVICE_HANDLER( asteroid_thump_w );
53		WRITE8_DEVICE_HANDLER( asteroid_sounds_w );
54		WRITE8_DEVICE_HANDLER( asteroid_noise_reset_w );
55		WRITE8_DEVICE_HANDLER( astdelux_sounds_w );
	51	DECLARE_WRITE8_DEVICE_HANDLER( asteroid_explode_w );
	52	DECLARE_WRITE8_DEVICE_HANDLER( asteroid_thump_w );
	53	DECLARE_WRITE8_DEVICE_HANDLER( asteroid_sounds_w );
	54	DECLARE_WRITE8_DEVICE_HANDLER( asteroid_noise_reset_w );
	55	DECLARE_WRITE8_DEVICE_HANDLER( astdelux_sounds_w );
56	56
57	57
58	58	/*----------- defined in audio/llander.c -----------*/
59	59
60	60	DISCRETE_SOUND_EXTERN( llander );
61	61
62		WRITE8_DEVICE_HANDLER( llander_snd_reset_w );
63		WRITE8_DEVICE_HANDLER( llander_sounds_w );
	62	DECLARE_WRITE8_DEVICE_HANDLER( llander_snd_reset_w );
	63	DECLARE_WRITE8_DEVICE_HANDLER( llander_sounds_w );

trunk/src/mame/includes/poolshrk.h

r17961	r17962
36	36
37	37	/*----------- defined in audio/poolshrk.c -----------*/
38	38
39		WRITE8_DEVICE_HANDLER( poolshrk_scratch_sound_w );
40		WRITE8_DEVICE_HANDLER( poolshrk_score_sound_w );
41		WRITE8_DEVICE_HANDLER( poolshrk_click_sound_w );
42		WRITE8_DEVICE_HANDLER( poolshrk_bump_sound_w );
	39	DECLARE_WRITE8_DEVICE_HANDLER( poolshrk_scratch_sound_w );
	40	DECLARE_WRITE8_DEVICE_HANDLER( poolshrk_score_sound_w );
	41	DECLARE_WRITE8_DEVICE_HANDLER( poolshrk_click_sound_w );
	42	DECLARE_WRITE8_DEVICE_HANDLER( poolshrk_bump_sound_w );
43	43
44	44	DISCRETE_SOUND_EXTERN( poolshrk );
45	45

trunk/src/mame/includes/gridlee.h

r17961	r17962
60	60
61	61	/*----------- defined in audio/gridlee.c -----------*/
62	62
63		WRITE8_DEVICE_HANDLER( gridlee_sound_w );
	63	DECLARE_WRITE8_DEVICE_HANDLER( gridlee_sound_w );
64	64
65	65	class gridlee_sound_device : public device_t,
66	66	public device_sound_interface

trunk/src/mame/includes/flower.h

r17961	r17962
45	45
46	46	/*----------- defined in audio/flower.c -----------*/
47	47
48		WRITE8_DEVICE_HANDLER( flower_sound1_w );
49		WRITE8_DEVICE_HANDLER( flower_sound2_w );
	48	DECLARE_WRITE8_DEVICE_HANDLER( flower_sound1_w );
	49	DECLARE_WRITE8_DEVICE_HANDLER( flower_sound2_w );
50	50
51	51	class flower_sound_device : public device_t,
52	52	public device_sound_interface

trunk/src/mame/includes/8080bw.h

r17961	r17962
83	83
84	84	extern const samples_interface lrescue_samples_interface;
85	85
86		WRITE8_DEVICE_HANDLER( indianbt_sh_port_3_w );
	86	DECLARE_WRITE8_DEVICE_HANDLER( indianbt_sh_port_3_w );
87	87	DISCRETE_SOUND_EXTERN( indianbt );
88	88
89		WRITE8_DEVICE_HANDLER( polaris_sh_port_1_w );
90		WRITE8_DEVICE_HANDLER( polaris_sh_port_2_w );
91		WRITE8_DEVICE_HANDLER( polaris_sh_port_3_w );
	89	DECLARE_WRITE8_DEVICE_HANDLER( polaris_sh_port_1_w );
	90	DECLARE_WRITE8_DEVICE_HANDLER( polaris_sh_port_2_w );
	91	DECLARE_WRITE8_DEVICE_HANDLER( polaris_sh_port_3_w );
92	92	DISCRETE_SOUND_EXTERN( polaris );
93	93
94	94

trunk/src/mame/includes/m79amb.h

r17961	r17962
5	5
6	6	DISCRETE_SOUND_EXTERN( m79amb );
7	7
8		WRITE8_DEVICE_HANDLER( m79amb_8000_w );
9		WRITE8_DEVICE_HANDLER( m79amb_8003_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( m79amb_8000_w );
	9	DECLARE_WRITE8_DEVICE_HANDLER( m79amb_8003_w );

trunk/src/mame/includes/canyon.h

r17961	r17962
41	41
42	42	/*----------- defined in audio/canyon.c -----------*/
43	43
44		WRITE8_DEVICE_HANDLER( canyon_motor_w );
45		WRITE8_DEVICE_HANDLER( canyon_explode_w );
46		WRITE8_DEVICE_HANDLER( canyon_attract_w );
47		WRITE8_DEVICE_HANDLER( canyon_whistle_w );
	44	DECLARE_WRITE8_DEVICE_HANDLER( canyon_motor_w );
	45	DECLARE_WRITE8_DEVICE_HANDLER( canyon_explode_w );
	46	DECLARE_WRITE8_DEVICE_HANDLER( canyon_attract_w );
	47	DECLARE_WRITE8_DEVICE_HANDLER( canyon_whistle_w );
48	48
49	49	DISCRETE_SOUND_EXTERN( canyon );
50	50

trunk/src/mame/includes/tx1.h

r17961	r17962
178	178
179	179
180	180	/*----------- defined in audio/tx1.c -----------*/
181		READ8_DEVICE_HANDLER( tx1_pit8253_r );
182		WRITE8_DEVICE_HANDLER( tx1_pit8253_w );
	181	DECLARE_READ8_DEVICE_HANDLER( tx1_pit8253_r );
	182	DECLARE_WRITE8_DEVICE_HANDLER( tx1_pit8253_w );
183	183
184		WRITE8_DEVICE_HANDLER( bb_ym1_a_w );
185		WRITE8_DEVICE_HANDLER( bb_ym2_a_w );
186		WRITE8_DEVICE_HANDLER( bb_ym2_b_w );
	184	DECLARE_WRITE8_DEVICE_HANDLER( bb_ym1_a_w );
	185	DECLARE_WRITE8_DEVICE_HANDLER( bb_ym2_a_w );
	186	DECLARE_WRITE8_DEVICE_HANDLER( bb_ym2_b_w );
187	187
188	188
189		WRITE8_DEVICE_HANDLER( tx1_ay8910_a_w );
190		WRITE8_DEVICE_HANDLER( tx1_ay8910_b_w );
	189	DECLARE_WRITE8_DEVICE_HANDLER( tx1_ay8910_a_w );
	190	DECLARE_WRITE8_DEVICE_HANDLER( tx1_ay8910_b_w );
191	191
192	192	class tx1_sound_device : public device_t,
193	193	public device_sound_interface

trunk/src/mame/includes/tatsumi.h

r17961	r17962
126	126	/*----------- defined in machine/tatsumi.c -----------*/
127	127
128	128
129		READ8_DEVICE_HANDLER(tatsumi_hack_ym2151_r);
130		READ8_DEVICE_HANDLER(tatsumi_hack_oki_r);
	129	DECLARE_READ8_DEVICE_HANDLER(tatsumi_hack_ym2151_r);
	130	DECLARE_READ8_DEVICE_HANDLER(tatsumi_hack_oki_r);
131	131
132	132
133	133	void tatsumi_reset(running_machine &machine);

trunk/src/mame/includes/harddriv.h

r17961	r17962
349	349
350	350
351	351
352		WRITE16_DEVICE_HANDLER( hdsnddsp_dac_w );
	352	DECLARE_WRITE16_DEVICE_HANDLER( hdsnddsp_dac_w );
353	353
354	354
355	355

trunk/src/mame/includes/mario.h

r17961	r17962
93	93
94	94	/*----------- defined in audio/mario.c -----------*/
95	95
96		WRITE8_DEVICE_HANDLER( mario_sh1_w );
97		WRITE8_DEVICE_HANDLER( mario_sh2_w );
	96	DECLARE_WRITE8_DEVICE_HANDLER( mario_sh1_w );
	97	DECLARE_WRITE8_DEVICE_HANDLER( mario_sh2_w );
98	98
99	99
100	100	MACHINE_CONFIG_EXTERN( mario_audio );

trunk/src/mame/includes/cd32.h

r17961	r17962
43	43
44	44	/*----------- defined in machine/cd32.c -----------*/
45	45
46		READ32_DEVICE_HANDLER( amiga_akiko32_r );
47		WRITE32_DEVICE_HANDLER( amiga_akiko32_w );
	46	DECLARE_READ32_DEVICE_HANDLER( amiga_akiko32_r );
	47	DECLARE_WRITE32_DEVICE_HANDLER( amiga_akiko32_w );
48	48
49	49	class akiko_device : public device_t
50	50	{

trunk/src/mame/includes/micro3d.h

r17961	r17962
134	134
135	135	/*----------- defined in audio/micro3d.c -----------*/
136	136
137		WRITE8_DEVICE_HANDLER( micro3d_upd7759_w );
	137	DECLARE_WRITE8_DEVICE_HANDLER( micro3d_upd7759_w );
138	138
139	139	void micro3d_noise_sh_w(running_machine &machine, UINT8 data);
140	140

trunk/src/mame/includes/phoenix.h

r17961	r17962
55	55
56	56	DISCRETE_SOUND_EXTERN( phoenix );
57	57
58		WRITE8_DEVICE_HANDLER( phoenix_sound_control_a_w );
59		WRITE8_DEVICE_HANDLER( phoenix_sound_control_b_w );
	58	DECLARE_WRITE8_DEVICE_HANDLER( phoenix_sound_control_a_w );
	59	DECLARE_WRITE8_DEVICE_HANDLER( phoenix_sound_control_b_w );
60	60
61	61	class phoenix_sound_device : public device_t,
62	62	public device_sound_interface
r17961	r17962
92	92	SCREEN_UPDATE_IND16( phoenix );
93	93
94	94
95		READ8_DEVICE_HANDLER( survival_protection_r );
	95	DECLARE_READ8_DEVICE_HANDLER( survival_protection_r );
96	96
97	97	READ_LINE_DEVICE_HANDLER( survival_sid_callback );
98	98

trunk/src/mame/includes/atari.h

r17961	r17962
20	20	extern const pia6821_interface atarixl_pia_interface;
21	21
22	22	/* These handlers are needed by MESS Atari 8bit drivers (for their custom pia_interface) */
23		READ8_DEVICE_HANDLER(atari_pia_pa_r);
24		READ8_DEVICE_HANDLER(atari_pia_pb_r);
25		WRITE8_DEVICE_HANDLER(a600xl_pia_pb_w);
	23	DECLARE_READ8_DEVICE_HANDLER(atari_pia_pa_r);
	24	DECLARE_READ8_DEVICE_HANDLER(atari_pia_pb_r);
	25	DECLARE_WRITE8_DEVICE_HANDLER(a600xl_pia_pb_w);
26	26	WRITE_LINE_DEVICE_HANDLER(atari_pia_cb2_w);
27	27
28	28

trunk/src/mame/includes/gomoku.h

r17961	r17962
30	30
31	31	/*----------- defined in audio/gomoku.c -----------*/
32	32
33		WRITE8_DEVICE_HANDLER( gomoku_sound1_w );
34		WRITE8_DEVICE_HANDLER( gomoku_sound2_w );
	33	DECLARE_WRITE8_DEVICE_HANDLER( gomoku_sound1_w );
	34	DECLARE_WRITE8_DEVICE_HANDLER( gomoku_sound2_w );
35	35
36	36	class gomoku_sound_device : public device_t,
37	37	public device_sound_interface

trunk/src/mame/includes/firetrk.h

r17961	r17962
106	106
107	107	/*----------- defined in audio/firetrk.c -----------*/
108	108
109		WRITE8_DEVICE_HANDLER( firetrk_skid_reset_w );
110		WRITE8_DEVICE_HANDLER( montecar_skid_reset_w );
111		WRITE8_DEVICE_HANDLER( firetrk_crash_snd_w );
112		WRITE8_DEVICE_HANDLER( firetrk_skid_snd_w );
113		WRITE8_DEVICE_HANDLER( firetrk_motor_snd_w );
114		WRITE8_DEVICE_HANDLER( superbug_motor_snd_w );
115		WRITE8_DEVICE_HANDLER( firetrk_xtndply_w );
	109	DECLARE_WRITE8_DEVICE_HANDLER( firetrk_skid_reset_w );
	110	DECLARE_WRITE8_DEVICE_HANDLER( montecar_skid_reset_w );
	111	DECLARE_WRITE8_DEVICE_HANDLER( firetrk_crash_snd_w );
	112	DECLARE_WRITE8_DEVICE_HANDLER( firetrk_skid_snd_w );
	113	DECLARE_WRITE8_DEVICE_HANDLER( firetrk_motor_snd_w );
	114	DECLARE_WRITE8_DEVICE_HANDLER( superbug_motor_snd_w );
	115	DECLARE_WRITE8_DEVICE_HANDLER( firetrk_xtndply_w );
116	116
117	117	DISCRETE_SOUND_EXTERN( firetrk );
118	118	DISCRETE_SOUND_EXTERN( superbug );

trunk/src/mame/includes/segas16a.h

r17961	r17962
91	91	DECLARE_WRITE8_MEMBER( n7751_command_w );
92	92	DECLARE_WRITE8_MEMBER( n7751_control_w );
93	93	DECLARE_WRITE8_MEMBER( n7751_rom_offset_w );
94		static WRITE8_DEVICE_HANDLER( static_n7751_rom_offset_w );
	94	static DECLARE_WRITE8_DEVICE_HANDLER( static_n7751_rom_offset_w );
95	95
96	96	// N7751 sound generator CPU read/write handlers
97	97	DECLARE_READ8_MEMBER( n7751_rom_r );

trunk/src/mame/includes/vectrex.h

r17961	r17962
79	79
80	80	TIMER_CALLBACK(vectrex_imager_eye);
81	81	void vectrex_configuration(running_machine &machine);
82		READ8_DEVICE_HANDLER (vectrex_via_pa_r);
83		READ8_DEVICE_HANDLER(vectrex_via_pb_r );
	82	DECLARE_READ8_DEVICE_HANDLER (vectrex_via_pa_r);
	83	DECLARE_READ8_DEVICE_HANDLER(vectrex_via_pb_r );
84	84	void vectrex_via_irq (device_t *device, int level);
85	85
86	86
87	87	/* for spectrum 1+ */
88		READ8_DEVICE_HANDLER( vectrex_s1_via_pb_r );
	88	DECLARE_READ8_DEVICE_HANDLER( vectrex_s1_via_pb_r );
89	89
90	90
91	91	/*----------- defined in video/vectrex.c -----------*/

trunk/src/mame/includes/n64.h

r17961	r17962
280	280	extern void dp_full_sync(running_machine &machine);
281	281	extern void signal_rcp_interrupt(running_machine &machine, int interrupt);
282	282
283		extern READ32_DEVICE_HANDLER( n64_sp_reg_r );
284		extern WRITE32_DEVICE_HANDLER( n64_sp_reg_w );
285		extern READ32_DEVICE_HANDLER( n64_dp_reg_r );
286		extern WRITE32_DEVICE_HANDLER( n64_dp_reg_w );
	283	extern DECLARE_READ32_DEVICE_HANDLER( n64_sp_reg_r );
	284	extern DECLARE_WRITE32_DEVICE_HANDLER( n64_sp_reg_w );
	285	extern DECLARE_READ32_DEVICE_HANDLER( n64_dp_reg_r );
	286	extern DECLARE_WRITE32_DEVICE_HANDLER( n64_dp_reg_w );
287	287
288	288
289	289

trunk/src/mame/includes/stfight.h

r17961	r17962
53	53
54	54	INTERRUPT_GEN( stfight_vb_interrupt );
55	55	void stfight_adpcm_int(device_t *device);
56		WRITE8_DEVICE_HANDLER( stfight_adpcm_control_w );
	56	DECLARE_WRITE8_DEVICE_HANDLER( stfight_adpcm_control_w );
57	57
58	58
59	59	/*----------- defined in video/stfight.c -----------*/

trunk/src/mame/includes/xxmissio.h

r17961	r17962
36	36
37	37	SCREEN_UPDATE_IND16( xxmissio );
38	38
39		WRITE8_DEVICE_HANDLER( xxmissio_scroll_x_w );
40		WRITE8_DEVICE_HANDLER( xxmissio_scroll_y_w );
	39	DECLARE_WRITE8_DEVICE_HANDLER( xxmissio_scroll_x_w );
	40	DECLARE_WRITE8_DEVICE_HANDLER( xxmissio_scroll_y_w );
41	41
42	42

trunk/src/mame/includes/gaelco2.h

r17961	r17962
55	55	/*----------- defined in machine/gaelco2.c -----------*/
56	56
57	57	TIMER_DEVICE_CALLBACK( bang_irq );
58		WRITE16_DEVICE_HANDLER( gaelco2_eeprom_cs_w );
59		WRITE16_DEVICE_HANDLER( gaelco2_eeprom_sk_w );
60		WRITE16_DEVICE_HANDLER( gaelco2_eeprom_data_w );
	58	DECLARE_WRITE16_DEVICE_HANDLER( gaelco2_eeprom_cs_w );
	59	DECLARE_WRITE16_DEVICE_HANDLER( gaelco2_eeprom_sk_w );
	60	DECLARE_WRITE16_DEVICE_HANDLER( gaelco2_eeprom_data_w );
61	61
62	62	/*----------- defined in video/gaelco2.c -----------*/
63	63

trunk/src/mame/includes/homerun.h

r17961	r17962
57	57
58	58	/*----------- defined in video/homerun.c -----------*/
59	59
60		WRITE8_DEVICE_HANDLER( homerun_banking_w );
	60	DECLARE_WRITE8_DEVICE_HANDLER( homerun_banking_w );
61	61
62	62
63	63	SCREEN_UPDATE_IND16(homerun);

trunk/src/mame/includes/mcr.h

r17961	r17962
105	105
106	106	/*----------- defined in drivers/mcr.c -----------*/
107	107
108		WRITE8_DEVICE_HANDLER( mcr_ipu_sio_transmit );
	108	DECLARE_WRITE16_DEVICE_HANDLER( mcr_ipu_sio_transmit );
109	109
110	110
111	111	/*----------- defined in machine/mcr.c -----------*/

trunk/src/mame/includes/subs.h

r17961	r17962
53	53
54	54	/*----------- defined in audio/subs.c -----------*/
55	55
56		WRITE8_DEVICE_HANDLER( subs_noise_reset_w );
57		WRITE8_DEVICE_HANDLER( subs_sonar2_w );
58		WRITE8_DEVICE_HANDLER( subs_sonar1_w );
59		WRITE8_DEVICE_HANDLER( subs_crash_w );
60		WRITE8_DEVICE_HANDLER( subs_explode_w );
	56	DECLARE_WRITE8_DEVICE_HANDLER( subs_noise_reset_w );
	57	DECLARE_WRITE8_DEVICE_HANDLER( subs_sonar2_w );
	58	DECLARE_WRITE8_DEVICE_HANDLER( subs_sonar1_w );
	59	DECLARE_WRITE8_DEVICE_HANDLER( subs_crash_w );
	60	DECLARE_WRITE8_DEVICE_HANDLER( subs_explode_w );
61	61
62	62	DISCRETE_SOUND_EXTERN( subs );
63	63

trunk/src/mame/drivers/bfcobra.c

r17961	r17962
1471	1471	{
1472	1472	device_t *device = machine().device("upd");
1473	1473	upd7759_reset_w(device, data & 0x80);
1474		upd7759_port_w(device, 0, data & 0x3f);
	1474	upd7759_port_w(device, space, 0, data & 0x3f);
1475	1475	upd7759_start_w(device, data & 0x40 ? 0 : 1);
1476	1476	}
1477	1477

trunk/src/mame/drivers/nycaptor.c

r17961	r17962
318	318
319	319	static const msm5232_interface msm5232_config =
320	320	{
321		{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 }   /* 0.65 (???) uF capacitors (match the sample, not verified) */
	321	{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 },   /* 0.65 (???) uF capacitors (match the sample, not verified) */
	322	DEVCB_NULL
322	323	};
323	324
324	325

trunk/src/mame/drivers/fgoal.c

r17961	r17962
137	137	{
138	138
139	139	m_row = data;
140		mb14241_shift_data_w(m_mb14241, 0, 0);
	140	mb14241_shift_data_w(m_mb14241, space, 0, 0);
141	141	}
142	142
143	143	WRITE8_MEMBER(fgoal_state::fgoal_col_w)
144	144	{
145	145
146	146	m_col = data;
147		mb14241_shift_count_w(m_mb14241, 0, data);
	147	mb14241_shift_count_w(m_mb14241, space, 0, data);
148	148	}
149	149
150	150	READ8_MEMBER(fgoal_state::fgoal_address_hi_r)
r17961	r17962
159	159
160	160	READ8_MEMBER(fgoal_state::fgoal_shifter_r)
161	161	{
162		UINT8 v = mb14241_shift_result_r(m_mb14241, 0);
	162	UINT8 v = mb14241_shift_result_r(m_mb14241, space, 0);
163	163
164	164	return BITSWAP8(v, 7, 6, 5, 4, 3, 2, 1, 0);
165	165	}
166	166
167	167	READ8_MEMBER(fgoal_state::fgoal_shifter_reverse_r)
168	168	{
169		UINT8 v = mb14241_shift_result_r(m_mb14241, 0);
	169	UINT8 v = mb14241_shift_result_r(m_mb14241, space, 0);
170	170
171	171	return BITSWAP8(v, 0, 1, 2, 3, 4, 5, 6, 7);
172	172	}

trunk/src/mame/drivers/mystston.c

r17961	r17962
77	77	if (((*m_ay8910_select & 0x20) == 0x20) && ((data & 0x20) == 0x00))
78	78	{
79	79	/* bit 4 goes to the 8910 #0 BC1 pin */
80		ay8910_data_address_w(machine().device("ay1"), *m_ay8910_select >> 4, *m_ay8910_data);
	80	ay8910_data_address_w(machine().device("ay1"), space, *m_ay8910_select >> 4, *m_ay8910_data);
81	81	}
82	82
83	83	/* bit 7 goes to 8910 #1 BDIR pin */
84	84	if (((*m_ay8910_select & 0x80) == 0x80) && ((data & 0x80) == 0x00))
85	85	{
86	86	/* bit 6 goes to the 8910 #1 BC1 pin */
87		ay8910_data_address_w(machine().device("ay2"), *m_ay8910_select >> 6, *m_ay8910_data);
	87	ay8910_data_address_w(machine().device("ay2"), space, *m_ay8910_select >> 6, *m_ay8910_data);
88	88	}
89	89
90	90	*m_ay8910_select = data;

trunk/src/mame/drivers/bfm_sc1.c

r17961	r17962
602	602	WRITE8_MEMBER(bfm_sc1_state::nec_latch_w)
603	603	{
604	604	device_t *device = machine().device("upd");
605		upd7759_port_w (device, 0, data&0x3F);   // setup sample
	605	upd7759_port_w (device, space, 0, data&0x3F);   // setup sample
606	606	upd7759_start_w(device, 0);
607	607	upd7759_start_w(device, 1);         // start
608	608	}

trunk/src/mame/drivers/skeetsht.c

r17961	r17962
93	93	if (offset & 8)
94	94	offset = (offset & ~8) | 4;
95	95
96		return tlc34076_r(machine().device("tlc34076"), offset);
	96	return tlc34076_r(machine().device("tlc34076"), space, offset);
97	97	}
98	98
99	99	WRITE16_MEMBER(skeetsht_state::ramdac_w)
r17961	r17962
103	103	if (offset & 8)
104	104	offset = (offset & ~8) | 4;
105	105
106		tlc34076_w(machine().device("tlc34076"), offset, data);
	106	tlc34076_w(machine().device("tlc34076"), space, offset, data);
107	107	}
108	108
109	109
r17961	r17962
163	163	{
164	164
165	165	if (m_ay_sel)
166		ay8910_data_w(m_ay, 0, data);
	166	ay8910_data_w(m_ay, space, 0, data);
167	167	else
168		ay8910_address_w(m_ay, 0, data);
	168	ay8910_address_w(m_ay, space, 0, data);
169	169	}
170	170
171	171

trunk/src/mame/drivers/dblewing.c

r17961	r17962
104	104	static SCREEN_UPDATE_IND16(dblewing)
105	105	{
106	106	dblewing_state *state = screen.machine().driver_data<dblewing_state>();
107		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	107	address_space &space = state->generic_space();
	108	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
108	109
109	110	state->flip_screen_set(BIT(flip, 7));
110	111	deco16ic_pf_update(state->m_deco_tilegen1, state->m_pf1_rowscroll, state->m_pf2_rowscroll);

trunk/src/mame/drivers/labyrunr.c

r17961	r17962
19	19	static INTERRUPT_GEN( labyrunr_vblank_interrupt )
20	20	{
21	21	labyrunr_state *state = device->machine().driver_data<labyrunr_state>();
22		if (k007121_ctrlram_r(state->m_k007121, 7) & 0x02)
	22	address_space &space = state->generic_space();
	23	if (k007121_ctrlram_r(state->m_k007121, space, 7) & 0x02)
23	24	device->execute().set_input_line(HD6309_IRQ_LINE, HOLD_LINE);
24	25	}
25	26
26	27	static INTERRUPT_GEN( labyrunr_timer_interrupt )
27	28	{
28	29	labyrunr_state *state = device->machine().driver_data<labyrunr_state>();
29		if (k007121_ctrlram_r(state->m_k007121, 7) & 0x01)
	30	address_space &space = state->generic_space();
	31	if (k007121_ctrlram_r(state->m_k007121, space, 7) & 0x01)
30	32	device->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
31	33	}
32	34

trunk/src/mame/drivers/hornet.c

r17961	r17962
377	377	READ32_MEMBER(hornet_state::hornet_k037122_sram_r)
378	378	{
379	379	device_t *k037122 = machine().device(get_cgboard_id() ? "k037122_2" : "k037122_1");
380		return k037122_sram_r(k037122, offset, mem_mask);
	380	return k037122_sram_r(k037122, space, offset, mem_mask);
381	381	}
382	382
383	383	WRITE32_MEMBER(hornet_state::hornet_k037122_sram_w)
384	384	{
385	385	device_t *k037122 = machine().device(get_cgboard_id() ? "k037122_2" : "k037122_1");
386		k037122_sram_w(k037122, offset, data, mem_mask);
	386	k037122_sram_w(k037122, space, offset, data, mem_mask);
387	387	}
388	388
389	389
390	390	READ32_MEMBER(hornet_state::hornet_k037122_char_r)
391	391	{
392	392	device_t *k037122 = machine().device(get_cgboard_id() ? "k037122_2" : "k037122_1");
393		return k037122_char_r(k037122, offset, mem_mask);
	393	return k037122_char_r(k037122, space, offset, mem_mask);
394	394	}
395	395
396	396	WRITE32_MEMBER(hornet_state::hornet_k037122_char_w)
397	397	{
398	398	device_t *k037122 = machine().device(get_cgboard_id() ? "k037122_2" : "k037122_1");
399		k037122_char_w(k037122, offset, data, mem_mask);
	399	k037122_char_w(k037122, space, offset, data, mem_mask);
400	400	}
401	401
402	402	READ32_MEMBER(hornet_state::hornet_k037122_reg_r)
403	403	{
404	404	device_t *k037122 = machine().device(get_cgboard_id() ? "k037122_2" : "k037122_1");
405		return k037122_reg_r(k037122, offset, mem_mask);
	405	return k037122_reg_r(k037122, space, offset, mem_mask);
406	406	}
407	407
408	408	WRITE32_MEMBER(hornet_state::hornet_k037122_reg_w)
409	409	{
410	410	device_t *k037122 = machine().device(get_cgboard_id() ? "k037122_2" : "k037122_1");
411		k037122_reg_w(k037122, offset, data, mem_mask);
	411	k037122_reg_w(k037122, space, offset, data, mem_mask);
412	412	}
413	413
414	414	static void voodoo_vblank_0(device_t *device, int param)
r17961	r17962
490	490	0x01 = ADDO (ADC DO)
491	491	*/
492	492	r = 0xf0 | (eeprom->read_bit() << 3);
493		r |= adc1213x_do_r(adc12138, 0) | (adc1213x_eoc_r(adc12138, 0) << 2);
	493	r |= adc1213x_do_r(adc12138, space, 0) | (adc1213x_eoc_r(adc12138, space, 0) << 2);
494	494	break;
495	495
496	496	case 4:   /* I/O port 4 - DIP switches */
r17961	r17962
544	544	0x02 = ADDI (ADC DI)
545	545	0x01 = ADDSCLK (ADC SCLK)
546	546	*/
547		adc1213x_cs_w(adc12138, 0, (data >> 3) & 0x1);
548		adc1213x_conv_w(adc12138, 0, (data >> 2) & 0x1);
549		adc1213x_di_w(adc12138, 0, (data >> 1) & 0x1);
550		adc1213x_sclk_w(adc12138, 0, data & 0x1);
	547	adc1213x_cs_w(adc12138, space, 0, (data >> 3) & 0x1);
	548	adc1213x_conv_w(adc12138, space, 0, (data >> 2) & 0x1);
	549	adc1213x_di_w(adc12138, space, 0, (data >> 1) & 0x1);
	550	adc1213x_sclk_w(adc12138, space, 0, data & 0x1);
551	551
552	552	machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_RESET, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
553	553	mame_printf_debug("System register 1 = %02X\n", data);

trunk/src/mame/drivers/mediagx.c

r17961	r17962
426	426	READ8_MEMBER(mediagx_state::at_dma8237_2_r)
427	427	{
428	428	device_t *device = machine().device("dma8237_2");
429		return i8237_r(device, offset / 2);
	429	return i8237_r(device, space, offset / 2);
430	430	}
431	431
432	432	WRITE8_MEMBER(mediagx_state::at_dma8237_2_w)
433	433	{
434	434	device_t *device = machine().device("dma8237_2");
435		i8237_w(device, offset / 2, data);
	435	i8237_w(device, space, offset / 2, data);
436	436	}
437	437
438	438
439	439	READ32_MEMBER(mediagx_state::ide_r)
440	440	{
441	441	device_t *device = machine().device("ide");
442		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	442	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
443	443	}
444	444
445	445	WRITE32_MEMBER(mediagx_state::ide_w)
446	446	{
447	447	device_t *device = machine().device("ide");
448		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	448	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
449	449	}
450	450
451	451	READ32_MEMBER(mediagx_state::fdc_r)
452	452	{
453	453	device_t *device = machine().device("ide");
454		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	454	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
455	455	}
456	456
457	457	WRITE32_MEMBER(mediagx_state::fdc_w)
458	458	{
459	459	device_t *device = machine().device("ide");
460		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	460	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
461	461	}
462	462
463	463
r17961	r17962
565	565	}
566	566	else
567	567	{
568		r = pic8259_r(device, offset);
	568	r = pic8259_r(device, space, offset);
569	569	}
570	570	return r;
571	571	}
r17961	r17962
585	585	}
586	586	else
587	587	{
588		pic8259_w(device, offset, data);
	588	pic8259_w(device, space, offset, data);
589	589	}
590	590	}
591	591

trunk/src/mame/drivers/orbit.c

r17961	r17962
61	61	*
62	62	*************************************/
63	63
64		static void update_misc_flags(running_machine &machine, UINT8 val)
	64	static void update_misc_flags(address_space &space, UINT8 val)
65	65	{
66		orbit_state *state = machine.driver_data<orbit_state>();
	66	orbit_state *state = space.machine().driver_data<orbit_state>();
67	67
68	68	state->m_misc_flags = val;
69	69
r17961	r17962
76	76	/* BIT6 => HYPER LED    */
77	77	/* BIT7 => WARNING SND  */
78	78
79		discrete_sound_w(state->m_discrete, ORBIT_WARNING_EN, BIT(state->m_misc_flags, 7));
	79	discrete_sound_w(state->m_discrete, space, ORBIT_WARNING_EN, BIT(state->m_misc_flags, 7));
80	80
81		set_led_status(machine, 0, BIT(state->m_misc_flags, 3));
82		set_led_status(machine, 1, BIT(state->m_misc_flags, 6));
	81	set_led_status(space.machine(), 0, BIT(state->m_misc_flags, 3));
	82	set_led_status(space.machine(), 1, BIT(state->m_misc_flags, 6));
83	83
84		coin_lockout_w(machine, 0, !BIT(state->m_misc_flags, 1));
85		coin_lockout_w(machine, 1, !BIT(state->m_misc_flags, 1));
	84	coin_lockout_w(space.machine(), 0, !BIT(state->m_misc_flags, 1));
	85	coin_lockout_w(space.machine(), 1, !BIT(state->m_misc_flags, 1));
86	86	}
87	87
88	88
r17961	r17962
91	91	UINT8 bit = offset >> 1;
92	92
93	93	if (offset & 1)
94		update_misc_flags(machine(), m_misc_flags | (1 << bit));
	94	update_misc_flags(space, m_misc_flags | (1 << bit));
95	95	else
96		update_misc_flags(machine(), m_misc_flags & ~(1 << bit));
	96	update_misc_flags(space, m_misc_flags & ~(1 << bit));
97	97	}
98	98
99	99
r17961	r17962
283	283
284	284	void orbit_state::machine_reset()
285	285	{
286
287		update_misc_flags(machine(), 0);
	286	update_misc_flags(generic_space(), 0);
288	287	m_flip_screen = 0;
289	288	}
290	289

trunk/src/mame/drivers/5clown.c

r17961	r17962
686	686
687	687	WRITE8_MEMBER(_5clown_state::fclown_ay8910_w)
688	688	{
689		ay8910_address_w(m_ay8910, 0, offset);
690		ay8910_data_w(m_ay8910, 0, data);
	689	ay8910_address_w(m_ay8910, space, 0, offset);
	690	ay8910_data_w(m_ay8910, space, 0, data);
691	691	}
692	692
693	693

trunk/src/mame/drivers/sfcbox.c

r17961	r17962
171	171
172	172	static READ8_DEVICE_HANDLER( spc_ram_100_r )
173	173	{
174		return spc_ram_r(device, offset + 0x100);
	174	return spc_ram_r(device, space, offset + 0x100);
175	175	}
176	176
177	177	static WRITE8_DEVICE_HANDLER( spc_ram_100_w )
178	178	{
179		spc_ram_w(device, offset + 0x100, data);
	179	spc_ram_w(device, space, offset + 0x100, data);
180	180	}
181	181
182	182	static ADDRESS_MAP_START( spc_mem, AS_PROGRAM, 8, sfcbox_state )

trunk/src/mame/drivers/contra.c

r17961	r17962
28	28	static INTERRUPT_GEN( contra_interrupt )
29	29	{
30	30	contra_state *state = device->machine().driver_data<contra_state>();
31		if (k007121_ctrlram_r(state->m_k007121_1, 7) & 0x02)
	31	address_space &space = state->generic_space();
	32	if (k007121_ctrlram_r(state->m_k007121_1, space, 7) & 0x02)
32	33	device->execute().set_input_line(HD6309_IRQ_LINE, HOLD_LINE);
33	34	}
34	35

trunk/src/mame/drivers/zn.c

r17961	r17962
1216	1216	READ32_MEMBER(zn_state::taitofx1a_ymsound_r)
1217	1217	{
1218	1218	device_t *tc0140syt = machine().device("tc0140syt");
1219		return tc0140syt_comm_r(tc0140syt, 0) << 16;
	1219	return tc0140syt_comm_r(tc0140syt, space, 0) << 16;
1220	1220	}
1221	1221
1222	1222	WRITE32_MEMBER(zn_state::taitofx1a_ymsound_w)
r17961	r17962
1225	1225
1226	1226	if (mem_mask == 0x0000ffff)
1227	1227	{
1228		tc0140syt_port_w(tc0140syt, 0, data & 0xff);
	1228	tc0140syt_port_w(tc0140syt, space, 0, data & 0xff);
1229	1229	}
1230	1230	else
1231	1231	{
1232		tc0140syt_comm_w(tc0140syt, 0, (data >> 16) & 0xff);
	1232	tc0140syt_comm_w(tc0140syt, space, 0, (data >> 16) & 0xff);
1233	1233	}
1234	1234	}
1235	1235
r17961	r17962
1498	1498
1499	1499	/* dma size is in 32-bit words, convert to bytes */
1500	1500	n_size <<= 2;
	1501	address_space &space = *state->machine().firstcpu->space(AS_PROGRAM);
1501	1502	while( n_size > 0 )
1502	1503	{
1503		psxwritebyte( p_n_psxram, n_address, ide_controller32_r( ide, 0x1f0 / 4, 0x000000ff ) );
	1504	psxwritebyte( p_n_psxram, n_address, ide_controller32_r( ide, space, 0x1f0 / 4, 0x000000ff ) );
1504	1505	n_address++;
1505	1506	n_size--;
1506	1507	}

trunk/src/mame/drivers/malzak.c

r17961	r17962
74	74
75	75	READ8_MEMBER(malzak_state::fake_VRLE_r)
76	76	{
77		return (s2636_work_ram_r(m_s2636_0, 0xcb) & 0x3f) + (machine().primary_screen->vblank() * 0x40);
	77	return (s2636_work_ram_r(m_s2636_0, space, 0xcb) & 0x3f) + (machine().primary_screen->vblank() * 0x40);
78	78	}
79	79
80	80	READ8_MEMBER(malzak_state::s2636_portA_r)

trunk/src/mame/drivers/vertigo.c

r17961	r17962
31	31	{
32	32	device_t * device = machine().device("pit8254");
33	33
34		return pit8253_r( device, offset );
	34	return pit8253_r( device, space, offset );
35	35	}
36	36
37	37	WRITE16_MEMBER(vertigo_state::vertigo_pit8254_lsb_w)
r17961	r17962
39	39	device_t * device = machine().device("pit8254");
40	40
41	41	if (ACCESSING_BITS_0_7)
42		pit8253_w(device, offset, data);
	42	pit8253_w(device, space, offset, data);
43	43	}
44	44
45	45	static ADDRESS_MAP_START( vertigo_map, AS_PROGRAM, 16, vertigo_state )

trunk/src/mame/drivers/midzeus.c

r17961	r17962
158	158	READ32_MEMBER(midzeus_state::zeus2_timekeeper_r)
159	159	{
160	160	device_t *device = machine().device("m48t35");
161		return timekeeper_r(device, offset) | 0xffffff00;
	161	return timekeeper_r(device, space, offset) | 0xffffff00;
162	162	}
163	163
164	164
r17961	r17962
166	166	{
167	167	device_t *device = machine().device("m48t35");
168	168	if (bitlatch[2] && !cmos_protected)
169		timekeeper_w(device, offset, data);
	169	timekeeper_w(device, space, offset, data);
170	170	else
171	171	logerror("%s:zeus2_timekeeper_w with bitlatch[2] = %d, cmos_protected = %d\n", machine().describe_context(), bitlatch[2], cmos_protected);
172	172	cmos_protected = TRUE;

trunk/src/mame/drivers/drw80pkr.c

r17961	r17962
195	195
196	196	// ay8910 control port
197	197	if (m_p1 == 0xfc)
198		ay8910_address_w(machine().device("aysnd"), 0, data);
	198	ay8910_address_w(machine().device("aysnd"), space, 0, data);
199	199
200	200	// ay8910_write_port_0_w
201	201	if (m_p1 == 0xfe)
202		ay8910_data_w(machine().device("aysnd"), 0, data);
	202	ay8910_data_w(machine().device("aysnd"), space, 0, data);
203	203	}
204	204	}
205	205

trunk/src/mame/drivers/norautp.c

r17961	r17962
669	669	output_set_lamp_value(9, (data >> 1) & 1);   /* BET / COLLECT lamp */
670	670
671	671	/* the 4 MSB are for discrete sound */
672		discrete_sound_w(discrete, NORAUTP_SND_EN, (data >> 7) & 0x01);
673		discrete_sound_w(discrete, NORAUTP_FREQ_DATA, (data >> 4) & 0x07);
	672	discrete_sound_w(discrete, space, NORAUTP_SND_EN, (data >> 7) & 0x01);
	673	discrete_sound_w(discrete, space, NORAUTP_FREQ_DATA, (data >> 4) & 0x07);
674	674
675	675	//  popmessage("sound bits 4-5-6-7: %02x, %02x, %02x, %02x", ((data >> 4) & 0x01), ((data >> 5) & 0x01), ((data >> 6) & 0x01), ((data >> 7) & 0x01));
676	676	}

trunk/src/mame/drivers/aliens.c

r17961	r17962
92	92	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
93	93	{
94	94	if (offset >= 0x3800 && offset < 0x3808)
95		return k051937_r(m_k051960, offset - 0x3800);
	95	return k051937_r(m_k051960, space, offset - 0x3800);
96	96	else if (offset < 0x3c00)
97		return k052109_r(m_k052109, offset);
	97	return k052109_r(m_k052109, space, offset);
98	98	else
99		return k051960_r(m_k051960, offset - 0x3c00);
	99	return k051960_r(m_k051960, space, offset - 0x3c00);
100	100	}
101	101	else
102		return k052109_r(m_k052109, offset);
	102	return k052109_r(m_k052109, space, offset);
103	103	}
104	104
105	105	WRITE8_MEMBER(aliens_state::k052109_051960_w)
106	106	{
107	107
108	108	if (offset >= 0x3800 && offset < 0x3808)
109		k051937_w(m_k051960, offset - 0x3800, data);
	109	k051937_w(m_k051960, space, offset - 0x3800, data);
110	110	else if (offset < 0x3c00)
111		k052109_w(m_k052109, offset, data);
	111	k052109_w(m_k052109, space, offset, data);
112	112	else
113		k051960_w(m_k051960, offset - 0x3c00, data);
	113	k051960_w(m_k051960, space, offset - 0x3c00, data);
114	114	}
115	115
116	116	static ADDRESS_MAP_START( aliens_map, AS_PROGRAM, 8, aliens_state )

trunk/src/mame/drivers/88games.c

r17961	r17962
38	38	else
39	39	{
40	40	if (m_zoomreadroms)
41		return k051316_rom_r(m_k051316, offset);
	41	return k051316_rom_r(m_k051316, space, offset);
42	42	else
43		return k051316_r(m_k051316, offset);
	43	return k051316_r(m_k051316, space, offset);
44	44	}
45	45	}
46	46
r17961	r17962
50	50	if (m_videobank)
51	51	m_ram[offset] = data;
52	52	else
53		k051316_w(m_k051316, offset, data);
	53	k051316_w(m_k051316, space, offset, data);
54	54	}
55	55
56	56	WRITE8_MEMBER(_88games_state::k88games_5f84_w)
r17961	r17962
89	89	{
90	90	device_t *upd = m_speech_chip ? m_upd_2 : m_upd_1;
91	91
92		upd7759_port_w(upd, 0, data);
	92	upd7759_port_w(upd, space, 0, data);
93	93	}
94	94
95	95	/* special handlers to combine 052109 & 051960 */
r17961	r17962
99	99	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
100	100	{
101	101	if (offset >= 0x3800 && offset < 0x3808)
102		return k051937_r(m_k051960, offset - 0x3800);
	102	return k051937_r(m_k051960, space, offset - 0x3800);
103	103	else if (offset < 0x3c00)
104		return k052109_r(m_k052109, offset);
	104	return k052109_r(m_k052109, space, offset);
105	105	else
106		return k051960_r(m_k051960, offset - 0x3c00);
	106	return k051960_r(m_k051960, space, offset - 0x3c00);
107	107	}
108	108	else
109		return k052109_r(m_k052109, offset);
	109	return k052109_r(m_k052109, space, offset);
110	110	}
111	111
112	112	WRITE8_MEMBER(_88games_state::k052109_051960_w)
113	113	{
114	114
115	115	if (offset >= 0x3800 && offset < 0x3808)
116		k051937_w(m_k051960, offset - 0x3800, data);
	116	k051937_w(m_k051960, space, offset - 0x3800, data);
117	117	else if (offset < 0x3c00)
118		k052109_w(m_k052109, offset, data);
	118	k052109_w(m_k052109, space, offset, data);
119	119	else
120		k051960_w(m_k051960, offset - 0x3c00, data);
	120	k051960_w(m_k051960, space, offset - 0x3c00, data);
121	121	}
122	122
123	123	/*************************************

trunk/src/mame/drivers/kaneko16.c

r17961	r17962
162	162	{
163	163	device_t *device = machine().device("ay1");
164	164	/* Each 2149 register is mapped to a different address */
165		ay8910_address_w(device,0,offset);
166		return ay8910_r(device,0);
	165	ay8910_address_w(device,space,0,offset);
	166	return ay8910_r(device,space,0);
167	167	}
168	168
169	169	WRITE16_MEMBER(kaneko16_state::kaneko16_ay1_YM2149_w)
170	170	{
171	171	device_t *device = machine().device("ay1");
172	172	/* Each 2149 register is mapped to a different address */
173		ay8910_address_w(device,0,offset);
	173	ay8910_address_w(device,space,0,offset);
174	174	/* The registers are mapped to odd addresses, except one! */
175		if (ACCESSING_BITS_0_7)   ay8910_data_w(device,0, data       & 0xff);
176		else            ay8910_data_w(device,0,(data >> 8) & 0xff);
	175	if (ACCESSING_BITS_0_7)   ay8910_data_w(device,space,0, data       & 0xff);
	176	else            ay8910_data_w(device,space,0,(data >> 8) & 0xff);
177	177	}
178	178
179	179	READ16_MEMBER(kaneko16_state::kaneko16_ay2_YM2149_r)
180	180	{
181	181	device_t *device = machine().device("ay2");
182	182	/* Each 2149 register is mapped to a different address */
183		ay8910_address_w(device,0,offset);
184		return ay8910_r(device,0);
	183	ay8910_address_w(device,space,0,offset);
	184	return ay8910_r(device,space,0);
185	185	}
186	186
187	187	WRITE16_MEMBER(kaneko16_state::kaneko16_ay2_YM2149_w)
188	188	{
189	189	device_t *device = machine().device("ay2");
190	190	/* Each 2149 register is mapped to a different address */
191		ay8910_address_w(device,0,offset);
	191	ay8910_address_w(device,space,0,offset);
192	192	/* The registers are mapped to odd addresses, except one! */
193		if (ACCESSING_BITS_0_7)   ay8910_data_w(device,0, data       & 0xff);
194		else            ay8910_data_w(device,0,(data >> 8) & 0xff);
	193	if (ACCESSING_BITS_0_7)   ay8910_data_w(device,space,0, data       & 0xff);
	194	else            ay8910_data_w(device,space,0,(data >> 8) & 0xff);
195	195	}
196	196
197	197

trunk/src/mame/drivers/cybertnk.c

r17961	r17962
821	821
822	822
823	823	static const y8950_interface y8950_config = {
824		0 /* TODO */
	824	/* TODO */
	825	DEVCB_NULL,
	826	DEVCB_NULL,
	827	DEVCB_NULL,
	828	DEVCB_NULL,
	829	DEVCB_NULL
825	830	};
826	831
827	832	static MACHINE_CONFIG_START( cybertnk, cybertnk_state )

trunk/src/mame/drivers/taito_b.c

r17961	r17962
478	478	return ioport("COIN")->read() << 8;
479	479
480	480	default:
481		return tc0640fio_r(m_tc0640fio, offset) << 8;
	481	return tc0640fio_r(m_tc0640fio, space, offset) << 8;
482	482	}
483	483	}
484	484
485	485	WRITE16_MEMBER(taitob_state::spacedxo_tc0220ioc_w)
486	486	{
487	487	if (ACCESSING_BITS_0_7)
488		tc0220ioc_w(m_tc0220ioc, offset, data & 0xff);
	488	tc0220ioc_w(m_tc0220ioc, space, offset, data & 0xff);
489	489	else
490	490	{
491	491	/* &spacedxo also writes here - bug? */
492		tc0220ioc_w(m_tc0220ioc, offset, (data >> 8) & 0xff);
	492	tc0220ioc_w(m_tc0220ioc, space, offset, (data >> 8) & 0xff);
493	493	}
494	494	}
495	495
r17961	r17962
731	731	AM_RANGE(0x300000, 0x300001) AM_DEVREADWRITE_LEGACY("hd63484", hd63484_status_r, hd63484_address_w)
732	732	AM_RANGE(0x300002, 0x300003) AM_DEVREADWRITE_LEGACY("hd63484", hd63484_data_r, hd63484_data_w)
733	733	//  AM_RANGE(0x320000, 0x320001) AM_READ_LEGACY(SMH_NOP) // ?
734		AM_RANGE(0x320002, 0x320003) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_comm_r, 0xff00)
	734	AM_RANGE(0x320002, 0x320003) AM_READNOP AM_DEVWRITE8_LEGACY("tc0140syt", tc0140syt_comm_w, 0xff00)
735	735	ADDRESS_MAP_END
736	736
737	737	static ADDRESS_MAP_START( masterw_sound_map, AS_PROGRAM, 8, taitob_state )

trunk/src/mame/drivers/viper.c

r17961	r17962
1527	1527	READ64_MEMBER(viper_state::voodoo3_io_r)
1528	1528	{
1529	1529	device_t *device = machine().device("voodoo");
1530		return read64be_with_32le_device_handler(banshee_io_r, device, offset, mem_mask);
	1530	return read64be_with_32le_device_handler(banshee_io_r, device, space, offset, mem_mask);
1531	1531	}
1532	1532	WRITE64_MEMBER(viper_state::voodoo3_io_w)
1533	1533	{
1534	1534	//  printf("voodoo3_io_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, space.device().safe_pc());
1535	1535
1536	1536	device_t *device = machine().device("voodoo");
1537		write64be_with_32le_device_handler(banshee_io_w, device, offset, data, mem_mask);
	1537	write64be_with_32le_device_handler(banshee_io_w, device, space, offset, data, mem_mask);
1538	1538	}
1539	1539
1540	1540	READ64_MEMBER(viper_state::voodoo3_r)
1541	1541	{
1542	1542	device_t *device = machine().device("voodoo");
1543		return read64be_with_32le_device_handler(banshee_r, device, offset, mem_mask);
	1543	return read64be_with_32le_device_handler(banshee_r, device, space, offset, mem_mask);
1544	1544	}
1545	1545	WRITE64_MEMBER(viper_state::voodoo3_w)
1546	1546	{
1547	1547	//  printf("voodoo3_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, space.device().safe_pc());
1548	1548
1549	1549	device_t *device = machine().device("voodoo");
1550		write64be_with_32le_device_handler(banshee_w, device, offset, data, mem_mask);
	1550	write64be_with_32le_device_handler(banshee_w, device, space, offset, data, mem_mask);
1551	1551	}
1552	1552
1553	1553	READ64_MEMBER(viper_state::voodoo3_lfb_r)
1554	1554	{
1555	1555	device_t *device = machine().device("voodoo");
1556		return read64be_with_32le_device_handler(banshee_fb_r, device, offset, mem_mask);
	1556	return read64be_with_32le_device_handler(banshee_fb_r, device, space, offset, mem_mask);
1557	1557	}
1558	1558	WRITE64_MEMBER(viper_state::voodoo3_lfb_w)
1559	1559	{
1560	1560	//  printf("voodoo3_lfb_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, space.device().safe_pc());
1561	1561
1562	1562	device_t *device = machine().device("voodoo");
1563		write64be_with_32le_device_handler(banshee_fb_w, device, offset, data, mem_mask);
	1563	write64be_with_32le_device_handler(banshee_fb_w, device, space, offset, data, mem_mask);
1564	1564	}
1565	1565
1566	1566

trunk/src/mame/drivers/mw8080bw.c

r17961	r17962
168	168
169	169	READ8_MEMBER(mw8080bw_state::mw8080bw_shift_result_rev_r)
170	170	{
171		UINT8 ret = mb14241_shift_result_r(m_mb14241, 0);
	171	UINT8 ret = mb14241_shift_result_r(m_mb14241, space, 0);
172	172
173	173	return BITSWAP8(ret,0,1,2,3,4,5,6,7);
174	174	}
r17961	r17962
184	184	}
185	185	else
186	186	{
187		ret = mb14241_shift_result_r(m_mb14241, 0);
	187	ret = mb14241_shift_result_r(m_mb14241, space, 0);
188	188	}
189	189
190	190	return ret;
r17961	r17962
192	192
193	193	WRITE8_MEMBER(mw8080bw_state::mw8080bw_reversable_shift_count_w)
194	194	{
195		mb14241_shift_count_w(m_mb14241, offset, data);
	195	mb14241_shift_count_w(m_mb14241, space, offset, data);
196	196
197	197	m_rev_shift_res = data & 0x08;
198	198	}
r17961	r17962
425	425	gunfight_audio_w(space, 0, data);
426	426
427	427	if (offset & 0x02)
428		mb14241_shift_count_w(m_mb14241, 0, data);
	428	mb14241_shift_count_w(m_mb14241, space, 0, data);
429	429
430	430	if (offset & 0x04)
431		mb14241_shift_data_w(m_mb14241, 0, data);
	431	mb14241_shift_data_w(m_mb14241, space, 0, data);
432	432
433	433	}
434	434
r17961	r17962
618	618	{
619	619
620	620	if (offset & 0x01)
621		tornbase_audio_w(machine().device("discrete"), 0, data);
	621	tornbase_audio_w(machine().device("discrete"), space, 0, data);
622	622
623	623	if (offset & 0x02)
624		mb14241_shift_count_w(m_mb14241, 0, data);
	624	mb14241_shift_count_w(m_mb14241, space, 0, data);
625	625
626	626	if (offset & 0x04)
627		mb14241_shift_data_w(m_mb14241, 0, data);
	627	mb14241_shift_data_w(m_mb14241, space, 0, data);
628	628	}
629	629
630	630
r17961	r17962
1070	1070	WRITE8_MEMBER(mw8080bw_state::checkmat_io_w)
1071	1071	{
1072	1072
1073		if (offset & 0x01)  checkmat_audio_w(m_discrete, 0, data);
	1073	if (offset & 0x01)  checkmat_audio_w(m_discrete, space, 0, data);
1074	1074
1075	1075	if (offset & 0x02)  watchdog_reset_w(space, 0, data);
1076	1076	}
r17961	r17962
2165	2165	watchdog_reset_w(space, 0, data);      /*  -  -  -  -  -  0  1  0 */
2166	2166
2167	2167	else if ((offset & 0x5f) == 0x01)
2168		spcenctr_audio_1_w(m_discrete, 0, data);   /*  -  0  -  0  0  0  0  1 */
	2168	spcenctr_audio_1_w(m_discrete, space, 0, data);   /*  -  0  -  0  0  0  0  1 */
2169	2169
2170	2170	else if ((offset & 0x5f) == 0x09)
2171		spcenctr_audio_2_w(m_discrete, 0, data);   /*  -  0  -  0  1  0  0  1 */
	2171	spcenctr_audio_2_w(m_discrete, space, 0, data);   /*  -  0  -  0  1  0  0  1 */
2172	2172
2173	2173	else if ((offset & 0x5f) == 0x11)
2174		spcenctr_audio_3_w(m_discrete, 0, data);   /*  -  0  -  1  0  0  0  1 */
	2174	spcenctr_audio_3_w(m_discrete, space, 0, data);   /*  -  0  -  1  0  0  0  1 */
2175	2175
2176	2176	else if ((offset & 0x07) == 0x03)
2177	2177	{                                 /*  -  -  -  -  -  0  1  1 */
r17961	r17962
2381	2381	anything unusual on the schematics that would cause
2382	2382	the bits to flip */
2383	2383
2384		return ~mb14241_shift_result_r(m_mb14241, 0);
	2384	return ~mb14241_shift_result_r(m_mb14241, space, 0);
2385	2385	}
2386	2386
2387	2387	WRITE8_MEMBER(mw8080bw_state::bowler_lights_1_w)

trunk/src/mame/drivers/namcos86.c

r17961	r17962
306	306	case 1:
307	307	case 2:
308	308	case 3:
309		namco_63701x_w(machine().device("namco2"), (offset & 0x1e00) >> 9,data);
	309	namco_63701x_w(machine().device("namco2"), space, (offset & 0x1e00) >> 9,data);
310	310	break;
311	311
312	312	case 4:

trunk/src/mame/drivers/mermaid.c

r17961	r17962
124	124
125	125	WRITE8_MEMBER(mermaid_state::mermaid_ay8910_write_port_w)
126	126	{
127		if (m_ay8910_enable[0]) ay8910_data_w(m_ay1, offset, data);
128		if (m_ay8910_enable[1]) ay8910_data_w(m_ay2, offset, data);
	127	if (m_ay8910_enable[0]) ay8910_data_w(m_ay1, space, offset, data);
	128	if (m_ay8910_enable[1]) ay8910_data_w(m_ay2, space, offset, data);
129	129	}
130	130
131	131	WRITE8_MEMBER(mermaid_state::mermaid_ay8910_control_port_w)
132	132	{
133		if (m_ay8910_enable[0]) ay8910_address_w(m_ay1, offset, data);
134		if (m_ay8910_enable[1]) ay8910_address_w(m_ay2, offset, data);
	133	if (m_ay8910_enable[0]) ay8910_address_w(m_ay1, space, offset, data);
	134	if (m_ay8910_enable[1]) ay8910_address_w(m_ay2, space, offset, data);
135	135	}
136	136
137	137

trunk/src/mame/drivers/gaelco3d.c

r17961	r17962
267	267	if (mem_mask == 0xffff0000)
268	268	irq_ack_w(space, offset, data, mem_mask >> 16);
269	269	else if (ACCESSING_BITS_0_7)
270		gaelco_serial_tr_w(machine().device("serial"), 0, data & 0x01);
	270	gaelco_serial_tr_w(machine().device("serial"), space, 0, data & 0x01);
271	271	else
272	272	logerror("%06X:irq_ack_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
273	273	}
r17961	r17962
290	290	/* bit 0 is clock */
291	291	/* bit 1 active */
292	292	result &= ~GAELCOSER_EXT_STATUS_MASK;
293		result |= gaelco_serial_status_r(machine().device("serial"), 0);
	293	result |= gaelco_serial_status_r(machine().device("serial"), space, 0);
294	294	}
295	295
296	296	eeprom_device *eeprom = downcast<eeprom_device *>(device);
r17961	r17962
307	307	return (eeprom_data_r(space, 0, mem_mask >> 16) << 16) | 0xffff;
308	308	else if (ACCESSING_BITS_0_7)
309	309	{
310		UINT8 data = gaelco_serial_data_r(machine().device("serial"),0);
	310	UINT8 data = gaelco_serial_data_r(machine().device("serial"),space,0);
311	311	if (LOG)
312	312	logerror("%06X:read(%02X) = %08X & %08X\n", machine().device("maincpu")->safe_pc(), offset, data, mem_mask);
313	313	return  data | 0xffffff00;

trunk/src/mame/drivers/snk.c

r17961	r17962
484	484
485	485	static const y8950_interface y8950_config_2 =
486	486	{
487		ymirq_callback_2
	487	DEVCB_LINE(ymirq_callback_2)
488	488	};
489	489
490	490

trunk/src/mame/drivers/highvdeo.c

r17961	r17962
266	266	if (ACCESSING_BITS_0_7 && okidata != data)
267	267	{
268	268	okidata = data;
269		okim6376_w(device, 0, data & ~0x80);
	269	okim6376_w(device, space, 0, data & ~0x80);
270	270	okim6376_st_w (device, data & 0x80);
271	271	}
272	272	}
r17961	r17962
340	340	static int okidata;
341	341	if (ACCESSING_BITS_0_7 && okidata != data) {
342	342	okidata = data;
343		okim6376_w(device, 0, data );
	343	okim6376_w(device, space, 0, data );
344	344	}
345	345	}
346	346

trunk/src/mame/drivers/othello.c

r17961	r17962
225	225	WRITE8_MEMBER(othello_state::ay_address_w)
226	226	{
227	227
228		if (m_ay_select & 1) ay8910_address_w(m_ay1, 0, data);
229		if (m_ay_select & 2) ay8910_address_w(m_ay2, 0, data);
	228	if (m_ay_select & 1) ay8910_address_w(m_ay1, space, 0, data);
	229	if (m_ay_select & 2) ay8910_address_w(m_ay2, space, 0, data);
230	230	}
231	231
232	232	WRITE8_MEMBER(othello_state::ay_data_w)
233	233	{
234	234
235		if (m_ay_select & 1) ay8910_data_w(m_ay1, 0, data);
236		if (m_ay_select & 2) ay8910_data_w(m_ay2, 0, data);
	235	if (m_ay_select & 1) ay8910_data_w(m_ay1, space, 0, data);
	236	if (m_ay_select & 2) ay8910_data_w(m_ay2, space, 0, data);
237	237	}
238	238
239	239	static ADDRESS_MAP_START( audio_map, AS_PROGRAM, 8, othello_state )
r17961	r17962
300	300	device_t *device = machine().device("n7751_8243");
301	301
302	302	/* write to P2; low 4 bits go to 8243 */
303		i8243_p2_w(device, offset, data & 0x0f);
	303	i8243_p2_w(device, space, offset, data & 0x0f);
304	304
305	305	/* output of bit $80 indicates we are ready (1) or busy (0) */
306	306	/* no other outputs are used */

trunk/src/mame/drivers/model2.c

r17961	r17962
1014	1014	{
1015	1015	if (ACCESSING_BITS_0_7 && (offset == 0))
1016	1016	{
1017		scsp_midi_in(machine().device("scsp"), 0, data&0xff, 0);
	1017	scsp_midi_in(machine().device("scsp"), space, 0, data&0xff, 0);
1018	1018
1019	1019	// give the 68k time to notice
1020	1020	space.device().execute().spin_until_time(attotime::from_usec(40));

trunk/src/mame/drivers/4enraya.c

r17961	r17962
72	72	device_t *device = machine().device("aysnd");
73	73
74	74	if ((m_last_snd_ctrl & m_snd_latch_bit ) == m_snd_latch_bit && (data & m_snd_latch_bit) == 0x00)
75		ay8910_data_address_w(device, m_last_snd_ctrl, m_soundlatch);
	75	ay8910_data_address_w(device, space, m_last_snd_ctrl, m_soundlatch);
76	76
77	77	m_last_snd_ctrl = data;
78	78	}

trunk/src/mame/drivers/shanghai.c

r17961	r17962
80	80	device_t *hd63484 = screen.machine().device("hd63484");
81	81	int x, y, b, src;
82	82
83		b = ((hd63484_regs_r(hd63484, 0xcc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(hd63484, 0xce/2, 0xffff);
	83	address_space &space = screen.machine().driver_data()->generic_space();
	84	b = ((hd63484_regs_r(hd63484, space, 0xcc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(hd63484, space, 0xce/2, 0xffff);
84	85	for (y = 0; y < 280; y++)
85	86	{
86		for (x = 0 ; x < (hd63484_regs_r(hd63484, 0xca/2, 0xffff) & 0x0fff) * 2 ; x += 2)
	87	for (x = 0 ; x < (hd63484_regs_r(hd63484, space, 0xca/2, 0xffff) & 0x0fff) * 2 ; x += 2)
87	88	{
88	89	b &= (HD63484_RAM_SIZE - 1);
89		src = hd63484_ram_r(hd63484, b, 0xffff);
	90	src = hd63484_ram_r(hd63484, space, b, 0xffff);
90	91	bitmap.pix16(y, x)     = src & 0x00ff;
91	92	bitmap.pix16(y, x + 1) = (src & 0xff00) >> 8;
92	93	b++;
93	94	}
94	95	}
95	96
96		if ((hd63484_regs_r(hd63484, 0x06/2, 0xffff) & 0x0300) == 0x0300)
	97	if ((hd63484_regs_r(hd63484, space, 0x06/2, 0xffff) & 0x0300) == 0x0300)
97	98	{
98		int sy = (hd63484_regs_r(hd63484, 0x94/2, 0xffff) & 0x0fff) - (hd63484_regs_r(hd63484, 0x88/2, 0xffff) >> 8);
99		int h = hd63484_regs_r(hd63484, 0x96/2, 0xffff) & 0x0fff;
100		int sx = ((hd63484_regs_r(hd63484, 0x92/2, 0xffff) >> 8) - (hd63484_regs_r(hd63484, 0x84/2, 0xffff) >> 8)) * 4;
101		int w = (hd63484_regs_r(hd63484, 0x92/2, 0xffff) & 0xff) * 4;
	99	int sy = (hd63484_regs_r(hd63484, space, 0x94/2, 0xffff) & 0x0fff) - (hd63484_regs_r(hd63484, space, 0x88/2, 0xffff) >> 8);
	100	int h = hd63484_regs_r(hd63484, space, 0x96/2, 0xffff) & 0x0fff;
	101	int sx = ((hd63484_regs_r(hd63484, space, 0x92/2, 0xffff) >> 8) - (hd63484_regs_r(hd63484, space, 0x84/2, 0xffff) >> 8)) * 4;
	102	int w = (hd63484_regs_r(hd63484, space, 0x92/2, 0xffff) & 0xff) * 4;
102	103	if (sx < 0) sx = 0;   // not sure about this (shangha2 title screen)
103	104
104		b = (((hd63484_regs_r(hd63484, 0xdc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(hd63484, 0xde/2, 0xffff));
	105	b = (((hd63484_regs_r(hd63484, space, 0xdc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(hd63484, space, 0xde/2, 0xffff));
105	106
106	107	for (y = sy ; y <= sy + h && y < 280 ; y++)
107	108	{
108		for (x = 0 ; x < (hd63484_regs_r(hd63484, 0xca/2, 0xffff) & 0x0fff) * 2 ; x += 2)
	109	for (x = 0 ; x < (hd63484_regs_r(hd63484, space, 0xca/2, 0xffff) & 0x0fff) * 2 ; x += 2)
109	110	{
110	111	b &= (HD63484_RAM_SIZE - 1);
111		src = hd63484_ram_r(hd63484, b, 0xffff);
112		if (x <= w && x + sx >= 0 && x + sx < (hd63484_regs_r(hd63484, 0xca/2, 0xffff) & 0x0fff) * 2)
	112	src = hd63484_ram_r(hd63484, space, b, 0xffff);
	113	if (x <= w && x + sx >= 0 && x + sx < (hd63484_regs_r(hd63484, space, 0xca/2, 0xffff) & 0x0fff) * 2)
113	114	{
114	115	bitmap.pix16(y, x + sx)     = src & 0x00ff;
115	116	bitmap.pix16(y, x + sx + 1) = (src & 0xff00) >> 8;

trunk/src/mame/drivers/jpmimpct.c

r17961	r17962
476	476	device_t *device = machine().device("upd");
477	477	if (ACCESSING_BITS_0_7)
478	478	{
479		upd7759_port_w(device, 0, data);
	479	upd7759_port_w(device, space, 0, data);
480	480	upd7759_start_w(device, 0);
481	481	upd7759_start_w(device, 1);
482	482	}

trunk/src/mame/drivers/sigmab52.c

r17961	r17962
171	171
172	172	int x, y, b, src;
173	173
174		b = ((hd63484_regs_r(hd63484, 0xcc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(hd63484, 0xce/2, 0xffff);
	174	address_space &space = screen.machine().driver_data()->generic_space();
	175	b = ((hd63484_regs_r(hd63484, space, 0xcc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(hd63484, space, 0xce/2, 0xffff);
175	176
176	177	//save vram to file
177	178	#if 0
r17961	r17962
186	187
187	188	for (y = 0; y < 480; y++)
188	189	{
189		for (x = 0; x < (hd63484_regs_r(hd63484, 0xca/2, 0xffff) & 0x0fff) * 4; x += 4)
	190	for (x = 0; x < (hd63484_regs_r(hd63484, space, 0xca/2, 0xffff) & 0x0fff) * 4; x += 4)
190	191	{
191	192
192		src = hd63484_ram_r(hd63484, b & (HD63484_RAM_SIZE - 1), 0xffff);
	193	src = hd63484_ram_r(hd63484, space, b & (HD63484_RAM_SIZE - 1), 0xffff);
193	194
194	195	bitmap.pix16(y, x    ) = ((src & 0x000f) >>  0) << 0;
195	196	bitmap.pix16(y, x + 1) = ((src & 0x00f0) >>  4) << 0;
r17961	r17962
200	201	}
201	202
202	203	if (!screen.machine().input().code_pressed(KEYCODE_O))
203		if ((hd63484_regs_r(hd63484, 0x06/2, 0xffff) & 0x0300) == 0x0300)
	204	if ((hd63484_regs_r(hd63484, space, 0x06/2, 0xffff) & 0x0300) == 0x0300)
204	205	{
205		int sy = (hd63484_regs_r(hd63484, 0x94/2, 0xffff) & 0x0fff) - (hd63484_regs_r(hd63484, 0x88/2, 0xffff) >> 8);
206		int h = hd63484_regs_r(hd63484, 0x96/2, 0xffff) & 0x0fff;
207		int sx = ((hd63484_regs_r(hd63484, 0x92/2, 0xffff) >> 8) - (hd63484_regs_r(hd63484, 0x84/2, 0xffff) >> 8)) * 4;
208		int w = (hd63484_regs_r(hd63484, 0x92/2, 0xffff) & 0xff) * 2;
	206	int sy = (hd63484_regs_r(hd63484, space, 0x94/2, 0xffff) & 0x0fff) - (hd63484_regs_r(hd63484, space, 0x88/2, 0xffff) >> 8);
	207	int h = hd63484_regs_r(hd63484, space, 0x96/2, 0xffff) & 0x0fff;
	208	int sx = ((hd63484_regs_r(hd63484, space, 0x92/2, 0xffff) >> 8) - (hd63484_regs_r(hd63484, space, 0x84/2, 0xffff) >> 8)) * 4;
	209	int w = (hd63484_regs_r(hd63484, space, 0x92/2, 0xffff) & 0xff) * 2;
209	210	if (sx < 0) sx = 0;   // not sure about this (shangha2 title screen)
210	211
211		b = (((hd63484_regs_r(hd63484, 0xdc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(hd63484, 0xde/2, 0xffff));
	212	b = (((hd63484_regs_r(hd63484, space, 0xdc/2, 0xffff) & 0x000f) << 16) + hd63484_regs_r(hd63484, space, 0xde/2, 0xffff));
212	213
213	214
214	215	for (y = sy; y <= sy + h && y < 480; y++)
215	216	{
216		for (x = 0; x < (hd63484_regs_r(hd63484, 0xca/2, 0xffff) & 0x0fff)* 4; x += 4)
	217	for (x = 0; x < (hd63484_regs_r(hd63484, space, 0xca/2, 0xffff) & 0x0fff)* 4; x += 4)
217	218	{
218		src = hd63484_ram_r(hd63484, b & (HD63484_RAM_SIZE - 1), 0xffff);
	219	src = hd63484_ram_r(hd63484, space, b & (HD63484_RAM_SIZE - 1), 0xffff);
219	220
220		if (x <= w && x + sx >= 0 && x + sx < (hd63484_regs_r(hd63484, 0xca/2, 0xffff) & 0x0fff) * 4)
	221	if (x <= w && x + sx >= 0 && x + sx < (hd63484_regs_r(hd63484, space, 0xca/2, 0xffff) & 0x0fff) * 4)
221	222	{
222	223	bitmap.pix16(y, x + sx    ) = ((src & 0x000f) >>  0) << 0;
223	224	bitmap.pix16(y, x + sx + 1) = ((src & 0x00f0) >>  4) << 0;
r17961	r17962
249	250	if(!offset)
250	251	{
251	252	//address select
252		hd63484_address_w(hd63484, 0, data, 0x00ff);
	253	hd63484_address_w(hd63484, space, 0, data, 0x00ff);
253	254	m_latch = 0;
254	255	}
255	256	else
r17961	r17962
265	266	m_acrtc_data <<= 8;
266	267	m_acrtc_data |= data;
267	268
268		hd63484_data_w(hd63484, 0, m_acrtc_data, 0xffff);
	269	hd63484_data_w(hd63484, space, 0, m_acrtc_data, 0xffff);
269	270	}
270	271
271	272	m_latch ^= 1;
r17961	r17962
277	278	if(offset&1)
278	279	{
279	280	device_t *hd63484 = machine().device("hd63484");
280		return hd63484_data_r(hd63484, 0, 0xff);
	281	return hd63484_data_r(hd63484, space, 0, 0xff);
281	282	}
282	283
283	284	else
r17961	r17962
569	570
570	571	device_t *hd63484 = machine().device("hd63484");
571	572
	573	address_space &space = generic_space();
572	574	for(i = 0; i < 0x40000/2; ++i)
573	575	{
574		hd63484_ram_w(hd63484, i + 0x40000/2, rom[i], 0xffff);
	576	hd63484_ram_w(hd63484, space, i + 0x40000/2, rom[i], 0xffff);
575	577	}
576	578	}
577	579	}

trunk/src/mame/drivers/dynadice.c

r17961	r17962
93	93
94	94	*/
95	95	if ((data & 7) == 7)
96		ay8910_address_w(device, 0, m_ay_data);
	96	ay8910_address_w(device, space, 0, m_ay_data);
97	97
98	98	if ((data & 7) == 6)
99		ay8910_data_w(device, 0, m_ay_data);
	99	ay8910_data_w(device, space, 0, m_ay_data);
100	100	}
101	101
102	102

trunk/src/mame/drivers/darius.c

r17961	r17962
177	177	switch (offset)
178	178	{
179	179	case 0x01:
180		return (tc0140syt_comm_r(m_tc0140syt, 0) & 0xff);   /* sound interface read */
	180	return (tc0140syt_comm_r(m_tc0140syt, space, 0) & 0xff);   /* sound interface read */
181	181
182	182	case 0x04:
183	183	return ioport("P1")->read();
r17961	r17962
207	207	{
208	208	case 0x00:   /* sound interface write */
209	209
210		tc0140syt_port_w(m_tc0140syt, 0, data & 0xff);
	210	tc0140syt_port_w(m_tc0140syt, space, 0, data & 0xff);
211	211	return;
212	212
213	213	case 0x01:   /* sound interface write */
214	214
215		tc0140syt_comm_w(m_tc0140syt, 0, data & 0xff);
	215	tc0140syt_comm_w(m_tc0140syt, space, 0, data & 0xff);
216	216	return;
217	217
218	218	case 0x28:   /* unknown, written by both cpus - always 0? */

trunk/src/mame/drivers/kinst.c

r17961	r17962
304	304	READ32_MEMBER(kinst_state::kinst_ide_r)
305	305	{
306	306	device_t *device = machine().device("ide");
307		return midway_ide_asic_r(device, offset / 2, mem_mask);
	307	return midway_ide_asic_r(device, space, offset / 2, mem_mask);
308	308	}
309	309
310	310
311	311	WRITE32_MEMBER(kinst_state::kinst_ide_w)
312	312	{
313	313	device_t *device = machine().device("ide");
314		midway_ide_asic_w(device, offset / 2, data, mem_mask);
	314	midway_ide_asic_w(device, space, offset / 2, data, mem_mask);
315	315	}
316	316
317	317
318	318	READ32_MEMBER(kinst_state::kinst_ide_extra_r)
319	319	{
320	320	device_t *device = machine().device("ide");
321		return ide_controller32_r(device, 0x3f6/4, 0x00ff0000) >> 16;
	321	return ide_controller32_r(device, space, 0x3f6/4, 0x00ff0000) >> 16;
322	322	}
323	323
324	324
325	325	WRITE32_MEMBER(kinst_state::kinst_ide_extra_w)
326	326	{
327	327	device_t *device = machine().device("ide");
328		ide_controller32_w(device, 0x3f6/4, data << 16, 0x00ff0000);
	328	ide_controller32_w(device, space, 0x3f6/4, data << 16, 0x00ff0000);
329	329	}
330	330
331	331

trunk/src/mame/drivers/snesb.c

r17961	r17962
247	247
248	248	static READ8_DEVICE_HANDLER( spc_ram_100_r )
249	249	{
250		return spc_ram_r(device, offset + 0x100);
	250	return spc_ram_r(device, space, offset + 0x100);
251	251	}
252	252
253	253	static WRITE8_DEVICE_HANDLER( spc_ram_100_w )
254	254	{
255		spc_ram_w(device, offset + 0x100, data);
	255	spc_ram_w(device, space, offset + 0x100, data);
256	256	}
257	257
258	258	static ADDRESS_MAP_START( spc_mem, AS_PROGRAM, 8, snesb_state )

trunk/src/mame/drivers/toaplan2.c

r17961	r17962
855	855	{
856	856	nmk112_device *nmk112 = machine().device<nmk112_device>("nmk112");
857	857
858		nmk112_okibank_w(nmk112, offset,     data        & 0x0f);
859		nmk112_okibank_w(nmk112, offset + 1, (data >> 4) & 0x0f);
	858	nmk112_okibank_w(nmk112, space, offset,     data        & 0x0f);
	859	nmk112_okibank_w(nmk112, space, offset + 1, (data >> 4) & 0x0f);
860	860	}
861	861
862	862

trunk/src/mame/drivers/wecleman.c

r17961	r17962
707	707	READ8_MEMBER(wecleman_state::hotchase_1_k007232_r)
708	708	{
709	709	device_t *device = machine().device("konami1");
710		return k007232_r(device, offset ^ 1);
	710	return k007232_r(device, space, offset ^ 1);
711	711	}
712	712
713	713	WRITE8_MEMBER(wecleman_state::hotchase_1_k007232_w)
714	714	{
715	715	device_t *device = machine().device("konami1");
716		k007232_w(device, offset ^ 1, data);
	716	k007232_w(device, space, offset ^ 1, data);
717	717	}
718	718
719	719	READ8_MEMBER(wecleman_state::hotchase_2_k007232_r)
720	720	{
721	721	device_t *device = machine().device("konami2");
722		return k007232_r(device, offset ^ 1);
	722	return k007232_r(device, space, offset ^ 1);
723	723	}
724	724
725	725	WRITE8_MEMBER(wecleman_state::hotchase_2_k007232_w)
726	726	{
727	727	device_t *device = machine().device("konami2");
728		k007232_w(device, offset ^ 1, data);
	728	k007232_w(device, space, offset ^ 1, data);
729	729	}
730	730
731	731	READ8_MEMBER(wecleman_state::hotchase_3_k007232_r)
732	732	{
733	733	device_t *device = machine().device("konami3");
734		return k007232_r(device, offset ^ 1);
	734	return k007232_r(device, space, offset ^ 1);
735	735	}
736	736
737	737	WRITE8_MEMBER(wecleman_state::hotchase_3_k007232_w)
738	738	{
739	739	device_t *device = machine().device("konami3");
740		k007232_w(device, offset ^ 1, data);
	740	k007232_w(device, space, offset ^ 1, data);
741	741	}
742	742
743	743	static ADDRESS_MAP_START( hotchase_sound_map, AS_PROGRAM, 8, wecleman_state )

trunk/src/mame/drivers/crbaloon.c

r17961	r17962
167	167	machine().sound().system_enable((data & 0x02) ? TRUE : FALSE);
168	168
169	169	/* D2 - unlabeled - music enable */
170		crbaloon_audio_set_music_enable(discrete, 0, (data & 0x04) ? TRUE : FALSE);
	170	crbaloon_audio_set_music_enable(discrete, space, 0, (data & 0x04) ? TRUE : FALSE);
171	171
172	172	/* D3 - EXPLOSION */
173	173	crbaloon_audio_set_explosion_enable(sn, (data & 0x08) ? TRUE : FALSE);
r17961	r17962
179	179	crbaloon_audio_set_appear_enable(sn, (data & 0x20) ? TRUE : FALSE);
180	180
181	181	/* D6 - unlabeled - laugh enable */
182		crbaloon_audio_set_laugh_enable(discrete, 0, (data & 0x40) ? TRUE : FALSE);
	182	crbaloon_audio_set_laugh_enable(discrete, space, 0, (data & 0x40) ? TRUE : FALSE);
183	183
184	184	/* D7 - unlabeled - goes to PC3259 pin 16 */
185	185
r17961	r17962
339	339
340	340	void crbaloon_state::machine_reset()
341	341	{
342		address_space *space = machine().device("maincpu")->memory().space(AS_IO);
	342	address_space &space = *machine().device("maincpu")->memory().space(AS_IO);
343	343	device_t *discrete = machine().device("discrete");
344	344
345	345	pc3092_reset();
346		port_sound_w(*space, 0, 0);
347		crbaloon_audio_set_music_freq(discrete, 0, 0);
	346	port_sound_w(space, 0, 0);
	347	crbaloon_audio_set_music_freq(discrete, space, 0, 0);
348	348	}
349	349
350	350

trunk/src/mame/drivers/munchmo.c

r17961	r17962
74	74	READ8_MEMBER(munchmo_state::munchmo_ay1reset_r)
75	75	{
76	76	device_t *device = machine().device("ay1");
77		ay8910_reset_w(device,0,0);
	77	ay8910_reset_w(device,space,0,0);
78	78	return 0;
79	79	}
80	80
81	81	READ8_MEMBER(munchmo_state::munchmo_ay2reset_r)
82	82	{
83	83	device_t *device = machine().device("ay2");
84		ay8910_reset_w(device,0,0);
	84	ay8910_reset_w(device,space,0,0);
85	85	return 0;
86	86	}
87	87	/*************************************

trunk/src/mame/drivers/voyager.c

r17961	r17962
78	78	READ8_MEMBER(voyager_state::at_dma8237_2_r)
79	79	{
80	80	device_t *device = machine().device("dma8237_2");
81		return i8237_r(device, offset / 2);
	81	return i8237_r(device, space, offset / 2);
82	82	}
83	83
84	84	WRITE8_MEMBER(voyager_state::at_dma8237_2_w)
85	85	{
86	86	device_t *device = machine().device("dma8237_2");
87		i8237_w(device, offset / 2, data);
	87	i8237_w(device, space, offset / 2, data);
88	88	}
89	89
90	90	READ8_MEMBER(voyager_state::at_page8_r)
r17961	r17962
192	192	READ32_MEMBER(voyager_state::ide_r)
193	193	{
194	194	device_t *device = machine().device("ide");
195		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	195	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
196	196	}
197	197
198	198	WRITE32_MEMBER(voyager_state::ide_w)
199	199	{
200	200	device_t *device = machine().device("ide");
201		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	201	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
202	202	}
203	203
204	204
r17961	r17962
208	208	READ32_MEMBER(voyager_state::fdc_r)
209	209	{
210	210	device_t *device = machine().device("ide");
211		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	211	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
212	212	}
213	213
214	214	WRITE32_MEMBER(voyager_state::fdc_w)
215	215	{
216	216	device_t *device = machine().device("ide");
217	217	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
218		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	218	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
219	219	}
220	220
221	221

trunk/src/mame/drivers/centiped.c

r17961	r17962
736	736	WRITE8_MEMBER(centiped_state::caterplr_AY8910_w)
737	737	{
738	738	device_t *device = machine().device("pokey");
739		ay8910_address_w(device, 0, offset);
740		ay8910_data_w(device, 0, data);
	739	ay8910_address_w(device, space, 0, offset);
	740	ay8910_data_w(device, space, 0, data);
741	741	}
742	742
743	743	READ8_MEMBER(centiped_state::caterplr_AY8910_r)
744	744	{
745	745	device_t *device = machine().device("pokey");
746		ay8910_address_w(device, 0, offset);
747		return ay8910_r(device, 0);
	746	ay8910_address_w(device, space, 0, offset);
	747	return ay8910_r(device, space, 0);
748	748	}
749	749
750	750

trunk/src/mame/drivers/wgp.c

r17961	r17962
621	621	{
622	622
623	623	if (offset == 0)
624		tc0140syt_port_w(m_tc0140syt, 0, data & 0xff);
	624	tc0140syt_port_w(m_tc0140syt, space, 0, data & 0xff);
625	625	else if (offset == 1)
626		tc0140syt_comm_w(m_tc0140syt, 0, data & 0xff);
	626	tc0140syt_comm_w(m_tc0140syt, space, 0, data & 0xff);
627	627	}
628	628
629	629	READ16_MEMBER(wgp_state::wgp_sound_r)
630	630	{
631	631
632	632	if (offset == 1)
633		return ((tc0140syt_comm_r(m_tc0140syt, 0) & 0xff));
	633	return ((tc0140syt_comm_r(m_tc0140syt, space, 0) & 0xff));
634	634	else
635	635	return 0;
636	636	}

trunk/src/mame/drivers/metro.c

r17961	r17962
370	370	{
371	371	if (!BIT(data, 2))
372	372	{
373		ym2413_w(m_ymsnd, BIT(data, 1), m_porta);
	373	ym2413_w(m_ymsnd, space, BIT(data, 1), m_porta);
374	374	}
375	375	m_portb = data;
376	376	return;
r17961	r17962
412	412	if (!BIT(data, 2))
413	413	{
414	414	/* write */
415		ym2151_w(m_ymsnd, BIT(data, 1), m_porta);
	415	ym2151_w(m_ymsnd, space, BIT(data, 1), m_porta);
416	416	}
417	417
418	418	if (!BIT(data, 3))
419	419	{
420	420	/* read */
421		m_porta = ym2151_r(m_ymsnd, BIT(data, 1));
	421	m_porta = ym2151_r(m_ymsnd, space, BIT(data, 1));
422	422	}
423	423
424	424	m_portb = data;

trunk/src/mame/drivers/surpratk.c

r17961	r17962
36	36	return m_generic_paletteram_8[offset];
37	37	}
38	38	else if (m_videobank & 0x01)
39		return k053245_r(m_k053244, offset);
	39	return k053245_r(m_k053244, space, offset);
40	40	else
41	41	return m_ram[offset];
42	42	}
r17961	r17962
52	52	paletteram_xBBBBBGGGGGRRRRR_byte_be_w(space,offset,data);
53	53	}
54	54	else if (m_videobank & 0x01)
55		k053245_w(m_k053244, offset, data);
	55	k053245_w(m_k053244, space, offset, data);
56	56	else
57	57	m_ram[offset] = data;
58	58	}

trunk/src/mame/drivers/zaccaria.c

r17961	r17962
112	112
113	113	READ8_MEMBER(zaccaria_state::zaccaria_port0a_r)
114	114	{
115		return ay8910_r(machine().device((m_active_8910 == 0) ? "ay1" : "ay2"), 0);
	115	return ay8910_r(machine().device((m_active_8910 == 0) ? "ay1" : "ay2"), space, 0);
116	116	}
117	117
118	118	WRITE8_MEMBER(zaccaria_state::zaccaria_port0a_w)
r17961	r17962
127	127	if ((m_last_port0b & 0x02) == 0x02 && (data & 0x02) == 0x00)
128	128	{
129	129	/* bit 0 goes to the 8910 #0 BC1 pin */
130		ay8910_data_address_w(machine().device("ay1"), m_last_port0b, m_port0a);
	130	ay8910_data_address_w(machine().device("ay1"), space, m_last_port0b, m_port0a);
131	131	}
132	132	else if ((m_last_port0b & 0x02) == 0x00 && (data & 0x02) == 0x02)
133	133	{
r17961	r17962
139	139	if ((m_last_port0b & 0x08) == 0x08 && (data & 0x08) == 0x00)
140	140	{
141	141	/* bit 2 goes to the 8910 #1 BC1 pin */
142		ay8910_data_address_w(machine().device("ay2"), m_last_port0b >> 2, m_port0a);
	142	ay8910_data_address_w(machine().device("ay2"), space, m_last_port0b >> 2, m_port0a);
143	143	}
144	144	else if ((m_last_port0b & 0x08) == 0x00 && (data & 0x08) == 0x08)
145	145	{

trunk/src/mame/drivers/atarisy2.c

r17961	r17962
764	764	{
765	765	if (m_has_tms5220)
766	766	{
767		tms5220_data_w(machine().device("tms"), 0, data);
	767	tms5220_data_w(machine().device("tms"), space, 0, data);
768	768	}
769	769	}
770	770

trunk/src/mame/drivers/skydiver.c

r17961	r17962
149	149	device_t *discrete = device->machine().device("discrete");
150	150
151	151	/* Convert range data to divide value and write to sound */
152		discrete_sound_w(discrete, SKYDIVER_RANGE_DATA, (0x01 << (~state->m_videoram[0x394] & 0x07)) & 0xff);   // Range 0-2
	152	address_space &space = *device->machine().firstcpu->space(AS_PROGRAM);
	153	discrete_sound_w(discrete, space, SKYDIVER_RANGE_DATA, (0x01 << (~state->m_videoram[0x394] & 0x07)) & 0xff);   // Range 0-2
153	154
154		discrete_sound_w(discrete, SKYDIVER_RANGE3_EN,  state->m_videoram[0x394] & 0x08);      // Range 3 - note disable
155		discrete_sound_w(discrete, SKYDIVER_NOTE_DATA, ~state->m_videoram[0x395] & 0xff);      // Note - freq
156		discrete_sound_w(discrete, SKYDIVER_NOISE_DATA,  state->m_videoram[0x396] & 0x0f);   // NAM - Noise Amplitude
	155	discrete_sound_w(discrete, space, SKYDIVER_RANGE3_EN,  state->m_videoram[0x394] & 0x08);      // Range 3 - note disable
	156	discrete_sound_w(discrete, space, SKYDIVER_NOTE_DATA, ~state->m_videoram[0x395] & 0xff);      // Note - freq
	157	discrete_sound_w(discrete, space, SKYDIVER_NOISE_DATA,  state->m_videoram[0x396] & 0x0f);   // NAM - Noise Amplitude
157	158
158	159	if (state->m_nmion)
159	160	device->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
r17961	r17962
170	171	WRITE8_MEMBER(skydiver_state::skydiver_sound_enable_w)
171	172	{
172	173	device_t *device = machine().device("discrete");
173		discrete_sound_w(device, SKYDIVER_SOUND_EN, offset);
	174	discrete_sound_w(device, space, SKYDIVER_SOUND_EN, offset);
174	175	}
175	176
176	177	WRITE8_MEMBER(skydiver_state::skydiver_whistle_w)
177	178	{
178	179	device_t *device = machine().device("discrete");
179		discrete_sound_w(device, NODE_RELATIVE(SKYDIVER_WHISTLE1_EN, (offset >> 1)), offset & 0x01);
	180	discrete_sound_w(device, space, NODE_RELATIVE(SKYDIVER_WHISTLE1_EN, (offset >> 1)), offset & 0x01);
180	181	}
181	182
182	183

trunk/src/mame/drivers/warpwarp.c

r17961	r17962
184	184	/* n.c. */
185	185	break;
186	186	case 3:
187		geebee_sound_w(machine().device("geebee"),0,data);
	187	geebee_sound_w(machine().device("geebee"),space,0,data);
188	188	break;
189	189	}
190	190	}
r17961	r17962
268	268	m_ball_v = data;
269	269	break;
270	270	case 2:
271		warpwarp_sound_w(machine().device("warpwarp"),0,data);
	271	warpwarp_sound_w(machine().device("warpwarp"),space,0,data);
272	272	break;
273	273	case 3:
274	274	watchdog_reset_w(space,0,data);

trunk/src/mame/drivers/seta.c

r17961	r17962
2280	2280	WRITE16_MEMBER(seta_state::setaroul_spriteylow_w)
2281	2281	{
2282	2282	seta001_device *dev = machine().device<seta001_device>("spritegen");
2283		if ((offset&1)==0) spriteylow_w8(dev, offset>>1, (data & 0xff00) >> 8);
	2283	if ((offset&1)==0) spriteylow_w8(dev, space, offset>>1, (data & 0xff00) >> 8);
2284	2284	}
2285	2285
2286	2286	WRITE16_MEMBER(seta_state::setaroul_spritectrl_w)
2287	2287	{
2288	2288	seta001_device *dev = machine().device<seta001_device>("spritegen");
2289		if ((offset&1)==0) spritectrl_w8(dev, offset>>1, (data & 0xff00) >> 8);
	2289	if ((offset&1)==0) spritectrl_w8(dev, space, offset>>1, (data & 0xff00) >> 8);
2290	2290	}
2291	2291
2292	2292	WRITE16_MEMBER(seta_state::setaroul_spritecode_w)
2293	2293	{
2294	2294	seta001_device *dev = machine().device<seta001_device>("spritegen");
2295		if ((offset&1)==1) spritecodelow_w8(dev, offset>>1, (data & 0xff00) >> 8);
2296		if ((offset&1)==0) spritecodehigh_w8(dev, offset>>1, (data & 0xff00) >> 8);
	2295	if ((offset&1)==1) spritecodelow_w8(dev, space, offset>>1, (data & 0xff00) >> 8);
	2296	if ((offset&1)==0) spritecodehigh_w8(dev, space, offset>>1, (data & 0xff00) >> 8);
2297	2297	}
2298	2298
2299	2299	READ16_MEMBER(seta_state::setaroul_spritecode_r)
r17961	r17962
2301	2301	UINT16 ret;
2302	2302	seta001_device *dev = machine().device<seta001_device>("spritegen");
2303	2303	if ((offset&1)==1)
2304		ret = spritecodelow_r8(dev, offset>>1);
	2304	ret = spritecodelow_r8(dev, space, offset>>1);
2305	2305	else
2306		ret = spritecodehigh_r8(dev, offset>>1);
	2306	ret = spritecodehigh_r8(dev, space, offset>>1);
2307	2307	return ret << 8;
2308	2308	}
2309	2309

trunk/src/mame/drivers/laserbat.c

r17961	r17962
582	582	READ8_MEMBER(laserbat_state::zaccaria_port0a_r)
583	583	{
584	584	device_t *ay = (m_active_8910 == 0) ? m_ay1 : m_ay2;
585		return ay8910_r(ay, 0);
	585	return ay8910_r(ay, space, 0);
586	586	}
587	587
588	588	WRITE8_MEMBER(laserbat_state::zaccaria_port0a_w)
r17961	r17962
596	596	if ((m_last_port0b & 0x02) == 0x02 && (data & 0x02) == 0x00)
597	597	{
598	598	/* bit 0 goes to the 8910 #0 BC1 pin */
599		ay8910_data_address_w(m_ay1, m_last_port0b >> 0, m_port0a);
	599	ay8910_data_address_w(m_ay1, space, m_last_port0b >> 0, m_port0a);
600	600	}
601	601	else if ((m_last_port0b & 0x02) == 0x00 && (data & 0x02) == 0x02)
602	602	{
r17961	r17962
608	608	if ((m_last_port0b & 0x08) == 0x08 && (data & 0x08) == 0x00)
609	609	{
610	610	/* bit 2 goes to the 8910 #1 BC1 pin */
611		ay8910_data_address_w(m_ay2, m_last_port0b >> 2, m_port0a);
	611	ay8910_data_address_w(m_ay2, space, m_last_port0b >> 2, m_port0a);
612	612	}
613	613	else if ((m_last_port0b & 0x08) == 0x00 && (data & 0x08) == 0x08)
614	614	{

trunk/src/mame/drivers/queen.c

r17961	r17962
380	380	READ32_MEMBER(queen_state::ide_r)
381	381	{
382	382	device_t *device = machine().device("ide");
383		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	383	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
384	384	}
385	385
386	386	WRITE32_MEMBER(queen_state::ide_w)
387	387	{
388	388	device_t *device = machine().device("ide");
389		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	389	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
390	390	}
391	391
392	392	READ32_MEMBER(queen_state::fdc_r)
393	393	{
394	394	device_t *device = machine().device("ide");
395		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	395	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
396	396	}
397	397
398	398	WRITE32_MEMBER(queen_state::fdc_w)
399	399	{
400	400	device_t *device = machine().device("ide");
401	401	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
402		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	402	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
403	403	}
404	404
405	405	READ8_MEMBER(queen_state::at_page8_r)
r17961	r17962
448	448	READ8_MEMBER(queen_state::at_dma8237_2_r)
449	449	{
450	450	device_t *device = machine().device("dma8237_2");
451		return i8237_r(device, offset / 2);
	451	return i8237_r(device, space, offset / 2);
452	452	}
453	453
454	454	WRITE8_MEMBER(queen_state::at_dma8237_2_w)
455	455	{
456	456	device_t *device = machine().device("dma8237_2");
457		i8237_w(device, offset / 2, data);
	457	i8237_w(device, space, offset / 2, data);
458	458	}
459	459
460	460	WRITE_LINE_MEMBER(queen_state::pc_dma_hrq_changed)

trunk/src/mame/drivers/bishi.c

r17961	r17962
138	138	if (m_cur_control2 & 0x1000)
139	139	ouroffs += 4;
140	140
141		return k056832_bishi_rom_word_r(m_k056832, ouroffs, mem_mask);
	141	return k056832_bishi_rom_word_r(m_k056832, space, ouroffs, mem_mask);
142	142	}
143	143
144	144	static ADDRESS_MAP_START( main_map, AS_PROGRAM, 16, bishi_state )

trunk/src/mame/drivers/vmetal.c

r17961	r17962
239	239	16   002a 000e 0083 00ee 000f 0069 0069   0e832a-0f69ee
240	240	*/
241	241
242		es8712_w(device, offset, data);
	242	es8712_w(device, space, offset, data);
243	243	logerror("%s:Writing %04x to ES8712 offset %02x\n", machine().describe_context(), data, offset);
244	244	}
245	245

trunk/src/mame/drivers/mainevt.c

r17961	r17962
140	140	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
141	141	{
142	142	if (offset >= 0x3800 && offset < 0x3808)
143		return k051937_r(m_k051960, offset - 0x3800);
	143	return k051937_r(m_k051960, space, offset - 0x3800);
144	144	else if (offset < 0x3c00)
145		return k052109_r(m_k052109, offset);
	145	return k052109_r(m_k052109, space, offset);
146	146	else
147		return k051960_r(m_k051960, offset - 0x3c00);
	147	return k051960_r(m_k051960, space, offset - 0x3c00);
148	148	}
149	149	else
150		return k052109_r(m_k052109, offset);
	150	return k052109_r(m_k052109, space, offset);
151	151	}
152	152
153	153	WRITE8_MEMBER(mainevt_state::k052109_051960_w)
154	154	{
155	155
156	156	if (offset >= 0x3800 && offset < 0x3808)
157		k051937_w(m_k051960, offset - 0x3800, data);
	157	k051937_w(m_k051960, space, offset - 0x3800, data);
158	158	else if (offset < 0x3c00)
159		k052109_w(m_k052109, offset, data);
	159	k052109_w(m_k052109, space, offset, data);
160	160	else
161		k051960_w(m_k051960, offset - 0x3c00, data);
	161	k051960_w(m_k051960, space, offset - 0x3c00, data);
162	162	}
163	163
164	164

trunk/src/mame/drivers/taito_h.c

r17961	r17962
183	183	{
184	184	/* Bypass TC0220IOC controller for analog input */
185	185
186		UINT8   port = tc0220ioc_port_r(m_tc0220ioc, 0);   /* read port number */
	186	UINT8   port = tc0220ioc_port_r(m_tc0220ioc, space, 0);   /* read port number */
187	187
188	188	switch( port )
189	189	{
r17961	r17962
224	224	return 0x00;
225	225
226	226	default:
227		return tc0220ioc_portreg_r(m_tc0220ioc, offset);
	227	return tc0220ioc_portreg_r(m_tc0220ioc, space, offset);
228	228	}
229	229	}
230	230

trunk/src/mame/drivers/slapshot.c

r17961	r17962
198	198	(ioport("SERVICE")->read() & 0x10))  << 8;   /* IN3 + service switch */
199	199
200	200	default:
201		return tc0640fio_r(m_tc0640fio, offset) << 8;
	201	return tc0640fio_r(m_tc0640fio, space, offset) << 8;
202	202	}
203	203	}
204	204
r17961	r17962
259	259	WRITE16_MEMBER(slapshot_state::slapshot_msb_sound_w)
260	260	{
261	261	if (offset == 0)
262		tc0140syt_port_w(m_tc0140syt, 0, (data >> 8) & 0xff);
	262	tc0140syt_port_w(m_tc0140syt, space, 0, (data >> 8) & 0xff);
263	263	else if (offset == 1)
264		tc0140syt_comm_w(m_tc0140syt, 0, (data >> 8) & 0xff);
	264	tc0140syt_comm_w(m_tc0140syt, space, 0, (data >> 8) & 0xff);
265	265
266	266	#ifdef MAME_DEBUG
267	267	if (data & 0xff)
r17961	r17962
272	272	READ16_MEMBER(slapshot_state::slapshot_msb_sound_r)
273	273	{
274	274	if (offset == 1)
275		return ((tc0140syt_comm_r(m_tc0140syt, 0) & 0xff) << 8);
	275	return ((tc0140syt_comm_r(m_tc0140syt, space, 0) & 0xff) << 8);
276	276	else
277	277	return 0;
278	278	}

trunk/src/mame/drivers/vsnes.c

r17961	r17962
196	196	READ8_MEMBER(vsnes_state::psg1_4015_r)
197	197	{
198	198	device_t *device = machine().device("nes1");
199		return nes_psg_r(device, 0x15);
	199	return nes_psg_r(device, space, 0x15);
200	200	}
201	201
202	202	WRITE8_MEMBER(vsnes_state::psg1_4015_w)
203	203	{
204	204	device_t *device = machine().device("nes1");
205		nes_psg_w(device, 0x15, data);
	205	nes_psg_w(device, space, 0x15, data);
206	206	}
207	207
208	208	WRITE8_MEMBER(vsnes_state::psg1_4017_w)
209	209	{
210	210	device_t *device = machine().device("nes1");
211		nes_psg_w(device, 0x17, data);
	211	nes_psg_w(device, space, 0x17, data);
212	212	}
213	213
214	214	READ8_MEMBER(vsnes_state::psg2_4015_r)
215	215	{
216	216	device_t *device = machine().device("nes2");
217		return nes_psg_r(device, 0x15);
	217	return nes_psg_r(device, space, 0x15);
218	218	}
219	219
220	220	WRITE8_MEMBER(vsnes_state::psg2_4015_w)
221	221	{
222	222	device_t *device = machine().device("nes2");
223		nes_psg_w(device, 0x15, data);
	223	nes_psg_w(device, space, 0x15, data);
224	224	}
225	225
226	226	WRITE8_MEMBER(vsnes_state::psg2_4017_w)
227	227	{
228	228	device_t *device = machine().device("nes2");
229		nes_psg_w(device, 0x17, data);
	229	nes_psg_w(device, space, 0x17, data);
230	230	}
231	231	static ADDRESS_MAP_START( vsnes_cpu1_map, AS_PROGRAM, 8, vsnes_state )
232	232	AM_RANGE(0x0000, 0x07ff) AM_MIRROR(0x1800) AM_RAM AM_SHARE("work_ram")

trunk/src/mame/drivers/cninja.c

r17961	r17962
149	149	WRITE16_MEMBER(cninja_state::cninja_pf12_control_w)
150	150	{
151	151	machine().primary_screen->update_partial(machine().primary_screen->vpos());
152		deco16ic_pf_control_w(m_deco_tilegen1, offset, data, mem_mask);
	152	deco16ic_pf_control_w(m_deco_tilegen1, space, offset, data, mem_mask);
153	153	}
154	154
155	155
156	156	WRITE16_MEMBER(cninja_state::cninja_pf34_control_w)
157	157	{
158	158	machine().primary_screen->update_partial(machine().primary_screen->vpos());
159		deco16ic_pf_control_w(m_deco_tilegen2, offset, data, mem_mask);
	159	deco16ic_pf_control_w(m_deco_tilegen2, space, offset, data, mem_mask);
160	160	}
161	161
162	162

trunk/src/mame/drivers/dogfgt.c

r17961	r17962
46	46
47	47	/* bit 5 goes to 8910 #0 BDIR pin  */
48	48	if ((m_last_snd_ctrl & 0x20) == 0x20 && (data & 0x20) == 0x00)
49		ay8910_data_address_w(machine().device("ay1"), m_last_snd_ctrl >> 4, m_soundlatch);
	49	ay8910_data_address_w(machine().device("ay1"), space, m_last_snd_ctrl >> 4, m_soundlatch);
50	50
51	51	/* bit 7 goes to 8910 #1 BDIR pin  */
52	52	if ((m_last_snd_ctrl & 0x80) == 0x80 && (data & 0x80) == 0x00)
53		ay8910_data_address_w(machine().device("ay2"), m_last_snd_ctrl >> 6, m_soundlatch);
	53	ay8910_data_address_w(machine().device("ay2"), space, m_last_snd_ctrl >> 6, m_soundlatch);
54	54
55	55	m_last_snd_ctrl = data;
56	56	}

trunk/src/mame/drivers/m63.c

r17961	r17962
390	390	{
391	391
392	392	if ((m_p2 & 0xf0) == 0xe0)
393		ay8910_address_w(m_ay1, 0, offset);
	393	ay8910_address_w(m_ay1, space, 0, offset);
394	394	else if ((m_p2 & 0xf0) == 0xa0)
395		ay8910_data_w(m_ay1, 0, offset);
	395	ay8910_data_w(m_ay1, space, 0, offset);
396	396	else if (m_ay2 != NULL && (m_p1 & 0xe0) == 0x60)
397		ay8910_address_w(m_ay2, 0, offset);
	397	ay8910_address_w(m_ay2, space, 0, offset);
398	398	else if (m_ay2 != NULL && (m_p1 & 0xe0) == 0x40)
399		ay8910_data_w(m_ay2, 0, offset);
	399	ay8910_data_w(m_ay2, space, 0, offset);
400	400	else if ((m_p2 & 0xf0) == 0x70 )
401	401	m_sound_status = offset;
402	402	}

trunk/src/mame/drivers/dambustr.c

r17961	r17962
73	73	device_t *device = machine().device("GAL_AUDIO");
74	74	if (data != m_noise_data) {
75	75	m_noise_data = data;
76		galaxian_noise_enable_w(device, offset, data);
	76	galaxian_noise_enable_w(device, space, offset, data);
77	77	}
78	78	}
79	79

trunk/src/mame/drivers/gbusters.c

r17961	r17962
127	127	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
128	128	{
129	129	if (offset >= 0x3800 && offset < 0x3808)
130		return k051937_r(m_k051960, offset - 0x3800);
	130	return k051937_r(m_k051960, space, offset - 0x3800);
131	131	else if (offset < 0x3c00)
132		return k052109_r(m_k052109, offset);
	132	return k052109_r(m_k052109, space, offset);
133	133	else
134		return k051960_r(m_k051960, offset - 0x3c00);
	134	return k051960_r(m_k051960, space, offset - 0x3c00);
135	135	}
136	136	else
137		return k052109_r(m_k052109, offset);
	137	return k052109_r(m_k052109, space, offset);
138	138	}
139	139
140	140	WRITE8_MEMBER(gbusters_state::k052109_051960_w)
141	141	{
142	142
143	143	if (offset >= 0x3800 && offset < 0x3808)
144		k051937_w(m_k051960, offset - 0x3800, data);
	144	k051937_w(m_k051960, space, offset - 0x3800, data);
145	145	else if (offset < 0x3c00)
146		k052109_w(m_k052109, offset, data);
	146	k052109_w(m_k052109, space, offset, data);
147	147	else
148		k051960_w(m_k051960, offset - 0x3c00, data);
	148	k051960_w(m_k051960, space, offset - 0x3c00, data);
149	149	}
150	150
151	151

trunk/src/mame/drivers/bogeyman.c

r17961	r17962
34	34
35	35	// bit 5 goes to 8910 #0 BDIR pin
36	36	if ((m_last_write & 0x20) == 0x20 && (data & 0x20) == 0x00)
37		ay8910_data_address_w(machine().device("ay1"), m_last_write >> 4, m_psg_latch);
	37	ay8910_data_address_w(machine().device("ay1"), space, m_last_write >> 4, m_psg_latch);
38	38
39	39	// bit 7 goes to 8910 #1 BDIR pin
40	40	if ((m_last_write & 0x80) == 0x80 && (data & 0x80) == 0x00)
41		ay8910_data_address_w(machine().device("ay2"), m_last_write >> 6, m_psg_latch);
	41	ay8910_data_address_w(machine().device("ay2"), space, m_last_write >> 6, m_psg_latch);
42	42
43	43	m_last_write = data;
44	44	}

trunk/src/mame/drivers/m72.c

r17961	r17962
437	437	static INTERRUPT_GEN(fake_nmi)
438	438	{
439	439	m72_state *state = device->machine().driver_data<m72_state>();
440		int sample = m72_sample_r(state->m_audio,0);
	440	address_space &space = state->generic_space();
	441	int sample = m72_sample_r(state->m_audio,space,0);
441	442	if (sample)
442		m72_sample_w(state->m_audio,0,sample);
	443	m72_sample_w(state->m_audio,space,0,sample);
443	444	}
444	445
445	446

trunk/src/mame/drivers/r2dtank.c

r17961	r17962
175	175	UINT8 ret = 0;
176	176
177	177	if (m_AY8910_selected & 0x08)
178		ret = ay8910_r(machine().device("ay1"), 0);
	178	ret = ay8910_r(machine().device("ay1"), space, 0);
179	179
180	180	if (m_AY8910_selected & 0x10)
181		ret = ay8910_r(machine().device("ay2"), 0);
	181	ret = ay8910_r(machine().device("ay2"), space, 0);
182	182
183	183	return ret;
184	184	}
r17961	r17962
187	187	WRITE8_MEMBER(r2dtank_state::AY8910_port_w)
188	188	{
189	189	if (m_AY8910_selected & 0x08)
190		ay8910_data_address_w(machine().device("ay1"), m_AY8910_selected >> 2, data);
	190	ay8910_data_address_w(machine().device("ay1"), space, m_AY8910_selected >> 2, data);
191	191
192	192	if (m_AY8910_selected & 0x10)
193		ay8910_data_address_w(machine().device("ay2"), m_AY8910_selected >> 2, data);
	193	ay8910_data_address_w(machine().device("ay2"), space, m_AY8910_selected >> 2, data);
194	194	}
195	195
196	196
r17961	r17962
252	252	1,               /* A pin - driven by the CRTC */
253	253	1,               /* B pin - pulled high */
254	254	1,               /* Clear pin - pulled high */
255		ttl74123_output_changed
	255	DEVCB_HANDLER(ttl74123_output_changed)
256	256	};
257	257
258	258
r17961	r17962
387	387
388	388	WRITE_LINE_MEMBER(r2dtank_state::display_enable_changed)
389	389	{
390		ttl74123_a_w(machine().device("74123"), 0, state);
	390	address_space &space = generic_space();
	391	ttl74123_a_w(machine().device("74123"), space, 0, state);
391	392	}
392	393
393	394

trunk/src/mame/drivers/topspeed.c

r17961	r17962
359	359
360	360	READ8_MEMBER(topspeed_state::topspeed_input_bypass_r)
361	361	{
362		UINT8 port = tc0220ioc_port_r(m_tc0220ioc, 0);   /* read port number */
	362	UINT8 port = tc0220ioc_port_r(m_tc0220ioc, space, 0);   /* read port number */
363	363	UINT16 steer = 0xff80 + ioport("STEER")->read_safe(0);
364	364
365	365	switch (port)
r17961	r17962
371	371	return steer >> 8;
372	372
373	373	default:
374		return tc0220ioc_portreg_r(m_tc0220ioc, offset);
	374	return tc0220ioc_portreg_r(m_tc0220ioc, space, offset);
375	375	}
376	376	}
377	377
r17961	r17962
424	424	static WRITE8_DEVICE_HANDLER( topspeed_tc0140syt_comm_w )
425	425	{
426	426	device->machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, PULSE_LINE);
427		tc0140syt_comm_w(device, 0, data);
	427	tc0140syt_comm_w(device, space, 0, data);
428	428	}
429	429
430	430	static void topspeed_msm5205_clock( device_t *device, int chip )

trunk/src/mame/drivers/amspdwy.c

r17961	r17962
65	65	READ8_MEMBER(amspdwy_state::amspdwy_sound_r)
66	66	{
67	67	device_t *device = machine().device("ymsnd");
68		return (ym2151_status_port_r(device, 0) & ~ 0x30) | machine().root_device().ioport("IN0")->read();
	68	return (ym2151_status_port_r(device, space, 0) & ~ 0x30) | machine().root_device().ioport("IN0")->read();
69	69	}
70	70
71	71	WRITE8_MEMBER(amspdwy_state::amspdwy_sound_w)

trunk/src/mame/drivers/aristmk4.c

r17961	r17962
649	649
650	650	if (m_ay8910_1&0x03) // SW1 read.
651	651	{
652		psg_ret = ay8910_r(machine().device("ay1"), 0);
	652	psg_ret = ay8910_r(machine().device("ay1"), space, 0);
653	653	//logerror("PSG porta ay1 returned %02X\n",psg_ret);
654	654	}
655	655
656	656	else if (m_ay8910_2&0x03) //i don't think we read anything from Port A on ay2, Can be removed once game works ok.
657	657	{
658		psg_ret = ay8910_r(machine().device("ay2"), 0);
	658	psg_ret = ay8910_r(machine().device("ay2"), space, 0);
659	659	//logerror("PSG porta ay2 returned %02X\n",psg_ret);
660	660	}
661	661	return psg_ret;
r17961	r17962
750	750	break;
751	751	case 0x06:   //WRITE
752	752	{
753		ay8910_data_w( machine().device("ay1"), 0 , m_psg_data );
	753	ay8910_data_w( machine().device("ay1"), space, 0 , m_psg_data );
754	754	//logerror("VIA Port A write data ay1: %02X\n",m_psg_data);
755	755	break;
756	756	}
757	757	case 0x07:   //LATCH Address (set register)
758	758	{
759		ay8910_address_w( machine().device("ay1"), 0 , m_psg_data );
	759	ay8910_address_w( machine().device("ay1"), space, 0 , m_psg_data );
760	760	//logerror("VIA Port B write register ay1: %02X\n",m_psg_data);
761	761	break;
762	762	}
r17961	r17962
777	777	break;
778	778	case 0x06:   //WRITE
779	779	{
780		ay8910_data_w( machine().device("ay2"), 0 , m_psg_data );
	780	ay8910_data_w( machine().device("ay2"), space, 0 , m_psg_data );
781	781	//logerror("VIA Port A write data ay2: %02X\n",m_psg_data);
782	782	break;
783	783	}
784	784	case 0x07:   //LATCH Address (set register)
785	785	{
786		ay8910_address_w( machine().device("ay2"), 0 , m_psg_data );
	786	ay8910_address_w( machine().device("ay2"), space, 0 , m_psg_data );
787	787	//logerror("VIA Port B write register ay2: %02X\n",m_psg_data);
788	788	break;
789	789	}

trunk/src/mame/drivers/thunderx.c

r17961	r17962
373	373	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
374	374	{
375	375	if (offset >= 0x3800 && offset < 0x3808)
376		return k051937_r(m_k051960, offset - 0x3800);
	376	return k051937_r(m_k051960, space, offset - 0x3800);
377	377	else if (offset < 0x3c00)
378		return k052109_r(m_k052109, offset);
	378	return k052109_r(m_k052109, space, offset);
379	379	else
380		return k051960_r(m_k051960, offset - 0x3c00);
	380	return k051960_r(m_k051960, space, offset - 0x3c00);
381	381	}
382	382	else
383		return k052109_r(m_k052109, offset);
	383	return k052109_r(m_k052109, space, offset);
384	384	}
385	385
386	386	WRITE8_MEMBER(thunderx_state::k052109_051960_w)
387	387	{
388	388
389	389	if (offset >= 0x3800 && offset < 0x3808)
390		k051937_w(m_k051960, offset - 0x3800, data);
	390	k051937_w(m_k051960, space, offset - 0x3800, data);
391	391	else if (offset < 0x3c00)
392		k052109_w(m_k052109, offset, data);
	392	k052109_w(m_k052109, space, offset, data);
393	393	else
394		k051960_w(m_k051960, offset - 0x3c00, data);
	394	k051960_w(m_k051960, space, offset - 0x3c00, data);
395	395	}
396	396
397	397	/***************************************************************************/

trunk/src/mame/drivers/videopin.c

r17961	r17962
155	155	coin_lockout_global_w(machine(), ~data & 0x08);
156	156
157	157	/* Convert octave data to divide value and write to sound */
158		discrete_sound_w(device, VIDEOPIN_OCTAVE_DATA, (0x01 << (~data & 0x07)) & 0xfe);
	158	discrete_sound_w(device, space, VIDEOPIN_OCTAVE_DATA, (0x01 << (~data & 0x07)) & 0xfe);
159	159	}
160	160
161	161
r17961	r17962
173	173
174	174	coin_counter_w(machine(), 0, data & 0x10);
175	175
176		discrete_sound_w(device, VIDEOPIN_BELL_EN, data & 0x40);   // Bell
177		discrete_sound_w(device, VIDEOPIN_BONG_EN, data & 0x20);   // Bong
178		discrete_sound_w(device, VIDEOPIN_ATTRACT_EN, data & 0x80);   // Attract
179		discrete_sound_w(device, VIDEOPIN_VOL_DATA, data & 0x07);      // Vol0,1,2
	176	discrete_sound_w(device, space, VIDEOPIN_BELL_EN, data & 0x40);   // Bell
	177	discrete_sound_w(device, space, VIDEOPIN_BONG_EN, data & 0x20);   // Bong
	178	discrete_sound_w(device, space, VIDEOPIN_ATTRACT_EN, data & 0x80);   // Attract
	179	discrete_sound_w(device, space, VIDEOPIN_VOL_DATA, data & 0x07);      // Vol0,1,2
180	180	}
181	181
182	182
r17961	r17962
184	184	{
185	185	device_t *device = machine().device("discrete");
186	186	/* note data */
187		discrete_sound_w(device, VIDEOPIN_NOTE_DATA, ~data &0xff);
	187	discrete_sound_w(device, space, VIDEOPIN_NOTE_DATA, ~data &0xff);
188	188	}
189	189
190	190

trunk/src/mame/drivers/cd32.c

r17961	r17962
92	92	/* bit 2 = Power Led on Amiga */
93	93	set_led_status(machine(), 0, (data & 2) ? 0 : 1);
94	94
95		handle_cd32_joystick_cia(machine(), data, mos6526_r(device, 2));
	95	handle_cd32_joystick_cia(machine(), data, mos6526_r(device, space, 2));
96	96	}
97	97
98	98	/*************************************

trunk/src/mame/drivers/ultratnk.c

r17961	r17962
130	130	WRITE8_MEMBER(ultratnk_state::ultratnk_fire_1_w)
131	131	{
132	132	device_t *device = machine().device("discrete");
133		discrete_sound_w(device, ULTRATNK_FIRE_EN_1, offset & 1);
	133	discrete_sound_w(device, space, ULTRATNK_FIRE_EN_1, offset & 1);
134	134	}
135	135	WRITE8_MEMBER(ultratnk_state::ultratnk_fire_2_w)
136	136	{
137	137	device_t *device = machine().device("discrete");
138		discrete_sound_w(device, ULTRATNK_FIRE_EN_2, offset & 1);
	138	discrete_sound_w(device, space, ULTRATNK_FIRE_EN_2, offset & 1);
139	139	}
140	140	WRITE8_MEMBER(ultratnk_state::ultratnk_attract_w)
141	141	{
142	142	device_t *device = machine().device("discrete");
143		discrete_sound_w(device, ULTRATNK_ATTRACT_EN, data & 1);
	143	discrete_sound_w(device, space, ULTRATNK_ATTRACT_EN, data & 1);
144	144	}
145	145	WRITE8_MEMBER(ultratnk_state::ultratnk_explosion_w)
146	146	{
147	147	device_t *device = machine().device("discrete");
148		discrete_sound_w(device, ULTRATNK_EXPLOSION_DATA, data & 15);
	148	discrete_sound_w(device, space, ULTRATNK_EXPLOSION_DATA, data & 15);
149	149	}
150	150
151	151

trunk/src/mame/drivers/m90.c

r17961	r17962
680	680	static INTERRUPT_GEN( fake_nmi )
681	681	{
682	682	m90_state *state = device->machine().driver_data<m90_state>();
683		int sample = m72_sample_r(state->m_audio,0);
	683	address_space &space = *device->machine().firstcpu->space(AS_PROGRAM);
	684	int sample = m72_sample_r(state->m_audio,space,0);
684	685	if (sample)
685		m72_sample_w(state->m_audio,0,sample);
	686	m72_sample_w(state->m_audio,space,0,sample);
686	687	}
687	688
688	689	static INTERRUPT_GEN( bomblord_fake_nmi )
689	690	{
690	691	m90_state *state = device->machine().driver_data<m90_state>();
691		int sample = m72_sample_r(state->m_audio,0);
	692	address_space &space = *device->machine().firstcpu->space(AS_PROGRAM);
	693	int sample = m72_sample_r(state->m_audio,space,0);
692	694	if (sample != 0x80)
693		m72_sample_w(state->m_audio,0,sample);
	695	m72_sample_w(state->m_audio,space,0,sample);
694	696	}
695	697
696	698	static INTERRUPT_GEN( m90_interrupt )

trunk/src/mame/drivers/vega.c

r17961	r17962
167	167	case 1: /* 04-07 */
168	168	{
169	169	/* AY 3-8910 */
170		ay8910_address_w(m_ay8910, 0, offset);
	170	ay8910_address_w(m_ay8910, space, 0, offset);
171	171	}
172	172	break;
173	173
r17961	r17962
182	182	else
183	183	{
184	184	//register w ?
185		ins8154_w(m_ins8154,offset&0x7f,data);
	185	ins8154_w(m_ins8154,space,offset&0x7f,data);
186	186	}
187	187	}
188	188	break;
r17961	r17962
296	296	case 1: /* 04-07 */
297	297	{
298	298	/* AY 3-8910 */
299		ay8910_data_w(m_ay8910, 0, offset);
	299	ay8910_data_w(m_ay8910, space, 0, offset);
300	300	return 0xff;//mame_rand(space->machine);
301	301
302	302	}
r17961	r17962
313	313	else
314	314	{
315	315	//register r ?
316		return ins8154_r(m_ins8154,offset&0x7f);
	316	return ins8154_r(m_ins8154,space,offset&0x7f);
317	317	}
318	318
319	319	}

trunk/src/mame/drivers/bfm_sc4h.c

r17961	r17962
192	192	return 0x0000;//space.machine().rand();;
193	193
194	194	case 0x1244:
195		return ymz280b_r(m_ymz,0);
	195	return ymz280b_r(m_ymz,space,0);
196	196
197	197	case 0x1246:
198		return ymz280b_r(m_ymz,1);
	198	return ymz280b_r(m_ymz,space,1);
199	199
200	200	default:
201	201	logerror("%08x maincpu read access offset %08x mem_mask %04x cs %d (LAMPS etc.)\n", pc, offset*2, mem_mask, cs);
r17961	r17962
215	215	if ((offset>=base) && (offset<end))
216	216	{
217	217	offset-=base;
218		return duart68681_r(m_duart,offset);
	218	return duart68681_r(m_duart,space,offset);
219	219	}
220	220	else
221	221	{
r17961	r17962
336	336	break;
337	337
338	338	case 0x1248:
339		ymz280b_w(m_ymz,0, data & 0xff);
	339	ymz280b_w(m_ymz,space,0, data & 0xff);
340	340	break;
341	341
342	342	case 0x124a:
343		ymz280b_w(m_ymz,1, data & 0xff);
	343	ymz280b_w(m_ymz,space,1, data & 0xff);
344	344	break;
345	345
346	346	case 0x1330:
r17961	r17962
367	367	if ((offset>=base) && (offset<end))
368	368	{
369	369	offset-=base;
370		duart68681_w(m_duart,offset,data&0x00ff);
	370	duart68681_w(m_duart,space,offset,data&0x00ff);
371	371	}
372	372	else
373	373	{

trunk/src/mame/drivers/djmain.c

r17961	r17962
208	208	{
209	209	device_t *k056832 = machine().device("k056832");
210	210	UINT8 *mem8 = memregion("gfx2")->base();
211		int bank = k056832_word_r(k056832, 0x34/2, 0xffff);
	211	int bank = k056832_word_r(k056832, space, 0x34/2, 0xffff);
212	212
213	213	offset *= 2;
214	214
r17961	r17962
280	280	{
281	281	device_t *device = machine().device("ide");
282	282	if (ACCESSING_BITS_0_7)
283		return ide_controller16_r(device, IDE_STD_OFFSET + offset, 0xff00) >> 8;
	283	return ide_controller16_r(device, space, IDE_STD_OFFSET + offset, 0xff00) >> 8;
284	284	else
285		return ide_controller16_r(device, IDE_STD_OFFSET + offset, 0xffff) << 16;
	285	return ide_controller16_r(device, space, IDE_STD_OFFSET + offset, 0xffff) << 16;
286	286	}
287	287
288	288	WRITE32_MEMBER(djmain_state::ide_std_w)
289	289	{
290	290	device_t *device = machine().device("ide");
291	291	if (ACCESSING_BITS_0_7)
292		ide_controller16_w(device, IDE_STD_OFFSET + offset, data << 8, 0xff00);
	292	ide_controller16_w(device, space, IDE_STD_OFFSET + offset, data << 8, 0xff00);
293	293	else
294		ide_controller16_w(device, IDE_STD_OFFSET + offset, data >> 16, 0xffff);
	294	ide_controller16_w(device, space, IDE_STD_OFFSET + offset, data >> 16, 0xffff);
295	295	}
296	296
297	297
r17961	r17962
299	299	{
300	300	device_t *device = machine().device("ide");
301	301	if (offset == 0)
302		return ide_controller16_r(device, IDE_ALT_OFFSET, 0x00ff) << 24;
	302	return ide_controller16_r(device, space, IDE_ALT_OFFSET, 0x00ff) << 24;
303	303
304	304	return 0;
305	305	}
r17961	r17962
308	308	{
309	309	device_t *device = machine().device("ide");
310	310	if (offset == 0 && ACCESSING_BITS_16_23)
311		ide_controller16_w(device, IDE_ALT_OFFSET, data >> 24, 0x00ff);
	311	ide_controller16_w(device, space, IDE_ALT_OFFSET, data >> 24, 0x00ff);
312	312	}
313	313
314	314

trunk/src/mame/drivers/segas16a.c

r17961	r17962
455	455	{
456	456	// read from P2 - 8255's PC0-2 connects to 7751's S0-2 (P24-P26 on an 8048)
457	457	// bit 0x80 is an alternate way to control the sample on/off; doesn't appear to be used
458		return 0x80 | ((m_n7751_command & 0x07) << 4) | (i8243_p2_r(m_n7751_i8243, offset) & 0x0f);
	458	return 0x80 | ((m_n7751_command & 0x07) << 4) | (i8243_p2_r(m_n7751_i8243, space, offset) & 0x0f);
459	459	}
460	460
461	461
r17961	r17962
466	466	WRITE8_MEMBER( segas16a_state::n7751_p2_w )
467	467	{
468	468	// write to P2; low 4 bits go to 8243
469		i8243_p2_w(m_n7751_i8243, offset, data & 0x0f);
	469	i8243_p2_w(m_n7751_i8243, space, offset, data & 0x0f);
470	470
471	471	// output of bit $80 indicates we are ready (1) or busy (0)
472	472	// no other outputs are used

trunk/src/mame/drivers/neogeo.c

r17961	r17962
426	426	case 0x00: select_controller(machine(), data & 0x00ff); break;
427	427	case 0x18: set_output_latch(machine(), data & 0x00ff); break;
428	428	case 0x20: set_output_data(machine(), data & 0x00ff); break;
429		case 0x28: upd4990a_control_16_w(m_upd4990a, 0, data, mem_mask); break;
	429	case 0x28: upd4990a_control_16_w(m_upd4990a, space, 0, data, mem_mask); break;
430	430	//  case 0x30: break; // coin counters
431	431	//  case 0x31: break; // coin counters
432	432	//  case 0x32: break; // coin lockout
r17961	r17962
476	476
477	477	CUSTOM_INPUT_MEMBER(neogeo_state::get_calendar_status)
478	478	{
479		return (upd4990a_databit_r(m_upd4990a, 0) << 1) | upd4990a_testbit_r(m_upd4990a, 0);
	479	return (upd4990a_databit_r(m_upd4990a, generic_space(), 0) << 1) | upd4990a_testbit_r(m_upd4990a, generic_space(), 0);
480	480	}
481	481
482	482

trunk/src/mame/drivers/icecold.c

r17961	r17962
221	221	WRITE8_MEMBER( icecold_state::snd_ctrl_w )
222	222	{
223	223	if (m_ay_ctrl & ~data & 0x04)
224		ay8910_data_address_w(m_ay8910_0, m_ay_ctrl & 0x01, m_sound_latch);
	224	ay8910_data_address_w(m_ay8910_0, space, m_ay_ctrl & 0x01, m_sound_latch);
225	225	if (m_ay_ctrl & ~data & 0x20)
226		ay8910_data_address_w(m_ay8910_1, (m_ay_ctrl>>3) & 0x01, m_sound_latch);
	226	ay8910_data_address_w(m_ay8910_1, space, (m_ay_ctrl>>3) & 0x01, m_sound_latch);
227	227
228	228	m_ay_ctrl = data;
229	229	}
r17961	r17962
236	236	READ8_MEMBER( icecold_state::ay_r )
237	237	{
238	238	if (m_ay_ctrl & 0x02)
239		return ay8910_r(m_ay8910_0, 0);
	239	return ay8910_r(m_ay8910_0, space, 0);
240	240	if (m_ay_ctrl & 0x10)
241		return ay8910_r(m_ay8910_1, 0);
	241	return ay8910_r(m_ay8910_1, space, 0);
242	242
243	243	return 0;
244	244	}

trunk/src/mame/drivers/buggychl.c

r17961	r17962
352	352
353	353	static const msm5232_interface msm5232_config =
354	354	{
355		{ 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6 }   /* default 0.39 uF capacitors (not verified) */
	355	{ 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6, 0.39e-6 },   /* default 0.39 uF capacitors (not verified) */
	356	DEVCB_NULL
356	357	};
357	358
358	359

trunk/src/mame/drivers/starshp1.c

r17961	r17962
30	30	{
31	31	case 0:
32	32	m_attract = data;
33		discrete_sound_w(device, STARSHP1_ATTRACT, data);
	33	discrete_sound_w(device, space, STARSHP1_ATTRACT, data);
34	34	break;
35	35	case 1:
36	36	m_phasor = data;
37		discrete_sound_w(device, STARSHP1_PHASOR_ON, data);
	37	discrete_sound_w(device, space, STARSHP1_PHASOR_ON, data);
38	38	break;
39	39	case 2:
40		discrete_sound_w(device, STARSHP1_KICKER, data);
	40	discrete_sound_w(device, space, STARSHP1_KICKER, data);
41	41	break;
42	42	case 3:
43		discrete_sound_w(device, STARSHP1_SL1, data);
	43	discrete_sound_w(device, space, STARSHP1_SL1, data);
44	44	break;
45	45	case 4:
46		discrete_sound_w(device, STARSHP1_SL2, data);
	46	discrete_sound_w(device, space, STARSHP1_SL2, data);
47	47	break;
48	48	case 5:
49		discrete_sound_w(device, STARSHP1_MOLVL, data);
	49	discrete_sound_w(device, space, STARSHP1_MOLVL, data);
50	50	break;
51	51	case 6:
52		discrete_sound_w(device, STARSHP1_NOISE_FREQ, data);
	52	discrete_sound_w(device, space, STARSHP1_NOISE_FREQ, data);
53	53	break;
54	54	}
55	55
r17961	r17962
109	109	m_ship_size = data;
110	110	break;
111	111	case 2:
112		discrete_sound_w(device, STARSHP1_NOISE_AMPLITUDE, data);
	112	discrete_sound_w(device, space, STARSHP1_NOISE_AMPLITUDE, data);
113	113	break;
114	114	case 3:
115		discrete_sound_w(device, STARSHP1_TONE_PITCH, data);
	115	discrete_sound_w(device, space, STARSHP1_TONE_PITCH, data);
116	116	break;
117	117	case 4:
118		discrete_sound_w(device, STARSHP1_MOTOR_SPEED, data);
	118	discrete_sound_w(device, space, STARSHP1_MOTOR_SPEED, data);
119	119	break;
120	120	case 5:
121	121	m_circle_hpos = data;

trunk/src/mame/drivers/asterix.c

r17961	r17962
67	67	READ8_MEMBER(asterix_state::asterix_sound_r)
68	68	{
69	69	device_t *device = machine().device("k053260");
70		return k053260_r(device, 2 + offset);
	70	return k053260_r(device, space, 2 + offset);
71	71	}
72	72
73	73	static TIMER_CALLBACK( nmi_callback )

trunk/src/mame/drivers/ppmast93.c

r17961	r17962
217	217	switch(offset&0xff)
218	218	{
219	219	case 0:
220		case 1: ym2413_w(machine().device("ymsnd"),offset,data); break;
	220	case 1: ym2413_w(machine().device("ymsnd"),space,offset,data); break;
221	221	case 2: machine().device<dac_device>("dac")->write_unsigned8(data);break;
222	222	default: logerror("%x %x - %x\n",offset,data,space.device().safe_pcbase());
223	223	}

trunk/src/mame/drivers/goldnpkr.c

r17961	r17962
1272	1272	{
1273	1273	if (wcfalcon_flag == 0)
1274	1274	{
1275		ay8910_data_address_w(machine().device("ay8910"), 0, data);
	1275	ay8910_data_address_w(machine().device("ay8910"), space, 0, data);
1276	1276	}
1277	1277	else
1278	1278	{
1279		ay8910_data_address_w(machine().device("ay8910"), 1, data);
	1279	ay8910_data_address_w(machine().device("ay8910"), space, 1, data);
1280	1280	}
1281	1281
1282	1282	wcfalcon_flag = wcfalcon_flag ^ 1;
r17961	r17962
1361	1361	logerror("Sound Data: %2x\n",data & 0x0f);
1362	1362
1363	1363	/* discrete sound is connected to PIA1, portA: bits 0-3 */
1364		discrete_sound_w(device, NODE_01, data >> 3 & 0x01);
1365		discrete_sound_w(device, NODE_10, data & 0x07);
	1364	discrete_sound_w(device, space, NODE_01, data >> 3 & 0x01);
	1365	discrete_sound_w(device, space, NODE_10, data & 0x07);
1366	1366	}
1367	1367
1368	1368

trunk/src/mame/drivers/taito_l.c

r17961	r17962
487	487	{
488	488	device_t *device = machine().device("ymsnd");
489	489	m_extport = (offset >> 1) & 1;
490		return ym2203_r(device, offset & 1);
	490	return ym2203_r(device, space, offset & 1);
491	491	}
492	492
493	493	WRITE8_MEMBER(taitol_state::mcu_data_w)

trunk/src/mame/drivers/multigam.c

r17961	r17962
242	242	READ8_MEMBER(multigam_state::psg_4015_r)
243	243	{
244	244	device_t *device = machine().device("nes");
245		return nes_psg_r(device, 0x15);
	245	return nes_psg_r(device, space, 0x15);
246	246	}
247	247
248	248	WRITE8_MEMBER(multigam_state::psg_4015_w)
249	249	{
250	250	device_t *device = machine().device("nes");
251		nes_psg_w(device, 0x15, data);
	251	nes_psg_w(device, space, 0x15, data);
252	252	}
253	253
254	254	WRITE8_MEMBER(multigam_state::psg_4017_w)
255	255	{
256	256	device_t *device = machine().device("nes");
257		nes_psg_w(device, 0x17, data);
	257	nes_psg_w(device, space, 0x17, data);
258	258	}
259	259
260	260	/******************************************************

trunk/src/mame/drivers/mcr.c

r17961	r17962
651	651	*
652	652	*************************************/
653	653
654		WRITE8_DEVICE_HANDLER( mcr_ipu_sio_transmit )
	654	WRITE16_DEVICE_HANDLER( mcr_ipu_sio_transmit )
655	655	{
656	656	logerror("ipu_sio_transmit: %02X\n", data);
657	657

trunk/src/mame/drivers/cham24.c

r17961	r17962
148	148	READ8_MEMBER(cham24_state::psg_4015_r)
149	149	{
150	150	device_t *device = machine().device("nes");
151		return nes_psg_r(device,0x15);
	151	return nes_psg_r(device,space,0x15);
152	152	}
153	153
154	154	WRITE8_MEMBER(cham24_state::psg_4015_w)
155	155	{
156	156	device_t *device = machine().device("nes");
157		nes_psg_w(device,0x15, data);
	157	nes_psg_w(device,space,0x15, data);
158	158	}
159	159
160	160	WRITE8_MEMBER(cham24_state::psg_4017_w)
161	161	{
162	162	device_t *device = machine().device("nes");
163		nes_psg_w(device,0x17, data);
	163	nes_psg_w(device,space,0x17, data);
164	164	}
165	165
166	166

trunk/src/mame/drivers/rbmk.c

r17961	r17962
141	141	{
142	142	if(m_mux_data & 8)
143	143	{
144		return ym2151_r(machine().device("ymsnd"), offset & 1);
	144	return ym2151_r(machine().device("ymsnd"), space, offset & 1);
145	145	}
146	146	else if(m_mux_data & 4)
147	147	{
r17961	r17962
157	157
158	158	WRITE8_MEMBER(rbmk_state::rbmk_mcu_io_w)
159	159	{
160		if(m_mux_data & 8) { ym2151_w(machine().device("ymsnd"), offset & 1, data); }
	160	if(m_mux_data & 8) { ym2151_w(machine().device("ymsnd"), space, offset & 1, data); }
161	161	else if(m_mux_data & 4)
162	162	{
163	163	//printf("%02x %02x W\n",offset,data);

trunk/src/mame/drivers/rpunch.c

r17961	r17962
209	209	WRITE8_MEMBER(rpunch_state::upd_data_w)
210	210	{
211	211	device_t *device = machine().device("upd");
212		upd7759_port_w(device, 0, data);
	212	upd7759_port_w(device, space, 0, data);
213	213	upd7759_start_w(device, 0);
214	214	upd7759_start_w(device, 1);
215	215	}

trunk/src/mame/drivers/cubeqst.c

r17961	r17962
393	393
394	394	READ16_MEMBER(cubeqst_state::read_rotram)
395	395	{
396		return cubeqcpu_rotram_r(machine().device("rotate_cpu"), offset, mem_mask);
	396	return cubeqcpu_rotram_r(machine().device("rotate_cpu"), space, offset, mem_mask);
397	397	}
398	398
399	399	WRITE16_MEMBER(cubeqst_state::write_rotram)
400	400	{
401		cubeqcpu_rotram_w(machine().device("rotate_cpu"), offset, data, mem_mask);
	401	cubeqcpu_rotram_w(machine().device("rotate_cpu"), space, offset, data, mem_mask);
402	402	}
403	403
404	404	READ16_MEMBER(cubeqst_state::read_sndram)
405	405	{
406		return cubeqcpu_sndram_r(machine().device("sound_cpu"), offset, mem_mask);
	406	return cubeqcpu_sndram_r(machine().device("sound_cpu"), space, offset, mem_mask);
407	407	}
408	408
409	409	WRITE16_MEMBER(cubeqst_state::write_sndram)
410	410	{
411		cubeqcpu_sndram_w(machine().device("sound_cpu"), offset, data, mem_mask);
	411	cubeqcpu_sndram_w(machine().device("sound_cpu"), space, offset, data, mem_mask);
412	412	}
413	413
414	414	static ADDRESS_MAP_START( m68k_program_map, AS_PROGRAM, 16, cubeqst_state )

trunk/src/mame/drivers/savquest.c

r17961	r17962
257	257	READ32_MEMBER(savquest_state::ide_r)
258	258	{
259	259	device_t *device = machine().device("ide");
260		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	260	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
261	261	}
262	262
263	263	WRITE32_MEMBER(savquest_state::ide_w)
264	264	{
265	265	device_t *device = machine().device("ide");
266		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	266	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
267	267	}
268	268
269	269	READ32_MEMBER(savquest_state::fdc_r)
270	270	{
271	271	device_t *device = machine().device("ide");
272		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	272	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
273	273	}
274	274
275	275	WRITE32_MEMBER(savquest_state::fdc_w)
276	276	{
277	277	device_t *device = machine().device("ide");
278	278	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
279		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	279	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
280	280	}
281	281
282	282	READ8_MEMBER(savquest_state::at_page8_r)
r17961	r17962
325	325	READ8_MEMBER(savquest_state::at_dma8237_2_r)
326	326	{
327	327	device_t *device = machine().device("dma8237_2");
328		return i8237_r(device, offset / 2);
	328	return i8237_r(device, space, offset / 2);
329	329	}
330	330
331	331	WRITE8_MEMBER(savquest_state::at_dma8237_2_w)
332	332	{
333	333	device_t *device = machine().device("dma8237_2");
334		i8237_w(device, offset / 2, data);
	334	i8237_w(device, space, offset / 2, data);
335	335	}
336	336
337	337	WRITE_LINE_MEMBER(savquest_state::pc_dma_hrq_changed)

trunk/src/mame/drivers/mpu4hw.c

r17961	r17962
1119	1119	*/
1120	1120
1121	1121	/* PSG function selected */
1122		static void update_ay(device_t *device)
	1122	static void update_ay(device_t *device, address_space &space)
1123	1123	{
1124	1124	device_t *ay = device->machine().device("ay8913");
1125	1125	if (!ay) return;
r17961	r17962
1145	1145	{/* CA2 = 0 CB2 = 1? : Write to selected PSG register and write data to Port A */
1146	1146	pia6821_device *pia_ic6 = device->machine().device<pia6821_device>("pia_ic6");
1147	1147	device_t *ay = device->machine().device("ay8913");
1148		ay8910_data_w(ay, 0, pia_ic6->a_output());
	1148	ay8910_data_w(ay, space, 0, pia_ic6->a_output());
1149	1149	LOG(("AY Chip Write \n"));
1150	1150	break;
1151	1151	}
r17961	r17962
1154	1154	The register will remain selected until another is chosen.*/
1155	1155	pia6821_device *pia_ic6 = device->machine().device<pia6821_device>("pia_ic6");
1156	1156	device_t *ay = device->machine().device("ay8913");
1157		ay8910_address_w(ay, 0, pia_ic6->a_output());
	1157	ay8910_address_w(ay, space, 0, pia_ic6->a_output());
1158	1158	LOG(("AY Chip Select \n"));
1159	1159	break;
1160	1160	}
r17961	r17962
1170	1170	WRITE_LINE_MEMBER(mpu4_state::pia_ic5_cb2_w)
1171	1171	{
1172	1172	device_t *device = machine().device("pia_ic5");
1173		update_ay(device);
	1173	update_ay(device, generic_space());
1174	1174	}
1175	1175
1176	1176
r17961	r17962
1229	1229	if (m_mod_number <4)
1230	1230	{
1231	1231	m_ay_data = data;
1232		update_ay(device);
	1232	update_ay(device, space);
1233	1233	}
1234	1234	}
1235	1235
r17961	r17962
1242	1242	{
1243	1243	if ( state ) m_ay8913_address |=  0x01;
1244	1244	else         m_ay8913_address &= ~0x01;
1245		update_ay(device);
	1245	update_ay(device, generic_space());
1246	1246	}
1247	1247	}
1248	1248
r17961	r17962
1255	1255	{
1256	1256	if ( state ) m_ay8913_address |=  0x02;
1257	1257	else         m_ay8913_address &= ~0x02;
1258		update_ay(device);
	1258	update_ay(device, generic_space());
1259	1259	}
1260	1260	}
1261	1261
r17961	r17962
1461	1461	{
1462	1462	device_t *msm6376 = machine().device("msm6376");
1463	1463	LOG_SS(("%s: GAMEBOARD: PIA Port A Set to %2x\n", machine().describe_context(),data));
1464		okim6376_w(msm6376, 0, data);
	1464	okim6376_w(msm6376, space, 0, data);
1465	1465	}
1466	1466
1467	1467	WRITE8_MEMBER(mpu4_state::pia_gb_portb_w)
r17961	r17962
2292	2292	WRITE8_MEMBER(mpu4_state::mpu4_ym2413_w)
2293	2293	{
2294	2294	device_t *ym = machine().device("ym2413");
2295		if (ym) ym2413_w(ym,offset,data);
	2295	if (ym) ym2413_w(ym,space,offset,data);
2296	2296	}
2297	2297
2298	2298	READ8_MEMBER(mpu4_state::mpu4_ym2413_r)

trunk/src/mame/drivers/famibox.c

r17961	r17962
180	180	READ8_MEMBER(famibox_state::psg_4015_r)
181	181	{
182	182	device_t *device = machine().device("nes");
183		return nes_psg_r(device, 0x15);
	183	return nes_psg_r(device, space, 0x15);
184	184	}
185	185
186	186	WRITE8_MEMBER(famibox_state::psg_4015_w)
187	187	{
188	188	device_t *device = machine().device("nes");
189		nes_psg_w(device, 0x15, data);
	189	nes_psg_w(device, space, 0x15, data);
190	190	}
191	191
192	192	WRITE8_MEMBER(famibox_state::psg_4017_w)
193	193	{
194	194	device_t *device = machine().device("nes");
195		nes_psg_w(device, 0x17, data);
	195	nes_psg_w(device, space, 0x17, data);
196	196	}
197	197
198	198	/******************************************************

trunk/src/mame/drivers/ultrsprt.c

r17961	r17962
136	136	UINT16 r = 0;
137	137
138	138	if (ACCESSING_BITS_8_15)
139		r |= k056800_sound_r(k056800, (offset*2)+0, 0xffff) << 8;
	139	r |= k056800_sound_r(k056800, space, (offset*2)+0, 0xffff) << 8;
140	140
141	141	if (ACCESSING_BITS_0_7)
142		r |= k056800_sound_r(k056800, (offset*2)+1, 0xffff) << 0;
	142	r |= k056800_sound_r(k056800, space, (offset*2)+1, 0xffff) << 0;
143	143
144	144	return r;
145	145	}
r17961	r17962
149	149	device_t *k056800 = machine().device("k056800");
150	150
151	151	if (ACCESSING_BITS_8_15)
152		k056800_sound_w(k056800, (offset*2)+0, (data >> 8) & 0xff, 0x00ff);
	152	k056800_sound_w(k056800, space, (offset*2)+0, (data >> 8) & 0xff, 0x00ff);
153	153
154	154	if (ACCESSING_BITS_0_7)
155		k056800_sound_w(k056800, (offset*2)+1, (data >> 0) & 0xff, 0x00ff);
	155	k056800_sound_w(k056800, space, (offset*2)+1, (data >> 0) & 0xff, 0x00ff);
156	156	}
157	157
158	158	static ADDRESS_MAP_START( sound_map, AS_PROGRAM, 16, ultrsprt_state )

trunk/src/mame/drivers/hitme.c

r17961	r17962
194	194	attotime duration = attotime(0, ATTOSECONDS_PER_SECOND * 0.45 * 6.8e-6 * resistance * (data + 1));
195	195	m_timeout_time = machine().time() + duration;
196	196
197		discrete_sound_w(device, HITME_DOWNCOUNT_VAL, data);
198		discrete_sound_w(device, HITME_OUT0, 1);
	197	discrete_sound_w(device, space, HITME_DOWNCOUNT_VAL, data);
	198	discrete_sound_w(device, space, HITME_OUT0, 1);
199	199	}
200	200
201	201
202	202	WRITE8_MEMBER(hitme_state::output_port_1_w)
203	203	{
204	204	device_t *device = machine().device("discrete");
205		discrete_sound_w(device, HITME_ENABLE_VAL, data);
206		discrete_sound_w(device, HITME_OUT1, 1);
	205	discrete_sound_w(device, space, HITME_ENABLE_VAL, data);
	206	discrete_sound_w(device, space, HITME_OUT1, 1);
207	207	}
208	208
209	209

trunk/src/mame/drivers/maygay1b.c

r17961	r17962
841	841	WRITE8_MEMBER(maygay1b_state::latch_ch2_w)
842	842	{
843	843	device_t *msm6376 = machine().device("msm6376");
844		okim6376_w(msm6376, 0, data&0x7f);
	844	okim6376_w(msm6376, space, 0, data&0x7f);
845	845	okim6376_ch2_w(msm6376,data&0x80);
846	846	}
847	847

trunk/src/mame/drivers/bzone.c

r17961	r17962
286	286	{
287	287	device_t *device = machine().device("custom");
288	288	m_rb_input_select = data & 1;
289		redbaron_sounds_w(device, offset, data);
	289	redbaron_sounds_w(device, space, offset, data);
290	290	}
291	291
292	292

trunk/src/mame/drivers/cliffhgr.c

r17961	r17962
172	172	{
173	173	device_t *device = machine().device("discrete");
174	174	/* audio */
175		discrete_sound_w(device, CLIFF_ENABLE_SND_1, data & 1);
176		discrete_sound_w(device, CLIFF_ENABLE_SND_2, (data >> 1) & 1);
	175	discrete_sound_w(device, space, CLIFF_ENABLE_SND_1, data & 1);
	176	discrete_sound_w(device, space, CLIFF_ENABLE_SND_2, (data >> 1) & 1);
177	177
178	178	// bit 4 (data & 0x10) is overlay related?
179	179	}

trunk/src/mame/drivers/multfish.c

r17961	r17962
363	363	READ8_MEMBER(multfish_state::multfish_timekeeper_r)
364	364	{
365	365	device_t *device = machine().device("m48t35");
366		return timekeeper_r(device, offset + 0x6000);
	366	return timekeeper_r(device, space, offset + 0x6000);
367	367	}
368	368
369	369	WRITE8_MEMBER(multfish_state::multfish_timekeeper_w)
370	370	{
371	371	device_t *device = machine().device("m48t35");
372		timekeeper_w(device, offset + 0x6000, data);
	372	timekeeper_w(device, space, offset + 0x6000, data);
373	373	}
374	374
375	375	READ8_MEMBER(multfish_state::bankedram_r)
r17961	r17962
377	377
378	378	if ((m_rambk & 0x80) == 0x00)
379	379	{
380		return timekeeper_r(machine().device("m48t35"), offset + 0x2000*(m_rambk & 0x03));
	380	return timekeeper_r(machine().device("m48t35"), space, offset + 0x2000*(m_rambk & 0x03));
381	381	}
382	382	else
383	383	{
r17961	r17962
391	391
392	392	if ((m_rambk & 0x80) == 0x00)
393	393	{
394		timekeeper_w(machine().device("m48t35"), offset + 0x2000*(m_rambk & 0x03), data);
	394	timekeeper_w(machine().device("m48t35"), space, offset + 0x2000*(m_rambk & 0x03), data);
395	395	}
396	396	else
397	397	{
r17961	r17962
1131	1131	multfish_state::machine_reset();
1132	1132
1133	1133	// this set needs preprogrammed data in timekeeper
1134		timekeeper_w(machine().device("m48t35"), 0x2003 , 0x01);
1135		timekeeper_w(machine().device("m48t35"), 0x4003 , 0x02);
	1134	timekeeper_w(machine().device("m48t35"), generic_space(), 0x2003 , 0x01);
	1135	timekeeper_w(machine().device("m48t35"), generic_space(), 0x4003 , 0x02);
1136	1136	}
1137	1137	static MACHINE_CONFIG_DERIVED( island2a, multfish )
1138	1138

trunk/src/mame/drivers/sprint2.c

r17961	r17962
102	102	}
103	103	}
104	104
105		discrete_sound_w(discrete, SPRINT2_MOTORSND1_DATA, state->m_video_ram[0x394] & 15);   // also DOMINOS_FREQ_DATA
106		discrete_sound_w(discrete, SPRINT2_MOTORSND2_DATA, state->m_video_ram[0x395] & 15);
107		discrete_sound_w(discrete, SPRINT2_CRASHSND_DATA, state->m_video_ram[0x396] & 15);   // also DOMINOS_AMP_DATA
	105	address_space &space = *device->machine().firstcpu->space(AS_PROGRAM);
	106	discrete_sound_w(discrete, space, SPRINT2_MOTORSND1_DATA, state->m_video_ram[0x394] & 15);   // also DOMINOS_FREQ_DATA
	107	discrete_sound_w(discrete, space, SPRINT2_MOTORSND2_DATA, state->m_video_ram[0x395] & 15);
	108	discrete_sound_w(discrete, space, SPRINT2_CRASHSND_DATA, state->m_video_ram[0x396] & 15);   // also DOMINOS_AMP_DATA
108	109
109	110	/* interrupts and watchdog are disabled during service mode */
110	111
r17961	r17962
212	213	m_attract = offset & 1;
213	214
214	215	// also DOMINOS_ATTRACT_EN
215		discrete_sound_w(device, SPRINT2_ATTRACT_EN, m_attract);
	216	discrete_sound_w(device, space, SPRINT2_ATTRACT_EN, m_attract);
216	217	}
217	218
218	219
219	220	WRITE8_MEMBER(sprint2_state::sprint2_noise_reset_w)
220	221	{
221	222	device_t *device = machine().device("discrete");
222		discrete_sound_w(device, SPRINT2_NOISE_RESET, 0);
	223	discrete_sound_w(device, space, SPRINT2_NOISE_RESET, 0);
223	224	}
224	225
225	226
r17961	r17962
227	228	{
228	229	device_t *device = machine().device("discrete");
229	230	// also DOMINOS_TUMBLE_EN
230		discrete_sound_w(device, SPRINT2_SKIDSND1_EN, offset & 1);
	231	discrete_sound_w(device, space, SPRINT2_SKIDSND1_EN, offset & 1);
231	232	}
232	233
233	234	WRITE8_MEMBER(sprint2_state::sprint2_skid2_w)
234	235	{
235	236	device_t *device = machine().device("discrete");
236		discrete_sound_w(device, SPRINT2_SKIDSND2_EN, offset & 1);
	237	discrete_sound_w(device, space, SPRINT2_SKIDSND2_EN, offset & 1);
237	238	}
238	239
239	240

trunk/src/mame/drivers/midqslvr.c

r17961	r17962
396	396	READ32_MEMBER(midqslvr_state::ide_r)
397	397	{
398	398	device_t *device = machine().device("ide");
399		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	399	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
400	400	}
401	401
402	402	WRITE32_MEMBER(midqslvr_state::ide_w)
403	403	{
404	404	device_t *device = machine().device("ide");
405		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	405	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
406	406	}
407	407
408	408	READ32_MEMBER(midqslvr_state::fdc_r)
409	409	{
410	410	device_t *device = machine().device("ide");
411		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	411	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
412	412	}
413	413
414	414	WRITE32_MEMBER(midqslvr_state::fdc_w)
415	415	{
416	416	device_t *device = machine().device("ide");
417	417	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
418		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	418	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
419	419	}
420	420
421	421	READ8_MEMBER(midqslvr_state::at_page8_r)
r17961	r17962
463	463	READ8_MEMBER(midqslvr_state::at_dma8237_2_r)
464	464	{
465	465	device_t *device = machine().device("dma8237_2");
466		return i8237_r(device, offset / 2);
	466	return i8237_r(device, space, offset / 2);
467	467	}
468	468
469	469	WRITE8_MEMBER(midqslvr_state::at_dma8237_2_w)
470	470	{
471	471	device_t *device = machine().device("dma8237_2");
472		i8237_w(device, offset / 2, data);
	472	i8237_w(device, space, offset / 2, data);
473	473	}
474	474
475	475	WRITE_LINE_MEMBER(midqslvr_state::pc_dma_hrq_changed)

trunk/src/mame/drivers/exterm.c

r17961	r17962
207	207	{
208	208	device_t *device = machine().device("ymsnd");
209	209	/* bit 7 of the sound control selects which port */
210		ym2151_w(device, m_sound_control >> 7, data);
	210	ym2151_w(device, space, m_sound_control >> 7, data);
211	211	}
212	212
213	213

trunk/src/mame/drivers/dragrace.c

r17961	r17962
33	33	}
34	34
35	35
36		static void dragrace_update_misc_flags( running_machine &machine )
	36	static void dragrace_update_misc_flags( address_space &space )
37	37	{
38		dragrace_state *state = machine.driver_data<dragrace_state>();
	38	dragrace_state *state = space.machine().driver_data<dragrace_state>();
39	39	/* 0x0900 = set 3SPEED1         0x00000001
40	40	* 0x0901 = set 4SPEED1         0x00000002
41	41	* 0x0902 = set 5SPEED1         0x00000004
r17961	r17962
67	67	* 0x091f = set Player 2 Start Lamp 0x80000000
68	68	* 0x0938 = clear 0x0918 - 0x091f
69	69	*/
70		set_led_status(machine, 0, state->m_misc_flags & 0x00008000);
71		set_led_status(machine, 1, state->m_misc_flags & 0x80000000);
	70	set_led_status(space.machine(), 0, state->m_misc_flags & 0x00008000);
	71	set_led_status(space.machine(), 1, state->m_misc_flags & 0x80000000);
72	72
73		discrete_sound_w(state->m_discrete, DRAGRACE_MOTOR1_DATA,  ~state->m_misc_flags & 0x0000001f);      // Speed1 data*
74		discrete_sound_w(state->m_discrete, DRAGRACE_EXPLODE1_EN, (state->m_misc_flags & 0x00000020) ? 1: 0);   // Explosion1 enable
75		discrete_sound_w(state->m_discrete, DRAGRACE_SCREECH1_EN, (state->m_misc_flags & 0x00000040) ? 1: 0);   // Screech1 enable
76		discrete_sound_w(state->m_discrete, DRAGRACE_KLEXPL1_EN, (state->m_misc_flags & 0x00000200) ? 1: 0);   // KLEXPL1 enable
77		discrete_sound_w(state->m_discrete, DRAGRACE_MOTOR1_EN, (state->m_misc_flags & 0x00000800) ? 1: 0);   // Motor1 enable
	73	discrete_sound_w(state->m_discrete, space, DRAGRACE_MOTOR1_DATA,  ~state->m_misc_flags & 0x0000001f);      // Speed1 data*
	74	discrete_sound_w(state->m_discrete, space, DRAGRACE_EXPLODE1_EN, (state->m_misc_flags & 0x00000020) ? 1: 0);   // Explosion1 enable
	75	discrete_sound_w(state->m_discrete, space, DRAGRACE_SCREECH1_EN, (state->m_misc_flags & 0x00000040) ? 1: 0);   // Screech1 enable
	76	discrete_sound_w(state->m_discrete, space, DRAGRACE_KLEXPL1_EN, (state->m_misc_flags & 0x00000200) ? 1: 0);   // KLEXPL1 enable
	77	discrete_sound_w(state->m_discrete, space, DRAGRACE_MOTOR1_EN, (state->m_misc_flags & 0x00000800) ? 1: 0);   // Motor1 enable
78	78
79		discrete_sound_w(state->m_discrete, DRAGRACE_MOTOR2_DATA, (~state->m_misc_flags & 0x001f0000) >> 0x10);   // Speed2 data*
80		discrete_sound_w(state->m_discrete, DRAGRACE_EXPLODE2_EN, (state->m_misc_flags & 0x00200000) ? 1: 0);   // Explosion2 enable
81		discrete_sound_w(state->m_discrete, DRAGRACE_SCREECH2_EN, (state->m_misc_flags & 0x00400000) ? 1: 0);   // Screech2 enable
82		discrete_sound_w(state->m_discrete, DRAGRACE_KLEXPL2_EN, (state->m_misc_flags & 0x02000000) ? 1: 0);   // KLEXPL2 enable
83		discrete_sound_w(state->m_discrete, DRAGRACE_MOTOR2_EN, (state->m_misc_flags & 0x08000000) ? 1: 0);   // Motor2 enable
	79	discrete_sound_w(state->m_discrete, space, DRAGRACE_MOTOR2_DATA, (~state->m_misc_flags & 0x001f0000) >> 0x10);   // Speed2 data*
	80	discrete_sound_w(state->m_discrete, space, DRAGRACE_EXPLODE2_EN, (state->m_misc_flags & 0x00200000) ? 1: 0);   // Explosion2 enable
	81	discrete_sound_w(state->m_discrete, space, DRAGRACE_SCREECH2_EN, (state->m_misc_flags & 0x00400000) ? 1: 0);   // Screech2 enable
	82	discrete_sound_w(state->m_discrete, space, DRAGRACE_KLEXPL2_EN, (state->m_misc_flags & 0x02000000) ? 1: 0);   // KLEXPL2 enable
	83	discrete_sound_w(state->m_discrete, space, DRAGRACE_MOTOR2_EN, (state->m_misc_flags & 0x08000000) ? 1: 0);   // Motor2 enable
84	84
85		discrete_sound_w(state->m_discrete, DRAGRACE_ATTRACT_EN, (state->m_misc_flags & 0x00001000) ? 1: 0);   // Attract enable
86		discrete_sound_w(state->m_discrete, DRAGRACE_LOTONE_EN, (state->m_misc_flags & 0x00002000) ? 1: 0);   // LoTone enable
87		discrete_sound_w(state->m_discrete, DRAGRACE_HITONE_EN, (state->m_misc_flags & 0x20000000) ? 1: 0);   // HiTone enable
	85	discrete_sound_w(state->m_discrete, space, DRAGRACE_ATTRACT_EN, (state->m_misc_flags & 0x00001000) ? 1: 0);   // Attract enable
	86	discrete_sound_w(state->m_discrete, space, DRAGRACE_LOTONE_EN, (state->m_misc_flags & 0x00002000) ? 1: 0);   // LoTone enable
	87	discrete_sound_w(state->m_discrete, space, DRAGRACE_HITONE_EN, (state->m_misc_flags & 0x20000000) ? 1: 0);   // HiTone enable
88	88	}
89	89
90	90	WRITE8_MEMBER(dragrace_state::dragrace_misc_w)
r17961	r17962
97	97	else
98	98	m_misc_flags &= (~mask);
99	99	logerror("Set   %#6x, Mask=%#10x, Flag=%#10x, Data=%x\n", 0x0900 + offset, mask, m_misc_flags, data & 0x01);
100		dragrace_update_misc_flags(machine());
	100	dragrace_update_misc_flags(space);
101	101	}
102	102
103	103	WRITE8_MEMBER(dragrace_state::dragrace_misc_clear_w)
r17961	r17962
107	107	UINT32 mask = 0xff << (((offset >> 3) & 0x03) * 8);
108	108	m_misc_flags &= (~mask);
109	109	logerror("Clear %#6x, Mask=%#10x, Flag=%#10x, Data=%x\n", 0x0920 + offset, mask, m_misc_flags, data & 0x01);
110		dragrace_update_misc_flags(machine());
	110	dragrace_update_misc_flags(space);
111	111	}
112	112
113	113	READ8_MEMBER(dragrace_state::dragrace_input_r)

trunk/src/mame/drivers/sauro.c

r17961	r17962
161	161	WRITE8_MEMBER(sauro_state::adpcm_w)
162	162	{
163	163	device_t *device = machine().device("speech");
164		sp0256_ALD_w(device, 0, data);
	164	sp0256_ALD_w(device, space, 0, data);
165	165	}
166	166
167	167	static ADDRESS_MAP_START( sauro_map, AS_PROGRAM, 8, sauro_state )

trunk/src/mame/drivers/system1.c

r17961	r17962
481	481	machine().device("soundcpu")->execute().set_input_line(INPUT_LINE_NMI, (data & 0x80) ? CLEAR_LINE : ASSERT_LINE);
482	482
483	483	/* remaining bits are used for video RAM banking */
484		system1_videoram_bank_w(device, offset, data);
	484	system1_videoram_bank_w(device, space, offset, data);
485	485	}
486	486
487	487

trunk/src/mame/drivers/bfm_sc2.c

r17961	r17962
731	731
732	732	upd7759_set_bank_base(device, bank*0x20000);
733	733
734		upd7759_port_w(device, 0, data&0x3F);   // setup sample
	734	upd7759_port_w(device, space, 0, data&0x3F);   // setup sample
735	735	upd7759_start_w(device, 0);
736	736	upd7759_start_w(device, 1);
737	737	}

trunk/src/mame/drivers/dynax.c

r17961	r17962
1636	1636	case 0x8050:   // CRT controller
1637	1637	case 0x8051:   return;
1638	1638
1639		case 0x8070:   ym2413_register_port_w(m_ymsnd, 0, data);   return;
1640		case 0x8071:   ym2413_data_port_w(m_ymsnd, 0, data);   return;
	1639	case 0x8070:   ym2413_register_port_w(m_ymsnd, space, 0, data);   return;
	1640	case 0x8071:   ym2413_data_port_w(m_ymsnd, space, 0, data);   return;
1641	1641
1642	1642	case 0x8060:   m_keyb = data;   return;
1643	1643

trunk/src/mame/drivers/mexico86.c

r17961	r17962
66	66	READ8_MEMBER(mexico86_state::kiki_ym2203_r)
67	67	{
68	68	device_t *device = machine().device("ymsnd");
69		UINT8 result = ym2203_r(device, offset);
	69	UINT8 result = ym2203_r(device, space, offset);
70	70
71	71	if (offset == 0)
72	72	result &= 0x7f;

trunk/src/mame/drivers/calchase.c

r17961	r17962
184	184	READ8_MEMBER(calchase_state::at_dma8237_2_r)
185	185	{
186	186	device_t *device = machine().device("dma8237_2");
187		return i8237_r(device, offset / 2);
	187	return i8237_r(device, space, offset / 2);
188	188	}
189	189
190	190	WRITE8_MEMBER(calchase_state::at_dma8237_2_w)
191	191	{
192	192	device_t *device = machine().device("dma8237_2");
193		i8237_w(device, offset / 2, data);
	193	i8237_w(device, space, offset / 2, data);
194	194	}
195	195
196	196	READ8_MEMBER(calchase_state::at_page8_r)
r17961	r17962
298	298	READ32_MEMBER(calchase_state::ide_r)
299	299	{
300	300	device_t *device = machine().device("ide");
301		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	301	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
302	302	}
303	303
304	304	WRITE32_MEMBER(calchase_state::ide_w)
305	305	{
306	306	device_t *device = machine().device("ide");
307		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	307	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
308	308	}
309	309
310	310
r17961	r17962
314	314	READ32_MEMBER(calchase_state::fdc_r)
315	315	{
316	316	device_t *device = machine().device("ide");
317		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	317	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
318	318	}
319	319
320	320	WRITE32_MEMBER(calchase_state::fdc_w)
321	321	{
322	322	device_t *device = machine().device("ide");
323	323	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
324		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	324	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
325	325	}
326	326
327	327

trunk/src/mame/drivers/grchamp.c

r17961	r17962
305	305	/* bit 2-4: ATTACK UP 1-3 */
306	306	/* bit 5-6: SIFT 1-2 */
307	307	/* bit 7:   ENGINE CS */
308		discrete_sound_w(discrete, GRCHAMP_ENGINE_CS_EN, data & 0x80);
309		discrete_sound_w(discrete, GRCHAMP_SIFT_DATA, (data >> 5) & 0x03);
310		discrete_sound_w(discrete, GRCHAMP_ATTACK_UP_DATA, (data >> 2) & 0x07);
311		discrete_sound_w(discrete, GRCHAMP_IDLING_EN, data & 0x02);
312		discrete_sound_w(discrete, GRCHAMP_FOG_EN, data & 0x01);
	308	discrete_sound_w(discrete, space, GRCHAMP_ENGINE_CS_EN, data & 0x80);
	309	discrete_sound_w(discrete, space, GRCHAMP_SIFT_DATA, (data >> 5) & 0x03);
	310	discrete_sound_w(discrete, space, GRCHAMP_ATTACK_UP_DATA, (data >> 2) & 0x07);
	311	discrete_sound_w(discrete, space, GRCHAMP_IDLING_EN, data & 0x02);
	312	discrete_sound_w(discrete, space, GRCHAMP_FOG_EN, data & 0x01);
313	313	break;
314	314
315	315	case 0x0d: /* OUTD */
316	316	/* bit 0-3: ATTACK SPEED 1-4 */
317	317	/* bit 4-7: PLAYER SPEED 1-4 */
318		discrete_sound_w(discrete, GRCHAMP_PLAYER_SPEED_DATA, (data >> 4) & 0x0f);
319		discrete_sound_w(discrete, GRCHAMP_ATTACK_SPEED_DATA,  data & 0x0f);
	318	discrete_sound_w(discrete, space, GRCHAMP_PLAYER_SPEED_DATA, (data >> 4) & 0x0f);
	319	discrete_sound_w(discrete, space, GRCHAMP_ATTACK_SPEED_DATA,  data & 0x0f);
320	320	break;
321	321
322	322	default:
r17961	r17962
416	416	WRITE8_MEMBER(grchamp_state::grchamp_portA_0_w)
417	417	{
418	418	device_t *device = machine().device("discrete");
419		discrete_sound_w(device, GRCHAMP_A_DATA, data);
	419	discrete_sound_w(device, space, GRCHAMP_A_DATA, data);
420	420	}
421	421
422	422	WRITE8_MEMBER(grchamp_state::grchamp_portB_0_w)
423	423	{
424	424	device_t *device = machine().device("discrete");
425		discrete_sound_w(device, GRCHAMP_B_DATA, 255-data);
	425	discrete_sound_w(device, space, GRCHAMP_B_DATA, 255-data);
426	426	}
427	427
428	428	WRITE8_MEMBER(grchamp_state::grchamp_portA_2_w)

trunk/src/mame/drivers/vegas.c

r17961	r17962
1464	1464
1465	1465	static READ32_DEVICE_HANDLER( ide_main_r )
1466	1466	{
1467		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	1467	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
1468	1468	}
1469	1469
1470	1470
1471	1471	static WRITE32_DEVICE_HANDLER( ide_main_w )
1472	1472	{
1473		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	1473	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
1474	1474	}
1475	1475
1476	1476
1477	1477	static READ32_DEVICE_HANDLER( ide_alt_r )
1478	1478	{
1479		return ide_controller32_r(device, 0x3f4/4 + offset, mem_mask);
	1479	return ide_controller32_r(device, space, 0x3f4/4 + offset, mem_mask);
1480	1480	}
1481	1481
1482	1482
1483	1483	static WRITE32_DEVICE_HANDLER( ide_alt_w )
1484	1484	{
1485		ide_controller32_w(device, 0x3f4/4 + offset, data, mem_mask);
	1485	ide_controller32_w(device, space, 0x3f4/4 + offset, data, mem_mask);
1486	1486	}
1487	1487
1488	1488
r17961	r17962
1490	1490	{
1491	1491	UINT32 result = 0;
1492	1492	if (ACCESSING_BITS_0_15)
1493		result |= smc91c9x_r(device, offset * 2 + 0, mem_mask);
	1493	result |= smc91c9x_r(device, space, offset * 2 + 0, mem_mask);
1494	1494	if (ACCESSING_BITS_16_31)
1495		result |= smc91c9x_r(device, offset * 2 + 1, mem_mask >> 16) << 16;
	1495	result |= smc91c9x_r(device, space, offset * 2 + 1, mem_mask >> 16) << 16;
1496	1496	return result;
1497	1497	}
1498	1498
r17961	r17962
1500	1500	static WRITE32_DEVICE_HANDLER( ethernet_w )
1501	1501	{
1502	1502	if (ACCESSING_BITS_0_15)
1503		smc91c9x_w(device, offset * 2 + 0, data, mem_mask);
	1503	smc91c9x_w(device, space, offset * 2 + 0, data, mem_mask);
1504	1504	if (ACCESSING_BITS_16_31)
1505		smc91c9x_w(device, offset * 2 + 1, data >> 16, mem_mask >> 16);
	1505	smc91c9x_w(device, space, offset * 2 + 1, data >> 16, mem_mask >> 16);
1506	1506	}
1507	1507
1508	1508

trunk/src/mame/drivers/xtom3d.c

r17961	r17962
386	386	device_t *device = machine().device("ide");
387	387	return -1; // crashes otherwise
388	388
389		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	389	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
390	390	}
391	391
392	392	WRITE32_MEMBER(xtom3d_state::ide_w)
393	393	{
394	394	device_t *device = machine().device("ide");
395	395	if(0) // crashes otherwise
396		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	396	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
397	397	}
398	398
399	399	READ32_MEMBER(xtom3d_state::fdc_r)
400	400	{
401	401	device_t *device = machine().device("ide");
402		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	402	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
403	403	}
404	404
405	405	WRITE32_MEMBER(xtom3d_state::fdc_w)
406	406	{
407	407	device_t *device = machine().device("ide");
408	408	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
409		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	409	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
410	410	}
411	411
412	412	READ8_MEMBER(xtom3d_state::at_page8_r)
r17961	r17962
455	455	READ8_MEMBER(xtom3d_state::at_dma8237_2_r)
456	456	{
457	457	device_t *device = machine().device("dma8237_2");
458		return i8237_r(device, offset / 2);
	458	return i8237_r(device, space, offset / 2);
459	459	}
460	460
461	461	WRITE8_MEMBER(xtom3d_state::at_dma8237_2_w)
462	462	{
463	463	device_t *device = machine().device("dma8237_2");
464		i8237_w(device, offset / 2, data);
	464	i8237_w(device, space, offset / 2, data);
465	465	}
466	466
467	467	WRITE_LINE_MEMBER(xtom3d_state::pc_dma_hrq_changed)

trunk/src/mame/drivers/videopkr.c

r17961	r17962
921	921	case 0x00:   break;
922	922	case 0x01:   break;
923	923	case 0x02:   break;
924		case 0x03:   ay8910_data_w(device, 1, m_sbp0); break;
	924	case 0x03:   ay8910_data_w(device, space, 1, m_sbp0); break;
925	925	case 0x04:   break;
926		case 0x05:   m_sbp0 = ay8910_r(device, m_sbp0); break;
	926	case 0x05:   m_sbp0 = ay8910_r(device, space, m_sbp0); break;
927	927	case 0x06:   break;
928		case 0x07:   ay8910_address_w(device, 0, m_sbp0); break;
	928	case 0x07:   ay8910_address_w(device, space, 0, m_sbp0); break;
929	929	}
930	930	}
931	931

trunk/src/mame/drivers/gticlub.c

r17961	r17962
286	286	READ32_MEMBER(gticlub_state::gticlub_k001604_tile_r)
287	287	{
288	288	device_t *k001604 = machine().device(get_cgboard_id() ? "k001604_2" : "k001604_1");
289		return k001604_tile_r(k001604, offset, mem_mask);
	289	return k001604_tile_r(k001604, space, offset, mem_mask);
290	290	}
291	291
292	292	WRITE32_MEMBER(gticlub_state::gticlub_k001604_tile_w)
293	293	{
294	294	device_t *k001604 = machine().device(get_cgboard_id() ? "k001604_2" : "k001604_1");
295		k001604_tile_w(k001604, offset, data, mem_mask);
	295	k001604_tile_w(k001604, space, offset, data, mem_mask);
296	296	}
297	297
298	298
299	299	READ32_MEMBER(gticlub_state::gticlub_k001604_char_r)
300	300	{
301	301	device_t *k001604 = machine().device(get_cgboard_id() ? "k001604_2" : "k001604_1");
302		return k001604_char_r(k001604, offset, mem_mask);
	302	return k001604_char_r(k001604, space, offset, mem_mask);
303	303	}
304	304
305	305	WRITE32_MEMBER(gticlub_state::gticlub_k001604_char_w)
306	306	{
307	307	device_t *k001604 = machine().device(get_cgboard_id() ? "k001604_2" : "k001604_1");
308		k001604_char_w(k001604, offset, data, mem_mask);
	308	k001604_char_w(k001604, space, offset, data, mem_mask);
309	309	}
310	310
311	311	READ32_MEMBER(gticlub_state::gticlub_k001604_reg_r)
312	312	{
313	313	device_t *k001604 = machine().device(get_cgboard_id() ? "k001604_2" : "k001604_1");
314		return k001604_reg_r(k001604, offset, mem_mask);
	314	return k001604_reg_r(k001604, space, offset, mem_mask);
315	315	}
316	316
317	317	WRITE32_MEMBER(gticlub_state::gticlub_k001604_reg_w)
318	318	{
319	319	device_t *k001604 = machine().device(get_cgboard_id() ? "k001604_2" : "k001604_1");
320		k001604_reg_w(k001604, offset, data, mem_mask);
	320	k001604_reg_w(k001604, space, offset, data, mem_mask);
321	321	}
322	322
323	323

trunk/src/mame/drivers/namcona1.c

r17961	r17962
806	806	{
807	807	device_t *device = machine().device("c140");
808	808	/* can't use DEVREADWRITE8 for this because it is opposite endianness to the CPU for some reason */
809		return c140_r(device,offset*2+1) | c140_r(device,offset*2)<<8;
	809	return c140_r(device,space,offset*2+1) | c140_r(device,space,offset*2)<<8;
810	810	}
811	811
812	812	WRITE16_MEMBER(namcona1_state::snd_w)
r17961	r17962
815	815	/* can't use DEVREADWRITE8 for this because it is opposite endianness to the CPU for some reason */
816	816	if (ACCESSING_BITS_0_7)
817	817	{
818		c140_w(device,(offset*2)+1, data);
	818	c140_w(device,space,(offset*2)+1, data);
819	819	}
820	820
821	821	if (ACCESSING_BITS_8_15)
822	822	{
823		c140_w(device,(offset*2), data>>8);
	823	c140_w(device,space,(offset*2), data>>8);
824	824	}
825	825	}
826	826

trunk/src/mame/drivers/dkong.c

r17961	r17962
568	568	READ8_MEMBER(dkong_state::dkong_in2_r)
569	569	{
570	570	/* mcu status (sound feedback) is inverted bit4 from port B (8039) */
571		UINT8 mcustatus = latch8_bit4_q_r(m_dev_vp2, 0);
	571	UINT8 mcustatus = latch8_bit4_q_r(m_dev_vp2, space, 0);
572	572	UINT8 r;
573	573
574	574	r = (ioport("IN2")->read() & 0xBF) | (mcustatus << 6);

trunk/src/mame/drivers/sprint4.c

r17961	r17962
187	187	WRITE8_MEMBER(sprint4_state::sprint4_screech_1_w)
188	188	{
189	189	device_t *device = machine().device("discrete");
190		discrete_sound_w(device, SPRINT4_SCREECH_EN_1, offset & 1);
	190	discrete_sound_w(device, space, SPRINT4_SCREECH_EN_1, offset & 1);
191	191	}
192	192
193	193
194	194	WRITE8_MEMBER(sprint4_state::sprint4_screech_2_w)
195	195	{
196	196	device_t *device = machine().device("discrete");
197		discrete_sound_w(device, SPRINT4_SCREECH_EN_2, offset & 1);
	197	discrete_sound_w(device, space, SPRINT4_SCREECH_EN_2, offset & 1);
198	198	}
199	199
200	200
201	201	WRITE8_MEMBER(sprint4_state::sprint4_screech_3_w)
202	202	{
203	203	device_t *device = machine().device("discrete");
204		discrete_sound_w(device, SPRINT4_SCREECH_EN_3, offset & 1);
	204	discrete_sound_w(device, space, SPRINT4_SCREECH_EN_3, offset & 1);
205	205	}
206	206
207	207
208	208	WRITE8_MEMBER(sprint4_state::sprint4_screech_4_w)
209	209	{
210	210	device_t *device = machine().device("discrete");
211		discrete_sound_w(device, SPRINT4_SCREECH_EN_4, offset & 1);
	211	discrete_sound_w(device, space, SPRINT4_SCREECH_EN_4, offset & 1);
212	212	}
213	213
214	214
r17961	r17962
217	217	WRITE8_MEMBER(sprint4_state::sprint4_bang_w)
218	218	{
219	219	device_t *device = machine().device("discrete");
220		discrete_sound_w(device, SPRINT4_BANG_DATA, data & 0x0f);
	220	discrete_sound_w(device, space, SPRINT4_BANG_DATA, data & 0x0f);
221	221	}
222	222
223	223
224	224	WRITE8_MEMBER(sprint4_state::sprint4_attract_w)
225	225	{
226	226	device_t *device = machine().device("discrete");
227		discrete_sound_w(device, SPRINT4_ATTRACT_EN, data & 1);
	227	discrete_sound_w(device, space, SPRINT4_ATTRACT_EN, data & 1);
228	228	}
229	229
230	230

trunk/src/mame/drivers/nyny.c

r17961	r17962
277	277	1,               /* A pin - driven by the CRTC */
278	278	1,               /* B pin - pulled high */
279	279	1,               /* Clear pin - pulled high */
280		ic48_1_74123_output_changed
	280	DEVCB_HANDLER(ic48_1_74123_output_changed)
281	281	};
282	282
283	283
r17961	r17962
420	420
421	421	WRITE_LINE_MEMBER(nyny_state::display_enable_changed)
422	422	{
423		ttl74123_a_w(m_ic48_1, 0, state);
	423	ttl74123_a_w(m_ic48_1, generic_space(), 0, state);
424	424	}
425	425
426	426

trunk/src/mame/drivers/prehisle.c

r17961	r17962
42	42	WRITE8_MEMBER(prehisle_state::D7759_write_port_0_w)
43	43	{
44	44	device_t *device = machine().device("upd");
45		upd7759_port_w(device, 0, data);
	45	upd7759_port_w(device, space, 0, data);
46	46	upd7759_start_w(device, 0);
47	47	upd7759_start_w(device, 1);
48	48	}

trunk/src/mame/drivers/polepos.c

r17961	r17962
303	303	polepos_sound_enable(machine().device("namco"),bit);
304	304	if (!bit)
305	305	{
306		polepos_engine_sound_lsb_w(machine().device("polepos"), 0, 0);
307		polepos_engine_sound_msb_w(machine().device("polepos"), 0, 0);
	306	polepos_engine_sound_lsb_w(machine().device("polepos"), space, 0, 0);
	307	polepos_engine_sound_msb_w(machine().device("polepos"), space, 0, 0);
308	308	}
309	309	break;
310	310

trunk/src/mame/drivers/tank8.c

r17961	r17962
47	47	WRITE8_MEMBER(tank8_state::tank8_crash_w)
48	48	{
49	49	device_t *device = machine().device("discrete");
50		discrete_sound_w(device, TANK8_CRASH_EN, data);
	50	discrete_sound_w(device, space, TANK8_CRASH_EN, data);
51	51	}
52	52
53	53	WRITE8_MEMBER(tank8_state::tank8_explosion_w)
54	54	{
55	55	device_t *device = machine().device("discrete");
56		discrete_sound_w(device, TANK8_EXPLOSION_EN, data);
	56	discrete_sound_w(device, space, TANK8_EXPLOSION_EN, data);
57	57	}
58	58
59	59	WRITE8_MEMBER(tank8_state::tank8_bugle_w)
60	60	{
61	61	device_t *device = machine().device("discrete");
62		discrete_sound_w(device, TANK8_BUGLE_EN, data);
	62	discrete_sound_w(device, space, TANK8_BUGLE_EN, data);
63	63	}
64	64
65	65	WRITE8_MEMBER(tank8_state::tank8_bug_w)
r17961	r17962
68	68	/* D0 and D1 determine the on/off time off the square wave */
69	69	switch(data & 3) {
70	70	case 0:
71		discrete_sound_w(device, TANK8_BUGLE_DATA1,8.0);
72		discrete_sound_w(device, TANK8_BUGLE_DATA2,4.0);
	71	discrete_sound_w(device, space, TANK8_BUGLE_DATA1,8.0);
	72	discrete_sound_w(device, space, TANK8_BUGLE_DATA2,4.0);
73	73	break;
74	74	case 1:
75		discrete_sound_w(device, TANK8_BUGLE_DATA1,8.0);
76		discrete_sound_w(device, TANK8_BUGLE_DATA2,7.0);
	75	discrete_sound_w(device, space, TANK8_BUGLE_DATA1,8.0);
	76	discrete_sound_w(device, space, TANK8_BUGLE_DATA2,7.0);
77	77	break;
78	78	case 2:
79		discrete_sound_w(device, TANK8_BUGLE_DATA1,8.0);
80		discrete_sound_w(device, TANK8_BUGLE_DATA2,2.0);
	79	discrete_sound_w(device, space, TANK8_BUGLE_DATA1,8.0);
	80	discrete_sound_w(device, space, TANK8_BUGLE_DATA2,2.0);
81	81	break;
82	82	case 3:
83		discrete_sound_w(device, TANK8_BUGLE_DATA1,16.0);
84		discrete_sound_w(device, TANK8_BUGLE_DATA2,4.0);
	83	discrete_sound_w(device, space, TANK8_BUGLE_DATA1,16.0);
	84	discrete_sound_w(device, space, TANK8_BUGLE_DATA2,4.0);
85	85	break;
86	86	}
87	87
r17961	r17962
90	90	WRITE8_MEMBER(tank8_state::tank8_attract_w)
91	91	{
92	92	device_t *device = machine().device("discrete");
93		discrete_sound_w(device, TANK8_ATTRACT_EN, data);
	93	discrete_sound_w(device, space, TANK8_ATTRACT_EN, data);
94	94	}
95	95
96	96	WRITE8_MEMBER(tank8_state::tank8_motor_w)
97	97	{
98	98	device_t *device = machine().device("discrete");
99		discrete_sound_w(device, NODE_RELATIVE(TANK8_MOTOR1_EN, offset), data);
	99	discrete_sound_w(device, space, NODE_RELATIVE(TANK8_MOTOR1_EN, offset), data);
100	100	}
101	101
102	102	static ADDRESS_MAP_START( tank8_cpu_map, AS_PROGRAM, 8, tank8_state )

trunk/src/mame/drivers/qdrmfgp.c

r17961	r17962
120	120	{
121	121	device_t *k056832 = machine().device("k056832");
122	122	UINT8 *mem8 = memregion("gfx1")->base();
123		int bank = k056832_word_r(k056832, 0x34/2, 0xffff);
	123	int bank = k056832_word_r(k056832, space, 0x34/2, 0xffff);
124	124
125	125	offset += bank * 0x800 * 4;
126	126
r17961	r17962
136	136	device_t *k056832 = machine().device("k056832");
137	137
138	138	if (offset < 0x1000 / 2)
139		return k056832_ram_word_r(k056832, offset * 2 + 1, mem_mask);
	139	return k056832_ram_word_r(k056832, space, offset * 2 + 1, mem_mask);
140	140	else
141		return k056832_ram_word_r(k056832, (offset - 0x1000 / 2) * 2, mem_mask);
	141	return k056832_ram_word_r(k056832, space, (offset - 0x1000 / 2) * 2, mem_mask);
142	142	}
143	143
144	144	READ16_MEMBER(qdrmfgp_state::gp2_vram_mirror_r)
r17961	r17962
146	146	device_t *k056832 = machine().device("k056832");
147	147
148	148	if (offset < 0x1000 / 2)
149		return k056832_ram_word_r(k056832, offset * 2, mem_mask);
	149	return k056832_ram_word_r(k056832, space, offset * 2, mem_mask);
150	150	else
151		return k056832_ram_word_r(k056832, (offset - 0x1000 / 2) * 2 + 1, mem_mask);
	151	return k056832_ram_word_r(k056832, space, (offset - 0x1000 / 2) * 2 + 1, mem_mask);
152	152	}
153	153
154	154	WRITE16_MEMBER(qdrmfgp_state::gp2_vram_w)
r17961	r17962
156	156	device_t *k056832 = machine().device("k056832");
157	157
158	158	if (offset < 0x1000 / 2)
159		k056832_ram_word_w(k056832, offset * 2 + 1, data, mem_mask);
	159	k056832_ram_word_w(k056832, space, offset * 2 + 1, data, mem_mask);
160	160	else
161		k056832_ram_word_w(k056832, (offset - 0x1000 / 2) * 2, data, mem_mask);
	161	k056832_ram_word_w(k056832, space, (offset - 0x1000 / 2) * 2, data, mem_mask);
162	162	}
163	163
164	164	WRITE16_MEMBER(qdrmfgp_state::gp2_vram_mirror_w)
r17961	r17962
166	166	device_t *k056832 = machine().device("k056832");
167	167
168	168	if (offset < 0x1000 / 2)
169		k056832_ram_word_w(k056832, offset * 2, data, mem_mask);
	169	k056832_ram_word_w(k056832, space, offset * 2, data, mem_mask);
170	170	else
171		k056832_ram_word_w(k056832, (offset - 0x1000 / 2) * 2 + 1, data, mem_mask);
	171	k056832_ram_word_w(k056832, space, (offset - 0x1000 / 2) * 2 + 1, data, mem_mask);
172	172	}
173	173
174	174
r17961	r17962
201	201	{
202	202	device_t *device = machine().device("ide");
203	203	if (offset & 0x01)
204		return ide_controller16_r(device, IDE_STD_OFFSET + offset/2, 0xff00) >> 8;
	204	return ide_controller16_r(device, space, IDE_STD_OFFSET + offset/2, 0xff00) >> 8;
205	205	else
206		return ide_controller16_r(device, IDE_STD_OFFSET + offset/2, 0xffff);
	206	return ide_controller16_r(device, space, IDE_STD_OFFSET + offset/2, 0xffff);
207	207	}
208	208
209	209	WRITE16_MEMBER(qdrmfgp_state::ide_std_w)
210	210	{
211	211	device_t *device = machine().device("ide");
212	212	if (offset & 0x01)
213		ide_controller16_w(device, IDE_STD_OFFSET + offset/2, data << 8, 0xff00);
	213	ide_controller16_w(device, space, IDE_STD_OFFSET + offset/2, data << 8, 0xff00);
214	214	else
215		ide_controller16_w(device, IDE_STD_OFFSET + offset/2, data, 0xffff);
	215	ide_controller16_w(device, space, IDE_STD_OFFSET + offset/2, data, 0xffff);
216	216	}
217	217
218	218	READ16_MEMBER(qdrmfgp_state::ide_alt_r)
219	219	{
220	220	device_t *device = machine().device("ide");
221	221	if (offset == 0)
222		return ide_controller16_r(device, IDE_ALT_OFFSET, 0x00ff);
	222	return ide_controller16_r(device, space, IDE_ALT_OFFSET, 0x00ff);
223	223
224	224	return 0;
225	225	}
r17961	r17962
228	228	{
229	229	device_t *device = machine().device("ide");
230	230	if (offset == 0)
231		ide_controller16_w(device, IDE_ALT_OFFSET, data, 0x00ff);
	231	ide_controller16_w(device, space, IDE_ALT_OFFSET, data, 0x00ff);
232	232	}
233	233
234	234
r17961	r17962
251	251	break;
252	252	}
253	253	}
254		return ide_controller16_r(device, IDE_STD_OFFSET + offset/2, 0xff00) >> 8;
	254	return ide_controller16_r(device, space, IDE_STD_OFFSET + offset/2, 0xff00) >> 8;
255	255	} else {
256		return ide_controller16_r(device, IDE_STD_OFFSET + offset/2, 0xffff);
	256	return ide_controller16_r(device, space, IDE_STD_OFFSET + offset/2, 0xffff);
257	257	}
258	258	}
259	259

trunk/src/mame/drivers/wiz.c

r17961	r17962
185	185
186	186	// explosion sound trigger(analog?)
187	187	case 0x08:
188		discrete_sound_w(discrete, STINGER_BOOM_EN1, m_dsc1);
189		discrete_sound_w(discrete, STINGER_BOOM_EN2, m_dsc1^=1);
	188	discrete_sound_w(discrete, space, STINGER_BOOM_EN1, m_dsc1);
	189	discrete_sound_w(discrete, space, STINGER_BOOM_EN2, m_dsc1^=1);
190	190	break;
191	191
192	192	// player shot sound trigger(analog?)
193	193	case 0x0a:
194		discrete_sound_w(discrete, STINGER_SHOT_EN1, m_dsc0);
195		discrete_sound_w(discrete, STINGER_SHOT_EN2, m_dsc0^=1);
	194	discrete_sound_w(discrete, space, STINGER_SHOT_EN1, m_dsc0);
	195	discrete_sound_w(discrete, space, STINGER_SHOT_EN2, m_dsc0^=1);
196	196	break;
197	197	}
198	198	}

trunk/src/mame/drivers/galaxian.c

r17961	r17962
515	515	{
516	516	/* the decoding here is very simplistic, and you can address both simultaneously */
517	517	UINT8 result = 0xff;
518		if (offset & 0x20) result &= ay8910_r(machine().device("8910.1"), 0);
519		if (offset & 0x80) result &= ay8910_r(machine().device("8910.0"), 0);
	518	if (offset & 0x20) result &= ay8910_r(machine().device("8910.1"), space, 0);
	519	if (offset & 0x80) result &= ay8910_r(machine().device("8910.0"), space, 0);
520	520	return result;
521	521	}
522	522
r17961	r17962
526	526	/* AV 4,5 ==> AY8910 #2 */
527	527	/* the decoding here is very simplistic, and you can address two simultaneously */
528	528	if (offset & 0x10)
529		ay8910_address_w(machine().device("8910.1"), 0, data);
	529	ay8910_address_w(machine().device("8910.1"), space, 0, data);
530	530	else if (offset & 0x20)
531		ay8910_data_w(machine().device("8910.1"), 0, data);
	531	ay8910_data_w(machine().device("8910.1"), space, 0, data);
532	532	/* AV6,7 ==> AY8910 #1 */
533	533	if (offset & 0x40)
534		ay8910_address_w(machine().device("8910.0"), 0, data);
	534	ay8910_address_w(machine().device("8910.0"), space, 0, data);
535	535	else if (offset & 0x80)
536		ay8910_data_w(machine().device("8910.0"), 0, data);
	536	ay8910_data_w(machine().device("8910.0"), space, 0, data);
537	537	}
538	538
539	539
r17961	r17962
604	604
605	605	/* low bit goes to 0.22uF capacitor = 220000pF  */
606	606	/* high bit goes to 0.047uF capacitor = 47000pF */
607		discrete_sound_w(discrete, NODE(3 * which + chan + 11), bits);
	607	discrete_sound_w(discrete, space, NODE(3 * which + chan + 11), bits);
608	608	}
609	609	}
610	610
r17961	r17962
906	906	{
907	907	/* the decoding here is very simplistic */
908	908	UINT8 result = 0xff;
909		if (offset & 0x40) result &= ay8910_r(machine().device("8910.0"), 0);
	909	if (offset & 0x40) result &= ay8910_r(machine().device("8910.0"), space, 0);
910	910	return result;
911	911	}
912	912
r17961	r17962
916	916	/* the decoding here is very simplistic */
917	917	/* AV6,7 ==> AY8910 #1 */
918	918	if (offset & 0x40)
919		ay8910_data_w(machine().device("8910.0"), 0, data);
	919	ay8910_data_w(machine().device("8910.0"), space, 0, data);
920	920	else if (offset & 0x80)
921		ay8910_address_w(machine().device("8910.0"), 0, data);
	921	ay8910_address_w(machine().device("8910.0"), space, 0, data);
922	922	}
923	923
924	924
r17961	r17962
985	985	{
986	986	/* the decoding here is very simplistic, and you can address both simultaneously */
987	987	UINT8 result = 0xff;
988		if (offset & 0x08) result &= ay8910_r(machine().device("8910.2"), 0);
989		if (offset & 0x20) result &= ay8910_r(machine().device("8910.1"), 0);
990		if (offset & 0x80) result &= ay8910_r(machine().device("8910.0"), 0);
	988	if (offset & 0x08) result &= ay8910_r(machine().device("8910.2"), space, 0);
	989	if (offset & 0x20) result &= ay8910_r(machine().device("8910.1"), space, 0);
	990	if (offset & 0x80) result &= ay8910_r(machine().device("8910.0"), space, 0);
991	991	return result;
992	992	}
993	993
r17961	r17962
995	995	WRITE8_MEMBER(galaxian_state::scorpion_ay8910_w)
996	996	{
997	997	/* the decoding here is very simplistic, and you can address all six simultaneously */
998		if (offset & 0x04) ay8910_address_w(machine().device("8910.2"), 0, data);
999		if (offset & 0x08) ay8910_data_w(machine().device("8910.2"), 0, data);
1000		if (offset & 0x10) ay8910_address_w(machine().device("8910.1"), 0, data);
1001		if (offset & 0x20) ay8910_data_w(machine().device("8910.1"), 0, data);
1002		if (offset & 0x40) ay8910_address_w(machine().device("8910.0"), 0, data);
1003		if (offset & 0x80) ay8910_data_w(machine().device("8910.0"), 0, data);
	998	if (offset & 0x04) ay8910_address_w(machine().device("8910.2"), space, 0, data);
	999	if (offset & 0x08) ay8910_data_w(machine().device("8910.2"), space, 0, data);
	1000	if (offset & 0x10) ay8910_address_w(machine().device("8910.1"), space, 0, data);
	1001	if (offset & 0x20) ay8910_data_w(machine().device("8910.1"), space, 0, data);
	1002	if (offset & 0x40) ay8910_address_w(machine().device("8910.0"), space, 0, data);
	1003	if (offset & 0x80) ay8910_data_w(machine().device("8910.0"), space, 0, data);
1004	1004	}
1005	1005
1006	1006
r17961	r17962
1115	1115	/* bit 0 = WRITE */
1116	1116	/* bit 1 = C/D */
1117	1117	if ((offset & 1) != 0)
1118		ay8910_data_address_w(machine().device("aysnd"), offset >> 1, m_zigzag_ay8910_latch);
	1118	ay8910_data_address_w(machine().device("aysnd"), space, offset >> 1, m_zigzag_ay8910_latch);
1119	1119	break;
1120	1120
1121	1121	case 0x100:
r17961	r17962
1208	1208	WRITE8_MEMBER(galaxian_state::mshuttle_ay8910_control_w)
1209	1209	{
1210	1210	if (!m_mshuttle_ay8910_cs)
1211		ay8910_address_w(machine().device("aysnd"), offset, data);
	1211	ay8910_address_w(machine().device("aysnd"), space, offset, data);
1212	1212	}
1213	1213
1214	1214
1215	1215	WRITE8_MEMBER(galaxian_state::mshuttle_ay8910_data_w)
1216	1216	{
1217	1217	if (!m_mshuttle_ay8910_cs)
1218		ay8910_data_w(machine().device("aysnd"), offset, data);
	1218	ay8910_data_w(machine().device("aysnd"), space, offset, data);
1219	1219	}
1220	1220
1221	1221
1222	1222	READ8_MEMBER(galaxian_state::mshuttle_ay8910_data_r)
1223	1223	{
1224	1224	if (!m_mshuttle_ay8910_cs)
1225		return ay8910_r(machine().device("aysnd"), offset);
	1225	return ay8910_r(machine().device("aysnd"), space, offset);
1226	1226	return 0xff;
1227	1227	}
1228	1228

trunk/src/mame/drivers/flstory.c

r17961	r17962
997	997
998	998	static const msm5232_interface msm5232_config =
999	999	{
1000		{ 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6 }   /* 1.0 uF capacitors (verified on real PCB) */
	1000	{ 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6 },   /* 1.0 uF capacitors (verified on real PCB) */
	1001	DEVCB_NULL
1001	1002	};
1002	1003
1003	1004

trunk/src/mame/drivers/segag80r.c

r17961	r17962
188	188	WRITE8_MEMBER(segag80r_state::monsterb_vidram_w){ monsterb_videoram_w(space, decrypt_offset(&space, offset), data); }
189	189	WRITE8_MEMBER(segag80r_state::pignewt_vidram_w){ pignewt_videoram_w(space, decrypt_offset(&space, offset), data); }
190	190	WRITE8_MEMBER(segag80r_state::sindbadm_vidram_w){ sindbadm_videoram_w(space, decrypt_offset(&space, offset), data); }
191		WRITE8_MEMBER(segag80r_state::usb_ram_w){ device_t *device = machine().device("usbsnd"); sega_usb_ram_w(device, decrypt_offset(machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
	191	WRITE8_MEMBER(segag80r_state::usb_ram_w){ device_t *device = machine().device("usbsnd"); sega_usb_ram_w(device, space, decrypt_offset(machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
192	192
193	193
194	194

trunk/src/mame/drivers/tmnt.c

r17961	r17962
86	86	/* some games have the A12 line not connected, so the chip spans */
87	87	/* twice the memory range, with mirroring */
88	88	offset = ((offset & 0x3000) >> 1) | (offset & 0x07ff);
89		return k052109_word_r(m_k052109, offset, mem_mask);
	89	return k052109_word_r(m_k052109, space, offset, mem_mask);
90	90	}
91	91
92	92	WRITE16_MEMBER(tmnt_state::k052109_word_noA12_w)
r17961	r17962
95	95	/* some games have the A12 line not connected, so the chip spans */
96	96	/* twice the memory range, with mirroring */
97	97	offset = ((offset & 0x3000) >> 1) | (offset & 0x07ff);
98		k052109_word_w(m_k052109, offset, data, mem_mask);
	98	k052109_word_w(m_k052109, space, offset, data, mem_mask);
99	99	}
100	100
101	101	WRITE16_MEMBER(tmnt_state::punkshot_k052109_word_w)
r17961	r17962
104	104	/* it seems that a word write is supposed to affect only the MSB. The */
105	105	/* "ROUND 1" text in punkshtj goes lost otherwise. */
106	106	if (ACCESSING_BITS_8_15)
107		k052109_w(m_k052109, offset, (data >> 8) & 0xff);
	107	k052109_w(m_k052109, space, offset, (data >> 8) & 0xff);
108	108	else if (ACCESSING_BITS_0_7)
109		k052109_w(m_k052109, offset + 0x2000, data & 0xff);
	109	k052109_w(m_k052109, space, offset + 0x2000, data & 0xff);
110	110	}
111	111
112	112	WRITE16_MEMBER(tmnt_state::punkshot_k052109_word_noA12_w)
r17961	r17962
129	129	else
130	130	{
131	131	offset = ((offset & 0x000e) >> 1) | ((offset & 0x1fc0) >> 3);
132		return k053245_word_r(m_k053245, offset, mem_mask);
	132	return k053245_word_r(m_k053245, space, offset, mem_mask);
133	133	}
134	134	}
135	135
r17961	r17962
141	141	if (!(offset & 0x0031))
142	142	{
143	143	offset = ((offset & 0x000e) >> 1) | ((offset & 0x1fc0) >> 3);
144		k053245_word_w(m_k053245, offset, data, mem_mask);
	144	k053245_word_w(m_k053245, space, offset, data, mem_mask);
145	145	}
146	146	}
147	147
r17961	r17962
150	150
151	151	offset &= ~1;   /* handle mirror address */
152	152
153		return k053244_r(m_k053245, offset + 1) | (k053244_r(m_k053245, offset) << 8);
	153	return k053244_r(m_k053245, space, offset + 1) | (k053244_r(m_k053245, space, offset) << 8);
154	154	}
155	155
156	156	WRITE16_MEMBER(tmnt_state::k053244_word_noA1_w)
r17961	r17962
159	159	offset &= ~1;   /* handle mirror address */
160	160
161	161	if (ACCESSING_BITS_8_15)
162		k053244_w(m_k053245, offset, (data >> 8) & 0xff);
	162	k053244_w(m_k053245, space, offset, (data >> 8) & 0xff);
163	163	if (ACCESSING_BITS_0_7)
164		k053244_w(m_k053245, offset + 1, data & 0xff);
	164	k053244_w(m_k053245, space, offset + 1, data & 0xff);
165	165	}
166	166
167	167	static INTERRUPT_GEN(cuebrick_interrupt)
r17961	r17962
201	201	device_t *device = machine().device("k053260");
202	202	/* If the sound CPU is running, read the status, otherwise
203	203	just make it pass the test */
204		return k053260_r(device, 2 + offset);
	204	return k053260_r(device, space, 2 + offset);
205	205	}
206	206
207	207	WRITE8_MEMBER(tmnt_state::glfgreat_sound_w)
208	208	{
209	209	device_t *device = machine().device("k053260");
210		k053260_w(device, offset, data);
	210	k053260_w(device, space, offset, data);
211	211
212	212	if (offset)
213	213	m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff);
r17961	r17962
376	376	data = -space.read_word(0x105818);
377	377	data = ((data / 8 - 4) & 0x1f) * 0x40;
378	378	data += ((space.read_word(0x105cb0) +
379		256 * k052109_r(m_k052109, 0x1a01) + k052109_r(m_k052109, 0x1a00) - 6) / 8 + 12) & 0x3f;
	379	256 * k052109_r(m_k052109, space, 0x1a01) + k052109_r(m_k052109, space, 0x1a00) - 6) / 8 + 12) & 0x3f;
380	380	return data;
381	381
382	382	default:
r17961	r17962
403	403	{
404	404	if ((space.read_word(0x180006 + 128 * i) >> 8) == logical_pri)
405	405	{
406		k053245_word_w(m_k053245, 8 * i, hardware_pri, 0x00ff);
	406	k053245_word_w(m_k053245, space, 8 * i, hardware_pri, 0x00ff);
407	407	hardware_pri++;
408	408	}
409	409	}
r17961	r17962
697	697
698	698	if (ACCESSING_BITS_8_15)
699	699	{
700		k053251_w(m_k053251, offset, (data >> 8) & 0xff);
	700	k053251_w(m_k053251, space, offset, (data >> 8) & 0xff);
701	701
702	702	/* FIXME: in the old code k052109 tilemaps were tilemaps 2,3,4 for k053251
703	703	and got marked as dirty in the write above... how was the original hardware working?!? */
r17961	r17962
785	785	if (!(offs & 0x0031))
786	786	{
787	787	offs = ((offs & 0x000e) >> 1) | ((offs & 0x1fc0) >> 3);
788		k053245_word_w(state->m_k053245, offs, data, 0xffff);
	788	k053245_word_w(state->m_k053245, *space, offs, data, 0xffff);
789	789	}
790	790	}
791	791	else if (addr >= 0x104000 / 2 && addr <= 0x107fff / 2)

trunk/src/mame/drivers/berzerk.c

r17961	r17962
548	548
549	549	/* offset 6 writes to the sfxcontrol latch */
550	550	case 6:
551		exidy_sfxctrl_w(machine().device("exidy"), data >> 6, data);
	551	exidy_sfxctrl_w(machine().device("exidy"), space, data >> 6, data);
552	552	break;
553	553
554	554	/* everything else writes to the 6840 */
555	555	default:
556		exidy_sh6840_w(machine().device("exidy"), offset, data);
	556	exidy_sh6840_w(machine().device("exidy"), space, offset, data);
557	557	break;
558	558
559	559	}
r17961	r17962
574	574	return 0;
575	575	/* everything else reads from the 6840 */
576	576	default:
577		return exidy_sh6840_r(machine().device("exidy"), offset);
	577	return exidy_sh6840_r(machine().device("exidy"), space, offset);
578	578	}
579	579	}
580	580

trunk/src/mame/drivers/spy.c

r17961	r17962
356	356	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
357	357	{
358	358	if (offset >= 0x3800 && offset < 0x3808)
359		return k051937_r(m_k051960, offset - 0x3800);
	359	return k051937_r(m_k051960, space, offset - 0x3800);
360	360	else if (offset < 0x3c00)
361		return k052109_r(m_k052109, offset);
	361	return k052109_r(m_k052109, space, offset);
362	362	else
363		return k051960_r(m_k051960, offset - 0x3c00);
	363	return k051960_r(m_k051960, space, offset - 0x3c00);
364	364	}
365	365	else
366		return k052109_r(m_k052109, offset);
	366	return k052109_r(m_k052109, space, offset);
367	367	}
368	368
369	369	WRITE8_MEMBER(spy_state::k052109_051960_w)
370	370	{
371	371
372	372	if (offset >= 0x3800 && offset < 0x3808)
373		k051937_w(m_k051960, offset - 0x3800, data);
	373	k051937_w(m_k051960, space, offset - 0x3800, data);
374	374	else if (offset < 0x3c00)
375		k052109_w(m_k052109, offset, data);
	375	k052109_w(m_k052109, space, offset, data);
376	376	else
377		k051960_w(m_k051960, offset - 0x3c00, data);
	377	k051960_w(m_k051960, space, offset - 0x3c00, data);
378	378	}
379	379
380	380	static ADDRESS_MAP_START( spy_map, AS_PROGRAM, 8, spy_state )

trunk/src/mame/drivers/model3.c

r17961	r17962
1638	1638	model3_set_irq_line(machine(), 0x40, CLEAR_LINE);
1639	1639
1640	1640	// send to the sound board
1641		scsp_midi_in(machine().device("scsp1"), 0, data, 0);
	1641	scsp_midi_in(machine().device("scsp1"), space, 0, data, 0);
1642	1642
1643	1643	if (m_sound_irq_enable)
1644	1644	{

trunk/src/mame/drivers/ironhors.c

r17961	r17962
46	46	WRITE8_MEMBER(ironhors_state::ironhors_filter_w)
47	47	{
48	48	device_t *device = machine().device("disc_ih");
49		discrete_sound_w(device, NODE_11, (data & 0x04) >> 2);
50		discrete_sound_w(device, NODE_12, (data & 0x02) >> 1);
51		discrete_sound_w(device, NODE_13, (data & 0x01) >> 0);
	49	discrete_sound_w(device, space, NODE_11, (data & 0x04) >> 2);
	50	discrete_sound_w(device, space, NODE_12, (data & 0x02) >> 1);
	51	discrete_sound_w(device, space, NODE_13, (data & 0x01) >> 0);
52	52	}
53	53
54	54	/*************************************

trunk/src/mame/drivers/spiders.c

r17961	r17962
387	387	1,               /* A pin - driven by the CRTC */
388	388	1,               /* B pin - pulled high */
389	389	1,               /* Clear pin - pulled high */
390		ic60_74123_output_changed
	390	DEVCB_HANDLER(ic60_74123_output_changed)
391	391	};
392	392
393	393
r17961	r17962
500	500
501	501	WRITE_LINE_MEMBER(spiders_state::display_enable_changed)
502	502	{
503		ttl74123_a_w(machine().device("ic60"), 0, state);
	503	address_space &space = generic_space();
	504	ttl74123_a_w(machine().device("ic60"), space, 0, state);
504	505	}
505	506
506	507

trunk/src/mame/drivers/mlanding.c

r17961	r17962
348	348	{
349	349	device_t *tc0140syt = machine().device("tc0140syt");
350	350	if (offset == 0)
351		tc0140syt_port_w(tc0140syt, 0, data & 0xff);
	351	tc0140syt_port_w(tc0140syt, space, 0, data & 0xff);
352	352	else if (offset == 1)
353	353	{
354	354	//machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, ASSERT_LINE);
355		tc0140syt_comm_w(tc0140syt, 0, data & 0xff);
	355	tc0140syt_comm_w(tc0140syt, space, 0, data & 0xff);
356	356	}
357	357	}
358	358
r17961	r17962
360	360	{
361	361	device_t *tc0140syt = machine().device("tc0140syt");
362	362	if (offset == 0)
363		tc0140syt_slave_port_w(tc0140syt, 0, data & 0xff);
	363	tc0140syt_slave_port_w(tc0140syt, space, 0, data & 0xff);
364	364	else if (offset == 1)
365	365	{
366	366	//machine().device("audiocpu")->execute().set_input_line(INPUT_LINE_NMI, CLEAR_LINE);
367		tc0140syt_slave_comm_w(tc0140syt, 0, data & 0xff);
	367	tc0140syt_slave_comm_w(tc0140syt, space, 0, data & 0xff);
368	368	}
369	369	}
370	370

trunk/src/mame/drivers/neoprint.c

r17961	r17962
136	136	//if(space.device().safe_pc() != 0x4b38 )//&& space.device().safe_pc() != 0x5f86 && space.device().safe_pc() != 0x5f90)
137	137	//  printf("%08x\n",space.device().safe_pc());
138	138
139		return (upd4990a_databit_r(machine().device("upd4990a"), 0) << 15);
	139	return (upd4990a_databit_r(machine().device("upd4990a"), space, 0) << 15);
140	140	}
141	141
142	142	WRITE16_MEMBER(neoprint_state::neoprint_calendar_w)
143	143	{
144		upd4990a_control_16_w(machine().device("upd4990a"), 0, ((data >> 8) & 7), mem_mask);
	144	upd4990a_control_16_w(machine().device("upd4990a"), space, 0, ((data >> 8) & 7), mem_mask);
145	145	}
146	146
147	147	READ8_MEMBER(neoprint_state::neoprint_unk_r)

trunk/src/mame/drivers/seattle.c

r17961	r17962
1068	1068	}
1069	1069
1070	1070	/* write the data and advance */
1071		voodoo_w(state->m_voodoo, (dstaddr & 0xffffff) / 4, space->read_dword(srcaddr), 0xffffffff);
	1071	voodoo_w(state->m_voodoo, *space, (dstaddr & 0xffffff) / 4, space->read_dword(srcaddr), 0xffffffff);
1072	1072	srcaddr += srcinc;
1073	1073	dstaddr += dstinc;
1074	1074	bytesleft -= 4;
r17961	r17962
1353	1353	/* if we're not stalled, just write and get out */
1354	1354	if (!m_voodoo_stalled)
1355	1355	{
1356		voodoo_w(m_voodoo, offset, data, mem_mask);
	1356	voodoo_w(m_voodoo, space, offset, data, mem_mask);
1357	1357	return;
1358	1358	}
1359	1359
r17961	r17962
1419	1419	{
1420	1420	/* if the CPU had a pending write, do it now */
1421	1421	if (state->m_cpu_stalled_on_voodoo)
1422		voodoo_w(device, state->m_cpu_stalled_offset, state->m_cpu_stalled_data, state->m_cpu_stalled_mem_mask);
	1422	{
	1423	address_space &space = *device->machine().firstcpu->space(AS_PROGRAM);
	1424	voodoo_w(device, space, state->m_cpu_stalled_offset, state->m_cpu_stalled_data, state->m_cpu_stalled_mem_mask);
	1425	}
1423	1426	state->m_cpu_stalled_on_voodoo = FALSE;
1424	1427
1425	1428	/* resume CPU execution */
r17961	r17962
1523	1526	{
1524	1527	device_t *device = machine().device("ethernet");
1525	1528	if (!(offset & 8))
1526		return smc91c9x_r(device, offset & 7, mem_mask & 0xffff);
	1529	return smc91c9x_r(device, space, offset & 7, mem_mask & 0xffff);
1527	1530	else
1528		return smc91c9x_r(device, offset & 7, mem_mask & 0x00ff);
	1531	return smc91c9x_r(device, space, offset & 7, mem_mask & 0x00ff);
1529	1532	}
1530	1533
1531	1534
r17961	r17962
1533	1536	{
1534	1537	device_t *device = machine().device("ethernet");
1535	1538	if (!(offset & 8))
1536		smc91c9x_w(device, offset & 7, data & 0xffff, mem_mask | 0xffff);
	1539	smc91c9x_w(device, space, offset & 7, data & 0xffff, mem_mask | 0xffff);
1537	1540	else
1538		smc91c9x_w(device, offset & 7, data & 0x00ff, mem_mask | 0x00ff);
	1541	smc91c9x_w(device, space, offset & 7, data & 0x00ff, mem_mask | 0x00ff);
1539	1542	}
1540	1543
1541	1544
r17961	r17962
1589	1592	break;
1590	1593
1591	1594	case WREG_ETHER_DATA:
1592		result = smc91c9x_r(device, m_widget.ethernet_addr & 7, mem_mask & 0xffff);
	1595	result = smc91c9x_r(device, space, m_widget.ethernet_addr & 7, mem_mask & 0xffff);
1593	1596	break;
1594	1597	}
1595	1598
r17961	r17962
1621	1624	break;
1622	1625
1623	1626	case WREG_ETHER_DATA:
1624		smc91c9x_w(device, m_widget.ethernet_addr & 7, data & 0xffff, mem_mask & 0xffff);
	1627	smc91c9x_w(device, space, m_widget.ethernet_addr & 7, data & 0xffff, mem_mask & 0xffff);
1625	1628	break;
1626	1629	}
1627	1630	}
r17961	r17962
1784	1787	/* note that blitz times out if we don't have this cycle stealing */
1785	1788	if (offset == 0x3f6/4)
1786	1789	machine().device("maincpu")->execute().eat_cycles(100);
1787		return ide_controller32_r(device, offset, mem_mask);
	1790	return ide_controller32_r(device, space, offset, mem_mask);
1788	1791	}
1789	1792
1790	1793	static ADDRESS_MAP_START( seattle_map, AS_PROGRAM, 32, seattle_state )

trunk/src/mame/drivers/atarisy1.c

r17961	r17962
402	402	WRITE8_MEMBER(atarisy1_state::via_pa_w)
403	403	{
404	404	device_t *device = machine().device("tms");
405		tms5220_data_w(device, 0, data);
	405	tms5220_data_w(device, space, 0, data);
406	406	}
407	407
408	408
409	409	READ8_MEMBER(atarisy1_state::via_pa_r)
410	410	{
411	411	device_t *device = machine().device("tms");
412		return tms5220_status_r(device, 0);
	412	return tms5220_status_r(device, space, 0);
413	413	}
414	414
415	415

trunk/src/mame/drivers/circusc.c

r17961	r17962
128	128
129	129	/* CS6 */
130	130	case 4:
131		discrete_sound_w(m_discrete, NODE_05, (offset & 0x20) >> 5);
132		discrete_sound_w(m_discrete, NODE_06, (offset & 0x18) >> 3);
133		discrete_sound_w(m_discrete, NODE_07, (offset & 0x40) >> 6);
	131	discrete_sound_w(m_discrete, space, NODE_05, (offset & 0x20) >> 5);
	132	discrete_sound_w(m_discrete, space, NODE_06, (offset & 0x18) >> 3);
	133	discrete_sound_w(m_discrete, space, NODE_07, (offset & 0x40) >> 6);
134	134	break;
135	135	}
136	136	}

trunk/src/mame/drivers/bagman.c

r17961	r17962
81	81	case 0:
82	82	case 1:
83	83	case 2:
84		tmsprom_bit_w(device, 0, 7 - ((m_ls259_buf[0]<<2) | (m_ls259_buf[1]<<1) | (m_ls259_buf[2]<<0)));
	84	tmsprom_bit_w(device, space, 0, 7 - ((m_ls259_buf[0]<<2) | (m_ls259_buf[1]<<1) | (m_ls259_buf[2]<<0)));
85	85	break;
86	86	case 3:
87	87	tmsprom_enable_w(device, m_ls259_buf[offset]);
88	88	break;
89	89	case 4:
90		tmsprom_rom_csq_w(device, 0, m_ls259_buf[offset]);
	90	tmsprom_rom_csq_w(device, space, 0, m_ls259_buf[offset]);
91	91	break;
92	92	case 5:
93		tmsprom_rom_csq_w(device, 1, m_ls259_buf[offset]);
	93	tmsprom_rom_csq_w(device, space, 1, m_ls259_buf[offset]);
94	94	break;
95	95	}
96	96	}

trunk/src/mame/drivers/bigevglf.c

r17961	r17962
413	413
414	414	static const msm5232_interface msm5232_config =
415	415	{
416		{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 }   /* 0.65 (???) uF capacitors */
	416	{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 },   /* 0.65 (???) uF capacitors */
	417	DEVCB_NULL
417	418	};
418	419
419	420	void bigevglf_state::machine_start()

trunk/src/mame/drivers/ghosteo.c

r17961	r17962
557	557
558	558	READ32_MEMBER(ghosteo_state::bballoon_speedup_r)
559	559	{
560		UINT32 ret = s3c2410_lcd_r(s3c2410, offset+0x10/4, mem_mask);
	560	UINT32 ret = s3c2410_lcd_r(s3c2410, space, offset+0x10/4, mem_mask);
561	561
562	562
563	563	int pc = space.device().safe_pc();

trunk/src/mame/drivers/kncljoe.c

r17961	r17962
76	76	{
77	77	/* control or data port? */
78	78	if (m_port2 & 0x08)
79		ay8910_data_address_w(device, m_port2 >> 2, m_port1);
	79	ay8910_data_address_w(device, space, m_port2 >> 2, m_port1);
80	80	}
81	81	m_port2 = data;
82	82	}
r17961	r17962
86	86	device_t *device = machine().device("aysnd");
87	87
88	88	if (m_port2 & 0x08)
89		return ay8910_r(device, 0);
	89	return ay8910_r(device, space, 0);
90	90	return 0xff;
91	91	}
92	92

trunk/src/mame/drivers/cvs.c

r17961	r17962
156	156	if (*m_fo_state)
157	157	return m_character_ram[(0 * 0x800) | 0x400 | m_character_ram_page_start | offset];
158	158	else
159		return s2636_work_ram_r(m_s2636_0, offset);
	159	return s2636_work_ram_r(m_s2636_0, space, offset);
160	160	}
161	161
162	162	WRITE8_MEMBER(cvs_state::cvs_s2636_0_or_character_ram_w)
r17961	r17962
169	169	machine().gfx[1]->mark_dirty((offset / 8) % 256);
170	170	}
171	171	else
172		s2636_work_ram_w(m_s2636_0, offset, data);
	172	s2636_work_ram_w(m_s2636_0, space, offset, data);
173	173	}
174	174
175	175
r17961	r17962
179	179	if (*m_fo_state)
180	180	return m_character_ram[(1 * 0x800) | 0x400 | m_character_ram_page_start | offset];
181	181	else
182		return s2636_work_ram_r(m_s2636_1, offset);
	182	return s2636_work_ram_r(m_s2636_1, space, offset);
183	183	}
184	184
185	185	WRITE8_MEMBER(cvs_state::cvs_s2636_1_or_character_ram_w)
r17961	r17962
192	192	machine().gfx[1]->mark_dirty((offset / 8) % 256);
193	193	}
194	194	else
195		s2636_work_ram_w(m_s2636_1, offset, data);
	195	s2636_work_ram_w(m_s2636_1, space, offset, data);
196	196	}
197	197
198	198
r17961	r17962
202	202	if (*m_fo_state)
203	203	return m_character_ram[(2 * 0x800) | 0x400 | m_character_ram_page_start | offset];
204	204	else
205		return s2636_work_ram_r(m_s2636_2, offset);
	205	return s2636_work_ram_r(m_s2636_2, space, offset);
206	206	}
207	207
208	208	WRITE8_MEMBER(cvs_state::cvs_s2636_2_or_character_ram_w)
r17961	r17962
215	215	machine().gfx[1]->mark_dirty((offset / 8) % 256);
216	216	}
217	217	else
218		s2636_work_ram_w(m_s2636_2, offset, data);
	218	s2636_work_ram_w(m_s2636_2, space, offset, data);
219	219	}
220	220
221	221
r17961	r17962
290	290	READ8_MEMBER(cvs_state::tms_clock_r)
291	291	{
292	292	device_t *device = machine().device("tms");
293		return tms5110_romclk_hack_r(device, 0) ? 0x80 : 0;
	293	return tms5110_romclk_hack_r(device, space, 0) ? 0x80 : 0;
294	294	}
295	295
296	296	static TIMER_CALLBACK( cvs_393hz_timer_cb )
r17961	r17962
390	390
391	391	/* FIXME: this was by observation on board ???
392	392	*          -bit 7 is TMS status (active LO) */
393		return ((tms5110_ctl_r(m_tms, 0) ^ 1) << 7) | (soundlatch_byte_r(space, 0) & 0x7f);
	393	return ((tms5110_ctl_r(m_tms, space, 0) ^ 1) << 7) | (soundlatch_byte_r(space, 0) & 0x7f);
394	394	}
395	395
396	396
r17961	r17962
409	409	(m_tms5110_ctl_data[1] << 3);   /* CTL8 */
410	410
411	411	LOG(("CVS: Speech CTL = %04x %02x %02x\n",  ctl, offset, data));
412		tms5110_ctl_w(device, 0, ctl);
	412	tms5110_ctl_w(device, space, 0, ctl);
413	413	}
414	414
415	415

trunk/src/mame/drivers/warriorb.c

r17961	r17962
181	181	{
182	182
183	183	if (offset == 0)
184		tc0140syt_port_w(m_tc0140syt, 0, data & 0xff);
	184	tc0140syt_port_w(m_tc0140syt, space, 0, data & 0xff);
185	185	else if (offset == 1)
186		tc0140syt_comm_w(m_tc0140syt, 0, data & 0xff);
	186	tc0140syt_comm_w(m_tc0140syt, space, 0, data & 0xff);
187	187	}
188	188
189	189	READ16_MEMBER(warriorb_state::warriorb_sound_r)
190	190	{
191	191
192	192	if (offset == 1)
193		return ((tc0140syt_comm_r(m_tc0140syt, 0) & 0xff));
	193	return ((tc0140syt_comm_r(m_tc0140syt, space, 0) & 0xff));
194	194	else
195	195	return 0;
196	196	}
r17961	r17962
218	218	WRITE16_MEMBER(warriorb_state::tc0100scn_dual_screen_w)
219	219	{
220	220
221		tc0100scn_word_w(m_tc0100scn_1, offset, data, mem_mask);
222		tc0100scn_word_w(m_tc0100scn_2, offset, data, mem_mask);
	221	tc0100scn_word_w(m_tc0100scn_1, space, offset, data, mem_mask);
	222	tc0100scn_word_w(m_tc0100scn_2, space, offset, data, mem_mask);
223	223	}
224	224
225	225	/***********************************************************

trunk/src/mame/drivers/blockhl.c

r17961	r17962
69	69	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
70	70	{
71	71	if (offset >= 0x3800 && offset < 0x3808)
72		return k051937_r(m_k051960, offset - 0x3800);
	72	return k051937_r(m_k051960, space, offset - 0x3800);
73	73	else if (offset < 0x3c00)
74		return k052109_r(m_k052109, offset);
	74	return k052109_r(m_k052109, space, offset);
75	75	else
76		return k051960_r(m_k051960, offset - 0x3c00);
	76	return k051960_r(m_k051960, space, offset - 0x3c00);
77	77	}
78	78	else
79		return k052109_r(m_k052109, offset);
	79	return k052109_r(m_k052109, space, offset);
80	80	}
81	81
82	82	WRITE8_MEMBER(blockhl_state::k052109_051960_w)
83	83	{
84	84
85	85	if (offset >= 0x3800 && offset < 0x3808)
86		k051937_w(m_k051960, offset - 0x3800, data);
	86	k051937_w(m_k051960, space, offset - 0x3800, data);
87	87	else if (offset < 0x3c00)
88		k052109_w(m_k052109, offset, data);
	88	k052109_w(m_k052109, space, offset, data);
89	89	else
90		k051960_w(m_k051960, offset - 0x3c00, data);
	90	k051960_w(m_k051960, space, offset - 0x3c00, data);
91	91	}
92	92
93	93

trunk/src/mame/drivers/segag80v.c

r17961	r17962
202	202	m_mainram[decrypt_offset(&space, offset)] = data;
203	203	}
204	204
205		WRITE8_MEMBER(segag80v_state::usb_ram_w){ sega_usb_ram_w(m_usb, decrypt_offset(machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
	205	WRITE8_MEMBER(segag80v_state::usb_ram_w){ sega_usb_ram_w(m_usb, space, decrypt_offset(machine().device("maincpu")->memory().space(AS_PROGRAM), offset), data); }
206	206	WRITE8_MEMBER(segag80v_state::vectorram_w)
207	207	{
208	208	m_vectorram[decrypt_offset(&space, offset)] = data;

trunk/src/mame/drivers/bottom9.c

r17961	r17962
34	34	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
35	35	{
36	36	if (offset >= 0x3800 && offset < 0x3808)
37		return k051937_r(m_k051960, offset - 0x3800);
	37	return k051937_r(m_k051960, space, offset - 0x3800);
38	38	else if (offset < 0x3c00)
39		return k052109_r(m_k052109, offset);
	39	return k052109_r(m_k052109, space, offset);
40	40	else
41		return k051960_r(m_k051960, offset - 0x3c00);
	41	return k051960_r(m_k051960, space, offset - 0x3c00);
42	42	}
43	43	else
44		return k052109_r(m_k052109, offset);
	44	return k052109_r(m_k052109, space, offset);
45	45	}
46	46
47	47	WRITE8_MEMBER(bottom9_state::k052109_051960_w)
48	48	{
49	49
50	50	if (offset >= 0x3800 && offset < 0x3808)
51		k051937_w(m_k051960, offset - 0x3800, data);
	51	k051937_w(m_k051960, space, offset - 0x3800, data);
52	52	else if (offset < 0x3c00)
53		k052109_w(m_k052109, offset, data);
	53	k052109_w(m_k052109, space, offset, data);
54	54	else
55		k051960_w(m_k051960, offset - 0x3c00, data);
	55	k051960_w(m_k051960, space, offset - 0x3c00, data);
56	56	}
57	57
58	58	READ8_MEMBER(bottom9_state::bottom9_bankedram1_r)
r17961	r17962
63	63	else
64	64	{
65	65	if (m_zoomreadroms)
66		return k051316_rom_r(m_k051316, offset);
	66	return k051316_rom_r(m_k051316, space, offset);
67	67	else
68		return k051316_r(m_k051316, offset);
	68	return k051316_r(m_k051316, space, offset);
69	69	}
70	70	}
71	71
r17961	r17962
75	75	if (m_k052109_selected)
76	76	k052109_051960_w(space, offset, data);
77	77	else
78		k051316_w(m_k051316, offset, data);
	78	k051316_w(m_k051316, space, offset, data);
79	79	}
80	80
81	81	READ8_MEMBER(bottom9_state::bottom9_bankedram2_r)

trunk/src/mame/drivers/40love.c

r17961	r17962
968	968
969	969	static const msm5232_interface msm5232_config =
970	970	{
971		{ 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6 }   /* 1.0 uF capacitors (verified on real PCB) */
	971	{ 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6, 1.0e-6 },   /* 1.0 uF capacitors (verified on real PCB) */
	972	DEVCB_NULL
972	973	};
973	974
974	975	/*******************************************************************************/

trunk/src/mame/drivers/proconn.c

r17961	r17962
35	35
36	36	optional_device<roc10937_t> m_vfd;
37	37
38		DECLARE_WRITE8_MEMBER( ay_w0 ) { ay8910_address_data_w(m_ay, 0, data); }
39		DECLARE_WRITE8_MEMBER( ay_w1 ) { ay8910_address_data_w(m_ay, 1, data); }
	38	DECLARE_WRITE8_MEMBER( ay_w0 ) { ay8910_address_data_w(m_ay, space, 0, data); }
	39	DECLARE_WRITE8_MEMBER( ay_w1 ) { ay8910_address_data_w(m_ay, space, 1, data); }
40	40
41	41	DECLARE_WRITE8_MEMBER( ctc_w0 ) { m_z80ctc->write(space, 0, data); }
42	42	DECLARE_WRITE8_MEMBER( ctc_w1 ) { m_z80ctc->write(space, 1, data); }
r17961	r17962
73	73	DECLARE_WRITE8_MEMBER( pio5_w2 ) { m_z80pio_5->write(space, 2, data); }
74	74	DECLARE_WRITE8_MEMBER( pio5_w3 ) { m_z80pio_5->write(space, 3, data); }
75	75
76		DECLARE_READ8_MEMBER( ay_r0 ) { return ay8910_r(m_ay, 0); }
	76	DECLARE_READ8_MEMBER( ay_r0 ) { return ay8910_r(m_ay, space, 0); }
77	77
78	78	DECLARE_READ8_MEMBER( ctc_r0 ) { return m_z80ctc->read(space, 0); }
79	79	DECLARE_READ8_MEMBER( ctc_r1 ) { return m_z80ctc->read(space, 1); }
r17961	r17962
307	307	DEVCB_NULL               // ZC/TO2 callback
308	308	};
309	309
310		static WRITE8_DEVICE_HANDLER( serial_transmit )
	310	static WRITE16_DEVICE_HANDLER( serial_transmit )
311	311	{
312	312	proconn_state *state = device->machine().driver_data<proconn_state>();
313	313
r17961	r17962
324	324	}
325	325
326	326
327		static int serial_receive(device_t *device, int channel)
	327	static READ16_DEVICE_HANDLER( serial_receive )
328	328	{
329		return 0xff;
	329	return -1;
330	330	}
331	331
332	332
333	333	static const z80sio_interface sio_intf =
334	334	{
335		0,               /* interrupt handler */
336		0,               /* DTR changed handler */
337		0,               /* RTS changed handler */
338		0,               /* BREAK changed handler */
339		serial_transmit,   /* transmit handler */
340		serial_receive      /* receive handler */
	335	DEVCB_NULL,               /* interrupt handler */
	336	DEVCB_NULL,               /* DTR changed handler */
	337	DEVCB_NULL,               /* RTS changed handler */
	338	DEVCB_NULL,               /* BREAK changed handler */
	339	DEVCB_HANDLER(serial_transmit),   /* transmit handler */
	340	DEVCB_HANDLER(serial_receive)      /* receive handler */
341	341	};
342	342
343	343	static const ay8910_interface ay8910_config =

trunk/src/mame/drivers/othunder.c

r17961	r17962
340	340	break;
341	341
342	342	default:
343		tc0220ioc_w(m_tc0220ioc, offset, data & 0xff);
	343	tc0220ioc_w(m_tc0220ioc, space, offset, data & 0xff);
344	344	}
345	345	}
346	346	}
r17961	r17962
359	359	return (m_eeprom->read_bit() & 1) << 7;
360	360
361	361	default:
362		return tc0220ioc_r(m_tc0220ioc, offset);
	362	return tc0220ioc_r(m_tc0220ioc, space, offset);
363	363	}
364	364	}
365	365
r17961	r17962
406	406	WRITE16_MEMBER(othunder_state::othunder_sound_w)
407	407	{
408	408	if (offset == 0)
409		tc0140syt_port_w(m_tc0140syt, 0, data & 0xff);
	409	tc0140syt_port_w(m_tc0140syt, space, 0, data & 0xff);
410	410	else if (offset == 1)
411		tc0140syt_comm_w(m_tc0140syt, 0, data & 0xff);
	411	tc0140syt_comm_w(m_tc0140syt, space, 0, data & 0xff);
412	412	}
413	413
414	414	READ16_MEMBER(othunder_state::othunder_sound_r)
415	415	{
416	416	if (offset == 1)
417		return ((tc0140syt_comm_r(m_tc0140syt, 0) & 0xff));
	417	return ((tc0140syt_comm_r(m_tc0140syt, space, 0) & 0xff));
418	418	else
419	419	return 0;
420	420	}

trunk/src/mame/drivers/nss.c

r17961	r17962
354	354
355	355	static READ8_DEVICE_HANDLER( spc_ram_100_r )
356	356	{
357		return spc_ram_r(device, offset + 0x100);
	357	return spc_ram_r(device, space, offset + 0x100);
358	358	}
359	359
360	360	static WRITE8_DEVICE_HANDLER( spc_ram_100_w )
361	361	{
362		spc_ram_w(device, offset + 0x100, data);
	362	spc_ram_w(device, space, offset + 0x100, data);
363	363	}
364	364
365	365	static ADDRESS_MAP_START( spc_mem, AS_PROGRAM, 8, nss_state )
r17961	r17962
465	465
466	466	if (m_cart_sel == 0)
467	467	{
468		rp5h01_enable_w(m_rp5h01, 0, 0);
469		data |= ((~rp5h01_counter_r(m_rp5h01, 0)) << 4) & 0x10;   /* D4 */
470		data |= ((rp5h01_data_r(m_rp5h01, 0)) << 3) & 0x08;      /* D3 */
471		rp5h01_enable_w(m_rp5h01, 0, 1);
	468	rp5h01_enable_w(m_rp5h01, space, 0, 0);
	469	data |= ((~rp5h01_counter_r(m_rp5h01, space, 0)) << 4) & 0x10;   /* D4 */
	470	data |= ((rp5h01_data_r(m_rp5h01, space, 0)) << 3) & 0x08;      /* D3 */
	471	rp5h01_enable_w(m_rp5h01, space, 0, 1);
472	472	}
473	473	else
474		rp5h01_enable_w(m_rp5h01, 0, 1);
	474	rp5h01_enable_w(m_rp5h01, space, 0, 1);
475	475
476	476	return data;
477	477	}
r17961	r17962
480	480	{
481	481	if (m_cart_sel == 0)
482	482	{
483		rp5h01_enable_w(m_rp5h01, 0, 0);
484		rp5h01_test_w(m_rp5h01, 0, data & 0x10);      /* D4 */
485		rp5h01_clock_w(m_rp5h01, 0, data & 0x08);      /* D3 */
486		rp5h01_cs_w(m_rp5h01, 0, ~data & 0x01);
487		rp5h01_enable_w(m_rp5h01, 0, 1);
	483	rp5h01_enable_w(m_rp5h01, space, 0, 0);
	484	rp5h01_test_w(m_rp5h01, space, 0, data & 0x10);      /* D4 */
	485	rp5h01_clock_w(m_rp5h01, space, 0, data & 0x08);      /* D3 */
	486	rp5h01_cs_w(m_rp5h01, space, 0, ~data & 0x01);
	487	rp5h01_enable_w(m_rp5h01, space, 0, 1);
488	488	}
489	489	else
490		rp5h01_enable_w(m_rp5h01, 0, 1);
	490	rp5h01_enable_w(m_rp5h01, space, 0, 1);
491	491
492	492	ioport("EEPROMOUT")->write(data, 0xff);
493	493	}

trunk/src/mame/drivers/mirage.c

r17961	r17962
87	87	static SCREEN_UPDATE_RGB32( mirage )
88	88	{
89	89	miragemi_state *state = screen.machine().driver_data<miragemi_state>();
90		UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, 0, 0xffff);
	90	address_space &space = screen.machine().driver_data()->generic_space();
	91	UINT16 flip = deco16ic_pf_control_r(state->m_deco_tilegen1, space, 0, 0xffff);
91	92
92	93	state->flip_screen_set(BIT(flip, 7));
93	94

trunk/src/mame/drivers/ladyfrog.c

r17961	r17962
119	119
120	120	static const msm5232_interface msm5232_config =
121	121	{
122		{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 }
	122	{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 },
	123	DEVCB_NULL
123	124	};
124	125
125	126	READ8_MEMBER(ladyfrog_state::snd_flag_r)

trunk/src/mame/drivers/esripsys.c

r17961	r17962
524	524	{
525	525	/* TMS5220 core returns status bits in D7-D6 */
526	526	device_t *tms = machine().device("tms5220nl");
527		UINT8 status = tms5220_status_r(tms, 0);
	527	UINT8 status = tms5220_status_r(tms, space, 0);
528	528
529	529	status = ((status & 0x80) >> 5) | ((status & 0x40) >> 5) | ((status & 0x20) >> 5);
530	530	return (tms5220_readyq_r(tms) << 7) | (tms5220_intq_r(tms) << 6) | status;
r17961	r17962
540	540	if (offset == 0)
541	541	{
542	542	m_tms_data = data;
543		tms5220_data_w(tms, 0, m_tms_data);
	543	tms5220_data_w(tms, space, 0, m_tms_data);
544	544	}
545	545	#if 0
546	546	if (offset == 1)
547	547	{
548		tms5220_data_w(tms, 0, m_tms_data);
	548	tms5220_data_w(tms, space, 0, m_tms_data);
549	549	}
550	550	#endif
551	551	}

trunk/src/mame/drivers/ettrivia.c

r17961	r17962
115	115	/* special case to return the value written to 0xb000 */
116	116	/* does it reset the chips too ? */
117	117	case 0:   break;
118		case 0xc4: m_b000_ret = ay8910_r(machine().device("ay1"), 0);   break;
119		case 0x94: m_b000_ret = ay8910_r(machine().device("ay2"), 0);   break;
120		case 0x86: m_b000_ret = ay8910_r(machine().device("ay3"), 0);   break;
	118	case 0xc4: m_b000_ret = ay8910_r(machine().device("ay1"), space, 0);   break;
	119	case 0x94: m_b000_ret = ay8910_r(machine().device("ay2"), space, 0);   break;
	120	case 0x86: m_b000_ret = ay8910_r(machine().device("ay3"), space, 0);   break;
121	121
122	122	case 0x80:
123	123	switch(m_b800_prev)
124	124	{
125		case 0xe0: ay8910_address_w(machine().device("ay1"),0,m_b000_val);   break;
126		case 0x98: ay8910_address_w(machine().device("ay2"),0,m_b000_val);   break;
127		case 0x83: ay8910_address_w(machine().device("ay3"),0,m_b000_val);   break;
	125	case 0xe0: ay8910_address_w(machine().device("ay1"),space,0,m_b000_val);   break;
	126	case 0x98: ay8910_address_w(machine().device("ay2"),space,0,m_b000_val);   break;
	127	case 0x83: ay8910_address_w(machine().device("ay3"),space,0,m_b000_val);   break;
128	128
129		case 0xa0: ay8910_data_w(machine().device("ay1"),0,m_b000_val);   break;
130		case 0x88: ay8910_data_w(machine().device("ay2"),0,m_b000_val);   break;
131		case 0x81: ay8910_data_w(machine().device("ay3"),0,m_b000_val);   break;
	129	case 0xa0: ay8910_data_w(machine().device("ay1"),space,0,m_b000_val);   break;
	130	case 0x88: ay8910_data_w(machine().device("ay2"),space,0,m_b000_val);   break;
	131	case 0x81: ay8910_data_w(machine().device("ay3"),space,0,m_b000_val);   break;
132	132
133	133	}
134	134	break;

trunk/src/mame/drivers/snk68.c

r17961	r17962
165	165	WRITE8_MEMBER(snk68_state::D7759_write_port_0_w)
166	166	{
167	167	device_t *device = machine().device("upd");
168		upd7759_port_w(device, 0, data);
	168	upd7759_port_w(device, space, 0, data);
169	169	upd7759_start_w(device, 0);
170	170	upd7759_start_w(device, 1);
171	171	}

trunk/src/mame/drivers/madalien.c

r17961	r17962
69	69	WRITE8_MEMBER(madalien_state::madalien_portA_w)
70	70	{
71	71	device_t *device = machine().device("discrete");
72		discrete_sound_w(device, MADALIEN_8910_PORTA, data);
	72	discrete_sound_w(device, space, MADALIEN_8910_PORTA, data);
73	73	}
74	74	WRITE8_MEMBER(madalien_state::madalien_portB_w)
75	75	{
76	76	device_t *device = machine().device("discrete");
77		discrete_sound_w(device, MADALIEN_8910_PORTB, data);
	77	discrete_sound_w(device, space, MADALIEN_8910_PORTB, data);
78	78	}
79	79
80	80

trunk/src/mame/drivers/ksys573.c

r17961	r17962
1484	1484	switch (offset)
1485	1485	{
1486	1486	case 0x26:
1487		upd4701_y_add(upd4701, 0, ioport("uPD4701_y")->read_safe(0), 0xffff);
1488		upd4701_switches_set(upd4701, 0, ioport("uPD4701_switches")->read_safe(0));
	1487	upd4701_y_add(upd4701, space, 0, ioport("uPD4701_y")->read_safe(0), 0xffff);
	1488	upd4701_switches_set(upd4701, space, 0, ioport("uPD4701_switches")->read_safe(0));
1489	1489
1490		upd4701_cs_w(upd4701, 0, 0);
1491		upd4701_xy_w(upd4701, 0, 1);
	1490	upd4701_cs_w(upd4701, space, 0, 0);
	1491	upd4701_xy_w(upd4701, space, 0, 1);
1492	1492
1493	1493	if (ACCESSING_BITS_0_7)
1494	1494	{
1495		upd4701_ul_w(upd4701, 0, 0);
1496		data |= upd4701_d_r(upd4701, 0, 0xffff) << 0;
	1495	upd4701_ul_w(upd4701, space, 0, 0);
	1496	data |= upd4701_d_r(upd4701, space, 0, 0xffff) << 0;
1497	1497	}
1498	1498
1499	1499	if (ACCESSING_BITS_16_23)
1500	1500	{
1501		upd4701_ul_w(upd4701, 0, 1);
1502		data |= upd4701_d_r(upd4701, 0, 0xffff) << 16;
	1501	upd4701_ul_w(upd4701, space, 0, 1);
	1502	data |= upd4701_d_r(upd4701, space, 0, 0xffff) << 16;
1503	1503	}
1504	1504
1505		upd4701_cs_w(upd4701, 0, 1);
	1505	upd4701_cs_w(upd4701, space, 0, 1);
1506	1506	break;
1507	1507
1508	1508	default:
r17961	r17962
1539	1539	case 0x28:
1540	1540	if (ACCESSING_BITS_0_7)
1541	1541	{
1542		upd4701_resety_w(upd4701, 0, 1);
1543		upd4701_resety_w(upd4701, 0, 0);
	1542	upd4701_resety_w(upd4701, space, 0, 1);
	1543	upd4701_resety_w(upd4701, space, 0, 0);
1544	1544	}
1545	1545	break;
1546	1546

trunk/src/mame/drivers/overdriv.c

r17961	r17962
137	137	READ8_MEMBER(overdriv_state::overdriv_1_sound_r)
138	138	{
139	139	device_t *device = machine().device("k053260_1");
140		return k053260_r(device, 2 + offset);
	140	return k053260_r(device, space, 2 + offset);
141	141	}
142	142
143	143	READ8_MEMBER(overdriv_state::overdriv_2_sound_r)
144	144	{
145	145	device_t *device = machine().device("k053260_2");
146		return k053260_r(device, 2 + offset);
	146	return k053260_r(device, space, 2 + offset);
147	147	}
148	148
149	149	WRITE16_MEMBER(overdriv_state::overdriv_soundirq_w)

trunk/src/mame/drivers/gsword.c

r17961	r17962
293	293	WRITE8_MEMBER(gsword_state::gsword_AY8910_control_port_0_w)
294	294	{
295	295	device_t *device = machine().device("ay1");
296		ay8910_address_w(device,offset,data);
	296	ay8910_address_w(device,space,offset,data);
297	297	m_fake8910_0 = data;
298	298	}
299	299	WRITE8_MEMBER(gsword_state::gsword_AY8910_control_port_1_w)
300	300	{
301	301	device_t *device = machine().device("ay2");
302		ay8910_address_w(device,offset,data);
	302	ay8910_address_w(device,space,offset,data);
303	303	m_fake8910_1 = data;
304	304	}
305	305

trunk/src/mame/drivers/lethal.c

r17961	r17962
266	266	case 0x4d:
267	267	case 0x4e:
268	268	case 0x4f:
269		return k053244_r(m_k053244, offset - 0x40);
	269	return k053244_r(m_k053244, space, offset - 0x40);
270	270
271	271	case 0x80:
272	272	case 0x81:
r17961	r17962
300	300	case 0x9d:
301	301	case 0x9e:
302	302	case 0x9f:
303		return k054000_r(m_k054000, offset - 0x80);
	303	return k054000_r(m_k054000, space, offset - 0x80);
304	304
305	305	case 0xca:
306	306	return sound_status_r(space, 0);
307	307	}
308	308	}
309	309	else if (offset < 0x1800)
310		return k053245_r(m_k053244, (offset - 0x0800) & 0x07ff);
	310	return k053245_r(m_k053244, space, (offset - 0x0800) & 0x07ff);
311	311	else if (offset < 0x2000)
312		return k056832_ram_code_lo_r(m_k056832, offset - 0x1800);
	312	return k056832_ram_code_lo_r(m_k056832, space, offset - 0x1800);
313	313	else if (offset < 0x2800)
314		return k056832_ram_code_hi_r(m_k056832, offset - 0x2000);
	314	return k056832_ram_code_hi_r(m_k056832, space, offset - 0x2000);
315	315	else if (offset < 0x3000)
316		return k056832_ram_attr_lo_r(m_k056832, offset - 0x2800);
	316	return k056832_ram_attr_lo_r(m_k056832, space, offset - 0x2800);
317	317	else // (offset < 0x3800)
318		return k056832_ram_attr_hi_r(m_k056832, offset - 0x3000);
	318	return k056832_ram_attr_hi_r(m_k056832, space, offset - 0x3000);
319	319	}
320	320
321	321	return 0;
r17961	r17962
358	358	case 0x4d:
359	359	case 0x4e:
360	360	case 0x4f:
361		k053244_w(m_k053244, offset - 0x40, data);
	361	k053244_w(m_k053244, space, offset - 0x40, data);
362	362	break;
363	363
364	364	case 0x80:
r17961	r17962
393	393	case 0x9d:
394	394	case 0x9e:
395	395	case 0x9f:
396		k054000_w(m_k054000, offset - 0x80, data);
	396	k054000_w(m_k054000, space, offset - 0x80, data);
397	397	break;
398	398
399	399	default:
r17961	r17962
402	402	}
403	403	}
404	404	else if (offset < 0x1800)
405		k053245_w(m_k053244, (offset - 0x0800) & 0x07ff, data);
	405	k053245_w(m_k053244, space, (offset - 0x0800) & 0x07ff, data);
406	406	else if (offset < 0x2000)
407		k056832_ram_code_lo_w(m_k056832, offset - 0x1800, data);
	407	k056832_ram_code_lo_w(m_k056832, space, offset - 0x1800, data);
408	408	else if (offset < 0x2800)
409		k056832_ram_code_hi_w(m_k056832, offset - 0x2000, data);
	409	k056832_ram_code_hi_w(m_k056832, space, offset - 0x2000, data);
410	410	else if (offset < 0x3000)
411		k056832_ram_attr_lo_w(m_k056832, offset - 0x2800, data);
	411	k056832_ram_attr_lo_w(m_k056832, space, offset - 0x2800, data);
412	412	else // (offset < 0x3800)
413		k056832_ram_attr_hi_w(m_k056832, offset - 0x3000, data);
	413	k056832_ram_attr_hi_w(m_k056832, space, offset - 0x3000, data);
414	414	}
415	415	}
416	416

trunk/src/mame/drivers/taitowlf.c

r17961	r17962
119	119	READ8_MEMBER(taitowlf_state::at_dma8237_2_r)
120	120	{
121	121	device_t *device = machine().device("dma8237_2");
122		return i8237_r(device, offset / 2);
	122	return i8237_r(device, space, offset / 2);
123	123	}
124	124
125	125	WRITE8_MEMBER(taitowlf_state::at_dma8237_2_w)
126	126	{
127	127	device_t *device = machine().device("dma8237_2");
128		i8237_w(device, offset / 2, data);
	128	i8237_w(device, space, offset / 2, data);
129	129	}
130	130
131	131	// Intel 82439TX System Controller (MXTC)
r17961	r17962
295	295	READ32_MEMBER(taitowlf_state::ide_r)
296	296	{
297	297	device_t *device = machine().device("ide");
298		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	298	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
299	299	}
300	300
301	301	WRITE32_MEMBER(taitowlf_state::ide_w)
302	302	{
303	303	device_t *device = machine().device("ide");
304		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	304	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
305	305	}
306	306
307	307	READ32_MEMBER(taitowlf_state::fdc_r)
308	308	{
309	309	device_t *device = machine().device("ide");
310		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	310	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
311	311	}
312	312
313	313	WRITE32_MEMBER(taitowlf_state::fdc_w)
314	314	{
315	315	device_t *device = machine().device("ide");
316	316	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
317		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	317	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
318	318	}
319	319
320	320

trunk/src/mame/drivers/taitogn.c

r17961	r17962
424	424	WRITE32_MEMBER(taitogn_state::rf5c296_io_w)
425	425	{
426	426	if(offset < 2) {
427		ide_controller32_pcmcia_w(machine().device(":card"), offset, data, mem_mask);
	427	ide_controller32_pcmcia_w(machine().device(":card"), space, offset, data, mem_mask);
428	428	return;
429	429	}
430	430
r17961	r17962
439	439	READ32_MEMBER(taitogn_state::rf5c296_io_r)
440	440	{
441	441	if(offset < 2)
442		return ide_controller32_pcmcia_r(machine().device(":card"), offset, mem_mask);
	442	return ide_controller32_pcmcia_r(machine().device(":card"), space, offset, mem_mask);
443	443
444	444	offset *= 4;
445	445

trunk/src/mame/drivers/taito_z.c

r17961	r17962
1106	1106	break;
1107	1107
1108	1108	default:
1109		tc0220ioc_w(m_tc0220ioc, offset, data);   /* might be a 510NIO ! */
	1109	tc0220ioc_w(m_tc0220ioc, space, offset, data);   /* might be a 510NIO ! */
1110	1110	}
1111	1111	}
1112	1112
r17961	r17962
1127	1127	{
1128	1128	/* Bypass TC0220IOC controller for analog input */
1129	1129
1130		UINT8 port = tc0220ioc_port_r(m_tc0220ioc, 0);   /* read port number */
	1130	UINT8 port = tc0220ioc_port_r(m_tc0220ioc, space, 0);   /* read port number */
1131	1131	UINT16 steer = 0xff80 + ioport("STEER")->read_safe(0x80);
1132	1132
1133	1133	switch (port)
r17961	r17962
1139	1139	return steer >> 8;
1140	1140
1141	1141	default:
1142		return tc0220ioc_portreg_r(m_tc0220ioc, offset);
	1142	return tc0220ioc_portreg_r(m_tc0220ioc, space, offset);
1143	1143	}
1144	1144	}
1145	1145
r17961	r17962
1148	1148	{
1149	1149	/* Bypass TC0220IOC controller for extra inputs */
1150	1150
1151		UINT8 port = tc0220ioc_port_r(m_tc0220ioc, 0);   /* read port number */
	1151	UINT8 port = tc0220ioc_port_r(m_tc0220ioc, space, 0);   /* read port number */
1152	1152	UINT16 steer = 0xff80 + ioport("STEER")->read_safe(0x80);
1153	1153
1154	1154	switch (port)
r17961	r17962
1172	1172	return steer >> 8;
1173	1173
1174	1174	default:
1175		return tc0220ioc_portreg_r(m_tc0220ioc, offset);
	1175	return tc0220ioc_portreg_r(m_tc0220ioc, space, offset);
1176	1176	}
1177	1177	}
1178	1178
r17961	r17962
1261	1261	return m_eeprom->read_bit() << 7;
1262	1262
1263	1263	default:
1264		return tc0220ioc_r(m_tc0220ioc, offset);   /* might be a 510NIO ! */
	1264	return tc0220ioc_r(m_tc0220ioc, space, offset);   /* might be a 510NIO ! */
1265	1265	}
1266	1266	}
1267	1267
r17961	r17962
1422	1422	WRITE16_MEMBER(taitoz_state::taitoz_sound_w)
1423	1423	{
1424	1424	if (offset == 0)
1425		tc0140syt_port_w(m_tc0140syt, 0, data & 0xff);
	1425	tc0140syt_port_w(m_tc0140syt, space, 0, data & 0xff);
1426	1426	else if (offset == 1)
1427		tc0140syt_comm_w(m_tc0140syt, 0, data & 0xff);
	1427	tc0140syt_comm_w(m_tc0140syt, space, 0, data & 0xff);
1428	1428
1429	1429	#ifdef MAME_DEBUG
1430	1430	//  if (data & 0xff00)
r17961	r17962
1440	1440	READ16_MEMBER(taitoz_state::taitoz_sound_r)
1441	1441	{
1442	1442	if (offset == 1)
1443		return (tc0140syt_comm_r(m_tc0140syt, 0) & 0xff);
	1443	return (tc0140syt_comm_r(m_tc0140syt, space, 0) & 0xff);
1444	1444	else
1445	1445	return 0;
1446	1446	}

trunk/src/mame/drivers/msisaac.c

r17961	r17962
424	424
425	425	static const msm5232_interface msm5232_config =
426	426	{
427		{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 }   /* 0.65 (???) uF capacitors (match the sample, not verified) */
	427	{ 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6, 0.65e-6 },   /* 0.65 (???) uF capacitors (match the sample, not verified) */
	428	DEVCB_NULL
428	429	};
429	430
430	431

trunk/src/mame/drivers/playch10.c

r17961	r17962
350	350	READ8_MEMBER(playch10_state::psg_4015_r)
351	351	{
352	352	device_t *device = machine().device("nes");
353		return nes_psg_r(device, 0x15);
	353	return nes_psg_r(device, space, 0x15);
354	354	}
355	355
356	356	WRITE8_MEMBER(playch10_state::psg_4015_w)
357	357	{
358	358	device_t *device = machine().device("nes");
359		nes_psg_w(device, 0x15, data);
	359	nes_psg_w(device, space, 0x15, data);
360	360	}
361	361
362	362	WRITE8_MEMBER(playch10_state::psg_4017_w)
363	363	{
364	364	device_t *device = machine().device("nes");
365		nes_psg_w(device, 0x17, data);
	365	nes_psg_w(device, space, 0x17, data);
366	366	}
367	367
368	368	/******************************************************************************/

trunk/src/mame/drivers/uapce.c

r17961	r17962
157	157	752 Hz (D-3) square wave to be output on the common audio path.
158	158	(1= Tone output ON, 0= Tone output OFF) */
159	159
160		discrete_sound_w(machine().device("discrete"), UAPCE_SOUND_EN, BIT(data,3));
	160	discrete_sound_w(machine().device("discrete"), space, UAPCE_SOUND_EN, BIT(data,3));
161	161
162	162	/* D2 : Not latched, though software writes to this bit like it is. */
163	163

trunk/src/mame/drivers/funkball.c

r17961	r17962
247	247	READ32_MEMBER(funkball_state::ide_r)
248	248	{
249	249	device_t *device = machine().device("ide");
250		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	250	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
251	251	}
252	252
253	253	WRITE32_MEMBER(funkball_state::ide_w)
254	254	{
255	255	device_t *device = machine().device("ide");
256		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	256	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
257	257	}
258	258
259	259	READ32_MEMBER(funkball_state::fdc_r)
260	260	{
261	261	device_t *device = machine().device("ide");
262		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	262	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
263	263	}
264	264
265	265	WRITE32_MEMBER(funkball_state::fdc_w)
266	266	{
267	267	device_t *device = machine().device("ide");
268	268	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
269		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	269	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
270	270	}
271	271	#endif
272	272
r17961	r17962
337	337	READ8_MEMBER(funkball_state::at_dma8237_2_r)
338	338	{
339	339	device_t *device = machine().device("dma8237_2");
340		return i8237_r(device, offset / 2);
	340	return i8237_r(device, space, offset / 2);
341	341	}
342	342
343	343	WRITE8_MEMBER(funkball_state::at_dma8237_2_w)
344	344	{
345	345	device_t *device = machine().device("dma8237_2");
346		i8237_w(device, offset / 2, data);
	346	i8237_w(device, space, offset / 2, data);
347	347	}
348	348
349	349	WRITE_LINE_MEMBER(funkball_state::pc_dma_hrq_changed)
r17961	r17962
436	436	}
437	437	else
438	438	{
439		r = pic8259_r(device, offset);
	439	r = pic8259_r(device, space, offset);
440	440	}
441	441	return r;
442	442	}
r17961	r17962
456	456	}
457	457	else
458	458	{
459		pic8259_w(device, offset, data);
	459	pic8259_w(device, space, offset, data);
460	460	}
461	461	}
462	462

trunk/src/mame/drivers/equites.c

r17961	r17962
566	566	equites_update_dac(machine());
567	567	}
568	568
569		static void equites_msm5232_gate( device_t *device, int state )
	569	static WRITE_LINE_DEVICE_HANDLER( equites_msm5232_gate )
570	570	{
571	571	}
572	572
r17961	r17962
1113	1113	static const msm5232_interface equites_5232intf =
1114	1114	{
1115	1115	{ 0.47e-6, 0.47e-6, 0.47e-6, 0.47e-6, 0.47e-6, 0.47e-6, 0.47e-6, 0.47e-6 }, // verified
1116		equites_msm5232_gate
	1116	DEVCB_LINE(equites_msm5232_gate)
1117	1117	};
1118	1118
1119	1119

trunk/src/mame/drivers/mirax.c

r17961	r17962
242	242	WRITE8_MEMBER(mirax_state::ay1_sel)
243	243	{
244	244	device_t *device = machine().device("ay1");
245		ay8910_address_w(device,0,m_nAyCtrl);
246		ay8910_data_w(device,0,data);
	245	ay8910_address_w(device,space,0,m_nAyCtrl);
	246	ay8910_data_w(device,space,0,data);
247	247	}
248	248
249	249	WRITE8_MEMBER(mirax_state::ay2_sel)
250	250	{
251	251	device_t *device = machine().device("ay2");
252		ay8910_address_w(device,0,m_nAyCtrl);
253		ay8910_data_w(device,0,data);
	252	ay8910_address_w(device,space,0,m_nAyCtrl);
	253	ay8910_data_w(device,space,0,data);
254	254	}
255	255
256	256	WRITE8_MEMBER(mirax_state::nmi_mask_w)

trunk/src/mame/drivers/gradius3.c

r17961	r17962
29	29
30	30	READ16_MEMBER(gradius3_state::k052109_halfword_r)
31	31	{
32		return k052109_r(m_k052109, offset);
	32	return k052109_r(m_k052109, space, offset);
33	33	}
34	34
35	35	WRITE16_MEMBER(gradius3_state::k052109_halfword_w)
36	36	{
37	37
38	38	if (ACCESSING_BITS_0_7)
39		k052109_w(m_k052109, offset, data & 0xff);
	39	k052109_w(m_k052109, space, offset, data & 0xff);
40	40
41	41	/* is this a bug in the game or something else? */
42	42	if (!ACCESSING_BITS_0_7)
43		k052109_w(m_k052109, offset, (data >> 8) & 0xff);
	43	k052109_w(m_k052109, space, offset, (data >> 8) & 0xff);
44	44	//      logerror("%06x half %04x = %04x\n",space.device().safe_pc(),offset,data);
45	45	}
46	46
47	47	READ16_MEMBER(gradius3_state::k051937_halfword_r)
48	48	{
49		return k051937_r(m_k051960, offset);
	49	return k051937_r(m_k051960, space, offset);
50	50	}
51	51
52	52	WRITE16_MEMBER(gradius3_state::k051937_halfword_w)
53	53	{
54	54
55	55	if (ACCESSING_BITS_0_7)
56		k051937_w(m_k051960, offset, data & 0xff);
	56	k051937_w(m_k051960, space, offset, data & 0xff);
57	57	}
58	58
59	59	READ16_MEMBER(gradius3_state::k051960_halfword_r)
60	60	{
61		return k051960_r(m_k051960, offset);
	61	return k051960_r(m_k051960, space, offset);
62	62	}
63	63
64	64	WRITE16_MEMBER(gradius3_state::k051960_halfword_w)
65	65	{
66	66	if (ACCESSING_BITS_0_7)
67		k051960_w(m_k051960, offset, data & 0xff);
	67	k051960_w(m_k051960, space, offset, data & 0xff);
68	68	}
69	69
70	70	WRITE16_MEMBER(gradius3_state::cpuA_ctrl_w)

trunk/src/mame/drivers/dlair.c

r17961	r17962
148	148	*
149	149	*************************************/
150	150
151		static void dleuro_interrupt(device_t *device, int state)
	151	static WRITE_LINE_DEVICE_HANDLER( dleuro_interrupt )
152	152	{
153	153	device->machine().device("maincpu")->execute().set_input_line(0, state);
154	154	}
155	155
156	156
157		static WRITE8_DEVICE_HANDLER( serial_transmit )
	157	static WRITE16_DEVICE_HANDLER( serial_transmit )
158	158	{
159	159	dlair_state *state = device->machine().driver_data<dlair_state>();
160	160	state->laserdisc_data_w(data);
161	161	}
162	162
163	163
164		static int serial_receive(device_t *device, int channel)
	164	static READ16_DEVICE_HANDLER( serial_receive )
165	165	{
166	166	dlair_state *state = device->machine().driver_data<dlair_state>();
167	167	/* if we still have data to send, do it now */
168		if (channel == 0 && state->laserdisc_data_available_r() == ASSERT_LINE)
	168	if (offset == 0 && state->laserdisc_data_available_r() == ASSERT_LINE)
169	169	return state->laserdisc_data_r();
170	170
171	171	return -1;
r17961	r17962
183	183
184	184	static const z80sio_interface sio_intf =
185	185	{
186		dleuro_interrupt,   /* interrupt handler */
187		0,               /* DTR changed handler */
188		0,               /* RTS changed handler */
189		0,               /* BREAK changed handler */
190		serial_transmit,   /* transmit handler */
191		serial_receive      /* receive handler */
	186	DEVCB_LINE(dleuro_interrupt),   /* interrupt handler */
	187	DEVCB_NULL,               /* DTR changed handler */
	188	DEVCB_NULL,               /* RTS changed handler */
	189	DEVCB_NULL,               /* BREAK changed handler */
	190	DEVCB_HANDLER(serial_transmit),   /* transmit handler */
	191	DEVCB_HANDLER(serial_receive)      /* receive handler */
192	192	};
193	193
194	194

trunk/src/mame/drivers/firetrk.c

r17961	r17962
36	36	INPUT_CHANGED_MEMBER(firetrk_state::firetrk_horn_changed)
37	37	{
38	38	device_t *discrete = machine().device("discrete");
39		discrete_sound_w(discrete, FIRETRUCK_HORN_EN, newval);
	39	discrete_sound_w(discrete, generic_space(), FIRETRUCK_HORN_EN, newval);
40	40	}
41	41
42	42
r17961	r17962
90	90	set_led_status(machine(), 3, !(data & 0x08));
91	91
92	92	/* BIT4 => ATTRACT     */
93		discrete_sound_w(discrete, FIRETRUCK_ATTRACT_EN, data & 0x10);
	93	discrete_sound_w(discrete, space, FIRETRUCK_ATTRACT_EN, data & 0x10);
94	94	coin_lockout_w(machine(), 0, !(data & 0x10));
95	95	coin_lockout_w(machine(), 1, !(data & 0x10));
96	96
r17961	r17962
100	100	/* BIT6 => UNUSED      */
101	101
102	102	/* BIT7 => BELL OUT    */
103		discrete_sound_w(discrete, FIRETRUCK_BELL_EN, data & 0x80);
	103	discrete_sound_w(discrete, space, FIRETRUCK_BELL_EN, data & 0x80);
104	104	}
105	105
106	106
r17961	r17962
112	112	set_led_status(machine(), 0, offset & 0x01);
113	113
114	114	/* BIT1 => ATTRACT    */
115		discrete_sound_w(discrete, SUPERBUG_ATTRACT_EN, offset & 0x02);
	115	discrete_sound_w(discrete, space, SUPERBUG_ATTRACT_EN, offset & 0x02);
116	116	coin_lockout_w(machine(), 0, !(offset & 0x02));
117	117	coin_lockout_w(machine(), 1, !(offset & 0x02));
118	118
r17961	r17962
135	135	set_led_status(machine(), 1, !(data & 0x02));
136	136
137	137	/* BIT2 => ATTRACT       */
138		discrete_sound_w(discrete, MONTECAR_ATTRACT_INV, data & 0x04);
	138	discrete_sound_w(discrete, space, MONTECAR_ATTRACT_INV, data & 0x04);
139	139
140	140	/* BIT3 => UNUSED        */
141	141	/* BIT4 => UNUSED        */
r17961	r17962
157	157
158	158	m_flash = data & 0x80;
159	159
160		discrete_sound_w(discrete, MONTECAR_BEEPER_EN, data & 0x10);
161		discrete_sound_w(discrete, MONTECAR_DRONE_LOUD_DATA, data & 0x0f);
	160	discrete_sound_w(discrete, space, MONTECAR_BEEPER_EN, data & 0x10);
	161	discrete_sound_w(discrete, space, MONTECAR_DRONE_LOUD_DATA, data & 0x0f);
162	162	}
163	163
164	164

trunk/src/mame/drivers/parodius.c

r17961	r17962
58	58	{
59	59
60	60	if (m_videobank & 0x02)
61		return k053245_r(m_k053245, offset);
	61	return k053245_r(m_k053245, space, offset);
62	62	else
63		return k052109_r(m_k052109, offset);
	63	return k052109_r(m_k052109, space, offset);
64	64	}
65	65
66	66	WRITE8_MEMBER(parodius_state::parodius_052109_053245_w)
67	67	{
68	68
69	69	if (m_videobank & 0x02)
70		k053245_w(m_k053245, offset, data);
	70	k053245_w(m_k053245, space, offset, data);
71	71	else
72		k052109_w(m_k052109, offset, data);
	72	k052109_w(m_k052109, space, offset, data);
73	73	}
74	74
75	75	WRITE8_MEMBER(parodius_state::parodius_videobank_w)
r17961	r17962
103	103	READ8_MEMBER(parodius_state::parodius_sound_r)
104	104	{
105	105	device_t *device = machine().device("k053260");
106		return k053260_r(device, 2 + offset);
	106	return k053260_r(device, space, 2 + offset);
107	107	}
108	108
109	109	WRITE8_MEMBER(parodius_state::parodius_sh_irqtrigger_w)

trunk/src/mame/drivers/segac2.c

r17961	r17962
174	174	/* only works if we're accessing the low byte */
175	175	if (ACCESSING_BITS_0_7)
176	176	{
177		upd7759_port_w(device, 0, data & 0xff);
	177	upd7759_port_w(device, space, 0, data & 0xff);
178	178	upd7759_start_w(device, 0);
179	179	upd7759_start_w(device, 1);
180	180	}

trunk/src/mame/drivers/homedata.c

r17961	r17962
359	359	coin_counter_w(machine(), 0, ~data & 0x80);
360	360
361	361	if (BIT(m_upd7807_portc, 5) && !BIT(data, 5))   /* write clock 1->0 */
362		ym2203_w(m_ym, BIT(data, 3), m_upd7807_porta);
	362	ym2203_w(m_ym, space, BIT(data, 3), m_upd7807_porta);
363	363
364	364	if (BIT(m_upd7807_portc, 4) && !BIT(data, 4))   /* read clock 1->0 */
365		m_upd7807_porta = ym2203_r(m_ym, BIT(data, 3));
	365	m_upd7807_porta = ym2203_r(m_ym, space, BIT(data, 3));
366	366
367	367	m_upd7807_portc = data;
368	368	}

trunk/src/mame/drivers/gyruss.c

r17961	r17962
113	113
114	114	WRITE8_MEMBER(gyruss_state::gyruss_dac_w)
115	115	{
116		discrete_sound_w(m_discrete, NODE(16), data);
	116	discrete_sound_w(m_discrete, space, NODE(16), data);
117	117	}
118	118
119	119	WRITE8_MEMBER(gyruss_state::gyruss_irq_clear_w)
r17961	r17962
130	130	{
131	131	/* low bit: 47000pF = 0.047uF */
132	132	/* high bit: 220000pF = 0.22uF */
133		discrete_sound_w(device, NODE(3 * chip + i + 21), data & 3);
	133	address_space &space = device->machine().driver_data()->generic_space();
	134	discrete_sound_w(device, space, NODE(3 * chip + i + 21), data & 3);
134	135	data >>= 2;
135	136	}
136	137	}

trunk/src/mame/drivers/fastlane.c

r17961	r17962
21	21	fastlane_state *state = timer.machine().driver_data<fastlane_state>();
22	22	int scanline = param;
23	23
24		if(scanline == 240 && k007121_ctrlram_r(state->m_k007121, 7) & 0x02) // vblank irq
	24	address_space &space = state->generic_space();
	25	if(scanline == 240 && k007121_ctrlram_r(state->m_k007121, space, 7) & 0x02) // vblank irq
25	26	state->m_maincpu->set_input_line(HD6309_IRQ_LINE, HOLD_LINE);
26		else if(((scanline % 32) == 0) && k007121_ctrlram_r(state->m_k007121, 7) & 0x01) // timer irq
	27	else if(((scanline % 32) == 0) && k007121_ctrlram_r(state->m_k007121, space, 7) & 0x01) // timer irq
27	28	state->m_maincpu->set_input_line(INPUT_LINE_NMI, PULSE_LINE);
28	29	}
29	30
r17961	r17962
32	33	{
33	34
34	35	if (offset < 8)
35		k007121_ctrl_w(m_k007121, offset, data);
	36	k007121_ctrl_w(m_k007121, space, offset, data);
36	37	else   /* scroll registers */
37	38	m_k007121_regs[offset] = data;
38	39	}
r17961	r17962
59	60	READ8_MEMBER(fastlane_state::fastlane_k1_k007232_r)
60	61	{
61	62	device_t *device = machine().device("konami1");
62		return k007232_r(device, offset ^ 1);
	63	return k007232_r(device, space, offset ^ 1);
63	64	}
64	65
65	66	WRITE8_MEMBER(fastlane_state::fastlane_k1_k007232_w)
66	67	{
67	68	device_t *device = machine().device("konami1");
68		k007232_w(device, offset ^ 1, data);
	69	k007232_w(device, space, offset ^ 1, data);
69	70	}
70	71
71	72	READ8_MEMBER(fastlane_state::fastlane_k2_k007232_r)
72	73	{
73	74	device_t *device = machine().device("konami2");
74		return k007232_r(device, offset ^ 1);
	75	return k007232_r(device, space, offset ^ 1);
75	76	}
76	77
77	78	WRITE8_MEMBER(fastlane_state::fastlane_k2_k007232_w)
78	79	{
79	80	device_t *device = machine().device("konami2");
80		k007232_w(device, offset ^ 1, data);
	81	k007232_w(device, space, offset ^ 1, data);
81	82	}
82	83	static ADDRESS_MAP_START( fastlane_map, AS_PROGRAM, 8, fastlane_state )
83	84	AM_RANGE(0x0000, 0x005f) AM_RAM_WRITE(k007121_registers_w) AM_SHARE("k007121_regs")   /* 007121 registers */

trunk/src/mame/drivers/gamecstl.c

r17961	r17962
192	192	READ8_MEMBER(gamecstl_state::at_dma8237_2_r)
193	193	{
194	194	device_t *device = machine().device("dma8237_2");
195		return i8237_r(device, offset / 2);
	195	return i8237_r(device, space, offset / 2);
196	196	}
197	197
198	198	WRITE8_MEMBER(gamecstl_state::at_dma8237_2_w)
199	199	{
200	200	device_t *device = machine().device("dma8237_2");
201		i8237_w(device, offset / 2, data);
	201	i8237_w(device, space, offset / 2, data);
202	202	}
203	203
204	204	// Intel 82439TX System Controller (MXTC)
r17961	r17962
367	367	READ32_MEMBER(gamecstl_state::ide_r)
368	368	{
369	369	device_t *device = machine().device("ide");
370		return ide_controller32_r(device, 0x1f0/4 + offset, mem_mask);
	370	return ide_controller32_r(device, space, 0x1f0/4 + offset, mem_mask);
371	371	}
372	372
373	373	WRITE32_MEMBER(gamecstl_state::ide_w)
374	374	{
375	375	device_t *device = machine().device("ide");
376		ide_controller32_w(device, 0x1f0/4 + offset, data, mem_mask);
	376	ide_controller32_w(device, space, 0x1f0/4 + offset, data, mem_mask);
377	377	}
378	378
379	379	READ32_MEMBER(gamecstl_state::fdc_r)
380	380	{
381	381	device_t *device = machine().device("ide");
382		return ide_controller32_r(device, 0x3f0/4 + offset, mem_mask);
	382	return ide_controller32_r(device, space, 0x3f0/4 + offset, mem_mask);
383	383	}
384	384
385	385	WRITE32_MEMBER(gamecstl_state::fdc_w)
386	386	{
387	387	device_t *device = machine().device("ide");
388	388	//mame_printf_debug("FDC: write %08X, %08X, %08X\n", data, offset, mem_mask);
389		ide_controller32_w(device, 0x3f0/4 + offset, data, mem_mask);
	389	ide_controller32_w(device, space, 0x3f0/4 + offset, data, mem_mask);
390	390	}
391	391
392	392

trunk/src/mame/drivers/cidelsa.c

r17961	r17962
64	64	switch (data)
65	65	{
66	66	case 0x01:
67		ay8910_data_w(m_psg, 0, m_psg_latch);
	67	ay8910_data_w(m_psg, space, 0, m_psg_latch);
68	68	break;
69	69
70	70	case 0x02:
71		m_psg_latch = ay8910_r(m_psg, 0);
	71	m_psg_latch = ay8910_r(m_psg, space, 0);
72	72	break;
73	73
74	74	case 0x03:
75		ay8910_address_w(m_psg, 0, m_psg_latch);
	75	ay8910_address_w(m_psg, space, 0, m_psg_latch);
76	76	break;
77	77	}
78	78	}

trunk/src/mame/drivers/vendetta.c

r17961	r17962
145	145
146	146	READ8_MEMBER(vendetta_state::vendetta_K052109_r)
147	147	{
148		return k052109_r(m_k052109, offset + 0x2000);
	148	return k052109_r(m_k052109, space, offset + 0x2000);
149	149	}
150	150
151	151	WRITE8_MEMBER(vendetta_state::vendetta_K052109_w)
r17961	r17962
156	156	// *  Tilemap MASK-ROM Test       (0x1d80<->0x3d80, 0x1e00<->0x3e00, 0x1f00<->0x3f00)  *
157	157	// *************************************************************************************
158	158	if ((offset == 0x1d80) || (offset == 0x1e00) || (offset == 0x1f00))
159		k052109_w(m_k052109, offset, data);
160		k052109_w(m_k052109, offset + 0x2000, data);
	159	k052109_w(m_k052109, space, offset, data);
	160	k052109_w(m_k052109, space, offset + 0x2000, data);
161	161	}
162	162
163	163
r17961	r17962
225	225	READ8_MEMBER(vendetta_state::vendetta_sound_r)
226	226	{
227	227	device_t *device = machine().device("k053260");
228		return k053260_r(device, 2 + offset);
	228	return k053260_r(device, space, 2 + offset);
229	229	}
230	230
231	231	/********************************************/

trunk/src/mame/drivers/segas16b.c

r17961	r17962
1170	1170
1171	1171	WRITE16_MEMBER( segas16b_state::atomicp_sound_w )
1172	1172	{
1173		ym2413_w(m_ym2413, offset, data >> 8);
	1173	ym2413_w(m_ym2413, space, offset, data >> 8);
1174	1174	}
1175	1175
1176	1176

trunk/src/mame/drivers/nwk-tr.c

r17961	r17962
315	315	}
316	316	if (ACCESSING_BITS_0_7)
317	317	{
318		r |= adc1213x_do_r(adc12138, 0) | (adc1213x_eoc_r(adc12138, 0) << 2);
	318	r |= adc1213x_do_r(adc12138, space, 0) | (adc1213x_eoc_r(adc12138, space, 0) << 2);
319	319	}
320	320	}
321	321	else if (offset == 1)
r17961	r17962
352	352	int di = (data >> 25) & 0x1;
353	353	int sclk = (data >> 24) & 0x1;
354	354
355		adc1213x_cs_w(adc12138, 0, cs);
356		adc1213x_conv_w(adc12138, 0, conv);
357		adc1213x_di_w(adc12138, 0, di);
358		adc1213x_sclk_w(adc12138, 0, sclk);
	355	adc1213x_cs_w(adc12138, space, 0, cs);
	356	adc1213x_conv_w(adc12138, space, 0, conv);
	357	adc1213x_di_w(adc12138, space, 0, di);
	358	adc1213x_sclk_w(adc12138, space, 0, sclk);
359	359	}
360	360	if (ACCESSING_BITS_0_7)
361	361	{

trunk/src/mame/drivers/jpmsys5.c

r17961	r17962
316	316	{
317	317	case 0:
318	318	{
319		upd7759_port_w(device, 0, data & 0xff);
	319	upd7759_port_w(device, space, 0, data & 0xff);
320	320	upd7759_start_w(device, 0);
321	321	upd7759_start_w(device, 1);
322	322	break;

trunk/src/mame/drivers/homerun.c

r17961	r17962
97	97	m_sample = data;
98	98
99	99	if (m_d7756 != NULL)
100		upd7759_port_w(m_d7756, 0, data);
	100	upd7759_port_w(m_d7756, space, 0, data);
101	101	}
102	102
103	103	static ADDRESS_MAP_START( homerun_memmap, AS_PROGRAM, 8, homerun_state )

trunk/src/mame/drivers/ninjaw.c

r17961	r17962
369	369	{
370	370
371	371	if (offset == 0)
372		tc0140syt_port_w(m_tc0140syt, 0, data & 0xff);
	372	tc0140syt_port_w(m_tc0140syt, space, 0, data & 0xff);
373	373	else if (offset == 1)
374		tc0140syt_comm_w(m_tc0140syt, 0, data & 0xff);
	374	tc0140syt_comm_w(m_tc0140syt, space, 0, data & 0xff);
375	375
376	376	#ifdef MAME_DEBUG
377	377	if (data & 0xff00)
r17961	r17962
383	383	{
384	384
385	385	if (offset == 1)
386		return ((tc0140syt_comm_r(m_tc0140syt, 0) & 0xff));
	386	return ((tc0140syt_comm_r(m_tc0140syt, space, 0) & 0xff));
387	387	else
388	388	return 0;
389	389	}
r17961	r17962
413	413	WRITE16_MEMBER(ninjaw_state::tc0100scn_triple_screen_w)
414	414	{
415	415
416		tc0100scn_word_w(m_tc0100scn_1, offset, data, mem_mask);
417		tc0100scn_word_w(m_tc0100scn_2, offset, data, mem_mask);
418		tc0100scn_word_w(m_tc0100scn_3, offset, data, mem_mask);
	416	tc0100scn_word_w(m_tc0100scn_1, space, offset, data, mem_mask);
	417	tc0100scn_word_w(m_tc0100scn_2, space, offset, data, mem_mask);
	418	tc0100scn_word_w(m_tc0100scn_3, space, offset, data, mem_mask);
419	419	}
420	420
421	421	/***********************************************************

trunk/src/mame/drivers/pacman.c

r17961	r17962
537	537	/* since the sound region in Ali Baba is not contiguous, translate the
538	538	offset into the 0-0x1f range */
539	539	if (offset < 0x10)
540		pacman_sound_w(machine().device("namco"), offset, data);
	540	pacman_sound_w(machine().device("namco"), space, offset, data);
541	541	else if (offset < 0x20)
542	542	m_spriteram2[offset - 0x10] = data;
543	543	else
544		pacman_sound_w(machine().device("namco"), offset - 0x10, data);
	544	pacman_sound_w(machine().device("namco"), space, offset - 0x10, data);
545	545	}
546	546
547	547	READ8_MEMBER(pacman_state::alibaba_mystery_1_r)

trunk/src/mame/drivers/igs011.c

r17961	r17962
2461	2461	ics2115_device* ics2115 = machine().device<ics2115_device>("ics");
2462	2462	switch(offset)
2463	2463	{
2464		case 0:   return ics2115_device::read(ics2115, (offs_t)0);
2465		case 1:   return ics2115_device::read(ics2115, (offs_t)1);
2466		case 2:   return (ics2115_device::read(ics2115, (offs_t)3) << 8) | ics2115_device::read(ics2115, (offs_t)2);
	2464	case 0:   return ics2115_device::read(ics2115, space, (offs_t)0);
	2465	case 1:   return ics2115_device::read(ics2115, space, (offs_t)1);
	2466	case 2:   return (ics2115_device::read(ics2115, space, (offs_t)3) << 8) | ics2115_device::read(ics2115, space, (offs_t)2);
2467	2467	}
2468	2468	return 0xff;
2469	2469	}
r17961	r17962
2474	2474	switch(offset)
2475	2475	{
2476	2476	case 1:
2477		if (ACCESSING_BITS_0_7)      ics2115_device::write(ics2115,1,data);
	2477	if (ACCESSING_BITS_0_7)      ics2115_device::write(ics2115,space, 1,data);
2478	2478	break;
2479	2479	case 2:
2480		if (ACCESSING_BITS_0_7)      ics2115_device::write(ics2115,2,data);
2481		if (ACCESSING_BITS_8_15)   ics2115_device::write(ics2115,3,data>>8);
	2480	if (ACCESSING_BITS_0_7)      ics2115_device::write(ics2115,space, 2,data);
	2481	if (ACCESSING_BITS_8_15)   ics2115_device::write(ics2115,space, 3,data>>8);
2482	2482	break;
2483	2483	}
2484	2484	}

trunk/src/mame/drivers/fuukifg3.c

r17961	r17962
283	283
284	284	WRITE8_MEMBER(fuuki32_state::snd_ymf278b_w)
285	285	{
286		ymf278b_w(machine().device("ymf1"), offset, data);
	286	ymf278b_w(machine().device("ymf1"), space, offset, data);
287	287
288	288	// also write to ymf262
289	289	if (offset < 4)
290		ymf262_w(machine().device("ymf2"), offset, data);
	290	ymf262_w(machine().device("ymf2"), space, offset, data);
291	291	}
292	292
293	293	static ADDRESS_MAP_START( fuuki32_sound_map, AS_PROGRAM, 8, fuuki32_state )

trunk/src/mame/drivers/crimfght.c

r17961	r17962
60	60	if (k052109_get_rmrd_line(m_k052109) == CLEAR_LINE)
61	61	{
62	62	if (offset >= 0x3800 && offset < 0x3808)
63		return k051937_r(m_k051960, offset - 0x3800);
	63	return k051937_r(m_k051960, space, offset - 0x3800);
64	64	else if (offset < 0x3c00)
65		return k052109_r(m_k052109, offset);
	65	return k052109_r(m_k052109, space, offset);
66	66	else
67		return k051960_r(m_k051960, offset - 0x3c00);
	67	return k051960_r(m_k051960, space, offset - 0x3c00);
68	68	}
69	69	else
70		return k052109_r(m_k052109, offset);
	70	return k052109_r(m_k052109, space, offset);
71	71	}
72	72
73	73	WRITE8_MEMBER(crimfght_state::k052109_051960_w)
74	74	{
75	75
76	76	if (offset >= 0x3800 && offset < 0x3808)
77		k051937_w(m_k051960, offset - 0x3800, data);
	77	k051937_w(m_k051960, space, offset - 0x3800, data);
78	78	else if (offset < 0x3c00)
79		k052109_w(m_k052109, offset, data);
	79	k052109_w(m_k052109, space, offset, data);
80	80	else
81		k051960_w(m_k051960, offset - 0x3c00, data);
	81	k051960_w(m_k051960, space, offset - 0x3c00, data);
82	82	}
83	83
84	84	/********************************************/

trunk/src/mame/drivers/triplhnt.c

r17961	r17962
32	32	}
33	33
34	34
35		static void triplhnt_update_misc(running_machine &machine, int offset)
	35	static void triplhnt_update_misc(address_space &space, int offset)
36	36	{
37		triplhnt_state *state = machine.driver_data<triplhnt_state>();
38		samples_device *samples = machine.device<samples_device>("samples");
39		device_t *discrete = machine.device("discrete");
	37	triplhnt_state *state = space.machine().driver_data<triplhnt_state>();
	38	samples_device *samples = space.machine().device<samples_device>("samples");
	39	device_t *discrete = space.machine().device("discrete");
40	40	UINT8 is_witch_hunt;
41	41	UINT8 bit = offset >> 1;
42	42
r17961	r17962
66	66	state->m_sprite_zoom = (state->m_misc_flags >> 4) & 1;
67	67	state->m_sprite_bank = (state->m_misc_flags >> 7) & 1;
68	68
69		set_led_status(machine, 0, state->m_misc_flags & 0x02);
	69	set_led_status(space.machine(), 0, state->m_misc_flags & 0x02);
70	70
71		coin_lockout_w(machine, 0, !(state->m_misc_flags & 0x08));
72		coin_lockout_w(machine, 1, !(state->m_misc_flags & 0x08));
	71	coin_lockout_w(space.machine(), 0, !(state->m_misc_flags & 0x08));
	72	coin_lockout_w(space.machine(), 1, !(state->m_misc_flags & 0x08));
73	73
74		discrete_sound_w(discrete, TRIPLHNT_SCREECH_EN, state->m_misc_flags & 0x04);   // screech
75		discrete_sound_w(discrete, TRIPLHNT_LAMP_EN, state->m_misc_flags & 0x02);   // Lamp is used to reset noise
76		discrete_sound_w(discrete, TRIPLHNT_BEAR_EN, state->m_misc_flags & 0x80);   // bear
	74	discrete_sound_w(discrete, space, TRIPLHNT_SCREECH_EN, state->m_misc_flags & 0x04);   // screech
	75	discrete_sound_w(discrete, space, TRIPLHNT_LAMP_EN, state->m_misc_flags & 0x02);   // Lamp is used to reset noise
	76	discrete_sound_w(discrete, space, TRIPLHNT_BEAR_EN, state->m_misc_flags & 0x80);   // bear
77	77
78		is_witch_hunt = machine.root_device().ioport("0C09")->read() == 0x40;
	78	is_witch_hunt = space.machine().root_device().ioport("0C09")->read() == 0x40;
79	79	bit = ~state->m_misc_flags & 0x40;
80	80
81	81	/* if we're not playing the sample yet, start it */
r17961	r17962
92	92
93	93	WRITE8_MEMBER(triplhnt_state::triplhnt_misc_w)
94	94	{
95		triplhnt_update_misc(machine(), offset);
	95	triplhnt_update_misc(space, offset);
96	96	}
97	97
98	98
r17961	r17962
113	113
114	114	READ8_MEMBER(triplhnt_state::triplhnt_misc_r)
115	115	{
116		triplhnt_update_misc(machine(), offset);
	116	triplhnt_update_misc(space, offset);
117	117	return ioport("VBLANK")->read() | m_hit_code;
118	118	}
119	119

trunk/src/mame/drivers/rollerg.c

r17961	r17962
43	43	{
44	44
45	45	if (m_readzoomroms)
46		return k051316_rom_r(m_k051316, offset);
	46	return k051316_rom_r(m_k051316, space, offset);
47	47	else
48		return k051316_r(m_k051316, offset);
	48	return k051316_r(m_k051316, space, offset);
49	49	}
50	50
51	51	READ8_MEMBER(rollerg_state::rollerg_sound_r)
r17961	r17962
53	53	device_t *device = machine().device("k053260");
54	54	/* If the sound CPU is running, read the status, otherwise
55	55	just make it pass the test */
56		return k053260_r(device, 2 + offset);
	56	return k053260_r(device, space, 2 + offset);
57	57	}
58	58
59	59	WRITE8_MEMBER(rollerg_state::soundirq_w)

trunk/src/mame/drivers/royalmah.c

r17961	r17962
894	894	{
895	895	case 0x8000:   return ioport("DSW4")->read();      // dsw 4
896	896	case 0x8200:   return ioport("DSW3")->read();      // dsw 3
897		case 0x9001:   return ay8910_r(machine().device("aysnd"), 0);   // inputs
	897	case 0x9001:   return ay8910_r(machine().device("aysnd"), space, 0);   // inputs
898	898	case 0x9011:   return ioport("SYSTEM")->read();
899	899	}
900	900
r17961	r17962
916	916	switch(offset)
917	917	{
918	918	case 0x8e00:   m_palette_base = data & 0x1f;   return;
919		case 0x9002:   ay8910_data_w(machine().device("aysnd"),0,data);         return;
920		case 0x9003:   ay8910_address_w(machine().device("aysnd"),0,data);      return;
	919	case 0x9002:   ay8910_data_w(machine().device("aysnd"),space,0,data);         return;
	920	case 0x9003:   ay8910_address_w(machine().device("aysnd"),space,0,data);      return;
921	921	case 0x9010:
922	922	mjifb_coin_counter_w(space,0,data);
923	923	return;
r17961	r17962
1003	1003	{
1004	1004	case 0x8000:   return ioport("DSW2")->read();      // dsw 2
1005	1005	case 0x8001:   return ioport("DSW1")->read();      // dsw 1
1006		case 0x9001:   return ay8910_r(machine().device("aysnd"), 0);   // inputs
	1006	case 0x9001:   return ay8910_r(machine().device("aysnd"), space, 0);   // inputs
1007	1007	case 0x9011:   return ioport("SYSTEM")->read();
1008	1008	}
1009	1009
r17961	r17962
1024	1024	switch(offset)
1025	1025	{
1026	1026	case 0x8802:   m_palette_base = data & 0x1f;               return;
1027		case 0x9002:   ay8910_data_w(machine().device("aysnd"),0,data);      return;
1028		case 0x9003:   ay8910_address_w(machine().device("aysnd"),0,data);   return;
	1027	case 0x9002:   ay8910_data_w(machine().device("aysnd"),space,0,data);      return;
	1028	case 0x9003:   ay8910_address_w(machine().device("aysnd"),space,0,data);   return;
1029	1029	case 0x9010:   mjifb_coin_counter_w(space,0,data);      return;
1030	1030	case 0x9011:   input_port_select_w(space,0,data);      return;
1031	1031	case 0x9013:

trunk/src/mame/drivers/m10.c

r17961	r17962
141	141
142	142	/* written from /Q to A with slight delight */
143	143	LOG(("ic8j2: %d\n", data));
144		ttl74123_a_w(device, 0, data);
145		ttl74123_a_w(state->m_ic8j1, 0, data);
	144	ttl74123_a_w(device, space, 0, data);
	145	ttl74123_a_w(state->m_ic8j1, space, 0, data);
146	146	}
147	147
148	148	static const ttl74123_interface ic8j1_intf =
r17961	r17962
154	154	1,               /* A pin - driven by the CRTC */
155	155	1,               /* B pin - pulled high */
156	156	1,               /* Clear pin - pulled high */
157		ic8j1_output_changed
	157	DEVCB_HANDLER(ic8j1_output_changed)
158	158	};
159	159
160	160	static const ttl74123_interface ic8j2_intf =
r17961	r17962
166	166	1,               /* A pin - driven by the CRTC */
167	167	1,               /* B pin - pulled high */
168	168	1,               /* Clear pin - pulled high */
169		ic8j2_output_changed
	169	DEVCB_HANDLER(ic8j2_output_changed)
170	170	};
171	171
172	172	/*************************************
r17961	r17962
476	476	{
477	477	//LOG(("rd:%d\n",machine().primary_screen->vpos()));
478	478	LOG(("clear\n"));
479		ttl74123_clear_w(m_ic8j1, 0, 0);
480		ttl74123_clear_w(m_ic8j1, 0, 1);
	479	ttl74123_clear_w(m_ic8j1, space, 0, 0);
	480	ttl74123_clear_w(m_ic8j1, space, 0, 1);
481	481	return 0x00;
482	482	}
483	483
r17961	r17962
486	486	//LOG(("rd:%d\n",machine().primary_screen->vpos()));
487	487	//m_maincpu->set_input_line(0, CLEAR_LINE);
488	488	LOG(("clear\n"));
489		ttl74123_clear_w(m_ic8j1, 0, 0);
490		ttl74123_clear_w(m_ic8j1, 0, 1);
	489	ttl74123_clear_w(m_ic8j1, space, 0, 0);
	490	ttl74123_clear_w(m_ic8j1, space, 0, 1);
491	491	return 0x00;
492	492	}
493	493

trunk/src/emu/cpu/tms0980/tms0980.c

r17961	r17962
766	766	case 0x008:
767	767	if ( cpustate->config->read_k )
768	768	{
769		cpustate->cki_bus = cpustate->config->read_k( device, 0 );
	769	cpustate->cki_bus = cpustate->config->read_k( device, *cpustate->program, 0, 0xff );
770	770	}
771	771	else
772	772	{
r17961	r17962
930	930	cpustate->r = cpustate->r | ( 1 << cpustate->y );
931	931	if ( cpustate->config->write_r )
932	932	{
933		cpustate->config->write_r( device, 0, cpustate->r & cpustate->r_mask, 0xffff );
	933	cpustate->config->write_r( device, *cpustate->program, 0, cpustate->r & cpustate->r_mask, 0xffff );
934	934	}
935	935	}
936	936	if ( cpustate->decode & F_RSTR )
r17961	r17962
938	938	cpustate->r = cpustate->r & ( ~( 1 << cpustate->y ) );
939	939	if ( cpustate->config->write_r )
940	940	{
941		cpustate->config->write_r( device, 0, cpustate->r & cpustate->r_mask, 0xffff );
	941	cpustate->config->write_r( device, *cpustate->program, 0, cpustate->r & cpustate->r_mask, 0xffff );
942	942	}
943	943	}
944	944	if ( cpustate->decode & F_TDO )
r17961	r17962
957	957
958	958	if ( cpustate->config->write_o )
959	959	{
960		cpustate->config->write_o( device, 0, cpustate->o & cpustate->o_mask, 0xffff );
	960	cpustate->config->write_o( device, *cpustate->program, 0, cpustate->o & cpustate->o_mask, 0xffff );
961	961	}
962	962	}
963	963	if ( cpustate->decode & F_CLO )
r17961	r17962
965	965	cpustate->o = 0;
966	966	if ( cpustate->config->write_o )
967	967	{
968		cpustate->config->write_o( device, 0, cpustate->o & cpustate->o_mask, 0xffff );
	968	cpustate->config->write_o( device, *cpustate->program, 0, cpustate->o & cpustate->o_mask, 0xffff );
969	969	}
970	970	}
971	971	if ( cpustate->decode & F_LDX )

trunk/src/emu/cpu/m68000/68307ser.c

r17961	r17962
24	24	// if we're piggybacking on the existing 68681 implementation...
25	25	if (serial->m_duart68681)
26	26	{
27		if (offset&1) return duart68681_r(serial->m_duart68681, offset>>1);
	27	if (offset&1) return duart68681_r(serial->m_duart68681, *m68k->program, offset>>1);
28	28	}
29	29	else
30	30	{
r17961	r17962
104	104	// if we're piggybacking on the existing 68681 implementation...
105	105	if (serial->m_duart68681)
106	106	{
107		if (offset&1) duart68681_w(serial->m_duart68681, offset>>1, data);
	107	if (offset&1) duart68681_w(serial->m_duart68681, *m68k->program, offset>>1, data);
108	108	}
109	109	else
110	110	{

trunk/src/emu/cpu/cubeqcpu/cubeqcpu.h

r17961	r17962
139	139	PUBLIC FUNCTIONS
140	140	***************************************************************************/
141	141
142		extern READ16_DEVICE_HANDLER( cubeqcpu_sndram_r );
143		extern WRITE16_DEVICE_HANDLER( cubeqcpu_sndram_w );
	142	extern DECLARE_READ16_DEVICE_HANDLER( cubeqcpu_sndram_r );
	143	extern DECLARE_WRITE16_DEVICE_HANDLER( cubeqcpu_sndram_w );
144	144
145		extern READ16_DEVICE_HANDLER( cubeqcpu_rotram_r );
146		extern WRITE16_DEVICE_HANDLER( cubeqcpu_rotram_w );
	145	extern DECLARE_READ16_DEVICE_HANDLER( cubeqcpu_rotram_r );
	146	extern DECLARE_WRITE16_DEVICE_HANDLER( cubeqcpu_rotram_w );
147	147
148	148	void cubeqcpu_swap_line_banks(device_t *device);
149	149

trunk/src/emu/cpu/rsp/rspdrc.c

r17961	r17962
472	472	{
473	473	if(dest)
474	474	{
475		rsp->r[dest] = (rsp->config->sp_reg_r)(rsp->device, reg, 0x00000000);
	475	rsp->r[dest] = (rsp->config->sp_reg_r)(rsp->device, *rsp->program, reg, 0x00000000);
476	476	}
477	477	}
478	478	else if (reg >= 8 && reg < 16)
479	479	{
480	480	if(dest)
481	481	{
482		rsp->r[dest] = (rsp->config->dp_reg_r)(rsp->device, reg - 8, 0x00000000);
	482	rsp->r[dest] = (rsp->config->dp_reg_r)(rsp->device, *rsp->program, reg - 8, 0x00000000);
483	483	}
484	484	}
485	485	else
r17961	r17962
496	496
497	497	if (reg >= 0 && reg < 8)
498	498	{
499		(rsp->config->sp_reg_w)(rsp->device, reg, data, 0x00000000);
	499	(rsp->config->sp_reg_w)(rsp->device, *rsp->program, reg, data, 0x00000000);
500	500	}
501	501	else if (reg >= 8 && reg < 16)
502	502	{
503		(rsp->config->dp_reg_w)(rsp->device, reg - 8, data, 0x00000000);
	503	(rsp->config->dp_reg_w)(rsp->device, *rsp->program, reg - 8, data, 0x00000000);
504	504	}
505	505	else
506	506	{

trunk/src/emu/cpu/powerpc/ppccom.c

r17961	r17962
1121	1121	else
1122	1122	ppc->param1 = 0;
1123	1123	} else {
1124		ppc->param1 = ppc->dcr_read_func(ppc->device,ppc->param0,0xffffffff);
	1124	ppc->param1 = ppc->dcr_read_func(ppc->device,*ppc->program,ppc->param0,0xffffffff);
1125	1125	}
1126	1126	}
1127	1127
r17961	r17962
1211	1211	if (ppc->param0 < ARRAY_LENGTH(ppc->dcr))
1212	1212	ppc->dcr[ppc->param0] = ppc->param1;
1213	1213	} else {
1214		ppc->dcr_write_func(ppc->device,ppc->param0,ppc->param1,0xffffffff);
	1214	ppc->dcr_write_func(ppc->device,*ppc->program,ppc->param0,ppc->param1,0xffffffff);
1215	1215	}
1216	1216	}
1217	1217

trunk/src/emu/cpu/esrip/esrip.c

r17961	r17962
1701	1701
1702	1702	/* FDT RAM: /Enable, Direction and /RAM OE */
1703	1703	else if (!bl44 && !_BIT(cpustate->l2, 3) && bl46)
1704		y_bus = cpustate->fdt_r(device, cpustate->fdt_cnt, 0);
	1704	y_bus = cpustate->fdt_r(device, *cpustate->program, cpustate->fdt_cnt, 0);
1705	1705
1706	1706	/* IPT RAM: /Enable and /READ */
1707	1707	else if (!_BIT(cpustate->l2, 6) && !_BIT(cpustate->l4, 5))
r17961	r17962
1728	1728
1729	1729	/* FDT RAM */
1730	1730	if (!bl44)
1731		x_bus = cpustate->fdt_r(device, cpustate->fdt_cnt, 0);
	1731	x_bus = cpustate->fdt_r(device, *cpustate->program, cpustate->fdt_cnt, 0);
1732	1732
1733	1733	/* Buffer is enabled - write direction */
1734	1734	else if (!BIT(cpustate->l2, 3) && !bl46)
r17961	r17962
1753	1753
1754	1754	/* Write FDT RAM: /Enable, Direction and WRITE */
1755	1755	if (!BIT(cpustate->l2, 3) && !bl46 && !BIT(cpustate->l4, 3))
1756		cpustate->fdt_w(device, cpustate->fdt_cnt, x_bus, 0);
	1756	cpustate->fdt_w(device, *cpustate->program, cpustate->fdt_cnt, x_bus, 0);
1757	1757
1758	1758	/* Write IPT RAM: /Enable and /WR */
1759	1759	if (!BIT(cpustate->l2, 7) && !BIT(cpustate->l4, 5))

trunk/src/emu/cpu/arm7/arm7.c

r17961	r17962
43	43
44	44
45	45	/* prototypes of coprocessor functions */
46		static WRITE32_DEVICE_HANDLER(arm7_do_callback);
47		static READ32_DEVICE_HANDLER(arm7_rt_r_callback);
48		static WRITE32_DEVICE_HANDLER(arm7_rt_w_callback);
	46	static DECLARE_WRITE32_DEVICE_HANDLER(arm7_do_callback);
	47	static DECLARE_READ32_DEVICE_HANDLER(arm7_rt_r_callback);
	48	static DECLARE_WRITE32_DEVICE_HANDLER(arm7_rt_w_callback);
49	49	void arm7_dt_r_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, UINT32 (*read32)(arm_state *cpustate, UINT32 addr));
50	50	void arm7_dt_w_callback(arm_state *cpustate, UINT32 insn, UINT32 *prn, void (*write32)(arm_state *cpustate, UINT32 addr, UINT32 data));
51	51

trunk/src/emu/cpu/arm7/arm7ops.c

r17961	r17962
283	283	{
284	284	// This instruction simply instructs the co-processor to do something, no data is returned to ARM7 core
285	285	if (arm7_coproc_do_callback)
286		arm7_coproc_do_callback(cpustate->device, insn, 0, 0);    // simply pass entire opcode to callback - since data format is actually dependent on co-proc implementation
	286	arm7_coproc_do_callback(cpustate->device, *cpustate->program, insn, 0, 0);    // simply pass entire opcode to callback - since data format is actually dependent on co-proc implementation
287	287	else
288	288	LOG(("%08x: Co-Processor Data Operation executed, but no callback defined!\n", R15));
289	289	}
r17961	r17962
299	299	{
300	300	if (arm7_coproc_rt_r_callback)
301	301	{
302		UINT32 res = arm7_coproc_rt_r_callback(cpustate->device, insn, 0);   // RT Read handler must parse opcode & return appropriate result
	302	UINT32 res = arm7_coproc_rt_r_callback(cpustate->device, *cpustate->program, insn, 0);   // RT Read handler must parse opcode & return appropriate result
303	303	if (cpustate->pendingUnd == 0)
304	304	{
305	305	SET_REGISTER(cpustate, (insn >> 12) & 0xf, res);
r17961	r17962
312	312	else
313	313	{
314	314	if (arm7_coproc_rt_w_callback)
315		arm7_coproc_rt_w_callback(cpustate->device, insn, GET_REGISTER(cpustate, (insn >> 12) & 0xf), 0);
	315	arm7_coproc_rt_w_callback(cpustate->device, *cpustate->program, insn, GET_REGISTER(cpustate, (insn >> 12) & 0xf), 0);
316	316	else
317	317	LOG(("%08x: Co-Processor Register Transfer executed, but no RT Write callback defined!\n", R15));
318	318	}

trunk/src/emu/devcb.c

r17961	r17962
232	232
233	233	int devcb_resolved_read_line::from_read8()
234	234	{
235		return ((*m_helper.read8_device)(m_object.device, 0) & 1) ? ASSERT_LINE : CLEAR_LINE;
	235	return ((*m_helper.read8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), 0, 0xff) & 1) ? ASSERT_LINE : CLEAR_LINE;
236	236	}
237	237
238	238
r17961	r17962
336	336
337	337	void devcb_resolved_write_line::to_write8(int state)
338	338	{
339		(*m_helper.write8_device)(m_object.device, 0, state);
	339	(*m_helper.write8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), 0, state, 0xff);
340	340	}
341	341
342	342
r17961	r17962
391	391	case DEVCB_TYPE_DEVICE:
392	392	m_object.device = devcb_resolver::resolve_device(desc.index, desc.tag, device);
393	393	if (desc.readdevice != NULL)
394		*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(desc.readdevice, desc.name, m_object.device);
	394	{
	395	m_helper.read8_device = desc.readdevice;
	396	*static_cast<devcb_read8_delegate *>(this) = devcb_read8_delegate(&devcb_resolved_read8::from_read8, desc.name, this);
	397	}
395	398	else
396	399	{
397	400	m_helper.read_line = desc.readline;
r17961	r17962
428	431	//  line read value to an 8-bit value
429	432	//-------------------------------------------------
430	433
	434	UINT8 devcb_resolved_read8::from_read8(offs_t offset)
	435	{
	436	return (*m_helper.read8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, 0xff);
	437	}
	438
	439
	440	//-------------------------------------------------
	441	//  from_readline - helper to convert from a device
	442	//  line read value to an 8-bit value
	443	//-------------------------------------------------
	444
431	445	UINT8 devcb_resolved_read8::from_readline(offs_t offset)
432	446	{
433	447	return (*m_helper.read_line)(m_object.device);
r17961	r17962
484	498	case DEVCB_TYPE_DEVICE:
485	499	m_object.device = devcb_resolver::resolve_device(desc.index, desc.tag, device);
486	500	if (desc.writedevice != NULL)
487		*static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(desc.writedevice, desc.name, m_object.device);
	501	{
	502	m_helper.write8_device = desc.writedevice;
	503	*static_cast<devcb_write8_delegate *>(this) = devcb_write8_delegate(&devcb_resolved_write8::to_write8, desc.name, this);
	504	}
488	505	else
489	506	{
490	507	m_helper.write_line = desc.writeline;
r17961	r17962
531	548	//  memory read value from a line value
532	549	//-------------------------------------------------
533	550
	551	void devcb_resolved_write8::to_write8(offs_t offset, UINT8 data)
	552	{
	553	(*m_helper.write8_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, data, 0xff);
	554	}
	555
	556
	557	//-------------------------------------------------
	558	//  to_write8 - helper to convert to an 8-bit
	559	//  memory read value from a line value
	560	//-------------------------------------------------
	561
534	562	void devcb_resolved_write8::to_writeline(offs_t offset, UINT8 data)
535	563	{
536	564	(*m_helper.write_line)(m_object.device, (data & 1) ? ASSERT_LINE : CLEAR_LINE);
r17961	r17962
588	616	case DEVCB_TYPE_DEVICE:
589	617	m_object.device = devcb_resolver::resolve_device(desc.index, desc.tag, device);
590	618	if (desc.readdevice != NULL)
591		*static_cast<devcb_read16_delegate *>(this) = devcb_read16_delegate(desc.readdevice, desc.name, m_object.device);
	619	{
	620	m_helper.read16_device = desc.readdevice;
	621	*static_cast<devcb_read16_delegate *>(this) = devcb_read16_delegate(&devcb_resolved_read16::from_read16, desc.name, this);
	622	}
592	623	else
593	624	{
594	625	m_helper.read_line = desc.readline;
r17961	r17962
625	656	//  line read value to a 16-bit value
626	657	//-------------------------------------------------
627	658
	659	UINT16 devcb_resolved_read16::from_read16(offs_t offset, UINT16 mask)
	660	{
	661	return (*m_helper.read16_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, mask);
	662	}
	663
	664
	665	//-------------------------------------------------
	666	//  from_read16 - helper to convert from a device
	667	//  line read value to a 16-bit value
	668	//-------------------------------------------------
	669
628	670	UINT16 devcb_resolved_read16::from_readline(offs_t offset, UINT16 mask)
629	671	{
630	672	return (*m_helper.read_line)(m_object.device);
r17961	r17962
681	723	case DEVCB_TYPE_DEVICE:
682	724	m_object.device = devcb_resolver::resolve_device(desc.index, desc.tag, device);
683	725	if (desc.writedevice != NULL)
684		*static_cast<devcb_write16_delegate *>(this) = devcb_write16_delegate(desc.writedevice, desc.name, m_object.device);
	726	{
	727	m_helper.write16_device = desc.writedevice;
	728	*static_cast<devcb_write16_delegate *>(this) = devcb_write16_delegate(&devcb_resolved_write16::to_write16, desc.name, this);
	729	}
685	730	else
686	731	{
687	732	m_helper.write_line = desc.writeline;
r17961	r17962
728	773	//  memory read value from a line value
729	774	//-------------------------------------------------
730	775
	776	void devcb_resolved_write16::to_write16(offs_t offset, UINT16 data, UINT16 mask)
	777	{
	778	(*m_helper.write16_device)(m_object.device, m_object.device->machine().driver_data()->generic_space(), offset, data, mask);
	779	}
	780
	781
	782	//-------------------------------------------------
	783	//  to_write16 - helper to convert to a 16-bit
	784	//  memory read value from a line value
	785	//-------------------------------------------------
	786
731	787	void devcb_resolved_write16::to_writeline(offs_t offset, UINT16 data, UINT16 mask)
732	788	{
733	789	(*m_helper.write_line)(m_object.device, (data & 1) ? ASSERT_LINE : CLEAR_LINE);

trunk/src/emu/video/hd63484.h

r17961	r17962
55	55	DEVICE I/O FUNCTIONS
56	56	***************************************************************************/
57	57
58		READ16_DEVICE_HANDLER( hd63484_status_r );
59		WRITE16_DEVICE_HANDLER( hd63484_address_w );
60		WRITE16_DEVICE_HANDLER( hd63484_data_w );
61		READ16_DEVICE_HANDLER( hd63484_data_r );
	58	DECLARE_READ16_DEVICE_HANDLER( hd63484_status_r );
	59	DECLARE_WRITE16_DEVICE_HANDLER( hd63484_address_w );
	60	DECLARE_WRITE16_DEVICE_HANDLER( hd63484_data_w );
	61	DECLARE_READ16_DEVICE_HANDLER( hd63484_data_r );
62	62
63		READ16_DEVICE_HANDLER( hd63484_ram_r );
64		READ16_DEVICE_HANDLER( hd63484_regs_r );
65		WRITE16_DEVICE_HANDLER( hd63484_ram_w );
66		WRITE16_DEVICE_HANDLER( hd63484_regs_w );
	63	DECLARE_READ16_DEVICE_HANDLER( hd63484_ram_r );
	64	DECLARE_READ16_DEVICE_HANDLER( hd63484_regs_r );
	65	DECLARE_WRITE16_DEVICE_HANDLER( hd63484_ram_w );
	66	DECLARE_WRITE16_DEVICE_HANDLER( hd63484_regs_w );
67	67
68	68	#endif /* __HD63484_H__ */
69	69

trunk/src/emu/video/tlc34076.h

r17961	r17962
59	59	DEVICE I/O FUNCTIONS
60	60	***************************************************************************/
61	61
62		WRITE8_DEVICE_HANDLER( tlc34076_w );
63		READ8_DEVICE_HANDLER( tlc34076_r );
	62	DECLARE_WRITE8_DEVICE_HANDLER( tlc34076_w );
	63	DECLARE_READ8_DEVICE_HANDLER( tlc34076_r );

trunk/src/emu/video/voodoo.c

r17961	r17962
4064	4064	flush_fifos(v, device->machine().time());
4065	4065
4066	4066	if (offset < 0x80000/4)
4067		result = banshee_io_r(device, offset, mem_mask);
	4067	result = banshee_io_r(device, space, offset, mem_mask);
4068	4068	else if (offset < 0x100000/4)
4069		result = banshee_agp_r(device, offset, mem_mask);
	4069	result = banshee_agp_r(device, space, offset, mem_mask);
4070	4070	else if (offset < 0x200000/4)
4071	4071	logerror("%s:banshee_r(2D:%X)\n", device->machine().describe_context(), (offset*4) & 0xfffff);
4072	4072	else if (offset < 0x600000/4)
r17961	r17962
4232	4232	case io_vgad0:   case io_vgad4:   case io_vgad8:   case io_vgadc:
4233	4233	result = 0;
4234	4234	if (ACCESSING_BITS_0_7)
4235		result |= banshee_vga_r(device, offset*4+0) << 0;
	4235	result |= banshee_vga_r(device, space, offset*4+0, mem_mask >> 0) << 0;
4236	4236	if (ACCESSING_BITS_8_15)
4237		result |= banshee_vga_r(device, offset*4+1) << 8;
	4237	result |= banshee_vga_r(device, space, offset*4+1, mem_mask >> 8) << 8;
4238	4238	if (ACCESSING_BITS_16_23)
4239		result |= banshee_vga_r(device, offset*4+2) << 16;
	4239	result |= banshee_vga_r(device, space, offset*4+2, mem_mask >> 16) << 16;
4240	4240	if (ACCESSING_BITS_24_31)
4241		result |= banshee_vga_r(device, offset*4+3) << 24;
	4241	result |= banshee_vga_r(device, space, offset*4+3, mem_mask >> 24) << 24;
4242	4242	break;
4243	4243
4244	4244	default:
r17961	r17962
4606	4606	flush_fifos(v, device->machine().time());
4607	4607
4608	4608	if (offset < 0x80000/4)
4609		banshee_io_w(device, offset, data, mem_mask);
	4609	banshee_io_w(device, space, offset, data, mem_mask);
4610	4610	else if (offset < 0x100000/4)
4611		banshee_agp_w(device, offset, data, mem_mask);
	4611	banshee_agp_w(device, space, offset, data, mem_mask);
4612	4612	else if (offset < 0x200000/4)
4613	4613	logerror("%s:banshee_w(2D:%X) = %08X & %08X\n", device->machine().describe_context(), (offset*4) & 0xfffff, data, mem_mask);
4614	4614	else if (offset < 0x600000/4)
r17961	r17962
4780	4780	case io_vgac0:   case io_vgac4:   case io_vgac8:   case io_vgacc:
4781	4781	case io_vgad0:   case io_vgad4:   case io_vgad8:   case io_vgadc:
4782	4782	if (ACCESSING_BITS_0_7)
4783		banshee_vga_w(device, offset*4+0, data >> 0);
	4783	banshee_vga_w(device, space, offset*4+0, data >> 0, mem_mask >> 0);
4784	4784	if (ACCESSING_BITS_8_15)
4785		banshee_vga_w(device, offset*4+1, data >> 8);
	4785	banshee_vga_w(device, space, offset*4+1, data >> 8, mem_mask >> 8);
4786	4786	if (ACCESSING_BITS_16_23)
4787		banshee_vga_w(device, offset*4+2, data >> 16);
	4787	banshee_vga_w(device, space, offset*4+2, data >> 16, mem_mask >> 16);
4788	4788	if (ACCESSING_BITS_24_31)
4789		banshee_vga_w(device, offset*4+3, data >> 24);
	4789	banshee_vga_w(device, space, offset*4+3, data >> 24, mem_mask >> 24);
4790	4790	break;
4791	4791
4792	4792	default:

trunk/src/emu/video/voodoo.h

r17961	r17962
113	113	int voodoo_is_stalled(device_t *device);
114	114	void voodoo_set_init_enable(device_t *device, UINT32 newval);
115	115
116		READ32_DEVICE_HANDLER( voodoo_r );
117		WRITE32_DEVICE_HANDLER( voodoo_w );
	116	DECLARE_READ32_DEVICE_HANDLER( voodoo_r );
	117	DECLARE_WRITE32_DEVICE_HANDLER( voodoo_w );
118	118
119		READ32_DEVICE_HANDLER( banshee_r );
120		WRITE32_DEVICE_HANDLER( banshee_w );
121		READ32_DEVICE_HANDLER( banshee_fb_r );
122		WRITE32_DEVICE_HANDLER( banshee_fb_w );
123		READ32_DEVICE_HANDLER( banshee_io_r );
124		WRITE32_DEVICE_HANDLER( banshee_io_w );
125		READ32_DEVICE_HANDLER( banshee_rom_r );
	119	DECLARE_READ32_DEVICE_HANDLER( banshee_r );
	120	DECLARE_WRITE32_DEVICE_HANDLER( banshee_w );
	121	DECLARE_READ32_DEVICE_HANDLER( banshee_fb_r );
	122	DECLARE_WRITE32_DEVICE_HANDLER( banshee_fb_w );
	123	DECLARE_READ32_DEVICE_HANDLER( banshee_io_r );
	124	DECLARE_WRITE32_DEVICE_HANDLER( banshee_io_w );
	125	DECLARE_READ32_DEVICE_HANDLER( banshee_rom_r );
126	126
127	127
128	128	/* ----- device interface ----- */

trunk/src/emu/video/i8275.h

r17961	r17962
65	65	***************************************************************************/
66	66
67	67	/* register access */
68		READ8_DEVICE_HANDLER ( i8275_r );
69		WRITE8_DEVICE_HANDLER ( i8275_w );
	68	DECLARE_READ8_DEVICE_HANDLER ( i8275_r );
	69	DECLARE_WRITE8_DEVICE_HANDLER ( i8275_w );
70	70
71	71	/* updates the screen */
72	72	void i8275_update(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect);
73	73
74		WRITE8_DEVICE_HANDLER( i8275_dack_w );
	74	DECLARE_WRITE8_DEVICE_HANDLER( i8275_dack_w );
75	75
76	76	/***************************************************************************
77	77	DEVICE CONFIGURATION MACROS

trunk/src/emu/video/s2636.h

r17961	r17962
71	71	D3 indicates whether the S2636 drew this pixel - 0 = not drawn, 1 = drawn */
72	72
73	73	bitmap_ind16 &s2636_update( device_t *device, const rectangle &cliprect );
74		WRITE8_DEVICE_HANDLER( s2636_work_ram_w );
75		READ8_DEVICE_HANDLER( s2636_work_ram_r );
	74	DECLARE_WRITE8_DEVICE_HANDLER( s2636_work_ram_w );
	75	DECLARE_READ8_DEVICE_HANDLER( s2636_work_ram_r );
76	76
77	77
78	78	#endif /* __S2636_H__ */

trunk/src/emu/video/tms9927.c

r17961	r17962
73	73	}
74	74
75	75
76		static void generic_access(device_t *device, offs_t offset)
	76	static void generic_access(device_t *device, address_space &space, offs_t offset)
77	77	{
78	78	tms9927_state *tms = get_safe_token(device);
79	79
r17961	r17962
86	86	int cur;
87	87
88	88	for (cur = 0; cur < 7; cur++)
89		tms9927_w(device, cur, tms->selfload[cur]);
	89	tms9927_w(device, space, cur, tms->selfload[cur]);
90	90	for (cur = 0; cur < 1; cur++)
91		tms9927_w(device, cur + 0xc, tms->selfload[cur + 7]);
	91	tms9927_w(device, space, cur + 0xc, tms->selfload[cur + 7]);
92	92	}
93	93	else
94	94	popmessage("tms9927: self-load initiated with no PROM!");
r17961	r17962
149	149	break;
150	150
151	151	default:
152		generic_access(device, offset);
	152	generic_access(device, space, offset);
153	153	break;
154	154	}
155	155	}
r17961	r17962
166	166	return tms->reg[offset - 0x08 + 7];
167	167
168	168	default:
169		generic_access(device, offset);
	169	generic_access(device, space, offset);
170	170	break;
171	171	}
172	172	return 0xff;

trunk/src/emu/video/tms9927.h

r17961	r17962
84	84
85	85
86	86	/* basic read/write handlers */
87		WRITE8_DEVICE_HANDLER( tms9927_w );
88		READ8_DEVICE_HANDLER( tms9927_r );
	87	DECLARE_WRITE8_DEVICE_HANDLER( tms9927_w );
	88	DECLARE_READ8_DEVICE_HANDLER( tms9927_r );
89	89
90	90	/* other queries */
91	91	int tms9927_screen_reset(device_t *device);

trunk/src/emu/video/pc_vga.h

r17961	r17962
99	99	WRITE8_HANDLER(s3_mem_w);
100	100
101	101	READ8_HANDLER( ati_port_03c0_r );
102		READ8_DEVICE_HANDLER(ati_port_ext_r);
103		WRITE8_DEVICE_HANDLER(ati_port_ext_w);
	102	DECLARE_READ8_DEVICE_HANDLER(ati_port_ext_r);
	103	DECLARE_WRITE8_DEVICE_HANDLER(ati_port_ext_w);
104	104	READ16_HANDLER(ibm8514_gpstatus_r);
105	105	WRITE16_HANDLER(ibm8514_cmd_w);
106	106	READ16_HANDLER(mach8_ext_fifo_r);

trunk/src/emu/devcb.h

r17961	r17962
109	109
110	110	// static template for a read8 stub function that calls through a given READ8_MEMBER
111	111	template<class _Class, UINT8 (_Class::*_Function)(address_space &, offs_t, UINT8)>
112		UINT8 devcb_stub(device_t *device, offs_t offset)
	112	UINT8 devcb_stub(device_t *device, address_space &space, offs_t offset, UINT8 mem_mask)
113	113	{
114	114	_Class *target = downcast<_Class *>(device);
115		return (target->*_Function)(*device->machine().memory().first_space(), offset, 0xff);
	115	return (target->*_Function)(space, offset, mem_mask);
116	116	}
117	117
118	118	// static template for a read16 stub function that calls through a given READ16_MEMBER
119	119	template<class _Class, UINT16 (_Class::*_Function)(address_space &, offs_t, UINT16)>
120		UINT16 devcb_stub16(device_t *device, offs_t offset, UINT16 mask)
	120	UINT16 devcb_stub16(device_t *device, address_space &space, offs_t offset, UINT16 mem_mask)
121	121	{
122	122	_Class *target = downcast<_Class *>(device);
123		return (target->*_Function)(*device->machine().memory().first_space(), offset, mask);
	123	return (target->*_Function)(space, offset, mem_mask);
124	124	}
125	125
126	126	// static template for a write_line stub function that calls through a given WRITE_LINE_MEMBER
r17961	r17962
133	133
134	134	// static template for a write8 stub function that calls through a given WRITE8_MEMBER
135	135	template<class _Class, void (_Class::*_Function)(address_space &, offs_t, UINT8, UINT8)>
136		void devcb_stub(device_t *device, offs_t offset, UINT8 data)
	136	void devcb_stub(device_t *device, address_space &space, offs_t offset, UINT8 data, UINT8 mem_mask)
137	137	{
138	138	_Class *target = downcast<_Class *>(device);
139		(target->*_Function)(*device->machine().memory().first_space(), offset, data, 0xff);
	139	(target->*_Function)(space, offset, data, mem_mask);
140	140	}
141	141
142	142	// static template for a write16 stub function that calls through a given WRITE16_MEMBER
143	143	template<class _Class, void (_Class::*_Function)(address_space &, offs_t, UINT16, UINT16)>
144		void devcb_stub16(device_t *device, offs_t offset, UINT16 data, UINT16 mask)
	144	void devcb_stub16(device_t *device, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
145	145	{
146	146	_Class *target = downcast<_Class *>(device);
147		(target->*_Function)(*device->machine().memory().first_space(), offset, data, mask);
	147	(target->*_Function)(space, offset, data, mem_mask);
148	148	}
149	149
150	150	#define DEVCB_NULL                        { DEVCB_TYPE_NULL }
r17961	r17962
374	374	private:
375	375	// internal helpers
376	376	UINT8 from_port(offs_t offset);
	377	UINT8 from_read8(offs_t offset);
377	378	UINT8 from_readline(offs_t offset);
378	379	UINT8 from_constant(offs_t offset);
379	380
r17961	r17962
424	425	// internal helpers
425	426	void to_null(offs_t offset, UINT8 data);
426	427	void to_port(offs_t offset, UINT8 data);
	428	void to_write8(offs_t offset, UINT8 data);
427	429	void to_writeline(offs_t offset, UINT8 data);
428	430	void to_input(offs_t offset, UINT8 data);
429	431
r17961	r17962
473	475	private:
474	476	// internal helpers
475	477	UINT16 from_port(offs_t offset, UINT16 mask);
	478	UINT16 from_read16(offs_t offset, UINT16 mask);
476	479	UINT16 from_readline(offs_t offset, UINT16 mask);
477	480	UINT16 from_constant(offs_t offset, UINT16 mask);
478	481
r17961	r17962
523	526	// internal helpers
524	527	void to_null(offs_t offset, UINT16 data, UINT16 mask);
525	528	void to_port(offs_t offset, UINT16 data, UINT16 mask);
	529	void to_write16(offs_t offset, UINT16 data, UINT16 mask);
526	530	void to_writeline(offs_t offset, UINT16 data, UINT16 mask);
527	531	void to_input(offs_t offset, UINT16 data, UINT16 mask);
528	532

trunk/src/emu/sound/es8712.h

r17961	r17962
11	11	void es8712_set_bank_base(device_t *device, int base);
12	12	void es8712_set_frequency(device_t *device, int frequency);
13	13
14		WRITE8_DEVICE_HANDLER( es8712_w );
	14	DECLARE_WRITE8_DEVICE_HANDLER( es8712_w );
15	15
16	16	class es8712_device : public device_t,
17	17	public device_sound_interface

trunk/src/emu/sound/sp0256.c

r17961	r17962
1317	1317
1318	1318	if( offset == 0 )
1319	1319	{
1320		sp0256_ALD_w( device, 0, data & 0xff );
	1320	sp0256_ALD_w( device, space, 0, data & 0xff );
1321	1321	return;
1322	1322	}
1323	1323

trunk/src/emu/sound/nes_apu.h

r17961	r17962
42	42	const char *cpu_tag;  /* CPU tag */
43	43	};
44	44
45		READ8_DEVICE_HANDLER( nes_psg_r );
46		WRITE8_DEVICE_HANDLER( nes_psg_w );
	45	DECLARE_READ8_DEVICE_HANDLER( nes_psg_r );
	46	DECLARE_WRITE8_DEVICE_HANDLER( nes_psg_w );
47	47
48	48	class nesapu_device : public device_t,
49	49	public device_sound_interface

trunk/src/emu/sound/262intf.h

r17961	r17962
12	12	};
13	13
14	14
15		READ8_DEVICE_HANDLER( ymf262_r );
16		WRITE8_DEVICE_HANDLER( ymf262_w );
	15	DECLARE_READ8_DEVICE_HANDLER( ymf262_r );
	16	DECLARE_WRITE8_DEVICE_HANDLER( ymf262_w );
17	17
18		READ8_DEVICE_HANDLER ( ymf262_status_r );
19		WRITE8_DEVICE_HANDLER( ymf262_register_a_w );
20		WRITE8_DEVICE_HANDLER( ymf262_register_b_w );
21		WRITE8_DEVICE_HANDLER( ymf262_data_a_w );
22		WRITE8_DEVICE_HANDLER( ymf262_data_b_w );
	18	DECLARE_READ8_DEVICE_HANDLER ( ymf262_status_r );
	19	DECLARE_WRITE8_DEVICE_HANDLER( ymf262_register_a_w );
	20	DECLARE_WRITE8_DEVICE_HANDLER( ymf262_register_b_w );
	21	DECLARE_WRITE8_DEVICE_HANDLER( ymf262_data_a_w );
	22	DECLARE_WRITE8_DEVICE_HANDLER( ymf262_data_b_w );
23	23
24	24
25	25	class ymf262_device : public device_t,

trunk/src/emu/sound/sp0256.h

r17961	r17962
62	62
63	63	void sp0256_set_clock(device_t *device, int clock);
64	64
65		WRITE8_DEVICE_HANDLER( sp0256_ALD_w );
	65	DECLARE_WRITE8_DEVICE_HANDLER( sp0256_ALD_w );
66	66
67	67	READ_LINE_DEVICE_HANDLER( sp0256_lrq_r );
68	68	READ_LINE_DEVICE_HANDLER( sp0256_sby_r );
69	69
70		READ16_DEVICE_HANDLER( spb640_r );
71		WRITE16_DEVICE_HANDLER( spb640_w );
	70	DECLARE_READ16_DEVICE_HANDLER( spb640_r );
	71	DECLARE_WRITE16_DEVICE_HANDLER( spb640_w );
72	72
73	73	class sp0256_device : public device_t,
74	74	public device_sound_interface

trunk/src/emu/sound/2612intf.c

r17961	r17962
146	146	}
147	147
148	148
149		READ8_DEVICE_HANDLER( ym2612_status_port_a_r ) { return ym2612_r(device, 0); }
150		READ8_DEVICE_HANDLER( ym2612_status_port_b_r ) { return ym2612_r(device, 2); }
151		READ8_DEVICE_HANDLER( ym2612_data_port_a_r ) { return ym2612_r(device, 1); }
152		READ8_DEVICE_HANDLER( ym2612_data_port_b_r ) { return ym2612_r(device, 3); }
	149	READ8_DEVICE_HANDLER( ym2612_status_port_a_r ) { return ym2612_r(device, space, 0); }
	150	READ8_DEVICE_HANDLER( ym2612_status_port_b_r ) { return ym2612_r(device, space, 2); }
	151	READ8_DEVICE_HANDLER( ym2612_data_port_a_r ) { return ym2612_r(device, space, 1); }
	152	READ8_DEVICE_HANDLER( ym2612_data_port_b_r ) { return ym2612_r(device, space, 3); }
153	153
154		WRITE8_DEVICE_HANDLER( ym2612_control_port_a_w ) { ym2612_w(device, 0, data); }
155		WRITE8_DEVICE_HANDLER( ym2612_control_port_b_w ) { ym2612_w(device, 2, data); }
156		WRITE8_DEVICE_HANDLER( ym2612_data_port_a_w ) { ym2612_w(device, 1, data); }
157		WRITE8_DEVICE_HANDLER( ym2612_data_port_b_w ) { ym2612_w(device, 3, data); }
	154	WRITE8_DEVICE_HANDLER( ym2612_control_port_a_w ) { ym2612_w(device, space, 0, data); }
	155	WRITE8_DEVICE_HANDLER( ym2612_control_port_b_w ) { ym2612_w(device, space, 2, data); }
	156	WRITE8_DEVICE_HANDLER( ym2612_data_port_a_w ) { ym2612_w(device, space, 1, data); }
	157	WRITE8_DEVICE_HANDLER( ym2612_data_port_b_w ) { ym2612_w(device, space, 3, data); }
158	158
159	159	const device_type YM2612 = &device_creator<ym2612_device>;
160	160

trunk/src/emu/sound/iremga20.h

r17961	r17962
10	10
11	11	#include "devlegcy.h"
12	12
13		WRITE8_DEVICE_HANDLER( irem_ga20_w );
14		READ8_DEVICE_HANDLER( irem_ga20_r );
	13	DECLARE_WRITE8_DEVICE_HANDLER( irem_ga20_w );
	14	DECLARE_READ8_DEVICE_HANDLER( irem_ga20_r );
15	15
16	16	class iremga20_device : public device_t,
17	17	public device_sound_interface

trunk/src/emu/sound/tms5110.h

r17961	r17962
38	38	devcb_write_line romclk_func;   /* rom clock - Only used to drive the data lines */
39	39	};
40	40
41		WRITE8_DEVICE_HANDLER( tms5110_ctl_w );
42		READ8_DEVICE_HANDLER( tms5110_ctl_r );
	41	DECLARE_WRITE8_DEVICE_HANDLER( tms5110_ctl_w );
	42	DECLARE_READ8_DEVICE_HANDLER( tms5110_ctl_r );
43	43	WRITE_LINE_DEVICE_HANDLER( tms5110_pdc_w );
44	44
45	45	/* this is only used by cvs.c
46	46	* it is not related at all to the speech generation
47	47	* and conflicts with the new rom controller interface.
48	48	*/
49		READ8_DEVICE_HANDLER( tms5110_romclk_hack_r );
	49	DECLARE_READ8_DEVICE_HANDLER( tms5110_romclk_hack_r );
50	50
51	51	/* m58817 status line */
52		READ8_DEVICE_HANDLER( m58817_status_r );
	52	DECLARE_READ8_DEVICE_HANDLER( m58817_status_r );
53	53
54	54	int tms5110_ready_r(device_t *device);
55	55
r17961	r17962
188	188	READ_LINE_DEVICE_HANDLER( tmsprom_data_r );
189	189
190	190	/* offset is rom # */
191		WRITE8_DEVICE_HANDLER( tmsprom_rom_csq_w );
192		WRITE8_DEVICE_HANDLER( tmsprom_bit_w );
	191	DECLARE_WRITE8_DEVICE_HANDLER( tmsprom_rom_csq_w );
	192	DECLARE_WRITE8_DEVICE_HANDLER( tmsprom_bit_w );
193	193	WRITE_LINE_DEVICE_HANDLER( tmsprom_enable_w );
194	194
195	195	class tmsprom_device : public device_t

trunk/src/emu/sound/3526intf.c

r17961	r17962
138	138	ym3526_write(info->chip, offset & 1, data);
139	139	}
140	140
141		READ8_DEVICE_HANDLER( ym3526_status_port_r ) { return ym3526_r(device, 0); }
142		READ8_DEVICE_HANDLER( ym3526_read_port_r ) { return ym3526_r(device, 1); }
143		WRITE8_DEVICE_HANDLER( ym3526_control_port_w ) { ym3526_w(device, 0, data); }
144		WRITE8_DEVICE_HANDLER( ym3526_write_port_w ) { ym3526_w(device, 1, data); }
	141	READ8_DEVICE_HANDLER( ym3526_status_port_r ) { return ym3526_r(device, space, 0); }
	142	READ8_DEVICE_HANDLER( ym3526_read_port_r ) { return ym3526_r(device, space, 1); }
	143	WRITE8_DEVICE_HANDLER( ym3526_control_port_w ) { ym3526_w(device, space, 0, data); }
	144	WRITE8_DEVICE_HANDLER( ym3526_write_port_w ) { ym3526_w(device, space, 1, data); }
145	145
146	146
147	147	const device_type YM3526 = &device_creator<ym3526_device>;

trunk/src/emu/sound/2612intf.h

r17961	r17962
12	12	void (*handler)(device_t *device, int irq);
13	13	};
14	14
15		READ8_DEVICE_HANDLER( ym2612_r );
16		WRITE8_DEVICE_HANDLER( ym2612_w );
	15	DECLARE_READ8_DEVICE_HANDLER( ym2612_r );
	16	DECLARE_WRITE8_DEVICE_HANDLER( ym2612_w );
17	17
18		READ8_DEVICE_HANDLER( ym2612_status_port_a_r );
19		READ8_DEVICE_HANDLER( ym2612_status_port_b_r );
20		READ8_DEVICE_HANDLER( ym2612_data_port_a_r );
21		READ8_DEVICE_HANDLER( ym2612_data_port_b_r );
	18	DECLARE_READ8_DEVICE_HANDLER( ym2612_status_port_a_r );
	19	DECLARE_READ8_DEVICE_HANDLER( ym2612_status_port_b_r );
	20	DECLARE_READ8_DEVICE_HANDLER( ym2612_data_port_a_r );
	21	DECLARE_READ8_DEVICE_HANDLER( ym2612_data_port_b_r );
22	22
23		WRITE8_DEVICE_HANDLER( ym2612_control_port_a_w );
24		WRITE8_DEVICE_HANDLER( ym2612_control_port_b_w );
25		WRITE8_DEVICE_HANDLER( ym2612_data_port_a_w );
26		WRITE8_DEVICE_HANDLER( ym2612_data_port_b_w );
	23	DECLARE_WRITE8_DEVICE_HANDLER( ym2612_control_port_a_w );
	24	DECLARE_WRITE8_DEVICE_HANDLER( ym2612_control_port_b_w );
	25	DECLARE_WRITE8_DEVICE_HANDLER( ym2612_data_port_a_w );
	26	DECLARE_WRITE8_DEVICE_HANDLER( ym2612_data_port_b_w );
27	27
28	28
29	29	class ym2612_device : public device_t,

trunk/src/emu/sound/k051649.c

r17961	r17962
276	276	READ8_DEVICE_HANDLER ( k051649_test_r )
277	277	{
278	278	/* reading the test register sets it to $ff! */
279		k051649_test_w(device, offset, 0xff);
	279	k051649_test_w(device, space, offset, 0xff);
280	280	return 0xff;
281	281	}
282	282

trunk/src/emu/sound/3526intf.h

r17961	r17962
10	10	devcb_write_line out_int_func;
11	11	};
12	12
13		READ8_DEVICE_HANDLER( ym3526_r );
14		WRITE8_DEVICE_HANDLER( ym3526_w );
	13	DECLARE_READ8_DEVICE_HANDLER( ym3526_r );
	14	DECLARE_WRITE8_DEVICE_HANDLER( ym3526_w );
15	15
16		READ8_DEVICE_HANDLER( ym3526_status_port_r );
17		READ8_DEVICE_HANDLER( ym3526_read_port_r );
18		WRITE8_DEVICE_HANDLER( ym3526_control_port_w );
19		WRITE8_DEVICE_HANDLER( ym3526_write_port_w );
	16	DECLARE_READ8_DEVICE_HANDLER( ym3526_status_port_r );
	17	DECLARE_READ8_DEVICE_HANDLER( ym3526_read_port_r );
	18	DECLARE_WRITE8_DEVICE_HANDLER( ym3526_control_port_w );
	19	DECLARE_WRITE8_DEVICE_HANDLER( ym3526_write_port_w );
20	20
21	21	class ym3526_device : public device_t,
22	22	public device_sound_interface

trunk/src/emu/sound/k051649.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( k051649_waveform_w );
9		READ8_DEVICE_HANDLER ( k051649_waveform_r );
10		WRITE8_DEVICE_HANDLER( k051649_volume_w );
11		WRITE8_DEVICE_HANDLER( k051649_frequency_w );
12		WRITE8_DEVICE_HANDLER( k051649_keyonoff_w );
13		WRITE8_DEVICE_HANDLER( k051649_test_w );
14		READ8_DEVICE_HANDLER ( k051649_test_r );
	8	DECLARE_WRITE8_DEVICE_HANDLER( k051649_waveform_w );
	9	DECLARE_READ8_DEVICE_HANDLER ( k051649_waveform_r );
	10	DECLARE_WRITE8_DEVICE_HANDLER( k051649_volume_w );
	11	DECLARE_WRITE8_DEVICE_HANDLER( k051649_frequency_w );
	12	DECLARE_WRITE8_DEVICE_HANDLER( k051649_keyonoff_w );
	13	DECLARE_WRITE8_DEVICE_HANDLER( k051649_test_w );
	14	DECLARE_READ8_DEVICE_HANDLER ( k051649_test_r );
15	15
16		WRITE8_DEVICE_HANDLER( k052539_waveform_w );
17		READ8_DEVICE_HANDLER ( k052539_waveform_r );
	16	DECLARE_WRITE8_DEVICE_HANDLER( k052539_waveform_w );
	17	DECLARE_READ8_DEVICE_HANDLER ( k052539_waveform_r );
18	18
19	19	class k051649_device : public device_t,
20	20	public device_sound_interface

trunk/src/emu/sound/c140.h

r17961	r17962
7	7
8	8	#include "devlegcy.h"
9	9
10		READ8_DEVICE_HANDLER( c140_r );
11		WRITE8_DEVICE_HANDLER( c140_w );
	10	DECLARE_READ8_DEVICE_HANDLER( c140_r );
	11	DECLARE_WRITE8_DEVICE_HANDLER( c140_w );
12	12
13	13	void c140_set_base(device_t *device, void *base);
14	14

trunk/src/emu/sound/3812intf.c

r17961	r17962
134	134	ym3812_write(info->chip, offset & 1, data);
135	135	}
136	136
137		READ8_DEVICE_HANDLER( ym3812_status_port_r ) { return ym3812_r(device, 0); }
138		READ8_DEVICE_HANDLER( ym3812_read_port_r ) { return ym3812_r(device, 1); }
139		WRITE8_DEVICE_HANDLER( ym3812_control_port_w ) { ym3812_w(device, 0, data); }
140		WRITE8_DEVICE_HANDLER( ym3812_write_port_w ) { ym3812_w(device, 1, data); }
	137	READ8_DEVICE_HANDLER( ym3812_status_port_r ) { return ym3812_r(device, space, 0); }
	138	READ8_DEVICE_HANDLER( ym3812_read_port_r ) { return ym3812_r(device, space, 1); }
	139	WRITE8_DEVICE_HANDLER( ym3812_control_port_w ) { ym3812_w(device, space, 0, data); }
	140	WRITE8_DEVICE_HANDLER( ym3812_write_port_w ) { ym3812_w(device, space, 1, data); }
141	141
142	142
143	143	const device_type YM3812 = &device_creator<ym3812_device>;

trunk/src/emu/sound/qsound.h

r17961	r17962
13	13
14	14	#define QSOUND_CLOCK    4000000   /* default 4MHz clock */
15	15
16		WRITE8_DEVICE_HANDLER( qsound_w );
17		READ8_DEVICE_HANDLER( qsound_r );
	16	DECLARE_WRITE8_DEVICE_HANDLER( qsound_w );
	17	DECLARE_READ8_DEVICE_HANDLER( qsound_r );
18	18
19	19	class qsound_device : public device_t,
20	20	public device_sound_interface

trunk/src/emu/sound/3812intf.h

r17961	r17962
10	10	void (*handler)(device_t *device, int linestate);
11	11	};
12	12
13		READ8_DEVICE_HANDLER( ym3812_r );
14		WRITE8_DEVICE_HANDLER( ym3812_w );
	13	DECLARE_READ8_DEVICE_HANDLER( ym3812_r );
	14	DECLARE_WRITE8_DEVICE_HANDLER( ym3812_w );
15	15
16		READ8_DEVICE_HANDLER( ym3812_status_port_r );
17		READ8_DEVICE_HANDLER( ym3812_read_port_r );
18		WRITE8_DEVICE_HANDLER( ym3812_control_port_w );
19		WRITE8_DEVICE_HANDLER( ym3812_write_port_w );
	16	DECLARE_READ8_DEVICE_HANDLER( ym3812_status_port_r );
	17	DECLARE_READ8_DEVICE_HANDLER( ym3812_read_port_r );
	18	DECLARE_WRITE8_DEVICE_HANDLER( ym3812_control_port_w );
	19	DECLARE_WRITE8_DEVICE_HANDLER( ym3812_write_port_w );
20	20
21	21	class ym3812_device : public device_t,
22	22	public device_sound_interface

trunk/src/emu/sound/snkwave.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( snkwave_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( snkwave_w );
9	9
10	10	class snkwave_device : public device_t,
11	11	public device_sound_interface

trunk/src/emu/sound/rf5c400.h

r17961	r17962
7	7
8	8	#include "devlegcy.h"
9	9
10		READ16_DEVICE_HANDLER( rf5c400_r );
11		WRITE16_DEVICE_HANDLER( rf5c400_w );
	10	DECLARE_READ16_DEVICE_HANDLER( rf5c400_r );
	11	DECLARE_WRITE16_DEVICE_HANDLER( rf5c400_w );
12	12
13	13	class rf5c400_device : public device_t,
14	14	public device_sound_interface

trunk/src/emu/sound/saa1099.h

r17961	r17962
9	9	Philips SAA1099 Sound driver
10	10	**********************************************/
11	11
12		WRITE8_DEVICE_HANDLER( saa1099_control_w );
13		WRITE8_DEVICE_HANDLER( saa1099_data_w );
	12	DECLARE_WRITE8_DEVICE_HANDLER( saa1099_control_w );
	13	DECLARE_WRITE8_DEVICE_HANDLER( saa1099_data_w );
14	14
15	15	class saa1099_device : public device_t,
16	16	public device_sound_interface

trunk/src/emu/sound/digitalk.h

r17961	r17962
7	7	void digitalker_0_cms_w(device_t *device, int line);
8	8	void digitalker_0_wr_w(device_t *device, int line);
9	9	int digitalker_0_intr_r(device_t *device);
10		WRITE8_DEVICE_HANDLER(digitalker_data_w);
	10	DECLARE_WRITE8_DEVICE_HANDLER(digitalker_data_w);
11	11
12	12	class digitalker_device : public device_t,
13	13	public device_sound_interface

trunk/src/emu/sound/ymz280b.h

r17961	r17962
20	20	devcb_write8 ext_write;      /* external RAM write */
21	21	};
22	22
23		READ8_DEVICE_HANDLER ( ymz280b_r );
24		WRITE8_DEVICE_HANDLER( ymz280b_w );
	23	DECLARE_READ8_DEVICE_HANDLER ( ymz280b_r );
	24	DECLARE_WRITE8_DEVICE_HANDLER( ymz280b_w );
25	25
26	26	class ymz280b_device : public device_t,
27	27	public device_sound_interface

trunk/src/emu/sound/rf5c68.h

r17961	r17962
10	10	#include "devlegcy.h"
11	11
12	12	/******************************************/
13		READ8_DEVICE_HANDLER( rf5c68_r );
14		WRITE8_DEVICE_HANDLER( rf5c68_w );
	13	DECLARE_READ8_DEVICE_HANDLER( rf5c68_r );
	14	DECLARE_WRITE8_DEVICE_HANDLER( rf5c68_w );
15	15
16		READ8_DEVICE_HANDLER( rf5c68_mem_r );
17		WRITE8_DEVICE_HANDLER( rf5c68_mem_w );
	16	DECLARE_READ8_DEVICE_HANDLER( rf5c68_mem_r );
	17	DECLARE_WRITE8_DEVICE_HANDLER( rf5c68_mem_w );
18	18
19	19	struct rf5c68_interface
20	20	{

trunk/src/emu/sound/k005289.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( k005289_control_A_w );
9		WRITE8_DEVICE_HANDLER( k005289_control_B_w );
10		WRITE8_DEVICE_HANDLER( k005289_pitch_A_w );
11		WRITE8_DEVICE_HANDLER( k005289_pitch_B_w );
12		WRITE8_DEVICE_HANDLER( k005289_keylatch_A_w );
13		WRITE8_DEVICE_HANDLER( k005289_keylatch_B_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( k005289_control_A_w );
	9	DECLARE_WRITE8_DEVICE_HANDLER( k005289_control_B_w );
	10	DECLARE_WRITE8_DEVICE_HANDLER( k005289_pitch_A_w );
	11	DECLARE_WRITE8_DEVICE_HANDLER( k005289_pitch_B_w );
	12	DECLARE_WRITE8_DEVICE_HANDLER( k005289_keylatch_A_w );
	13	DECLARE_WRITE8_DEVICE_HANDLER( k005289_keylatch_B_w );
14	14
15	15	class k005289_device : public device_t,
16	16	public device_sound_interface

trunk/src/emu/sound/aica.c

r17961	r17962
681	681	}
682	682	}
683	683
684		static void AICA_UpdateReg(aica_state *AICA, int reg)
	684	static void AICA_UpdateReg(aica_state *AICA, address_space &space, int reg)
685	685	{
686	686	switch(reg&0xff)
687	687	{
r17961	r17962
702	702	break;
703	703	case 0x8:
704	704	case 0x9:
705		aica_midi_in(AICA->device, 0, AICA->udata.data[0x8/2]&0xff, 0xffff);
	705	aica_midi_in(AICA->device, space, 0, AICA->udata.data[0x8/2]&0xff, 0xffff);
706	706	break;
707	707	case 0x12:
708	708	case 0x13:
r17961	r17962
823	823
824	824	}
825	825
826		static void AICA_UpdateRegR(aica_state *AICA, int reg)
	826	static void AICA_UpdateRegR(aica_state *AICA, address_space &space, int reg)
827	827	{
828	828	switch(reg&0xff)
829	829	{
r17961	r17962
894	894	}
895	895	}
896	896
897		static void AICA_w16(aica_state *AICA,unsigned int addr,unsigned short val)
	897	static void AICA_w16(aica_state *AICA,address_space &space,unsigned int addr,unsigned short val)
898	898	{
899	899	addr&=0xffff;
900	900	if(addr<0x2000)
r17961	r17962
919	919	{
920	920	//          printf("%x to AICA global @ %x\n", val, addr & 0xff);
921	921	*((unsigned short *) (AICA->udata.datab+((addr&0xff)))) = val;
922		AICA_UpdateReg(AICA, addr&0xff);
	922	AICA_UpdateReg(AICA, space, addr&0xff);
923	923	}
924	924	else if (addr == 0x2d00)
925	925	{
r17961	r17962
954	954	}
955	955	}
956	956
957		static unsigned short AICA_r16(aica_state *AICA, unsigned int addr)
	957	static unsigned short AICA_r16(aica_state *AICA, address_space &space, unsigned int addr)
958	958	{
959	959	unsigned short v=0;
960	960	addr&=0xffff;
r17961	r17962
973	973	}
974	974	else if (addr < 0x28be)
975	975	{
976		AICA_UpdateRegR(AICA, addr&0xff);
	976	AICA_UpdateRegR(AICA, space, addr&0xff);
977	977	v= *((unsigned short *) (AICA->udata.datab+((addr&0xff))));
978	978	if((addr&0xfffe)==0x2810) AICA->udata.data[0x10/2] &= 0x7FFF;   // reset LP on read
979	979	}
r17961	r17962
1323	1323	READ16_DEVICE_HANDLER( aica_r )
1324	1324	{
1325	1325	aica_state *AICA = get_safe_token(device);
1326		return AICA_r16(AICA, offset*2);
	1326	return AICA_r16(AICA, space,offset*2);
1327	1327	}
1328	1328
1329	1329	WRITE16_DEVICE_HANDLER( aica_w )
r17961	r17962
1331	1331	aica_state *AICA = get_safe_token(device);
1332	1332	UINT16 tmp;
1333	1333
1334		tmp = AICA_r16(AICA, offset*2);
	1334	tmp = AICA_r16(AICA, space, offset*2);
1335	1335	COMBINE_DATA(&tmp);
1336		AICA_w16(AICA, offset*2, tmp);
	1336	AICA_w16(AICA, space, offset*2, tmp);
1337	1337	}
1338	1338
1339	1339	WRITE16_DEVICE_HANDLER( aica_midi_in )

trunk/src/emu/sound/aica.h

r17961	r17962
18	18	void aica_set_ram_base(device_t *device, void *base, int size);
19	19
20	20	// AICA register access
21		READ16_DEVICE_HANDLER( aica_r );
22		WRITE16_DEVICE_HANDLER( aica_w );
	21	DECLARE_READ16_DEVICE_HANDLER( aica_r );
	22	DECLARE_WRITE16_DEVICE_HANDLER( aica_w );
23	23
24	24	// MIDI I/O access
25		WRITE16_DEVICE_HANDLER( aica_midi_in );
26		READ16_DEVICE_HANDLER( aica_midi_out_r );
	25	DECLARE_WRITE16_DEVICE_HANDLER( aica_midi_in );
	26	DECLARE_READ16_DEVICE_HANDLER( aica_midi_out_r );
27	27
28	28	class aica_device : public device_t,
29	29	public device_sound_interface

trunk/src/emu/sound/sn76496.h

r17961	r17962
6	6	#include "devlegcy.h"
7	7
8	8	READ_LINE_DEVICE_HANDLER( sn76496_ready_r );
9		WRITE8_DEVICE_HANDLER( sn76496_w );
10		WRITE8_DEVICE_HANDLER( sn76496_stereo_w );
	9	DECLARE_WRITE8_DEVICE_HANDLER( sn76496_w );
	10	DECLARE_WRITE8_DEVICE_HANDLER( sn76496_stereo_w );
11	11
12	12	class sn76496_device : public device_t,
13	13	public device_sound_interface

trunk/src/emu/sound/x1_010.c

r17961	r17962
269	269	UINT16   ret;
270	270
271	271	ret = info->HI_WORD_BUF[offset]<<8;
272		ret += (seta_sound_r( device, offset )&0xff);
	272	ret += (seta_sound_r( device, space, offset )&0xff);
273	273	LOG_REGISTER_READ(( "%s: Read X1-010 Offset:%04X Data:%04X\n", device->machine().describe_context(), offset, ret ));
274	274	return ret;
275	275	}
r17961	r17962
278	278	{
279	279	x1_010_state *info = get_safe_token(device);
280	280	info->HI_WORD_BUF[offset] = (data>>8)&0xff;
281		seta_sound_w( device, offset, data&0xff );
	281	seta_sound_w( device, space, offset, data&0xff );
282	282	LOG_REGISTER_WRITE(( "%s: Write X1-010 Offset:%04X Data:%04X\n", device->machine().describe_context(), offset, data ));
283	283	}
284	284

trunk/src/emu/sound/astrocde.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( astrocade_sound_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( astrocade_sound_w );
9	9
10	10	class astrocade_device : public device_t,
11	11	public device_sound_interface

trunk/src/emu/sound/x1_010.h

r17961	r17962
12	12	};
13	13
14	14
15		READ8_DEVICE_HANDLER ( seta_sound_r );
16		WRITE8_DEVICE_HANDLER( seta_sound_w );
	15	DECLARE_READ8_DEVICE_HANDLER ( seta_sound_r );
	16	DECLARE_WRITE8_DEVICE_HANDLER( seta_sound_w );
17	17
18		READ16_DEVICE_HANDLER ( seta_sound_word_r );
19		WRITE16_DEVICE_HANDLER( seta_sound_word_w );
	18	DECLARE_READ16_DEVICE_HANDLER ( seta_sound_word_r );
	19	DECLARE_WRITE16_DEVICE_HANDLER( seta_sound_word_w );
20	20
21	21	void seta_sound_enable_w(device_t *device, int data);
22	22

trunk/src/emu/sound/k056800.h

r17961	r17962
57	57	DEVICE I/O FUNCTIONS
58	58	***************************************************************************/
59	59
60		READ32_DEVICE_HANDLER( k056800_host_r );
61		WRITE32_DEVICE_HANDLER( k056800_host_w );
62		READ16_DEVICE_HANDLER( k056800_sound_r );
63		WRITE16_DEVICE_HANDLER( k056800_sound_w );
	60	DECLARE_READ32_DEVICE_HANDLER( k056800_host_r );
	61	DECLARE_WRITE32_DEVICE_HANDLER( k056800_host_w );
	62	DECLARE_READ16_DEVICE_HANDLER( k056800_sound_r );
	63	DECLARE_WRITE16_DEVICE_HANDLER( k056800_sound_w );
64	64
65	65
66	66	#endif /* __K056800_H__ */

trunk/src/emu/sound/upd7759.h

r17961	r17962
25	25	void upd7759_reset_w(device_t *device, UINT8 data);
26	26	void upd7759_start_w(device_t *device, UINT8 data);
27	27	int upd7759_busy_r(device_t *device);
28		WRITE8_DEVICE_HANDLER( upd7759_port_w );
	28	DECLARE_WRITE8_DEVICE_HANDLER( upd7759_port_w );
29	29
30	30	class upd7759_device : public device_t,
31	31	public device_sound_interface

trunk/src/emu/sound/ymf271.h

r17961	r17962
13	13	void (*irq_callback)(device_t *device, int state);   /* irq callback */
14	14	};
15	15
16		READ8_DEVICE_HANDLER( ymf271_r );
17		WRITE8_DEVICE_HANDLER( ymf271_w );
	16	DECLARE_READ8_DEVICE_HANDLER( ymf271_r );
	17	DECLARE_WRITE8_DEVICE_HANDLER( ymf271_w );
18	18
19	19	class ymf271_device : public device_t,
20	20	public device_sound_interface

trunk/src/emu/sound/n63701x.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( namco_63701x_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( namco_63701x_w );
9	9
10	10	class namco_63701x_device : public device_t,
11	11	public device_sound_interface

trunk/src/emu/sound/ay8910.c

r17961	r17962
1000	1000	#if ENABLE_REGISTER_TEST
1001	1001	return;
1002	1002	#else
1003		ay8910_data_address_w(device, 1, data);
	1003	ay8910_data_address_w(device, space, 1, data);
1004	1004	#endif
1005	1005	}
1006	1006
r17961	r17962
1009	1009	#if ENABLE_REGISTER_TEST
1010	1010	return;
1011	1011	#else
1012		ay8910_data_address_w(device, 0, data);
	1012	ay8910_data_address_w(device, space, 0, data);
1013	1013	#endif
1014	1014	}
1015	1015
r17961	r17962
1023	1023	READ8_DEVICE_HANDLER( ay8914_r )
1024	1024	{
1025	1025	UINT16 rv;
1026		ay8910_address_w(device, 0, mapping8914to8910[offset & 0xff]);
1027		rv = (UINT16)ay8910_r(device, 0);
	1026	ay8910_address_w(device, space, 0, mapping8914to8910[offset & 0xff]);
	1027	rv = (UINT16)ay8910_r(device, space, 0);
1028	1028	return rv;
1029	1029	}
1030	1030
1031	1031	WRITE8_DEVICE_HANDLER( ay8914_w )
1032	1032	{
1033		ay8910_address_w(device, 0, mapping8914to8910[offset & 0xff]);
1034		ay8910_data_w(device, 0, data & 0xff);
	1033	ay8910_address_w(device, space, 0, mapping8914to8910[offset & 0xff]);
	1034	ay8910_data_w(device, space, 0, data & 0xff);
1035	1035	}
1036	1036
1037	1037

trunk/src/emu/sound/ym2151.c

r17961	r17962
163	163	UINT32      noise_tab[32];         /* 17bit Noise Generator periods */
164	164
165	165	void (*irqhandler)(device_t *device, int irq);      /* IRQ function handler */
166		write8_device_func porthandler;      /* port write function handler */
	166	void (*porthandler)(device_t *, offs_t, UINT8);      /* port write function handler */
167	167
168	168	device_t *device;
169	169	unsigned int clock;               /* chip clock in Hz (passed from 2151intf.c) */
r17961	r17962
2492	2492	PSG->irqhandler = handler;
2493	2493	}
2494	2494
2495		void ym2151_set_port_write_handler(void *chip, write8_device_func handler)
	2495	void ym2151_set_port_write_handler(void *chip, void (*handler)(device_t *, offs_t, UINT8))
2496	2496	{
2497	2497	YM2151 *PSG = (YM2151 *)chip;
2498	2498	PSG->porthandler = handler;

trunk/src/emu/sound/sp0250.h

r17961	r17962
9	9	void (*drq_callback)(device_t *device, int state);
10	10	};
11	11
12		WRITE8_DEVICE_HANDLER( sp0250_w );
	12	DECLARE_WRITE8_DEVICE_HANDLER( sp0250_w );
13	13	UINT8 sp0250_drq_r(device_t *device);
14	14
15	15	class sp0250_device : public device_t,

trunk/src/emu/sound/ay8910.h

r17961	r17962
90	90
91	91	void ay8910_set_volume(device_t *device,int channel,int volume);
92	92
93		READ8_DEVICE_HANDLER( ay8910_r );
94		WRITE8_DEVICE_HANDLER( ay8910_address_w );
95		WRITE8_DEVICE_HANDLER( ay8910_data_w );
	93	DECLARE_READ8_DEVICE_HANDLER( ay8910_r );
	94	DECLARE_WRITE8_DEVICE_HANDLER( ay8910_address_w );
	95	DECLARE_WRITE8_DEVICE_HANDLER( ay8910_data_w );
96	96
97	97	/* /RES */
98		WRITE8_DEVICE_HANDLER( ay8910_reset_w );
	98	DECLARE_WRITE8_DEVICE_HANDLER( ay8910_reset_w );
99	99
100	100	/* use this when BC1 == A0; here, BC1=0 selects 'data' and BC1=1 selects 'latch address' */
101		WRITE8_DEVICE_HANDLER( ay8910_data_address_w );
	101	DECLARE_WRITE8_DEVICE_HANDLER( ay8910_data_address_w );
102	102
103	103	/* use this when BC1 == !A0; here, BC1=0 selects 'latch address' and BC1=1 selects 'data' */
104		WRITE8_DEVICE_HANDLER( ay8910_address_data_w );
	104	DECLARE_WRITE8_DEVICE_HANDLER( ay8910_address_data_w );
105	105
106	106	/* AY8914 handlers needed due to different register map */
107		READ8_DEVICE_HANDLER( ay8914_r );
108		WRITE8_DEVICE_HANDLER( ay8914_w );
	107	DECLARE_READ8_DEVICE_HANDLER( ay8914_r );
	108	DECLARE_WRITE8_DEVICE_HANDLER( ay8914_w );
109	109
110	110
111	111	/*********** An interface for SSG of YM2203 ***********/

trunk/src/emu/sound/st0016.h

r17961	r17962
10	10	UINT8 **p_soundram;
11	11	};
12	12
13		READ8_DEVICE_HANDLER( st0016_snd_r );
14		WRITE8_DEVICE_HANDLER( st0016_snd_w );
	13	DECLARE_READ8_DEVICE_HANDLER( st0016_snd_r );
	14	DECLARE_WRITE8_DEVICE_HANDLER( st0016_snd_w );
15	15
16	16	class st0016_device : public device_t,
17	17	public device_sound_interface

trunk/src/emu/sound/tiaintf.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( tia_sound_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( tia_sound_w );
9	9
10	10	class tia_device : public device_t,
11	11	public device_sound_interface

trunk/src/emu/sound/ym2151.h

r17961	r17962
81	81	void ym2151_set_irq_handler(void *chip, void (*handler)(device_t *device, int irq));
82	82
83	83	/* set port write handler on YM2151 chip number 'n'*/
84		void ym2151_set_port_write_handler(void *chip, write8_device_func handler);
	84	void ym2151_set_port_write_handler(void *chip, void (*handler)(device_t *, offs_t, UINT8));
85	85
86	86	#endif /*__YM2151_H__*/

trunk/src/emu/sound/c6280.h

r17961	r17962
11	11	};
12	12
13	13	/* Function prototypes */
14		WRITE8_DEVICE_HANDLER( c6280_w );
15		READ8_DEVICE_HANDLER( c6280_r );
	14	DECLARE_WRITE8_DEVICE_HANDLER( c6280_w );
	15	DECLARE_READ8_DEVICE_HANDLER( c6280_r );
16	16
17	17	class c6280_device : public device_t,
18	18	public device_sound_interface

trunk/src/emu/sound/discrete.h

r17961	r17962
4256	4256	*
4257	4257	*************************************/
4258	4258
4259		WRITE8_DEVICE_HANDLER( discrete_sound_w );
4260		READ8_DEVICE_HANDLER( discrete_sound_r );
	4259	DECLARE_WRITE8_DEVICE_HANDLER( discrete_sound_w );
	4260	DECLARE_READ8_DEVICE_HANDLER( discrete_sound_r );
4261	4261
4262	4262	//**************************************************************************
4263	4263	//  INTERFACE CONFIGURATION MACROS

trunk/src/emu/sound/scsp.c

r17961	r17962
230	230	device_t *device;
231	231	};
232	232
233		static void dma_scsp(address_space *space, scsp_state *scsp);      /*state DMA transfer function*/
	233	static void dma_scsp(address_space &space, scsp_state *scsp);      /*state DMA transfer function*/
234	234	#define   scsp_dgate      scsp->scsp_dmactrl & 0x4000
235	235	#define   scsp_ddir      scsp->scsp_dmactrl & 0x2000
236	236	#define scsp_dexe      scsp->scsp_dmactrl & 0x1000
r17961	r17962
698	698	}
699	699	}
700	700
701		static void SCSP_UpdateReg(scsp_state *scsp, int reg)
	701	static void SCSP_UpdateReg(scsp_state *scsp, address_space &space, int reg)
702	702	{
703		/* temporary hack until this is converted to a device */
704		address_space *space = scsp->device->machine().firstcpu->space(AS_PROGRAM);
705
706	703	switch(reg&0x3f)
707	704	{
708	705	case 0x0:
r17961	r17962
726	723	break;
727	724	case 0x6:
728	725	case 0x7:
729		scsp_midi_in(space->machine().device("scsp"), 0, scsp->udata.data[0x6/2]&0xff, 0);
	726	scsp_midi_in(space.machine().device("scsp"), space, 0, scsp->udata.data[0x6/2]&0xff, 0);
730	727	break;
731	728	case 0x12:
732	729	case 0x13:
r17961	r17962
837	834
838	835	}
839	836
840		static void SCSP_UpdateRegR(scsp_state *scsp, int reg)
	837	static void SCSP_UpdateRegR(scsp_state *scsp, address_space &space, int reg)
841	838	{
842	839	switch(reg&0x3f)
843	840	{
r17961	r17962
885	882	}
886	883	}
887	884
888		static void SCSP_w16(scsp_state *scsp,unsigned int addr,unsigned short val)
	885	static void SCSP_w16(scsp_state *scsp,address_space &space,unsigned int addr,unsigned short val)
889	886	{
890	887	addr&=0xffff;
891	888	if(addr<0x400)
r17961	r17962
900	897	if (addr < 0x430)
901	898	{
902	899	*((unsigned short *) (scsp->udata.datab+((addr&0x3f)))) = val;
903		SCSP_UpdateReg(scsp, addr&0x3f);
	900	SCSP_UpdateReg(scsp, space, addr&0x3f);
904	901	}
905	902	}
906	903	else if(addr<0x700)
r17961	r17962
924	921	}
925	922	}
926	923
927		static unsigned short SCSP_r16(scsp_state *scsp, unsigned int addr)
	924	static unsigned short SCSP_r16(scsp_state *scsp, address_space &space, unsigned int addr)
928	925	{
929	926	unsigned short v=0;
930	927	addr&=0xffff;
r17961	r17962
941	938	{
942	939	if (addr < 0x430)
943	940	{
944		SCSP_UpdateRegR(scsp, addr&0x3f);
	941	SCSP_UpdateRegR(scsp, space, addr&0x3f);
945	942	v= *((unsigned short *) (scsp->udata.datab+((addr&0x3f))));
946	943	}
947	944	}
r17961	r17962
1180	1177	}
1181	1178
1182	1179	/* TODO: this needs to be timer-ized */
1183		static void dma_scsp(address_space *space, scsp_state *scsp)
	1180	static void dma_scsp(address_space &space, scsp_state *scsp)
1184	1181	{
1185	1182	static UINT16 tmp_dma[3];
1186	1183	int i;
r17961	r17962
1212	1209	{
1213	1210	for(i=0;i < scsp->scsp_dtlg;i+=2)
1214	1211	{
1215		space->write_word(scsp->scsp_dmea, space->read_word(0x100000|scsp->scsp_drga));
	1212	space.write_word(scsp->scsp_dmea, space.read_word(0x100000|scsp->scsp_drga));
1216	1213	scsp->scsp_dmea+=2;
1217	1214	scsp->scsp_drga+=2;
1218	1215	}
r17961	r17962
1221	1218	{
1222	1219	for(i=0;i < scsp->scsp_dtlg;i+=2)
1223	1220	{
1224		space->write_word(0x100000|scsp->scsp_drga,space->read_word(scsp->scsp_dmea));
	1221	space.write_word(0x100000|scsp->scsp_drga,space.read_word(scsp->scsp_dmea));
1225	1222	scsp->scsp_dmea+=2;
1226	1223	scsp->scsp_drga+=2;
1227	1224	}
r17961	r17962
1240	1237	if(scsp->udata.data[0x1e/2] & 0x10)
1241	1238	{
1242	1239	popmessage("SCSP DMA IRQ triggered, contact MAMEdev");
1243		space->machine().device("audiocpu")->execute().set_input_line(DecodeSCI(scsp,SCIDMA),HOLD_LINE);
	1240	space.machine().device("audiocpu")->execute().set_input_line(DecodeSCI(scsp,SCIDMA),HOLD_LINE);
1244	1241	}
1245	1242	}
1246	1243
r17961	r17962
1302	1299
1303	1300	scsp->stream->update();
1304	1301
1305		return SCSP_r16(scsp, offset*2);
	1302	return SCSP_r16(scsp, space, offset*2);
1306	1303	}
1307	1304
1308	1305	WRITE16_DEVICE_HANDLER( scsp_w )
r17961	r17962
1312	1309
1313	1310	scsp->stream->update();
1314	1311
1315		tmp = SCSP_r16(scsp, offset*2);
	1312	tmp = SCSP_r16(scsp, space, offset*2);
1316	1313	COMBINE_DATA(&tmp);
1317		SCSP_w16(scsp,offset*2, tmp);
	1314	SCSP_w16(scsp,space,offset*2, tmp);
1318	1315
1319	1316	switch(offset*2)
1320	1317	{
r17961	r17962
1324	1321	case 0x416:
1325	1322	COMBINE_DATA(&scsp->dma_regs[((offset-0x412)/2) & 3]);
1326	1323	if(ACCESSING_BITS_8_15 && offset*2 == 0x416)
1327		dma_scsp(device->machine().firstcpu->space(AS_PROGRAM), scsp);
	1324	dma_scsp(space, scsp);
1328	1325	break;
1329	1326	case 0x42a:      //check main cpu IRQ
1330	1327	scsp->main_irq(1);

trunk/src/emu/sound/msm5232.c

r17961	r17962
69	69
70	70	double   external_capacity[8]; /* in Farads, eg 0.39e-6 = 0.36 uF (microFarads) */
71	71	device_t *device;
72		void (*gate_handler)(device_t *device, int state);   /* callback called when the GATE output pin changes state */
	72	devcb_resolved_write_line gate_handler;/* callback called when the GATE output pin changes state */
73	73
74	74	};
75	75
r17961	r17962
260	260	{
261	261	int new_state = (chip->control2 & 0x20) ? chip->voi[7].GF : 0;
262	262
263		if (chip->gate != new_state && chip->gate_handler)
	263	if (chip->gate != new_state && !chip->gate_handler.isnull())
264	264	{
265	265	chip->gate = new_state;
266		(*chip->gate_handler)(chip->device, new_state);
	266	chip->gate_handler(new_state);
267	267	}
268	268	}
269	269
r17961	r17962
275	275
276	276	for (i=0; i<8; i++)
277	277	{
278		msm5232_w(device,i,0x80);
279		msm5232_w(device,i,0x00);
	278	msm5232_w(device,device->machine().driver_data()->generic_space(),i,0x80);
	279	msm5232_w(device,device->machine().driver_data()->generic_space(),i,0x00);
280	280	}
281	281	chip->noise_cnt      = 0;
282	282	chip->noise_rng      = 1;
r17961	r17962
309	309	chip->external_capacity[j] = intf->capacity[j];
310	310	}
311	311
312		chip->gate_handler = intf->gate_handler;
	312	chip->gate_handler.resolve(intf->gate_handler_cb, *chip->device);
313	313
314	314	msm5232_init_tables( chip );
315	315

trunk/src/emu/sound/2610intf.c

r17961	r17962
207	207	}
208	208
209	209
210		READ8_DEVICE_HANDLER( ym2610_status_port_a_r ) { return ym2610_r(device, 0); }
211		READ8_DEVICE_HANDLER( ym2610_status_port_b_r ) { return ym2610_r(device, 2); }
212		READ8_DEVICE_HANDLER( ym2610_read_port_r ) { return ym2610_r(device, 1); }
	210	READ8_DEVICE_HANDLER( ym2610_status_port_a_r ) { return ym2610_r(device, space, 0); }
	211	READ8_DEVICE_HANDLER( ym2610_status_port_b_r ) { return ym2610_r(device, space, 2); }
	212	READ8_DEVICE_HANDLER( ym2610_read_port_r ) { return ym2610_r(device, space, 1); }
213	213
214		WRITE8_DEVICE_HANDLER( ym2610_control_port_a_w ) { ym2610_w(device, 0, data); }
215		WRITE8_DEVICE_HANDLER( ym2610_control_port_b_w ) { ym2610_w(device, 2, data); }
216		WRITE8_DEVICE_HANDLER( ym2610_data_port_a_w ) { ym2610_w(device, 1, data); }
217		WRITE8_DEVICE_HANDLER( ym2610_data_port_b_w ) { ym2610_w(device, 3, data); }
	214	WRITE8_DEVICE_HANDLER( ym2610_control_port_a_w ) { ym2610_w(device, space, 0, data); }
	215	WRITE8_DEVICE_HANDLER( ym2610_control_port_b_w ) { ym2610_w(device, space, 2, data); }
	216	WRITE8_DEVICE_HANDLER( ym2610_data_port_a_w ) { ym2610_w(device, space, 1, data); }
	217	WRITE8_DEVICE_HANDLER( ym2610_data_port_b_w ) { ym2610_w(device, space, 3, data); }
218	218
219	219	const device_type YM2610 = &device_creator<ym2610_device>;
220	220

trunk/src/emu/sound/scsp.h

r17961	r17962
19	19	void scsp_set_ram_base(device_t *device, void *base);
20	20
21	21	// SCSP register access
22		READ16_DEVICE_HANDLER( scsp_r );
23		WRITE16_DEVICE_HANDLER( scsp_w );
	22	DECLARE_READ16_DEVICE_HANDLER( scsp_r );
	23	DECLARE_WRITE16_DEVICE_HANDLER( scsp_w );
24	24
25	25	// MIDI I/O access (used for comms on Model 2/3)
26		WRITE16_DEVICE_HANDLER( scsp_midi_in );
27		READ16_DEVICE_HANDLER( scsp_midi_out_r );
	26	DECLARE_WRITE16_DEVICE_HANDLER( scsp_midi_in );
	27	DECLARE_READ16_DEVICE_HANDLER( scsp_midi_out_r );
28	28
29	29	extern UINT32* stv_scu;
30	30

trunk/src/emu/sound/msm5232.h

r17961	r17962
8	8	struct msm5232_interface
9	9	{
10	10	double capacity[8];   /* in Farads, capacitors connected to pins: 24,25,26,27 and 37,38,39,40 */
11		void (*gate_handler)(device_t *device, int state);   /* callback called when the GATE output pin changes state */
	11	devcb_write_line gate_handler_cb; /* callback called when the GATE output pin changes state */
12	12	};
13	13
14		WRITE8_DEVICE_HANDLER( msm5232_w );
	14	DECLARE_WRITE8_DEVICE_HANDLER( msm5232_w );
15	15
16	16	void msm5232_set_clock(device_t *device, int clock);
17	17

trunk/src/emu/sound/2610intf.h

r17961	r17962
14	14	void ( *handler )( device_t *device, int irq );   /* IRQ handler for the YM2610 */
15	15	};
16	16
17		READ8_DEVICE_HANDLER( ym2610_r );
18		WRITE8_DEVICE_HANDLER( ym2610_w );
	17	DECLARE_READ8_DEVICE_HANDLER( ym2610_r );
	18	DECLARE_WRITE8_DEVICE_HANDLER( ym2610_w );
19	19
20		READ8_DEVICE_HANDLER( ym2610_status_port_a_r );
21		READ8_DEVICE_HANDLER( ym2610_status_port_b_r );
22		READ8_DEVICE_HANDLER( ym2610_read_port_r );
	20	DECLARE_READ8_DEVICE_HANDLER( ym2610_status_port_a_r );
	21	DECLARE_READ8_DEVICE_HANDLER( ym2610_status_port_b_r );
	22	DECLARE_READ8_DEVICE_HANDLER( ym2610_read_port_r );
23	23
24		WRITE8_DEVICE_HANDLER( ym2610_control_port_a_w );
25		WRITE8_DEVICE_HANDLER( ym2610_control_port_b_w );
26		WRITE8_DEVICE_HANDLER( ym2610_data_port_a_w );
27		WRITE8_DEVICE_HANDLER( ym2610_data_port_b_w );
	24	DECLARE_WRITE8_DEVICE_HANDLER( ym2610_control_port_a_w );
	25	DECLARE_WRITE8_DEVICE_HANDLER( ym2610_control_port_b_w );
	26	DECLARE_WRITE8_DEVICE_HANDLER( ym2610_data_port_a_w );
	27	DECLARE_WRITE8_DEVICE_HANDLER( ym2610_data_port_b_w );
28	28
29	29
30	30	class ym2610_device : public device_t,

trunk/src/emu/sound/ics2115.h

r17961	r17962
98	98	// inline configuration helpers
99	99	static void static_set_irqf(device_t &device, void (*irqf)(device_t *device, int state));
100	100
101		static READ8_DEVICE_HANDLER(read);
102		static WRITE8_DEVICE_HANDLER(write);
	101	static DECLARE_READ8_DEVICE_HANDLER(read);
	102	static DECLARE_WRITE8_DEVICE_HANDLER(write);
103	103	//UINT8 read(offs_t offset);
104	104	//void write(offs_t offset, UINT8 data);
105	105	static TIMER_CALLBACK(timer_cb_0);

trunk/src/emu/sound/gaelco.h

r17961	r17962
11	11	int banks[4];         /* start of each ROM bank */
12	12	};
13	13
14		WRITE16_DEVICE_HANDLER( gaelcosnd_w );
15		READ16_DEVICE_HANDLER( gaelcosnd_r );
	14	DECLARE_WRITE16_DEVICE_HANDLER( gaelcosnd_w );
	15	DECLARE_READ16_DEVICE_HANDLER( gaelcosnd_r );
16	16
17	17	class gaelco_gae1_device : public device_t,
18	18	public device_sound_interface

trunk/src/emu/sound/2608intf.c

r17961	r17962
194	194	ym2608_write(info->chip, offset & 3, data);
195	195	}
196	196
197		READ8_DEVICE_HANDLER( ym2608_read_port_r ) { return ym2608_r(device, 1); }
198		READ8_DEVICE_HANDLER( ym2608_status_port_a_r ) { return ym2608_r(device, 0); }
199		READ8_DEVICE_HANDLER( ym2608_status_port_b_r ) { return ym2608_r(device, 2); }
	197	READ8_DEVICE_HANDLER( ym2608_read_port_r ) { return ym2608_r(device, space, 1); }
	198	READ8_DEVICE_HANDLER( ym2608_status_port_a_r ) { return ym2608_r(device, space, 0); }
	199	READ8_DEVICE_HANDLER( ym2608_status_port_b_r ) { return ym2608_r(device, space, 2); }
200	200
201		WRITE8_DEVICE_HANDLER( ym2608_control_port_a_w ) { ym2608_w(device, 0, data); }
202		WRITE8_DEVICE_HANDLER( ym2608_control_port_b_w ) { ym2608_w(device, 2, data); }
203		WRITE8_DEVICE_HANDLER( ym2608_data_port_a_w ) { ym2608_w(device, 1, data); }
204		WRITE8_DEVICE_HANDLER( ym2608_data_port_b_w ) { ym2608_w(device, 3, data); }
	201	WRITE8_DEVICE_HANDLER( ym2608_control_port_a_w ) { ym2608_w(device, space, 0, data); }
	202	WRITE8_DEVICE_HANDLER( ym2608_control_port_b_w ) { ym2608_w(device, space, 2, data); }
	203	WRITE8_DEVICE_HANDLER( ym2608_data_port_a_w ) { ym2608_w(device, space, 1, data); }
	204	WRITE8_DEVICE_HANDLER( ym2608_data_port_b_w ) { ym2608_w(device, space, 3, data); }
205	205
206	206	const device_type YM2608 = &device_creator<ym2608_device>;
207	207

trunk/src/emu/sound/2608intf.h

r17961	r17962
16	16	void ( *handler )( device_t *device, int irq );   /* IRQ handler for the YM2608 */
17	17	};
18	18
19		READ8_DEVICE_HANDLER( ym2608_r );
20		WRITE8_DEVICE_HANDLER( ym2608_w );
	19	DECLARE_READ8_DEVICE_HANDLER( ym2608_r );
	20	DECLARE_WRITE8_DEVICE_HANDLER( ym2608_w );
21	21
22		READ8_DEVICE_HANDLER( ym2608_read_port_r );
23		READ8_DEVICE_HANDLER( ym2608_status_port_a_r );
24		READ8_DEVICE_HANDLER( ym2608_status_port_b_r );
	22	DECLARE_READ8_DEVICE_HANDLER( ym2608_read_port_r );
	23	DECLARE_READ8_DEVICE_HANDLER( ym2608_status_port_a_r );
	24	DECLARE_READ8_DEVICE_HANDLER( ym2608_status_port_b_r );
25	25
26		WRITE8_DEVICE_HANDLER( ym2608_control_port_a_w );
27		WRITE8_DEVICE_HANDLER( ym2608_control_port_b_w );
28		WRITE8_DEVICE_HANDLER( ym2608_data_port_a_w );
29		WRITE8_DEVICE_HANDLER( ym2608_data_port_b_w );
	26	DECLARE_WRITE8_DEVICE_HANDLER( ym2608_control_port_a_w );
	27	DECLARE_WRITE8_DEVICE_HANDLER( ym2608_control_port_b_w );
	28	DECLARE_WRITE8_DEVICE_HANDLER( ym2608_data_port_a_w );
	29	DECLARE_WRITE8_DEVICE_HANDLER( ym2608_data_port_b_w );
30	30
31	31	class ym2608_device : public device_t,
32	32	public device_sound_interface

trunk/src/emu/sound/zsg2.h

r17961	r17962
7	7	#ifndef __ZSG2_H__
8	8	#define __ZSG2_H__
9	9
10		READ16_DEVICE_HANDLER( zsg2_r );
11		WRITE16_DEVICE_HANDLER( zsg2_w );
	10	DECLARE_READ16_DEVICE_HANDLER( zsg2_r );
	11	DECLARE_WRITE16_DEVICE_HANDLER( zsg2_w );
12	12
13	13	struct zsg2_interface
14	14	{

trunk/src/emu/sound/okim6376.h

r17961	r17962
7	7
8	8	/* an interface for the OKIM6376 and similar chips (CPU interface only) */
9	9
10		READ8_DEVICE_HANDLER( okim6376_r );
11		WRITE8_DEVICE_HANDLER( okim6376_w );
	10	DECLARE_READ8_DEVICE_HANDLER( okim6376_r );
	11	DECLARE_WRITE8_DEVICE_HANDLER( okim6376_w );
12	12
13	13	class okim6376_device : public device_t,
14	14	public device_sound_interface

trunk/src/emu/sound/es5506.h

r17961	r17962
20	20	UINT16 (*read_port)(device_t *device);         /* input port read */
21	21	};
22	22
23		READ16_DEVICE_HANDLER( es5505_r );
24		WRITE16_DEVICE_HANDLER( es5505_w );
	23	DECLARE_READ16_DEVICE_HANDLER( es5505_r );
	24	DECLARE_WRITE16_DEVICE_HANDLER( es5505_w );
25	25	void es5505_voice_bank_w(device_t *device, int voice, int bank);
26	26
27	27	class es5506_device : public device_t,
r17961	r17962
62	62	UINT16 (*read_port)(device_t *device);         /* input port read */
63	63	};
64	64
65		READ8_DEVICE_HANDLER( es5506_r );
66		WRITE8_DEVICE_HANDLER( es5506_w );
	65	DECLARE_READ8_DEVICE_HANDLER( es5506_r );
	66	DECLARE_WRITE8_DEVICE_HANDLER( es5506_w );
67	67	void es5506_voice_bank_w(device_t *device, int voice, int bank);
68	68
69	69	class es5505_device : public es5506_device

trunk/src/emu/sound/ymf278b.h

r17961	r17962
13	13	void (*irq_callback)(device_t *device, int state);   /* irq callback */
14	14	};
15	15
16		READ8_DEVICE_HANDLER( ymf278b_r );
17		WRITE8_DEVICE_HANDLER( ymf278b_w );
	16	DECLARE_READ8_DEVICE_HANDLER( ymf278b_r );
	17	DECLARE_WRITE8_DEVICE_HANDLER( ymf278b_w );
18	18
19	19	class ymf278b_device : public device_t,
20	20	public device_sound_interface

trunk/src/emu/sound/2151intf.c

r17961	r17962
112	112	}
113	113
114	114
115		READ8_DEVICE_HANDLER( ym2151_status_port_r ) { return ym2151_r(device, 1); }
	115	READ8_DEVICE_HANDLER( ym2151_status_port_r ) { return ym2151_r(device, space, 1); }
116	116
117		WRITE8_DEVICE_HANDLER( ym2151_register_port_w ) { ym2151_w(device, 0, data); }
118		WRITE8_DEVICE_HANDLER( ym2151_data_port_w ) { ym2151_w(device, 1, data); }
	117	WRITE8_DEVICE_HANDLER( ym2151_register_port_w ) { ym2151_w(device, space, 0, data); }
	118	WRITE8_DEVICE_HANDLER( ym2151_data_port_w ) { ym2151_w(device, space, 1, data); }
119	119
120	120
121	121	const device_type YM2151 = &device_creator<ym2151_device>;

trunk/src/emu/sound/2413intf.c

r17961	r17962
111	111	ym2413_write(info->chip, offset & 1, data);
112	112	}
113	113
114		WRITE8_DEVICE_HANDLER( ym2413_register_port_w ) { ym2413_w(device, 0, data); }
115		WRITE8_DEVICE_HANDLER( ym2413_data_port_w ) { ym2413_w(device, 1, data); }
	114	WRITE8_DEVICE_HANDLER( ym2413_register_port_w ) { ym2413_w(device, space, 0, data); }
	115	WRITE8_DEVICE_HANDLER( ym2413_data_port_w ) { ym2413_w(device, space, 1, data); }
116	116
117	117	const device_type YM2413 = &device_creator<ym2413_device>;
118	118

trunk/src/emu/sound/2151intf.h

r17961	r17962
11	11	devcb_write8 portwritehandler;
12	12	};
13	13
14		READ8_DEVICE_HANDLER( ym2151_r );
15		WRITE8_DEVICE_HANDLER( ym2151_w );
	14	DECLARE_READ8_DEVICE_HANDLER( ym2151_r );
	15	DECLARE_WRITE8_DEVICE_HANDLER( ym2151_w );
16	16
17		READ8_DEVICE_HANDLER( ym2151_status_port_r );
18		WRITE8_DEVICE_HANDLER( ym2151_register_port_w );
19		WRITE8_DEVICE_HANDLER( ym2151_data_port_w );
	17	DECLARE_READ8_DEVICE_HANDLER( ym2151_status_port_r );
	18	DECLARE_WRITE8_DEVICE_HANDLER( ym2151_register_port_w );
	19	DECLARE_WRITE8_DEVICE_HANDLER( ym2151_data_port_w );
20	20
21	21	class ym2151_device : public device_t,
22	22	public device_sound_interface

trunk/src/emu/sound/2413intf.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( ym2413_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( ym2413_w );
9	9
10		WRITE8_DEVICE_HANDLER( ym2413_register_port_w );
11		WRITE8_DEVICE_HANDLER( ym2413_data_port_w );
	10	DECLARE_WRITE8_DEVICE_HANDLER( ym2413_register_port_w );
	11	DECLARE_WRITE8_DEVICE_HANDLER( ym2413_data_port_w );
12	12
13	13	class ym2413_device : public device_t,
14	14	public device_sound_interface

trunk/src/emu/sound/k053260.h

r17961	r17962
17	17	};
18	18
19	19
20		WRITE8_DEVICE_HANDLER( k053260_w );
21		READ8_DEVICE_HANDLER( k053260_r );
	20	DECLARE_WRITE8_DEVICE_HANDLER( k053260_w );
	21	DECLARE_READ8_DEVICE_HANDLER( k053260_r );
22	22
23	23	class k053260_device : public device_t,
24	24	public device_sound_interface

trunk/src/emu/sound/segapcm.h

r17961	r17962
21	21	int  bank;
22	22	};
23	23
24		WRITE8_DEVICE_HANDLER( sega_pcm_w );
25		READ8_DEVICE_HANDLER( sega_pcm_r );
	24	DECLARE_WRITE8_DEVICE_HANDLER( sega_pcm_w );
	25	DECLARE_READ8_DEVICE_HANDLER( sega_pcm_r );
26	26
27	27	class segapcm_device : public device_t,
28	28	public device_sound_interface

trunk/src/emu/sound/8950intf.c

r17961	r17962
28	28	emu_timer *      timer[2];
29	29	void *         chip;
30	30	const y8950_interface *intf;
31		device_t *device;
	31	y8950_device *device;
32	32	};
33	33
34	34
r17961	r17962
43	43	static void IRQHandler(void *param,int irq)
44	44	{
45	45	y8950_state *info = (y8950_state *)param;
46		if (info->intf->handler) (info->intf->handler)(info->device, irq ? ASSERT_LINE : CLEAR_LINE);
	46	if (!info->device->m_handler.isnull()) info->device->m_handler(irq ? ASSERT_LINE : CLEAR_LINE);
47	47	}
48	48	static TIMER_CALLBACK( timer_callback_0 )
49	49	{
r17961	r17962
72	72	static unsigned char Y8950PortHandler_r(void *param)
73	73	{
74	74	y8950_state *info = (y8950_state *)param;
75		if (info->intf->portread)
76		return info->intf->portread(info->device,0);
	75	if (!info->device->m_portread.isnull())
	76	return info->device->m_portread(0);
77	77	return 0;
78	78	}
79	79
80	80	static void Y8950PortHandler_w(void *param,unsigned char data)
81	81	{
82	82	y8950_state *info = (y8950_state *)param;
83		if (info->intf->portwrite)
84		info->intf->portwrite(info->device,0,data);
	83	if (!info->device->m_portwrite.isnull())
	84	info->device->m_portwrite(0,data);
85	85	}
86	86
87	87	static unsigned char Y8950KeyboardHandler_r(void *param)
88	88	{
89	89	y8950_state *info = (y8950_state *)param;
90		if (info->intf->keyboardread)
91		return info->intf->keyboardread(info->device,0);
	90	if (!info->device->m_keyboardread.isnull())
	91	return info->device->m_keyboardread(0);
92	92	return 0;
93	93	}
94	94
95	95	static void Y8950KeyboardHandler_w(void *param,unsigned char data)
96	96	{
97	97	y8950_state *info = (y8950_state *)param;
98		if (info->intf->keyboardwrite)
99		info->intf->keyboardwrite(info->device,0,data);
	98	if (!info->device->m_keyboardwrite.isnull())
	99	info->device->m_keyboardwrite(0,data);
100	100	}
101	101
102	102	static STREAM_UPDATE( y8950_stream_update )
r17961	r17962
114	114
115	115	static DEVICE_START( y8950 )
116	116	{
117		static const y8950_interface dummy = { 0 };
	117	static const y8950_interface dummy = { DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL, DEVCB_NULL };
118	118	y8950_state *info = get_safe_token(device);
119	119	int rate = device->clock()/72;
120	120
121	121	info->intf = device->static_config() ? (const y8950_interface *)device->static_config() : &dummy;
122		info->device = device;
	122	info->device = downcast<y8950_device *>(device);
123	123
124	124	/* stream system initialize */
125	125	info->chip = y8950_init(device,device->clock(),rate);
r17961	r17962
167	167	y8950_write(info->chip, offset & 1, data);
168	168	}
169	169
170		READ8_DEVICE_HANDLER( y8950_status_port_r ) { return y8950_r(device, 0); }
171		READ8_DEVICE_HANDLER( y8950_read_port_r ) { return y8950_r(device, 1); }
172		WRITE8_DEVICE_HANDLER( y8950_control_port_w ) { y8950_w(device, 0, data); }
173		WRITE8_DEVICE_HANDLER( y8950_write_port_w ) { y8950_w(device, 1, data); }
	170	READ8_DEVICE_HANDLER( y8950_status_port_r ) { return y8950_r(device, space, 0); }
	171	READ8_DEVICE_HANDLER( y8950_read_port_r ) { return y8950_r(device, space, 1); }
	172	WRITE8_DEVICE_HANDLER( y8950_control_port_w ) { y8950_w(device, space, 0, data); }
	173	WRITE8_DEVICE_HANDLER( y8950_write_port_w ) { y8950_w(device, space, 1, data); }
174	174
175	175
176	176	const device_type Y8950 = &device_creator<y8950_device>;
r17961	r17962
198	198
199	199	void y8950_device::device_start()
200	200	{
	201	const y8950_interface *intf = (const y8950_interface *)static_config();
	202	if (intf != NULL)
	203	{
	204	m_handler.resolve(intf->handler_cb, *this);
	205	m_keyboardread.resolve(intf->keyboardread_cb, *this);
	206	m_keyboardwrite.resolve(intf->keyboardwrite_cb, *this);
	207	m_portread.resolve(intf->portread_cb, *this);
	208	m_portwrite.resolve(intf->portwrite_cb, *this);
	209	}
	210
201	211	DEVICE_START_NAME( y8950 )(this);
202	212	}
203	213

trunk/src/emu/sound/vrender0.h

r17961	r17962
13	13
14	14	void vr0_snd_set_areas(device_t *device,UINT32 *texture,UINT32 *frame);
15	15
16		READ32_DEVICE_HANDLER( vr0_snd_read );
17		WRITE32_DEVICE_HANDLER( vr0_snd_write );
	16	DECLARE_READ32_DEVICE_HANDLER( vr0_snd_read );
	17	DECLARE_WRITE32_DEVICE_HANDLER( vr0_snd_write );
18	18
19	19	class vrender0_device : public device_t,
20	20	public device_sound_interface

trunk/src/emu/sound/8950intf.h

r17961	r17962
7	7
8	8	struct y8950_interface
9	9	{
10		void (*handler)(device_t *device, int linestate);
11
12		read8_device_func keyboardread;
13		write8_device_func keyboardwrite;
14		read8_device_func portread;
15		write8_device_func portwrite;
	10	devcb_write_line handler_cb;
	11	devcb_read8 keyboardread_cb;
	12	devcb_write8 keyboardwrite_cb;
	13	devcb_read8 portread_cb;
	14	devcb_write8 portwrite_cb;
16	15	};
17	16
18		READ8_DEVICE_HANDLER( y8950_r );
19		WRITE8_DEVICE_HANDLER( y8950_w );
	17	DECLARE_READ8_DEVICE_HANDLER( y8950_r );
	18	DECLARE_WRITE8_DEVICE_HANDLER( y8950_w );
20	19
21		READ8_DEVICE_HANDLER( y8950_status_port_r );
22		READ8_DEVICE_HANDLER( y8950_read_port_r );
23		WRITE8_DEVICE_HANDLER( y8950_control_port_w );
24		WRITE8_DEVICE_HANDLER( y8950_write_port_w );
	20	DECLARE_READ8_DEVICE_HANDLER( y8950_status_port_r );
	21	DECLARE_READ8_DEVICE_HANDLER( y8950_read_port_r );
	22	DECLARE_WRITE8_DEVICE_HANDLER( y8950_control_port_w );
	23	DECLARE_WRITE8_DEVICE_HANDLER( y8950_write_port_w );
25	24
26	25	class y8950_device : public device_t,
27	26	public device_sound_interface
r17961	r17962
44	43	private:
45	44	// internal state
46	45	void *m_token;
	46	public:
	47	devcb_resolved_write_line m_handler;
	48	devcb_resolved_read8 m_keyboardread;
	49	devcb_resolved_write8 m_keyboardwrite;
	50	devcb_resolved_read8 m_portread;
	51	devcb_resolved_write8 m_portwrite;
47	52	};
48	53
49	54	extern const device_type Y8950;

trunk/src/emu/sound/namco.c

r17961	r17962
638	638	chip->sound_enable = enable;
639	639	}
640	640
	641	static DECLARE_WRITE8_DEVICE_HANDLER( namco_15xx_w );
641	642	static WRITE8_DEVICE_HANDLER( namco_15xx_w )
642	643	{
643	644	namco_sound *chip = get_safe_token(device);
r17961	r17962
704	705	0x3c        ch 0    noise sw
705	706	*/
706	707
	708	static DECLARE_WRITE8_DEVICE_HANDLER( namcos1_sound_w );
707	709	static WRITE8_DEVICE_HANDLER( namcos1_sound_w )
708	710	{
709	711	namco_sound *chip = get_safe_token(device);
r17961	r17962
781	783	}
782	784	}
783	785	else if (offset < 0x140)
784		namcos1_sound_w(device, offset - 0x100,data);
	786	namcos1_sound_w(device, space, offset - 0x100,data);
785	787	else
786	788	chip->wavedata[offset] = data;
787	789	}
r17961	r17962
803	805	WRITE8_DEVICE_HANDLER( namco_snd_sharedram_w )
804	806	{
805	807	if (offset < 0x40)
806		namco_15xx_w(device, offset, data);
	808	namco_15xx_w(device, space, offset, data);
807	809	else
808	810	{
809	811	namco_sound *chip = get_safe_token(device);

trunk/src/emu/sound/t6w28.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( t6w28_w );
	8	DECLARE_WRITE8_DEVICE_HANDLER( t6w28_w );
9	9
10	10	class t6w28_device : public device_t,
11	11	public device_sound_interface

trunk/src/emu/sound/multipcm.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE8_DEVICE_HANDLER( multipcm_w );
9		READ8_DEVICE_HANDLER( multipcm_r );
	8	DECLARE_WRITE8_DEVICE_HANDLER( multipcm_w );
	9	DECLARE_READ8_DEVICE_HANDLER( multipcm_r );
10	10
11	11	void multipcm_set_bank(device_t *device, UINT32 leftoffs, UINT32 rightoffs);
12	12

trunk/src/emu/sound/namco.h

r17961	r17962
11	11	int stereo;      /* set to 1 to indicate stereo (e.g., System 1) */
12	12	};
13	13
14		WRITE8_DEVICE_HANDLER( pacman_sound_enable_w );
15		WRITE8_DEVICE_HANDLER( pacman_sound_w );
	14	DECLARE_WRITE8_DEVICE_HANDLER( pacman_sound_enable_w );
	15	DECLARE_WRITE8_DEVICE_HANDLER( pacman_sound_w );
16	16
17	17	void polepos_sound_enable(device_t *device, int enable);
18		READ8_DEVICE_HANDLER( polepos_sound_r );
19		WRITE8_DEVICE_HANDLER( polepos_sound_w );
	18	DECLARE_READ8_DEVICE_HANDLER( polepos_sound_r );
	19	DECLARE_WRITE8_DEVICE_HANDLER( polepos_sound_w );
20	20
21	21	void mappy_sound_enable(device_t *device, int enable);
22	22
23		WRITE8_DEVICE_HANDLER( namcos1_cus30_w );   /* wavedata + sound registers + RAM */
24		READ8_DEVICE_HANDLER( namcos1_cus30_r );
	23	DECLARE_WRITE8_DEVICE_HANDLER( namcos1_cus30_w );   /* wavedata + sound registers + RAM */
	24	DECLARE_READ8_DEVICE_HANDLER( namcos1_cus30_r );
25	25
26		READ8_DEVICE_HANDLER( namco_snd_sharedram_r );
27		WRITE8_DEVICE_HANDLER( namco_snd_sharedram_w );
	26	DECLARE_READ8_DEVICE_HANDLER( namco_snd_sharedram_r );
	27	DECLARE_WRITE8_DEVICE_HANDLER( namco_snd_sharedram_w );
28	28
29	29	class namco_device : public device_t,
30	30	public device_sound_interface

trunk/src/emu/sound/2203intf.c

r17961	r17962
175	175	}
176	176
177	177
178		READ8_DEVICE_HANDLER( ym2203_status_port_r ) { return ym2203_r(device, 0); }
179		READ8_DEVICE_HANDLER( ym2203_read_port_r ) { return ym2203_r(device, 1); }
180		WRITE8_DEVICE_HANDLER( ym2203_control_port_w ) { ym2203_w(device, 0, data); }
181		WRITE8_DEVICE_HANDLER( ym2203_write_port_w ) { ym2203_w(device, 1, data); }
	178	READ8_DEVICE_HANDLER( ym2203_status_port_r ) { return ym2203_r(device, space, 0); }
	179	READ8_DEVICE_HANDLER( ym2203_read_port_r ) { return ym2203_r(device, space, 1); }
	180	WRITE8_DEVICE_HANDLER( ym2203_control_port_w ) { ym2203_w(device, space, 0, data); }
	181	WRITE8_DEVICE_HANDLER( ym2203_write_port_w ) { ym2203_w(device, space, 1, data); }
182	182
183	183	const device_type YM2203 = &device_creator<ym2203_device>;
184	184

trunk/src/emu/sound/vlm5030.h

r17961	r17962
16	16	/* get BSY pin level */
17	17	int vlm5030_bsy(device_t *device);
18	18	/* latch contoll data */
19		WRITE8_DEVICE_HANDLER( vlm5030_data_w );
	19	DECLARE_WRITE8_DEVICE_HANDLER( vlm5030_data_w );
20	20	/* set RST pin level : reset / set table address A8-A15 */
21	21	void vlm5030_rst (device_t *device, int pin );
22	22	/* set VCU pin level : ?? unknown */

trunk/src/emu/sound/2203intf.h

r17961	r17962
15	15	devcb_write_line irqhandler;
16	16	};
17	17
18		READ8_DEVICE_HANDLER( ym2203_r );
19		WRITE8_DEVICE_HANDLER( ym2203_w );
	18	DECLARE_READ8_DEVICE_HANDLER( ym2203_r );
	19	DECLARE_WRITE8_DEVICE_HANDLER( ym2203_w );
20	20
21		READ8_DEVICE_HANDLER( ym2203_status_port_r );
22		READ8_DEVICE_HANDLER( ym2203_read_port_r );
23		WRITE8_DEVICE_HANDLER( ym2203_control_port_w );
24		WRITE8_DEVICE_HANDLER( ym2203_write_port_w );
	21	DECLARE_READ8_DEVICE_HANDLER( ym2203_status_port_r );
	22	DECLARE_READ8_DEVICE_HANDLER( ym2203_read_port_r );
	23	DECLARE_WRITE8_DEVICE_HANDLER( ym2203_control_port_w );
	24	DECLARE_WRITE8_DEVICE_HANDLER( ym2203_write_port_w );
25	25
26	26	class ym2203_device : public device_t,
27	27	public device_sound_interface

trunk/src/emu/sound/k007232.h

r17961	r17962
14	14	void (*portwritehandler)(device_t *, int);
15	15	};
16	16
17		WRITE8_DEVICE_HANDLER( k007232_w );
18		READ8_DEVICE_HANDLER( k007232_r );
	17	DECLARE_WRITE8_DEVICE_HANDLER( k007232_w );
	18	DECLARE_READ8_DEVICE_HANDLER( k007232_r );
19	19
20	20	void k007232_set_bank( device_t *device, int chABank, int chBBank );
21	21

trunk/src/emu/sound/tms5220.h

r17961	r17962
30	30	WRITE_LINE_DEVICE_HANDLER( tms5220_rsq_w );
31	31	WRITE_LINE_DEVICE_HANDLER( tms5220_wsq_w );
32	32
33		WRITE8_DEVICE_HANDLER( tms5220_data_w );
34		READ8_DEVICE_HANDLER( tms5220_status_r );
	33	DECLARE_WRITE8_DEVICE_HANDLER( tms5220_data_w );
	34	DECLARE_READ8_DEVICE_HANDLER( tms5220_status_r );
35	35
36	36	READ_LINE_DEVICE_HANDLER( tms5220_readyq_r );
37	37	READ_LINE_DEVICE_HANDLER( tms5220_intq_r );

trunk/src/emu/sound/okim6258.h

r17961	r17962
29	29	void okim6258_set_clock(device_t *device, int val);
30	30	int okim6258_get_vclk(device_t *device);
31	31
32		READ8_DEVICE_HANDLER( okim6258_status_r );
33		WRITE8_DEVICE_HANDLER( okim6258_data_w );
34		WRITE8_DEVICE_HANDLER( okim6258_ctrl_w );
	32	DECLARE_READ8_DEVICE_HANDLER( okim6258_status_r );
	33	DECLARE_WRITE8_DEVICE_HANDLER( okim6258_data_w );
	34	DECLARE_WRITE8_DEVICE_HANDLER( okim6258_ctrl_w );
35	35
36	36	class okim6258_device : public device_t,
37	37	public device_sound_interface

trunk/src/emu/sound/262intf.c

r17961	r17962
124	124	ymf262_write(info->chip, offset & 3, data);
125	125	}
126	126
127		READ8_DEVICE_HANDLER ( ymf262_status_r ) { return ymf262_r(device, 0); }
128		WRITE8_DEVICE_HANDLER( ymf262_register_a_w ) { ymf262_w(device, 0, data); }
129		WRITE8_DEVICE_HANDLER( ymf262_register_b_w ) { ymf262_w(device, 2, data); }
130		WRITE8_DEVICE_HANDLER( ymf262_data_a_w ) { ymf262_w(device, 1, data); }
131		WRITE8_DEVICE_HANDLER( ymf262_data_b_w ) { ymf262_w(device, 3, data); }
	127	READ8_DEVICE_HANDLER ( ymf262_status_r ) { return ymf262_r(device, space, 0); }
	128	WRITE8_DEVICE_HANDLER( ymf262_register_a_w ) { ymf262_w(device, space, 0, data); }
	129	WRITE8_DEVICE_HANDLER( ymf262_register_b_w ) { ymf262_w(device, space, 2, data); }
	130	WRITE8_DEVICE_HANDLER( ymf262_data_a_w ) { ymf262_w(device, space, 1, data); }
	131	WRITE8_DEVICE_HANDLER( ymf262_data_b_w ) { ymf262_w(device, space, 3, data); }
132	132
133	133	const device_type YMF262 = &device_creator<ymf262_device>;
134	134

trunk/src/emu/sound/nile.h

r17961	r17962
5	5
6	6	#include "devlegcy.h"
7	7
8		WRITE16_DEVICE_HANDLER( nile_snd_w );
9		READ16_DEVICE_HANDLER( nile_snd_r );
10		WRITE16_DEVICE_HANDLER( nile_sndctrl_w );
11		READ16_DEVICE_HANDLER( nile_sndctrl_r );
	8	DECLARE_WRITE16_DEVICE_HANDLER( nile_snd_w );
	9	DECLARE_READ16_DEVICE_HANDLER( nile_snd_r );
	10	DECLARE_WRITE16_DEVICE_HANDLER( nile_sndctrl_w );
	11	DECLARE_READ16_DEVICE_HANDLER( nile_sndctrl_r );
12	12
13	13	class nile_device : public device_t,
14	14	public device_sound_interface

trunk/src/emu/devconv.h

r17961	r17962
85	85	*
86	86	*************************************/
87	87
88		INLINE UINT16 read16be_with_read8_device_handler(read8_device_func handler, device_t *device, offs_t offset, UINT16 mem_mask)
	88	INLINE UINT16 read16be_with_read8_device_handler(read8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT16 mem_mask)
89	89	{
90	90	UINT16 result = 0;
91	91	if (ACCESSING_BITS_8_15)
92		result |= ((UINT16)(*handler)(device, offset * 2 + 0)) << 8;
	92	result |= ((UINT16)(*handler)(device, space, offset * 2 + 0, mem_mask >> 8)) << 8;
93	93	if (ACCESSING_BITS_0_7)
94		result |= ((UINT16)(*handler)(device, offset * 2 + 1)) << 0;
	94	result |= ((UINT16)(*handler)(device, space, offset * 2 + 1, mem_mask >> 0)) << 0;
95	95	return result;
96	96	}
97	97
98	98
99		INLINE void write16be_with_write8_device_handler(write8_device_func handler, device_t *device, offs_t offset, UINT16 data, UINT16 mem_mask)
	99	INLINE void write16be_with_write8_device_handler(write8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
100	100	{
101	101	if (ACCESSING_BITS_8_15)
102		(*handler)(device, offset * 2 + 0, data >> 8);
	102	(*handler)(device, space, offset * 2 + 0, data >> 8, mem_mask >> 8);
103	103	if (ACCESSING_BITS_0_7)
104		(*handler)(device, offset * 2 + 1, data >> 0);
	104	(*handler)(device, space, offset * 2 + 1, data >> 0, mem_mask >> 0);
105	105	}
106	106
107	107
r17961	r17962
111	111	*
112	112	*************************************/
113	113
114		INLINE UINT16 read16le_with_read8_device_handler(read8_device_func handler, device_t *device, offs_t offset, UINT16 mem_mask)
	114	INLINE UINT16 read16le_with_read8_device_handler(read8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT16 mem_mask)
115	115	{
116	116	UINT16 result = 0;
117	117	if (ACCESSING_BITS_0_7)
118		result |= ((UINT16) (*handler)(device, offset * 2 + 0)) << 0;
	118	result |= ((UINT16) (*handler)(device, space, offset * 2 + 0, mem_mask >> 0)) << 0;
119	119	if (ACCESSING_BITS_8_15)
120		result |= ((UINT16) (*handler)(device, offset * 2 + 1)) << 8;
	120	result |= ((UINT16) (*handler)(device, space, offset * 2 + 1, mem_mask >> 8)) << 8;
121	121	return result;
122	122	}
123	123
124	124
125		INLINE void write16le_with_write8_device_handler(write8_device_func handler, device_t *device, offs_t offset, UINT16 data, UINT16 mem_mask)
	125	INLINE void write16le_with_write8_device_handler(write8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT16 data, UINT16 mem_mask)
126	126	{
127	127	if (ACCESSING_BITS_0_7)
128		(*handler)(device, offset * 2 + 0, data >> 0);
	128	(*handler)(device, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
129	129	if (ACCESSING_BITS_8_15)
130		(*handler)(device, offset * 2 + 1, data >> 8);
	130	(*handler)(device, space, offset * 2 + 1, data >> 8, mem_mask >> 8);
131	131	}
132	132
133	133
r17961	r17962
137	137	*
138	138	*************************************/
139	139
140		INLINE UINT32 read32be_with_read8_device_handler(read8_device_func handler, device_t *device, offs_t offset, UINT32 mem_mask)
	140	INLINE UINT32 read32be_with_read8_device_handler(read8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 mem_mask)
141	141	{
142	142	UINT32 result = 0;
143	143	if (ACCESSING_BITS_16_31)
144		result |= read16be_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 16) << 16;
	144	result |= read16be_with_read8_device_handler(handler, device, space, offset * 2 + 0, mem_mask >> 16) << 16;
145	145	if (ACCESSING_BITS_0_15)
146		result |= read16be_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask) << 0;
	146	result |= read16be_with_read8_device_handler(handler, device, space, offset * 2 + 1, mem_mask) << 0;
147	147	return result;
148	148	}
149	149
150	150
151		INLINE void write32be_with_write8_device_handler(write8_device_func handler, device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask)
	151	INLINE void write32be_with_write8_device_handler(write8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
152	152	{
153	153	if (ACCESSING_BITS_16_31)
154		write16be_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 16, mem_mask >> 16);
	154	write16be_with_write8_device_handler(handler, device, space, offset * 2 + 0, data >> 16, mem_mask >> 16);
155	155	if (ACCESSING_BITS_0_15)
156		write16be_with_write8_device_handler(handler, device, offset * 2 + 1, data, mem_mask);
	156	write16be_with_write8_device_handler(handler, device, space, offset * 2 + 1, data, mem_mask);
157	157	}
158	158
159	159
r17961	r17962
163	163	*
164	164	*************************************/
165	165
166		INLINE UINT32 read32le_with_read8_device_handler(read8_device_func handler, device_t *device, offs_t offset, UINT32 mem_mask)
	166	INLINE UINT32 read32le_with_read8_device_handler(read8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 mem_mask)
167	167	{
168	168	UINT32 result = 0;
169	169	if (ACCESSING_BITS_0_15)
170		result |= read16le_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask) << 0;
	170	result |= read16le_with_read8_device_handler(handler, device, space, offset * 2 + 0, mem_mask) << 0;
171	171	if (ACCESSING_BITS_16_31)
172		result |= read16le_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask >> 16) << 16;
	172	result |= read16le_with_read8_device_handler(handler, device, space, offset * 2 + 1, mem_mask >> 16) << 16;
173	173	return result;
174	174	}
175	175
176	176
177		INLINE void write32le_with_write8_device_handler(write8_device_func handler, device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask)
	177	INLINE void write32le_with_write8_device_handler(write8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
178	178	{
179	179	if (ACCESSING_BITS_0_15)
180		write16le_with_write8_device_handler(handler, device, offset * 2 + 0, data, mem_mask);
	180	write16le_with_write8_device_handler(handler, device, space, offset * 2 + 0, data, mem_mask);
181	181	if (ACCESSING_BITS_16_31)
182		write16le_with_write8_device_handler(handler, device, offset * 2 + 1, data >> 16, mem_mask >> 16);
	182	write16le_with_write8_device_handler(handler, device, space, offset * 2 + 1, data >> 16, mem_mask >> 16);
183	183	}
184	184
185	185
r17961	r17962
189	189	*
190	190	*************************************/
191	191
192		INLINE UINT32 read32be_with_16be_device_handler(read16_device_func handler, device_t *device, offs_t offset, UINT32 mem_mask)
	192	INLINE UINT32 read32be_with_16be_device_handler(read16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 mem_mask)
193	193	{
194	194	UINT32 result = 0;
195	195	if (ACCESSING_BITS_16_31)
196		result |= (*handler)(device, offset * 2 + 0, mem_mask >> 16) << 16;
	196	result |= (*handler)(device, space, offset * 2 + 0, mem_mask >> 16) << 16;
197	197	if (ACCESSING_BITS_0_15)
198		result |= (*handler)(device, offset * 2 + 1, mem_mask) << 0;
	198	result |= (*handler)(device, space, offset * 2 + 1, mem_mask) << 0;
199	199	return result;
200	200	}
201	201
202	202
203		INLINE void write32be_with_16be_device_handler(write16_device_func handler, device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask)
	203	INLINE void write32be_with_16be_device_handler(write16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
204	204	{
205	205	if (ACCESSING_BITS_16_31)
206		(*handler)(device, offset * 2 + 0, data >> 16, mem_mask >> 16);
	206	(*handler)(device, space, offset * 2 + 0, data >> 16, mem_mask >> 16);
207	207	if (ACCESSING_BITS_0_15)
208		(*handler)(device, offset * 2 + 1, data, mem_mask);
	208	(*handler)(device, space, offset * 2 + 1, data, mem_mask);
209	209	}
210	210
211	211
r17961	r17962
215	215	*
216	216	*************************************/
217	217
218		INLINE UINT32 read32le_with_16le_device_handler(read16_device_func handler, device_t *device, offs_t offset, UINT32 mem_mask)
	218	INLINE UINT32 read32le_with_16le_device_handler(read16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 mem_mask)
219	219	{
220	220	UINT32 result = 0;
221	221	if (ACCESSING_BITS_0_15)
222		result |= (*handler)(device, offset * 2 + 0, mem_mask) << 0;
	222	result |= (*handler)(device, space, offset * 2 + 0, mem_mask) << 0;
223	223	if (ACCESSING_BITS_16_31)
224		result |= (*handler)(device, offset * 2 + 1, mem_mask >> 16) << 16;
	224	result |= (*handler)(device, space, offset * 2 + 1, mem_mask >> 16) << 16;
225	225	return result;
226	226	}
227	227
228	228
229		INLINE void write32le_with_16le_device_handler(write16_device_func handler, device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask)
	229	INLINE void write32le_with_16le_device_handler(write16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
230	230	{
231	231	if (ACCESSING_BITS_0_15)
232		(*handler)(device, offset * 2 + 0, data, mem_mask);
	232	(*handler)(device, space, offset * 2 + 0, data, mem_mask);
233	233	if (ACCESSING_BITS_16_31)
234		(*handler)(device, offset * 2 + 1, data >> 16, mem_mask >> 16);
	234	(*handler)(device, space, offset * 2 + 1, data >> 16, mem_mask >> 16);
235	235	}
236	236
237	237
r17961	r17962
241	241	*
242	242	*************************************/
243	243
244		INLINE UINT32 read32be_with_16le_device_handler(read16_device_func handler, device_t *device, offs_t offset, UINT32 mem_mask)
	244	INLINE UINT32 read32be_with_16le_device_handler(read16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 mem_mask)
245	245	{
246	246	UINT32 result = 0;
247	247	mem_mask = FLIPENDIAN_INT32(mem_mask);
248		result = read32le_with_16le_device_handler(handler, device, offset, mem_mask);
	248	result = read32le_with_16le_device_handler(handler, device, space, offset, mem_mask);
249	249	return FLIPENDIAN_INT32(result);
250	250	}
251	251
252	252
253		INLINE void write32be_with_16le_device_handler(write16_device_func handler, device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask)
	253	INLINE void write32be_with_16le_device_handler(write16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
254	254	{
255	255	data = FLIPENDIAN_INT32(data);
256	256	mem_mask = FLIPENDIAN_INT32(mem_mask);
257		write32le_with_16le_device_handler(handler, device, offset, data, mem_mask);
	257	write32le_with_16le_device_handler(handler, device, space, offset, data, mem_mask);
258	258	}
259	259
260	260
r17961	r17962
264	264	*
265	265	*************************************/
266	266
267		INLINE UINT32 read32le_with_16be_device_handler(read16_device_func handler, device_t *device, offs_t offset, UINT32 mem_mask)
	267	INLINE UINT32 read32le_with_16be_device_handler(read16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 mem_mask)
268	268	{
269	269	UINT32 result = 0;
270	270	mem_mask = FLIPENDIAN_INT32(mem_mask);
271		result = read32be_with_16be_device_handler(handler, device, offset, mem_mask);
	271	result = read32be_with_16be_device_handler(handler, device, space, offset, mem_mask);
272	272	return FLIPENDIAN_INT32(result);
273	273	}
274	274
275	275
276		INLINE void write32le_with_16be_device_handler(write16_device_func handler, device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask)
	276	INLINE void write32le_with_16be_device_handler(write16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT32 data, UINT32 mem_mask)
277	277	{
278	278	data = FLIPENDIAN_INT32(data);
279	279	mem_mask = FLIPENDIAN_INT32(mem_mask);
280		write32be_with_16be_device_handler(handler, device, offset, data, mem_mask);
	280	write32be_with_16be_device_handler(handler, device, space, offset, data, mem_mask);
281	281	}
282	282
283	283
r17961	r17962
287	287	*
288	288	*************************************/
289	289
290		INLINE UINT64 read64be_with_read8_device_handler(read8_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	290	INLINE UINT64 read64be_with_read8_device_handler(read8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
291	291	{
292	292	UINT64 result = 0;
293	293	if (ACCESSING_BITS_32_63)
294		result |= (UINT64)read32be_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32;
	294	result |= (UINT64)read32be_with_read8_device_handler(handler, device, space, offset * 2 + 0, mem_mask >> 32) << 32;
295	295	if (ACCESSING_BITS_0_31)
296		result |= (UINT64)read32be_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask) << 0;
	296	result |= (UINT64)read32be_with_read8_device_handler(handler, device, space, offset * 2 + 1, mem_mask) << 0;
297	297	return result;
298	298	}
299	299
300	300
301		INLINE void write64be_with_write8_device_handler(write8_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	301	INLINE void write64be_with_write8_device_handler(write8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
302	302	{
303	303	if (ACCESSING_BITS_32_63)
304		write32be_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32);
	304	write32be_with_write8_device_handler(handler, device, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
305	305	if (ACCESSING_BITS_0_31)
306		write32be_with_write8_device_handler(handler, device, offset * 2 + 1, data, mem_mask);
	306	write32be_with_write8_device_handler(handler, device, space, offset * 2 + 1, data, mem_mask);
307	307	}
308	308
309	309
r17961	r17962
313	313	*
314	314	*************************************/
315	315
316		INLINE UINT64 read64le_with_read8_device_handler(read8_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	316	INLINE UINT64 read64le_with_read8_device_handler(read8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
317	317	{
318	318	UINT64 result = 0;
319	319	if (ACCESSING_BITS_0_31)
320		result |= (UINT64)read32le_with_read8_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0;
	320	result |= (UINT64)read32le_with_read8_device_handler(handler, device, space, offset * 2 + 0, mem_mask >> 0) << 0;
321	321	if (ACCESSING_BITS_32_63)
322		result |= (UINT64)read32le_with_read8_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32;
	322	result |= (UINT64)read32le_with_read8_device_handler(handler, device, space, offset * 2 + 1, mem_mask >> 32) << 32;
323	323	return result;
324	324	}
325	325
326	326
327		INLINE void write64le_with_write8_device_handler(write8_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	327	INLINE void write64le_with_write8_device_handler(write8_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
328	328	{
329	329	if (ACCESSING_BITS_0_31)
330		write32le_with_write8_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0);
	330	write32le_with_write8_device_handler(handler, device, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
331	331	if (ACCESSING_BITS_32_63)
332		write32le_with_write8_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32);
	332	write32le_with_write8_device_handler(handler, device, space, offset * 2 + 1, data >> 32, mem_mask >> 32);
333	333	}
334	334
335	335
r17961	r17962
339	339	*
340	340	*************************************/
341	341
342		INLINE UINT32 read64be_with_16be_device_handler(read16_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	342	INLINE UINT32 read64be_with_16be_device_handler(read16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
343	343	{
344	344	UINT64 result = 0;
345	345	if (ACCESSING_BITS_32_63)
346		result |= (UINT64)read32be_with_16be_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32;
	346	result |= (UINT64)read32be_with_16be_device_handler(handler, device, space, offset * 2 + 0, mem_mask >> 32) << 32;
347	347	if (ACCESSING_BITS_0_31)
348		result |= (UINT64)read32be_with_16be_device_handler(handler, device, offset * 2 + 1, mem_mask >> 0) << 0;
	348	result |= (UINT64)read32be_with_16be_device_handler(handler, device, space, offset * 2 + 1, mem_mask >> 0) << 0;
349	349	return result;
350	350	}
351	351
352	352
353		INLINE void write64be_with_16be_device_handler(write16_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	353	INLINE void write64be_with_16be_device_handler(write16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
354	354	{
355	355	if (ACCESSING_BITS_32_63)
356		write32be_with_16be_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32);
	356	write32be_with_16be_device_handler(handler, device, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
357	357	if (ACCESSING_BITS_0_31)
358		write32be_with_16be_device_handler(handler, device, offset * 2 + 1, data >> 0, mem_mask >> 0);
	358	write32be_with_16be_device_handler(handler, device, space, offset * 2 + 1, data >> 0, mem_mask >> 0);
359	359	}
360	360
361	361
r17961	r17962
365	365	*
366	366	*************************************/
367	367
368		INLINE UINT32 read64le_with_16le_device_handler(read16_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	368	INLINE UINT32 read64le_with_16le_device_handler(read16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
369	369	{
370	370	UINT64 result = 0;
371	371	if (ACCESSING_BITS_0_31)
372		result |= (UINT64)read32le_with_16le_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0;
	372	result |= (UINT64)read32le_with_16le_device_handler(handler, device, space, offset * 2 + 0, mem_mask >> 0) << 0;
373	373	if (ACCESSING_BITS_32_63)
374		result |= (UINT64)read32le_with_16le_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32;
	374	result |= (UINT64)read32le_with_16le_device_handler(handler, device, space, offset * 2 + 1, mem_mask >> 32) << 32;
375	375	return result;
376	376	}
377	377
378	378
379		INLINE void write64le_with_16le_device_handler(write16_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	379	INLINE void write64le_with_16le_device_handler(write16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
380	380	{
381	381	if (ACCESSING_BITS_0_31)
382		write32le_with_16le_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0);
	382	write32le_with_16le_device_handler(handler, device, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
383	383	if (ACCESSING_BITS_32_63)
384		write32le_with_16le_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32);
	384	write32le_with_16le_device_handler(handler, device, space, offset * 2 + 1, data >> 32, mem_mask >> 32);
385	385	}
386	386
387	387
r17961	r17962
391	391	*
392	392	*************************************/
393	393
394		INLINE UINT32 read64be_with_16le_device_handler(read16_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	394	INLINE UINT32 read64be_with_16le_device_handler(read16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
395	395	{
396	396	UINT64 result = 0;
397	397	if (ACCESSING_BITS_32_63)
398		result |= (UINT64)read32be_with_16le_device_handler(handler, device, offset * 2 + 0, mem_mask >> 32) << 32;
	398	result |= (UINT64)read32be_with_16le_device_handler(handler, device, space, offset * 2 + 0, mem_mask >> 32) << 32;
399	399	if (ACCESSING_BITS_0_31)
400		result |= (UINT64)read32be_with_16le_device_handler(handler, device, offset * 2 + 1, mem_mask >> 0) << 0;
	400	result |= (UINT64)read32be_with_16le_device_handler(handler, device, space, offset * 2 + 1, mem_mask >> 0) << 0;
401	401	return result;
402	402	}
403	403
404	404
405		INLINE void write64be_with_16le_device_handler(write16_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	405	INLINE void write64be_with_16le_device_handler(write16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
406	406	{
407	407	if (ACCESSING_BITS_32_63)
408		write32be_with_16le_device_handler(handler, device, offset * 2 + 0, data >> 32, mem_mask >> 32);
	408	write32be_with_16le_device_handler(handler, device, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
409	409	if (ACCESSING_BITS_0_31)
410		write32be_with_16le_device_handler(handler, device, offset * 2 + 1, data >> 0, mem_mask >> 0);
	410	write32be_with_16le_device_handler(handler, device, space, offset * 2 + 1, data >> 0, mem_mask >> 0);
411	411	}
412	412
413	413
r17961	r17962
417	417	*
418	418	*************************************/
419	419
420		INLINE UINT32 read64le_with_16be_device_handler(read16_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	420	INLINE UINT32 read64le_with_16be_device_handler(read16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
421	421	{
422	422	UINT64 result = 0;
423	423	if (ACCESSING_BITS_0_31)
424		result |= (UINT64)read32le_with_16be_device_handler(handler, device, offset * 2 + 0, mem_mask >> 0) << 0;
	424	result |= (UINT64)read32le_with_16be_device_handler(handler, device, space, offset * 2 + 0, mem_mask >> 0) << 0;
425	425	if (ACCESSING_BITS_32_63)
426		result |= (UINT64)read32le_with_16be_device_handler(handler, device, offset * 2 + 1, mem_mask >> 32) << 32;
	426	result |= (UINT64)read32le_with_16be_device_handler(handler, device, space, offset * 2 + 1, mem_mask >> 32) << 32;
427	427	return result;
428	428	}
429	429
430	430
431		INLINE void write64le_with_16be_device_handler(write16_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	431	INLINE void write64le_with_16be_device_handler(write16_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
432	432	{
433	433	if (ACCESSING_BITS_0_31)
434		write32le_with_16be_device_handler(handler, device, offset * 2 + 0, data >> 0, mem_mask >> 0);
	434	write32le_with_16be_device_handler(handler, device, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
435	435	if (ACCESSING_BITS_32_63)
436		write32le_with_16be_device_handler(handler, device, offset * 2 + 1, data >> 32, mem_mask >> 32);
	436	write32le_with_16be_device_handler(handler, device, space, offset * 2 + 1, data >> 32, mem_mask >> 32);
437	437	}
438	438
439	439
r17961	r17962
443	443	*
444	444	*************************************/
445	445
446		INLINE UINT64 read64be_with_32be_device_handler(read32_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	446	INLINE UINT64 read64be_with_32be_device_handler(read32_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
447	447	{
448	448	UINT64 result = 0;
449	449	if (ACCESSING_BITS_32_63)
450		result |= (UINT64)(*handler)(device, offset * 2 + 0, mem_mask >> 32) << 32;
	450	result |= (UINT64)(*handler)(device, space, offset * 2 + 0, mem_mask >> 32) << 32;
451	451	if (ACCESSING_BITS_0_31)
452		result |= (UINT64)(*handler)(device, offset * 2 + 1, mem_mask >> 0) << 0;
	452	result |= (UINT64)(*handler)(device, space, offset * 2 + 1, mem_mask >> 0) << 0;
453	453	return result;
454	454	}
455	455
456	456
457		INLINE void write64be_with_32be_device_handler(write32_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	457	INLINE void write64be_with_32be_device_handler(write32_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
458	458	{
459	459	if (ACCESSING_BITS_32_63)
460		(*handler)(device, offset * 2 + 0, data >> 32, mem_mask >> 32);
	460	(*handler)(device, space, offset * 2 + 0, data >> 32, mem_mask >> 32);
461	461	if (ACCESSING_BITS_0_31)
462		(*handler)(device, offset * 2 + 1, data >>  0, mem_mask >>  0);
	462	(*handler)(device, space, offset * 2 + 1, data >>  0, mem_mask >>  0);
463	463	}
464	464
465	465
r17961	r17962
469	469	*
470	470	*************************************/
471	471
472		INLINE UINT64 read64le_with_32le_device_handler(read32_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	472	INLINE UINT64 read64le_with_32le_device_handler(read32_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
473	473	{
474	474	UINT64 result = 0;
475	475	if (ACCESSING_BITS_0_31)
476		result |= (UINT64)(*handler)(device, offset * 2 + 0, mem_mask >> 0) << 0;
	476	result |= (UINT64)(*handler)(device, space, offset * 2 + 0, mem_mask >> 0) << 0;
477	477	if (ACCESSING_BITS_32_63)
478		result |= (UINT64)(*handler)(device, offset * 2 + 1, mem_mask >> 32) << 32;
	478	result |= (UINT64)(*handler)(device, space, offset * 2 + 1, mem_mask >> 32) << 32;
479	479	return result;
480	480	}
481	481
482	482
483		INLINE void write64le_with_32le_device_handler(write32_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	483	INLINE void write64le_with_32le_device_handler(write32_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
484	484	{
485	485	if (ACCESSING_BITS_0_31)
486		(*handler)(device, offset * 2 + 0, data >> 0, mem_mask >> 0);
	486	(*handler)(device, space, offset * 2 + 0, data >> 0, mem_mask >> 0);
487	487	if (ACCESSING_BITS_32_63)
488		(*handler)(device, offset * 2 + 1, data >> 32, mem_mask >> 32);
	488	(*handler)(device, space, offset * 2 + 1, data >> 32, mem_mask >> 32);
489	489	}
490	490
491	491
r17961	r17962
495	495	*
496	496	*************************************/
497	497
498		INLINE UINT64 read64be_with_32le_device_handler(read32_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	498	INLINE UINT64 read64be_with_32le_device_handler(read32_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
499	499	{
500	500	UINT64 result;
501	501	mem_mask = FLIPENDIAN_INT64(mem_mask);
502		result = read64le_with_32le_device_handler(handler, device, offset, mem_mask);
	502	result = read64le_with_32le_device_handler(handler, device, space, offset, mem_mask);
503	503	return FLIPENDIAN_INT64(result);
504	504	}
505	505
506	506
507		INLINE void write64be_with_32le_device_handler(write32_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	507	INLINE void write64be_with_32le_device_handler(write32_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
508	508	{
509	509	data = FLIPENDIAN_INT64(data);
510	510	mem_mask = FLIPENDIAN_INT64(mem_mask);
511		write64le_with_32le_device_handler(handler, device, offset, data, mem_mask);
	511	write64le_with_32le_device_handler(handler, device, space, offset, data, mem_mask);
512	512	}
513	513
514	514
r17961	r17962
518	518	*
519	519	*************************************/
520	520
521		INLINE UINT64 read64le_with_32be_device_handler(read32_device_func handler, device_t *device, offs_t offset, UINT64 mem_mask)
	521	INLINE UINT64 read64le_with_32be_device_handler(read32_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 mem_mask)
522	522	{
523	523	UINT64 result;
524	524	mem_mask = FLIPENDIAN_INT64(mem_mask);
525		result = read64be_with_32be_device_handler(handler, device, offset, mem_mask);
	525	result = read64be_with_32be_device_handler(handler, device, space, offset, mem_mask);
526	526	return FLIPENDIAN_INT64(result);
527	527	}
528	528
529	529
530		INLINE void write64le_with_32be_device_handler(write32_device_func handler, device_t *device, offs_t offset, UINT64 data, UINT64 mem_mask)
	530	INLINE void write64le_with_32be_device_handler(write32_device_func handler, device_t *device, address_space &space, offs_t offset, UINT64 data, UINT64 mem_mask)
531	531	{
532	532	data = FLIPENDIAN_INT64(data);
533	533	mem_mask = FLIPENDIAN_INT64(mem_mask);
534		write64be_with_32be_device_handler(handler, device, offset, data, mem_mask);
	534	write64be_with_32be_device_handler(handler, device, space, offset, data, mem_mask);
535	535	}
536	536
537	537
r17961	r17962
545	545	#define DEV_READ_TEMPLATE(bits, name, handler, func)            \
546	546	READ##bits##_DEVICE_HANDLER( name##_r )                        \
547	547	{                                                   \
548		return func(handler, device, offset, mem_mask);               \
	548	return func(handler, device, space, offset, mem_mask);         \
549	549	}
550	550
551	551	#define DEV_READ_TEMPLATE_COND(bits, name, handler, func, cond)      \
552	552	READ##bits##_DEVICE_HANDLER( name##_r )                        \
553	553	{                                                   \
554	554	if (cond)                                          \
555		return func(handler, device, offset, mem_mask);            \
	555	return func(handler, device, space, offset, mem_mask);      \
556	556	return 0;                                          \
557	557	}
558	558
559	559	#define DEV_WRITE_TEMPLATE(bits, name, handler, func)            \
560	560	WRITE##bits##_DEVICE_HANDLER( name##_w )                     \
561	561	{                                                   \
562		func(handler, device, offset, data, mem_mask);               \
	562	func(handler, device, space, offset, data, mem_mask);         \
563	563	}
564	564
565	565	#define DEV_WRITE_TEMPLATE_COND(bits, name, handler, func, cond)   \
566	566	WRITE##bits##_DEVICE_HANDLER( name##_w )                     \
567	567	{                                                   \
568	568	if (cond)                                          \
569		func(handler, device, offset, data, mem_mask);            \
	569	func(handler, device, space, offset, data, mem_mask);      \
570	570	}
571	571
572	572

trunk/src/emu/imagedev/flopdrv.h

r17961	r17962
155	155	WRITE_LINE_DEVICE_HANDLER( floppy_ds1_w );
156	156	WRITE_LINE_DEVICE_HANDLER( floppy_ds2_w );
157	157	WRITE_LINE_DEVICE_HANDLER( floppy_ds3_w );
158		WRITE8_DEVICE_HANDLER( floppy_ds_w );
	158	DECLARE_WRITE8_DEVICE_HANDLER( floppy_ds_w );
159	159
160	160	WRITE_LINE_DEVICE_HANDLER( floppy_mon_w );
161	161	WRITE_LINE_DEVICE_HANDLER( floppy_drtn_w );

trunk/src/emu/memory.c

r17961	r17962
1998	1998	}
1999	1999	break;
2000	2000
2001		case AMH_LEGACY_DEVICE_HANDLER:
2002		target_device = device().siblingdevice(data.m_tag);
2003		if (target_device == NULL)
2004		fatalerror("Attempted to map a non-existent device '%s' in space %s of device '%s'\n", data.m_tag.cstr(), m_name, m_device.tag());
2005
2006		if (readorwrite == ROW_READ)
2007		switch (data.m_bits)
2008		{
2009		case 8:      install_legacy_read_handler(*target_device, entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rdevice8, data.m_name, data.m_mask);   break;
2010		case 16:   install_legacy_read_handler(*target_device, entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rdevice16, data.m_name, data.m_mask);   break;
2011		case 32:   install_legacy_read_handler(*target_device, entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rdevice32, data.m_name, data.m_mask);   break;
2012		case 64:   install_legacy_read_handler(*target_device, entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_rdevice64, data.m_name, data.m_mask);   break;
2013		}
2014		else
2015		switch (data.m_bits)
2016		{
2017		case 8:      install_legacy_write_handler(*target_device, entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wdevice8, data.m_name, data.m_mask);   break;
2018		case 16:   install_legacy_write_handler(*target_device, entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wdevice16, data.m_name, data.m_mask);   break;
2019		case 32:   install_legacy_write_handler(*target_device, entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wdevice32, data.m_name, data.m_mask);   break;
2020		case 64:   install_legacy_write_handler(*target_device, entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror, entry.m_wdevice64, data.m_name, data.m_mask);   break;
2021		}
2022		break;
2023
2024	2001	case AMH_PORT:
2025	2002	install_readwrite_port(entry.m_addrstart, entry.m_addrend, entry.m_addrmask, entry.m_addrmirror,
2026	2003	(readorwrite == ROW_READ) ? data.m_tag.cstr() : NULL,

trunk/src/emu/memory.h

r17961	r17962
122	122	typedef void   (*write64_space_func)(ATTR_UNUSED address_space *space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
123	123
124	124	// legacy device read/write handlers
125		typedef UINT8   (*read8_device_func)  (ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset);
126		typedef void   (*write8_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data);
127		typedef UINT16   (*read16_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
128		typedef void   (*write16_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
129		typedef UINT32   (*read32_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
130		typedef void   (*write32_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
131		typedef UINT64   (*read64_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
132		typedef void   (*write64_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
	125	typedef UINT8   (*read8_device_func)  (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask);
	126	typedef void   (*write8_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask);
	127	typedef UINT16   (*read16_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask);
	128	typedef void   (*write16_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask);
	129	typedef UINT32   (*read32_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask);
	130	typedef void   (*write32_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask);
	131	typedef UINT64   (*read64_device_func) (ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask);
	132	typedef void   (*write64_device_func)(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask);
133	133
134	134
135	135	// struct with function pointers for accessors; use is generally discouraged unless necessary
r17961	r17962
887	887
888	888
889	889	// device read/write handler function macros
890		#define READ8_DEVICE_HANDLER(name)      UINT8  name(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset)
891		#define WRITE8_DEVICE_HANDLER(name)    void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data)
892		#define READ16_DEVICE_HANDLER(name)      UINT16 name(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
893		#define WRITE16_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
894		#define READ32_DEVICE_HANDLER(name)      UINT32 name(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
895		#define WRITE32_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
896		#define READ64_DEVICE_HANDLER(name)      UINT64 name(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
897		#define WRITE64_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
	890	#define READ8_DEVICE_HANDLER(name)      UINT8  name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
	891	#define WRITE8_DEVICE_HANDLER(name)    void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)
	892	#define READ16_DEVICE_HANDLER(name)      UINT16 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask)
	893	#define WRITE16_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask)
	894	#define READ32_DEVICE_HANDLER(name)      UINT32 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask)
	895	#define WRITE32_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask)
	896	#define READ64_DEVICE_HANDLER(name)      UINT64 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask)
	897	#define WRITE64_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask)
898	898
	899	#define DECLARE_READ8_DEVICE_HANDLER(name)      UINT8  name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask = 0xff)
	900	#define DECLARE_WRITE8_DEVICE_HANDLER(name)    void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask = 0xff)
	901	#define DECLARE_READ16_DEVICE_HANDLER(name)      UINT16 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 mem_mask = 0xffff)
	902	#define DECLARE_WRITE16_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT16 data, ATTR_UNUSED UINT16 mem_mask = 0xffff)
	903	#define DECLARE_READ32_DEVICE_HANDLER(name)      UINT32 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
	904	#define DECLARE_WRITE32_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT32 data, ATTR_UNUSED UINT32 mem_mask = 0xffffffff)
	905	#define DECLARE_READ64_DEVICE_HANDLER(name)      UINT64 name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
	906	#define DECLARE_WRITE64_DEVICE_HANDLER(name)   void   name(ATTR_UNUSED device_t *device, ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT64 data, ATTR_UNUSED UINT64 mem_mask = U64(0xffffffffffffffff))
899	907
	908
900	909	// space read/write handler function macros
901	910	#define READ8_MEMBER(name)            UINT8  name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 mem_mask)
902	911	#define WRITE8_MEMBER(name)            void   name(ATTR_UNUSED address_space &space, ATTR_UNUSED offs_t offset, ATTR_UNUSED UINT8 data, ATTR_UNUSED UINT8 mem_mask)

trunk/src/emu/machine/timekpr.h

r17961	r17962
154	154	//  READ/WRITE HANDLERS
155	155	//**************************************************************************
156	156
157		WRITE8_DEVICE_HANDLER( timekeeper_w );
158		READ8_DEVICE_HANDLER( timekeeper_r );
	157	DECLARE_WRITE8_DEVICE_HANDLER( timekeeper_w );
	158	DECLARE_READ8_DEVICE_HANDLER( timekeeper_r );
159	159
160	160	#endif // __TIMEKPR_H__

trunk/src/emu/machine/adc1213x.h

r17961	r17962
82	82	PROTOTYPES
83	83	***************************************************************************/
84	84
85		extern WRITE8_DEVICE_HANDLER( adc1213x_di_w );
86		extern WRITE8_DEVICE_HANDLER( adc1213x_cs_w );
87		extern WRITE8_DEVICE_HANDLER( adc1213x_sclk_w );
88		extern WRITE8_DEVICE_HANDLER( adc1213x_conv_w );
89		extern READ8_DEVICE_HANDLER( adc1213x_do_r );
90		extern READ8_DEVICE_HANDLER( adc1213x_eoc_r );
	85	extern DECLARE_WRITE8_DEVICE_HANDLER( adc1213x_di_w );
	86	extern DECLARE_WRITE8_DEVICE_HANDLER( adc1213x_cs_w );
	87	extern DECLARE_WRITE8_DEVICE_HANDLER( adc1213x_sclk_w );
	88	extern DECLARE_WRITE8_DEVICE_HANDLER( adc1213x_conv_w );
	89	extern DECLARE_READ8_DEVICE_HANDLER( adc1213x_do_r );
	90	extern DECLARE_READ8_DEVICE_HANDLER( adc1213x_eoc_r );
91	91
92	92	#endif   /* __ADC1213X_H__ */

trunk/src/emu/machine/z80dma.h

r17961	r17962
168	168	//**************************************************************************
169	169
170	170	// register access
171		READ8_DEVICE_HANDLER( z80dma_r );
172		WRITE8_DEVICE_HANDLER( z80dma_w );
	171	DECLARE_READ8_DEVICE_HANDLER( z80dma_r );
	172	DECLARE_WRITE8_DEVICE_HANDLER( z80dma_w );
173	173
174	174	// ready
175	175	WRITE_LINE_DEVICE_HANDLER( z80dma_rdy_w );

trunk/src/emu/machine/tms6100.h

r17961	r17962
10	10	WRITE_LINE_DEVICE_HANDLER( tms6100_m0_w );
11	11	WRITE_LINE_DEVICE_HANDLER( tms6100_m1_w );
12	12	WRITE_LINE_DEVICE_HANDLER( tms6100_romclock_w );
13		WRITE8_DEVICE_HANDLER( tms6100_addr_w );
	13	DECLARE_WRITE8_DEVICE_HANDLER( tms6100_addr_w );
14	14
15	15	READ_LINE_DEVICE_HANDLER( tms6100_data_r );
16	16

trunk/src/emu/machine/ins8154.h

r17961	r17962
116	116	PROTOTYPES
117	117	***************************************************************************/
118	118
119		READ8_DEVICE_HANDLER( ins8154_r );
120		WRITE8_DEVICE_HANDLER( ins8154_w );
	119	DECLARE_READ8_DEVICE_HANDLER( ins8154_r );
	120	DECLARE_WRITE8_DEVICE_HANDLER( ins8154_w );
121	121
122		WRITE8_DEVICE_HANDLER( ins8154_porta_w );
123		WRITE8_DEVICE_HANDLER( ins8154_portb_w );
	122	DECLARE_WRITE8_DEVICE_HANDLER( ins8154_porta_w );
	123	DECLARE_WRITE8_DEVICE_HANDLER( ins8154_portb_w );
124	124
125	125
126	126	#endif /* __INS8154_H__ */

trunk/src/emu/machine/smc91c9x.h

r17961	r17962
44	44	FUNCTION PROTOTYPES
45	45	***************************************************************************/
46	46
47		READ16_DEVICE_HANDLER( smc91c9x_r );
48		WRITE16_DEVICE_HANDLER( smc91c9x_w );
	47	DECLARE_READ16_DEVICE_HANDLER( smc91c9x_r );
	48	DECLARE_WRITE16_DEVICE_HANDLER( smc91c9x_w );
49	49
50	50
51	51	/* ----- device interface ----- */

trunk/src/emu/machine/z80sti.h

r17961	r17962
183	183	//**************************************************************************
184	184
185	185	// register access
186		READ8_DEVICE_HANDLER( z80sti_r );
187		WRITE8_DEVICE_HANDLER( z80sti_w );
	186	DECLARE_READ8_DEVICE_HANDLER( z80sti_r );
	187	DECLARE_WRITE8_DEVICE_HANDLER( z80sti_w );
188	188
189	189	// receive clock
190	190	WRITE_LINE_DEVICE_HANDLER( z80sti_rc_w );

trunk/src/emu/machine/f3853.h

r17961	r17962
120	120	PROTOTYPES
121	121	***************************************************************************/
122	122
123		READ8_DEVICE_HANDLER( f3853_r );
124		WRITE8_DEVICE_HANDLER( f3853_w );
	123	DECLARE_READ8_DEVICE_HANDLER( f3853_r );
	124	DECLARE_WRITE8_DEVICE_HANDLER( f3853_w );
125	125
126	126	void f3853_set_external_interrupt_in_line(device_t *device, int level);
127	127	void f3853_set_priority_in_line(device_t *device, int level);

trunk/src/emu/machine/i8243.h

r17961	r17962
88	88	PROTOTYPES
89	89	***************************************************************************/
90	90
91		READ8_DEVICE_HANDLER( i8243_p2_r );
92		WRITE8_DEVICE_HANDLER( i8243_p2_w );
	91	DECLARE_READ8_DEVICE_HANDLER( i8243_p2_r );
	92	DECLARE_WRITE8_DEVICE_HANDLER( i8243_p2_w );
93	93
94		WRITE8_DEVICE_HANDLER( i8243_prog_w );
	94	DECLARE_WRITE8_DEVICE_HANDLER( i8243_prog_w );
95	95
96	96
97	97	#endif  /* __I8243_H__ */

trunk/src/emu/machine/k056230.h

r17961	r17962
80	80	PROTOTYPES
81	81	***************************************************************************/
82	82
83		extern READ32_DEVICE_HANDLER( lanc_ram_r );
84		extern WRITE32_DEVICE_HANDLER( lanc_ram_w );
85		extern READ8_DEVICE_HANDLER( k056230_r );
86		extern WRITE8_DEVICE_HANDLER( k056230_w );
	83	extern DECLARE_READ32_DEVICE_HANDLER( lanc_ram_r );
	84	extern DECLARE_WRITE32_DEVICE_HANDLER( lanc_ram_w );
	85	extern DECLARE_READ8_DEVICE_HANDLER( k056230_r );
	86	extern DECLARE_WRITE8_DEVICE_HANDLER( k056230_w );
87	87
88	88
89	89	#endif   /* __K056230_H__ */

trunk/src/emu/machine/z80dart.c

r17961	r17962
1452	1452
1453	1453	READ8_DEVICE_HANDLER( z80dart_cd_ba_r )
1454	1454	{
1455		return (offset & 2) ? z80dart_c_r(device, offset & 1) : z80dart_d_r(device, offset & 1);
	1455	return (offset & 2) ? z80dart_c_r(device, space, offset & 1) : z80dart_d_r(device, space, offset & 1);
1456	1456	}
1457	1457
1458	1458	WRITE8_DEVICE_HANDLER( z80dart_cd_ba_w )
1459	1459	{
1460	1460	if (offset & 2)
1461		z80dart_c_w(device, offset & 1, data);
	1461	z80dart_c_w(device, space, offset & 1, data);
1462	1462	else
1463		z80dart_d_w(device, offset & 1, data);
	1463	z80dart_d_w(device, space, offset & 1, data);
1464	1464	}
1465	1465
1466	1466	READ8_DEVICE_HANDLER( z80dart_ba_cd_r )
1467	1467	{
1468	1468	int channel = BIT(offset, 1);
1469	1469
1470		return (offset & 1) ? z80dart_c_r(device, channel) : z80dart_d_r(device, channel);
	1470	return (offset & 1) ? z80dart_c_r(device, space, channel) : z80dart_d_r(device, space, channel);
1471	1471	}
1472	1472
1473	1473	WRITE8_DEVICE_HANDLER( z80dart_ba_cd_w )
r17961	r17962
1475	1475	int channel = BIT(offset, 1);
1476	1476
1477	1477	if (offset & 1)
1478		z80dart_c_w(device, channel, data);
	1478	z80dart_c_w(device, space, channel, data);
1479	1479	else
1480		z80dart_d_w(device, channel, data);
	1480	z80dart_d_w(device, space, channel, data);
1481	1481	}

trunk/src/emu/machine/z80dart.h

r17961	r17962
341	341	//**************************************************************************
342	342
343	343	// register access
344		READ8_DEVICE_HANDLER( z80dart_cd_ba_r );
345		WRITE8_DEVICE_HANDLER( z80dart_cd_ba_w );
	344	DECLARE_READ8_DEVICE_HANDLER( z80dart_cd_ba_r );
	345	DECLARE_WRITE8_DEVICE_HANDLER( z80dart_cd_ba_w );
346	346
347		READ8_DEVICE_HANDLER( z80dart_ba_cd_r );
348		WRITE8_DEVICE_HANDLER( z80dart_ba_cd_w );
	347	DECLARE_READ8_DEVICE_HANDLER( z80dart_ba_cd_r );
	348	DECLARE_WRITE8_DEVICE_HANDLER( z80dart_ba_cd_w );
349	349
350	350	// control register access
351		WRITE8_DEVICE_HANDLER( z80dart_c_w );
352		READ8_DEVICE_HANDLER( z80dart_c_r );
	351	DECLARE_WRITE8_DEVICE_HANDLER( z80dart_c_w );
	352	DECLARE_READ8_DEVICE_HANDLER( z80dart_c_r );
353	353
354	354	// data register access
355		WRITE8_DEVICE_HANDLER( z80dart_d_w );
356		READ8_DEVICE_HANDLER( z80dart_d_r );
	355	DECLARE_WRITE8_DEVICE_HANDLER( z80dart_d_w );
	356	DECLARE_READ8_DEVICE_HANDLER( z80dart_d_r );
357	357
358	358	// serial clocks
359	359	WRITE_LINE_DEVICE_HANDLER( z80dart_rxca_w );

trunk/src/emu/machine/pic8259.h

r17961	r17962
74	74
75	75
76	76	/* device interface */
77		READ8_DEVICE_HANDLER( pic8259_r );
78		WRITE8_DEVICE_HANDLER( pic8259_w );
	77	DECLARE_READ8_DEVICE_HANDLER( pic8259_r );
	78	DECLARE_WRITE8_DEVICE_HANDLER( pic8259_w );
79	79	int pic8259_acknowledge(device_t *device);
80	80
81	81	/* interrupt requests */

trunk/src/emu/machine/upd4701.h

r17961	r17962
44	44	PROTOTYPES
45	45	***************************************************************************/
46	46
47		extern WRITE8_DEVICE_HANDLER( upd4701_cs_w );
48		extern WRITE8_DEVICE_HANDLER( upd4701_xy_w );
49		extern WRITE8_DEVICE_HANDLER( upd4701_ul_w );
50		extern WRITE8_DEVICE_HANDLER( upd4701_resetx_w );
51		extern WRITE8_DEVICE_HANDLER( upd4701_resety_w );
52		extern WRITE16_DEVICE_HANDLER( upd4701_x_add );
53		extern WRITE16_DEVICE_HANDLER( upd4701_y_add );
54		extern WRITE8_DEVICE_HANDLER( upd4701_switches_set );
	47	extern DECLARE_WRITE8_DEVICE_HANDLER( upd4701_cs_w );
	48	extern DECLARE_WRITE8_DEVICE_HANDLER( upd4701_xy_w );
	49	extern DECLARE_WRITE8_DEVICE_HANDLER( upd4701_ul_w );
	50	extern DECLARE_WRITE8_DEVICE_HANDLER( upd4701_resetx_w );
	51	extern DECLARE_WRITE8_DEVICE_HANDLER( upd4701_resety_w );
	52	extern DECLARE_WRITE16_DEVICE_HANDLER( upd4701_x_add );
	53	extern DECLARE_WRITE16_DEVICE_HANDLER( upd4701_y_add );
	54	extern DECLARE_WRITE8_DEVICE_HANDLER( upd4701_switches_set );
55	55
56		extern READ16_DEVICE_HANDLER( upd4701_d_r );
57		extern READ8_DEVICE_HANDLER( upd4701_cf_r );
58		extern READ8_DEVICE_HANDLER( upd4701_sf_r );
	56	extern DECLARE_READ16_DEVICE_HANDLER( upd4701_d_r );
	57	extern DECLARE_READ8_DEVICE_HANDLER( upd4701_cf_r );
	58	extern DECLARE_READ8_DEVICE_HANDLER( upd4701_sf_r );
59	59
60	60
61	61	#endif   /* __UPD4701_H__ */

trunk/src/emu/machine/at28c16.h

r17961	r17962
84	84	//  READ/WRITE HANDLERS
85	85	//**************************************************************************
86	86
87		WRITE8_DEVICE_HANDLER( at28c16_w );
88		READ8_DEVICE_HANDLER( at28c16_r );
	87	DECLARE_WRITE8_DEVICE_HANDLER( at28c16_w );
	88	DECLARE_READ8_DEVICE_HANDLER( at28c16_r );
89	89	WRITE_LINE_DEVICE_HANDLER( at28c16_a9_12v );
90	90	WRITE_LINE_DEVICE_HANDLER( at28c16_oe_12v );
91	91

trunk/src/emu/machine/wd17xx.c

r17961	r17962
1993	1993
1994	1994	switch (offset & 0x03)
1995	1995	{
1996		case 0: data = wd17xx_status_r(device, 0); break;
1997		case 1:   data = wd17xx_track_r(device, 0); break;
1998		case 2:   data = wd17xx_sector_r(device, 0); break;
1999		case 3:   data = wd17xx_data_r(device, 0); break;
	1996	case 0: data = wd17xx_status_r(device, device->machine().driver_data()->generic_space(), 0); break;
	1997	case 1:   data = wd17xx_track_r(device, device->machine().driver_data()->generic_space(), 0); break;
	1998	case 2:   data = wd17xx_sector_r(device, device->machine().driver_data()->generic_space(), 0); break;
	1999	case 3:   data = wd17xx_data_r(device, device->machine().driver_data()->generic_space(), 0); break;
2000	2000	}
2001	2001
2002	2002	return data;
r17961	r17962
2006	2006	{
2007	2007	switch (offset & 0x03)
2008	2008	{
2009		case 0: wd17xx_command_w(device, 0, data); break;
2010		case 1:   wd17xx_track_w(device, 0, data);   break;
2011		case 2: wd17xx_sector_w(device, 0, data);  break;
2012		case 3: wd17xx_data_w(device, 0, data);    break;
	2009	case 0: wd17xx_command_w(device, device->machine().driver_data()->generic_space(), 0, data); break;
	2010	case 1:   wd17xx_track_w(device, device->machine().driver_data()->generic_space(), 0, data);   break;
	2011	case 2: wd17xx_sector_w(device, device->machine().driver_data()->generic_space(), 0, data);  break;
	2012	case 3: wd17xx_data_w(device, device->machine().driver_data()->generic_space(), 0, data);    break;
2013	2013	}
2014	2014	}
2015	2015

trunk/src/emu/machine/wd17xx.h

r17961	r17962
255	255	void wd17xx_set_pause_time(device_t *device, int usec);       /* default is 40 usec if not set */
256	256	void wd17xx_index_pulse_callback(device_t *controller, device_t *img, int state);
257	257
258		READ8_DEVICE_HANDLER( wd17xx_status_r );
259		READ8_DEVICE_HANDLER( wd17xx_track_r );
260		READ8_DEVICE_HANDLER( wd17xx_sector_r );
261		READ8_DEVICE_HANDLER( wd17xx_data_r );
	258	DECLARE_READ8_DEVICE_HANDLER( wd17xx_status_r );
	259	DECLARE_READ8_DEVICE_HANDLER( wd17xx_track_r );
	260	DECLARE_READ8_DEVICE_HANDLER( wd17xx_sector_r );
	261	DECLARE_READ8_DEVICE_HANDLER( wd17xx_data_r );
262	262
263		WRITE8_DEVICE_HANDLER( wd17xx_command_w );
264		WRITE8_DEVICE_HANDLER( wd17xx_track_w );
265		WRITE8_DEVICE_HANDLER( wd17xx_sector_w );
266		WRITE8_DEVICE_HANDLER( wd17xx_data_w );
	263	DECLARE_WRITE8_DEVICE_HANDLER( wd17xx_command_w );
	264	DECLARE_WRITE8_DEVICE_HANDLER( wd17xx_track_w );
	265	DECLARE_WRITE8_DEVICE_HANDLER( wd17xx_sector_w );
	266	DECLARE_WRITE8_DEVICE_HANDLER( wd17xx_data_w );
267	267
268		READ8_DEVICE_HANDLER( wd17xx_r );
269		WRITE8_DEVICE_HANDLER( wd17xx_w );
	268	DECLARE_READ8_DEVICE_HANDLER( wd17xx_r );
	269	DECLARE_WRITE8_DEVICE_HANDLER( wd17xx_w );
270	270
271	271	WRITE_LINE_DEVICE_HANDLER( wd17xx_mr_w );
272	272	WRITE_LINE_DEVICE_HANDLER( wd17xx_rdy_w );

trunk/src/emu/machine/s3c24xx.c

r17961	r17962
2686	2686	s3c24xx_t *s3c24xx = get_token( device);
2687	2687	if (s3c24xx->iface->i2s.data_w)
2688	2688	{
2689		(s3c24xx->iface->i2s.data_w)( device, ch, data, 0);
	2689	(s3c24xx->iface->i2s.data_w)( device, device->machine().driver_data()->generic_space(), ch, data, 0);
2690	2690	}
2691	2691	}
2692	2692
r17961	r17962
2949	2949	offs += 2;
2950	2950	}
2951	2951	#endif
2952		return (s3c24xx->iface->adc.data_r)( device, offs, 0);
	2952	return (s3c24xx->iface->adc.data_r)( device, device->machine().driver_data()->generic_space(), offs, 0);
2953	2953	}
2954	2954	else
2955	2955	{
r17961	r17962
3181	3181	s3c24xx_t *s3c24xx = get_token( device);
3182	3182	if (s3c24xx->iface->nand.command_w)
3183	3183	{
3184		(s3c24xx->iface->nand.command_w)( device, 0, data);
	3184	(s3c24xx->iface->nand.command_w)( device, device->machine().driver_data()->generic_space(), 0, data, 0xff);
3185	3185	}
3186	3186	}
3187	3187
r17961	r17962
3190	3190	s3c24xx_t *s3c24xx = get_token( device);
3191	3191	if (s3c24xx->iface->nand.address_w)
3192	3192	{
3193		(s3c24xx->iface->nand.address_w)( device, 0, data);
	3193	(s3c24xx->iface->nand.address_w)( device, device->machine().driver_data()->generic_space(), 0, data, 0xff);
3194	3194	}
3195	3195	}
3196	3196
r17961	r17962
3199	3199	s3c24xx_t *s3c24xx = get_token( device);
3200	3200	if (s3c24xx->iface->nand.data_r)
3201	3201	{
3202		return (s3c24xx->iface->nand.data_r)( device, 0);
	3202	return (s3c24xx->iface->nand.data_r)( device, device->machine().driver_data()->generic_space(), 0, 0xff);
3203	3203	}
3204	3204	else
3205	3205	{
r17961	r17962
3212	3212	s3c24xx_t *s3c24xx = get_token( device);
3213	3213	if (s3c24xx->iface->nand.data_w)
3214	3214	{
3215		(s3c24xx->iface->nand.data_w)( device, 0, data);
	3215	(s3c24xx->iface->nand.data_w)( device, device->machine().driver_data()->generic_space(), 0, data, 0xff);
3216	3216	}
3217	3217	}
3218	3218

trunk/src/emu/machine/latch8.c

r17961	r17962
42	42	UINT8 changed = old_val ^ latch8->value;
43	43	for (i=0; i<8; i++)
44	44	if (((changed & (1<<i)) != 0) && latch8->intf->node_map[i] != 0)
45		discrete_sound_w(device->machine().device(latch8->intf->node_device[i]), latch8->intf->node_map[i] , (latch8->value >> i) & 1);
	45	discrete_sound_w(device->machine().device(latch8->intf->node_device[i]), device->machine().driver_data()->generic_space(), latch8->intf->node_map[i] , (latch8->value >> i) & 1);
46	46	}
47	47	}
48	48
r17961	r17962
74	74	if (read_dev != NULL)
75	75	{
76	76	res &= ~( 1 << i);
77		res |= ((latch8->intf->devread[i].devread_handler(read_dev, 0) >> latch8->intf->devread[i].from_bit) & 0x01) << i;
	77	res |= ((latch8->intf->devread[i].devread_handler(read_dev, device->machine().driver_data()->generic_space(), 0, 0xff) >> latch8->intf->devread[i].from_bit) & 0x01) << i;
78	78	}
79	79	}
80	80	}
81	81	if (latch8->has_read)
82	82	{
83	83	/*  temporary hack until all relevant systems are devices */
84		address_space *space = device->machine().firstcpu->space(AS_PROGRAM);
	84	address_space *space = &device->machine().driver_data()->generic_space();
85	85	int i;
86	86	for (i=0; i<8; i++)
87	87	{

trunk/src/emu/machine/latch8.h

r17961	r17962
126	126
127	127	/* write & read full byte */
128	128
129		READ8_DEVICE_HANDLER( latch8_r );
130		WRITE8_DEVICE_HANDLER( latch8_w );
	129	DECLARE_READ8_DEVICE_HANDLER( latch8_r );
	130	DECLARE_WRITE8_DEVICE_HANDLER( latch8_w );
131	131
132	132	/* reset the latch */
133	133
134		WRITE8_DEVICE_HANDLER( latch8_reset );
	134	DECLARE_WRITE8_DEVICE_HANDLER( latch8_reset );
135	135
136	136	/* read bit x                 */
137	137	/* return (latch >> x) & 0x01 */
138	138
139		READ8_DEVICE_HANDLER( latch8_bit0_r );
140		READ8_DEVICE_HANDLER( latch8_bit1_r );
141		READ8_DEVICE_HANDLER( latch8_bit2_r );
142		READ8_DEVICE_HANDLER( latch8_bit3_r );
143		READ8_DEVICE_HANDLER( latch8_bit4_r );
144		READ8_DEVICE_HANDLER( latch8_bit5_r );
145		READ8_DEVICE_HANDLER( latch8_bit6_r );
146		READ8_DEVICE_HANDLER( latch8_bit7_r );
	139	DECLARE_READ8_DEVICE_HANDLER( latch8_bit0_r );
	140	DECLARE_READ8_DEVICE_HANDLER( latch8_bit1_r );
	141	DECLARE_READ8_DEVICE_HANDLER( latch8_bit2_r );
	142	DECLARE_READ8_DEVICE_HANDLER( latch8_bit3_r );
	143	DECLARE_READ8_DEVICE_HANDLER( latch8_bit4_r );
	144	DECLARE_READ8_DEVICE_HANDLER( latch8_bit5_r );
	145	DECLARE_READ8_DEVICE_HANDLER( latch8_bit6_r );
	146	DECLARE_READ8_DEVICE_HANDLER( latch8_bit7_r );
147	147
148	148	/* read inverted bit x        */
149	149	/* return (latch >> x) & 0x01 */
150	150
151		READ8_DEVICE_HANDLER( latch8_bit0_q_r );
152		READ8_DEVICE_HANDLER( latch8_bit1_q_r );
153		READ8_DEVICE_HANDLER( latch8_bit2_q_r );
154		READ8_DEVICE_HANDLER( latch8_bit3_q_r );
155		READ8_DEVICE_HANDLER( latch8_bit4_q_r );
156		READ8_DEVICE_HANDLER( latch8_bit5_q_r );
157		READ8_DEVICE_HANDLER( latch8_bit6_q_r );
158		READ8_DEVICE_HANDLER( latch8_bit7_q_r );
	151	DECLARE_READ8_DEVICE_HANDLER( latch8_bit0_q_r );
	152	DECLARE_READ8_DEVICE_HANDLER( latch8_bit1_q_r );
	153	DECLARE_READ8_DEVICE_HANDLER( latch8_bit2_q_r );
	154	DECLARE_READ8_DEVICE_HANDLER( latch8_bit3_q_r );
	155	DECLARE_READ8_DEVICE_HANDLER( latch8_bit4_q_r );
	156	DECLARE_READ8_DEVICE_HANDLER( latch8_bit5_q_r );
	157	DECLARE_READ8_DEVICE_HANDLER( latch8_bit6_q_r );
	158	DECLARE_READ8_DEVICE_HANDLER( latch8_bit7_q_r );
159	159
160	160	/* write bit x from data into bit determined by offset */
161	161	/* latch = (latch & ~(1<<offset)) | (((data >> x) & 0x01) << offset) */
162	162
163		WRITE8_DEVICE_HANDLER( latch8_bit0_w );
164		WRITE8_DEVICE_HANDLER( latch8_bit1_w );
165		WRITE8_DEVICE_HANDLER( latch8_bit2_w );
166		WRITE8_DEVICE_HANDLER( latch8_bit3_w );
167		WRITE8_DEVICE_HANDLER( latch8_bit4_w );
168		WRITE8_DEVICE_HANDLER( latch8_bit5_w );
169		WRITE8_DEVICE_HANDLER( latch8_bit6_w );
170		WRITE8_DEVICE_HANDLER( latch8_bit7_w );
	163	DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit0_w );
	164	DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit1_w );
	165	DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit2_w );
	166	DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit3_w );
	167	DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit4_w );
	168	DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit5_w );
	169	DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit6_w );
	170	DECLARE_WRITE8_DEVICE_HANDLER( latch8_bit7_w );
171	171
172	172	#endif /* __LATCH8_H_ */

trunk/src/emu/machine/mb14241.h

r17961	r17962
43	43	DEVICE I/O FUNCTIONS
44	44	***************************************************************************/
45	45
46		WRITE8_DEVICE_HANDLER ( mb14241_shift_count_w );
47		WRITE8_DEVICE_HANDLER ( mb14241_shift_data_w );
48		READ8_DEVICE_HANDLER( mb14241_shift_result_r );
	46	DECLARE_WRITE8_DEVICE_HANDLER ( mb14241_shift_count_w );
	47	DECLARE_WRITE8_DEVICE_HANDLER ( mb14241_shift_data_w );
	48	DECLARE_READ8_DEVICE_HANDLER( mb14241_shift_result_r );
49	49
50	50
51	51	#endif /* __MB14241_H__ */

trunk/src/emu/machine/74123.c

r17961	r17962
55	55	m_a = 0;
56	56	m_b = 0;
57	57	m_clear = 0;
58		memset(&m_output_changed_cb, 0, sizeof(m_output_changed_cb));
59	58	}
60	59	}
61	60
r17961	r17962
66	65
67	66	void ttl74123_device::device_start()
68	67	{
	68	m_output_changed.resolve(m_output_changed_cb, *this);
	69
69	70	m_timer = machine().scheduler().timer_alloc(FUNC(clear_callback), (void *)this);
70	71
71	72	/* register for state saving */
r17961	r17962
145	146
146	147	void ttl74123_device::output(INT32 param)
147	148	{
148		m_output_changed_cb(this, 0, param);
	149	m_output_changed(0, param);
149	150	}
150	151
151	152
r17961	r17962
177	178	{
178	179	int output = timer_running();
179	180
180		m_output_changed_cb(this, 0, output);
	181	m_output_changed(0, output);
181	182	}
182	183
183	184

trunk/src/emu/machine/6526cia.h

r17961	r17962
268	268	***************************************************************************/
269	269
270	270	/* register access */
271		READ8_DEVICE_HANDLER( mos6526_r );
272		WRITE8_DEVICE_HANDLER( mos6526_w );
	271	DECLARE_READ8_DEVICE_HANDLER( mos6526_r );
	272	DECLARE_WRITE8_DEVICE_HANDLER( mos6526_w );
273	273
274	274	/* port access */
275		READ8_DEVICE_HANDLER( mos6526_pa_r );
276		READ8_DEVICE_HANDLER( mos6526_pb_r );
	275	DECLARE_READ8_DEVICE_HANDLER( mos6526_pa_r );
	276	DECLARE_READ8_DEVICE_HANDLER( mos6526_pb_r );
277	277
278	278	/* interrupt request */
279	279	READ_LINE_DEVICE_HANDLER( mos6526_irq_r );

trunk/src/emu/machine/k033906.h

r17961	r17962
81	81	PROTOTYPES
82	82	***************************************************************************/
83	83
84		extern READ32_DEVICE_HANDLER( k033906_r );
85		extern WRITE32_DEVICE_HANDLER( k033906_w );
	84	extern DECLARE_READ32_DEVICE_HANDLER( k033906_r );
	85	extern DECLARE_WRITE32_DEVICE_HANDLER( k033906_w );
86	86	extern WRITE_LINE_DEVICE_HANDLER( k033906_set_reg );
87	87
88	88

trunk/src/emu/machine/74123.h

r17961	r17962
82	82	int m_a;                /* initial/constant value of the A pin */
83	83	int m_b;                /* initial/constant value of the B pin */
84	84	int m_clear;            /* initial/constant value of the Clear pin */
85		write8_device_func  m_output_changed_cb;
	85	devcb_write8  m_output_changed_cb;
86	86	};
87	87
88	88
r17961	r17962
122	122	void clear();
123	123
124	124	emu_timer *m_timer;
	125	devcb_resolved_write8 m_output_changed;
125	126	};
126	127
127	128
r17961	r17962
134	135	PROTOTYPES
135	136	***************************************************************************/
136	137
137		WRITE8_DEVICE_HANDLER( ttl74123_a_w );
138		WRITE8_DEVICE_HANDLER( ttl74123_b_w );
139		WRITE8_DEVICE_HANDLER( ttl74123_clear_w );
140		WRITE8_DEVICE_HANDLER( ttl74123_reset_w ); /* reset the latch */
	138	DECLARE_WRITE8_DEVICE_HANDLER( ttl74123_a_w );
	139	DECLARE_WRITE8_DEVICE_HANDLER( ttl74123_b_w );
	140	DECLARE_WRITE8_DEVICE_HANDLER( ttl74123_clear_w );
	141	DECLARE_WRITE8_DEVICE_HANDLER( ttl74123_reset_w ); /* reset the latch */
141	142
142	143	#endif

trunk/src/emu/machine/idectrl.h

r17961	r17962
172	172	UINT32 ide_controller_r(device_t *config, int reg, int size);
173	173	void ide_controller_w(device_t *config, int reg, int size, UINT32 data);
174	174
175		READ32_DEVICE_HANDLER( ide_controller32_r );
176		WRITE32_DEVICE_HANDLER( ide_controller32_w );
177		READ32_DEVICE_HANDLER( ide_controller32_pcmcia_r );
178		WRITE32_DEVICE_HANDLER( ide_controller32_pcmcia_w );
179		READ32_DEVICE_HANDLER( ide_bus_master32_r );
180		WRITE32_DEVICE_HANDLER( ide_bus_master32_w );
	175	DECLARE_READ32_DEVICE_HANDLER( ide_controller32_r );
	176	DECLARE_WRITE32_DEVICE_HANDLER( ide_controller32_w );
	177	DECLARE_READ32_DEVICE_HANDLER( ide_controller32_pcmcia_r );
	178	DECLARE_WRITE32_DEVICE_HANDLER( ide_controller32_pcmcia_w );
	179	DECLARE_READ32_DEVICE_HANDLER( ide_bus_master32_r );
	180	DECLARE_WRITE32_DEVICE_HANDLER( ide_bus_master32_w );
181	181
182		READ16_DEVICE_HANDLER( ide_controller16_r );
183		WRITE16_DEVICE_HANDLER( ide_controller16_w );
	182	DECLARE_READ16_DEVICE_HANDLER( ide_controller16_r );
	183	DECLARE_WRITE16_DEVICE_HANDLER( ide_controller16_w );
184	184
185	185
186	186	/* ----- device interface ----- */

trunk/src/emu/machine/68681.h

r17961	r17962
40	40	MCFG_DEVICE_CONFIG(_config)
41	41
42	42
43		READ8_DEVICE_HANDLER(duart68681_r);
44		WRITE8_DEVICE_HANDLER(duart68681_w);
	43	DECLARE_READ8_DEVICE_HANDLER(duart68681_r);
	44	DECLARE_WRITE8_DEVICE_HANDLER(duart68681_w);
45	45
46	46	void duart68681_rx_data( device_t* device, int ch, UINT8 data );
47	47

trunk/src/emu/machine/6532riot.h

r17961	r17962
121	121	PROTOTYPES
122	122	***************************************************************************/
123	123
124		READ8_DEVICE_HANDLER( riot6532_r );
125		WRITE8_DEVICE_HANDLER( riot6532_w );
	124	DECLARE_READ8_DEVICE_HANDLER( riot6532_r );
	125	DECLARE_WRITE8_DEVICE_HANDLER( riot6532_w );
126	126
127	127	void riot6532_porta_in_set(device_t *device, UINT8 data, UINT8 mask);
128	128	void riot6532_portb_in_set(device_t *device, UINT8 data, UINT8 mask);

trunk/src/emu/machine/pd4990a.h

r17961	r17962
48	48	/* this should be refactored, once RTCs get unified */
49	49	extern void upd4990a_addretrace( device_t *device );
50	50
51		extern READ8_DEVICE_HANDLER( upd4990a_testbit_r );
52		extern READ8_DEVICE_HANDLER( upd4990a_databit_r );
53		extern WRITE16_DEVICE_HANDLER( upd4990a_control_16_w );
	51	extern DECLARE_READ8_DEVICE_HANDLER( upd4990a_testbit_r );
	52	extern DECLARE_READ8_DEVICE_HANDLER( upd4990a_databit_r );
	53	extern DECLARE_WRITE16_DEVICE_HANDLER( upd4990a_control_16_w );
54	54
55	55
56	56	#endif   /*__PD4990A_H__*/

trunk/src/emu/machine/rp5h01.h

r17961	r17962
48	48	PROTOTYPES
49	49	***************************************************************************/
50	50
51		WRITE8_DEVICE_HANDLER( rp5h01_enable_w );   /* /CE */
52		WRITE8_DEVICE_HANDLER( rp5h01_reset_w );   /* RESET */
53		WRITE8_DEVICE_HANDLER( rp5h01_cs_w );   /* CS */
54		WRITE8_DEVICE_HANDLER( rp5h01_clock_w );   /* DATA CLOCK (active low) */
55		WRITE8_DEVICE_HANDLER( rp5h01_test_w );      /* TEST */
56		READ8_DEVICE_HANDLER( rp5h01_counter_r );   /* COUNTER OUT */
57		READ8_DEVICE_HANDLER( rp5h01_data_r );      /* DATA */
	51	DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_enable_w );   /* /CE */
	52	DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_reset_w );   /* RESET */
	53	DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_cs_w );   /* CS */
	54	DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_clock_w );   /* DATA CLOCK (active low) */
	55	DECLARE_WRITE8_DEVICE_HANDLER( rp5h01_test_w );      /* TEST */
	56	DECLARE_READ8_DEVICE_HANDLER( rp5h01_counter_r );   /* COUNTER OUT */
	57	DECLARE_READ8_DEVICE_HANDLER( rp5h01_data_r );      /* DATA */
58	58
59	59	#endif /* __RP5H01_H__ */

trunk/src/emu/machine/8257dma.h

r17961	r17962
147	147	***************************************************************************/
148	148
149	149	/* register access */
150		READ8_DEVICE_HANDLER( i8257_r );
151		WRITE8_DEVICE_HANDLER( i8257_w );
	150	DECLARE_READ8_DEVICE_HANDLER( i8257_r );
	151	DECLARE_WRITE8_DEVICE_HANDLER( i8257_w );
152	152
153	153	/* hold acknowledge */
154	154	WRITE_LINE_DEVICE_HANDLER( i8257_hlda_w );

trunk/src/emu/machine/s3c2410.h

r17961	r17962
63	63	extern const device_type S3C2410;
64	64
65	65
66		READ32_DEVICE_HANDLER( s3c2410_lcd_r );
	66	DECLARE_READ32_DEVICE_HANDLER( s3c2410_lcd_r );
67	67
68	68	/*******************************************************************************
69	69	TYPE DEFINITIONS

trunk/src/emu/machine/6525tpi.h

r17961	r17962
86	86	FUNCTION PROTOTYPES
87	87	***************************************************************************/
88	88
89		READ8_DEVICE_HANDLER( tpi6525_r );
90		WRITE8_DEVICE_HANDLER( tpi6525_w );
	89	DECLARE_READ8_DEVICE_HANDLER( tpi6525_r );
	90	DECLARE_WRITE8_DEVICE_HANDLER( tpi6525_w );
91	91
92		READ8_DEVICE_HANDLER( tpi6525_porta_r );
93		WRITE8_DEVICE_HANDLER( tpi6525_porta_w );
	92	DECLARE_READ8_DEVICE_HANDLER( tpi6525_porta_r );
	93	DECLARE_WRITE8_DEVICE_HANDLER( tpi6525_porta_w );
94	94
95		READ8_DEVICE_HANDLER( tpi6525_portb_r );
96		WRITE8_DEVICE_HANDLER( tpi6525_portb_w );
	95	DECLARE_READ8_DEVICE_HANDLER( tpi6525_portb_r );
	96	DECLARE_WRITE8_DEVICE_HANDLER( tpi6525_portb_w );
97	97
98		READ8_DEVICE_HANDLER( tpi6525_portc_r );
99		WRITE8_DEVICE_HANDLER( tpi6525_portc_w );
	98	DECLARE_READ8_DEVICE_HANDLER( tpi6525_portc_r );
	99	DECLARE_WRITE8_DEVICE_HANDLER( tpi6525_portc_w );
100	100
101	101	WRITE_LINE_DEVICE_HANDLER( tpi6525_i0_w );
102	102	WRITE_LINE_DEVICE_HANDLER( tpi6525_i1_w );

trunk/src/emu/machine/8237dma.h

r17961	r17962
189	189	***************************************************************************/
190	190
191	191	/* register access */
192		READ8_DEVICE_HANDLER( i8237_r );
193		WRITE8_DEVICE_HANDLER( i8237_w );
	192	DECLARE_READ8_DEVICE_HANDLER( i8237_r );
	193	DECLARE_WRITE8_DEVICE_HANDLER( i8237_w );
194	194
195	195	/* hold acknowledge */
196	196	WRITE_LINE_DEVICE_HANDLER( i8237_hlda_w );

trunk/src/emu/machine/z80sio.c

r17961	r17962
243	243	inline void z80sio_device::update_interrupt_state()
244	244	{
245	245	// if we have a callback, update it with the current state
246		if (m_irq_cb != NULL)
247		(*m_irq_cb)(this, (z80daisy_irq_state() & Z80_DAISY_INT) ? ASSERT_LINE : CLEAR_LINE);
	246	if (!m_irq.isnull())
	247	m_irq((z80daisy_irq_state() & Z80_DAISY_INT) ? ASSERT_LINE : CLEAR_LINE);
248	248	}
249	249
250	250
r17961	r17962
318	318	const z80sio_interface *intf = reinterpret_cast<const z80sio_interface *>(static_config());
319	319	if (intf != NULL)
320	320	*static_cast<z80sio_interface *>(this) = *intf;
321
322		// or initialize to defaults if none provided
323		else
324		{
325		m_irq_cb = NULL;
326		m_dtr_changed_cb = NULL;
327		m_rts_changed_cb = NULL;
328		m_break_changed_cb = NULL;
329		m_transmit_cb = NULL;
330		m_receive_poll_cb = NULL;
331		}
332	321	}
333	322
334	323
r17961	r17962
338	327
339	328	void z80sio_device::device_start()
340	329	{
	330	m_irq.resolve(m_irq_cb, *this);
	331	m_dtr_changed.resolve(m_dtr_changed_cb, *this);
	332	m_rts_changed.resolve(m_rts_changed_cb, *this);
	333	m_break_changed.resolve(m_break_changed_cb, *this);
	334	m_transmit.resolve(m_transmit_cb, *this);
	335	m_received_poll.resolve(m_received_poll_cb, *this);
	336
341	337	m_channel[0].start(this, 0);
342	338	m_channel[1].start(this, 1);
343	339	}
r17961	r17962
566	562
567	563	// SIO write register 5
568	564	case 5:
569		if (((old ^ data) & SIO_WR5_DTR) && m_device->m_dtr_changed_cb)
570		(*m_device->m_dtr_changed_cb)(m_device, m_index, (data & SIO_WR5_DTR) != 0);
571		if (((old ^ data) & SIO_WR5_SEND_BREAK) && m_device->m_break_changed_cb)
572		(*m_device->m_break_changed_cb)(m_device, m_index, (data & SIO_WR5_SEND_BREAK) != 0);
573		if (((old ^ data) & SIO_WR5_RTS) && m_device->m_rts_changed_cb)
574		(*m_device->m_rts_changed_cb)(m_device, m_index, (data & SIO_WR5_RTS) != 0);
	565	if (((old ^ data) & SIO_WR5_DTR) && !m_device->m_dtr_changed.isnull())
	566	m_device->m_dtr_changed(m_index, (data & SIO_WR5_DTR) != 0);
	567	if (((old ^ data) & SIO_WR5_SEND_BREAK) && !m_device->m_break_changed.isnull())
	568	m_device->m_break_changed(m_index, (data & SIO_WR5_SEND_BREAK) != 0);
	569	if (((old ^ data) & SIO_WR5_RTS) && !m_device->m_rts_changed.isnull())
	570	m_device->m_rts_changed(m_index, (data & SIO_WR5_RTS) != 0);
575	571	break;
576	572	}
577	573	}
r17961	r17962
741	737	VPRINTF(("serial_callback(%c): Transmitting %02x\n", 'A' + m_index, m_outbuf));
742	738
743	739	// actually transmit the character
744		if (m_device->m_transmit_cb != NULL)
745		(*m_device->m_transmit_cb)(m_device, m_index, m_outbuf);
	740	if (!m_device->m_transmit.isnull())
	741	m_device->m_transmit(m_index, m_outbuf, 0xffff);
746	742
747	743	// update the status register
748	744	m_status[0] |= SIO_RR0_TX_BUFFER_EMPTY;
r17961	r17962
756	752	}
757	753
758	754	// ask the polling callback if there is data to receive
759		if (m_device->m_receive_poll_cb != NULL)
760		data = (*m_device->m_receive_poll_cb)(m_device, m_index);
	755	if (!m_device->m_received_poll.isnull())
	756	data = INT16(m_device->m_received_poll(m_index, 0xffff));
761	757
762	758	// if we have buffered data, pull it
763	759	if (m_receive_inptr != m_receive_outptr)

trunk/src/emu/machine/z80sio.h

r17961	r17962
32	32
33	33	struct z80sio_interface
34	34	{
35		void (*m_irq_cb)(device_t *device, int state);
36		write8_device_func m_dtr_changed_cb;
37		write8_device_func m_rts_changed_cb;
38		write8_device_func m_break_changed_cb;
39		write8_device_func m_transmit_cb;
40		int (*m_receive_poll_cb)(device_t *device, int channel);
	35	devcb_write_line m_irq_cb;
	36	devcb_write8 m_dtr_changed_cb;
	37	devcb_write8 m_rts_changed_cb;
	38	devcb_write8 m_break_changed_cb;
	39	devcb_write16 m_transmit_cb;
	40	devcb_read16 m_received_poll_cb;
41	41	};
42	42
43	43
r17961	r17962
140	140	sio_channel               m_channel[2];         // 2 channels
141	141	UINT8                  m_int_state[8];         // interrupt states
142	142
	143	// callbacks
	144	devcb_resolved_write_line m_irq;
	145	devcb_resolved_write8 m_dtr_changed;
	146	devcb_resolved_write8 m_rts_changed;
	147	devcb_resolved_write8 m_break_changed;
	148	devcb_resolved_write16 m_transmit;
	149	devcb_resolved_read16 m_received_poll;
	150
143	151	static const UINT8 k_int_priority[];
144	152	};
145	153

trunk/src/emu/machine/k053252.h

r17961	r17962
49	49
50	50	/**  Konami 053252  **/
51	51	/* CRT and interrupt control unit */
52		READ8_DEVICE_HANDLER( k053252_r );   // CCU registers
53		WRITE8_DEVICE_HANDLER( k053252_w );
	52	DECLARE_READ8_DEVICE_HANDLER( k053252_r );   // CCU registers
	53	DECLARE_WRITE8_DEVICE_HANDLER( k053252_w );
54	54
55	55
56	56

trunk/src/emu/machine/pit8253.h

r17961	r17962
85	85	MCFG_DEVICE_CONFIG(_intrf)
86	86
87	87
88		READ8_DEVICE_HANDLER( pit8253_r );
89		WRITE8_DEVICE_HANDLER( pit8253_w );
	88	DECLARE_READ8_DEVICE_HANDLER( pit8253_r );
	89	DECLARE_WRITE8_DEVICE_HANDLER( pit8253_w );
90	90
91	91	WRITE_LINE_DEVICE_HANDLER( pit8253_clk0_w );
92	92	WRITE_LINE_DEVICE_HANDLER( pit8253_clk1_w );

trunk/src/emu/machine/ds2404.h

r17961	r17962
128	128	***************************************************************************/
129	129
130	130	/* 1-wire interface reset */
131		WRITE8_DEVICE_HANDLER( ds2404_1w_reset_w );
	131	DECLARE_WRITE8_DEVICE_HANDLER( ds2404_1w_reset_w );
132	132
133	133	/* 3-wire interface reset  */
134		WRITE8_DEVICE_HANDLER( ds2404_3w_reset_w );
	134	DECLARE_WRITE8_DEVICE_HANDLER( ds2404_3w_reset_w );
135	135
136		READ8_DEVICE_HANDLER( ds2404_data_r );
137		WRITE8_DEVICE_HANDLER( ds2404_data_w );
138		WRITE8_DEVICE_HANDLER( ds2404_clk_w );
	136	DECLARE_READ8_DEVICE_HANDLER( ds2404_data_r );
	137	DECLARE_WRITE8_DEVICE_HANDLER( ds2404_data_w );
	138	DECLARE_WRITE8_DEVICE_HANDLER( ds2404_clk_w );
139	139
140	140	#endif

trunk/src/emu/addrmap.c

r17961	r17962
66	66	m_rspace16(NULL),
67	67	m_rspace32(NULL),
68	68	m_rspace64(NULL),
69		m_rdevice8(NULL),
70		m_rdevice16(NULL),
71		m_rdevice32(NULL),
72		m_rdevice64(NULL),
73	69	m_wspace8(NULL),
74	70	m_wspace16(NULL),
75	71	m_wspace32(NULL),
76	72	m_wspace64(NULL),
77		m_wdevice8(NULL),
78		m_wdevice16(NULL),
79		m_wdevice32(NULL),
80		m_wdevice64(NULL),
81	73	m_memory(NULL),
82	74	m_bytestart(0),
83	75	m_byteend(0),
r17961	r17962
234	226	}
235	227
236	228
237		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read8_device_func func, const char *string, UINT64 unitmask)
238		{
239		assert(func != NULL);
240		assert(unitmask_is_appropriate(8, unitmask, string));
241		m_read.m_type = AMH_LEGACY_DEVICE_HANDLER;
242		m_read.m_bits = 8;
243		m_read.m_mask = unitmask;
244		m_read.m_name = string;
245		device.subtag(m_read.m_tag, tag);
246		m_rdevice8 = func;
247		}
248
249
250		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, write8_device_func func, const char *string, UINT64 unitmask)
251		{
252		assert(func != NULL);
253		assert(unitmask_is_appropriate(8, unitmask, string));
254		m_write.m_type = AMH_LEGACY_DEVICE_HANDLER;
255		m_write.m_bits = 8;
256		m_write.m_mask = unitmask;
257		m_write.m_name = string;
258		device.subtag(m_write.m_tag, tag);
259		m_wdevice8 = func;
260		}
261
262
263		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read8_device_func rfunc, const char *rstring, write8_device_func wfunc, const char *wstring, UINT64 unitmask)
264		{
265		internal_set_handler(device, tag, rfunc, rstring, unitmask);
266		internal_set_handler(device, tag, wfunc, wstring, unitmask);
267		}
268
269
270	229	void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read8_delegate func, UINT64 unitmask)
271	230	{
272	231	assert(!func.isnull());
r17961	r17962
336	295	}
337	296
338	297
339		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read16_device_func func, const char *string, UINT64 unitmask)
340		{
341		assert(func != NULL);
342		assert(unitmask_is_appropriate(16, unitmask, string));
343		m_read.m_type = AMH_LEGACY_DEVICE_HANDLER;
344		m_read.m_bits = 16;
345		m_read.m_mask = unitmask;
346		m_read.m_name = string;
347		device.subtag(m_read.m_tag, tag);
348		m_rdevice16 = func;
349		}
350
351
352		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, write16_device_func func, const char *string, UINT64 unitmask)
353		{
354		assert(func != NULL);
355		assert(unitmask_is_appropriate(16, unitmask, string));
356		m_write.m_type = AMH_LEGACY_DEVICE_HANDLER;
357		m_write.m_bits = 16;
358		m_write.m_mask = unitmask;
359		m_write.m_name = string;
360		device.subtag(m_write.m_tag, tag);
361		m_wdevice16 = func;
362		}
363
364
365		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read16_device_func rfunc, const char *rstring, write16_device_func wfunc, const char *wstring, UINT64 unitmask)
366		{
367		internal_set_handler(device, tag, rfunc, rstring, unitmask);
368		internal_set_handler(device, tag, wfunc, wstring, unitmask);
369		}
370
371
372	298	void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read16_delegate func, UINT64 unitmask)
373	299	{
374	300	assert(!func.isnull());
r17961	r17962
438	364	}
439	365
440	366
441		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read32_device_func func, const char *string, UINT64 unitmask)
442		{
443		assert(func != NULL);
444		assert(unitmask_is_appropriate(32, unitmask, string));
445		m_read.m_type = AMH_LEGACY_DEVICE_HANDLER;
446		m_read.m_bits = 32;
447		m_read.m_mask = unitmask;
448		m_read.m_name = string;
449		device.subtag(m_read.m_tag, tag);
450		m_rdevice32 = func;
451		}
452
453
454		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, write32_device_func func, const char *string, UINT64 unitmask)
455		{
456		assert(func != NULL);
457		assert(unitmask_is_appropriate(32, unitmask, string));
458		m_write.m_type = AMH_LEGACY_DEVICE_HANDLER;
459		m_write.m_bits = 32;
460		m_write.m_mask = unitmask;
461		m_write.m_name = string;
462		device.subtag(m_write.m_tag, tag);
463		m_wdevice32 = func;
464		}
465
466
467		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read32_device_func rfunc, const char *rstring, write32_device_func wfunc, const char *wstring, UINT64 unitmask)
468		{
469		internal_set_handler(device, tag, rfunc, rstring, unitmask);
470		internal_set_handler(device, tag, wfunc, wstring, unitmask);
471		}
472
473
474	367	void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read32_delegate func, UINT64 unitmask)
475	368	{
476	369	assert(!func.isnull());
r17961	r17962
540	433	}
541	434
542	435
543		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read64_device_func func, const char *string, UINT64 unitmask)
544		{
545		assert(func != NULL);
546		assert(unitmask_is_appropriate(64, unitmask, string));
547		m_read.m_type = AMH_LEGACY_DEVICE_HANDLER;
548		m_read.m_bits = 64;
549		m_read.m_mask = 0;
550		m_read.m_name = string;
551		device.subtag(m_read.m_tag, tag);
552		m_rdevice64 = func;
553		}
554
555
556		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, write64_device_func func, const char *string, UINT64 unitmask)
557		{
558		assert(func != NULL);
559		assert(unitmask_is_appropriate(64, unitmask, string));
560		m_write.m_type = AMH_LEGACY_DEVICE_HANDLER;
561		m_write.m_bits = 64;
562		m_write.m_mask = 0;
563		m_write.m_name = string;
564		device.subtag(m_write.m_tag, tag);
565		m_wdevice64 = func;
566		}
567
568
569		void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read64_device_func rfunc, const char *rstring, write64_device_func wfunc, const char *wstring, UINT64 unitmask)
570		{
571		internal_set_handler(device, tag, rfunc, rstring, unitmask);
572		internal_set_handler(device, tag, wfunc, wstring, unitmask);
573		}
574
575
576	436	void address_map_entry::internal_set_handler(const device_t &device, const char *tag, read64_delegate func, UINT64 unitmask)
577	437	{
578	438	assert(!func.isnull());

trunk/src/emu/addrmap.h

r17961	r17962
62	62	AMH_UNMAP,
63	63	AMH_DEVICE_DELEGATE,
64	64	AMH_LEGACY_SPACE_HANDLER,
65		AMH_LEGACY_DEVICE_HANDLER,
66	65	AMH_PORT,
67	66	AMH_BANK,
68	67	AMH_DEVICE_SUBMAP
r17961	r17962
160	159	read16_space_func      m_rspace16;            // 16-bit legacy address space handler
161	160	read32_space_func      m_rspace32;            // 32-bit legacy address space handler
162	161	read64_space_func      m_rspace64;            // 64-bit legacy address space handler
163		read8_device_func      m_rdevice8;            // 8-bit legacy device handler
164		read16_device_func      m_rdevice16;         // 16-bit legacy device handler
165		read32_device_func      m_rdevice32;         // 32-bit legacy device handler
166		read64_device_func      m_rdevice64;         // 64-bit legacy device handler
167	162	write8_delegate         m_wproto8;            // 8-bit write proto-delegate
168	163	write16_delegate      m_wproto16;            // 16-bit write proto-delegate
169	164	write32_delegate      m_wproto32;            // 32-bit write proto-delegate
r17961	r17962
172	167	write16_space_func      m_wspace16;            // 16-bit legacy address space handler
173	168	write32_space_func      m_wspace32;            // 32-bit legacy address space handler
174	169	write64_space_func      m_wspace64;            // 64-bit legacy address space handler
175		write8_device_func      m_wdevice8;            // 8-bit legacy device handler
176		write16_device_func      m_wdevice16;         // 16-bit legacy device handler
177		write32_device_func      m_wdevice32;         // 32-bit legacy device handler
178		write64_device_func      m_wdevice64;         // 64-bit legacy device handler
179	170
180	171	address_map_delegate   m_submap_delegate;
181	172	int                  m_submap_bits;
r17961	r17962
195	186	void internal_set_handler(read8_space_func func, const char *string, UINT64 mask);
196	187	void internal_set_handler(write8_space_func func, const char *string, UINT64 mask);
197	188	void internal_set_handler(read8_space_func rfunc, const char *rstring, write8_space_func wfunc,  const char *wstring, UINT64 mask);
198		void internal_set_handler(const device_t &device, const char *tag, read8_device_func func, const char *string, UINT64 mask);
199		void internal_set_handler(const device_t &device, const char *tag, write8_device_func func, const char *string, UINT64 mask);
200		void internal_set_handler(const device_t &device, const char *tag, read8_device_func rfunc, const char *rstring, write8_device_func wfunc, const char *wstring, UINT64 mask);
201	189	void internal_set_handler(const device_t &device, const char *tag, read8_delegate func, UINT64 mask);
202	190	void internal_set_handler(const device_t &device, const char *tag, write8_delegate func, UINT64 mask);
203	191	void internal_set_handler(const device_t &device, const char *tag, read8_delegate rfunc, write8_delegate wfunc, UINT64 mask);
r17961	r17962
206	194	void internal_set_handler(read16_space_func func, const char *string, UINT64 mask);
207	195	void internal_set_handler(write16_space_func func, const char *string, UINT64 mask);
208	196	void internal_set_handler(read16_space_func rfunc, const char *rstring, write16_space_func wfunc, const char *wstring, UINT64 mask);
209		void internal_set_handler(const device_t &device, const char *tag, read16_device_func func, const char *string, UINT64 mask);
210		void internal_set_handler(const device_t &device, const char *tag, write16_device_func func, const char *string, UINT64 mask);
211		void internal_set_handler(const device_t &device, const char *tag, read16_device_func rfunc, const char *rstring, write16_device_func wfunc, const char *wstring, UINT64 mask);
212	197	void internal_set_handler(const device_t &device, const char *tag, read16_delegate func, UINT64 mask);
213	198	void internal_set_handler(const device_t &device, const char *tag, write16_delegate func, UINT64 mask);
214	199	void internal_set_handler(const device_t &device, const char *tag, read16_delegate rfunc, write16_delegate wfunc, UINT64 mask);
r17961	r17962
217	202	void internal_set_handler(read32_space_func func, const char *string, UINT64 mask);
218	203	void internal_set_handler(write32_space_func func, const char *string, UINT64 mask);
219	204	void internal_set_handler(read32_space_func rfunc, const char *rstring, write32_space_func wfunc, const char *wstring, UINT64 mask);
220		void internal_set_handler(const device_t &device, const char *tag, read32_device_func func, const char *string, UINT64 mask);
221		void internal_set_handler(const device_t &device, const char *tag, write32_device_func func, const char *string, UINT64 mask);
222		void internal_set_handler(const device_t &device, const char *tag, read32_device_func rfunc, const char *rstring, write32_device_func wfunc, const char *wstring, UINT64 mask);
223	205	void internal_set_handler(const device_t &device, const char *tag, read32_delegate func, UINT64 mask);
224	206	void internal_set_handler(const device_t &device, const char *tag, write32_delegate func, UINT64 mask);
225	207	void internal_set_handler(const device_t &device, const char *tag, read32_delegate rfunc, write32_delegate wfunc, UINT64 mask);
r17961	r17962
228	210	void internal_set_handler(read64_space_func func, const char *string, UINT64 mask);
229	211	void internal_set_handler(write64_space_func func, const char *string, UINT64 mask);
230	212	void internal_set_handler(read64_space_func rfunc, const char *rstring, write64_space_func wfunc, const char *wstring, UINT64 mask);
231		void internal_set_handler(const device_t &device, const char *tag, read64_device_func func, const char *string, UINT64 mask);
232		void internal_set_handler(const device_t &device, const char *tag, write64_device_func func, const char *string, UINT64 mask);
233		void internal_set_handler(const device_t &device, const char *tag, read64_device_func rfunc, const char *rstring, write64_device_func wfunc, const char *wstring, UINT64 mask);
234	213	void internal_set_handler(const device_t &device, const char *tag, read64_delegate func, UINT64 mask);
235	214	void internal_set_handler(const device_t &device, const char *tag, write64_delegate func, UINT64 mask);
236	215	void internal_set_handler(const device_t &device, const char *tag, read64_delegate rfunc, write64_delegate wfunc, UINT64 mask);
r17961	r17962
255	234	void set_handler(read8_space_func func, const char *string) { internal_set_handler(func, string, 0); }
256	235	void set_handler(write8_space_func func, const char *string) { internal_set_handler(func, string, 0); }
257	236	void set_handler(read8_space_func rfunc, const char *rstring, write8_space_func wfunc, const char *wstring) { internal_set_handler(rfunc, rstring, wfunc, wstring, 0); }
258		void set_handler(const device_t &device, const char *tag, read8_device_func func, const char *string) { internal_set_handler(device, tag, func, string, 0); }
259		void set_handler(const device_t &device, const char *tag, write8_device_func func, const char *string) { internal_set_handler(device, tag, func, string, 0); }
260		void set_handler(const device_t &device, const char *tag, read8_device_func rfunc, const char *rstring, write8_device_func wfunc, const char *wstring) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, 0); }
261	237	void set_handler(const device_t &device, const char *tag, read8_delegate func) { internal_set_handler(device, tag, func, 0); }
262	238	void set_handler(const device_t &device, const char *tag, write8_delegate func) { internal_set_handler(device, tag, func, 0); }
263	239	void set_handler(const device_t &device, const char *tag, read8_delegate rfunc, write8_delegate wfunc) { internal_set_handler(device, tag, rfunc, wfunc, 0); }
r17961	r17962
278	254	void set_handler(read16_space_func func, const char *string) { internal_set_handler(func, string, 0); }
279	255	void set_handler(write16_space_func func, const char *string) { internal_set_handler(func, string, 0); }
280	256	void set_handler(read16_space_func rfunc, const char *rstring, write16_space_func wfunc, const char *wstring) { internal_set_handler(rfunc, rstring, wfunc, wstring, 0); }
281		void set_handler(const device_t &device, const char *tag, read16_device_func func, const char *string) { internal_set_handler(device, tag, func, string, 0); }
282		void set_handler(const device_t &device, const char *tag, write16_device_func func, const char *string) { internal_set_handler(device, tag, func, string, 0); }
283		void set_handler(const device_t &device, const char *tag, read16_device_func rfunc, const char *rstring, write16_device_func wfunc, const char *wstring) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, 0); }
284	257	void set_handler(const device_t &device, const char *tag, read16_delegate func) { internal_set_handler(device, tag, func, 0); }
285	258	void set_handler(const device_t &device, const char *tag, write16_delegate func) { internal_set_handler(device, tag, func, 0); }
286	259	void set_handler(const device_t &device, const char *tag, read16_delegate rfunc, write16_delegate wfunc) { internal_set_handler(device, tag, rfunc, wfunc, 0); }
r17961	r17962
289	262	void set_handler(read8_space_func func, const char *string, UINT16 mask) { internal_set_handler(func, string, mask); }
290	263	void set_handler(write8_space_func func, const char *string, UINT16 mask) { internal_set_handler(func, string, mask); }
291	264	void set_handler(read8_space_func rfunc, const char *rstring, write8_space_func wfunc, const char *wstring, UINT16 mask) { internal_set_handler(rfunc, rstring, wfunc, wstring, mask); }
292		void set_handler(const device_t &device, const char *tag, read8_device_func func, const char *string, UINT16 mask) { internal_set_handler(device, tag, func, string, mask); }
293		void set_handler(const device_t &device, const char *tag, write8_device_func func, const char *string, UINT16 mask) { internal_set_handler(device, tag, func, string, mask); }
294		void set_handler(const device_t &device, const char *tag, read8_device_func rfunc, const char *rstring, write8_device_func wfunc, const char *wstring, UINT16 mask) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, mask); }
295	265	void set_handler(const device_t &device, const char *tag, read8_delegate func, UINT16 mask) { internal_set_handler(device, tag, func, mask); }
296	266	void set_handler(const device_t &device, const char *tag, write8_delegate func, UINT16 mask) { internal_set_handler(device, tag, func, mask); }
297	267	void set_handler(const device_t &device, const char *tag, read8_delegate rfunc, write8_delegate wfunc, UINT16 mask) { internal_set_handler(device, tag, rfunc, wfunc, mask); }
r17961	r17962
312	282	void set_handler(read32_space_func func, const char *string) { internal_set_handler(func, string, 0); }
313	283	void set_handler(write32_space_func func, const char *string) { internal_set_handler(func, string, 0); }
314	284	void set_handler(read32_space_func rfunc, const char *rstring, write32_space_func wfunc, const char *wstring) { internal_set_handler(rfunc, rstring, wfunc, wstring, 0); }
315		void set_handler(const device_t &device, const char *tag, read32_device_func func, const char *string) { internal_set_handler(device, tag, func, string, 0); }
316		void set_handler(const device_t &device, const char *tag, write32_device_func func, const char *string) { internal_set_handler(device, tag, func, string, 0); }
317		void set_handler(const device_t &device, const char *tag, read32_device_func rfunc, const char *rstring, write32_device_func wfunc, const char *wstring) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, 0); }
318	285	void set_handler(const device_t &device, const char *tag, read32_delegate func) { internal_set_handler(device, tag, func, 0); }
319	286	void set_handler(const device_t &device, const char *tag, write32_delegate func) { internal_set_handler(device, tag, func, 0); }
320	287	void set_handler(const device_t &device, const char *tag, read32_delegate rfunc, write32_delegate wfunc) { internal_set_handler(device, tag, rfunc, wfunc, 0); }
r17961	r17962
323	290	void set_handler(read16_space_func func, const char *string, UINT32 mask) { internal_set_handler(func, string, mask); }
324	291	void set_handler(write16_space_func func, const char *string, UINT32 mask) { internal_set_handler(func, string, mask); }
325	292	void set_handler(read16_space_func rfunc, const char *rstring, write16_space_func wfunc, const char *wstring, UINT32 mask) { internal_set_handler(rfunc, rstring, wfunc, wstring, mask); }
326		void set_handler(const device_t &device, const char *tag, read16_device_func func, const char *string, UINT32 mask) { internal_set_handler(device, tag, func, string, mask); }
327		void set_handler(const device_t &device, const char *tag, write16_device_func func, const char *string, UINT32 mask) { internal_set_handler(device, tag, func, string, mask); }
328		void set_handler(const device_t &device, const char *tag, read16_device_func rfunc, const char *rstring, write16_device_func wfunc, const char *wstring, UINT32 mask) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, mask); }
329	293	void set_handler(const device_t &device, const char *tag, read16_delegate func, UINT32 mask) { internal_set_handler(device, tag, func, mask); }
330	294	void set_handler(const device_t &device, const char *tag, write16_delegate func, UINT32 mask) { internal_set_handler(device, tag, func, mask); }
331	295	void set_handler(const device_t &device, const char *tag, read16_delegate rfunc, write16_delegate wfunc, UINT32 mask) { internal_set_handler(device, tag, rfunc, wfunc, mask); }
r17961	r17962
334	298	void set_handler(read8_space_func func, const char *string, UINT32 mask) { internal_set_handler(func, string, mask); }
335	299	void set_handler(write8_space_func func, const char *string, UINT32 mask) { internal_set_handler(func, string, mask); }
336	300	void set_handler(read8_space_func rfunc, const char *rstring, write8_space_func wfunc, const char *wstring, UINT32 mask) { internal_set_handler(rfunc, rstring, wfunc, wstring, mask); }
337		void set_handler(const device_t &device, const char *tag, read8_device_func func, const char *string, UINT32 mask) { internal_set_handler(device, tag, func, string, mask); }
338		void set_handler(const device_t &device, const char *tag, write8_device_func func, const char *string, UINT32 mask) { internal_set_handler(device, tag, func, string, mask); }
339		void set_handler(const device_t &device, const char *tag, read8_device_func rfunc, const char *rstring, write8_device_func wfunc, const char *wstring, UINT32 mask) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, mask); }
340	301	void set_handler(const device_t &device, const char *tag, read8_delegate func, UINT32 mask) { internal_set_handler(device, tag, func, mask); }
341	302	void set_handler(const device_t &device, const char *tag, write8_delegate func, UINT32 mask) { internal_set_handler(device, tag, func, mask); }
342	303	void set_handler(const device_t &device, const char *tag, read8_delegate rfunc, write8_delegate wfunc, UINT32 mask) { internal_set_handler(device, tag, rfunc, wfunc, mask); }
r17961	r17962
357	318	void set_handler(read64_space_func func, const char *string) { internal_set_handler(func, string, 0); }
358	319	void set_handler(write64_space_func func, const char *string) { internal_set_handler(func, string, 0); }
359	320	void set_handler(read64_space_func rfunc, const char *rstring, write64_space_func wfunc, const char *wstring) { internal_set_handler(rfunc, rstring, wfunc, wstring, 0); }
360		void set_handler(const device_t &device, const char *tag, read64_device_func func, const char *string) { internal_set_handler(device, tag, func, string, 0); }
361		void set_handler(const device_t &device, const char *tag, write64_device_func func, const char *string) { internal_set_handler(device, tag, func, string, 0); }
362		void set_handler(const device_t &device, const char *tag, read64_device_func rfunc, const char *rstring, write64_device_func wfunc, const char *wstring) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, 0); }
363	321	void set_handler(const device_t &device, const char *tag, read64_delegate func) { internal_set_handler(device, tag, func, 0); }
364	322	void set_handler(const device_t &device, const char *tag, write64_delegate func) { internal_set_handler(device, tag, func, 0); }
365	323	void set_handler(const device_t &device, const char *tag, read64_delegate rfunc, write64_delegate wfunc) { internal_set_handler(device, tag, rfunc, wfunc, 0); }
r17961	r17962
368	326	void set_handler(read32_space_func func, const char *string, UINT64 mask) { internal_set_handler(func, string, mask); }
369	327	void set_handler(write32_space_func func, const char *string, UINT64 mask) { internal_set_handler(func, string, mask); }
370	328	void set_handler(read32_space_func rfunc, const char *rstring, write32_space_func wfunc, const char *wstring, UINT64 mask) { internal_set_handler(rfunc, rstring, wfunc, wstring, mask); }
371		void set_handler(const device_t &device, const char *tag, read32_device_func func, const char *string, UINT64 mask) { internal_set_handler(device, tag, func, string, mask); }
372		void set_handler(const device_t &device, const char *tag, write32_device_func func, const char *string, UINT64 mask) { internal_set_handler(device, tag, func, string, mask); }
373		void set_handler(const device_t &device, const char *tag, read32_device_func rfunc, const char *rstring, write32_device_func wfunc, const char *wstring, UINT64 mask) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, mask); }
374	329	void set_handler(const device_t &device, const char *tag, read32_delegate func, UINT64 mask) { internal_set_handler(device, tag, func, mask); }
375	330	void set_handler(const device_t &device, const char *tag, write32_delegate func, UINT64 mask) { internal_set_handler(device, tag, func, mask); }
376	331	void set_handler(const device_t &device, const char *tag, read32_delegate rfunc, write32_delegate wfunc, UINT64 mask) { internal_set_handler(device, tag, rfunc, wfunc, mask); }
r17961	r17962
379	334	void set_handler(read16_space_func func, const char *string, UINT64 mask) { internal_set_handler(func, string, mask); }
380	335	void set_handler(write16_space_func func, const char *string, UINT64 mask) { internal_set_handler(func, string, mask); }
381	336	void set_handler(read16_space_func rfunc, const char *rstring, write16_space_func wfunc, const char *wstring, UINT64 mask) { internal_set_handler(rfunc, rstring, wfunc, wstring, mask); }
382		void set_handler(const device_t &device, const char *tag, read16_device_func func, const char *string, UINT64 mask) { internal_set_handler(device, tag, func, string, mask); }
383		void set_handler(const device_t &device, const char *tag, write16_device_func func, const char *string, UINT64 mask) { internal_set_handler(device, tag, func, string, mask); }
384		void set_handler(const device_t &device, const char *tag, read16_device_func rfunc, const char *rstring, write16_device_func wfunc, const char *wstring, UINT64 mask) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, mask); }
385	337	void set_handler(const device_t &device, const char *tag, read16_delegate func, UINT64 mask) { internal_set_handler(device, tag, func, mask); }
386	338	void set_handler(const device_t &device, const char *tag, write16_delegate func, UINT64 mask) { internal_set_handler(device, tag, func, mask); }
387	339	void set_handler(const device_t &device, const char *tag, read16_delegate rfunc, write16_delegate wfunc, UINT64 mask) { internal_set_handler(device, tag, rfunc, wfunc, mask); }
r17961	r17962
390	342	void set_handler(read8_space_func func, const char *string, UINT64 mask) { internal_set_handler(func, string, mask); }
391	343	void set_handler(write8_space_func func, const char *string, UINT64 mask) { internal_set_handler(func, string, mask); }
392	344	void set_handler(read8_space_func rfunc, const char *rstring, write8_space_func wfunc, const char *wstring, UINT64 mask) { internal_set_handler(rfunc, rstring, wfunc, wstring, mask); }
393		void set_handler(const device_t &device, const char *tag, read8_device_func func, const char *string, UINT64 mask) { internal_set_handler(device, tag, func, string, mask); }
394		void set_handler(const device_t &device, const char *tag, write8_device_func func, const char *string, UINT64 mask) { internal_set_handler(device, tag, func, string, mask); }
395		void set_handler(const device_t &device, const char *tag, read8_device_func rfunc, const char *rstring, write8_device_func wfunc, const char *wstring, UINT64 mask) { internal_set_handler(device, tag, rfunc, rstring, wfunc, wstring, mask); }
396	345	void set_handler(const device_t &device, const char *tag, read8_delegate func, UINT64 mask) { internal_set_handler(device, tag, func, mask); }
397	346	void set_handler(const device_t &device, const char *tag, write8_delegate func, UINT64 mask) { internal_set_handler(device, tag, func, mask); }
398	347	void set_handler(const device_t &device, const char *tag, read8_delegate rfunc, write8_delegate wfunc, UINT64 mask) { internal_set_handler(device, tag, rfunc, wfunc, mask); }
r17961	r17962
546	495
547	496	// legacy device reads
548	497	#define AM_DEVREAD_LEGACY(_tag, _handler) \
549		curentry->set_handler(device, _tag, _handler, #_handler); \
	498	curentry->set_handler(device, _tag, read_delegate(&_handler, #_handler, (device_t *)0)); \
550	499
551	500	#define AM_DEVREAD8_LEGACY(_tag, _handler, _unitmask) \
552		curentry->set_handler(device, _tag, _handler, #_handler, _unitmask); \
	501	curentry->set_handler(device, _tag, read8_delegate(&_handler, #_handler, (device_t *)0), _unitmask); \
553	502
554	503
555	504
556	505
557	506	// legacy device writes
558	507	#define AM_DEVWRITE_LEGACY(_tag, _handler) \
559		curentry->set_handler(device, _tag, _handler, #_handler); \
	508	curentry->set_handler(device, _tag, write_delegate(&_handler, #_handler, (device_t *)0)); \
560	509
561	510	#define AM_DEVWRITE8_LEGACY(_tag, _handler, _unitmask) \
562		curentry->set_handler(device, _tag, _handler, #_handler, _unitmask); \
	511	curentry->set_handler(device, _tag, write8_delegate(&_handler, #_handler, (device_t *)0), _unitmask); \
563	512
564	513	#define AM_DEVWRITE16_LEGACY(_tag, _handler, _unitmask) \
565		curentry->set_handler(device, _tag, _handler, #_handler, _unitmask); \
	514	curentry->set_handler(device, _tag, write16_delegate(&_handler, #_handler, (device_t *)0), _unitmask); \
566	515
567	516
568	517
569	518	// legacy device reads/writes
570	519	#define AM_DEVREADWRITE_LEGACY(_tag, _rhandler, _whandler) \
571		curentry->set_handler(device, _tag, _rhandler, #_rhandler, _whandler, #_whandler); \
	520	curentry->set_handler(device, _tag, read_delegate(&_rhandler, #_rhandler, (device_t *)0), write_delegate(&_whandler, #_whandler, (device_t *)0)); \
572	521
573	522	#define AM_DEVREADWRITE8_LEGACY(_tag, _rhandler, _whandler, _unitmask) \
574		curentry->set_handler(device, _tag, _rhandler, #_rhandler, _whandler, #_whandler, _unitmask); \
	523	curentry->set_handler(device, _tag, read8_delegate(&_rhandler, #_rhandler, (device_t *)0), write8_delegate(&_whandler, #_whandler, (device_t *)0), _unitmask); \
575	524
576	525	#define AM_DEVREADWRITE16_LEGACY(_tag, _rhandler, _whandler, _unitmask) \
577		curentry->set_handler(device, _tag, _rhandler, #_rhandler, _whandler, #_whandler, _unitmask); \
	526	curentry->set_handler(device, _tag, read16_delegate(&_rhandler, #_rhandler, (device_t *)0), write16_delegate(&_whandler, #_whandler, (device_t *)0), _unitmask); \
578	527
579	528	#define AM_DEVREADWRITE32_LEGACY(_tag, _rhandler, _whandler, _unitmask) \
580		curentry->set_handler(device, _tag, _rhandler, #_rhandler, _whandler, #_whandler, _unitmask); \
	529	curentry->set_handler(device, _tag, read32_delegate(&_rhandler, #_rhandler, (device_t *)0), write32_delegate(&_whandler, #_whandler, (device_t *)0), _unitmask); \
581	530
582	531
583	532	// driver data reads

trunk/src/emu/driver.c

r17961	r17962
51	51
52	52	driver_device::driver_device(const machine_config &mconfig, device_type type, const char *tag)
53	53	: device_t(mconfig, type, "Driver Device", tag, NULL, 0),
	54	device_memory_interface(mconfig, *this),
54	55	m_generic_paletteram_8(*this, "paletteram"),
55	56	m_generic_paletteram2_8(*this, "paletteram2"),
56	57	m_generic_paletteram_16(*this, "paletteram"),
r17961	r17962
58	59	m_generic_paletteram_32(*this, "paletteram"),
59	60	m_generic_paletteram2_32(*this, "paletteram2"),
60	61	m_system(NULL),
	62	m_generic_space_config("generic", ENDIANNESS_LITTLE, 8, 8),
61	63	m_latch_clear_value(0),
62	64	m_flip_screen_x(0),
63	65	m_flip_screen_y(0)
r17961	r17962
313	315	}
314	316
315	317
	318	//-------------------------------------------------
	319	//  memory_space_config - return a description of
	320	//  any address spaces owned by this device
	321	//-------------------------------------------------
316	322
	323	const address_space_config *driver_device::memory_space_config(address_spacenum spacenum) const
	324	{
	325	return (spacenum == 0) ? &m_generic_space_config : NULL;
	326	}
	327
	328
	329
317	330	//**************************************************************************
318	331	//  INTERRUPT ENABLE AND VECTOR HELPERS
319	332	//**************************************************************************

trunk/src/emu/driver.h

r17961	r17962
166	166	// ======================> driver_device
167	167
168	168	// base class for machine driver-specific devices
169		class driver_device : public device_t
	169	class driver_device :    public device_t,
	170	public device_memory_interface
170	171	{
171	172	public:
172	173	// construction/destruction
r17961	r17962
201	202	(machine.driver_data<_DriverClass>()->*_Function)();
202	203	}
203	204
204		void init_0() {};
	205	// dummy driver_init callbacks
	206	void init_0() { }
	207
	208	// memory helpers
	209	address_space &generic_space() const { return *space(AS_PROGRAM); }
205	210
206	211	// generic interrupt generators
207	212	void generic_pulse_irq_line(device_execute_interface &exec, int irqline, int cycles);
r17961	r17962
399	404	virtual void device_start();
400	405	virtual void device_reset_after_children();
401	406
	407	// device_memory_interface overrides
	408	virtual const address_space_config *memory_space_config(address_spacenum spacenum = AS_0) const;
	409
402	410	// internal helpers
403	411	inline UINT16 paletteram16_le(offs_t offset) const { return m_generic_paletteram_8[offset & ~1] | (m_generic_paletteram_8[offset |  1] << 8); }
404	412	inline UINT16 paletteram16_be(offs_t offset) const { return m_generic_paletteram_8[offset |  1] | (m_generic_paletteram_8[offset & ~1] << 8); }
r17961	r17962
425	433	driver_callback_delegate m_callbacks[CB_COUNT];      // start/reset callbacks
426	434	legacy_callback_func   m_legacy_callbacks[CB_COUNT]; // legacy start/reset callbacks
427	435
	436	// memory state
	437	address_space_config   m_generic_space_config;
	438
428	439	// generic audio
429	440	UINT16               m_latch_clear_value;
430	441	UINT16               m_latched_value[4];

trunk/src/emu/dimemory.c

r17961	r17962
323	323	}
324	324
325	325	// make sure all devices exist
326		if (entry->m_read.m_type == AMH_LEGACY_DEVICE_HANDLER && entry->m_read.m_tag && device().siblingdevice(entry->m_read.m_tag) == NULL)
	326	if (entry->m_read.m_type == AMH_DEVICE_DELEGATE && entry->m_read.m_tag && device().siblingdevice(entry->m_read.m_tag) == NULL)
327	327	mame_printf_error("%s space memory map entry references nonexistant device '%s'\n", spaceconfig->m_name, entry->m_read.m_tag.cstr());
328		if (entry->m_write.m_type == AMH_LEGACY_DEVICE_HANDLER && entry->m_write.m_tag && device().siblingdevice(entry->m_write.m_tag) == NULL)
	328	if (entry->m_write.m_type == AMH_DEVICE_DELEGATE && entry->m_write.m_tag && device().siblingdevice(entry->m_write.m_tag) == NULL)
329	329	mame_printf_error("%s space memory map entry references nonexistant device '%s'\n", spaceconfig->m_name, entry->m_write.m_tag.cstr());
330	330
331	331	// make sure ports exist

trunk/src/mess/audio/mea8000.c

r17961	r17962
102	102
103	103	emu_timer *timer;
104	104
	105	devcb_resolved_write8 req_out;
105	106	};
106	107
107	108
r17961	r17962
206	207	buffer contains a complete frame and the CPU nees to wait for the next
207	208	frame end to compose a new frame.
208	209	*/
209		if (mea8000->iface->req_out_func)
210		mea8000->iface->req_out_func( device, 0, mea8000_accept_byte( mea8000 ) );
	210	if (!mea8000->req_out.isnull())
	211	mea8000->req_out( 0, mea8000_accept_byte( mea8000 ) );
211	212	}
212	213
213	214
r17961	r17962
668	669	mea8000_t* mea8000 = get_safe_token( device );
669	670	int i;
670	671	mea8000->iface = (const mea8000_interface*)device->static_config();
	672	mea8000->req_out.resolve(mea8000->iface->req_out_func, *device);
671	673
672	674	mea8000_init_tables(device->machine());
673	675

trunk/src/mess/audio/upd1771.h

r17961	r17962
54	54	PROTOTYPES
55	55	***************************************************************************/
56	56
57		WRITE8_DEVICE_HANDLER( upd1771_w );
	57	DECLARE_WRITE8_DEVICE_HANDLER( upd1771_w );
58	58	WRITE_LINE_DEVICE_HANDLER( upd1771_pcm_w );
59	59
60	60	#endif /* __UPD1771_H__ */

trunk/src/mess/audio/mea8000.h

r17961	r17962
40	40	const char *           channel;
41	41
42	42	/* 1-bit 'ready' output, not negated */
43		write8_device_func req_out_func;
	43	devcb_write8 req_out_func;
44	44	};
45	45
46	46
r17961	r17962
49	49	MCFG_DEVICE_CONFIG(_intrf)
50	50
51	51	/* interface to CPU via address/data bus*/
52		extern READ8_DEVICE_HANDLER  ( mea8000_r );
53		extern WRITE8_DEVICE_HANDLER ( mea8000_w );
	52	extern DECLARE_READ8_DEVICE_HANDLER  ( mea8000_r );
	53	extern DECLARE_WRITE8_DEVICE_HANDLER ( mea8000_w );
54	54
55	55	#endif

trunk/src/mess/audio/dave.c

r17961	r17962
183	183	for (i = 0; i < 32; i++)
184	184	dave->Regs[i] = 0;
185	185
186		dave_reg_w(device, 0x10, 0);
187		dave_reg_w(device, 0x11, 0);
188		dave_reg_w(device, 0x12, 0);
189		dave_reg_w(device, 0x13, 0);
	186	address_space &space = device->machine().driver_data()->generic_space();
	187	dave_reg_w(device, space, 0x10, 0);
	188	dave_reg_w(device, space, 0x11, 0);
	189	dave_reg_w(device, space, 0x12, 0);
	190	dave_reg_w(device, space, 0x13, 0);
190	191
191	192	}
192	193
r17961	r17962
615	616
616	617	logerror("dave w: %04x %02x\n",offset,data);
617	618
618		dave_sound_w(device, offset, data);
	619	dave_sound_w(device, space, offset, data, mem_mask);
619	620
620	621	dave->Regs[offset & 0x01f] = data;
621	622

trunk/src/mess/audio/dave.h

r17961	r17962
73	73	***************************************************************************/
74	74	void dave_set_reg(device_t *device, offs_t offset, UINT8 data);
75	75
76		READ8_DEVICE_HANDLER ( dave_reg_r );
77		WRITE8_DEVICE_HANDLER ( dave_reg_w );
	76	DECLARE_READ8_DEVICE_HANDLER ( dave_reg_r );
	77	DECLARE_WRITE8_DEVICE_HANDLER ( dave_reg_w );
78	78
79	79	#endif /* __DAVE_H__ */

trunk/src/mess/audio/t6721.h

r17961	r17962
39	39
40	40	/*----------- defined in audio/t6721.c -----------*/
41	41
42		WRITE8_DEVICE_HANDLER(t6721_speech_w);
43		READ8_DEVICE_HANDLER(t6721_speech_r);
	42	DECLARE_WRITE8_DEVICE_HANDLER(t6721_speech_w);
	43	DECLARE_READ8_DEVICE_HANDLER(t6721_speech_r);
44	44
45	45
46	46	#endif /* __TED7360_H__ */

trunk/src/mess/audio/gb.h

r17961	r17962
22	22	extern const device_type GAMEBOY;
23	23
24	24
25		READ8_DEVICE_HANDLER( gb_sound_r );
26		WRITE8_DEVICE_HANDLER( gb_sound_w );
27		READ8_DEVICE_HANDLER( gb_wave_r );
28		WRITE8_DEVICE_HANDLER( gb_wave_w );
	25	DECLARE_READ8_DEVICE_HANDLER( gb_sound_r );
	26	DECLARE_WRITE8_DEVICE_HANDLER( gb_sound_w );
	27	DECLARE_READ8_DEVICE_HANDLER( gb_wave_r );
	28	DECLARE_WRITE8_DEVICE_HANDLER( gb_wave_w );

trunk/src/mess/machine/omti8621.h

r17961	r17962
39	39	FUNCTION PROTOTYPES
40	40	***************************************************************************/
41	41
42		READ16_DEVICE_HANDLER( omti8621_r );
43		WRITE16_DEVICE_HANDLER( omti8621_w );
	42	DECLARE_READ16_DEVICE_HANDLER( omti8621_r );
	43	DECLARE_WRITE16_DEVICE_HANDLER( omti8621_w );
44	44
45	45	void omti8621_set_verbose(int on_off);
46	46

trunk/src/mess/machine/dgn_beta.c

r17961	r17962
113	113
114	114	/* Debugging variables */
115	115
116		static READ8_DEVICE_HANDLER(d_pia0_pa_r);
117		static WRITE8_DEVICE_HANDLER(d_pia0_pa_w);
118		static READ8_DEVICE_HANDLER(d_pia0_pb_r);
119		static WRITE8_DEVICE_HANDLER(d_pia0_pb_w);
120		static WRITE8_DEVICE_HANDLER(d_pia0_cb2_w);
	116	static DECLARE_READ8_DEVICE_HANDLER(d_pia0_pa_r);
	117	static DECLARE_WRITE8_DEVICE_HANDLER(d_pia0_pa_w);
	118	static DECLARE_READ8_DEVICE_HANDLER(d_pia0_pb_r);
	119	static DECLARE_WRITE8_DEVICE_HANDLER(d_pia0_pb_w);
	120	static DECLARE_WRITE8_DEVICE_HANDLER(d_pia0_cb2_w);
121	121	static WRITE_LINE_DEVICE_HANDLER(d_pia0_irq_a);
122	122	static WRITE_LINE_DEVICE_HANDLER(d_pia0_irq_b);
123		static READ8_DEVICE_HANDLER(d_pia1_pa_r);
124		static WRITE8_DEVICE_HANDLER(d_pia1_pa_w);
125		static READ8_DEVICE_HANDLER(d_pia1_pb_r);
126		static WRITE8_DEVICE_HANDLER(d_pia1_pb_w);
	123	static DECLARE_READ8_DEVICE_HANDLER(d_pia1_pa_r);
	124	static DECLARE_WRITE8_DEVICE_HANDLER(d_pia1_pa_w);
	125	static DECLARE_READ8_DEVICE_HANDLER(d_pia1_pb_r);
	126	static DECLARE_WRITE8_DEVICE_HANDLER(d_pia1_pb_w);
127	127	static WRITE_LINE_DEVICE_HANDLER(d_pia1_irq_a);
128	128	static WRITE_LINE_DEVICE_HANDLER(d_pia1_irq_b);
129		static READ8_DEVICE_HANDLER(d_pia2_pa_r);
130		static WRITE8_DEVICE_HANDLER(d_pia2_pa_w);
131		static READ8_DEVICE_HANDLER(d_pia2_pb_r);
132		static WRITE8_DEVICE_HANDLER(d_pia2_pb_w);
	129	static DECLARE_READ8_DEVICE_HANDLER(d_pia2_pa_r);
	130	static DECLARE_WRITE8_DEVICE_HANDLER(d_pia2_pa_w);
	131	static DECLARE_READ8_DEVICE_HANDLER(d_pia2_pb_r);
	132	static DECLARE_WRITE8_DEVICE_HANDLER(d_pia2_pb_w);
133	133	static WRITE_LINE_DEVICE_HANDLER(d_pia2_irq_a);
134	134	static WRITE_LINE_DEVICE_HANDLER(d_pia2_irq_b);
135	135
r17961	r17962
939	939	switch(offset & 0x03)
940	940	{
941	941	case 0:
942		result = wd17xx_status_r(fdc, 0);
	942	result = wd17xx_status_r(fdc, *space, 0);
943	943	LOG_DISK(("Disk status=%2.2X\n",result));
944	944	break;
945	945	case 1:
946		result = wd17xx_track_r(fdc, 0);
	946	result = wd17xx_track_r(fdc, *space, 0);
947	947	break;
948	948	case 2:
949		result = wd17xx_sector_r(fdc, 0);
	949	result = wd17xx_sector_r(fdc, *space, 0);
950	950	break;
951	951	case 3:
952		result = wd17xx_data_r(fdc, 0);
	952	result = wd17xx_data_r(fdc, *space, 0);
953	953	break;
954	954	default:
955	955	break;
r17961	r17962
972	972	/* But only for Type 3/4 commands */
973	973	if(data & 0x80)
974	974	wd17xx_set_side(fdc,(data & 0x02) ? 1 : 0);
975		wd17xx_command_w(fdc, 0, data);
	975	wd17xx_command_w(fdc, *space, 0, data);
976	976	break;
977	977	case 1:
978		wd17xx_track_w(fdc, 0, data);
	978	wd17xx_track_w(fdc, *space, 0, data);
979	979	break;
980	980	case 2:
981		wd17xx_sector_w(fdc, 0, data);
	981	wd17xx_sector_w(fdc, *space, 0, data);
982	982	break;
983	983	case 3:
984		wd17xx_data_w(fdc, 0, data);
	984	wd17xx_data_w(fdc, *space, 0, data);
985	985	break;
986	986	};
987	987	}

trunk/src/mess/machine/s100_wunderbus.c

r17961	r17962
327	327	//  s100_sinp_r - I/O read
328	328	//-------------------------------------------------
329	329
330		UINT8 s100_wunderbus_device::s100_sinp_r(offs_t offset)
	330	UINT8 s100_wunderbus_device::s100_sinp_r(address_space &space, offs_t offset)
331	331	{
332	332	UINT8 address = (ioport("7C")->read() & 0x3e) << 2;
333	333	if ((offset & 0xf8) != address) return 0;
r17961	r17962
406	406
407	407	case 4: // 8259 0 register
408	408	case 5: // 8259 1 register
409		data = pic8259_r(m_pic, offset & 0x01);
	409	data = pic8259_r(m_pic, space, offset & 0x01);
410	410	break;
411	411
412	412	case 6: // not used
r17961	r17962
436	436	//  s100_sout_w - I/O write
437	437	//-------------------------------------------------
438	438
439		void s100_wunderbus_device::s100_sout_w(offs_t offset, UINT8 data)
	439	void s100_wunderbus_device::s100_sout_w(address_space &space, offs_t offset, UINT8 data)
440	440	{
441	441	UINT8 address = (ioport("7C")->read() & 0x3e) << 2;
442	442	if ((offset & 0xf8) != address) return;
r17961	r17962
515	515
516	516	case 4: // 8259 0 register
517	517	case 5: // 8259 1 register
518		pic8259_w(m_pic, offset & 0x01, data);
	518	pic8259_w(m_pic, space, offset & 0x01, data);
519	519	break;
520	520
521	521	case 6: // Par. port cntrl.

trunk/src/mess/machine/a2mockingboard.c

r17961	r17962
300	300	{
301	301	if (!(data & 4))
302	302	{
303		ay8910_reset_w(m_ay1, 0, 0);
	303	ay8910_reset_w(m_ay1, space, 0, 0);
304	304	if (m_isPhasor && m_PhasorNative)
305	305	{
306		ay8910_reset_w(m_ay2, 0, 0);
	306	ay8910_reset_w(m_ay2, space, 0, 0);
307	307	}
308	308	}
309	309	else
r17961	r17962
316	316	break;
317	317
318	318	case 1: // BDIR=0, BC1=1 (read PSG)
319		m_porta1 = ay8910_r(m_ay1, 0);
	319	m_porta1 = ay8910_r(m_ay1, space, 0);
320	320	break;
321	321
322	322	case 2: // BDIR=1, BC1=0 (write PSG)
323		ay8910_data_w(m_ay1, 0, m_porta1);
	323	ay8910_data_w(m_ay1, space, 0, m_porta1);
324	324	break;
325	325
326	326	case 3: // BDIR=1, BC1=1 (latch)
327		ay8910_address_w(m_ay1, 0, m_porta1);
	327	ay8910_address_w(m_ay1, space, 0, m_porta1);
328	328	break;
329	329	}
330	330	}
r17961	r17962
350	350	case 1: // BDIR=0, BC1=1 (read PSG)
351	351	if (chipSel & 1)
352	352	{
353		m_porta1 = ay8910_r(m_ay1, 0);
	353	m_porta1 = ay8910_r(m_ay1, space, 0);
354	354	}
355	355	if (chipSel & 2)
356	356	{
357		m_porta1 = ay8910_r(m_ay2, 0);
	357	m_porta1 = ay8910_r(m_ay2, space, 0);
358	358	}
359	359	break;
360	360
361	361	case 2: // BDIR=1, BC1=0 (write PSG)
362	362	if (chipSel & 1)
363	363	{
364		ay8910_data_w(m_ay1, 0, m_porta1);
	364	ay8910_data_w(m_ay1, space, 0, m_porta1);
365	365	}
366	366	if (chipSel & 2)
367	367	{
368		ay8910_data_w(m_ay2, 0, m_porta1);
	368	ay8910_data_w(m_ay2, space, 0, m_porta1);
369	369	}
370	370	break;
371	371
372	372	case 3: // BDIR=1, BC1=1 (latch)
373	373	if (chipSel & 1)
374	374	{
375		ay8910_address_w(m_ay1, 0, m_porta1);
	375	ay8910_address_w(m_ay1, space, 0, m_porta1);
376	376	}
377	377	if (chipSel & 2)
378	378	{
379		ay8910_address_w(m_ay2, 0, m_porta1);
	379	ay8910_address_w(m_ay2, space, 0, m_porta1);
380	380	}
381	381	break;
382	382	}
r17961	r17962
405	405	{
406	406	if (m_isPhasor && m_PhasorNative)
407	407	{
408		ay8910_reset_w(m_ay3, 0, 0);
409		ay8910_reset_w(m_ay4, 0, 0);
	408	ay8910_reset_w(m_ay3, space, 0, 0);
	409	ay8910_reset_w(m_ay4, space, 0, 0);
410	410	}
411	411	else
412	412	{
413		ay8910_reset_w(m_ay2, 0, 0);
	413	ay8910_reset_w(m_ay2, space, 0, 0);
414	414	}
415	415	}
416	416	else
r17961	r17962
423	423	break;
424	424
425	425	case 1: // BDIR=0, BC1=1 (read PSG)
426		m_porta2 = ay8910_r(m_ay2, 0);
	426	m_porta2 = ay8910_r(m_ay2, space, 0);
427	427	break;
428	428
429	429	case 2: // BDIR=1, BC1=0 (write PSG)
430		ay8910_data_w(m_ay2, 0, m_porta2);
	430	ay8910_data_w(m_ay2, space, 0, m_porta2);
431	431	break;
432	432
433	433	case 3: // BDIR=1, BC1=1 (latch)
434		ay8910_address_w(m_ay2, 0, m_porta2);
	434	ay8910_address_w(m_ay2, space, 0, m_porta2);
435	435	break;
436	436	}
437	437	}
r17961	r17962
457	457	case 1: // BDIR=0, BC1=1 (read PSG)
458	458	if (chipSel & 1)
459	459	{
460		m_porta2 = ay8910_r(m_ay3, 0);
	460	m_porta2 = ay8910_r(m_ay3, space, 0);
461	461	}
462	462	if (chipSel & 2)
463	463	{
464		m_porta2 = ay8910_r(m_ay4, 0);
	464	m_porta2 = ay8910_r(m_ay4, space, 0);
465	465	}
466	466	break;
467	467
468	468	case 2: // BDIR=1, BC1=0 (write PSG)
469	469	if (chipSel & 1)
470	470	{
471		ay8910_data_w(m_ay3, 0, m_porta2);
	471	ay8910_data_w(m_ay3, space, 0, m_porta2);
472	472	}
473	473	if (chipSel & 2)
474	474	{
475		ay8910_data_w(m_ay4, 0, m_porta2);
	475	ay8910_data_w(m_ay4, space, 0, m_porta2);
476	476	}
477	477	break;
478	478
479	479	case 3: // BDIR=1, BC1=1 (latch)
480	480	if (chipSel & 1)
481	481	{
482		ay8910_address_w(m_ay3, 0, m_porta2);
	482	ay8910_address_w(m_ay3, space, 0, m_porta2);
483	483	}
484	484	if (chipSel & 2)
485	485	{
486		ay8910_address_w(m_ay4, 0, m_porta2);
	486	ay8910_address_w(m_ay4, space, 0, m_porta2);
487	487	}
488	488	break;
489	489	}

trunk/src/mess/machine/apple3.c

r17961	r17962
171	171	case 0xE4: case 0xE5: case 0xE6: case 0xE7:
172	172	case 0xE8: case 0xE9: case 0xEA: case 0xEB:
173	173	case 0xEC: case 0xED: case 0xEE: case 0xEF:
174		result = applefdc_r(fdc, offset);
	174	result = applefdc_r(fdc, space, offset);
175	175	break;
176	176
177	177	case 0xF0:
r17961	r17962
234	234	case 0xE4: case 0xE5: case 0xE6: case 0xE7:
235	235	case 0xE8: case 0xE9: case 0xEA: case 0xEB:
236	236	case 0xEC: case 0xED: case 0xEE: case 0xEF:
237		applefdc_w(fdc, offset, data);
	237	applefdc_w(fdc, space, offset, data);
238	238	break;
239	239
240	240	case 0xF0:

trunk/src/mess/machine/s100_wunderbus.h

r17961	r17962
56	56	virtual void s100_vi0_w(int state);
57	57	virtual void s100_vi1_w(int state);
58	58	virtual void s100_vi2_w(int state);
59		virtual UINT8 s100_sinp_r(offs_t offset);
60		virtual void s100_sout_w(offs_t offset, UINT8 data);
	59	virtual UINT8 s100_sinp_r(address_space &space, offs_t offset);
	60	virtual void s100_sout_w(address_space &space, offs_t offset, UINT8 data);
61	61	virtual bool s100_has_terminal() { return true; }
62	62	virtual void s100_terminal_w(UINT8 data);
63	63

trunk/src/mess/machine/isa_fdc.c

r17961	r17962
11	11	#include "formats/pc_dsk.h"
12	12	#include "machine/idectrl.h"
13	13
14		static READ8_DEVICE_HANDLER ( pc_fdc_r );
15		static WRITE8_DEVICE_HANDLER ( pc_fdc_w );
	14	static DECLARE_READ8_DEVICE_HANDLER ( pc_fdc_r );
	15	static DECLARE_WRITE8_DEVICE_HANDLER ( pc_fdc_w );
16	16
17	17	/* if not 1, DACK and TC inputs to FDC are disabled, and DRQ and IRQ are held
18	18	* at high impedance i.e they are not affective */
r17961	r17962
353	353	case 3: /* tape drive select? */
354	354	break;
355	355	case 4:
356		data = upd765_status_r(fdc->m_upd765, 0);
	356	data = upd765_status_r(fdc->m_upd765, space, 0);
357	357	break;
358	358	case 5:
359		data = upd765_data_r(fdc->m_upd765, offset);
	359	data = upd765_data_r(fdc->m_upd765, space, offset);
360	360	break;
361	361	case 6: /* FDC reserved */
362	362	hdd = device->machine().device(":board3:ide:ide");
363	363	if (hdd)
364		data = ide_controller16_r(hdd, 0x3f6/2, 0x00ff);
	364	data = ide_controller16_r(hdd, space, 0x3f6/2, 0x00ff);
365	365	break;
366	366	case 7:
367	367	device_t *dev = get_floppy_subdevice(device, fdc->digital_output_register & 0x03);
r17961	r17962
392	392	case 1:   /* n/a */
393	393	break;
394	394	case 2:
395		pc_fdc_dor_w(device, 0, data);
	395	pc_fdc_dor_w(device, space, 0, data, mem_mask);
396	396	break;
397	397	case 3:
398	398	/* tape drive select? */
399	399	break;
400	400	case 4:
401		pc_fdc_data_rate_w(device, 0, data);
	401	pc_fdc_data_rate_w(device, space, 0, data, mem_mask);
402	402	break;
403	403	case 5:
404		upd765_data_w(fdc->m_upd765, 0, data);
	404	upd765_data_w(fdc->m_upd765, space, 0, data);
405	405	break;
406	406	case 6:
407	407	/* FDC reserved */
408	408	hdd = device->machine().device(":board3:ide:ide");
409	409	if (hdd)
410		ide_controller16_w(hdd, 0x3f6/2, data, 0x00ff);
	410	ide_controller16_w(hdd, space, 0x3f6/2, data, 0x00ff);
411	411	break;
412	412	case 7:
413	413	/* Configuration Control Register
r17961	r17962
419	419	*      1 0      250 kbps
420	420	*      1 1     1000 kbps
421	421	*/
422		pc_fdc_data_rate_w(device, 0, data & 3);
	422	pc_fdc_data_rate_w(device, space, 0, data & 3, mem_mask);
423	423	break;
424	424	}
425	425	}
r17961	r17962
432	432	/* if dma is not enabled, dacks are not acknowledged */
433	433	if ((digital_output_register & PC_FDC_FLAGS_DOR_DMA_ENABLED)!=0)
434	434	{
435		data = upd765_dack_r(m_upd765, 0);
	435	data = upd765_dack_r(m_upd765, machine().driver_data()->generic_space(), 0);
436	436	}
437	437
438	438	return data;
r17961	r17962
444	444	if ((digital_output_register & PC_FDC_FLAGS_DOR_DMA_ENABLED)!=0)
445	445	{
446	446	/* dma acknowledge - and send byte to fdc */
447		upd765_dack_w(m_upd765, 0,data);
	447	upd765_dack_w(m_upd765, machine().driver_data()->generic_space(), 0,data);
448	448	}
449	449	}
450	450	void isa8_fdc_device::eop_w(int state)

trunk/src/mess/machine/dai.c

r17961	r17962
225	225
226	226	READ8_MEMBER(dai_state::dai_pit_r)
227	227	{
228		return pit8253_r(m_pit, (offset>>1) & 3);
	228	return pit8253_r(m_pit, space, (offset>>1) & 3);
229	229	}
230	230
231	231	WRITE8_MEMBER(dai_state::dai_pit_w)
232	232	{
233		pit8253_w(m_pit, (offset>>1) & 3, data);
	233	pit8253_w(m_pit, space, (offset>>1) & 3, data);
234	234	}
235	235
236	236	/***************************************************************************

trunk/src/mess/machine/ataridev.h

r17961	r17962
67	67	/***************************************************************************
68	68	FUNCTION PROTOTYPES
69	69	***************************************************************************/
70		READ8_DEVICE_HANDLER( atari_serin_r );
71		WRITE8_DEVICE_HANDLER( atari_serout_w );
	70	DECLARE_READ8_DEVICE_HANDLER( atari_serin_r );
	71	DECLARE_WRITE8_DEVICE_HANDLER( atari_serout_w );
72	72	WRITE_LINE_DEVICE_HANDLER( atarifdc_pia_cb2_w );
73	73
74	74	#endif /* _ATARIDEV_H */

trunk/src/mess/machine/msx_slot.c

r17961	r17962
31	31	static void msx_cpu_setbank (running_machine &machine, int page, UINT8 *mem)
32	32	{
33	33	msx_state *state = machine.driver_data<msx_state>();
34		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	34	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
35	35	switch (page)
36	36	{
37	37	case 1:
r17961	r17962
46	46	case 4:
47	47	state->membank ("bank4")->set_base (mem);
48	48	state->membank ("bank5")->set_base (mem + 0x1ff8);
49		space->install_read_bank(0x7ff8, 0x7fff, "bank5");
	49	space.install_read_bank(0x7ff8, 0x7fff, "bank5");
50	50	break;
51	51	case 5:
52	52	state->membank ("bank6")->set_base (mem);
53	53	state->membank ("bank7")->set_base (mem + 0x1800);
54		space->install_read_bank(0x9800, 0x9fff, "bank7");
	54	space.install_read_bank(0x9800, 0x9fff, "bank7");
55	55	break;
56	56	case 6:
57	57	state->membank ("bank8")->set_base (mem);
58	58	state->membank ("bank9")->set_base (mem + 0x1800);
59		space->install_read_bank(0xb800, 0xbfff, "bank9");
	59	space.install_read_bank(0xb800, 0xbfff, "bank9");
60	60	break;
61	61	case 7:
62	62	state->membank ("bank10")->set_base (mem);
r17961	r17962
353	353	{
354	354	if ((offset & 0xff) >= 0xe0)
355	355	{
356		return k051649_test_r (space->machine().device("k051649"), offset & 0xff);
	356	return k051649_test_r (space->machine().device("k051649"), *space, offset & 0xff);
357	357	}
358	358	return 0xff;
359	359	}
360	360	else
361	361	{
362		return k051649_waveform_r (space->machine().device("k051649"), offset & 0x7f);
	362	return k051649_waveform_r (space->machine().device("k051649"), *space, offset & 0x7f);
363	363	}
364	364	}
365	365
r17961	r17962
393	393	MSX_SLOT_WRITE(konami_scc)
394	394	{
395	395	msx_state *drvstate = machine.driver_data<msx_state>();
396		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	396	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
397	397	if (addr >= 0x5000 && addr < 0x5800)
398	398	{
399	399	state->m_banks[0] = val & state->m_bank_mask;
r17961	r17962
424	424	}
425	425	else if (state->m_cart.scc.active && addr >= 0x9800 && addr < 0xa000)
426	426	{
427		device_t *k051649 = space->machine().device("k051649");
	427	device_t *k051649 = space.machine().device("k051649");
428	428	int offset = addr & 0xff;
429	429
430	430	if (offset < 0x80)
431	431	{
432		k051649_waveform_w (k051649, offset, val);
	432	k051649_waveform_w (k051649, space, offset, val);
433	433	}
434	434	else if (offset < 0xa0)
435	435	{
436	436	offset &= 0xf;
437	437	if (offset < 0xa)
438	438	{
439		k051649_frequency_w (k051649, offset, val);
	439	k051649_frequency_w (k051649, space, offset, val);
440	440	}
441	441	else if (offset < 0xf)
442	442	{
443		k051649_volume_w (k051649, offset - 0xa, val);
	443	k051649_volume_w (k051649, space, offset - 0xa, val);
444	444	}
445	445	else
446	446	{
447		k051649_keyonoff_w (k051649, 0, val);
	447	k051649_keyonoff_w (k051649, space, 0, val);
448	448	}
449	449	}
450	450	else if (offset >= 0xe0)
451	451	{
452		k051649_test_w (k051649, offset, val);
	452	k051649_test_w (k051649, space, offset, val);
453	453	}
454	454	}
455	455	else if (addr >= 0xb000 && addr < 0xb800)
r17961	r17962
1238	1238	device_t *fdc = space->machine().device("wd179x");
1239	1239	switch (offset)
1240	1240	{
1241		case 0: return wd17xx_status_r (fdc, 0);
1242		case 1: return wd17xx_track_r (fdc, 0);
1243		case 2: return wd17xx_sector_r (fdc, 0);
1244		case 3: return wd17xx_data_r (fdc, 0);
	1241	case 0: return wd17xx_status_r (fdc, *space, 0);
	1242	case 1: return wd17xx_track_r (fdc, *space, 0);
	1243	case 2: return wd17xx_sector_r (fdc, *space, 0);
	1244	case 3: return wd17xx_data_r (fdc, *space, 0);
1245	1245	case 7: return state->m_dsk_stat;
1246	1246	default:
1247	1247	return state->m_state[1]->m_mem[offset + 0x3ff8];
r17961	r17962
1257	1257	switch (offset)
1258	1258	{
1259	1259	case 0x7f8:
1260		return wd17xx_status_r (fdc, 0);
	1260	return wd17xx_status_r (fdc, *space, 0);
1261	1261	case 0x7f9:
1262		return wd17xx_track_r (fdc, 0);
	1262	return wd17xx_track_r (fdc, *space, 0);
1263	1263	case 0x7fa:
1264		return wd17xx_sector_r (fdc, 0);
	1264	return wd17xx_sector_r (fdc, *space, 0);
1265	1265	case 0x7fb:
1266		return wd17xx_data_r (fdc, 0);
	1266	return wd17xx_data_r (fdc, *space, 0);
1267	1267	case 0x7ff:
1268	1268	return state->m_dsk_stat;
1269	1269	default:
r17961	r17962
1279	1279	MSX_SLOT_MAP(diskrom)
1280	1280	{
1281	1281	msx_state *drvstate = machine.driver_data<msx_state>();
1282		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	1282	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
1283	1283	switch (page)
1284	1284	{
1285	1285	case 0:
r17961	r17962
1289	1289	case 1:
1290	1290	msx_cpu_setbank (machine, 3, state->m_mem);
1291	1291	msx_cpu_setbank (machine, 4, state->m_mem + 0x2000);
1292		space->install_legacy_read_handler(0x7ff8, 0x7fff, FUNC(msx_diskrom_page1_r));
	1292	space.install_legacy_read_handler(0x7ff8, 0x7fff, FUNC(msx_diskrom_page1_r));
1293	1293	break;
1294	1294	case 2:
1295	1295	msx_cpu_setbank (machine, 5, drvstate->m_empty);
1296	1296	msx_cpu_setbank (machine, 6, drvstate->m_empty);
1297		space->install_legacy_read_handler(0xb800, 0xbfff, FUNC(msx_diskrom_page2_r));
	1297	space.install_legacy_read_handler(0xb800, 0xbfff, FUNC(msx_diskrom_page2_r));
1298	1298	break;
1299	1299	case 3:
1300	1300	msx_cpu_setbank (machine, 7, drvstate->m_empty);
r17961	r17962
1306	1306	MSX_SLOT_WRITE(diskrom)
1307	1307	{
1308	1308	device_t *fdc = machine.device("wd179x");
	1309	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
1309	1310	if (addr >= 0xa000 && addr < 0xc000)
1310	1311	{
1311	1312	addr -= 0x4000;
r17961	r17962
1313	1314	switch (addr)
1314	1315	{
1315	1316	case 0x7ff8:
1316		wd17xx_command_w (fdc, 0, val);
	1317	wd17xx_command_w (fdc, space, 0, val);
1317	1318	break;
1318	1319	case 0x7ff9:
1319		wd17xx_track_w (fdc, 0, val);
	1320	wd17xx_track_w (fdc, space, 0, val);
1320	1321	break;
1321	1322	case 0x7ffa:
1322		wd17xx_sector_w (fdc, 0, val);
	1323	wd17xx_sector_w (fdc, space, 0, val);
1323	1324	break;
1324	1325	case 0x7ffb:
1325		wd17xx_data_w (fdc, 0, val);
	1326	wd17xx_data_w (fdc, space, 0, val);
1326	1327	break;
1327	1328	case 0x7ffc:
1328	1329	wd17xx_set_side (fdc,val & 1);
r17961	r17962
1366	1367	device_t *fdc = space->machine().device("wd179x");
1367	1368	switch (offset)
1368	1369	{
1369		case 0: return wd17xx_status_r(fdc, 0);
1370		case 1: return wd17xx_track_r(fdc, 0);
1371		case 2: return wd17xx_sector_r(fdc, 0);
1372		case 3: return wd17xx_data_r(fdc, 0);
	1370	case 0: return wd17xx_status_r(fdc, *space, 0);
	1371	case 1: return wd17xx_track_r(fdc, *space, 0);
	1372	case 2: return wd17xx_sector_r(fdc, *space, 0);
	1373	case 3: return wd17xx_data_r(fdc, *space, 0);
1373	1374	case 4: return state->m_dsk_stat;
1374	1375	default:
1375	1376	return state->m_state[1]->m_mem[offset + 0x3ff8];
r17961	r17962
1385	1386	switch (offset)
1386	1387	{
1387	1388	case 0x7b8:
1388		return wd17xx_status_r (fdc, 0);
	1389	return wd17xx_status_r (fdc, *space, 0);
1389	1390	case 0x7b9:
1390		return wd17xx_track_r (fdc, 0);
	1391	return wd17xx_track_r (fdc, *space, 0);
1391	1392	case 0x7ba:
1392		return wd17xx_sector_r (fdc, 0);
	1393	return wd17xx_sector_r (fdc, *space, 0);
1393	1394	case 0x7bb:
1394		return wd17xx_data_r (fdc, 0);
	1395	return wd17xx_data_r (fdc, *space, 0);
1395	1396	case 0x7bc:
1396	1397	return state->m_dsk_stat;
1397	1398	default:
r17961	r17962
1407	1408	MSX_SLOT_MAP(diskrom2)
1408	1409	{
1409	1410	msx_state *drvstate = machine.driver_data<msx_state>();
1410		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	1411	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
1411	1412	switch (page)
1412	1413	{
1413	1414	case 0:
r17961	r17962
1417	1418	case 1:
1418	1419	msx_cpu_setbank (machine, 3, state->m_mem);
1419	1420	msx_cpu_setbank (machine, 4, state->m_mem + 0x2000);
1420		space->install_legacy_read_handler(0x7fb8, 0x7fbc, FUNC(msx_diskrom2_page1_r));
	1421	space.install_legacy_read_handler(0x7fb8, 0x7fbc, FUNC(msx_diskrom2_page1_r));
1421	1422	break;
1422	1423	case 2:
1423	1424	msx_cpu_setbank (machine, 5, drvstate->m_empty);
1424	1425	msx_cpu_setbank (machine, 6, drvstate->m_empty);
1425		space->install_legacy_read_handler(0xb800, 0xbfbc, FUNC(msx_diskrom2_page2_r));
	1426	space.install_legacy_read_handler(0xb800, 0xbfbc, FUNC(msx_diskrom2_page2_r));
1426	1427	break;
1427	1428	case 3:
1428	1429	msx_cpu_setbank (machine, 7, drvstate->m_empty);
r17961	r17962
1433	1434	MSX_SLOT_WRITE(diskrom2)
1434	1435	{
1435	1436	device_t *fdc = machine.device("wd179x");
	1437	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
1436	1438	if (addr >= 0xa000 && addr < 0xc000)
1437	1439	{
1438	1440	addr -= 0x4000;
r17961	r17962
1440	1442	switch (addr)
1441	1443	{
1442	1444	case 0x7fb8:
1443		wd17xx_command_w (fdc, 0, val);
	1445	wd17xx_command_w (fdc, space, 0, val);
1444	1446	break;
1445	1447	case 0x7fb9:
1446		wd17xx_track_w (fdc, 0, val);
	1448	wd17xx_track_w (fdc, space, 0, val);
1447	1449	break;
1448	1450	case 0x7fba:
1449		wd17xx_sector_w (fdc, 0, val);
	1451	wd17xx_sector_w (fdc, space, 0, val);
1450	1452	break;
1451	1453	case 0x7fbb:
1452		wd17xx_data_w (fdc, 0, val);
	1454	wd17xx_data_w (fdc, space, 0, val);
1453	1455	break;
1454	1456	case 0x7fbc:
1455	1457	wd17xx_set_side (fdc,val & 1);
r17961	r17962
1683	1685	MSX_SLOT_WRITE(fmpac)
1684	1686	{
1685	1687	msx_state *drvstate = machine.driver_data<msx_state>();
1686		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	1688	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
1687	1689	int i, data;
1688	1690
1689	1691	if (addr >= 0x4000 && addr < 0x6000 && state->m_cart.fmpac.sram_support)
r17961	r17962
1703	1705	case 0x7ff4:
1704	1706	if (state->m_cart.fmpac.opll_active)
1705	1707	{
1706		ym2413_w (space->machine().device("ay8910"), 0, val);
	1708	ym2413_w (space.machine().device("ay8910"), space, 0, val);
1707	1709	}
1708	1710	break;
1709	1711	case 0x7ff5:
1710	1712	if (state->m_cart.fmpac.opll_active)
1711	1713	{
1712		ym2413_w (space->machine().device("ay8910"), 1, val);
	1714	ym2413_w (space.machine().device("ay8910"), space, 1, val);
1713	1715	}
1714	1716	break;
1715	1717	case 0x7ff6:
r17961	r17962
2196	2198
2197	2199	if (reg < 0x80)
2198	2200	{
2199		return k051649_waveform_r (space->machine().device("k051649"), reg);
	2201	return k051649_waveform_r (space->machine().device("k051649"), *space, reg);
2200	2202	}
2201	2203	else if (reg < 0xa0)
2202	2204	{
r17961	r17962
2205	2207	else if (reg < 0xc0)
2206	2208	{
2207	2209	/* read wave 5 */
2208		return k051649_waveform_r (space->machine().device("k051649"), 0x80 + (reg & 0x1f));
	2210	return k051649_waveform_r (space->machine().device("k051649"), *space, 0x80 + (reg & 0x1f));
2209	2211	}
2210	2212	else if (reg < 0xe0)
2211	2213	{
2212		return k051649_test_r (space->machine().device("k051649"), reg);
	2214	return k051649_test_r (space->machine().device("k051649"), *space, reg);
2213	2215	}
2214	2216
2215	2217	return 0xff;
r17961	r17962
2230	2232
2231	2233	if (reg < 0xa0)
2232	2234	{
2233		return k052539_waveform_r (space->machine().device("k051649"), reg);
	2235	return k052539_waveform_r (space->machine().device("k051649"), *space, reg);
2234	2236	}
2235	2237	else if (reg >= 0xc0 && reg < 0xe0)
2236	2238	{
2237		return k051649_test_r (space->machine().device("k051649"), reg);
	2239	return k051649_test_r (space->machine().device("k051649"), *space, reg);
2238	2240	}
2239	2241
2240	2242	return 0xff;
r17961	r17962
2242	2244
2243	2245	MSX_SLOT_MAP(soundcartridge)
2244	2246	{
2245		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	2247	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
2246	2248	switch (page)
2247	2249	{
2248	2250	case 0:
r17961	r17962
2257	2259	msx_cpu_setbank (machine, 5, state->m_mem + state->m_banks[2] * 0x2000);
2258	2260	msx_cpu_setbank (machine, 6, state->m_mem + state->m_banks[3] * 0x2000);
2259	2261	if (state->m_cart.sccp.scc_active) {
2260		space->install_legacy_read_handler(0x9800, 0x9fff, FUNC(soundcartridge_scc));
	2262	space.install_legacy_read_handler(0x9800, 0x9fff, FUNC(soundcartridge_scc));
2261	2263	} else {
2262		space->install_read_bank(0x9800, 0x9fff, "bank7");
	2264	space.install_read_bank(0x9800, 0x9fff, "bank7");
2263	2265	}
2264	2266	if (state->m_cart.sccp.scc_active) {
2265		space->install_legacy_read_handler(0xb800, 0xbfff, FUNC(soundcartridge_sccp));
	2267	space.install_legacy_read_handler(0xb800, 0xbfff, FUNC(soundcartridge_sccp));
2266	2268	} else {
2267		space->install_read_bank(0xb800, 0xbfff, "bank9");
	2269	space.install_read_bank(0xb800, 0xbfff, "bank9");
2268	2270	}
2269	2271	break;
2270	2272	case 3:
r17961	r17962
2277	2279	MSX_SLOT_WRITE(soundcartridge)
2278	2280	{
2279	2281	msx_state *drvstate = machine.driver_data<msx_state>();
2280		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	2282	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
2281	2283	int i;
2282	2284
2283	2285	if (addr < 0x4000)
r17961	r17962
2339	2341	}
2340	2342	else if (addr >= 0x9800 && state->m_cart.sccp.scc_active)
2341	2343	{
2342		device_t *k051649 = space->machine().device("k051649");
	2344	device_t *k051649 = space.machine().device("k051649");
2343	2345	int offset = addr & 0xff;
2344	2346
2345	2347	if (offset < 0x80)
2346	2348	{
2347		k051649_waveform_w (k051649, offset, val);
	2349	k051649_waveform_w (k051649, space, offset, val);
2348	2350	}
2349	2351	else if (offset < 0xa0)
2350	2352	{
r17961	r17962
2352	2354
2353	2355	if (offset < 0xa)
2354	2356	{
2355		k051649_frequency_w (k051649, offset, val);
	2357	k051649_frequency_w (k051649, space, offset, val);
2356	2358	}
2357	2359	else if (offset < 0x0f)
2358	2360	{
2359		k051649_volume_w (k051649, offset - 0xa, val);
	2361	k051649_volume_w (k051649, space, offset - 0xa, val);
2360	2362	}
2361	2363	else if (offset == 0x0f)
2362	2364	{
2363		k051649_keyonoff_w (k051649, 0, val);
	2365	k051649_keyonoff_w (k051649, space, 0, val);
2364	2366	}
2365	2367	}
2366	2368	else if (offset < 0xe0)
2367	2369	{
2368		k051649_test_w (k051649, offset, val);
	2370	k051649_test_w (k051649, space, offset, val);
2369	2371	}
2370	2372	}
2371	2373	}
r17961	r17962
2389	2391	}
2390	2392	else if (addr >= 0xb800 && state->m_cart.sccp.sccp_active)
2391	2393	{
2392		device_t *k051649 = space->machine().device("k051649");
	2394	device_t *k051649 = space.machine().device("k051649");
2393	2395	int offset = addr & 0xff;
2394	2396
2395	2397	if (offset < 0xa0)
2396	2398	{
2397		k052539_waveform_w (k051649, offset, val);
	2399	k052539_waveform_w (k051649, space, offset, val);
2398	2400	}
2399	2401	else if (offset < 0xc0)
2400	2402	{
r17961	r17962
2402	2404
2403	2405	if (offset < 0x0a)
2404	2406	{
2405		k051649_frequency_w (k051649, offset, val);
	2407	k051649_frequency_w (k051649, space, offset, val);
2406	2408	}
2407	2409	else if (offset < 0x0f)
2408	2410	{
2409		k051649_volume_w (k051649, offset - 0x0a, val);
	2411	k051649_volume_w (k051649, space, offset - 0x0a, val);
2410	2412	}
2411	2413	else if (offset == 0x0f)
2412	2414	{
2413		k051649_keyonoff_w (k051649, 0, val);
	2415	k051649_keyonoff_w (k051649, space, 0, val);
2414	2416	}
2415	2417	}
2416	2418	else if (offset < 0xe0)
2417	2419	{
2418		k051649_test_w (k051649, offset, val);
	2420	k051649_test_w (k051649, space, offset, val);
2419	2421	}
2420	2422	}
2421	2423	}

trunk/src/mess/machine/mos6530.h

r17961	r17962
82	82	PROTOTYPES
83	83	***************************************************************************/
84	84
85		READ8_DEVICE_HANDLER( mos6530_r );
86		WRITE8_DEVICE_HANDLER( mos6530_w );
	85	DECLARE_READ8_DEVICE_HANDLER( mos6530_r );
	86	DECLARE_WRITE8_DEVICE_HANDLER( mos6530_w );
87	87
88	88	void mos6530_porta_in_set(device_t *device, UINT8 data, UINT8 mask);
89	89	void mos6530_portb_in_set(device_t *device, UINT8 data, UINT8 mask);

trunk/src/mess/machine/mc6854.h

r17961	r17962
80	80
81	81	/* ---------- functions ------------ */
82	82	/* interface to CPU via address/data bus*/
83		extern READ8_DEVICE_HANDLER  ( mc6854_r );
84		extern WRITE8_DEVICE_HANDLER ( mc6854_w );
	83	extern DECLARE_READ8_DEVICE_HANDLER  ( mc6854_r );
	84	extern DECLARE_WRITE8_DEVICE_HANDLER ( mc6854_w );
85	85
86	86	/* low-level, bit-based interface */
87	87	WRITE_LINE_DEVICE_HANDLER( mc6854_set_rx );

trunk/src/mess/machine/tvc_hbf.c

r17961	r17962
154	154	switch((offset>>2) & 0x03)
155	155	{
156	156	case 0x00:
157		return wd17xx_r(m_fdc, offset & 3);
	157	return wd17xx_r(m_fdc, space, offset & 3);
158	158	case 0x01:
159	159	return (wd17xx_drq_r(m_fdc)<<7) | wd17xx_intrq_r(m_fdc);
160	160	default:
r17961	r17962
171	171	switch((offset>>2) & 0x03)
172	172	{
173	173	case 0x00:
174		wd17xx_w(m_fdc, offset & 3, data);
	174	wd17xx_w(m_fdc, space, offset & 3, data);
175	175	break;
176	176	case 0x01:
177	177	// bit 0-3   drive select

trunk/src/mess/machine/mc6846.c

r17961	r17962
59	59	emu_timer *interval; /* interval programmable timer */
60	60	emu_timer *one_shot; /* 1-us x factor one-shot timer */
61	61
	62	/* CPU write to the outside through chip */
	63	devcb_resolved_write8 out_port;  /* 8-bit output */
	64	devcb_resolved_write8 out_cp1;   /* 1-bit output */
	65	devcb_resolved_write8 out_cp2;   /* 1-bit output */
	66
	67	/* CPU read from the outside through chip */
	68	devcb_resolved_read8 in_port; /* 8-bit input */
	69
	70	/* asynchronous timer output to outside world */
	71	devcb_resolved_write8 out_cto; /* 1-bit output */
	72
	73	/* timer interrupt */
	74	devcb_resolved_write_line irq;
	75
62	76	int old_cif;
63	77	int old_cto;
64	78	};
r17961	r17962
71	85
72	86	#define PORT                        \
73	87	((mc6846->pdr & mc6846->ddr) |               \
74		((mc6846->iface->in_port_func ? mc6846->iface->in_port_func( device, 0 ) : 0) & \
	88	((!mc6846->in_port.isnull() ? mc6846->in_port( 0 ) : 0) & \
75	89	~mc6846->ddr))
76	90
77	91	#define CTO                        \
r17961	r17962
124	138	if ( cif )
125	139	{
126	140	mc6846->csr |= 0x80;
127		if ( mc6846->iface->irq_func )
128		mc6846->iface->irq_func( device, 1 );
	141	if ( !mc6846->irq.isnull() )
	142	mc6846->irq( 1 );
129	143	}
130	144	else
131	145	{
132	146	mc6846->csr &= ~0x80;
133		if ( mc6846->iface->irq_func )
134		mc6846->iface->irq_func( device, 0 );
	147	if ( !mc6846->irq.isnull() )
	148	mc6846->irq( 0 );
135	149	}
136	150	}
137	151
r17961	r17962
146	160	LOG (( "%f: mc6846 CTO set to %i\n", device->machine().time().as_double(), cto ));
147	161	mc6846->old_cto = cto;
148	162	}
149		if ( mc6846->iface->out_cto_func )
150		mc6846->iface->out_cto_func( device, 0, cto );
	163	if ( !mc6846->out_cto.isnull() )
	164	mc6846->out_cto( 0, cto );
151	165	}
152	166
153	167
r17961	r17962
372	386	if (data & 0x10)
373	387	{
374	388	mc6846->cp2_cpu = (data >> 3) & 1;
375		if ( mc6846->iface->out_cp2_func )
376		mc6846->iface->out_cp2_func( device, 0, mc6846->cp2_cpu );
	389	if ( !mc6846->out_cp2.isnull() )
	390	mc6846->out_cp2( 0, mc6846->cp2_cpu );
377	391	}
378	392	else
379	393	logerror( "$%04x mc6846 acknowledge not implemented\n", device->machine().firstcpu->pcbase( ) );
r17961	r17962
385	399	if ( ! (mc6846->pcr & 0x80) )
386	400	{
387	401	mc6846->ddr = data;
388		if ( mc6846->iface->out_port_func )
389		mc6846->iface->out_port_func( device, 0, mc6846->pdr & mc6846->ddr );
	402	if ( !mc6846->out_port.isnull() )
	403	mc6846->out_port( 0, mc6846->pdr & mc6846->ddr );
390	404	}
391	405	break;
392	406
r17961	r17962
395	409	if ( ! (mc6846->pcr & 0x80) )
396	410	{
397	411	mc6846->pdr = data;
398		if ( mc6846->iface->out_port_func )
399		mc6846->iface->out_port_func( device, 0, mc6846->pdr & mc6846->ddr );
	412	if ( !mc6846->out_port.isnull() )
	413	mc6846->out_port( 0, mc6846->pdr & mc6846->ddr );
400	414	if ( mc6846->csr1_to_be_cleared && (mc6846->csr & 2) )
401	415	{
402	416	mc6846->csr &= ~2;
r17961	r17962
590	604	mc6846->interval = device->machine().scheduler().timer_alloc(FUNC(mc6846_timer_expire), (void*) device );
591	605	mc6846->one_shot = device->machine().scheduler().timer_alloc(FUNC(mc6846_timer_one_shot), (void*) device );
592	606
	607	mc6846->out_port.resolve(mc6846->iface->out_port_func, *device);  /* 8-bit output */
	608	mc6846->out_cp1.resolve(mc6846->iface->out_cp1_func, *device);   /* 1-bit output */
	609	mc6846->out_cp2.resolve(mc6846->iface->out_cp2_func, *device);   /* 1-bit output */
	610
	611	/* CPU read from the outside through chip */
	612	mc6846->in_port.resolve(mc6846->iface->in_port_func, *device); /* 8-bit input */
	613
	614	/* asynchronous timer output to outside world */
	615	mc6846->out_cto.resolve(mc6846->iface->out_cto_func, *device); /* 1-bit output */
	616
	617	/* timer interrupt */
	618	mc6846->irq.resolve(mc6846->iface->irq_func, *device);
	619
593	620	state_save_register_item( device->machine(), "mc6846", device->tag(), 0, mc6846->csr );
594	621	state_save_register_item( device->machine(), "mc6846", device->tag(), 0, mc6846->pcr );
595	622	state_save_register_item( device->machine(), "mc6846", device->tag(), 0, mc6846->ddr );

trunk/src/mess/machine/mc6846.h

r17961	r17962
35	35	struct mc6846_interface
36	36	{
37	37	/* CPU write to the outside through chip */
38		write8_device_func out_port_func;  /* 8-bit output */
39		write8_device_func out_cp1_func;   /* 1-bit output */
40		write8_device_func out_cp2_func;   /* 1-bit output */
	38	devcb_write8 out_port_func;  /* 8-bit output */
	39	devcb_write8 out_cp1_func;   /* 1-bit output */
	40	devcb_write8 out_cp2_func;   /* 1-bit output */
41	41
42	42	/* CPU read from the outside through chip */
43		read8_device_func in_port_func; /* 8-bit input */
	43	devcb_read8 in_port_func; /* 8-bit input */
44	44
45	45	/* asynchronous timer output to outside world */
46		write8_device_func out_cto_func; /* 1-bit output */
	46	devcb_write8 out_cto_func; /* 1-bit output */
47	47
48	48	/* timer interrupt */
49		void ( * irq_func ) ( device_t *device, int state );
	49	devcb_write_line irq_func;
50	50	};
51	51
52	52
r17961	r17962
64	64
65	65	/* ---------- functions ------------ */
66	66	/* interface to CPU via address/data bus*/
67		extern READ8_DEVICE_HANDLER  ( mc6846_r );
68		extern WRITE8_DEVICE_HANDLER ( mc6846_w );
	67	extern DECLARE_READ8_DEVICE_HANDLER  ( mc6846_r );
	68	extern DECLARE_WRITE8_DEVICE_HANDLER ( mc6846_w );
69	69
70	70	/* asynchronous write from outside world into interrupt-generating pins */
71	71	extern void mc6846_set_input_cp1 ( device_t *device, int data );

trunk/src/mess/machine/pmd85.c

r17961	r17962
568	568	case 0x40:      /* 8255 (GPIO/0, GPIO/1) */
569	569	return machine().device<i8255_device>("ppi8255_1")->read(space, offset & 0x03);
570	570	case 0x50:   /* 8253 */
571		return pit8253_r( machine().device("pit8253"), offset & 0x03);
	571	return pit8253_r( machine().device("pit8253"), space, offset & 0x03);
572	572	case 0x70:   /* 8255 (IMS-2) */
573	573	return machine().device<i8255_device>("ppi8255_2")->read(space, offset & 0x03);
574	574	}
r17961	r17962
645	645	machine().device<i8255_device>("ppi8255_1")->write(space, offset & 0x03, data);
646	646	break;
647	647	case 0x50:   /* 8253 */
648		pit8253_w(machine().device("pit8253"), offset & 0x03, data);
	648	pit8253_w(machine().device("pit8253"), space, offset & 0x03, data);
649	649	logerror ("8253 writing. Address: %02x, Data: %02x\n", offset, data);
650	650	break;
651	651	case 0x70:   /* 8255 (IMS-2) */

trunk/src/mess/machine/upd71071.c

r17961	r17962
416	416	}
417	417	}
418	418
419		READ8_DEVICE_HANDLER(upd71071_r) { return upd71071_read(device,offset); }
420		WRITE8_DEVICE_HANDLER(upd71071_w) { upd71071_write(device,offset,data); }
	419	READ8_DEVICE_HANDLER(upd71071_r) { return upd71071_read(device,space,offset,mem_mask); }
	420	WRITE8_DEVICE_HANDLER(upd71071_w) { upd71071_write(device,space,offset,data,mem_mask); }
421	421
422	422	const device_type UPD71071 = &device_creator<upd71071_device>;
423	423

trunk/src/mess/machine/upd71071.h

r17961	r17962
37	37	MCFG_DEVICE_ADD(_tag, UPD71071, 0) \
38	38	MCFG_DEVICE_CONFIG(_config)
39	39
40		READ8_DEVICE_HANDLER(upd71071_r);
41		WRITE8_DEVICE_HANDLER(upd71071_w);
	40	DECLARE_READ8_DEVICE_HANDLER(upd71071_r);
	41	DECLARE_WRITE8_DEVICE_HANDLER(upd71071_w);
42	42
43	43	#endif /*UPD71071_H_*/

trunk/src/mess/machine/c64_sfx_sound_expander.c

r17961	r17962
257	257	}
258	258	else if (BIT(offset, 5))
259	259	{
260		data = ym3526_r(m_opl, BIT(offset, 4));
	260	data = ym3526_r(m_opl, space, BIT(offset, 4));
261	261	}
262	262	}
263	263
r17961	r17962
273	273	{
274	274	if (!io2 && BIT(offset, 5))
275	275	{
276		ym3526_w(m_opl, BIT(offset, 4), data);
	276	ym3526_w(m_opl, space, BIT(offset, 4), data);
277	277	}
278	278
279	279	m_exp->cd_w(space, offset, data, ba, roml, romh, io1, io2);

trunk/src/mess/machine/orion.c

r17961	r17962
181	181	switch(offset)
182	182	{
183	183	case 0x0   :
184		case 0x10 : return wd17xx_status_r(fdc,0);
	184	case 0x10 : return wd17xx_status_r(fdc,space, 0);
185	185	case 0x1   :
186		case 0x11 : return wd17xx_track_r(fdc,0);
	186	case 0x11 : return wd17xx_track_r(fdc,space, 0);
187	187	case 0x2  :
188		case 0x12 : return wd17xx_sector_r(fdc,0);
	188	case 0x12 : return wd17xx_sector_r(fdc,space, 0);
189	189	case 0x3  :
190		case 0x13 : return wd17xx_data_r(fdc,0);
	190	case 0x13 : return wd17xx_data_r(fdc,space, 0);
191	191	}
192	192	return 0xff;
193	193	}
r17961	r17962
199	199	switch(offset)
200	200	{
201	201	case 0x0   :
202		case 0x10 : wd17xx_command_w(fdc,0,data); break;
	202	case 0x10 : wd17xx_command_w(fdc,space, 0,data); break;
203	203	case 0x1   :
204		case 0x11 : wd17xx_track_w(fdc,0,data);break;
	204	case 0x11 : wd17xx_track_w(fdc,space, 0,data);break;
205	205	case 0x2  :
206		case 0x12 : wd17xx_sector_w(fdc,0,data);break;
	206	case 0x12 : wd17xx_sector_w(fdc,space, 0,data);break;
207	207	case 0x3  :
208		case 0x13 : wd17xx_data_w(fdc,0,data);break;
	208	case 0x13 : wd17xx_data_w(fdc,space, 0,data);break;
209	209	case 0x4  :
210	210	case 0x14 :
211	211	case 0x20 : orion_disk_control_w(space, offset, data);break;
r17961	r17962
378	378	{
379	379	if (offset == 0xFFFD)
380	380	{
381		return ay8910_r (machine().device("ay8912"), 0);
	381	return ay8910_r (machine().device("ay8912"), space, 0);
382	382	}
383	383	return 0xff;
384	384	}
r17961	r17962
396	396	}
397	397	switch(offset)
398	398	{
399		case 0xfffd : ay8910_address_w(machine().device("ay8912"), 0, data);
	399	case 0xfffd : ay8910_address_w(machine().device("ay8912"), space, 0, data);
400	400	break;
401	401	case 0xbffd :
402		case 0xbefd : ay8910_data_w(machine().device("ay8912"), 0, data);
	402	case 0xbefd : ay8910_data_w(machine().device("ay8912"), space, 0, data);
403	403	break;
404	404	}
405	405	}
r17961	r17962
556	556	case 0x08 : return m_orionpro_page;
557	557	case 0x09 : return m_orionpro_rom2_segment;
558	558	case 0x0a : return m_orionpro_dispatcher;
559		case 0x10 : return wd17xx_status_r(fdc,0);
560		case 0x11 : return wd17xx_track_r(fdc,0);
561		case 0x12 : return wd17xx_sector_r(fdc,0);
562		case 0x13 : return wd17xx_data_r(fdc,0);
	559	case 0x10 : return wd17xx_status_r(fdc,space, 0);
	560	case 0x11 : return wd17xx_track_r(fdc,space, 0);
	561	case 0x12 : return wd17xx_sector_r(fdc,space, 0);
	562	case 0x13 : return wd17xx_data_r(fdc,space, 0);
563	563	case 0x18 :
564	564	case 0x19 :
565	565	case 0x1a :
r17961	r17962
572	572	}
573	573	if (offset == 0xFFFD)
574	574	{
575		return ay8910_r (machine().device("ay8912"), 0);
	575	return ay8910_r (machine().device("ay8912"), space, 0);
576	576	}
577	577	return 0xff;
578	578	}
r17961	r17962
589	589	case 0x08 : m_orionpro_page = data;        orionpro_bank_switch(machine()); break;
590	590	case 0x09 : m_orionpro_rom2_segment = data; orionpro_bank_switch(machine()); break;
591	591	case 0x0a : m_orionpro_dispatcher = data;   orionpro_bank_switch(machine()); break;
592		case 0x10 : wd17xx_command_w(fdc,0,data); break;
593		case 0x11 : wd17xx_track_w(fdc,0,data);break;
594		case 0x12 : wd17xx_sector_w(fdc,0,data);break;
595		case 0x13 : wd17xx_data_w(fdc,0,data);break;
	592	case 0x10 : wd17xx_command_w(fdc,space, 0,data); break;
	593	case 0x11 : wd17xx_track_w(fdc,space, 0,data);break;
	594	case 0x12 : wd17xx_sector_w(fdc,space, 0,data);break;
	595	case 0x13 : wd17xx_data_w(fdc,space, 0,data);break;
596	596	case 0x14 : orion_disk_control_w(space, 9, data);break;
597	597	case 0x18 :
598	598	case 0x19 :
r17961	r17962
612	612	}
613	613	switch(offset)
614	614	{
615		case 0xfffd : ay8910_address_w(machine().device("ay8912"), 0, data);
	615	case 0xfffd : ay8910_address_w(machine().device("ay8912"), space, 0, data);
616	616	break;
617	617	case 0xbffd :
618		case 0xbefd : ay8910_data_w(machine().device("ay8912"), 0, data);
	618	case 0xbefd : ay8910_data_w(machine().device("ay8912"), space, 0, data);
619	619	break;
620	620	}
621	621	}

trunk/src/mess/machine/cpc_ssa1.c

r17961	r17962
45	45
46	46	WRITE8_MEMBER(cpc_ssa1_device::ssa1_w)
47	47	{
48		sp0256_ALD_w(m_sp0256_device,0,data);
	48	sp0256_ALD_w(m_sp0256_device,space, 0,data);
49	49	}
50	50
51	51	READ8_MEMBER(cpc_dkspeech_device::dkspeech_r)
r17961	r17962
62	62
63	63	WRITE8_MEMBER(cpc_dkspeech_device::dkspeech_w)
64	64	{
65		sp0256_ALD_w(m_sp0256_device,0,data & 0x3f);
	65	sp0256_ALD_w(m_sp0256_device,space, 0,data & 0x3f);
66	66	}
67	67
68	68	WRITE_LINE_MEMBER(cpc_ssa1_device::lrq_cb)

trunk/src/mess/machine/a7800.c

r17961	r17962
525	525	}
526	526	break;
527	527	}
528		tia_sound_w(machine().device("tia"), offset, data);
	528	tia_sound_w(machine().device("tia"), space, offset, data);
529	529	m_ROM[offset] = data;
530	530	}

trunk/src/mess/machine/e05a03.h

r17961	r17962
28	28	/***************************************************************************
29	29	FUNCTION PROTOTYPES
30	30	***************************************************************************/
31		WRITE8_DEVICE_HANDLER( e05a03_w );
32		READ8_DEVICE_HANDLER( e05a03_r );
	31	DECLARE_WRITE8_DEVICE_HANDLER( e05a03_w );
	32	DECLARE_READ8_DEVICE_HANDLER( e05a03_r );
33	33
34	34	WRITE_LINE_DEVICE_HANDLER( e05a03_home_w ); /* home position signal */
35	35	WRITE_LINE_DEVICE_HANDLER( e05a03_fire_w ); /* printhead solenoids trigger */

trunk/src/mess/machine/hecdisk2.c

r17961	r17962
248	248	hec2hrp_state *state = space->machine().driver_data<hec2hrp_state>();
249	249	UINT8 data;
250	250	device_t *fdc = space->machine().device("upd765");
251		data = upd765_data_r(fdc,0); //Get the result
	251	data = upd765_data_r(fdc,*space, 0); //Get the result
252	252
253	253	// if ST0 == 0x28 (drive A:) or 0x29 (drive B:) => add 0x40
254	254	// and correct the ST1 and ST2 (patch)
r17961	r17962
309	309	#endif
310	310
311	311	device_t *fdc = space->machine().device("upd765");
312		upd765_data_w(fdc,0, data);
	312	upd765_data_w(fdc,*space, 0, data);
313	313	}
314	314
315	315	//  AM_RANGE(0x070,0x07f) AM_DEVREADWRITE("upd765",upd765_dack_r,upd765_dack_w)
r17961	r17962
317	317	{
318	318	UINT8 data;
319	319	device_t *fdc = space->machine().device("upd765");
320		data = upd765_dack_r(fdc,0);
	320	data = upd765_dack_r(fdc,*space, 0);
321	321	return data;
322	322	}
323	323	WRITE8_HANDLER( hector_disc2_io70_port_w)
324	324	{
325	325	device_t *fdc = space->machine().device("upd765");
326		upd765_dack_w(fdc,0, data);
	326	upd765_dack_w(fdc,*space, 0, data);
327	327	}

trunk/src/mess/machine/dgnalpha.c

r17961	r17962
144	144	break;
145	145
146	146	case 12:
147		result = wd17xx_data_r(m_fdc, 0);
	147	result = wd17xx_data_r(m_fdc, space, 0);
148	148	break;
149	149
150	150	case 13:
151		result = wd17xx_sector_r(m_fdc, 0);
	151	result = wd17xx_sector_r(m_fdc, space, 0);
152	152	break;
153	153
154	154	case 14:
155		result = wd17xx_track_r(m_fdc, 0);
	155	result = wd17xx_track_r(m_fdc, space, 0);
156	156	break;
157	157
158	158	case 15:
159		result = wd17xx_status_r(m_fdc, 0);
	159	result = wd17xx_status_r(m_fdc, space, 0);
160	160	break;
161	161	}
162	162	return result;
r17961	r17962
185	185	break;
186	186
187	187	case 12:
188		wd17xx_data_w(m_fdc, 0, data);
	188	wd17xx_data_w(m_fdc, space, 0, data);
189	189	break;
190	190	case 13:
191		wd17xx_sector_w(m_fdc, 0, data);
	191	wd17xx_sector_w(m_fdc, space, 0, data);
192	192	break;
193	193	case 14:
194		wd17xx_track_w(m_fdc, 0, data);
	194	wd17xx_track_w(m_fdc, space, 0, data);
195	195	break;
196	196	case 15:
197		wd17xx_command_w(m_fdc, 0, data);
	197	wd17xx_command_w(m_fdc, space, 0, data);
198	198
199	199	/* disk head is encoded in the command byte */
200	200	wd17xx_set_side(m_fdc,(data & 0x02) ? 1 : 0);
r17961	r17962
236	236	case 0x00:      /* Inactive, do nothing */
237	237	break;
238	238	case 0x01:      /* Write to selected port */
239		ay8910_data_w(m_ay8912, 0, m_pia_2->b_output());
	239	ay8910_data_w(m_ay8912, space, 0, m_pia_2->b_output());
240	240	break;
241	241	case 0x02:      /* Read from selected port */
242		m_pia_2->portb_w(ay8910_r(m_ay8912, 0));
	242	m_pia_2->portb_w(ay8910_r(m_ay8912, space, 0));
243	243	break;
244	244	case 0x03:      /* Select port to write to */
245		ay8910_address_w(m_ay8912, 0, m_pia_2->b_output());
	245	ay8910_address_w(m_ay8912, space, 0, m_pia_2->b_output());
246	246	break;
247	247	}
248	248	}

trunk/src/mess/machine/comx_fd.c

r17961	r17962
275	275	}
276	276	else
277	277	{
278		data = wd17xx_r(m_fdc, m_addr);
	278	data = wd17xx_r(m_fdc, machine().driver_data()->generic_space(), m_addr);
279	279	}
280	280	}
281	281
r17961	r17962
326	326	else
327	327	{
328	328	// write data to WD1770
329		wd17xx_w(m_fdc, m_addr, data);
	329	wd17xx_w(m_fdc, machine().driver_data()->generic_space(), m_addr, data);
330	330	}
331	331	}
332	332	}

trunk/src/mess/machine/trs80.c

r17961	r17962
704	704	{
705	705	UINT8 data = 0xff;
706	706	if (BIT(ioport("CONFIG")->read(), 7))
707		data = wd17xx_status_r(m_fdc, offset);
	707	data = wd17xx_status_r(m_fdc, space, offset);
708	708
709	709	return data;
710	710	}

trunk/src/mess/machine/svi318.c

r17961	r17962
803	803
804	804	case 0x30:
805	805	device = machine().device("wd179x");
806		data = wd17xx_status_r(device, 0);
	806	data = wd17xx_status_r(device, space, 0);
807	807	break;
808	808	case 0x31:
809	809	device = machine().device("wd179x");
810		data = wd17xx_track_r(device, 0);
	810	data = wd17xx_track_r(device, space, 0);
811	811	break;
812	812	case 0x32:
813	813	device = machine().device("wd179x");
814		data = wd17xx_sector_r(device, 0);
	814	data = wd17xx_sector_r(device, space, 0);
815	815	break;
816	816	case 0x33:
817	817	device = machine().device("wd179x");
818		data = wd17xx_data_r(device, 0);
	818	data = wd17xx_data_r(device, space, 0);
819	819	break;
820	820	case 0x34:
821	821	data = svi318_fdc_irqdrq_r(space, 0);
r17961	r17962
876	876
877	877	case 0x30:
878	878	device = machine().device("wd179x");
879		wd17xx_command_w(device, 0, data);
	879	wd17xx_command_w(device, space, 0, data);
880	880	break;
881	881	case 0x31:
882	882	device = machine().device("wd179x");
883		wd17xx_track_w(device, 0, data);
	883	wd17xx_track_w(device, space, 0, data);
884	884	break;
885	885	case 0x32:
886	886	device = machine().device("wd179x");
887		wd17xx_sector_w(device, 0, data);
	887	wd17xx_sector_w(device, space, 0, data);
888	888	break;
889	889	case 0x33:
890	890	device = machine().device("wd179x");
891		wd17xx_data_w(device, 0, data);
	891	wd17xx_data_w(device, space, 0, data);
892	892	break;
893	893	case 0x34:
894	894	svi318_fdc_drive_motor_w(space, 0, data);

trunk/src/mess/machine/amstr_pc.c

r17961	r17962
201	201	READ8_HANDLER( pc200_port378_r )
202	202	{
203	203	device_t *lpt = space->machine().device("lpt_1");
204		UINT8 data = pc_lpt_r(lpt, offset);
	204	UINT8 data = pc_lpt_r(lpt, *space, offset);
205	205
206	206	if (offset == 1)
207	207	data = (data & ~7) | (space->machine().root_device().ioport("DSW0")->read() & 7);
r17961	r17962
214	214	READ8_HANDLER( pc200_port278_r )
215	215	{
216	216	device_t *lpt = space->machine().device("lpt_2");
217		UINT8 data = pc_lpt_r(lpt, offset);
	217	UINT8 data = pc_lpt_r(lpt, *space, offset);
218	218
219	219	if (offset == 1)
220	220	data = (data & ~7) | (space->machine().root_device().ioport("DSW0")->read() & 7);
r17961	r17962
228	228	READ8_HANDLER( pc1640_port378_r )
229	229	{
230	230	device_t *lpt = space->machine().device("lpt_1");
231		UINT8 data = pc_lpt_r(lpt, offset);
	231	UINT8 data = pc_lpt_r(lpt, *space, offset);
232	232
233	233	if (offset == 1)
234	234	data=(data & ~7) | (space->machine().root_device().ioport("DSW0")->read() & 7);

trunk/src/mess/machine/wswan.c

r17961	r17962
835	835	Bit 0-3 - Master volume
836	836	Bit 4-7 - Unknown
837	837	*/
838		wswan_sound_port_w( machine().device("custom"), offset, data );
	838	wswan_sound_port_w( machine().device("custom"), space, offset, data );
839	839	break;
840	840	case 0xa0:   /* Hardware type - this is probably read only
841	841	Bit 0   - Enable cartridge slot and/or disable bios

trunk/src/mess/machine/z80ne.c

r17961	r17962
632	632	{
633	633	UINT8 data;
634	634
635		data = kr2376_data_r(m_lx388_kr2376, 0) & 0x7f;
	635	data = kr2376_data_r(m_lx388_kr2376, space, 0) & 0x7f;
636	636	data |= kr2376_get_output_pin(m_lx388_kr2376, KR2376_SO) << 7;
637	637	return data;
638	638	}
r17961	r17962
725	725	switch(offset)
726	726	{
727	727	case 0:
728		d = wd17xx_status_r(device, 0) ^ 0xff;
	728	d = wd17xx_status_r(device, space, 0) ^ 0xff;
729	729	LOG(("lx390_fdc_r, WD17xx status: %02x\n", d));
730	730	break;
731	731	case 1:
732		d = wd17xx_track_r(device, 0) ^ 0xff;
	732	d = wd17xx_track_r(device, space, 0) ^ 0xff;
733	733	LOG(("lx390_fdc_r, WD17xx track:  %02x\n", d));
734	734	break;
735	735	case 2:
736		d = wd17xx_sector_r(device, 0) ^ 0xff;
	736	d = wd17xx_sector_r(device, space, 0) ^ 0xff;
737	737	LOG(("lx390_fdc_r, WD17xx sector: %02x\n", d));
738	738	break;
739	739	case 3:
740		d = wd17xx_data_r(device, 0) ^ 0xff;
	740	d = wd17xx_data_r(device, space, 0) ^ 0xff;
741	741	LOG(("lx390_fdc_r, WD17xx data3:  %02x\n", d));
742	742	break;
743	743	case 6:
744	744	d = 0xff;
745		lx390_reset_bank(device, 0);
	745	lx390_reset_bank(device, space, 0);
746	746	break;
747	747	case 7:
748		d = wd17xx_data_r(device, 3) ^ 0xff;
	748	d = wd17xx_data_r(device, space, 3) ^ 0xff;
749	749	LOG(("lx390_fdc_r, WD17xx data7, force:  %02x\n", d));
750	750	break;
751	751	default:
r17961	r17962
764	764	{
765	765	case 0:
766	766	LOG(("lx390_fdc_w, WD17xx command: %02x\n", d));
767		wd17xx_command_w(device, offset, d ^ 0xff);
	767	wd17xx_command_w(device, space, offset, d ^ 0xff);
768	768	if (state->m_wd17xx_state.drive & 1)
769	769	output_set_value("drv0", 2);
770	770	else if (state->m_wd17xx_state.drive & 2)
r17961	r17962
772	772	break;
773	773	case 1:
774	774	LOG(("lx390_fdc_w, WD17xx track:   %02x\n", d));
775		wd17xx_track_w(device, offset, d ^ 0xff);
	775	wd17xx_track_w(device, space, offset, d ^ 0xff);
776	776	break;
777	777	case 2:
778	778	LOG(("lx390_fdc_w, WD17xx sector:  %02x\n", d));
779		wd17xx_sector_w(device, offset, d ^ 0xff);
	779	wd17xx_sector_w(device, space, offset, d ^ 0xff);
780	780	break;
781	781	case 3:
782		wd17xx_data_w(device, 0, d ^ 0xff);
	782	wd17xx_data_w(device, space, 0, d ^ 0xff);
783	783	LOG(("lx390_fdc_w, WD17xx data3:   %02x\n", d));
784	784	break;
785	785	case 6:
786	786	LOG(("lx390_fdc_w, motor_w:   %02x\n", d));
787		lx390_motor_w(device, 0, d);
	787	lx390_motor_w(device, space, 0, d);
788	788	break;
789	789	case 7:
790	790	LOG(("lx390_fdc_w, WD17xx data7, force:   %02x\n", d));
791		wd17xx_data_w(device, 3, d ^ 0xff);
	791	wd17xx_data_w(device, space, 3, d ^ 0xff);
792	792	break;
793	793	}
794	794	}

trunk/src/mess/machine/apollo_kbd.c

r17961	r17962
98	98	m_device = this;
99	99	LOG1(("start apollo_kbd"));
100	100
	101	m_putchar.resolve(apollo_kbd_putchar_cb, *this);
	102	m_has_beeper.resolve(apollo_kbd_has_beeper_cb, *this);
	103	m_is_german.resolve(apollo_kbd_is_german_cb, *this);
	104
101	105	m_beeper.start(this);
102	106	m_mouse.start(this);
103	107	m_tx_fifo.start(this);
r17961	r17962
200	204
201	205	int apollo_kbd_device::beeper::keyboard_has_beeper()
202	206	{
203		return m_device->apollo_kbd_has_beeper ?
204		(m_device->apollo_kbd_has_beeper)(m_device, 0) : 0;
	207	return !m_device->m_has_beeper.isnull() ?
	208	m_device->m_has_beeper(0) : 0;
205	209	}
206	210
207	211	void apollo_kbd_device::beeper::beeper_callback()
r17961	r17962
395	399	{
396	400	m_tx_pending = 1;
397	401
398		if (m_device->apollo_kbd_putchar)
399		(m_device->apollo_kbd_putchar)(m_device, 0, getchar());
	402	if (!m_device->m_putchar.isnull())
	403	m_device->m_putchar(0, getchar());
400	404	// 11 = one start, 8 data, one parity (even), one stop bit
401	405	m_timer->adjust(attotime::from_hz(m_baud_rate / 11), 0);
402	406	}
r17961	r17962
525	529
526	530	int apollo_kbd_device::keyboard_is_german()
527	531	{
528		return apollo_kbd_is_german ?
529		(*apollo_kbd_is_german)(this, 0) : 0;
	532	return !m_is_german.isnull() ?
	533	m_is_german(0) : 0;
530	534	}
531	535
532	536	/*-------------------------------------------------

trunk/src/mess/machine/apollo_kbd.h

r17961	r17962
51	51
52	52	struct apollo_kbd_interface
53	53	{
54		write8_device_func apollo_kbd_putchar;
55		read8_device_func apollo_kbd_has_beeper;
56		read8_device_func apollo_kbd_is_german;
	54	devcb_write8 apollo_kbd_putchar_cb;
	55	devcb_read8 apollo_kbd_has_beeper_cb;
	56	devcb_read8 apollo_kbd_is_german_cb;
57	57	};
58	58
59	59	#define APOLLO_KBD_INTERFACE(name) const struct apollo_kbd_interface (name)
r17961	r17962
192	192	int m_keytime[0x80];    // time until next key press (1 ms)
193	193	UINT8 m_keyon[0x80];    // is 1 if key is pressed
194	194
	195	devcb_resolved_write8 m_putchar;
	196	devcb_resolved_read8 m_has_beeper;
	197	devcb_resolved_read8 m_is_german;
	198
195	199	static UINT16 m_code_table[];
196	200	};
197	201

trunk/src/mess/machine/apple2gs.c

r17961	r17962
1052	1052	case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef:
1053	1053	if ((m_sltromsel & (1 << 6)) == 0)
1054	1054	{
1055		result = applefdc_r(m_fdc, offset);
	1055	result = applefdc_r(m_fdc, space, offset);
1056	1056	}
1057	1057	else
1058	1058	{
r17961	r17962
1208	1208	case 0xe8: case 0xe9: case 0xea: case 0xeb: case 0xec: case 0xed: case 0xee: case 0xef:
1209	1209	if ((m_sltromsel & (1 << 6)) == 0)
1210	1210	{
1211		applefdc_w(m_fdc, offset, data);
	1211	applefdc_w(m_fdc, space, offset, data);
1212	1212	}
1213	1213	else
1214	1214	{

trunk/src/mess/machine/isa_hdc.c

r17961	r17962
110	110	NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL  /* 0xF8-0xFF */
111	111	};
112	112
113		static READ8_DEVICE_HANDLER(pc_HDC_r);
114		static WRITE8_DEVICE_HANDLER(pc_HDC_w);
	113	static DECLARE_READ8_DEVICE_HANDLER(pc_HDC_r);
	114	static DECLARE_WRITE8_DEVICE_HANDLER(pc_HDC_w);
115	115
116	116	static MACHINE_CONFIG_FRAGMENT( hdc_config )
117	117	MCFG_HARDDISK_ADD("primary")

trunk/src/mess/machine/a2echoii.c

r17961	r17962
81	81	switch (offset)
82	82	{
83	83	case 0:
84		return 0x1f | tms5220_status_r(m_tms, 0);
	84	return 0x1f | tms5220_status_r(m_tms, space, 0);
85	85	break;
86	86	}
87	87
r17961	r17962
93	93	switch (offset)
94	94	{
95	95	case 0:
96		tms5220_data_w(m_tms, offset, data);
	96	tms5220_data_w(m_tms, space, offset, data);
97	97	break;
98	98	}
99	99	}

trunk/src/mess/machine/990_tap.h

r17961	r17962
1	1	/*
2	2	990_tap.h: include file for 990_tap.c
3	3	*/
4		extern READ16_DEVICE_HANDLER(ti990_tpc_r);
5		extern WRITE16_DEVICE_HANDLER(ti990_tpc_w);
	4	extern DECLARE_READ16_DEVICE_HANDLER(ti990_tpc_r);
	5	extern DECLARE_WRITE16_DEVICE_HANDLER(ti990_tpc_w);
6	6
7	7	/***************************************************************************
8	8	TYPE DEFINITIONS

trunk/src/mess/machine/apollo.c

r17961	r17962
369	369
370	370	WRITE8_MEMBER(apollo_state::apollo_dma_1_w){
371	371	SLOG1(("apollo_dma_1_w: writing DMA Controller 1 at offset %02x = %02x", offset, data));
372		i8237_w(get_device_dma8237_1(&space.device()), offset, data);
	372	i8237_w(get_device_dma8237_1(&space.device()), space, offset, data);
373	373	}
374	374
375	375	READ8_MEMBER(apollo_state::apollo_dma_1_r){
376		UINT8 data = i8237_r(get_device_dma8237_1(&space.device()), offset);
	376	UINT8 data = i8237_r(get_device_dma8237_1(&space.device()), space, offset);
377	377	SLOG1(("apollo_dma_1_r: reading DMA Controller 1 at offset %02x = %02x", offset, data));
378	378	return data;
379	379	}
r17961	r17962
384	384
385	385	WRITE8_MEMBER(apollo_state::apollo_dma_2_w){
386	386	SLOG1(("apollo_dma_2_w: writing DMA Controller 2 at offset %02x = %02x", offset/2, data));
387		i8237_w(get_device_dma8237_2(&space.device()), offset / 2, data);
	387	i8237_w(get_device_dma8237_2(&space.device()), space, offset / 2, data);
388	388	}
389	389
390	390	READ8_MEMBER(apollo_state::apollo_dma_2_r){
391		UINT8 data = i8237_r(get_device_dma8237_2(&space.device()), offset / 2);
	391	UINT8 data = i8237_r(get_device_dma8237_2(&space.device()), space, offset / 2);
392	392	SLOG1(("apollo_dma_2_r: reading DMA Controller 2 at offset %02x = %02x", offset/2, data));
393	393	return data;
394	394	}
r17961	r17962
526	526	}
527	527
528	528	static READ8_DEVICE_HANDLER( apollo_dma8237_fdc_dack_r ) {
529		UINT8 data = pc_fdc_dack_r(device->machine());
	529	UINT8 data = pc_fdc_dack_r(device->machine(), space);
530	530	//  DLOG2(("dma fdc dack read %02x",data));
531	531
532	532	// hack for DN3000: select appropriate DMA channel No.
r17961	r17962
537	537
538	538	static WRITE8_DEVICE_HANDLER( apollo_dma8237_fdc_dack_w ) {
539	539	// DLOG2(("dma fdc dack write %02x", data));
540		pc_fdc_dack_w(device->machine(), data);
	540	pc_fdc_dack_w(device->machine(), space, data);
541	541
542	542	// hack for DN3000: select appropriate DMA channel No.
543	543	// Note: too late for this byte, but next bytes will be ok
r17961	r17962
623	623
624	624	WRITE8_DEVICE_HANDLER(apollo_pic8259_master_w ) {
625	625	DLOG1(("writing %s at offset %X = %02x", device->tag(), offset, data));
626		pic8259_w(device, offset, data);
	626	pic8259_w(device, space, offset, data);
627	627	}
628	628
629	629	READ8_DEVICE_HANDLER( apollo_pic8259_master_r ) {
630		UINT8 data = pic8259_r(device, offset);
	630	UINT8 data = pic8259_r(device, space, offset);
631	631	DLOG1(("reading %s at offset %X = %02x", device->tag(), offset, data));
632	632	return data;
633	633	}
r17961	r17962
638	638
639	639	WRITE8_DEVICE_HANDLER(apollo_pic8259_slave_w ) {
640	640	DLOG1(("writing %s at offset %X = %02x", device->tag(), offset, data));
641		pic8259_w(device, offset, data);
	641	pic8259_w(device, space, offset, data);
642	642	}
643	643
644	644	READ8_DEVICE_HANDLER( apollo_pic8259_slave_r ) {
645		UINT8 data = pic8259_r(device, offset);
	645	UINT8 data = pic8259_r(device, space, offset);
646	646	DLOG1(("reading %s at offset %X = %02x", device->tag(), offset, data));
647	647	return data;
648	648	}
r17961	r17962
1026	1026	"1X/16X Test", "RHRB", "IVR", "Input Ports", "Start Counter",
1027	1027	"Stop Counter" };
1028	1028
1029		int data = duart68681_r(device, offset / 2);
	1029	int data = duart68681_r(device, space, offset / 2);
1030	1030
1031	1031	if (sio_irq_line) {
1032	1032	apollo_pic_set_irq_line(device, APOLLO_IRQ_SIO1, 0);
r17961	r17962
1089	1089	}
1090	1090	break;
1091	1091	}
1092		duart68681_w(device, offset / 2, data);
	1092	duart68681_w(device, space, offset / 2, data);
1093	1093	}
1094	1094
1095	1095	/*-------------------------------------------------
r17961	r17962
1106	1106	#define SRA 0x01
1107	1107	#define SRB 0x09
1108	1108
1109		if (!(duart68681_r(device, SRB) & 0x02))
	1109	if (!(duart68681_r(device, space, SRB) & 0x02))
1110	1110	{
1111	1111	// Channel B FIFO not yet full (STATUS_FIFO_FULL)
1112	1112	if (read(STDIN_FILENO, &data, 1) == 1)
r17961	r17962
1116	1116	// stop sleeping to reduce CPU usage
1117	1117	sio_sleep(0);
1118	1118	}
1119		else if (input_from_stdin && (duart68681_r(device, SRB) & 0x0c) == 0x0c)
	1119	else if (input_from_stdin && (duart68681_r(device, space, SRB) & 0x0c) == 0x0c)
1120	1120	{
1121	1121	// we reduce the CPU usage, if SRB is being polled for input
1122	1122	// but only as long as the transmitter is empty and ready
r17961	r17962
1221	1221
1222	1222	apollo_pic_set_irq_line(device, APOLLO_IRQ_SIO2, 0);
1223	1223
1224		int data = duart68681_r(device, offset / 2);
	1224	int data = duart68681_r(device, space, offset / 2);
1225	1225
1226	1226	DLOG2(("reading 2681 reg %x (%s) returned %02x",
1227	1227	offset, duart68681_reg_read_names[offset/2], data ));
r17961	r17962
1247	1247	break;
1248	1248	}
1249	1249
1250		duart68681_w(device, offset / 2, data);
	1250	duart68681_w(device, space, offset / 2, data);
1251	1251	}
1252	1252
1253	1253	/*-------------------------------------------------

trunk/src/mess/machine/3c505.h

r17961	r17962
28	28	FUNCTION PROTOTYPES
29	29	***************************************************************************/
30	30
31		READ8_DEVICE_HANDLER( threecom3c505_r );
32		WRITE8_DEVICE_HANDLER( threecom3c505_w );
	31	DECLARE_READ8_DEVICE_HANDLER( threecom3c505_r );
	32	DECLARE_WRITE8_DEVICE_HANDLER( threecom3c505_w );
33	33
34	34	int threecom3c505_receive(device_t *device, const UINT8 *data, int length);
35	35

trunk/src/mess/machine/kaypro.c

r17961	r17962
13	13
14	14	************************************************************/
15	15
16		static void kaypro_interrupt(device_t *device, int state)
	16	static WRITE_LINE_DEVICE_HANDLER( kaypro_interrupt )
17	17	{
18	18	device->machine().device("maincpu")->execute().set_input_line(0, state);
19	19	}
r17961	r17962
227	227
228	228	const z80sio_interface kaypro_sio_intf =
229	229	{
230		kaypro_interrupt,   /* interrupt handler */
231		0,         /* DTR changed handler */
232		0,         /* RTS changed handler */
233		0,         /* BREAK changed handler */
234		0,         /* transmit handler - which channel is this for? */
235		0         /* receive handler - which channel is this for? */
	230	DEVCB_LINE(kaypro_interrupt),   /* interrupt handler */
	231	DEVCB_NULL,         /* DTR changed handler */
	232	DEVCB_NULL,         /* RTS changed handler */
	233	DEVCB_NULL,         /* BREAK changed handler */
	234	DEVCB_NULL,         /* transmit handler - which channel is this for? */
	235	DEVCB_NULL         /* receive handler - which channel is this for? */
236	236	};
237	237
238	238	READ8_DEVICE_HANDLER( kaypro_sio_r )

trunk/src/mess/machine/isa_sblaster.c

r17961	r17962
129	129	UINT8 retVal = 0xff;
130	130	switch(offset)
131	131	{
132		case 0 : retVal = ym3812_status_port_r( device, offset ); break;
	132	case 0 : retVal = ym3812_status_port_r( device, space, offset ); break;
133	133	}
134	134	return retVal;
135	135	}
r17961	r17962
138	138	{
139	139	switch(offset)
140	140	{
141		case 0 : ym3812_control_port_w( device, offset, data ); break;
142		case 1 : ym3812_write_port_w( device, offset, data ); break;
	141	case 0 : ym3812_control_port_w( device, space, offset, data ); break;
	142	case 1 : ym3812_write_port_w( device, space, offset, data ); break;
143	143	}
144	144	}
145	145
r17961	r17962
152	152	{
153	153	switch(offset)
154	154	{
155		case 0 : saa1099_control_w( device, offset, data ); break;
156		case 1 : saa1099_data_w( device, offset, data ); break;
	155	case 0 : saa1099_control_w( device, space, offset, data ); break;
	156	case 1 : saa1099_data_w( device, space, offset, data ); break;
157	157	}
158	158	}
159	159

trunk/src/mess/machine/pc_lpt.c

r17961	r17962
204	204	{
205	205	switch (offset)
206	206	{
207		case 0: return pc_lpt_data_r(device, 0);
208		case 1: return pc_lpt_status_r(device, 0);
209		case 2: return pc_lpt_control_r(device, 0);
	207	case 0: return pc_lpt_data_r(device, space, 0);
	208	case 1: return pc_lpt_status_r(device, space, 0);
	209	case 2: return pc_lpt_control_r(device, space, 0);
210	210	}
211	211
212	212	/* if we reach this its an error */
r17961	r17962
220	220	{
221	221	switch (offset)
222	222	{
223		case 0: pc_lpt_data_w(device, 0, data); break;
	223	case 0: pc_lpt_data_w(device, space, 0, data); break;
224	224	case 1: break;
225		case 2:   pc_lpt_control_w(device, 0, data); break;
	225	case 2:   pc_lpt_control_w(device, space, 0, data); break;
226	226	}
227	227	}
228	228

trunk/src/mess/machine/s3c44b0.c

r17961	r17962
1601	1601
1602	1602	/* IIS */
1603	1603
1604		INLINE void iface_i2s_data_w( device_t *device, int ch, UINT16 data)
	1604	INLINE void iface_i2s_data_w( device_t *device, address_space &space, int ch, UINT16 data)
1605	1605	{
1606	1606	s3c44b0_t *s3c44b0 = get_token( device);
1607	1607	if (s3c44b0->iface->i2s.data_w)
1608	1608	{
1609		(s3c44b0->iface->i2s.data_w)( device, ch, data, 0);
	1609	(s3c44b0->iface->i2s.data_w)( device, space, ch, data, 0);
1610	1610	}
1611	1611	}
1612	1612
r17961	r17962
1677	1677	if (s3c44b0->iis.fifo_index == 2)
1678	1678	{
1679	1679	s3c44b0->iis.fifo_index = 0;
1680		iface_i2s_data_w( device, 0, s3c44b0->iis.fifo[0]);
1681		iface_i2s_data_w( device, 1, s3c44b0->iis.fifo[1]);
	1680	iface_i2s_data_w( device, space, 0, s3c44b0->iis.fifo[0]);
	1681	iface_i2s_data_w( device, space, 1, s3c44b0->iis.fifo[1]);
1682	1682	}
1683	1683	}
1684	1684	break;

trunk/src/mess/machine/ds1315.h

r17961	r17962
52	52	FUNCTION PROTOTYPES
53	53	***************************************************************************/
54	54
55		READ8_DEVICE_HANDLER( ds1315_r_0 );
56		READ8_DEVICE_HANDLER( ds1315_r_1 );
57		READ8_DEVICE_HANDLER( ds1315_r_data );
58		WRITE8_DEVICE_HANDLER( ds1315_w_data );
	55	DECLARE_READ8_DEVICE_HANDLER( ds1315_r_0 );
	56	DECLARE_READ8_DEVICE_HANDLER( ds1315_r_1 );
	57	DECLARE_READ8_DEVICE_HANDLER( ds1315_r_data );
	58	DECLARE_WRITE8_DEVICE_HANDLER( ds1315_w_data );
59	59
60	60	#endif /* __DS1315_H__ */

trunk/src/mess/machine/pc_lpt.h

r17961	r17962
24	24	/***************************************************************************
25	25	FUNCTION PROTOTYPES
26	26	***************************************************************************/
27		READ8_DEVICE_HANDLER( pc_lpt_r );
28		WRITE8_DEVICE_HANDLER( pc_lpt_w );
	27	DECLARE_READ8_DEVICE_HANDLER( pc_lpt_r );
	28	DECLARE_WRITE8_DEVICE_HANDLER( pc_lpt_w );
29	29
30		READ8_DEVICE_HANDLER( pc_lpt_data_r );
31		WRITE8_DEVICE_HANDLER( pc_lpt_data_w );
32		READ8_DEVICE_HANDLER( pc_lpt_status_r );
33		READ8_DEVICE_HANDLER( pc_lpt_control_r );
34		WRITE8_DEVICE_HANDLER( pc_lpt_control_w );
	30	DECLARE_READ8_DEVICE_HANDLER( pc_lpt_data_r );
	31	DECLARE_WRITE8_DEVICE_HANDLER( pc_lpt_data_w );
	32	DECLARE_READ8_DEVICE_HANDLER( pc_lpt_status_r );
	33	DECLARE_READ8_DEVICE_HANDLER( pc_lpt_control_r );
	34	DECLARE_WRITE8_DEVICE_HANDLER( pc_lpt_control_w );
35	35
36	36
37	37	/***************************************************************************

trunk/src/mess/machine/mc68328.c

r17961	r17962
317	317
318	318	mc68328->regs.pwmc ^= PWMC_PIN;
319	319
320		if( mc68328->iface->out_pwm_func )
	320	if( !mc68328->out_pwm.isnull() )
321	321	{
322		(mc68328->iface->out_pwm_func)( device, 0, (mc68328->regs.pwmc & PWMC_PIN) ? 1 : 0 );
	322	mc68328->out_pwm( 0, (mc68328->regs.pwmc & PWMC_PIN) ? 1 : 0 );
323	323	}
324	324	}
325	325
r17961	r17962
779	779	{
780	780	verboselog(device->machine(), 2, "mc68328_w: PADATA = %02x\n", data & 0x00ff);
781	781	mc68328->regs.padata = data & 0x00ff;
782		if(mc68328->iface->out_port_a_func)
	782	if(!mc68328->out_port_a.isnull())
783	783	{
784		(mc68328->iface->out_port_a_func)( device, 0, data & 0x00ff );
	784	mc68328->out_port_a( 0, data & 0x00ff );
785	785	}
786	786	}
787	787	else
r17961	r17962
808	808	{
809	809	verboselog(device->machine(), 2, "mc68328_w: PBDATA = %02x\n", data & 0x00ff);
810	810	mc68328->regs.pbdata = data & 0x00ff;
811		if(mc68328->iface->out_port_b_func)
	811	if(!mc68328->out_port_b.isnull())
812	812	{
813		(mc68328->iface->out_port_b_func)( device, 0, data & 0x00ff );
	813	mc68328->out_port_b( 0, data & 0x00ff );
814	814	}
815	815	}
816	816	else
r17961	r17962
837	837	{
838	838	verboselog(device->machine(), 2, "mc68328_w: PCDATA = %02x\n", data & 0x00ff);
839	839	mc68328->regs.pcdata = data & 0x00ff;
840		if(mc68328->iface->out_port_c_func)
	840	if(!mc68328->out_port_c.isnull())
841	841	{
842		(mc68328->iface->out_port_c_func)( device, 0, data & 0x00ff );
	842	mc68328->out_port_c( 0, data & 0x00ff );
843	843	}
844	844	}
845	845	else
r17961	r17962
920	920	{
921	921	verboselog(device->machine(), 2, "mc68328_w: PEDATA = %02x\n", data & 0x00ff);
922	922	mc68328->regs.pedata = data & 0x00ff;
923		if(mc68328->iface->out_port_e_func)
	923	if(!mc68328->out_port_e.isnull())
924	924	{
925		(mc68328->iface->out_port_e_func)( device, 0, data & 0x00ff );
	925	mc68328->out_port_e( 0, data & 0x00ff );
926	926	}
927	927	}
928	928	else
r17961	r17962
951	951	{
952	952	verboselog(device->machine(), 2, "mc68328_w: PFDATA = %02x\n", data & 0x00ff);
953	953	mc68328->regs.pfdata = data & 0x00ff;
954		if(mc68328->iface->out_port_f_func)
	954	if(!mc68328->out_port_f.isnull())
955	955	{
956		(mc68328->iface->out_port_f_func)( device, 0, data & 0x00ff );
	956	mc68328->out_port_f( 0, data & 0x00ff );
957	957	}
958	958	}
959	959	else
r17961	r17962
981	981	{
982	982	verboselog(device->machine(), 2, "mc68328_w: PGDATA = %02x\n", data & 0x00ff);
983	983	mc68328->regs.pgdata = data & 0x00ff;
984		if(mc68328->iface->out_port_g_func)
	984	if(!mc68328->out_port_g.isnull())
985	985	{
986		(mc68328->iface->out_port_g_func)( device, 0, data & 0x00ff );
	986	mc68328->out_port_g( 0, data & 0x00ff );
987	987	}
988	988	}
989	989	else
r17961	r17962
1011	1011	{
1012	1012	verboselog(device->machine(), 2, "mc68328_w: PJDATA = %02x\n", data & 0x00ff);
1013	1013	mc68328->regs.pjdata = data & 0x00ff;
1014		if(mc68328->iface->out_port_j_func)
	1014	if(!mc68328->out_port_j.isnull())
1015	1015	{
1016		(mc68328->iface->out_port_j_func)( device, 0, data & 0x00ff );
	1016	mc68328->out_port_j( 0, data & 0x00ff );
1017	1017	}
1018	1018	}
1019	1019	else
r17961	r17962
1040	1040	{
1041	1041	verboselog(device->machine(), 2, "mc68328_w: PKDATA = %02x\n", data & 0x00ff);
1042	1042	mc68328->regs.pkdata = data & 0x00ff;
1043		if(mc68328->iface->out_port_k_func)
	1043	if(!mc68328->out_port_k.isnull())
1044	1044	{
1045		(mc68328->iface->out_port_k_func)( device, 0, data & 0x00ff );
	1045	mc68328->out_port_k( 0, data & 0x00ff );
1046	1046	}
1047	1047	}
1048	1048	else
r17961	r17962
1070	1070	{
1071	1071	verboselog(device->machine(), 2, "mc68328_w: PMDATA = %02x\n", data & 0x00ff);
1072	1072	mc68328->regs.pmdata = data & 0x00ff;
1073		if(mc68328->iface->out_port_m_func)
	1073	if(!mc68328->out_port_m.isnull())
1074	1074	{
1075		(mc68328->iface->out_port_m_func)( device, 0, data & 0x00ff );
	1075	mc68328->out_port_m( 0, data & 0x00ff );
1076	1076	}
1077	1077	}
1078	1078	else
r17961	r17962
1249	1249
1250	1250	case 0x800:
1251	1251	verboselog(device->machine(), 2, "mc68328_w: SPIMDATA = %04x\n", data);
1252		if(mc68328->iface->out_spim_func)
	1252	if(!mc68328->out_spim.isnull())
1253	1253	{
1254		(mc68328->iface->out_spim_func)( device, 0, data, 0xffff );
	1254	mc68328->out_spim( 0, data, 0xffff );
1255	1255	}
1256	1256	else
1257	1257	{
r17961	r17962
1854	1854	if( mem_mask & 0x00ff )
1855	1855	{
1856	1856	verboselog(device->machine(), 2, "mc68328_r (%04x): PADATA = %02x\n", mem_mask, mc68328->regs.padata);
1857		if(mc68328->iface->in_port_a_func)
	1857	if(!mc68328->in_port_a.isnull())
1858	1858	{
1859		return (mc68328->iface->in_port_a_func)( device, 0 );
	1859	return mc68328->in_port_a( 0 );
1860	1860	}
1861	1861	else
1862	1862	{
r17961	r17962
1886	1886	if( mem_mask & 0x00ff )
1887	1887	{
1888	1888	verboselog(device->machine(), 2, "mc68328_r (%04x): PBDATA = %02x\n", mem_mask, mc68328->regs.pbdata);
1889		if(mc68328->iface->in_port_b_func)
	1889	if(!mc68328->in_port_b.isnull())
1890	1890	{
1891		return (mc68328->iface->in_port_b_func)( device, 0 );
	1891	return mc68328->in_port_b( 0 );
1892	1892	}
1893	1893	else
1894	1894	{
r17961	r17962
1918	1918	if( mem_mask & 0x00ff )
1919	1919	{
1920	1920	verboselog(device->machine(), 2, "mc68328_r (%04x): PCDATA = %02x\n", mem_mask, mc68328->regs.pcdata);
1921		if(mc68328->iface->in_port_c_func)
	1921	if(!mc68328->in_port_c.isnull())
1922	1922	{
1923		return (mc68328->iface->in_port_c_func)( device, 0 );
	1923	return mc68328->in_port_c( 0 );
1924	1924	}
1925	1925	else
1926	1926	{
r17961	r17962
1950	1950	if( mem_mask & 0x00ff )
1951	1951	{
1952	1952	verboselog(device->machine(), 2, "mc68328_r (%04x): PDDATA = %02x\n", mem_mask, mc68328->regs.pddata);
1953		if(mc68328->iface->in_port_d_func)
	1953	if(!mc68328->in_port_d.isnull())
1954	1954	{
1955		return (mc68328->iface->in_port_d_func)( device, 0 );
	1955	return mc68328->in_port_d( 0 );
1956	1956	}
1957	1957	else
1958	1958	{
r17961	r17962
2007	2007	if( mem_mask & 0x00ff )
2008	2008	{
2009	2009	verboselog(device->machine(), 2, "mc68328_r (%04x): PEDATA = %02x\n", mem_mask, mc68328->regs.pedata);
2010		if(mc68328->iface->in_port_e_func)
	2010	if(!mc68328->in_port_e.isnull())
2011	2011	{
2012		return (mc68328->iface->in_port_e_func)( device, 0 );
	2012	return mc68328->in_port_e( 0 );
2013	2013	}
2014	2014	else
2015	2015	{
r17961	r17962
2040	2040	if( mem_mask & 0x00ff )
2041	2041	{
2042	2042	verboselog(device->machine(), 2, "mc68328_r (%04x): PFDATA = %02x\n", mem_mask, mc68328->regs.pfdata);
2043		if(mc68328->iface->in_port_f_func)
	2043	if(!mc68328->in_port_f.isnull())
2044	2044	{
2045		return (mc68328->iface->in_port_f_func)( device, 0 );
	2045	return mc68328->in_port_f( 0 );
2046	2046	}
2047	2047	else
2048	2048	{
r17961	r17962
2073	2073	if( mem_mask & 0x00ff )
2074	2074	{
2075	2075	verboselog(device->machine(), 2, "mc68328_r (%04x): PGDATA = %02x\n", mem_mask, mc68328->regs.pgdata);
2076		if(mc68328->iface->in_port_g_func)
	2076	if(!mc68328->in_port_g.isnull())
2077	2077	{
2078		return (mc68328->iface->in_port_g_func)( device, 0 );
	2078	return mc68328->in_port_g( 0 );
2079	2079	}
2080	2080	else
2081	2081	{
r17961	r17962
2106	2106	if( mem_mask & 0x00ff )
2107	2107	{
2108	2108	verboselog(device->machine(), 2, "mc68328_r (%04x): PJDATA = %02x\n", mem_mask, mc68328->regs.pjdata);
2109		if(mc68328->iface->in_port_j_func)
	2109	if(!mc68328->in_port_j.isnull())
2110	2110	{
2111		return (mc68328->iface->in_port_j_func)( device, 0 );
	2111	return mc68328->in_port_j( 0 );
2112	2112	}
2113	2113	else
2114	2114	{
r17961	r17962
2138	2138	if( mem_mask & 0x00ff )
2139	2139	{
2140	2140	verboselog(device->machine(), 2, "mc68328_r (%04x): PKDATA = %02x\n", mem_mask, mc68328->regs.pkdata);
2141		if(mc68328->iface->in_port_k_func)
	2141	if(!mc68328->in_port_k.isnull())
2142	2142	{
2143		return (mc68328->iface->in_port_k_func)( device, 0 );
	2143	return mc68328->in_port_k( 0 );
2144	2144	}
2145	2145	else
2146	2146	{
r17961	r17962
2171	2171	if( mem_mask & 0x00ff )
2172	2172	{
2173	2173	verboselog(device->machine(), 2, "mc68328_r (%04x): PMDATA = %02x\n", mem_mask, mc68328->regs.pmdata);
2174		if(mc68328->iface->in_port_m_func)
	2174	if(!mc68328->in_port_m.isnull())
2175	2175	{
2176		return (mc68328->iface->in_port_m_func)( device, 0 );
	2176	return mc68328->in_port_m( 0 );
2177	2177	}
2178	2178	else
2179	2179	{
r17961	r17962
2290	2290
2291	2291	case 0x800:
2292	2292	verboselog(device->machine(), 2, "mc68328_r (%04x): SPIMDATA = %04x\n", mem_mask, mc68328->regs.spimdata);
2293		if(mc68328->iface->in_spim_func)
	2293	if(!mc68328->in_spim.isnull())
2294	2294	{
2295		return (mc68328->iface->in_spim_func)( device, 0, 0xffff );
	2295	return mc68328->in_spim( 0, 0xffff );
2296	2296	}
2297	2297	return mc68328->regs.spimdata;
2298	2298
r17961	r17962
2800	2800
2801	2801	mc68328->iface = (const mc68328_interface*)device->static_config();
2802	2802
	2803	mc68328->out_port_a.resolve(mc68328->iface->out_port_a_func, *device);
	2804	mc68328->out_port_b.resolve(mc68328->iface->out_port_b_func, *device);
	2805	mc68328->out_port_c.resolve(mc68328->iface->out_port_c_func, *device);
	2806	mc68328->out_port_d.resolve(mc68328->iface->out_port_d_func, *device);
	2807	mc68328->out_port_e.resolve(mc68328->iface->out_port_e_func, *device);
	2808	mc68328->out_port_f.resolve(mc68328->iface->out_port_f_func, *device);
	2809	mc68328->out_port_g.resolve(mc68328->iface->out_port_g_func, *device);
	2810	mc68328->out_port_j.resolve(mc68328->iface->out_port_j_func, *device);
	2811	mc68328->out_port_k.resolve(mc68328->iface->out_port_k_func, *device);
	2812	mc68328->out_port_m.resolve(mc68328->iface->out_port_m_func, *device);
	2813
	2814	mc68328->in_port_a.resolve(mc68328->iface->in_port_a_func, *device);
	2815	mc68328->in_port_b.resolve(mc68328->iface->in_port_b_func, *device);
	2816	mc68328->in_port_c.resolve(mc68328->iface->in_port_c_func, *device);
	2817	mc68328->in_port_d.resolve(mc68328->iface->in_port_d_func, *device);
	2818	mc68328->in_port_e.resolve(mc68328->iface->in_port_e_func, *device);
	2819	mc68328->in_port_f.resolve(mc68328->iface->in_port_f_func, *device);
	2820	mc68328->in_port_g.resolve(mc68328->iface->in_port_g_func, *device);
	2821	mc68328->in_port_j.resolve(mc68328->iface->in_port_j_func, *device);
	2822	mc68328->in_port_k.resolve(mc68328->iface->in_port_k_func, *device);
	2823	mc68328->in_port_m.resolve(mc68328->iface->in_port_m_func, *device);
	2824
	2825	mc68328->out_pwm.resolve(mc68328->iface->out_pwm_func, *device);
	2826
	2827	mc68328->out_spim.resolve(mc68328->iface->out_spim_func, *device);
	2828	mc68328->in_spim.resolve(mc68328->iface->in_spim_func, *device);
	2829
2803	2830	mc68328->gptimer[0] = device->machine().scheduler().timer_alloc(FUNC(mc68328_timer1_hit));
2804	2831	mc68328->gptimer[1] = device->machine().scheduler().timer_alloc(FUNC(mc68328_timer2_hit));
2805	2832	mc68328->rtc = device->machine().scheduler().timer_alloc(FUNC(mc68328_rtc_tick));

trunk/src/mess/machine/partner.c

r17961	r17962
84	84
85	85	if (offset<0x100) {
86	86	switch(offset & 3) {
87		case 0x00 : return wd17xx_status_r(fdc,0);
88		case 0x01 : return wd17xx_track_r(fdc,0);
89		case 0x02 : return wd17xx_sector_r(fdc,0);
	87	case 0x00 : return wd17xx_status_r(fdc,space, 0);
	88	case 0x01 : return wd17xx_track_r(fdc,space, 0);
	89	case 0x02 : return wd17xx_sector_r(fdc,space, 0);
90	90	default   :
91		return wd17xx_data_r(fdc,0);
	91	return wd17xx_data_r(fdc,space, 0);
92	92	}
93	93	} else {
94	94	return 0;
r17961	r17962
100	100
101	101	if (offset<0x100) {
102	102	switch(offset & 3) {
103		case 0x00 : wd17xx_command_w(fdc,0,data); break;
104		case 0x01 : wd17xx_track_w(fdc,0,data);break;
105		case 0x02 : wd17xx_sector_w(fdc,0,data);break;
106		default   : wd17xx_data_w(fdc,0,data);break;
	103	case 0x00 : wd17xx_command_w(fdc,space, 0,data); break;
	104	case 0x01 : wd17xx_track_w(fdc,space, 0,data);break;
	105	case 0x02 : wd17xx_sector_w(fdc,space, 0,data);break;
	106	default   : wd17xx_data_w(fdc,space, 0,data);break;
107	107	}
108	108	} else {
109	109	floppy_mon_w(floppy_get_device(machine(), 0), 1);

trunk/src/mess/machine/pc_fdc.c

r17961	r17962
194	194
195	195
196	196
197		int   pc_fdc_dack_r(running_machine &machine)
	197	int   pc_fdc_dack_r(running_machine &machine, address_space &space)
198	198	{
199	199	int data;
200	200
r17961	r17962
204	204	/* if dma is not enabled, dacks are not acknowledged */
205	205	if ((fdc->digital_output_register & PC_FDC_FLAGS_DOR_DMA_ENABLED)!=0)
206	206	{
207		data = upd765_dack_r(pc_get_device(machine), 0);
	207	data = upd765_dack_r(pc_get_device(machine), space, 0);
208	208	}
209	209
210	210	return data;
r17961	r17962
212	212
213	213
214	214
215		void pc_fdc_dack_w(running_machine &machine, int data)
	215	void pc_fdc_dack_w(running_machine &machine, address_space &space, int data)
216	216	{
217	217	/* if dma is not enabled, dacks are not issued */
218	218	if ((fdc->digital_output_register & PC_FDC_FLAGS_DOR_DMA_ENABLED)!=0)
219	219	{
220	220	/* dma acknowledge - and send byte to fdc */
221		upd765_dack_w(pc_get_device(machine), 0,data);
	221	upd765_dack_w(pc_get_device(machine), space, 0,data);
222	222	}
223	223	}
224	224
r17961	r17962
270	270	`------------------ 1 = turn floppy drive D motor on
271	271	*/
272	272
273		static void pc_fdc_dor_w(running_machine &machine, UINT8 data)
	273	static WRITE8_HANDLER( pc_fdc_dor_w )
274	274	{
275	275	int selected_drive;
276	276	int floppy_count;
277	277
278		floppy_count = floppy_get_count(machine);
	278	floppy_count = floppy_get_count(space->machine());
279	279
280	280	if (floppy_count > (fdc->digital_output_register & 0x03))
281		floppy_drive_set_ready_state(floppy_get_device(machine, fdc->digital_output_register & 0x03), 1, 0);
	281	floppy_drive_set_ready_state(floppy_get_device(space->machine(), fdc->digital_output_register & 0x03), 1, 0);
282	282
283	283	fdc->digital_output_register = data;
284	284
r17961	r17962
286	286
287	287	/* set floppy drive motor state */
288	288	if (floppy_count > 0)
289		floppy_mon_w(floppy_get_device(machine, 0), !BIT(data, 4));
	289	floppy_mon_w(floppy_get_device(space->machine(), 0), !BIT(data, 4));
290	290	if (floppy_count > 1)
291		floppy_mon_w(floppy_get_device(machine, 1), !BIT(data, 5));
	291	floppy_mon_w(floppy_get_device(space->machine(), 1), !BIT(data, 5));
292	292	if (floppy_count > 2)
293		floppy_mon_w(floppy_get_device(machine, 2), !BIT(data, 6));
	293	floppy_mon_w(floppy_get_device(space->machine(), 2), !BIT(data, 6));
294	294	if (floppy_count > 3)
295		floppy_mon_w(floppy_get_device(machine, 3), !BIT(data, 7));
	295	floppy_mon_w(floppy_get_device(space->machine(), 3), !BIT(data, 7));
296	296
297	297	if ((data>>4) & (1<<selected_drive))
298	298	{
299	299	if (floppy_count > selected_drive)
300		floppy_drive_set_ready_state(floppy_get_device(machine, selected_drive), 1, 0);
	300	floppy_drive_set_ready_state(floppy_get_device(space->machine(), selected_drive), 1, 0);
301	301	}
302	302
303	303	/* changing the DMA enable bit, will affect the terminal count state
304	304	from reaching the fdc - if dma is enabled this will send it through
305	305	otherwise it will be ignored */
306		pc_fdc_set_tc_state(machine, fdc->tc_state);
	306	pc_fdc_set_tc_state(space->machine(), fdc->tc_state);
307	307
308	308	/* changing the DMA enable bit, will affect the dma drq state
309	309	from reaching us - if dma is enabled this will send it through
310	310	otherwise it will be ignored */
311		pc_fdc_hw_dma_drq(pc_get_device(machine), fdc->dma_state);
	311	pc_fdc_hw_dma_drq(pc_get_device(space->machine()), fdc->dma_state);
312	312
313	313	/* changing the DMA enable bit, will affect the irq state
314	314	from reaching us - if dma is enabled this will send it through
315	315	otherwise it will be ignored */
316		pc_fdc_hw_interrupt(pc_get_device(machine), fdc->int_state);
	316	pc_fdc_hw_interrupt(pc_get_device(space->machine()), fdc->int_state);
317	317
318	318	/* reset? */
319	319	if ((fdc->digital_output_register & PC_FDC_FLAGS_DOR_FDC_ENABLED)==0)
r17961	r17962
336	336	what is not yet clear is if this is a result of the drives ready state
337	337	changing...
338	338	*/
339		upd765_ready_w(pc_get_device(machine),1);
	339	upd765_ready_w(pc_get_device(space->machine()),1);
340	340
341	341	/* set FDC at reset */
342		upd765_reset_w(pc_get_device(machine), 1);
	342	upd765_reset_w(pc_get_device(space->machine()), 1);
343	343	}
344	344	else
345	345	{
346		pc_fdc_set_tc_state(machine, 0);
	346	pc_fdc_set_tc_state(space->machine(), 0);
347	347
348	348	/* release reset on fdc */
349		upd765_reset_w(pc_get_device(machine), 0);
	349	upd765_reset_w(pc_get_device(space->machine()), 0);
350	350	}
351	351	}
352	352
r17961	r17962
377	377	}
378	378	}
379	379
380		static void pcjr_fdc_dor_w(running_machine &machine, UINT8 data)
	380	static WRITE8_HANDLER( pcjr_fdc_dor_w )
381	381	{
382	382	int floppy_count;
383	383
384		floppy_count = floppy_get_count(machine);
	384	floppy_count = floppy_get_count(space->machine());
385	385
386	386	/* set floppy drive motor state */
387	387	if (floppy_count > 0)
388		floppy_mon_w(floppy_get_device(machine, 0), BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE);
	388	floppy_mon_w(floppy_get_device(space->machine(), 0), BIT(data, 0) ? CLEAR_LINE : ASSERT_LINE);
389	389
390	390	if ( data & 0x01 )
391	391	{
392	392	if ( floppy_count )
393		floppy_drive_set_ready_state(floppy_get_device(machine, 0), 1, 0);
	393	floppy_drive_set_ready_state(floppy_get_device(space->machine(), 0), 1, 0);
394	394	}
395	395
396	396	/* Is the watchdog timer disabled */
r17961	r17962
399	399	fdc->watchdog->adjust( attotime::never );
400	400	if ( fdc->fdc_interface.pc_fdc_interrupt )
401	401	{
402		fdc->fdc_interface.pc_fdc_interrupt(machine, 0 );
	402	fdc->fdc_interface.pc_fdc_interrupt(space->machine(), 0 );
403	403	}
404	404	} else {
405	405	/* Check for 1->0 watchdog trigger */
r17961	r17962
431	431	what is not yet clear is if this is a result of the drives ready state
432	432	changing...
433	433	*/
434		upd765_ready_w(pc_get_device(machine),1);
	434	upd765_ready_w(pc_get_device(space->machine()),1);
435	435
436	436	/* set FDC at reset */
437		upd765_reset_w(pc_get_device(machine), 1);
	437	upd765_reset_w(pc_get_device(space->machine()), 1);
438	438	}
439	439	else
440	440	{
441		pc_fdc_set_tc_state(machine, 0);
	441	pc_fdc_set_tc_state(space->machine(), 0);
442	442
443	443	/* release reset on fdc */
444		upd765_reset_w(pc_get_device(machine), 0);
	444	upd765_reset_w(pc_get_device(space->machine()), 0);
445	445	}
446	446
447	447	logerror("pcjr_fdc_dor_w: changing dor from %02x to %02x\n", fdc->digital_output_register, data);
r17961	r17962
498	498	case 3: /* tape drive select? */
499	499	break;
500	500	case 4:
501		data = upd765_status_r(pc_get_device(space->machine()), 0);
	501	data = upd765_status_r(pc_get_device(space->machine()), *space, 0);
502	502	break;
503	503	case 5:
504		data = upd765_data_r(pc_get_device(space->machine()), offset);
	504	data = upd765_data_r(pc_get_device(space->machine()), *space, offset);
505	505	break;
506	506	case 6: /* FDC reserved */
507	507	break;
r17961	r17962
531	531	case 1:   /* n/a */
532	532	break;
533	533	case 2:
534		pc_fdc_dor_w(space->machine(), data);
	534	pc_fdc_dor_w(space, 0, data);
535	535	break;
536	536	case 3:
537	537	/* tape drive select? */
r17961	r17962
540	540	pc_fdc_data_rate_w(space->machine(), data);
541	541	break;
542	542	case 5:
543		upd765_data_w(pc_get_device(space->machine()), 0, data);
	543	upd765_data_w(pc_get_device(space->machine()), *space, 0, data);
544	544	break;
545	545	case 6:
546	546	/* FDC reserved */
r17961	r17962
568	568	switch(offset)
569	569	{
570	570	case 2:
571		pcjr_fdc_dor_w( space->machine(), data );
	571	pcjr_fdc_dor_w( space, 0, data );
572	572	break;
573	573	case 4:
574	574	case 7:

trunk/src/mess/machine/mc68328.h

r17961	r17962
212	212	emu_timer *gptimer[2];
213	213	emu_timer *rtc;
214	214	emu_timer *pwm;
	215
	216	devcb_resolved_write8  out_port_a;    /* 8-bit output */
	217	devcb_resolved_write8  out_port_b;    /* 8-bit output */
	218	devcb_resolved_write8  out_port_c;    /* 8-bit output */
	219	devcb_resolved_write8  out_port_d;    /* 8-bit output */
	220	devcb_resolved_write8  out_port_e;    /* 8-bit output */
	221	devcb_resolved_write8  out_port_f;    /* 8-bit output */
	222	devcb_resolved_write8  out_port_g;    /* 8-bit output */
	223	devcb_resolved_write8  out_port_j;    /* 8-bit output */
	224	devcb_resolved_write8  out_port_k;    /* 8-bit output */
	225	devcb_resolved_write8  out_port_m;    /* 8-bit output */
	226
	227	devcb_resolved_read8   in_port_a;     /* 8-bit input */
	228	devcb_resolved_read8   in_port_b;     /* 8-bit input */
	229	devcb_resolved_read8   in_port_c;     /* 8-bit input */
	230	devcb_resolved_read8   in_port_d;     /* 8-bit input */
	231	devcb_resolved_read8   in_port_e;     /* 8-bit input */
	232	devcb_resolved_read8   in_port_f;     /* 8-bit input */
	233	devcb_resolved_read8   in_port_g;     /* 8-bit input */
	234	devcb_resolved_read8   in_port_j;     /* 8-bit input */
	235	devcb_resolved_read8   in_port_k;     /* 8-bit input */
	236	devcb_resolved_read8   in_port_m;     /* 8-bit input */
	237
	238	devcb_resolved_write8  out_pwm;       /* 1-bit output */
	239
	240	devcb_resolved_write16 out_spim;      /* 16-bit output */
	241	devcb_resolved_read16  in_spim;       /* 16-bit input */
215	242	};
216	243
217	244	#define SCR_BETO                0x80

trunk/src/mess/machine/sc499.h

r17961	r17962
20	20	FUNCTION PROTOTYPES
21	21	***************************************************************************/
22	22
23		READ8_DEVICE_HANDLER( sc499_r );
24		WRITE8_DEVICE_HANDLER( sc499_w );
	23	DECLARE_READ8_DEVICE_HANDLER( sc499_r );
	24	DECLARE_WRITE8_DEVICE_HANDLER( sc499_w );
25	25
26	26	void sc499_set_tc_state(running_machine *machine, int state);
27	27	UINT8 sc499_dack_r(running_machine *machine);

trunk/src/mess/machine/pc_fdc.h

r17961	r17962
40	40	void pc_fdc_reset(running_machine &machine);
41	41	void pc_fdc_init(running_machine &machine, const struct pc_fdc_interface *iface);
42	42	void pc_fdc_set_tc_state(running_machine &machine, int state);
43		int   pc_fdc_dack_r(running_machine &machine);
44		void pc_fdc_dack_w(running_machine &machine, int);
	43	int   pc_fdc_dack_r(running_machine &machine, address_space &space);
	44	void pc_fdc_dack_w(running_machine &machine, address_space &space, int data);
45	45
46	46	READ8_HANDLER(pc_fdc_r);
47	47	WRITE8_HANDLER(pc_fdc_w);

trunk/src/mess/machine/c64_ieee488.c

r17961	r17962
290	290	}
291	291	else if (!io2)
292	292	{
293		data |= tpi6525_r(m_tpi, offset & 0x07);
	293	data |= tpi6525_r(m_tpi, space, offset & 0x07);
294	294	}
295	295
296	296	return data;
r17961	r17962
305	305	{
306	306	if (!io2)
307	307	{
308		tpi6525_w(m_tpi, offset & 0x07, data);
	308	tpi6525_w(m_tpi, space, offset & 0x07, data);
309	309	}
310	310
311	311	m_exp->cd_w(space, offset, data, ba, roml, romh, io1, io2);

trunk/src/mess/machine/hec2hrp.c

r17961	r17962
131	131	{
132	132	/* minidisc floppy disc interface */
133	133	case 0x04:
134		data = wd17xx_status_r(fdc, 0);
	134	data = wd17xx_status_r(fdc, space, 0);
135	135	break;
136	136	case 0x05:
137		data = wd17xx_track_r(fdc, 0);
	137	data = wd17xx_track_r(fdc, space, 0);
138	138	break;
139	139	case 0x06:
140		data = wd17xx_sector_r(fdc, 0);
	140	data = wd17xx_sector_r(fdc, space, 0);
141	141	break;
142	142	case 0x07:
143		data = wd17xx_data_r(fdc, 0);
	143	data = wd17xx_data_r(fdc, space, 0);
144	144	break;
145	145	default:
146	146	break;
r17961	r17962
155	155	{
156	156	/* minidisc floppy disc interface */
157	157	case 0x04:
158		wd17xx_command_w(fdc, 0, data);
	158	wd17xx_command_w(fdc, space, 0, data);
159	159	break;
160	160	case 0x05:
161		wd17xx_track_w(fdc, 0, data);
	161	wd17xx_track_w(fdc, space, 0, data);
162	162	break;
163	163	case 0x06:
164		wd17xx_sector_w(fdc, 0, data);
	164	wd17xx_sector_w(fdc, space, 0, data);
165	165	break;
166	166	case 0x07:
167	167	/*write into command register*/
168		wd17xx_data_w(fdc, 0, data);
	168	wd17xx_data_w(fdc, space, 0, data);
169	169	break;
170	170	case 0x08:
171	171	/*General purpose port (0x08) for the minidisk I/O */
r17961	r17962
429	429	if (data & 0x40) m_hector_color[2] |= 8; else m_hector_color[2] &= 7;
430	430
431	431	/* Play bit*/
432		discrete_sound_w(discrete, NODE_01,  (data & 0x80) ? 0:1 );
	432	discrete_sound_w(discrete, space, NODE_01,  (data & 0x80) ? 0:1 );
433	433	}
434	434
435	435

trunk/src/mess/machine/bebox.c

r17961	r17962
696	696
697	697
698	698	static READ8_DEVICE_HANDLER( bebox_dma8237_fdc_dack_r ) {
699		return pc_fdc_dack_r(device->machine());
	699	return pc_fdc_dack_r(device->machine(),space);
700	700	}
701	701
702	702
703	703	static WRITE8_DEVICE_HANDLER( bebox_dma8237_fdc_dack_w ) {
704		pc_fdc_dack_w( device->machine(), data );
	704	pc_fdc_dack_w( device->machine(), space, data );
705	705	}
706	706
707	707

trunk/src/mess/machine/micropolis.c

r17961	r17962
306	306
307	307	switch (offset & 0x03)
308	308	{
309		case 0: data = micropolis_status_r(device, 0); break;
310		case 1:   data = micropolis_status_r(device, 1); break;
	309	case 0: data = micropolis_status_r(device, space, 0); break;
	310	case 1:   data = micropolis_status_r(device, space, 1); break;
311	311	case 2:
312		case 3:   data = micropolis_data_r(device, 0); break;
	312	case 3:   data = micropolis_data_r(device, space, 0); break;
313	313	}
314	314
315	315	return data;
r17961	r17962
320	320	switch (offset & 0x03)
321	321	{
322	322	case 0:
323		case 1:   micropolis_command_w(device, 0, data); break;
	323	case 1:   micropolis_command_w(device, space, 0, data); break;
324	324	case 2:
325		case 3: micropolis_data_w(device, 0, data);    break;
	325	case 3: micropolis_data_w(device, space, 0, data);    break;
326	326	}
327	327	}
328	328

trunk/src/mess/machine/s100.c

r17961	r17962
181	181
182	182	while (entry)
183	183	{
184		data |= entry->s100_smemr_r(offset);
	184	data |= entry->s100_smemr_r(space, offset);
185	185	entry = entry->next();
186	186	}
187	187
r17961	r17962
199	199
200	200	while (entry)
201	201	{
202		entry->s100_mwrt_w(offset, data);
	202	entry->s100_mwrt_w(space, offset, data);
203	203	entry = entry->next();
204	204	}
205	205	}
r17961	r17962
217	217
218	218	while (entry)
219	219	{
220		data |= entry->s100_sinp_r(offset);
	220	data |= entry->s100_sinp_r(space, offset);
221	221	entry = entry->next();
222	222	}
223	223
r17961	r17962
235	235
236	236	while (entry)
237	237	{
238		entry->s100_sout_w(offset, data);
	238	entry->s100_sout_w(space, offset, data);
239	239	entry = entry->next();
240	240	}
241	241	}

trunk/src/mess/machine/micropolis.h

r17961	r17962
61	61
62	62	void micropolis_set_drive(device_t *device, UINT8); // set current drive (0-3)
63	63
64		READ8_DEVICE_HANDLER( micropolis_status_r );
65		READ8_DEVICE_HANDLER( micropolis_data_r );
	64	DECLARE_READ8_DEVICE_HANDLER( micropolis_status_r );
	65	DECLARE_READ8_DEVICE_HANDLER( micropolis_data_r );
66	66
67		WRITE8_DEVICE_HANDLER( micropolis_command_w );
68		WRITE8_DEVICE_HANDLER( micropolis_data_w );
	67	DECLARE_WRITE8_DEVICE_HANDLER( micropolis_command_w );
	68	DECLARE_WRITE8_DEVICE_HANDLER( micropolis_data_w );
69	69
70		READ8_DEVICE_HANDLER( micropolis_r );
71		WRITE8_DEVICE_HANDLER( micropolis_w );
	70	DECLARE_READ8_DEVICE_HANDLER( micropolis_r );
	71	DECLARE_WRITE8_DEVICE_HANDLER( micropolis_w );
72	72
73	73	extern const micropolis_interface default_micropolis_interface;
74	74

trunk/src/mess/machine/s100.h

r17961	r17962
266	266	virtual void s100_vi7_w(int state) { };
267	267
268	268	// memory access
269		virtual UINT8 s100_smemr_r(offs_t offset) { return 0; };
270		virtual void s100_mwrt_w(offs_t offset, UINT8 data) { };
	269	virtual UINT8 s100_smemr_r(address_space &space, offs_t offset) { return 0; };
	270	virtual void s100_mwrt_w(address_space &space, offs_t offset, UINT8 data) { };
271	271
272	272	// I/O access
273		virtual UINT8 s100_sinp_r(offs_t offset) { return 0; };
274		virtual void s100_sout_w(offs_t offset, UINT8 data) { };
	273	virtual UINT8 s100_sinp_r(address_space &space, offs_t offset) { return 0; };
	274	virtual void s100_sout_w(address_space &space, offs_t offset, UINT8 data) { };
275	275
276	276	// configuration access
277	277	virtual void s100_phlda_w(int state) { }

trunk/src/mess/machine/a2diskii.c

r17961	r17962
138	138
139	139	UINT8 a2bus_floppy_device::read_c0nx(address_space &space, UINT8 offset)
140	140	{
141		return applefdc_r(m_fdc, offset);
	141	return applefdc_r(m_fdc, space, offset);
142	142	}
143	143
144	144
r17961	r17962
148	148
149	149	void a2bus_floppy_device::write_c0nx(address_space &space, UINT8 offset, UINT8 data)
150	150	{
151		applefdc_w(m_fdc, offset, data);
	151	applefdc_w(m_fdc, space, offset, data);
152	152	}
153	153
154	154	/*-------------------------------------------------

trunk/src/mess/machine/abc77.c

r17961	r17962
589	589	}
590	590
591	591	// beep
592		discrete_sound_w(m_discrete, NODE_01, BIT(data, 4));
	592	discrete_sound_w(m_discrete, space, NODE_01, BIT(data, 4));
593	593
594	594	// transmit data
595	595	serial_output(BIT(data, 5));

trunk/src/mess/machine/c64.c

r17961	r17962
80	80
81	81	static READ8_DEVICE_HANDLER( c64_cia0_port_a_r )
82	82	{
83		UINT8 cia0portb = mos6526_pb_r(device->machine().device("cia_0"), 0);
	83	UINT8 cia0portb = mos6526_pb_r(device->machine().device("cia_0"), space, 0);
84	84
85	85	return cbm_common_cia0_port_a_r(device, cia0portb);
86	86	}
87	87
88	88	static READ8_DEVICE_HANDLER( c64_cia0_port_b_r )
89	89	{
90		UINT8 cia0porta = mos6526_pa_r(device->machine().device("cia_0"), 0);
	90	UINT8 cia0porta = mos6526_pa_r(device->machine().device("cia_0"), space, 0);
91	91
92	92	return cbm_common_cia0_port_b_r(device, cia0porta);
93	93	}
r17961	r17962
256	256
257	257	state->m_io_mirror[offset] = data;
258	258	if (offset < 0x400)
259		vic2_port_w(vic2, offset & 0x3ff, data);
	259	vic2_port_w(vic2, *space, offset & 0x3ff, data);
260	260	else if (offset < 0x800)
261	261	sid->write(*space, offset & 0x3ff, data);
262	262	else if (offset < 0xc00)
263	263	state->m_colorram[offset & 0x3ff] = data | 0xf0;
264	264	else if (offset < 0xd00)
265		mos6526_w(cia_0, offset, data);
	265	mos6526_w(cia_0, *space, offset, data);
266	266	else if (offset < 0xe00)
267	267	{
268	268	if (state->m_cia1_on)
269		mos6526_w(cia_1, offset, data);
	269	mos6526_w(cia_1, *space, offset, data);
270	270	else
271	271	DBG_LOG(space->machine(), 1, "io write", ("%.3x %.2x\n", offset, data));
272	272	}
r17961	r17962
294	294	device_t *vic2 = space->machine().device("vic2");
295	295
296	296	if (offset < 0x400)
297		return vic2_port_r(vic2, offset & 0x3ff);
	297	return vic2_port_r(vic2, *space, offset & 0x3ff);
298	298
299	299	else if (offset < 0x800)
300	300	return sid->read(*space, offset & 0x3ff);
r17961	r17962
309	309	else
310	310	cia_set_port_mask_value(cia_0, 0, state->ioport("CTRLSEL")->read() & 0x80 ? c64_keyline[8] : c64_keyline[9] );
311	311
312		return mos6526_r(cia_0, offset);
	312	return mos6526_r(cia_0, *space, offset);
313	313	}
314	314
315	315	else if (state->m_cia1_on && (offset < 0xe00))
316		return mos6526_r(cia_1, offset);
	316	return mos6526_r(cia_1, *space, offset);
317	317
318	318	DBG_LOG(space->machine(), 1, "io read", ("%.3x\n", offset));
319	319
r17961	r17962
611	611	}
612	612
613	613
614		int c64_paddle_read( device_t *device, int which )
	614	int c64_paddle_read( device_t *device, address_space &space, int which )
615	615	{
616	616	running_machine &machine = device->machine();
617	617	int pot1 = 0xff, pot2 = 0xff, pot3 = 0xff, pot4 = 0xff, temp;
618		UINT8 cia0porta = mos6526_pa_r(machine.device("cia_0"), 0);
	618	UINT8 cia0porta = mos6526_pa_r(machine.device("cia_0"), space, 0);
619	619	int controller1 = machine.root_device().ioport("CTRLSEL")->read() & 0x07;
620	620	int controller2 = machine.root_device().ioport("CTRLSEL")->read() & 0x70;
621	621	/* Notice that only a single input is defined for Mouse & Lightpen in both ports */

trunk/src/mess/machine/pc.c

r17961	r17962
200	200
201	201	static READ8_DEVICE_HANDLER( pc_dma8237_fdc_dack_r )
202	202	{
203		return pc_fdc_dack_r(device->machine());
	203	return pc_fdc_dack_r(device->machine(), space);
204	204	}
205	205
206	206
r17961	r17962
212	212
213	213	static WRITE8_DEVICE_HANDLER( pc_dma8237_fdc_dack_w )
214	214	{
215		pc_fdc_dack_w( device->machine(), data );
	215	pc_fdc_dack_w( device->machine(), space, data );
216	216	}
217	217
218	218

trunk/src/mess/machine/hd63450.h

r17961	r17962
47	47	MCFG_DEVICE_ADD(_tag, HD63450, 0) \
48	48	MCFG_DEVICE_CONFIG(_config)
49	49
50		READ16_DEVICE_HANDLER( hd63450_r );
51		WRITE16_DEVICE_HANDLER( hd63450_w );
	50	DECLARE_READ16_DEVICE_HANDLER( hd63450_r );
	51	DECLARE_WRITE16_DEVICE_HANDLER( hd63450_w );

trunk/src/mess/machine/bbc.c

r17961	r17962
573	573	return acia->data_read(space,0);
574	574	}
575	575	if ((myo>=0x10) && (myo<=0x17)) return 0xfe;                  /* Serial System Chip */
576		if ((myo>=0x18) && (myo<=0x1f)) return uPD7002_r(machine().device("upd7002"), myo-0x18);         /* A to D converter */
	576	if ((myo>=0x18) && (myo<=0x1f)) return uPD7002_r(machine().device("upd7002"), space, myo-0x18);         /* A to D converter */
577	577	if ((myo>=0x20) && (myo<=0x23)) return 0xfe;                  /* VideoULA */
578	578	if ((myo>=0x24) && (myo<=0x27)) return bbcm_wd1770l_read(space, myo-0x24); /* 1770 */
579	579	if ((myo>=0x28) && (myo<=0x2f)) return bbcm_wd1770_read(space, myo-0x28);  /* disc control latch */
r17961	r17962
583	583	if ((myo>=0x40) && (myo<=0x5f)) return via_0->read(space,myo-0x40);
584	584	if ((myo>=0x60) && (myo<=0x7f)) return via_1->read(space,myo-0x60);
585	585	if ((myo>=0x80) && (myo<=0x9f)) return 0xfe;
586		if ((myo>=0xa0) && (myo<=0xbf)) return mc6854_r(adlc, myo & 0x03);
	586	if ((myo>=0xa0) && (myo<=0xbf)) return mc6854_r(adlc, space, myo & 0x03);
587	587	if ((myo>=0xc0) && (myo<=0xdf)) return 0xfe;
588	588	if ((myo>=0xe0) && (myo<=0xff)) return 0xfe;
589	589	}
r17961	r17962
613	613	acia->data_write(space, 0, data);
614	614	}
615	615	if ((myo>=0x10) && (myo<=0x17)) bbc_SerialULA_w(space, myo-0x10,data);      /* Serial System Chip */
616		if ((myo>=0x18) && (myo<=0x1f)) uPD7002_w(machine().device("upd7002"),myo-0x18,data);         /* A to D converter */
	616	if ((myo>=0x18) && (myo<=0x1f)) uPD7002_w(machine().device("upd7002"),space,myo-0x18,data);         /* A to D converter */
617	617	if ((myo>=0x20) && (myo<=0x23)) bbc_videoULA_w(space, myo-0x20,data);         /* VideoULA */
618	618	if ((myo>=0x24) && (myo<=0x27)) bbcm_wd1770l_write(space, myo-0x24,data);   /* 1770 */
619	619	if ((myo>=0x28) && (myo<=0x2f)) bbcm_wd1770_write(space, myo-0x28,data);   /* disc control latch */
r17961	r17962
623	623	if ((myo>=0x40) && (myo<=0x5f)) via_0->write(space,myo-0x40, data);
624	624	if ((myo>=0x60) && (myo<=0x7f)) via_1->write(space,myo-0x60, data);
625	625	//if ((myo>=0x80) && (myo<=0x9f))
626		if ((myo>=0xa0) && (myo<=0xbf)) mc6854_w(adlc, myo & 0x03, data);
	626	if ((myo>=0xa0) && (myo<=0xbf)) mc6854_w(adlc, space, myo & 0x03, data);
627	627	//if ((myo>=0xc0) && (myo<=0xdf))
628	628	//if ((myo>=0xe0) && (myo<=0xff))
629	629	}
r17961	r17962
814	814
815	815
816	816
817		static int bbc_keyboard(address_space *space, int data)
	817	static int bbc_keyboard(address_space &space, int data)
818	818	{
819		bbc_state *state = space->machine().driver_data<bbc_state>();
	819	bbc_state *state = space.machine().driver_data<bbc_state>();
820	820	int bit;
821	821	int row;
822	822	int res;
r17961	r17962
824	824	"COL0", "COL1", "COL2", "COL3", "COL4",
825	825	"COL5", "COL6", "COL7", "COL8", "COL9"
826	826	};
827		via6522_device *via_0 = space->machine().device<via6522_device>("via6522_0");
	827	via6522_device *via_0 = space.machine().device<via6522_device>("via6522_0");
828	828
829	829	state->m_column = data & 0x0f;
830	830	row = (data>>4) & 0x07;
r17961	r17962
833	833
834	834	if (state->m_column < 10)
835	835	{
836		res = space->machine().root_device().ioport(colnames[state->m_column])->read();
	836	res = space.machine().root_device().ioport(colnames[state->m_column])->read();
837	837	}
838	838	else
839	839	{
r17961	r17962
874	874
875	875
876	876	/* This the BBC Masters Real Time Clock and NVRam IC */
877		static void MC146818_set(address_space *space)
	877	static void MC146818_set(address_space &space)
878	878	{
879		bbc_state *state = space->machine().driver_data<bbc_state>();
	879	bbc_state *state = space.machine().driver_data<bbc_state>();
880	880	logerror ("146181 WR=%d DS=%d AS=%d CE=%d \n",state->m_MC146818_WR,state->m_MC146818_DS,state->m_MC146818_AS,state->m_MC146818_CE);
881		mc146818_device *rtc = space->machine().device<mc146818_device>("rtc");
	881	mc146818_device *rtc = space.machine().device<mc146818_device>("rtc");
882	882
883	883	// if chip enabled
884	884	if (state->m_MC146818_CE)
r17961	r17962
888	888	{
889	889	if (state->m_MC146818_WR)
890	890	{
891		state->m_via_system_porta=rtc->read(*space, 1);
	891	state->m_via_system_porta=rtc->read(space, 1);
892	892	//logerror("read 146818 data %d \n",state->m_via_system_porta);
893	893	}
894	894	else
895	895	{
896		rtc->write(*space, 1, state->m_via_system_porta);
	896	rtc->write(space, 1, state->m_via_system_porta);
897	897	//logerror("write 146818 data %d \n",state->m_via_system_porta);
898	898	}
899	899	}
r17961	r17962
901	901	// if address select is set then set the address in the 146818
902	902	if (state->m_MC146818_AS)
903	903	{
904		rtc->write(*space, 0, state->m_via_system_porta);
	904	rtc->write(space, 0, state->m_via_system_porta);
905	905	//logerror("write 146818 address %d \n",state->m_via_system_porta);
906	906	}
907	907	}
r17961	r17962
911	911	static WRITE8_DEVICE_HANDLER( bbcb_via_system_write_porta )
912	912	{
913	913	bbc_state *state = device->machine().driver_data<bbc_state>();
914		address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
915	914	//logerror("SYSTEM write porta %d\n",data);
916	915
917	916	state->m_via_system_porta = data;
918	917	if (state->m_b0_sound == 0)
919	918	{
920	919	//logerror("Doing an unsafe write to the sound chip %d \n",data);
921		state->m_sn->write(*device->machine().device<legacy_cpu_device>("maincpu")->space(), 0,state->m_via_system_porta);
	920	state->m_sn->write(space, 0,state->m_via_system_porta);
922	921	}
923	922	if (state->m_b3_keyboard == 0)
924	923	{
r17961	r17962
932	931	static WRITE8_DEVICE_HANDLER( bbcb_via_system_write_portb )
933	932	{
934	933	bbc_state *state = device->machine().driver_data<bbc_state>();
935		address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
936	934	int bit, value;
937	935	bit = data & 0x07;
938	936	value = (data >> 3) & 0x01;
r17961	r17962
1030	1028	if (state->m_b0_sound == 1)
1031	1029	{
1032	1030	state->m_b0_sound = 0;
1033		state->m_sn->write(*device->machine().device<legacy_cpu_device>("maincpu")->space(), 0, state->m_via_system_porta);
	1031	state->m_sn->write(space, 0, state->m_via_system_porta);
1034	1032	}
1035	1033	break;
1036	1034	case 1:
r17961	r17962
1176	1174	/* joystick EOC */
1177	1175	static READ8_DEVICE_HANDLER( bbcb_via_system_read_cb1 )
1178	1176	{
1179		return uPD7002_EOC_r(device->machine().device("upd7002"),0);
	1177	return uPD7002_EOC_r(device->machine().device("upd7002"),space,0);
1180	1178	}
1181	1179
1182	1180
r17961	r17962
1453	1451	case 2:
1454	1452	case 3:
1455	1453	/* 8271 registers */
1456		ret=i8271_r(i8271, offset);
	1454	ret=i8271_r(i8271, space, offset);
1457	1455	logerror("  %d\n",ret);
1458	1456	break;
1459	1457	case 4:
1460		ret=i8271_data_r(i8271, offset);
	1458	ret=i8271_data_r(i8271, space, offset);
1461	1459	logerror("  %d\n",ret);
1462	1460	break;
1463	1461	default:
r17961	r17962
1480	1478	case 2:
1481	1479	case 3:
1482	1480	/* 8271 registers */
1483		i8271_w(i8271, offset, data);
	1481	i8271_w(i8271, space, offset, data);
1484	1482	return;
1485	1483	case 4:
1486		i8271_data_w(i8271, offset, data);
	1484	i8271_data_w(i8271, space, offset, data);
1487	1485	return;
1488	1486	default:
1489	1487	break;
r17961	r17962
1617	1615	switch (offset)
1618	1616	{
1619	1617	case 4:
1620		retval=wd17xx_status_r(fdc, 0);
	1618	retval=wd17xx_status_r(fdc, space, 0);
1621	1619	break;
1622	1620	case 5:
1623		retval=wd17xx_track_r(fdc, 0);
	1621	retval=wd17xx_track_r(fdc, space, 0);
1624	1622	break;
1625	1623	case 6:
1626		retval=wd17xx_sector_r(fdc, 0);
	1624	retval=wd17xx_sector_r(fdc, space, 0);
1627	1625	break;
1628	1626	case 7:
1629		retval=wd17xx_data_r(fdc, 0);
	1627	retval=wd17xx_data_r(fdc, space, 0);
1630	1628	break;
1631	1629	default:
1632	1630	break;
r17961	r17962
1646	1644	bbc_wd177x_status_w(space, 0, data);
1647	1645	break;
1648	1646	case 4:
1649		wd17xx_command_w(fdc, 0, data);
	1647	wd17xx_command_w(fdc, space, 0, data);
1650	1648	break;
1651	1649	case 5:
1652		wd17xx_track_w(fdc, 0, data);
	1650	wd17xx_track_w(fdc, space, 0, data);
1653	1651	break;
1654	1652	case 6:
1655		wd17xx_sector_w(fdc, 0, data);
	1653	wd17xx_sector_w(fdc, space, 0, data);
1656	1654	break;
1657	1655	case 7:
1658		wd17xx_data_w(fdc, 0, data);
	1656	wd17xx_data_w(fdc, space, 0, data);
1659	1657	break;
1660	1658	default:
1661	1659	break;
r17961	r17962
1730	1728	switch (offset)
1731	1729	{
1732	1730	case 0xf8:
1733		return wd17xx_status_r(fdc, 0);
	1731	return wd17xx_status_r(fdc, space, 0);
1734	1732	case 0xf9:
1735		return wd17xx_track_r(fdc, 0);
	1733	return wd17xx_track_r(fdc, space, 0);
1736	1734	case 0xfa:
1737		return wd17xx_sector_r(fdc, 0);
	1735	return wd17xx_sector_r(fdc, space, 0);
1738	1736	case 0xfb:
1739		return wd17xx_data_r(fdc, 0);
	1737	return wd17xx_data_r(fdc, space, 0);
1740	1738	}
1741	1739
1742	1740	}
r17961	r17962
1760	1758	switch (offset)
1761	1759	{
1762	1760	case 0xf8:
1763		wd17xx_command_w(fdc, 0, data);
	1761	wd17xx_command_w(fdc, space, 0, data);
1764	1762	break;
1765	1763	case 0xf9:
1766		wd17xx_track_w(fdc, 0, data);
	1764	wd17xx_track_w(fdc, space, 0, data);
1767	1765	break;
1768	1766	case 0xfa:
1769		wd17xx_sector_w(fdc, 0, data);
	1767	wd17xx_sector_w(fdc, space, 0, data);
1770	1768	break;
1771	1769	case 0xfb:
1772		wd17xx_data_w(fdc, 0, data);
	1770	wd17xx_data_w(fdc, space, 0, data);
1773	1771	break;
1774	1772	case 0xfc:
1775	1773	bbc_opus_status_w(space, 0,data);
r17961	r17962
1802	1800	switch (offset)
1803	1801	{
1804	1802	case 0:
1805		retval=wd17xx_status_r(fdc, 0);
	1803	retval=wd17xx_status_r(fdc, space, 0);
1806	1804	break;
1807	1805	case 1:
1808		retval=wd17xx_track_r(fdc, 0);
	1806	retval=wd17xx_track_r(fdc, space, 0);
1809	1807	break;
1810	1808	case 2:
1811		retval=wd17xx_sector_r(fdc, 0);
	1809	retval=wd17xx_sector_r(fdc, space, 0);
1812	1810	break;
1813	1811	case 3:
1814		retval=wd17xx_data_r(fdc, 0);
	1812	retval=wd17xx_data_r(fdc, space, 0);
1815	1813	break;
1816	1814	default:
1817	1815	break;
r17961	r17962
1827	1825	switch (offset)
1828	1826	{
1829	1827	case 0:
1830		wd17xx_command_w(fdc, 0, data);
	1828	wd17xx_command_w(fdc, space, 0, data);
1831	1829	break;
1832	1830	case 1:
1833		wd17xx_track_w(fdc, 0, data);
	1831	wd17xx_track_w(fdc, space, 0, data);
1834	1832	break;
1835	1833	case 2:
1836		wd17xx_sector_w(fdc, 0, data);
	1834	wd17xx_sector_w(fdc, space, 0, data);
1837	1835	break;
1838	1836	case 3:
1839		wd17xx_data_w(fdc, 0, data);
	1837	wd17xx_data_w(fdc, space, 0, data);
1840	1838	break;
1841	1839	default:
1842	1840	break;

trunk/src/mess/machine/kr2376.c

r17961	r17962
80	80
81	81	/* timers */
82	82	emu_timer *scan_timer;         /* keyboard scan timer */
	83	devcb_resolved_write_line on_strobe_changed;
83	84	};
84	85
85	86	INLINE kr2376_t *get_safe_token(device_t *device)
r17961	r17962
133	134	kr2376->pins[KR2376_PO] = kr2376->parity ^ kr2376->pins[KR2376_PII];
134	135	}
135	136	kr2376->pins[KR2376_SO] = kr2376->strobe ^ kr2376->pins[KR2376_DSII];
136		if (kr2376->intf->on_strobe_changed)
137		kr2376->intf->on_strobe_changed(device, 0, kr2376->strobe ^ kr2376->pins[KR2376_DSII]);
	137	if (!kr2376->on_strobe_changed.isnull())
	138	kr2376->on_strobe_changed(kr2376->strobe ^ kr2376->pins[KR2376_DSII]);
138	139	}
139	140	}
140	141
r17961	r17962
343	344	assert(device->tag() != NULL);
344	345
345	346	kr2376->intf = (const kr2376_interface*)device->static_config();
346
	347
347	348	assert(kr2376->intf != NULL);
348	349	assert(kr2376->intf->clock > 0);
349	350
	351	kr2376->on_strobe_changed.resolve(kr2376->intf->on_strobe_changed_cb, *device);
	352
350	353	/* set initial values */
351	354	kr2376->ring11 = 0;
352	355	kr2376->ring8 = 0;

trunk/src/mess/machine/kr2376.h

r17961	r17962
85	85	int clock;
86	86
87	87	/* This will be called for every change of the strobe pin (pin 16). Optional */
88		//  kr2376_on_strobe_changed_func       on_strobe_changed;
89		write8_device_func   on_strobe_changed;
	88	devcb_write_line on_strobe_changed_cb;
90	89	};
91	90	#define KR2376_INTERFACE(name) const kr2376_interface (name)=
92	91	/* keyboard matrix */
93	92	INPUT_PORTS_EXTERN( kr2376 );
94	93
95	94	/* keyboard data */
96		READ8_DEVICE_HANDLER( kr2376_data_r );
	95	DECLARE_READ8_DEVICE_HANDLER( kr2376_data_r );
97	96
98	97	/* Set an input pin */
99	98	void kr2376_set_input_pin( device_t *device, kr2376_input_pin_t pin, int data );

trunk/src/mess/machine/applefdc.h

r17961	r17962
102	102	PROTOTYPES
103	103	***************************************************************************/
104	104	/* read/write handlers */
105		READ8_DEVICE_HANDLER(applefdc_r);
106		WRITE8_DEVICE_HANDLER(applefdc_w);
	105	DECLARE_READ8_DEVICE_HANDLER(applefdc_r);
	106	DECLARE_WRITE8_DEVICE_HANDLER(applefdc_w);
107	107
108	108	/* accessor */
109	109	UINT8 applefdc_get_lines(device_t *device);

trunk/src/mess/machine/upd765.c

r17961	r17962
2263	2263	upd765_set_dma_drq(device, CLEAR_LINE);
2264	2264
2265	2265	/* write data */
2266		upd765_data_w(device, offset, data);
	2266	upd765_data_w(device, space, offset, data);
2267	2267	}
2268	2268
2269	2269	READ8_DEVICE_HANDLER(upd765_dack_r)
r17961	r17962
2272	2272	upd765_set_dma_drq(device,CLEAR_LINE);
2273	2273
2274	2274	/* read data */
2275		return upd765_data_r(device, offset);
	2275	return upd765_data_r(device, space, offset);
2276	2276	}
2277	2277
2278	2278	static TIMER_CALLBACK( interrupt_callback )

trunk/src/mess/machine/macpci.c

r17961	r17962
26	26
27	27	/* VIA1 Handlers */
28	28
29		static READ8_DEVICE_HANDLER(mac_via_in_a);
30		static READ8_DEVICE_HANDLER(mac_via_in_b);
31		static READ8_DEVICE_HANDLER(mac_adb_via_in_cb2);
32		static WRITE8_DEVICE_HANDLER(mac_via_out_a);
33		static WRITE8_DEVICE_HANDLER(mac_via_out_b);
34		static WRITE8_DEVICE_HANDLER(mac_adb_via_out_cb2);
	29	static DECLARE_READ8_DEVICE_HANDLER(mac_via_in_a);
	30	static DECLARE_READ8_DEVICE_HANDLER(mac_via_in_b);
	31	static DECLARE_READ8_DEVICE_HANDLER(mac_adb_via_in_cb2);
	32	static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_a);
	33	static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_b);
	34	static DECLARE_WRITE8_DEVICE_HANDLER(mac_adb_via_out_cb2);
35	35	static void mac_via_irq(device_t *device, int state);
36	36
37	37	const via6522_interface pcimac_via6522_intf =

trunk/src/mess/machine/c65.c

r17961	r17962
72	72
73	73	static READ8_DEVICE_HANDLER( c65_cia0_port_a_r )
74	74	{
75		UINT8 cia0portb = mos6526_pb_r(device->machine().device("cia_0"), 0);
	75	UINT8 cia0portb = mos6526_pb_r(device->machine().device("cia_0"), space, 0);
76	76
77	77	return cbm_common_cia0_port_a_r(device, cia0portb);
78	78	}
r17961	r17962
81	81	{
82	82	c65_state *state = device->machine().driver_data<c65_state>();
83	83	UINT8 value = 0xff;
84		UINT8 cia0porta = mos6526_pa_r(device->machine().device("cia_0"), 0);
	84	UINT8 cia0porta = mos6526_pa_r(device->machine().device("cia_0"), space, 0);
85	85
86	86	value &= cbm_common_cia0_port_b_r(device, cia0porta);
87	87
r17961	r17962
654	654	{
655	655	case 0x000:
656	656	if (offset < 0x80)
657		vic3_port_w(vic3, offset & 0x7f, data);
	657	vic3_port_w(vic3, *space, offset & 0x7f, data);
658	658	else if (offset < 0xa0)
659	659	c65_fdc_w(space->machine(), offset&0x1f,data);
660	660	else
r17961	r17962
666	666	case 0x100:
667	667	case 0x200:
668	668	case 0x300:
669		vic3_palette_w(vic3, offset - 0x100, data);
	669	vic3_palette_w(vic3, *space, offset - 0x100, data);
670	670	break;
671	671	case 0x400:
672	672	if (offset<0x420) /* maybe 0x20 */
r17961	r17962
696	696	switch (offset & 0xf00)
697	697	{
698	698	case 0x000:
699		mos6526_w(cia_0, offset, data);
	699	mos6526_w(cia_0, *space, offset, data);
700	700	break;
701	701	case 0x100:
702		mos6526_w(cia_1, offset, data);
	702	mos6526_w(cia_1, *space, offset, data);
703	703	break;
704	704	case 0x200:
705	705	case 0x300:
r17961	r17962
718	718	{
719	719	case 0x000:
720	720	if (offset < 0x80)
721		return vic3_port_r(vic3, offset & 0x7f);
	721	return vic3_port_r(vic3, *space, offset & 0x7f);
722	722	if (offset < 0xa0)
723	723	return c65_fdc_r(space->machine(), offset&0x1f);
724	724	else
r17961	r17962
759	759	switch (offset & 0x300)
760	760	{
761	761	case 0x000:
762		return mos6526_r(cia_0, offset);
	762	return mos6526_r(cia_0, *space, offset);
763	763	case 0x100:
764		return mos6526_r(cia_1, offset);
	764	return mos6526_r(cia_1, *space, offset);
765	765	case 0x200:
766	766	case 0x300:
767	767	DBG_LOG(space->machine(), 1, "io read", ("%.3x\n", offset+0xc00));

trunk/src/mess/machine/isa_ide.c

r17961	r17962
11	11
12	12	static READ16_DEVICE_HANDLER( ide16_r )
13	13	{
14		return ide_controller16_r(device, 0x1f0/2 + offset, mem_mask);
	14	return ide_controller16_r(device, space, 0x1f0/2 + offset, mem_mask);
15	15	}
16	16
17	17	static WRITE16_DEVICE_HANDLER( ide16_w )
18	18	{
19		ide_controller16_w(device, 0x1f0/2 + offset, data, mem_mask);
	19	ide_controller16_w(device, space, 0x1f0/2 + offset, data, mem_mask);
20	20	}
21	21
22	22
23	23	static READ16_DEVICE_HANDLER( ide16_alt_r )
24	24	{
25		return ide_controller16_r(device, 0x3f6/2 + offset, 0x00ff);
	25	return ide_controller16_r(device, space, 0x3f6/2 + offset, 0x00ff);
26	26	}
27	27
28	28	static WRITE16_DEVICE_HANDLER( ide16_alt_w )
29	29	{
30		ide_controller16_w(device, 0x3f6/2 + offset, data, 0x00ff);
	30	ide_controller16_w(device, space, 0x3f6/2 + offset, data, 0x00ff);
31	31	}
32	32
33	33	static void ide_interrupt(device_t *device, int state)

trunk/src/mess/machine/upd765.h

r17961	r17962
113	113	***************************************************************************/
114	114
115	115	/* read of data register */
116		READ8_DEVICE_HANDLER(upd765_data_r);
	116	DECLARE_READ8_DEVICE_HANDLER(upd765_data_r);
117	117	/* write to data register */
118		WRITE8_DEVICE_HANDLER(upd765_data_w);
	118	DECLARE_WRITE8_DEVICE_HANDLER(upd765_data_w);
119	119	/* read of main status register */
120		READ8_DEVICE_HANDLER(upd765_status_r);
	120	DECLARE_READ8_DEVICE_HANDLER(upd765_status_r);
121	121
122	122	/* dma acknowledge with write */
123		WRITE8_DEVICE_HANDLER(upd765_dack_w);
	123	DECLARE_WRITE8_DEVICE_HANDLER(upd765_dack_w);
124	124	/* dma acknowledge with read */
125		READ8_DEVICE_HANDLER(upd765_dack_r);
	125	DECLARE_READ8_DEVICE_HANDLER(upd765_dack_r);
126	126
127	127	/* reset upd765 */
128	128	void upd765_reset(device_t *device, int);

trunk/src/mess/machine/mc80.c

r17961	r17962
194	194	// SIO CH A in = keyboard; out = beeper; CH B = IFSS (??)
195	195	const z80sio_interface mc8030_asp_z80sio_intf =
196	196	{
197		0,   /* interrupt handler */
198		0,         /* DTR changed handler */
199		0,         /* RTS changed handler */
200		0,         /* BREAK changed handler */
201		0,         /* transmit handler */
202		0         /* receive handler */
	197	DEVCB_NULL,   /* interrupt handler */
	198	DEVCB_NULL,         /* DTR changed handler */
	199	DEVCB_NULL,         /* RTS changed handler */
	200	DEVCB_NULL,         /* BREAK changed handler */
	201	DEVCB_NULL,         /* transmit handler */
	202	DEVCB_NULL         /* receive handler */
203	203	};
204	204

trunk/src/mess/machine/ti99/genboard.c

r17961	r17962
338	338	// clock
339	339	// tests on the real machine showed that
340	340	// upper nibble is 0xf (probably because of the location at 0xf130?)
341		value = mm58274c_r(m_clock, offset & 0x000f) | 0xf0;
	341	value = mm58274c_r(m_clock, space, offset & 0x000f) | 0xf0;
342	342	do_wait(1);
343	343	if (VERBOSE>7) LOG("genboard: Read clock %04x -> %02x\n", offset, value);
344	344	return value;
r17961	r17962
372	372	// Obscure, needs more investigation. We might as well ignore this,
373	373	// as the high nibble is obviously undefined and takes some past
374	374	// value floating around.
375		value = mm58274c_r(m_clock, offset & 0x000f);
	375	value = mm58274c_r(m_clock, space, offset & 0x000f);
376	376	value |= ((offset & 0x000f)==0x000f)? 0x20 : 0x10;
377	377
378	378	do_wait(1);
r17961	r17962
609	609	{
610	610	// clock
611	611	// ++++ ++++ ++++ ----
612		mm58274c_w(m_clock, offset & 0x00f, data);
	612	mm58274c_w(m_clock, space, offset & 0x00f, data);
613	613	do_wait(1);
614	614	if (VERBOSE>7) LOG("genboard: Write clock %04x <- %02x\n", offset, data);
615	615	return;
r17961	r17962
630	630	if ((offset & 0xfff0)==0x8010)
631	631	{
632	632	// clock
633		mm58274c_w(m_clock, offset & 0x00f, data);
	633	mm58274c_w(m_clock, space, offset & 0x00f, data);
634	634	do_wait(1);
635	635	if (VERBOSE>7) LOG("genboard: Write clock %04x <- %02x\n", offset, data);
636	636	return;

trunk/src/mess/machine/ti99/ti_fdc.c

r17961	r17962
64	64
65	65	if ((offset & 0x1ff9)==0x1ff0)
66	66	{
67		reply = wd17xx_r(m_controller, (offset >> 1)&0x03);
	67	reply = wd17xx_r(m_controller, space, (offset >> 1)&0x03);
68	68	}
69	69	else
70	70	{
r17961	r17962
88	88	// 0101 1111 1111 1xx0
89	89	if ((offset & 0x1ff9)==0x1ff8)
90	90	{
91		wd17xx_w(m_controller, (offset >> 1)&0x03, data);
	91	wd17xx_w(m_controller, space, (offset >> 1)&0x03, data);
92	92	}
93	93	}
94	94	}

trunk/src/mess/machine/ti99/hfdc.c

r17961	r17962
86	86
87	87	if ((offset & 0x1fe1)==CLK_ADDR)
88	88	{
89		*value = mm58274c_r(m_clock, (offset & 0x001e) >> 1);
	89	*value = mm58274c_r(m_clock, space, (offset & 0x001e) >> 1);
90	90	if (VERBOSE>7) LOG("hfdc: read from clock address %04x: %02x\n", offset & 0xffff, *value);
91	91	return;
92	92	}
r17961	r17962
140	140	if ((offset & 0x1fe1)==CLK_ADDR)
141	141	{
142	142	if (VERBOSE>7) LOG("hfdc: write to clock address %04x: %02x\n", offset & 0xffff, data);
143		mm58274c_w(m_clock, (offset & 0x001e) >> 1, data);
	143	mm58274c_w(m_clock, space, (offset & 0x001e) >> 1, data);
144	144	return;
145	145	}
146	146

trunk/src/mess/machine/ti99/bwg.c

r17961	r17962
132	132	if ((offset & 0x03e1)==0x03e0)
133	133	{
134	134	// .... ..11 111x xxx0
135		*value = mm58274c_r(m_clock, (offset & 0x001e) >> 1);
	135	*value = mm58274c_r(m_clock, space, (offset & 0x001e) >> 1);
136	136	}
137	137	else
138	138	{
r17961	r17962
146	146	// .... ..11 1111 0xx0
147	147	// Note that the value is inverted again on the board,
148	148	// so we can drop the inversion
149		*value = wd17xx_r(m_controller, (offset >> 1)&0x03);
	149	*value = wd17xx_r(m_controller, space, (offset >> 1)&0x03);
150	150	}
151	151	else
152	152	{
r17961	r17962
211	211	if ((offset & 0x03e1)==0x03e0)
212	212	{
213	213	// .... ..11 111x xxx0
214		mm58274c_w(m_clock, (offset & 0x001e) >> 1, data);
	214	mm58274c_w(m_clock, space, (offset & 0x001e) >> 1, data);
215	215	}
216	216	else
217	217	{
r17961	r17962
225	225	// .... ..11 1111 1xx0
226	226	// Note that the value is inverted again on the board,
227	227	// so we can drop the inversion
228		wd17xx_w(m_controller, (offset >> 1)&0x03, data);
	228	wd17xx_w(m_controller, space, (offset >> 1)&0x03, data);
229	229	}
230	230	else
231	231	{

trunk/src/mess/machine/c64_currah_speech.c

r17961	r17962
264	264
265	265	set_osc1(voice, intonation);
266	266
267		sp0256_ALD_w(m_nsp, 0, data & 0x3f);
	267	sp0256_ALD_w(m_nsp, space, 0, data & 0x3f);
268	268	}
269	269	}

trunk/src/mess/machine/gb.c

r17961	r17962
238	238	break;
239	239	}
240	240
241		gb_sound_w(space->machine().device("custom"), 0x16, 0x00 );       /* Initialize sound hardware */
	241	gb_sound_w(space->machine().device("custom"), *space, 0x16, 0x00 );       /* Initialize sound hardware */
242	242
243	243	state->m_divcount = 0;
244	244	state->m_triggering_irq = 0;
r17961	r17962
340	340	gb_init_regs(machine());
341	341
342	342	/* Initialize the Sound registers */
343		gb_sound_w(machine().device("custom"), 0x16,0x80);
344		gb_sound_w(machine().device("custom"), 0x15,0xF3);
345		gb_sound_w(machine().device("custom"), 0x14,0x77);
	343	gb_sound_w(machine().device("custom"), generic_space(), 0x16,0x80);
	344	gb_sound_w(machine().device("custom"), generic_space(), 0x15,0xF3);
	345	gb_sound_w(machine().device("custom"), generic_space(), 0x14,0x77);
346	346
347	347	/* Enable BIOS rom if we have one */
348	348	gb_rom16_0000( machine(), m_ROMMap[m_ROMBank00] ? m_ROMMap[m_ROMBank00] : m_gb_dummy_rom_bank );
r17961	r17962
2100	2100
2101	2101	WRITE8_MEMBER(gb_state::megaduck_sound_w1)
2102	2102	{
2103		gb_sound_w(machine().device("custom"), megaduck_sound_offsets[offset], data );
	2103	gb_sound_w(machine().device("custom"), space, megaduck_sound_offsets[offset], data );
2104	2104	}
2105	2105
2106	2106	READ8_MEMBER(gb_state::megaduck_sound_r1)
2107	2107	{
2108		return gb_sound_r( machine().device("custom"), megaduck_sound_offsets[offset] );
	2108	return gb_sound_r( machine().device("custom"), space, megaduck_sound_offsets[offset] );
2109	2109	}
2110	2110
2111	2111	WRITE8_MEMBER(gb_state::megaduck_sound_w2)
2112	2112	{
2113	2113	switch(offset)
2114	2114	{
2115		case 0x00:   gb_sound_w(machine().device("custom"), 0x10, data );   break;
2116		case 0x01:   gb_sound_w(machine().device("custom"), 0x12, data );   break;
2117		case 0x02:   gb_sound_w(machine().device("custom"), 0x11, data );   break;
2118		case 0x03:   gb_sound_w(machine().device("custom"), 0x13, data );   break;
2119		case 0x04:   gb_sound_w(machine().device("custom"), 0x14, data );   break;
2120		case 0x05:   gb_sound_w(machine().device("custom"), 0x16, data );   break;
2121		case 0x06:   gb_sound_w(machine().device("custom"), 0x15, data );   break;
	2115	case 0x00:   gb_sound_w(machine().device("custom"), space, 0x10, data );   break;
	2116	case 0x01:   gb_sound_w(machine().device("custom"), space, 0x12, data );   break;
	2117	case 0x02:   gb_sound_w(machine().device("custom"), space, 0x11, data );   break;
	2118	case 0x03:   gb_sound_w(machine().device("custom"), space, 0x13, data );   break;
	2119	case 0x04:   gb_sound_w(machine().device("custom"), space, 0x14, data );   break;
	2120	case 0x05:   gb_sound_w(machine().device("custom"), space, 0x16, data );   break;
	2121	case 0x06:   gb_sound_w(machine().device("custom"), space, 0x15, data );   break;
2122	2122	case 0x07:
2123	2123	case 0x08:
2124	2124	case 0x09:
r17961	r17962
2134	2134
2135	2135	READ8_MEMBER(gb_state::megaduck_sound_r2)
2136	2136	{
2137		return gb_sound_r(machine().device("custom"), 0x10 + megaduck_sound_offsets[offset]);
	2137	return gb_sound_r(machine().device("custom"), space, 0x10 + megaduck_sound_offsets[offset]);
2138	2138	}
2139	2139
2140	2140	WRITE8_MEMBER(gb_state::megaduck_rom_bank_select_type1)

trunk/src/mess/machine/s100_dj2db.c

r17961	r17962
304	304	//  s100_smemr_r - memory read
305	305	//-------------------------------------------------
306	306
307		UINT8 s100_dj2db_device::s100_smemr_r(offs_t offset)
	307	UINT8 s100_dj2db_device::s100_smemr_r(address_space &space, offs_t offset)
308	308	{
309	309	UINT8 data = 0;
310	310
r17961	r17962
365	365	{
366	366	m_s100->rdy_w(ASSERT_LINE);
367	367
368		data = wd17xx_r(m_fdc, offset & 0x03);
	368	data = wd17xx_r(m_fdc, space, offset & 0x03);
369	369	}
370	370	else if ((offset >= 0xfc00) && (offset < 0x10000))
371	371	{
r17961	r17962
385	385	//  s100_mwrt_w - memory write
386	386	//-------------------------------------------------
387	387
388		void s100_dj2db_device::s100_mwrt_w(offs_t offset, UINT8 data)
	388	void s100_dj2db_device::s100_mwrt_w(address_space &space, offs_t offset, UINT8 data)
389	389	{
390	390	//  if (!(m_board_enbl & m_phantom)) return;
391	391
r17961	r17962
459	459	}
460	460	else if ((offset >= 0xfbfc) && (offset < 0xfc00))
461	461	{
462		wd17xx_w(m_fdc, offset & 0x03, data);
	462	wd17xx_w(m_fdc, space, offset & 0x03, data);
463	463	}
464	464	else if ((offset >= 0xfc00) && (offset < 0x10000))
465	465	{
r17961	r17962
472	472	//  s100_sinp_r - I/O read
473	473	//-------------------------------------------------
474	474
475		UINT8 s100_dj2db_device::s100_sinp_r(offs_t offset)
	475	UINT8 s100_dj2db_device::s100_sinp_r(address_space &space, offs_t offset)
476	476	{
477	477	return 0;
478	478	}
r17961	r17962
482	482	//  s100_sout_w - I/O write
483	483	//-------------------------------------------------
484	484
485		void s100_dj2db_device::s100_sout_w(offs_t offset, UINT8 data)
	485	void s100_dj2db_device::s100_sout_w(address_space &space, offs_t offset, UINT8 data)
486	486	{
487	487	if (offset == 0x41)
488	488	{

trunk/src/mess/machine/s100_dj2db.h

r17961	r17962
51	51	virtual void device_config_complete() { m_shortname = "dj2db"; }
52	52
53	53	// device_s100_card_interface overrides
54		virtual UINT8 s100_smemr_r(offs_t offset);
55		virtual void s100_mwrt_w(offs_t offset, UINT8 data);
56		virtual UINT8 s100_sinp_r(offs_t offset);
57		virtual void s100_sout_w(offs_t offset, UINT8 data);
	54	virtual UINT8 s100_smemr_r(address_space &space, offs_t offset);
	55	virtual void s100_mwrt_w(address_space &space, offs_t offset, UINT8 data);
	56	virtual UINT8 s100_sinp_r(address_space &space, offs_t offset);
	57	virtual void s100_sout_w(address_space &space, offs_t offset, UINT8 data);
58	58	virtual void s100_phantom_w(int state);
59	59	virtual bool s100_has_terminal() { return true; }
60	60	virtual void s100_terminal_w(UINT8 data);

trunk/src/mess/machine/aim65.c

r17961	r17962
47	47	dl1416_ce_w(device, state->m_pia_a & (0x04 << index));
48	48	dl1416_wr_w(device, BIT(state->m_pia_a, 7));
49	49	dl1416_cu_w(device, BIT(state->m_pia_b, 7));
50		dl1416_data_w(device, state->m_pia_a & 0x03, state->m_pia_b & 0x7f);
	50	dl1416_data_w(device, state->generic_space(), state->m_pia_a & 0x03, state->m_pia_b & 0x7f);
51	51	}
52	52
53	53	static void aim65_pia(running_machine &machine)

trunk/src/mess/machine/thomson.c

r17961	r17962
319	319	thom_set_irq  ( machine, 0, state );
320	320	}
321	321
322		static void thom_dev_irq_0  ( device_t *device, int state )
	322	static WRITE_LINE_DEVICE_HANDLER( thom_dev_irq_0 )
323	323	{
324	324	thom_irq_0( device->machine(), state );
325	325	}
r17961	r17962
543	543
544	544	const mc6846_interface to7_timer =
545	545	{
546		to7_timer_port_out, NULL, to7_timer_cp2_out,
547		to7_timer_port_in, to7_timer_tco_out,
548		thom_dev_irq_0
	546	DEVCB_HANDLER(to7_timer_port_out), DEVCB_NULL, DEVCB_HANDLER(to7_timer_cp2_out),
	547	DEVCB_HANDLER(to7_timer_port_in), DEVCB_HANDLER(to7_timer_tco_out),
	548	DEVCB_LINE(thom_dev_irq_0)
549	549	};
550	550
551	551
r17961	r17962
934	934	/* ------------  dispatch MODEM / speech extension ------------ */
935	935
936	936
937		const mea8000_interface to7_speech = { "speech", NULL };
	937	const mea8000_interface to7_speech = { "speech", DEVCB_NULL };
938	938
939	939
940	940	READ8_HANDLER ( to7_modem_mea8000_r )
r17961	r17962
947	947	if ( space->machine().root_device().ioport("mconfig")->read() & 1 )
948	948	{
949	949	device_t* device = space->machine().device("mea8000" );
950		return mea8000_r( device, offset );
	950	return mea8000_r( device, *space, offset );
951	951	}
952	952	else
953	953	{
r17961	r17962
967	967	if ( space->machine().root_device().ioport("mconfig")->read() & 1 )
968	968	{
969	969	device_t* device = space->machine().device("mea8000" );
970		mea8000_w( device, offset, data );
	970	mea8000_w( device, *space, offset, data );
971	971	}
972	972	else
973	973	{
r17961	r17962
1662	1662
1663	1663	const mc6846_interface to770_timer =
1664	1664	{
1665		to770_timer_port_out, NULL, to7_timer_cp2_out,
1666		to7_timer_port_in, to7_timer_tco_out,
1667		thom_dev_irq_0
	1665	DEVCB_HANDLER(to770_timer_port_out), DEVCB_NULL, DEVCB_HANDLER(to7_timer_cp2_out),
	1666	DEVCB_HANDLER(to7_timer_port_in), DEVCB_HANDLER(to7_timer_tco_out),
	1667	DEVCB_LINE(thom_dev_irq_0)
1668	1668	};
1669	1669
1670	1670
r17961	r17962
3104	3104
3105	3105	const mc6846_interface to9_timer =
3106	3106	{
3107		to9_timer_port_out, NULL, to7_timer_cp2_out,
3108		to7_timer_port_in, to7_timer_tco_out,
3109		thom_dev_irq_0
	3107	DEVCB_HANDLER(to9_timer_port_out), DEVCB_NULL, DEVCB_HANDLER(to7_timer_cp2_out),
	3108	DEVCB_HANDLER(to7_timer_port_in), DEVCB_HANDLER(to7_timer_tco_out),
	3109	DEVCB_LINE(thom_dev_irq_0)
3110	3110	};
3111	3111
3112	3112
r17961	r17962
4156	4156
4157	4157	const mc6846_interface to8_timer =
4158	4158	{
4159		to8_timer_port_out, NULL, to8_timer_cp2_out,
4160		to8_timer_port_in, to7_timer_tco_out,
4161		thom_dev_irq_0
	4159	DEVCB_HANDLER(to8_timer_port_out), DEVCB_NULL, DEVCB_HANDLER(to8_timer_cp2_out),
	4160	DEVCB_HANDLER(to8_timer_port_in), DEVCB_HANDLER(to7_timer_tco_out),
	4161	DEVCB_LINE(thom_dev_irq_0)
4162	4162	};
4163	4163
4164	4164
r17961	r17962
4345	4345
4346	4346	const mc6846_interface to9p_timer =
4347	4347	{
4348		to9p_timer_port_out, NULL, to8_timer_cp2_out,
4349		to9p_timer_port_in, to7_timer_tco_out,
4350		thom_dev_irq_0
	4348	DEVCB_HANDLER(to9p_timer_port_out), DEVCB_NULL, DEVCB_HANDLER(to8_timer_cp2_out),
	4349	DEVCB_HANDLER(to9p_timer_port_in), DEVCB_HANDLER(to7_timer_tco_out),
	4350	DEVCB_LINE(thom_dev_irq_0)
4351	4351	};
4352	4352
4353	4353

trunk/src/mess/machine/coco_fdc.c

r17961	r17962
346	346	switch(offset & 0xEF)
347	347	{
348	348	case 8:
349		result = wd17xx_status_r(m_wd17xx, 0);
	349	result = wd17xx_status_r(m_wd17xx, space, 0);
350	350	break;
351	351	case 9:
352		result = wd17xx_track_r(m_wd17xx, 0);
	352	result = wd17xx_track_r(m_wd17xx, space, 0);
353	353	break;
354	354	case 10:
355		result = wd17xx_sector_r(m_wd17xx, 0);
	355	result = wd17xx_sector_r(m_wd17xx, space, 0);
356	356	break;
357	357	case 11:
358		result = wd17xx_data_r(m_wd17xx, 0);
	358	result = wd17xx_data_r(m_wd17xx, space, 0);
359	359	break;
360	360	}
361	361
r17961	r17962
369	369
370	370	case 0x38:   /* FF78 */
371	371	if (real_time_clock() == RTC_CLOUD9)
372		ds1315_r_0(m_ds1315, offset);
	372	ds1315_r_0(m_ds1315, space, offset);
373	373	break;
374	374
375	375	case 0x39:   /* FF79 */
376	376	if (real_time_clock() == RTC_CLOUD9)
377		ds1315_r_1(m_ds1315, offset);
	377	ds1315_r_1(m_ds1315, space, offset);
378	378	break;
379	379
380	380	case 0x3C:   /* FF7C */
381	381	if (real_time_clock() == RTC_CLOUD9)
382		result = ds1315_r_data(m_ds1315, offset);
	382	result = ds1315_r_data(m_ds1315, space, offset);
383	383	break;
384	384	}
385	385	return result;
r17961	r17962
400	400	dskreg_w(data);
401	401	break;
402	402	case 8:
403		wd17xx_command_w(m_wd17xx, 0, data);
	403	wd17xx_command_w(m_wd17xx, space, 0, data);
404	404	break;
405	405	case 9:
406		wd17xx_track_w(m_wd17xx, 0, data);
	406	wd17xx_track_w(m_wd17xx, space, 0, data);
407	407	break;
408	408	case 10:
409		wd17xx_sector_w(m_wd17xx, 0, data);
	409	wd17xx_sector_w(m_wd17xx, space, 0, data);
410	410	break;
411	411	case 11:
412		wd17xx_data_w(m_wd17xx, 0, data);
	412	wd17xx_data_w(m_wd17xx, space, 0, data);
413	413	break;
414	414	};
415	415
r17961	r17962
560	560	switch(offset & 0xEF)
561	561	{
562	562	case 0:
563		result = wd17xx_status_r(m_wd17xx, 0);
	563	result = wd17xx_status_r(m_wd17xx, space, 0);
564	564	break;
565	565	case 1:
566		result = wd17xx_track_r(m_wd17xx, 0);
	566	result = wd17xx_track_r(m_wd17xx, space, 0);
567	567	break;
568	568	case 2:
569		result = wd17xx_sector_r(m_wd17xx, 0);
	569	result = wd17xx_sector_r(m_wd17xx, space, 0);
570	570	break;
571	571	case 3:
572		result = wd17xx_data_r(m_wd17xx, 0);
	572	result = wd17xx_data_r(m_wd17xx, space, 0);
573	573	break;
574	574	}
575	575	return result;
r17961	r17962
586	586	switch(offset & 0xEF)
587	587	{
588	588	case 0:
589		wd17xx_command_w(m_wd17xx, 0, data);
	589	wd17xx_command_w(m_wd17xx, space, 0, data);
590	590
591	591	/* disk head is encoded in the command byte */
592	592	/* Only for type 3 & 4 commands */
r17961	r17962
594	594	wd17xx_set_side(m_wd17xx, (data & 0x02) ? 1 : 0);
595	595	break;
596	596	case 1:
597		wd17xx_track_w(m_wd17xx, 0, data);
	597	wd17xx_track_w(m_wd17xx, space, 0, data);
598	598	break;
599	599	case 2:
600		wd17xx_sector_w(m_wd17xx, 0, data);
	600	wd17xx_sector_w(m_wd17xx, space, 0, data);
601	601	break;
602	602	case 3:
603		wd17xx_data_w(m_wd17xx, 0, data);
	603	wd17xx_data_w(m_wd17xx, space, 0, data);
604	604	break;
605	605	case 8: case 9: case 10: case 11:
606	606	case 12: case 13: case 14: case 15:

trunk/src/mess/machine/c128.c

r17961	r17962
126	126
127	127	READ8_MEMBER( c128_state::cia1_pa_r )
128	128	{
129		UINT8 cia0portb = mos6526_pb_r(m_cia1, 0);
	129	UINT8 cia0portb = mos6526_pb_r(m_cia1, space, 0);
130	130
131	131	return cbm_common_cia0_port_a_r(m_cia1, cia0portb);
132	132	}
r17961	r17962
134	134	READ8_MEMBER( c128_state::cia1_pb_r )
135	135	{
136	136	UINT8 value = 0xff;
137		UINT8 cia0porta = mos6526_pa_r(m_cia1, 0);
	137	UINT8 cia0porta = mos6526_pa_r(m_cia1, space, 0);
138	138	//vic2e_device_interface *intf = dynamic_cast<vic2e_device_interface*>(&m_vic);
139	139
140	140	value &= cbm_common_cia0_port_b_r(m_cia1, cia0porta);
r17961	r17962
370	370	m_colorram[(offset & 0x3ff)|((c64_port6510&3)<<10)] = data | 0xf0; // maybe all 8 bit connected!
371	371	break;
372	372	case 0xc:
373		mos6526_w(m_cia1, offset, data);
	373	mos6526_w(m_cia1, space, offset, data);
374	374	break;
375	375	case 0xd:
376		mos6526_w(m_cia2, offset, data);
	376	mos6526_w(m_cia2, space, offset, data);
377	377	break;
378	378	case 0xf:
379	379	dma8726_port_w(space, offset&0xff,data);
r17961	r17962
405	405	else if (offset == 0xc00)
406	406	{
407	407	cia_set_port_mask_value(m_cia1, 0, ioport("CTRLSEL")->read() & 0x80 ? c64_keyline[8] : c64_keyline[9] );
408		return mos6526_r(m_cia1, offset);
	408	return mos6526_r(m_cia1, space, offset);
409	409	}
410	410	else if (offset == 0xc01)
411	411	{
412	412	cia_set_port_mask_value(m_cia1, 1, ioport("CTRLSEL")->read() & 0x80 ? c64_keyline[9] : c64_keyline[8] );
413		return mos6526_r(m_cia1, offset);
	413	return mos6526_r(m_cia1, space, offset);
414	414	}
415	415	else if (offset < 0xd00)
416		return mos6526_r(m_cia1, offset);
	416	return mos6526_r(m_cia1, space, offset);
417	417	else if (offset < 0xe00)
418		return mos6526_r(m_cia2, offset);
	418	return mos6526_r(m_cia2, space, offset);
419	419	else if ((offset >= 0xf00) & (offset <= 0xfff))
420	420	return dma8726_port_r(space, offset&0xff);
421	421	DBG_LOG(machine(), 1, "io read", ("%.3x\n", offset));

trunk/src/mess/machine/thomflop.c

r17961	r17962
276	276	device_t *fdc = space->machine().device("wd2793");
277	277
278	278	if ( offset < 4 )
279		return wd17xx_r( fdc, offset );
	279	return wd17xx_r( fdc, *space, offset );
280	280	else if ( offset == 8 )
281	281	return to7_5p14_select;
282	282	else
r17961	r17962
290	290	{
291	291	device_t *fdc = space->machine().device("wd2793");
292	292	if ( offset < 4 )
293		wd17xx_w( fdc, offset, data );
	293	wd17xx_w( fdc, *space, offset, data );
294	294	else if ( offset == 8 )
295	295	{
296	296	/* drive select */
r17961	r17962
362	362	static READ8_HANDLER ( to7_5p14sd_r )
363	363	{
364	364	if ( offset < 8 )
365		return mc6843_r( space->machine().device("mc6843"), offset );
	365	return mc6843_r( space->machine().device("mc6843"), *space, offset );
366	366	else if ( offset >= 8 && offset <= 9 )
367	367	return to7_5p14sd_select;
368	368	else
r17961	r17962
375	375	static WRITE8_HANDLER( to7_5p14sd_w )
376	376	{
377	377	if ( offset < 8 )
378		mc6843_w( space->machine().device("mc6843"), offset, data );
	378	mc6843_w( space->machine().device("mc6843"), *space, offset, data );
379	379	else if ( offset >= 8 && offset <= 9 )
380	380	{
381	381	/* drive select */
r17961	r17962
1715	1715	static READ8_HANDLER ( to7_network_r )
1716	1716	{
1717	1717	if ( offset < 4 )
1718		return mc6854_r( space->machine().device("mc6854"), offset );
	1718	return mc6854_r( space->machine().device("mc6854"), *space, offset );
1719	1719
1720	1720	if ( offset == 8 )
1721	1721	{
r17961	r17962
1734	1734	static WRITE8_HANDLER ( to7_network_w )
1735	1735	{
1736	1736	if ( offset < 4 )
1737		mc6854_w( space->machine().device("mc6854"), offset, data );
	1737	mc6854_w( space->machine().device("mc6854"), *space, offset, data );
1738	1738	else
1739	1739	{
1740	1740	logerror( "%f $%04x to7_network_w: invalid write offset %i (data=$%02X)\n",

trunk/src/mess/machine/oric.c

r17961	r17962
137	137	static READ8_DEVICE_HANDLER ( oric_via_in_a_func )
138	138	{
139	139	oric_state *state = device->machine().driver_data<oric_state>();
140		address_space *space = device->machine().device( "maincpu")->memory().space( AS_PROGRAM );
141	140
142	141	/*logerror("port a read\r\n"); */
143	142
r17961	r17962
146	145	{
147	146	/* if psg is in read register state return reg data */
148	147	if (state->m_psg_control==0x01)
149		return ay8910_r(space->machine().device("ay8912"), 0);
	148	return ay8910_r(space.machine().device("ay8912"), space, 0);
150	149
151	150	/* return high-impedance */
152	151	return 0x0ff;
r17961	r17962
171	170
172	171
173	172	/* read/write data depending on state of bdir, bc1 pins and data output to psg */
174		static void oric_psg_connection_refresh(running_machine &machine)
	173	static void oric_psg_connection_refresh(address_space &space)
175	174	{
176		oric_state *state = machine.driver_data<oric_state>();
	175	oric_state *state = space.machine().driver_data<oric_state>();
177	176	if (state->m_psg_control!=0)
178	177	{
179	178	switch (state->m_psg_control)
r17961	r17962
190	189	/* write register data */
191	190	case 2:
192	191	{
193		device_t *ay8912 = machine.device("ay8912");
194		ay8910_data_w(ay8912, 0, state->m_via_port_a_data);
	192	device_t *ay8912 = space.machine().device("ay8912");
	193	ay8910_data_w(ay8912, space, 0, state->m_via_port_a_data);
195	194	}
196	195	break;
197	196	/* write register index */
198	197	case 3:
199	198	{
200		device_t *ay8912 = machine.device("ay8912");
201		ay8910_address_w(ay8912, 0, state->m_via_port_a_data);
	199	device_t *ay8912 = space.machine().device("ay8912");
	200	ay8910_address_w(ay8912, space, 0, state->m_via_port_a_data);
202	201	}
203	202	break;
204	203
r17961	r17962
215	214	oric_state *state = device->machine().driver_data<oric_state>();
216	215	state->m_via_port_a_data = data;
217	216
218		oric_psg_connection_refresh(device->machine());
	217	oric_psg_connection_refresh(space);
219	218
220	219
221	220	if (state->m_psg_control==0)
r17961	r17962
302	301	/* centronics STROBE is connected to PB4 */
303	302	centronics->strobe_w(BIT(data, 4));
304	303
305		oric_psg_connection_refresh(device->machine());
	304	oric_psg_connection_refresh(space);
306	305	state->m_previous_portb_data = data;
307	306	}
308	307
r17961	r17962
327	326	if (data)
328	327	state->m_psg_control |=1;
329	328
330		oric_psg_connection_refresh(device->machine());
	329	oric_psg_connection_refresh(space);
331	330	}
332	331
333	332	static WRITE8_DEVICE_HANDLER ( oric_via_out_cb2_func )
r17961	r17962
338	337	if (data)
339	338	state->m_psg_control |=2;
340	339
341		oric_psg_connection_refresh(device->machine());
	340	oric_psg_connection_refresh(space);
342	341	}
343	342
344	343
r17961	r17962
680	679	{
681	680	/* jasmin floppy disc interface */
682	681	case 0x04:
683		data = wd17xx_status_r(fdc, 0);
	682	data = wd17xx_status_r(fdc, space, 0);
684	683	break;
685	684	case 0x05:
686		data =wd17xx_track_r(fdc, 0);
	685	data =wd17xx_track_r(fdc, space, 0);
687	686	break;
688	687	case 0x06:
689		data = wd17xx_sector_r(fdc, 0);
	688	data = wd17xx_sector_r(fdc, space, 0);
690	689	break;
691	690	case 0x07:
692		data = wd17xx_data_r(fdc, 0);
	691	data = wd17xx_data_r(fdc, space, 0);
693	692	break;
694	693	default:
695	694	data = via_0->read(space,offset & 0x0f);
r17961	r17962
709	708	{
710	709	/* microdisc floppy disc interface */
711	710	case 0x04:
712		wd17xx_command_w(fdc, 0, data);
	711	wd17xx_command_w(fdc, space, 0, data);
713	712	break;
714	713	case 0x05:
715		wd17xx_track_w(fdc, 0, data);
	714	wd17xx_track_w(fdc, space, 0, data);
716	715	break;
717	716	case 0x06:
718		wd17xx_sector_w(fdc, 0, data);
	717	wd17xx_sector_w(fdc, space, 0, data);
719	718	break;
720	719	case 0x07:
721		wd17xx_data_w(fdc, 0, data);
	720	wd17xx_data_w(fdc, space, 0, data);
722	721	break;
723	722	/* bit 0 = side */
724	723	case 0x08:
r17961	r17962
898	897	{
899	898	/* microdisc floppy disc interface */
900	899	case 0x00:
901		data = wd17xx_status_r(fdc, 0);
	900	data = wd17xx_status_r(fdc, space, 0);
902	901	break;
903	902	case 0x01:
904		data =wd17xx_track_r(fdc, 0);
	903	data =wd17xx_track_r(fdc, space, 0);
905	904	break;
906	905	case 0x02:
907		data = wd17xx_sector_r(fdc, 0);
	906	data = wd17xx_sector_r(fdc, space, 0);
908	907	break;
909	908	case 0x03:
910		data = wd17xx_data_r(fdc, 0);
	909	data = wd17xx_data_r(fdc, space, 0);
911	910	break;
912	911	case 0x04:
913	912	data = m_port_314_r | 0x07f;
r17961	r17962
937	936	{
938	937	/* microdisc floppy disc interface */
939	938	case 0x00:
940		wd17xx_command_w(fdc, 0, data);
	939	wd17xx_command_w(fdc, space, 0, data);
941	940	break;
942	941	case 0x01:
943		wd17xx_track_w(fdc, 0, data);
	942	wd17xx_track_w(fdc, space, 0, data);
944	943	break;
945	944	case 0x02:
946		wd17xx_sector_w(fdc, 0, data);
	945	wd17xx_sector_w(fdc, space, 0, data);
947	946	break;
948	947	case 0x03:
949		wd17xx_data_w(fdc, 0, data);
	948	wd17xx_data_w(fdc, space, 0, data);
950	949	break;
951	950	case 0x04:
952	951	{

trunk/src/mess/machine/osborne1.c

r17961	r17962
47	47	switch( offset & 0x0F00 )
48	48	{
49	49	case 0x100:   /* Floppy */
50		data = wd17xx_r( m_fdc, offset );
	50	data = wd17xx_r( m_fdc, space, offset );
51	51	break;
52	52	case 0x200:   /* Keyboard */
53	53	/* Row 0 */
r17961	r17962
96	96	switch( offset & 0x0F00 )
97	97	{
98	98	case 0x100:   /* Floppy */
99		wd17xx_w( m_fdc, offset, data );
	99	wd17xx_w( m_fdc, space, offset, data );
100	100	break;
101	101	case 0x900:   /* IEEE488 PIA */
102	102	m_pia0->write(space, offset & 0x03, data );

trunk/src/mess/machine/amstrad.c

r17961	r17962
518	518	case 0x0000:  // Load PSG register
519	519	{
520	520	device_t *ay8910 = state->m_ay;
521		ay8910_address_w(ay8910, 0, (command & 0x0f00) >> 8);
522		ay8910_data_w(ay8910, 0, command & 0x00ff);
523		ay8910_address_w(ay8910, 0, state->m_prev_reg);
	521	ay8910_address_w(ay8910, state->generic_space(), 0, (command & 0x0f00) >> 8);
	522	ay8910_data_w(ay8910, state->generic_space(), 0, command & 0x00ff);
	523	ay8910_address_w(ay8910, state->generic_space(), 0, state->m_prev_reg);
524	524	}
525	525	logerror("DMA %i: LOAD %i, %i\n",channel,(command & 0x0f00) >> 8, command & 0x00ff);
526	526	break;
r17961	r17962
1960	1960	switch (b8b0)
1961	1961	{
1962	1962	case 0x02:
1963		data = upd765_status_r(fdc, 0);
	1963	data = upd765_status_r(fdc, space, 0);
1964	1964	break;
1965	1965	case 0x03:
1966		data = upd765_data_r(fdc, 0);
	1966	data = upd765_data_r(fdc, space, 0);
1967	1967	break;
1968	1968	default:
1969	1969	break;
r17961	r17962
2138	2138	break;
2139	2139
2140	2140	case 0x03: /* Write Data register of FDC */
2141		upd765_data_w(fdc, 0,data);
	2141	upd765_data_w(fdc, space, 0,data);
2142	2142	break;
2143	2143
2144	2144	default:
r17961	r17962
2175	2175	static void amstrad_handle_snapshot(running_machine &machine, unsigned char *pSnapshot)
2176	2176	{
2177	2177	amstrad_state *state = machine.driver_data<amstrad_state>();
2178		address_space* space = state->m_maincpu->space(AS_PROGRAM);
	2178	address_space &space = *state->m_maincpu->space(AS_PROGRAM);
2179	2179	mc6845_device *mc6845 = state->m_crtc;
2180	2180	device_t *ay8910 = state->m_ay;
2181	2181	int RegData;
r17961	r17962
2265	2265	/* init CRTC */
2266	2266	for (i=0; i<18; i++)
2267	2267	{
2268		mc6845->address_w( *space, 0, i );
2269		mc6845->register_w( *space, 0, pSnapshot[0x043+i] & 0xff );
	2268	mc6845->address_w( space, 0, i );
	2269	mc6845->register_w( space, 0, pSnapshot[0x043+i] & 0xff );
2270	2270	}
2271	2271
2272		mc6845->address_w( *space, 0, i );
	2272	mc6845->address_w( space, 0, i );
2273	2273
2274	2274	/* upper rom selection */
2275	2275	state->m_gate_array.upper_bank = pSnapshot[0x055];
2276	2276
2277	2277	/* PPI */
2278		state->m_ppi->write(*space, 3, pSnapshot[0x059] & 0x0ff);
	2278	state->m_ppi->write(space, 3, pSnapshot[0x059] & 0x0ff);
2279	2279
2280		state->m_ppi->write(*space, 0, pSnapshot[0x056] & 0x0ff);
2281		state->m_ppi->write(*space, 1, pSnapshot[0x057] & 0x0ff);
2282		state->m_ppi->write(*space, 2, pSnapshot[0x058] & 0x0ff);
	2280	state->m_ppi->write(space, 0, pSnapshot[0x056] & 0x0ff);
	2281	state->m_ppi->write(space, 1, pSnapshot[0x057] & 0x0ff);
	2282	state->m_ppi->write(space, 2, pSnapshot[0x058] & 0x0ff);
2283	2283
2284	2284	/* PSG */
2285	2285	for (i=0; i<16; i++)
2286	2286	{
2287		ay8910_address_w(ay8910, 0, i);
2288		ay8910_data_w(ay8910, 0, pSnapshot[0x05b + i] & 0x0ff);
	2287	ay8910_address_w(ay8910, space, 0, i);
	2288	ay8910_data_w(ay8910, space, 0, pSnapshot[0x05b + i] & 0x0ff);
2289	2289	}
2290	2290
2291		ay8910_address_w(ay8910, 0, pSnapshot[0x05a]);
	2291	ay8910_address_w(ay8910, space, 0, pSnapshot[0x05a]);
2292	2292
2293	2293	{
2294	2294	int MemSize;
r17961	r17962
2458	2458	static void update_psg(running_machine &machine)
2459	2459	{
2460	2460	amstrad_state *state = machine.driver_data<amstrad_state>();
2461		address_space *space = state->m_maincpu->space(AS_PROGRAM);
	2461	address_space &space = *state->m_maincpu->space(AS_PROGRAM);
2462	2462	device_t *ay8910 = state->m_ay;
2463	2463	mc146818_device *rtc = state->m_rtc;
2464	2464
r17961	r17962
2467	2467	switch(state->m_aleste_rtc_function)
2468	2468	{
2469	2469	case 0x02:  // AS
2470		rtc->write(*space, 0,state->m_ppi_port_outputs[amstrad_ppi_PortA]);
	2470	rtc->write(space, 0,state->m_ppi_port_outputs[amstrad_ppi_PortA]);
2471	2471	break;
2472	2472	case 0x04:  // DS write
2473		rtc->write(*space, 1,state->m_ppi_port_outputs[amstrad_ppi_PortA]);
	2473	rtc->write(space, 1,state->m_ppi_port_outputs[amstrad_ppi_PortA]);
2474	2474	break;
2475	2475	case 0x05:  // DS read
2476		state->m_ppi_port_inputs[amstrad_ppi_PortA] = rtc->read(*space, 1);
	2476	state->m_ppi_port_inputs[amstrad_ppi_PortA] = rtc->read(space, 1);
2477	2477	break;
2478	2478	}
2479	2479	return;
r17961	r17962
2485	2485	} break;
2486	2486	case 1:
2487	2487	{/* b6 = 1 ? : Read from selected PSG register and make the register data available to PPI Port A */
2488		state->m_ppi_port_inputs[amstrad_ppi_PortA] = ay8910_r(ay8910, 0);
	2488	state->m_ppi_port_inputs[amstrad_ppi_PortA] = ay8910_r(ay8910, space, 0);
2489	2489	}
2490	2490	break;
2491	2491	case 2:
2492	2492	{/* b7 = 1 ? : Write to selected PSG register and write data to PPI Port A */
2493		ay8910_data_w(ay8910, 0, state->m_ppi_port_outputs[amstrad_ppi_PortA]);
	2493	ay8910_data_w(ay8910, space, 0, state->m_ppi_port_outputs[amstrad_ppi_PortA]);
2494	2494	}
2495	2495	break;
2496	2496	case 3:
2497	2497	{/* b6 and b7 = 1 ? : The register will now be selected and the user can read from or write to it.  The register will remain selected until another is chosen.*/
2498		ay8910_address_w(ay8910, 0, state->m_ppi_port_outputs[amstrad_ppi_PortA]);
	2498	ay8910_address_w(ay8910, space, 0, state->m_ppi_port_outputs[amstrad_ppi_PortA]);
2499	2499	state->m_prev_reg = state->m_ppi_port_outputs[amstrad_ppi_PortA];
2500	2500	}
2501	2501	break;
r17961	r17962
2832	2832	static void amstrad_common_init(running_machine &machine)
2833	2833	{
2834	2834	amstrad_state *state = machine.driver_data<amstrad_state>();
2835		address_space *space = state->m_maincpu->space(AS_PROGRAM);
	2835	address_space &space = *state->m_maincpu->space(AS_PROGRAM);
2836	2836	device_t* romexp;
2837	2837	rom_image_device* romimage;
2838	2838	char str[20];
r17961	r17962
2846	2846	state->m_GateArray_RamConfiguration = 0;
2847	2847	state->m_gate_array.hsync_counter = 2;
2848	2848
2849		space->install_read_bank(0x0000, 0x1fff, "bank1");
2850		space->install_read_bank(0x2000, 0x3fff, "bank2");
	2849	space.install_read_bank(0x0000, 0x1fff, "bank1");
	2850	space.install_read_bank(0x2000, 0x3fff, "bank2");
2851	2851
2852		space->install_read_bank(0x4000, 0x5fff, "bank3");
2853		space->install_read_bank(0x6000, 0x7fff, "bank4");
	2852	space.install_read_bank(0x4000, 0x5fff, "bank3");
	2853	space.install_read_bank(0x6000, 0x7fff, "bank4");
2854	2854
2855		space->install_read_bank(0x8000, 0x9fff, "bank5");
2856		space->install_read_bank(0xa000, 0xbfff, "bank6");
	2855	space.install_read_bank(0x8000, 0x9fff, "bank5");
	2856	space.install_read_bank(0xa000, 0xbfff, "bank6");
2857	2857
2858		space->install_read_bank(0xc000, 0xdfff, "bank7");
2859		space->install_read_bank(0xe000, 0xffff, "bank8");
	2858	space.install_read_bank(0xc000, 0xdfff, "bank7");
	2859	space.install_read_bank(0xe000, 0xffff, "bank8");
2860	2860
2861		space->install_write_bank(0x0000, 0x1fff, "bank9");
2862		space->install_write_bank(0x2000, 0x3fff, "bank10");
	2861	space.install_write_bank(0x0000, 0x1fff, "bank9");
	2862	space.install_write_bank(0x2000, 0x3fff, "bank10");
2863	2863
2864		space->install_write_bank(0x4000, 0x5fff, "bank11");
2865		space->install_write_bank(0x6000, 0x7fff, "bank12");
	2864	space.install_write_bank(0x4000, 0x5fff, "bank11");
	2865	space.install_write_bank(0x6000, 0x7fff, "bank12");
2866	2866
2867		space->install_write_bank(0x8000, 0x9fff, "bank13");
2868		space->install_write_bank(0xa000, 0xbfff, "bank14");
	2867	space.install_write_bank(0x8000, 0x9fff, "bank13");
	2868	space.install_write_bank(0xa000, 0xbfff, "bank14");
2869	2869
2870		space->install_write_bank(0xc000, 0xdfff, "bank15");
2871		space->install_write_bank(0xe000, 0xffff, "bank16");
	2870	space.install_write_bank(0xc000, 0xdfff, "bank15");
	2871	space.install_write_bank(0xe000, 0xffff, "bank16");
2872	2872
2873	2873	/* Set up ROMs, if we have an expansion device connected */
2874	2874	romexp = get_expansion_device(machine,"rom");
r17961	r17962
2977	2977
2978	2978	MACHINE_RESET_MEMBER(amstrad_state,plus)
2979	2979	{
2980		address_space *space = m_maincpu->space(AS_PROGRAM);
	2980	address_space &space = *m_maincpu->space(AS_PROGRAM);
2981	2981	int i;
2982	2982	UINT8 *rom = memregion("maincpu")->base();
2983	2983
r17961	r17962
3010	3010	AmstradCPC_GA_SetRamConfiguration(machine());
3011	3011	amstrad_GateArray_write(machine(), 0x081); // Epyx World of Sports requires upper ROM to be enabled by default
3012	3012
3013		space->install_read_handler(0x4000, 0x5fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_r),this));
3014		space->install_read_handler(0x6000, 0x7fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_r),this));
3015		space->install_write_handler(0x4000, 0x5fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_w),this));
3016		space->install_write_handler(0x6000, 0x7fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_w),this));
	3013	space.install_read_handler(0x4000, 0x5fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_r),this));
	3014	space.install_read_handler(0x6000, 0x7fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_r),this));
	3015	space.install_write_handler(0x4000, 0x5fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_w),this));
	3016	space.install_write_handler(0x6000, 0x7fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_w),this));
3017	3017
3018	3018	//  multiface_init();
3019	3019	machine().scheduler().timer_set( attotime::zero, FUNC(cb_set_resolution));
r17961	r17962
3027	3027
3028	3028	MACHINE_RESET_MEMBER(amstrad_state,gx4000)
3029	3029	{
3030		address_space *space = m_maincpu->space(AS_PROGRAM);
	3030	address_space &space = *m_maincpu->space(AS_PROGRAM);
3031	3031	int i;
3032	3032	UINT8 *rom = memregion("maincpu")->base();
3033	3033
r17961	r17962
3060	3060	AmstradCPC_GA_SetRamConfiguration(machine());
3061	3061	amstrad_GateArray_write(machine(), 0x081); // Epyx World of Sports requires upper ROM to be enabled by default
3062	3062	//  multiface_init();
3063		space->install_read_handler(0x4000, 0x5fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_r),this));
3064		space->install_read_handler(0x6000, 0x7fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_r),this));
3065		space->install_write_handler(0x4000, 0x5fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_w),this));
3066		space->install_write_handler(0x6000, 0x7fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_w),this));
	3063	space.install_read_handler(0x4000, 0x5fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_r),this));
	3064	space.install_read_handler(0x6000, 0x7fff, read8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_r),this));
	3065	space.install_write_handler(0x4000, 0x5fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_4000_w),this));
	3066	space.install_write_handler(0x6000, 0x7fff, write8_delegate(FUNC(amstrad_state::amstrad_plus_asic_6000_w),this));
3067	3067
3068	3068	machine().scheduler().timer_set( attotime::zero, FUNC(cb_set_resolution));
3069	3069	}

trunk/src/mess/machine/sms.c

r17961	r17962
859	859	{
860	860
861	861	if (m_has_fm)
862		ym2413_w(m_ym, 0, (data & 0x3f));
	862	ym2413_w(m_ym, space, 0, (data & 0x3f));
863	863	}
864	864
865	865
r17961	r17962
869	869	if (m_has_fm)
870	870	{
871	871	logerror("data_port_0_w %x %x\n", offset, data);
872		ym2413_w(m_ym, 1, data);
	872	ym2413_w(m_ym, space, 1, data);
873	873	}
874	874	}
875	875

trunk/src/mess/machine/nes_pcb.c

r17961	r17962
1901	1901	/* Send $5000-$5015 to the sound chip */
1902	1902	if ((offset >= 0xf00) && (offset <= 0xf15))
1903	1903	{
1904		nes_psg_w(state->m_sound, offset & 0x1f, data);
	1904	nes_psg_w(state->m_sound, *space, offset & 0x1f, data);
1905	1905	return;
1906	1906	}
1907	1907

trunk/src/mess/machine/odyssey2.c

r17961	r17962
100	100	if ( offset & 0x80 ) {
101	101	if ( data & 0x20 ) {
102	102	logerror("voice write %02X, data = %02X (p1 = %02X)\n", offset, data, m_p1 );
103		sp0256_ALD_w( machine().device("sp0256_speech"), 0, offset & 0x7F );
	103	sp0256_ALD_w( machine().device("sp0256_speech"), space, 0, offset & 0x7F );
104	104	} else {
105	105	/* TODO: Reset sp0256 in this case */
106	106	}

trunk/src/mess/machine/s100_mm65k16s.c

r17961	r17962
234	234	//  s100_smemr_r - memory read
235	235	//-------------------------------------------------
236	236
237		UINT8 s100_mm65k16s_device::s100_smemr_r(offs_t offset)
	237	UINT8 s100_mm65k16s_device::s100_smemr_r(address_space &space, offs_t offset)
238	238	{
239	239	UINT8 data = 0;
240	240
r17961	r17962
251	251	//  s100_mwrt_w - memory write
252	252	//-------------------------------------------------
253	253
254		void s100_mm65k16s_device::s100_mwrt_w(offs_t offset, UINT8 data)
	254	void s100_mm65k16s_device::s100_mwrt_w(address_space &space, offs_t offset, UINT8 data)
255	255	{
256	256	if (offset < 0xf800)
257	257	{

trunk/src/mess/machine/s100_mm65k16s.h

r17961	r17962
41	41	virtual void device_config_complete() { m_shortname = "mm65k16s"; }
42	42
43	43	// device_s100_card_interface overrides
44		virtual UINT8 s100_smemr_r(offs_t offset);
45		virtual void s100_mwrt_w(offs_t offset, UINT8 data);
	44	virtual UINT8 s100_smemr_r(address_space &space, offs_t offset);
	45	virtual void s100_mwrt_w(address_space &space, offs_t offset, UINT8 data);
46	46	virtual void s100_phantom_w(int state);
47	47
48	48	private:

trunk/src/mess/machine/v1050kb.c

r17961	r17962
417	417	output_set_led_value(0, BIT(data, 5));
418	418
419	419	// speaker output
420		discrete_sound_w(m_discrete, NODE_01, BIT(data, 6));
	420	discrete_sound_w(m_discrete, space, NODE_01, BIT(data, 6));
421	421
422	422	// serial output
423	423	m_so = BIT(data, 7);

trunk/src/mess/machine/compis.c

r17961	r17962
214	214	/* DMA acknowledge if iSBX-218A has DMA enabled */
215	215	if (ioport("DSW1")->read())
216	216	{
217		data = upd765_dack_r(m_fdc, 0);
	217	data = upd765_dack_r(m_fdc, space, 0);
218	218	}
219	219
220	220	return data;
r17961	r17962
225	225	switch(offset)
226	226	{
227	227	case 2:
228		upd765_data_w(m_fdc, 0, data);
	228	upd765_data_w(m_fdc, space, 0, data);
229	229	break;
230	230	default:
231	231	printf("FDC Unknown Port Write %04X = %04X\n", offset, data);
r17961	r17962
240	240	switch(offset)
241	241	{
242	242	case 0:
243		data = upd765_status_r(m_fdc, 0);
	243	data = upd765_status_r(m_fdc, space, 0);
244	244	break;
245	245	case 2:
246		data = upd765_data_r(m_fdc, 0);
	246	data = upd765_data_r(m_fdc, space, 0);
247	247	break;
248	248	default:
249	249	printf("FDC Unknown Port Read %04X\n", offset);
r17961	r17962
347	347
348	348	READ16_MEMBER( compis_state::compis_osp_pit_r )
349	349	{
350		return pit8253_r(m_8254, offset);
	350	return pit8253_r(m_8254, space, offset);
351	351	}
352	352
353	353	WRITE16_MEMBER( compis_state::compis_osp_pit_w )
354	354	{
355		pit8253_w(m_8254, offset, data);
	355	pit8253_w(m_8254, space, offset, data);
356	356	}
357	357
358	358

trunk/src/mess/machine/c1551.c

r17961	r17962
579	579
580	580	if (tpi1_selected(offset))
581	581	{
582		data = tpi6525_r(m_tpi1, offset & 0x07);
	582	data = tpi6525_r(m_tpi1, space, offset & 0x07);
583	583	}
584	584
585	585	return data;
r17961	r17962
594	594	{
595	595	if (tpi1_selected(offset))
596	596	{
597		tpi6525_w(m_tpi1, offset & 0x07, data);
	597	tpi6525_w(m_tpi1, space, offset & 0x07, data);
598	598	}
599	599
600	600	m_exp->cd_w(space, offset, data, ba, cs0, c1l, c2l, cs1, c1h, c2h);

trunk/src/mess/machine/mac.c

r17961	r17962
132	132	static int scan_keyboard(running_machine &machine);
133	133	static TIMER_CALLBACK(inquiry_timeout_func);
134	134	static void keyboard_receive(running_machine &machine, int val);
135		static READ8_DEVICE_HANDLER(mac_via_in_a);
136		static READ8_DEVICE_HANDLER(mac_via_in_b);
137		static READ8_DEVICE_HANDLER(mac_adb_via_in_cb2);
138		static WRITE8_DEVICE_HANDLER(mac_via_out_a);
139		static WRITE8_DEVICE_HANDLER(mac_via_out_b);
140		static WRITE8_DEVICE_HANDLER(mac_adb_via_out_cb2);
141		static WRITE8_DEVICE_HANDLER(mac_via_out_cb2);
142		static READ8_DEVICE_HANDLER(mac_via2_in_a);
143		static READ8_DEVICE_HANDLER(mac_via2_in_b);
144		static WRITE8_DEVICE_HANDLER(mac_via2_out_a);
145		static WRITE8_DEVICE_HANDLER(mac_via2_out_b);
	135	static DECLARE_READ8_DEVICE_HANDLER(mac_via_in_a);
	136	static DECLARE_READ8_DEVICE_HANDLER(mac_via_in_b);
	137	static DECLARE_READ8_DEVICE_HANDLER(mac_adb_via_in_cb2);
	138	static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_a);
	139	static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_b);
	140	static DECLARE_WRITE8_DEVICE_HANDLER(mac_adb_via_out_cb2);
	141	static DECLARE_WRITE8_DEVICE_HANDLER(mac_via_out_cb2);
	142	static DECLARE_READ8_DEVICE_HANDLER(mac_via2_in_a);
	143	static DECLARE_READ8_DEVICE_HANDLER(mac_via2_in_b);
	144	static DECLARE_WRITE8_DEVICE_HANDLER(mac_via2_out_a);
	145	static DECLARE_WRITE8_DEVICE_HANDLER(mac_via2_out_b);
146	146	static void mac_via_irq(device_t *device, int state);
147	147	static void mac_via2_irq(device_t *device, int state);
148	148	static offs_t mac_dasm_override(device_t &device, char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram, int options);
r17961	r17962
1155	1155	UINT16 result = 0;
1156	1156	device_t *fdc = space.machine().device("fdc");
1157	1157
1158		result = applefdc_r(fdc, (offset >> 8));
	1158	result = applefdc_r(fdc, space, (offset >> 8));
1159	1159
1160	1160	if (LOG_MAC_IWM)
1161	1161	printf("mac_iwm_r: offset=0x%08x mem_mask %04x = %02x (PC %x)\n", offset, mem_mask, result, m_maincpu->pc());
r17961	r17962
1171	1171	printf("mac_iwm_w: offset=0x%08x data=0x%04x mask %04x (PC=%x)\n", offset, data, mem_mask, m_maincpu->pc());
1172	1172
1173	1173	if (ACCESSING_BITS_0_7)
1174		applefdc_w(fdc, (offset >> 8), data & 0xff);
	1174	applefdc_w(fdc, space, (offset >> 8), data & 0xff);
1175	1175	else
1176		applefdc_w(fdc, (offset >> 8), data>>8);
	1176	applefdc_w(fdc, space, (offset >> 8), data>>8);
1177	1177	}
1178	1178
1179	1179	static READ8_DEVICE_HANDLER(mac_adb_via_in_cb2)

trunk/src/mess/machine/i8271.c

r17961	r17962
1496	1496	/* to be completed! */
1497	1497	READ8_DEVICE_HANDLER(i8271_dack_r)
1498	1498	{
1499		return i8271_data_r(device, offset);
	1499	return i8271_data_r(device, space, offset);
1500	1500	}
1501	1501
1502	1502	/* to be completed! */
1503	1503	WRITE8_DEVICE_HANDLER(i8271_dack_w)
1504	1504	{
1505		i8271_data_w(device, offset, data);
	1505	i8271_data_w(device, space, offset, data);
1506	1506	}
1507	1507
1508	1508	READ8_DEVICE_HANDLER(i8271_data_r)

trunk/src/mess/machine/i8271.h

r17961	r17962
46	46	/***************************************************************************
47	47	FUNCTION PROTOTYPES
48	48	***************************************************************************/
49		READ8_DEVICE_HANDLER (i8271_r);
50		WRITE8_DEVICE_HANDLER(i8271_w);
	49	DECLARE_READ8_DEVICE_HANDLER (i8271_r);
	50	DECLARE_WRITE8_DEVICE_HANDLER(i8271_w);
51	51
52		READ8_DEVICE_HANDLER (i8271_dack_r);
53		WRITE8_DEVICE_HANDLER(i8271_dack_w);
	52	DECLARE_READ8_DEVICE_HANDLER (i8271_dack_r);
	53	DECLARE_WRITE8_DEVICE_HANDLER(i8271_dack_w);
54	54
55		READ8_DEVICE_HANDLER (i8271_data_r);
56		WRITE8_DEVICE_HANDLER(i8271_data_w);
	55	DECLARE_READ8_DEVICE_HANDLER (i8271_data_r);
	56	DECLARE_WRITE8_DEVICE_HANDLER(i8271_data_w);
57	57
58	58
59	59	/***************************************************************************

trunk/src/mess/machine/amigacd.c

r17961	r17962
216	216	{
217	217	device_t *tpi = space->machine().device("tpi6525");
218	218	LOG(( "DMAC: PC=%08x - TPI6525 Read(%d)\n", space->device().safe_pc(), (offset - 0x58) ));
219		return tpi6525_r(tpi, offset - 0x58);
	219	return tpi6525_r(tpi, *space, offset - 0x58);
220	220	}
221	221	break;
222	222
r17961	r17962
343	343	{
344	344	device_t *tpi = space->machine().device("tpi6525");
345	345	LOG(( "DMAC: PC=%08x - TPI6525 Write(%d) - data = %04x\n", space->device().safe_pc(), (offset - 0x58), data ));
346		tpi6525_w(tpi, offset - 0x58, data);
	346	tpi6525_w(tpi, *space, offset - 0x58, data);
347	347	}
348	348	break;
349	349

trunk/src/mess/machine/amigacd.h

r17961	r17962
6	6	MACHINE_RESET( amigacd );
7	7
8	8	/* 6525tpi */
9		READ8_DEVICE_HANDLER( amigacd_tpi6525_portc_r );
10		WRITE8_DEVICE_HANDLER( amigacd_tpi6525_portb_w );
	9	DECLARE_READ8_DEVICE_HANDLER( amigacd_tpi6525_portc_r );
	10	DECLARE_WRITE8_DEVICE_HANDLER( amigacd_tpi6525_portb_w );
11	11	WRITE_LINE_DEVICE_HANDLER( amigacd_tpi6525_irq );
12	12
13	13

trunk/src/mess/machine/concept.c

r17961	r17962
39	39	/*static int ready;*/         /* ready line from monochip, role unknown */
40	40
41	41	/* Via */
42		static READ8_DEVICE_HANDLER(via_in_a);
43		static WRITE8_DEVICE_HANDLER(via_out_a);
44		static READ8_DEVICE_HANDLER(via_in_b);
45		static WRITE8_DEVICE_HANDLER(via_out_b);
46		static WRITE8_DEVICE_HANDLER(via_out_cb2);
	42	static DECLARE_READ8_DEVICE_HANDLER(via_in_a);
	43	static DECLARE_WRITE8_DEVICE_HANDLER(via_out_a);
	44	static DECLARE_READ8_DEVICE_HANDLER(via_in_b);
	45	static DECLARE_WRITE8_DEVICE_HANDLER(via_out_b);
	46	static DECLARE_WRITE8_DEVICE_HANDLER(via_out_cb2);
47	47	static void via_irq_func(device_t *device, int state);
48	48
49	49
r17961	r17962
312	312	/* calendar R/W */
313	313	VLOG(("concept_io_r: Calendar read at address 0x03%4.4x\n", offset << 1));
314	314	if (!m_clock_enable)
315		return mm58274c_r(machine().device("mm58274c"), m_clock_address);
	315	return mm58274c_r(machine().device("mm58274c"), space, m_clock_address);
316	316	break;
317	317
318	318	case 7:
r17961	r17962
454	454	/* calendar R/W */
455	455	LOG(("concept_io_w: Calendar written to at address 0x03%4.4x, data: 0x%4.4x\n", offset << 1, data));
456	456	if (!m_clock_enable)
457		mm58274c_w(machine().device("mm58274c"), m_clock_address, data & 0xf);
	457	mm58274c_w(machine().device("mm58274c"), space, m_clock_address, data & 0xf);
458	458	break;
459	459
460	460	case 7:
r17961	r17962
599	599
600	600	case 8:
601	601	/* FDC STATUS REG */
602		return wd17xx_status_r(fdc, offset);
	602	return wd17xx_status_r(fdc, *space, offset);
603	603
604	604	case 9:
605	605	/* FDC TRACK REG */
606		return wd17xx_track_r(fdc, offset);
	606	return wd17xx_track_r(fdc, *space, offset);
607	607
608	608	case 10:
609	609	/* FDC SECTOR REG */
610		return wd17xx_sector_r(fdc, offset);
	610	return wd17xx_sector_r(fdc, *space, offset);
611	611
612	612	case 11:
613	613	/* FDC DATA REG */
614		return wd17xx_data_r(fdc, offset);
	614	return wd17xx_data_r(fdc, *space, offset);
615	615	}
616	616
617	617	return 0;
r17961	r17962
640	640
641	641	case 8:
642	642	/* FDC COMMAMD REG */
643		wd17xx_command_w(fdc, offset, data);
	643	wd17xx_command_w(fdc, *space, offset, data);
644	644	break;
645	645
646	646	case 9:
647	647	/* FDC TRACK REG */
648		wd17xx_track_w(fdc, offset, data);
	648	wd17xx_track_w(fdc, *space, offset, data);
649	649	break;
650	650
651	651	case 10:
652	652	/* FDC SECTOR REG */
653		wd17xx_sector_w(fdc, offset, data);
	653	wd17xx_sector_w(fdc, *space, offset, data);
654	654	break;
655	655
656	656	case 11:
657	657	/* FDC DATA REG */
658		wd17xx_data_w(fdc, offset, data);
	658	wd17xx_data_w(fdc, *space, offset, data);
659	659	break;
660	660	}
661	661	}

trunk/src/mess/machine/upd7002.h

r17961	r17962
59	59
60	60	/* Standard handlers */
61	61
62		READ8_DEVICE_HANDLER ( uPD7002_EOC_r );
63		READ8_DEVICE_HANDLER ( uPD7002_r );
64		WRITE8_DEVICE_HANDLER ( uPD7002_w );
	62	DECLARE_READ8_DEVICE_HANDLER ( uPD7002_EOC_r );
	63	DECLARE_READ8_DEVICE_HANDLER ( uPD7002_r );
	64	DECLARE_WRITE8_DEVICE_HANDLER ( uPD7002_w );
65	65
66	66
67	67	/***************************************************************************

trunk/src/mess/machine/msx.c

r17961	r17962
655	655	if (m_opll_active)
656	656	{
657	657	if (offset == 1)
658		ym2413_w (m_ym, 1, data);
	658	ym2413_w (m_ym, space, 1, data);
659	659	else
660		ym2413_w (m_ym, 0, data);
	660	ym2413_w (m_ym, space, 0, data);
661	661	}
662	662	}
663	663

trunk/src/mess/machine/mz700.c

r17961	r17962
36	36	} while (0)
37	37
38	38
39		static READ8_DEVICE_HANDLER ( pio_port_b_r );
40		static READ8_DEVICE_HANDLER ( pio_port_c_r );
41		static WRITE8_DEVICE_HANDLER ( pio_port_a_w );
42		static WRITE8_DEVICE_HANDLER ( pio_port_c_w );
	39	static DECLARE_READ8_DEVICE_HANDLER ( pio_port_b_r );
	40	static DECLARE_READ8_DEVICE_HANDLER ( pio_port_c_r );
	41	static DECLARE_WRITE8_DEVICE_HANDLER ( pio_port_a_w );
	42	static DECLARE_WRITE8_DEVICE_HANDLER ( pio_port_c_w );
43	43
44	44	I8255_INTERFACE( mz700_ppi8255_interface )
45	45	{

trunk/src/mess/machine/lisa.c

r17961	r17962
91	91	a hard disk
92	92	*/
93	93
94		static READ8_DEVICE_HANDLER(COPS_via_in_b);
95		static WRITE8_DEVICE_HANDLER(COPS_via_out_a);
96		static WRITE8_DEVICE_HANDLER(COPS_via_out_b);
97		static WRITE8_DEVICE_HANDLER(COPS_via_out_ca2);
98		static WRITE8_DEVICE_HANDLER(COPS_via_out_cb2);
	94	static DECLARE_READ8_DEVICE_HANDLER(COPS_via_in_b);
	95	static DECLARE_WRITE8_DEVICE_HANDLER(COPS_via_out_a);
	96	static DECLARE_WRITE8_DEVICE_HANDLER(COPS_via_out_b);
	97	static DECLARE_WRITE8_DEVICE_HANDLER(COPS_via_out_ca2);
	98	static DECLARE_WRITE8_DEVICE_HANDLER(COPS_via_out_cb2);
99	99	static void COPS_via_irq_func(device_t *device, int val);
100		static READ8_DEVICE_HANDLER(parallel_via_in_b);
	100	static DECLARE_READ8_DEVICE_HANDLER(parallel_via_in_b);
101	101
102	102
103	103	const via6522_interface lisa_via6522_0_intf =
r17961	r17962
729	729	{
730	730	lisa_state *state = device->machine().driver_data<lisa_state>();
731	731	via6522_device *via_0 = device->machine().device<via6522_device>("via6522_0");
732		address_space *space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
733	732
734	733	/* pull-up */
735		data |= (~ via_0->read(*space,VIA_DDRA)) & 0x01;
	734	data |= (~ via_0->read(space,VIA_DDRA)) & 0x01;
736	735
737	736	if (data & 0x01)
738	737	{
r17961	r17962
1073	1072
1074	1073	{
1075	1074	via6522_device *via_0 = machine().device<via6522_device>("via6522_0");
1076		COPS_via_out_ca2(via_0, 0, 0);   /* VIA core forgets to do so */
	1075	COPS_via_out_ca2(via_0, generic_space(), 0, 0);   /* VIA core forgets to do so */
1077	1076	}
1078	1077
1079	1078	/* initialize floppy */
r17961	r17962
1256	1255	switch ((offset & 0x0030) >> 4)
1257	1256	{
1258	1257	case 0:   /* IWM */
1259		answer = applefdc_r(fdc, offset);
	1258	answer = applefdc_r(fdc, space, offset);
1260	1259	break;
1261	1260
1262	1261	case 1:   /* TTL glue */
r17961	r17962
1283	1282	switch ((offset & 0x0030) >> 4)
1284	1283	{
1285	1284	case 0:   /* IWM */
1286		applefdc_w(fdc, offset, data);
	1285	applefdc_w(fdc, space, offset, data);
1287	1286	break;
1288	1287
1289	1288	case 1:   /* TTL glue */

trunk/src/mess/machine/cgenie.c

r17961	r17962
19	19	#include "machine/ram.h"
20	20
21	21	#define AYWriteReg(chip,port,value) \
22		ay8910_address_w(ay8910, 0,port);  \
23		ay8910_data_w(ay8910, 0,value)
	22	ay8910_address_w(ay8910, *space, 0,port);  \
	23	ay8910_data_w(ay8910, *space, 0,value)
24	24
25	25	#define TAPE_HEADER "Colour Genie - Virtual Tape File"
26	26
r17961	r17962
336	336	/* If the floppy isn't emulated, return 0 */
337	337	if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
338	338	return 0;
339		return wd17xx_status_r(fdc, offset);
	339	return wd17xx_status_r(fdc, *space, offset);
340	340	}
341	341
342	342	READ8_HANDLER( cgenie_track_r )
r17961	r17962
345	345	/* If the floppy isn't emulated, return 0xff */
346	346	if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
347	347	return 0xff;
348		return wd17xx_track_r(fdc, offset);
	348	return wd17xx_track_r(fdc, *space, offset);
349	349	}
350	350
351	351	READ8_HANDLER( cgenie_sector_r )
r17961	r17962
354	354	/* If the floppy isn't emulated, return 0xff */
355	355	if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
356	356	return 0xff;
357		return wd17xx_sector_r(fdc, offset);
	357	return wd17xx_sector_r(fdc, *space, offset);
358	358	}
359	359
360	360	READ8_HANDLER(cgenie_data_r )
r17961	r17962
363	363	/* If the floppy isn't emulated, return 0xff */
364	364	if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
365	365	return 0xff;
366		return wd17xx_data_r(fdc, offset);
	366	return wd17xx_data_r(fdc, *space, offset);
367	367	}
368	368
369	369	WRITE8_HANDLER( cgenie_command_w )
r17961	r17962
372	372	/* If the floppy isn't emulated, return immediately */
373	373	if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
374	374	return;
375		wd17xx_command_w(fdc, offset, data);
	375	wd17xx_command_w(fdc, *space, offset, data);
376	376	}
377	377
378	378	WRITE8_HANDLER( cgenie_track_w )
r17961	r17962
381	381	/* If the floppy isn't emulated, ignore the write */
382	382	if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
383	383	return;
384		wd17xx_track_w(fdc, offset, data);
	384	wd17xx_track_w(fdc, *space, offset, data);
385	385	}
386	386
387	387	WRITE8_HANDLER( cgenie_sector_w )
r17961	r17962
390	390	/* If the floppy isn't emulated, ignore the write */
391	391	if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
392	392	return;
393		wd17xx_sector_w(fdc, offset, data);
	393	wd17xx_sector_w(fdc, *space, offset, data);
394	394	}
395	395
396	396	WRITE8_HANDLER( cgenie_data_w )
r17961	r17962
399	399	/* If the floppy isn't emulated, ignore the write */
400	400	if( (space->machine().root_device().ioport("DSW0")->read() & 0x80) == 0 )
401	401	return;
402		wd17xx_data_w(fdc, offset, data);
	402	wd17xx_data_w(fdc, *space, offset, data);
403	403	}
404	404
405	405	READ8_HANDLER( cgenie_irq_status_r )
r17961	r17962
614	614	{
615	615	cgenie_state *state = device->machine().driver_data<cgenie_state>();
616	616	state->m_control_port = data;
617		ay8910_address_w(device, offset, data);
	617	ay8910_address_w(device, space, offset, data);
618	618	}

trunk/src/mess/machine/super80.c

r17961	r17962
94	94	state->m_cass_data[1] = 0;
95	95	}
96	96
97		state->m_pio->port_b_write(pio_port_b_r(state->m_pio,0));
	97	state->m_pio->port_b_write(pio_port_b_r(state->m_pio,state->generic_space(),0,0xff));
98	98	}
99	99
100	100	/* after the first 4 bytes have been read from ROM, switch the ram back in */

trunk/src/mess/machine/beta.c

r17961	r17962
99	99	beta_disk_state *beta = get_safe_token(device);
100	100
101	101	if (beta->betadisk_active==1) {
102		return wd17xx_status_r(beta->wd179x, offset);
	102	return wd17xx_status_r(beta->wd179x, space, offset);
103	103	} else {
104	104	return 0xff;
105	105	}
r17961	r17962
110	110	beta_disk_state *beta = get_safe_token(device);
111	111
112	112	if (beta->betadisk_active==1) {
113		return wd17xx_track_r(beta->wd179x, offset);
	113	return wd17xx_track_r(beta->wd179x, space, offset);
114	114	} else {
115	115	return 0xff;
116	116	}
r17961	r17962
121	121	beta_disk_state *beta = get_safe_token(device);
122	122
123	123	if (beta->betadisk_active==1) {
124		return wd17xx_sector_r(beta->wd179x, offset);
	124	return wd17xx_sector_r(beta->wd179x, space, offset);
125	125	} else {
126	126	return 0xff;
127	127	}
r17961	r17962
133	133	beta_disk_state *beta = get_safe_token(device);
134	134
135	135	if (beta->betadisk_active==1) {
136		return wd17xx_data_r(beta->wd179x, offset);
	136	return wd17xx_data_r(beta->wd179x, space, offset);
137	137	} else {
138	138	return 0xff;
139	139	}
r17961	r17962
171	171	beta_disk_state *beta = get_safe_token(device);
172	172
173	173	if (beta->betadisk_active==1) {
174		wd17xx_command_w(beta->wd179x, offset, data);
	174	wd17xx_command_w(beta->wd179x, space, offset, data);
175	175	}
176	176	}
177	177
r17961	r17962
180	180	beta_disk_state *beta = get_safe_token(device);
181	181
182	182	if (beta->betadisk_active==1) {
183		wd17xx_track_w(beta->wd179x, offset, data);
	183	wd17xx_track_w(beta->wd179x, space, offset, data);
184	184	}
185	185	}
186	186
r17961	r17962
189	189	beta_disk_state *beta = get_safe_token(device);
190	190
191	191	if (beta->betadisk_active==1) {
192		wd17xx_sector_w(beta->wd179x, offset, data);
	192	wd17xx_sector_w(beta->wd179x, space, offset, data);
193	193	}
194	194	}
195	195
r17961	r17962
198	198	beta_disk_state *beta = get_safe_token(device);
199	199
200	200	if (beta->betadisk_active==1) {
201		wd17xx_data_w(beta->wd179x, offset, data);
	201	wd17xx_data_w(beta->wd179x, space, offset, data);
202	202	}
203	203	}
204	204

trunk/src/mess/machine/beta.h

r17961	r17962
47	47	#define MCFG_BETA_DISK_REMOVE(_tag)      \
48	48	MCFG_DEVICE_REMOVE(_tag)
49	49
50		READ8_DEVICE_HANDLER(betadisk_status_r);
51		READ8_DEVICE_HANDLER(betadisk_track_r);
52		READ8_DEVICE_HANDLER(betadisk_sector_r);
53		READ8_DEVICE_HANDLER(betadisk_data_r);
54		READ8_DEVICE_HANDLER(betadisk_state_r);
	50	DECLARE_READ8_DEVICE_HANDLER(betadisk_status_r);
	51	DECLARE_READ8_DEVICE_HANDLER(betadisk_track_r);
	52	DECLARE_READ8_DEVICE_HANDLER(betadisk_sector_r);
	53	DECLARE_READ8_DEVICE_HANDLER(betadisk_data_r);
	54	DECLARE_READ8_DEVICE_HANDLER(betadisk_state_r);
55	55
56		WRITE8_DEVICE_HANDLER(betadisk_param_w);
57		WRITE8_DEVICE_HANDLER(betadisk_command_w);
58		WRITE8_DEVICE_HANDLER(betadisk_track_w);
59		WRITE8_DEVICE_HANDLER(betadisk_sector_w);
60		WRITE8_DEVICE_HANDLER(betadisk_data_w);
	56	DECLARE_WRITE8_DEVICE_HANDLER(betadisk_param_w);
	57	DECLARE_WRITE8_DEVICE_HANDLER(betadisk_command_w);
	58	DECLARE_WRITE8_DEVICE_HANDLER(betadisk_track_w);
	59	DECLARE_WRITE8_DEVICE_HANDLER(betadisk_sector_w);
	60	DECLARE_WRITE8_DEVICE_HANDLER(betadisk_data_w);
61	61	#endif /* __BETA_H__ */

trunk/src/mess/machine/mbc55x.c

r17961	r17962
118	118
119	119	READ8_MEMBER(mbc55x_state::mbcpic8259_r)
120	120	{
121		return pic8259_r(m_pic, offset>>1);
	121	return pic8259_r(m_pic, space, offset>>1);
122	122	}
123	123
124	124	WRITE8_MEMBER(mbc55x_state::mbcpic8259_w)
125	125	{
126		pic8259_w(m_pic, offset>>1, data);
	126	pic8259_w(m_pic, space, offset>>1, data);
127	127	}
128	128
129	129	static IRQ_CALLBACK(mbc55x_irq_callback)
r17961	r17962
157	157
158	158	READ8_MEMBER(mbc55x_state::mbcpit8253_r)
159	159	{
160		return pit8253_r(m_pit, offset>>1);
	160	return pit8253_r(m_pit, space, offset>>1);
161	161	}
162	162
163	163	WRITE8_MEMBER(mbc55x_state::mbcpit8253_w)
164	164	{
165		pit8253_w(m_pit, offset>>1, data);
	165	pit8253_w(m_pit, space, offset>>1, data);
166	166	}
167	167
168	168	WRITE_LINE_MEMBER( mbc55x_state::pit8253_t2 )
r17961	r17962
187	187
188	188	READ8_MEMBER(mbc55x_state::mbc55x_disk_r)
189	189	{
190		return wd17xx_r(m_fdc, offset>>1);
	190	return wd17xx_r(m_fdc, space, offset>>1);
191	191	}
192	192
193	193	WRITE8_MEMBER(mbc55x_state::mbc55x_disk_w)
194	194	{
195		wd17xx_w(m_fdc, offset>>1, data);
	195	wd17xx_w(m_fdc, space, offset>>1, data);
196	196	}
197	197
198	198	WRITE_LINE_MEMBER( mbc55x_state::mbc55x_fdc_intrq_w )

trunk/src/mess/machine/ay31015.c

r17961	r17962
112	112	UINT16 tx_pulses;   // total pulses left
113	113	double tx_clock;
114	114	emu_timer *tx_timer;
	115
	116	devcb_resolved_read8   read_si;            /* SI - pin 20 - This will be called whenever the SI pin is sampled. Optional */
	117	devcb_resolved_write8   write_so;            /* SO - pin 25 - This will be called whenever data is put on the SO pin. Optional */
	118	devcb_resolved_write8   status_changed;         /* This will be called whenever one of the status pins may have changed. Optional */
115	119	};
116	120
117	121
r17961	r17962
148	152	{
149	153	ay31015_t   *ay31015 = get_safe_token( device );
150	154
151		if ( ay31015->config->read_si )
152		ay31015->pins[AY31015_SI] = (ay31015->config->read_si)( device, 0 ) ? 1 : 0;
	155	if ( !ay31015->read_si.isnull() )
	156	ay31015->pins[AY31015_SI] = ay31015->read_si( 0 ) ? 1 : 0;
153	157
154	158	return ay31015->pins[AY31015_SI];
155	159	}
r17961	r17962
161	165
162	166	ay31015->pins[AY31015_SO] = data ? 1 : 0;
163	167
164		if ( ay31015->config->write_so )
165		(ay31015->config->write_so)( device, 0, ay31015->pins[AY31015_SO] );
	168	if ( !ay31015->write_so.isnull() )
	169	ay31015->write_so( 0, ay31015->pins[AY31015_SO] );
166	170	}
167	171
168	172
r17961	r17962
197	201	}
198	202	status_pins_changed += ay31015_update_status_pin( ay31015, STATUS_EOC, AY31015_EOC );
199	203
200		if ( status_pins_changed && ay31015->config->status_changed )
	204	if ( status_pins_changed && !ay31015->status_changed.isnull() )
201	205	{
202		(ay31015->config->status_changed)( device, 0, status_pins_changed );
	206	ay31015->status_changed( 0, status_pins_changed );
203	207	}
204	208	}
205	209
r17961	r17962
693	697
694	698	ay31015->config = (const ay31015_config*)device->static_config();
695	699
	700	ay31015->read_si.resolve(ay31015->config->read_si_cb, *device);
	701	ay31015->write_so.resolve(ay31015->config->write_so_cb, *device);
	702	ay31015->status_changed.resolve(ay31015->config->status_changed_cb, *device);
	703
696	704	ay31015->tx_clock = ay31015->config->transmitter_clock;
697	705	ay31015->rx_clock = ay31015->config->receiver_clock;
698	706

trunk/src/mess/machine/ay31015.h

r17961	r17962
54	54	ay31015_type_t      type;               /* Type of chip */
55	55	double            transmitter_clock;      /* TCP - pin 40 */
56	56	double            receiver_clock;         /* RCP - pin 17 */
57		read8_device_func   read_si;            /* SI - pin 20 - This will be called whenever the SI pin is sampled. Optional */
58		write8_device_func   write_so;            /* SO - pin 25 - This will be called whenever data is put on the SO pin. Optional */
59		write8_device_func   status_changed;         /* This will be called whenever one of the status pins may have changed. Optional */
	57	devcb_read8         read_si_cb;            /* SI - pin 20 - This will be called whenever the SI pin is sampled. Optional */
	58	devcb_write8      write_so_cb;            /* SO - pin 25 - This will be called whenever data is put on the SO pin. Optional */
	59	devcb_write8      status_changed_cb;         /* This will be called whenever one of the status pins may have changed. Optional */
60	60	};
61	61
62	62

trunk/src/mess/machine/southbridge.c

r17961	r17962
467	467
468	468	READ8_MEMBER( southbridge_device::at_dma8237_2_r )
469	469	{
470		return i8237_r( m_dma8237_2, offset / 2);
	470	return i8237_r( m_dma8237_2, space, offset / 2);
471	471	}
472	472
473	473	WRITE8_MEMBER( southbridge_device::at_dma8237_2_w )
474	474	{
475		i8237_w( m_dma8237_2, offset / 2, data);
	475	i8237_w( m_dma8237_2, space, offset / 2, data);
476	476	}
477	477
478	478	READ8_MEMBER( southbridge_device::at_keybc_r )

trunk/src/mess/machine/apple1.c

r17961	r17962
54	54	static TIMER_CALLBACK(apple1_kbd_poll);
55	55	static TIMER_CALLBACK(apple1_kbd_strobe_end);
56	56
57		static READ8_DEVICE_HANDLER( apple1_pia0_kbdin );
58		static WRITE8_DEVICE_HANDLER( apple1_pia0_dspout );
59		static WRITE8_DEVICE_HANDLER( apple1_pia0_dsp_write_signal );
	57	static DECLARE_READ8_DEVICE_HANDLER( apple1_pia0_kbdin );
	58	static DECLARE_WRITE8_DEVICE_HANDLER( apple1_pia0_dspout );
	59	static DECLARE_WRITE8_DEVICE_HANDLER( apple1_pia0_dsp_write_signal );
60	60
61	61	static TIMER_CALLBACK(apple1_dsp_ready_start);
62	62	static TIMER_CALLBACK(apple1_dsp_ready_end);

trunk/src/mess/machine/iq151_disc2.c

r17961	r17962
130	130	void iq151_disc2_device::io_read(offs_t offset, UINT8 &data)
131	131	{
132	132	if (offset == 0xaa)
133		data = upd765_status_r(m_fdc, 0);
	133	data = upd765_status_r(m_fdc, machine().driver_data()->generic_space(), 0);
134	134	else if (offset == 0xab)
135		data = upd765_data_r(m_fdc, 0);
	135	data = upd765_data_r(m_fdc, machine().driver_data()->generic_space(), 0);
136	136	}
137	137
138	138	//-------------------------------------------------
r17961	r17962
142	142	void iq151_disc2_device::io_write(offs_t offset, UINT8 data)
143	143	{
144	144	if (offset == 0xab)
145		upd765_data_w(m_fdc, 0, data);
	145	upd765_data_w(m_fdc, machine().driver_data()->generic_space(), 0, data);
146	146	else if (offset == 0xac)
147	147	m_rom_enabled = (data == 0x01);
148	148	}

trunk/src/mess/machine/mc6843.h

r17961	r17962
49	49
50	50	/* ---------- functions ------------ */
51	51
52		extern READ8_DEVICE_HANDLER  ( mc6843_r );
53		extern WRITE8_DEVICE_HANDLER ( mc6843_w );
	52	extern DECLARE_READ8_DEVICE_HANDLER  ( mc6843_r );
	53	extern DECLARE_WRITE8_DEVICE_HANDLER ( mc6843_w );
54	54
55	55	extern void mc6843_set_drive ( device_t *device, int drive );
56	56	extern void mc6843_set_side  ( device_t *device, int side );

trunk/src/mess/machine/mm58274c.h

r17961	r17962
42	42	int   day1;      /* first day of week */
43	43	};
44	44
45		READ8_DEVICE_HANDLER ( mm58274c_r );
46		WRITE8_DEVICE_HANDLER( mm58274c_w );
	45	DECLARE_READ8_DEVICE_HANDLER ( mm58274c_r );
	46	DECLARE_WRITE8_DEVICE_HANDLER( mm58274c_w );
47	47
48	48	/***************************************************************************
49	49	DEVICE CONFIGURATION MACROS

trunk/src/mess/machine/mtx.c

r17961	r17962
118	118	{
119	119	mtx_state *state = device->machine().driver_data<mtx_state>();
120	120
121		sn76496_w(device, 0, state->m_sound_latch);
	121	sn76496_w(device, space, 0, state->m_sound_latch);
122	122
123	123	return 0xff;
124	124	}

trunk/src/mess/machine/lux10828.c

r17961	r17962
687	687
688	688	switch (offset & 0x03)
689	689	{
690		case 0: data = wd17xx_status_r(m_fdc, 0); break;
691		case 1: data = wd17xx_track_r(m_fdc, 0);  break;
692		case 2: data = wd17xx_sector_r(m_fdc, 0); break;
693		case 3: data = wd17xx_data_r(m_fdc, 0);   break;
	690	case 0: data = wd17xx_status_r(m_fdc, space, 0); break;
	691	case 1: data = wd17xx_track_r(m_fdc, space, 0);  break;
	692	case 2: data = wd17xx_sector_r(m_fdc, space, 0); break;
	693	case 3: data = wd17xx_data_r(m_fdc, space, 0);   break;
694	694	}
695	695
696	696	return data;
r17961	r17962
711	711
712	712	switch (offset & 0x03)
713	713	{
714		case 0: wd17xx_command_w(m_fdc, 0, data); break;
715		case 1: wd17xx_track_w(m_fdc, 0, data);   break;
716		case 2: wd17xx_sector_w(m_fdc, 0, data);  break;
717		case 3: wd17xx_data_w(m_fdc, 0, data);    break;
	714	case 0: wd17xx_command_w(m_fdc, space, 0, data); break;
	715	case 1: wd17xx_track_w(m_fdc, space, 0, data);   break;
	716	case 2: wd17xx_sector_w(m_fdc, space, 0, data);  break;
	717	case 3: wd17xx_data_w(m_fdc, space, 0, data);    break;
718	718	}
719	719	}
720	720

trunk/src/mess/machine/rmnimbus.c

r17961	r17962
67	67
68	68	#include "includes/rmnimbus.h"
69	69
70		static void sio_interrupt(device_t *device, int state);
71		//static WRITE8_DEVICE_HANDLER( sio_dtr_w );
72		static WRITE8_DEVICE_HANDLER( sio_serial_transmit );
73		static int sio_serial_receive( device_t *device, int channel );
	70	static WRITE_LINE_DEVICE_HANDLER( sio_interrupt );
	71	//static DECLARE_WRITE8_DEVICE_HANDLER( sio_dtr_w );
	72	static DECLARE_WRITE16_DEVICE_HANDLER( sio_serial_transmit );
	73	static DECLARE_READ16_DEVICE_HANDLER( sio_serial_receive );
74	74
75	75
76	76	/*-------------------------------------------------------------------------*/
r17961	r17962
113	113
114	114	const z80sio_interface nimbus_sio_intf =
115	115	{
116		sio_interrupt,         /* interrupt handler */
117		0, //sio_dtr_w,             /* DTR changed handler */
118		0,                  /* RTS changed handler */
119		0,                  /* BREAK changed handler */
120		sio_serial_transmit,   /* transmit handler */
121		sio_serial_receive      /* receive handler */
	116	DEVCB_LINE(sio_interrupt),         /* interrupt handler */
	117	DEVCB_NULL, //sio_dtr_w,             /* DTR changed handler */
	118	DEVCB_NULL,                  /* RTS changed handler */
	119	DEVCB_NULL,                  /* BREAK changed handler */
	120	DEVCB_HANDLER(sio_serial_transmit),   /* transmit handler */
	121	DEVCB_HANDLER(sio_serial_receive)      /* receive handler */
122	122	};
123	123
124	124	/* Floppy drives WD2793 */
r17961	r17962
2194	2194
2195	2195	/* Z80 SIO/2 */
2196	2196
2197		static void sio_interrupt(device_t *device, int state)
	2197	static WRITE_LINE_DEVICE_HANDLER( sio_interrupt )
2198	2198	{
2199	2199	rmnimbus_state *drvstate = device->machine().driver_data<rmnimbus_state>();
2200	2200	if(LOG_SIO)
r17961	r17962
2219	2219	}
2220	2220	#endif
2221	2221
2222		static WRITE8_DEVICE_HANDLER( sio_serial_transmit )
	2222	static WRITE16_DEVICE_HANDLER( sio_serial_transmit )
2223	2223	{
2224	2224	}
2225	2225
2226		static int sio_serial_receive( device_t *device, int channel )
	2226	static READ16_DEVICE_HANDLER( sio_serial_receive )
2227	2227	{
2228		if(channel==0)
	2228	if(offset==0)
2229	2229	{
2230	2230	return keyboard_queue_read(device->machine());
2231	2231	}
r17961	r17962
2320	2320	switch(offset*2)
2321	2321	{
2322	2322	case 0x08 :
2323		result = wd17xx_status_r(fdc, 0);
	2323	result = wd17xx_status_r(fdc, space, 0);
2324	2324	if (LOG_DISK_FDD) logerror("Disk status=%2.2X\n",result);
2325	2325	break;
2326	2326	case 0x0A :
2327		result = wd17xx_track_r(fdc, 0);
	2327	result = wd17xx_track_r(fdc, space, 0);
2328	2328	break;
2329	2329	case 0x0C :
2330		result = wd17xx_sector_r(fdc, 0);
	2330	result = wd17xx_sector_r(fdc, space, 0);
2331	2331	break;
2332	2332	case 0x0E :
2333		result = wd17xx_data_r(fdc, 0);
	2333	result = wd17xx_data_r(fdc, space, 0);
2334	2334	break;
2335	2335	case 0x10 :
2336	2336	m_nimbus_drives.reg410_in &= ~FDC_BITS_410;
r17961	r17962
2406	2406
2407	2407	break;
2408	2408	case 0x08 :
2409		wd17xx_command_w(fdc, 0, data);
	2409	wd17xx_command_w(fdc, space, 0, data);
2410	2410	break;
2411	2411	case 0x0A :
2412		wd17xx_track_w(fdc, 0, data);
	2412	wd17xx_track_w(fdc, space, 0, data);
2413	2413	break;
2414	2414	case 0x0C :
2415		wd17xx_sector_w(fdc, 0, data);
	2415	wd17xx_sector_w(fdc, space, 0, data);
2416	2416	break;
2417	2417	case 0x0E :
2418		wd17xx_data_w(fdc, 0, data);
	2418	wd17xx_data_w(fdc, space, 0, data);
2419	2419	break;
2420	2420	case 0x10 :
2421	2421	hdc_ctrl_write(machine(),data);
r17961	r17962
2774	2774	UINT8   result=0;
2775	2775
2776	2776	if ((offset*2)==0)
2777		result=ay8910_r(ay8910,0);
	2777	result=ay8910_r(ay8910,space, 0);
2778	2778
2779	2779	return result;
2780	2780	}
r17961	r17962
2789	2789
2790	2790	switch (offset*2)
2791	2791	{
2792		case 0x00   : ay8910_data_address_w(ay8910, 1, data); break;
2793		case 0x02   : ay8910_data_address_w(ay8910, 0, data); break;
	2792	case 0x00   : ay8910_data_address_w(ay8910, space, 1, data); break;
	2793	case 0x02   : ay8910_data_address_w(ay8910, space, 0, data); break;
2794	2794	}
2795	2795
2796	2796	}

trunk/src/mess/machine/isa_adlib.c

r17961	r17962
28	28	UINT8 retVal = 0xff;
29	29	switch(offset)
30	30	{
31		case 0 : retVal = ym3812_status_port_r( device, offset ); break;
	31	case 0 : retVal = ym3812_status_port_r( device, space, offset ); break;
32	32	}
33	33	return retVal;
34	34	}
r17961	r17962
37	37	{
38	38	switch(offset)
39	39	{
40		case 0 : ym3812_control_port_w( device, offset, data ); break;
41		case 1 : ym3812_write_port_w( device, offset, data ); break;
	40	case 0 : ym3812_control_port_w( device, space, offset, data ); break;
	41	case 1 : ym3812_write_port_w( device, space, offset, data ); break;
42	42	}
43	43	}
44	44

trunk/src/mess/machine/isa_ibm_mfc.c

r17961	r17962
415	415	case 0x6:
416	416	case 0x7:
417	417	{
418		pit8253_w(m_d8253, offset & 3, data);
	418	pit8253_w(m_d8253, space, offset & 3, data);
419	419	break;
420	420	}
421	421

trunk/src/mess/machine/isa_gblaster.c

r17961	r17962
34	34	{
35	35	switch(offset)
36	36	{
37		case 0 : saa1099_control_w( device, offset, data ); break;
38		case 1 : saa1099_data_w( device, offset, data ); break;
	37	case 0 : saa1099_control_w( device, space, offset, data ); break;
	38	case 1 : saa1099_data_w( device, space, offset, data ); break;
39	39	}
40	40	}
41	41

trunk/src/mess/machine/pk8020.c

r17961	r17962
164	164
165	165	switch(offset & 0x38)
166	166	{
167		case 0x00: return pit8253_r(pit,offset & 3);
	167	case 0x00: return pit8253_r(pit,space, offset & 3);
168	168	case 0x08: return ppi3->read(space,offset & 3);
169	169	case 0x10: switch(offset & 1) {
170	170	case 0 : return rs232->data_r(space,0);
r17961	r17962
172	172	}
173	173	break;
174	174	case 0x18: switch(offset & 3) {
175		case 0 : return wd17xx_status_r(fdc,0);
176		case 1 : return wd17xx_track_r(fdc,0);
177		case 2 : return wd17xx_sector_r(fdc,0);
178		case 3 : return wd17xx_data_r(fdc,0);
	175	case 0 : return wd17xx_status_r(fdc,space, 0);
	176	case 1 : return wd17xx_track_r(fdc,space, 0);
	177	case 2 : return wd17xx_sector_r(fdc,space, 0);
	178	case 3 : return wd17xx_data_r(fdc,space, 0);
179	179	}
180	180	break;
181	181	case 0x20: switch(offset & 1) {
r17961	r17962
183	183	case 1 : return lan->status_r(space,0);
184	184	}
185	185	break;
186		case 0x28: return pic8259_r(pic,offset & 1);
	186	case 0x28: return pic8259_r(pic,space, offset & 1);
187	187	case 0x30: return ppi2->read(space,offset & 3);
188	188	case 0x38: return ppi1->read(space,offset & 3);
189	189	}
r17961	r17962
203	203
204	204	switch(offset & 0x38)
205	205	{
206		case 0x00: pit8253_w(pit,offset & 3,data); break;
	206	case 0x00: pit8253_w(pit,space, offset & 3,data); break;
207	207	case 0x08: ppi3->write(space,offset & 3,data); break;
208	208	case 0x10: switch(offset & 1) {
209	209	case 0 : rs232->data_w(space,0,data); break;
r17961	r17962
211	211	}
212	212	break;
213	213	case 0x18: switch(offset & 3) {
214		case 0 : wd17xx_command_w(fdc,0,data);break;
215		case 1 : wd17xx_track_w(fdc,0,data);break;
216		case 2 : wd17xx_sector_w(fdc,0,data);break;
217		case 3 : wd17xx_data_w(fdc,0,data);break;
	214	case 0 : wd17xx_command_w(fdc,space, 0,data);break;
	215	case 1 : wd17xx_track_w(fdc,space, 0,data);break;
	216	case 2 : wd17xx_sector_w(fdc,space, 0,data);break;
	217	case 3 : wd17xx_data_w(fdc,space, 0,data);break;
218	218	}
219	219	break;
220	220	case 0x20: switch(offset & 1) {
r17961	r17962
222	222	case 1 : lan->control_w(space,0,data); break;
223	223	}
224	224	break;
225		case 0x28: pic8259_w(pic,offset & 1,data);break;
	225	case 0x28: pic8259_w(pic,space, offset & 1,data);break;
226	226	case 0x30: ppi2->write(space,offset & 3,data); break;
227	227	case 0x38: ppi1->write(space,offset & 3,data); break;
228	228	}

trunk/src/mess/machine/omti8621.c

r17961	r17962
1037	1037
1038	1038	switch (mem_mask) {
1039	1039	case 0x00ff:
1040		omti8621_w8(device, offset*2+1, data);
	1040	omti8621_w8(device, space, offset*2+1, data, mem_mask);
1041	1041	break;
1042	1042	case 0xff00:
1043		omti8621_w8(device, offset*2, data>>8);
	1043	omti8621_w8(device, space, offset*2, data>>8, mem_mask>>8);
1044	1044	break;
1045	1045	default:
1046	1046	LOG3(("writing OMTI 8621 Data Word Register to %0x = %04x & %04x", offset, data, mem_mask));
r17961	r17962
1054	1054	UINT16 data;
1055	1055	switch (mem_mask) {
1056	1056	case 0x00ff:
1057		data = omti8621_r8(device, offset*2+1);
	1057	data = omti8621_r8(device, space, offset*2+1, mem_mask);
1058	1058	break;
1059	1059	case 0xff00:
1060		data = omti8621_r8(device, offset*2) << 8;
	1060	data = omti8621_r8(device, space, offset*2, mem_mask >> 8) << 8;
1061	1061	break;
1062	1062	default:
1063	1063	data = get_data(state);

trunk/src/mess/includes/wswan.h

r17961	r17962
200	200	extern const device_type WSWAN;
201	201
202	202
203		WRITE8_DEVICE_HANDLER( wswan_sound_port_w );
	203	DECLARE_WRITE8_DEVICE_HANDLER( wswan_sound_port_w );
204	204
205	205	#endif /* WSWAN_H_ */

trunk/src/mess/includes/z80ne.h

r17961	r17962
109	109
110	110	/*----------- defined in machine/z80ne.c -----------*/
111	111
112		READ8_DEVICE_HANDLER(lx388_mc6847_videoram_r);
113		READ8_DEVICE_HANDLER(lx390_fdc_r);
114		WRITE8_DEVICE_HANDLER(lx390_fdc_w);
115		READ8_DEVICE_HANDLER(lx390_reset_bank);
116		WRITE8_DEVICE_HANDLER(lx390_motor_w);
	112	DECLARE_READ8_DEVICE_HANDLER(lx388_mc6847_videoram_r);
	113	DECLARE_READ8_DEVICE_HANDLER(lx390_fdc_r);
	114	DECLARE_WRITE8_DEVICE_HANDLER(lx390_fdc_w);
	115	DECLARE_READ8_DEVICE_HANDLER(lx390_reset_bank);
	116	DECLARE_WRITE8_DEVICE_HANDLER(lx390_motor_w);
117	117
118	118
119	119

trunk/src/mess/includes/cbmb.h

r17961	r17962
72	72	extern const mos6526_interface cbmb_cia;
73	73
74	74
75		READ8_DEVICE_HANDLER( cbmb_tpi0_port_a_r );
76		WRITE8_DEVICE_HANDLER( cbmb_tpi0_port_a_w );
77		READ8_DEVICE_HANDLER( cbmb_tpi0_port_b_r );
78		WRITE8_DEVICE_HANDLER( cbmb_tpi0_port_b_w );
	75	DECLARE_READ8_DEVICE_HANDLER( cbmb_tpi0_port_a_r );
	76	DECLARE_WRITE8_DEVICE_HANDLER( cbmb_tpi0_port_a_w );
	77	DECLARE_READ8_DEVICE_HANDLER( cbmb_tpi0_port_b_r );
	78	DECLARE_WRITE8_DEVICE_HANDLER( cbmb_tpi0_port_b_w );
79	79
80		WRITE8_DEVICE_HANDLER( cbmb_keyboard_line_select_a );
81		WRITE8_DEVICE_HANDLER( cbmb_keyboard_line_select_b );
82		WRITE8_DEVICE_HANDLER( cbmb_keyboard_line_select_c );
83		READ8_DEVICE_HANDLER( cbmb_keyboard_line_a );
84		READ8_DEVICE_HANDLER( cbmb_keyboard_line_b );
85		READ8_DEVICE_HANDLER( cbmb_keyboard_line_c );
	80	DECLARE_WRITE8_DEVICE_HANDLER( cbmb_keyboard_line_select_a );
	81	DECLARE_WRITE8_DEVICE_HANDLER( cbmb_keyboard_line_select_b );
	82	DECLARE_WRITE8_DEVICE_HANDLER( cbmb_keyboard_line_select_c );
	83	DECLARE_READ8_DEVICE_HANDLER( cbmb_keyboard_line_a );
	84	DECLARE_READ8_DEVICE_HANDLER( cbmb_keyboard_line_b );
	85	DECLARE_READ8_DEVICE_HANDLER( cbmb_keyboard_line_c );
86	86	WRITE_LINE_DEVICE_HANDLER( cbmb_irq );
87	87
88	88	int cbmb_dma_read(running_machine &machine, int offset);

trunk/src/mess/includes/pokemini.h

r17961	r17962
69	69
70	70	/*----------- defined in machine/pokemini.c -----------*/
71	71
72		WRITE8_DEVICE_HANDLER( pokemini_hwreg_w );
73		READ8_DEVICE_HANDLER( pokemini_hwreg_r );
	72	DECLARE_WRITE8_DEVICE_HANDLER( pokemini_hwreg_w );
	73	DECLARE_READ8_DEVICE_HANDLER( pokemini_hwreg_r );
74	74
75	75	DEVICE_IMAGE_LOAD( pokemini_cart );
76	76

trunk/src/mess/includes/msx.h

r17961	r17962
145	145	void msx_vdp_interrupt(device_t *, v99x8_device &device, int i);
146	146
147	147	/* I/O functions */
148		READ8_DEVICE_HANDLER( msx_printer_status_r );
149		WRITE8_DEVICE_HANDLER( msx_printer_strobe_w );
150		WRITE8_DEVICE_HANDLER( msx_printer_data_w );
	148	DECLARE_READ8_DEVICE_HANDLER( msx_printer_status_r );
	149	DECLARE_WRITE8_DEVICE_HANDLER( msx_printer_strobe_w );
	150	DECLARE_WRITE8_DEVICE_HANDLER( msx_printer_data_w );
151	151
152	152
153	153	#endif /* __MSX_H__ */

trunk/src/mess/includes/apollo.h

r17961	r17962
241	241
242	242	/*----------- machine/apollo_pic.c -----------*/
243	243
244		WRITE8_DEVICE_HANDLER(apollo_pic8259_master_w ) ;
245		READ8_DEVICE_HANDLER( apollo_pic8259_master_r );
	244	DECLARE_WRITE8_DEVICE_HANDLER(apollo_pic8259_master_w ) ;
	245	DECLARE_READ8_DEVICE_HANDLER( apollo_pic8259_master_r );
246	246
247		WRITE8_DEVICE_HANDLER(apollo_pic8259_slave_w );
248		READ8_DEVICE_HANDLER( apollo_pic8259_slave_r );
	247	DECLARE_WRITE8_DEVICE_HANDLER(apollo_pic8259_slave_w );
	248	DECLARE_READ8_DEVICE_HANDLER( apollo_pic8259_slave_r );
249	249
250	250	IRQ_CALLBACK(apollo_pic_acknowledge);
251	251
252	252	/*----------- machine/apollo_ptm.c -----------*/
253	253
254		WRITE8_DEVICE_HANDLER( apollo_ptm_w );
255		READ8_DEVICE_HANDLER( apollo_ptm_r );
	254	DECLARE_WRITE8_DEVICE_HANDLER( apollo_ptm_w );
	255	DECLARE_READ8_DEVICE_HANDLER( apollo_ptm_r );
256	256
257	257	/*----------- machine/apollo_rtc.c -----------*/
258	258
r17961	r17962
261	261
262	262	void apollo_sio_rx_data( device_t* device, int ch, UINT8 data );
263	263
264		READ8_DEVICE_HANDLER(apollo_sio_r);
265		WRITE8_DEVICE_HANDLER(apollo_sio_w);
	264	DECLARE_READ8_DEVICE_HANDLER(apollo_sio_r);
	265	DECLARE_WRITE8_DEVICE_HANDLER(apollo_sio_w);
266	266
267	267	/*----------- machine/apollo_sio2.c -----------*/
268	268
269		READ8_DEVICE_HANDLER(apollo_sio2_r);
270		WRITE8_DEVICE_HANDLER(apollo_sio2_w);
	269	DECLARE_READ8_DEVICE_HANDLER(apollo_sio2_r);
	270	DECLARE_WRITE8_DEVICE_HANDLER(apollo_sio2_w);
271	271
272	272	/*----------- machine/apollo_fdc.c -----------*/
273	273
r17961	r17962
360	360
361	361	MACHINE_CONFIG_EXTERN( apollo_mono15i );
362	362
363		READ16_DEVICE_HANDLER( apollo_mcr_r ) ;
364		WRITE16_DEVICE_HANDLER(apollo_mcr_w );
	363	DECLARE_READ16_DEVICE_HANDLER( apollo_mcr_r ) ;
	364	DECLARE_WRITE16_DEVICE_HANDLER(apollo_mcr_w );
365	365
366		READ16_DEVICE_HANDLER( apollo_mgm_r );
367		WRITE16_DEVICE_HANDLER( apollo_mgm_w );
	366	DECLARE_READ16_DEVICE_HANDLER( apollo_mgm_r );
	367	DECLARE_WRITE16_DEVICE_HANDLER( apollo_mgm_w );
368	368
369	369	#endif /* APOLLO_H_ */

trunk/src/mess/includes/cgenie.h

r17961	r17962
75	75
76	76	/*----------- defined in machine/cgenie.c -----------*/
77	77
78		READ8_DEVICE_HANDLER( cgenie_sh_control_port_r );
79		WRITE8_DEVICE_HANDLER( cgenie_sh_control_port_w );
	78	DECLARE_READ8_DEVICE_HANDLER( cgenie_sh_control_port_r );
	79	DECLARE_WRITE8_DEVICE_HANDLER( cgenie_sh_control_port_w );
80	80
81	81	extern const wd17xx_interface cgenie_wd17xx_interface;
82	82

trunk/src/mess/includes/kaypro.h

r17961	r17962
96	96	extern const z80sio_interface kaypro_sio_intf;
97	97	extern const wd17xx_interface kaypro_wd1793_interface;
98	98
99		READ8_DEVICE_HANDLER( kaypro_sio_r );
100		WRITE8_DEVICE_HANDLER( kaypro_sio_w );
	99	DECLARE_READ8_DEVICE_HANDLER( kaypro_sio_r );
	100	DECLARE_WRITE8_DEVICE_HANDLER( kaypro_sio_w );
101	101
102	102
103	103

trunk/src/mess/includes/c16.h

r17961	r17962
52	52
53	53	/*----------- defined in machine/c16.c -----------*/
54	54
55		extern READ8_DEVICE_HANDLER(c16_m7501_port_read);
56		extern WRITE8_DEVICE_HANDLER(c16_m7501_port_write);
	55	extern DECLARE_READ8_DEVICE_HANDLER(c16_m7501_port_read);
	56	extern DECLARE_WRITE8_DEVICE_HANDLER(c16_m7501_port_write);
57	57
58	58	extern WRITE8_HANDLER(c16_6551_port_w);
59	59	extern READ8_HANDLER(c16_6551_port_r);

trunk/src/mess/includes/mc68328.h

r17961	r17962
98	98	{
99	99	const char *m68k_cpu_tag;
100	100
101		write8_device_func  out_port_a_func;    /* 8-bit output */
102		write8_device_func  out_port_b_func;    /* 8-bit output */
103		write8_device_func  out_port_c_func;    /* 8-bit output */
104		write8_device_func  out_port_d_func;    /* 8-bit output */
105		write8_device_func  out_port_e_func;    /* 8-bit output */
106		write8_device_func  out_port_f_func;    /* 8-bit output */
107		write8_device_func  out_port_g_func;    /* 8-bit output */
108		write8_device_func  out_port_j_func;    /* 8-bit output */
109		write8_device_func  out_port_k_func;    /* 8-bit output */
110		write8_device_func  out_port_m_func;    /* 8-bit output */
	101	devcb_write8  out_port_a_func;    /* 8-bit output */
	102	devcb_write8  out_port_b_func;    /* 8-bit output */
	103	devcb_write8  out_port_c_func;    /* 8-bit output */
	104	devcb_write8  out_port_d_func;    /* 8-bit output */
	105	devcb_write8  out_port_e_func;    /* 8-bit output */
	106	devcb_write8  out_port_f_func;    /* 8-bit output */
	107	devcb_write8  out_port_g_func;    /* 8-bit output */
	108	devcb_write8  out_port_j_func;    /* 8-bit output */
	109	devcb_write8  out_port_k_func;    /* 8-bit output */
	110	devcb_write8  out_port_m_func;    /* 8-bit output */
111	111
112		read8_device_func   in_port_a_func;     /* 8-bit input */
113		read8_device_func   in_port_b_func;     /* 8-bit input */
114		read8_device_func   in_port_c_func;     /* 8-bit input */
115		read8_device_func   in_port_d_func;     /* 8-bit input */
116		read8_device_func   in_port_e_func;     /* 8-bit input */
117		read8_device_func   in_port_f_func;     /* 8-bit input */
118		read8_device_func   in_port_g_func;     /* 8-bit input */
119		read8_device_func   in_port_j_func;     /* 8-bit input */
120		read8_device_func   in_port_k_func;     /* 8-bit input */
121		read8_device_func   in_port_m_func;     /* 8-bit input */
	112	devcb_read8   in_port_a_func;     /* 8-bit input */
	113	devcb_read8   in_port_b_func;     /* 8-bit input */
	114	devcb_read8   in_port_c_func;     /* 8-bit input */
	115	devcb_read8   in_port_d_func;     /* 8-bit input */
	116	devcb_read8   in_port_e_func;     /* 8-bit input */
	117	devcb_read8   in_port_f_func;     /* 8-bit input */
	118	devcb_read8   in_port_g_func;     /* 8-bit input */
	119	devcb_read8   in_port_j_func;     /* 8-bit input */
	120	devcb_read8   in_port_k_func;     /* 8-bit input */
	121	devcb_read8   in_port_m_func;     /* 8-bit input */
122	122
123		write8_device_func  out_pwm_func;       /* 1-bit output */
	123	devcb_write8  out_pwm_func;       /* 1-bit output */
124	124
125		write16_device_func out_spim_func;      /* 16-bit output */
126		read16_device_func  in_spim_func;       /* 16-bit input */
	125	devcb_write16 out_spim_func;      /* 16-bit output */
	126	devcb_read16  in_spim_func;       /* 16-bit input */
127	127	void (*spim_xch_trigger)( device_t *device );    /* SPIM exchange trigger */
128	128	};
129	129	#define MC68328_INTERFACE(name) const mc68328_interface (name)=
r17961	r17962
144	144	READ/WRITE HANDLERS
145	145	***************************************************************************/
146	146
147		WRITE16_DEVICE_HANDLER( mc68328_w );
148		READ16_DEVICE_HANDLER(  mc68328_r );
	147	DECLARE_WRITE16_DEVICE_HANDLER( mc68328_w );
	148	DECLARE_READ16_DEVICE_HANDLER(  mc68328_r );
149	149
150	150
151	151	/***************************************************************************

trunk/src/mess/includes/c64_legacy.h

r17961	r17962
97	97
98	98	/* private area */
99	99
100		extern READ8_DEVICE_HANDLER(c64_m6510_port_read);
101		extern WRITE8_DEVICE_HANDLER(c64_m6510_port_write);
	100	extern DECLARE_READ8_DEVICE_HANDLER(c64_m6510_port_read);
	101	extern DECLARE_WRITE8_DEVICE_HANDLER(c64_m6510_port_write);
102	102
103	103	READ8_HANDLER ( c64_colorram_read );
104	104	WRITE8_HANDLER ( c64_colorram_write );
r17961	r17962
116	116
117	117	WRITE8_HANDLER ( c64_write_io );
118	118	READ8_HANDLER ( c64_read_io );
119		int c64_paddle_read (device_t *device, int which);
	119	int c64_paddle_read (device_t *device, address_space &space, int which);
120	120
121	121	extern const mos6526_interface c64_ntsc_cia0, c64_pal_cia0;
122	122	extern const mos6526_interface c64_ntsc_cia1, c64_pal_cia1;

trunk/src/mess/includes/nascom1.h

r17961	r17962
61	61
62	62
63	63
64		READ8_DEVICE_HANDLER( nascom1_hd6402_si );
65		WRITE8_DEVICE_HANDLER( nascom1_hd6402_so );
	64	DECLARE_READ8_DEVICE_HANDLER( nascom1_hd6402_si );
	65	DECLARE_WRITE8_DEVICE_HANDLER( nascom1_hd6402_so );
66	66
67	67
68	68

trunk/src/mess/includes/mtx.h

r17961	r17962
68	68
69	69
70	70	/* Sound */
71		READ8_DEVICE_HANDLER( mtx_sound_strobe_r );
	71	DECLARE_READ8_DEVICE_HANDLER( mtx_sound_strobe_r );
72	72
73	73	/* Cassette */
74		WRITE8_DEVICE_HANDLER( mtx_cst_w );
	74	DECLARE_WRITE8_DEVICE_HANDLER( mtx_cst_w );
75	75
76	76	/* Printer */
77		READ8_DEVICE_HANDLER( mtx_strobe_r );
78		READ8_DEVICE_HANDLER( mtx_prt_r );
	77	DECLARE_READ8_DEVICE_HANDLER( mtx_strobe_r );
	78	DECLARE_READ8_DEVICE_HANDLER( mtx_prt_r );
79	79
80	80	/* Keyboard */
81	81

trunk/src/mess/includes/amstrad.h

r17961	r17962
174	174
175	175
176	176
177		READ8_DEVICE_HANDLER( amstrad_ppi_porta_r );
178		READ8_DEVICE_HANDLER( amstrad_ppi_portb_r );
179		WRITE8_DEVICE_HANDLER( amstrad_ppi_porta_w );
180		WRITE8_DEVICE_HANDLER( amstrad_ppi_portc_w );
	177	DECLARE_READ8_DEVICE_HANDLER( amstrad_ppi_porta_r );
	178	DECLARE_READ8_DEVICE_HANDLER( amstrad_ppi_portb_r );
	179	DECLARE_WRITE8_DEVICE_HANDLER( amstrad_ppi_porta_w );
	180	DECLARE_WRITE8_DEVICE_HANDLER( amstrad_ppi_portc_w );
181	181
182	182
183	183	WRITE_LINE_DEVICE_HANDLER( aleste_interrupt );

trunk/src/mess/includes/svision.h

r17961	r17962
91	91	int *svision_dma_finished(device_t *device);
92	92	void svision_sound_decrement(device_t *device);
93	93	void svision_soundport_w(device_t *device, int which, int offset, int data);
94		WRITE8_DEVICE_HANDLER( svision_sounddma_w );
95		WRITE8_DEVICE_HANDLER( svision_noise_w );
	94	DECLARE_WRITE8_DEVICE_HANDLER( svision_sounddma_w );
	95	DECLARE_WRITE8_DEVICE_HANDLER( svision_noise_w );
96	96
97	97
98	98	#endif /* SVISION_H_ */

trunk/src/mess/includes/c64.h

r17961	r17962
182	182	};
183	183
184	184
185		int c64_paddle_read (device_t *device, int which);
	185	int c64_paddle_read (device_t *device, address_space &space, int which);
186	186
187	187
188	188	#endif

trunk/src/mess/includes/pc.h

r17961	r17962
113	113
114	114
115	115
116		READ8_DEVICE_HANDLER( mc1502_wd17xx_drq_r );
117		READ8_DEVICE_HANDLER( mc1502_wd17xx_aux_r );
118		READ8_DEVICE_HANDLER( mc1502_wd17xx_motor_r );
119		WRITE8_DEVICE_HANDLER( mc1502_wd17xx_aux_w );
	116	DECLARE_READ8_DEVICE_HANDLER( mc1502_wd17xx_drq_r );
	117	DECLARE_READ8_DEVICE_HANDLER( mc1502_wd17xx_aux_r );
	118	DECLARE_READ8_DEVICE_HANDLER( mc1502_wd17xx_motor_r );
	119	DECLARE_WRITE8_DEVICE_HANDLER( mc1502_wd17xx_aux_w );
120	120
121	121
122	122

trunk/src/mess/includes/vic10.h

r17961	r17962
50	50	virtual void machine_reset();
51	51
52	52	void check_interrupts();
53		UINT8 paddle_read(int which);
	53	UINT8 paddle_read(address_space &space, int which);
54	54
55	55	DECLARE_READ8_MEMBER( read );
56	56	DECLARE_WRITE8_MEMBER( write );

trunk/src/mess/video/911_vdt.h

r17961	r17962
68	68	MCFG_DEVICE_CONFIG(_intf)
69	69
70	70
71		READ8_DEVICE_HANDLER(vdt911_cru_r);
72		WRITE8_DEVICE_HANDLER(vdt911_cru_w);
	71	DECLARE_READ8_DEVICE_HANDLER(vdt911_cru_r);
	72	DECLARE_WRITE8_DEVICE_HANDLER(vdt911_cru_w);
73	73
74	74	void vdt911_refresh(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect, int x, int y);
75	75

trunk/src/mess/video/isa_mda.c

r17961	r17962
452	452	mode_control_w(space, offset, data);
453	453	break;
454	454	case 12: case 13:  case 14:
455		pc_lpt_w(lpt, offset - 12, data);
	455	pc_lpt_w(lpt, space, offset - 12, data);
456	456	break;
457	457	}
458	458	}
r17961	r17962
475	475	break;
476	476	/* 12, 13, 14  are the LPT ports */
477	477	case 12: case 13:  case 14:
478		data = pc_lpt_r(lpt, offset - 12);
	478	data = pc_lpt_r(lpt, space, offset - 12);
479	479	break;
480	480	}
481	481	return data;
r17961	r17962
686	686	mode_control_w(space, offset, data);
687	687	break;
688	688	case 12: case 13:  case 14:
689		pc_lpt_w(lpt, offset - 12, data);
	689	pc_lpt_w(lpt, space, offset - 12, data);
690	690	break;
691	691	case 15:
692	692	m_configuration_switch = data;
r17961	r17962
733	733	break;
734	734	/* 12, 13, 14  are the LPT ports */
735	735	case 12: case 13:  case 14:
736		data = pc_lpt_r(lpt, offset - 12);
	736	data = pc_lpt_r(lpt, space, offset - 12);
737	737	break;
738	738	}
739	739	return data;

trunk/src/mess/video/x68k.c

r17961	r17962
1306	1306	//  popmessage("Keyboard buffer position = %i",state->m_keyboard.headpos);
1307	1307	//  popmessage("IERA = 0x%02x, IERB = 0x%02x",state->m_mfp.iera,state->m_mfp.ierb);
1308	1308	//  popmessage("IPRA = 0x%02x, IPRB = 0x%02x",state->m_mfp.ipra,state->m_mfp.iprb);
1309		//  popmessage("uPD72065 status = %02x",upd765_status_r(machine, 0));
	1309	//  popmessage("uPD72065 status = %02x",upd765_status_r(machine, space, 0));
1310	1310	//  popmessage("Layer enable - 0x%02x",state->m_video.reg[2] & 0xff);
1311	1311	//  popmessage("Graphic layer scroll - %i, %i - %i, %i - %i, %i - %i, %i",
1312	1312	//      state->m_crtc.reg[12],state->m_crtc.reg[13],state->m_crtc.reg[14],state->m_crtc.reg[15],state->m_crtc.reg[16],state->m_crtc.reg[17],state->m_crtc.reg[18],state->m_crtc.reg[19]);

trunk/src/mess/video/vic4567.h

r17961	r17962
164	164
165	165	/*----------- defined in video/vic4567.c -----------*/
166	166
167		WRITE8_DEVICE_HANDLER( vic3_port_w );
168		WRITE8_DEVICE_HANDLER( vic3_palette_w );
169		READ8_DEVICE_HANDLER( vic3_port_r );
	167	DECLARE_WRITE8_DEVICE_HANDLER( vic3_port_w );
	168	DECLARE_WRITE8_DEVICE_HANDLER( vic3_palette_w );
	169	DECLARE_READ8_DEVICE_HANDLER( vic3_port_r );
170	170
171	171	void vic3_raster_interrupt_gen( device_t *device );
172	172	UINT32 vic3_video_update( device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect );

trunk/src/mess/video/vtvideo.h

r17961	r17962
62	62	PROTOTYPES
63	63	***************************************************************************/
64	64	/* register access */
65		READ8_DEVICE_HANDLER  ( vt_video_lba7_r );
66		WRITE8_DEVICE_HANDLER ( vt_video_dc012_w );
67		WRITE8_DEVICE_HANDLER ( vt_video_dc011_w );
68		WRITE8_DEVICE_HANDLER ( vt_video_brightness_w );
	65	DECLARE_READ8_DEVICE_HANDLER  ( vt_video_lba7_r );
	66	DECLARE_WRITE8_DEVICE_HANDLER ( vt_video_dc012_w );
	67	DECLARE_WRITE8_DEVICE_HANDLER ( vt_video_dc011_w );
	68	DECLARE_WRITE8_DEVICE_HANDLER ( vt_video_brightness_w );
69	69
70	70
71	71	/* screen update */

trunk/src/mess/video/vdc8563.h

r17961	r17962
59	59	void vdc8563_set_rastering(device_t *device, int on);
60	60	UINT32 vdc8563_video_update(device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect);
61	61
62		WRITE8_DEVICE_HANDLER( vdc8563_port_w );
63		READ8_DEVICE_HANDLER( vdc8563_port_r );
	62	DECLARE_WRITE8_DEVICE_HANDLER( vdc8563_port_w );
	63	DECLARE_READ8_DEVICE_HANDLER( vdc8563_port_r );
64	64
65	65
66	66	#endif /* __VDC8563_H__ */

trunk/src/mess/video/vic6567.h

r17961	r17962
163	163
164	164	/*----------- defined in video/vic6567.c -----------*/
165	165
166		WRITE8_DEVICE_HANDLER ( vic2_port_w );
167		READ8_DEVICE_HANDLER ( vic2_port_r );
	166	DECLARE_WRITE8_DEVICE_HANDLER ( vic2_port_w );
	167	DECLARE_READ8_DEVICE_HANDLER ( vic2_port_r );
168	168
169	169	int vic2e_k0_r(device_t *device);
170	170	int vic2e_k1_r(device_t *device);

trunk/src/mess/video/dl1416.h

r17961	r17962
49	49	WRITE_LINE_DEVICE_HANDLER( dl1416_wr_w ); /* write enable */
50	50	WRITE_LINE_DEVICE_HANDLER( dl1416_ce_w ); /* chip enable */
51	51	WRITE_LINE_DEVICE_HANDLER( dl1416_cu_w ); /* cursor enable */
52		WRITE8_DEVICE_HANDLER( dl1416_data_w );
	52	DECLARE_WRITE8_DEVICE_HANDLER( dl1416_data_w );
53	53
54	54	/* device get info callback */
55	55	class dl1416_device : public device_t

trunk/src/mess/video/733_asr.h

r17961	r17962
44	44	MCFG_DEVICE_ADD(_tag, ASR733, 0) \
45	45	MCFG_DEVICE_CONFIG(_intf)
46	46
47		READ8_DEVICE_HANDLER(asr733_cru_r);
48		WRITE8_DEVICE_HANDLER(asr733_cru_w);
	47	DECLARE_READ8_DEVICE_HANDLER(asr733_cru_r);
	48	DECLARE_WRITE8_DEVICE_HANDLER(asr733_cru_w);
49	49
50	50	void asr733_refresh(device_t *device, bitmap_ind16 &bitmap, int x, int y);
51	51

trunk/src/mess/video/k1ge.h

r17961	r17962
64	64	PALETTE_INIT( k1ge );
65	65	PALETTE_INIT( k2ge );
66	66
67		WRITE8_DEVICE_HANDLER( k1ge_w );
68		READ8_DEVICE_HANDLER( k1ge_r );
	67	DECLARE_WRITE8_DEVICE_HANDLER( k1ge_w );
	68	DECLARE_READ8_DEVICE_HANDLER( k1ge_r );
69	69
70	70	void k1ge_update( device_t *device, bitmap_ind16 &bitmap, const rectangle &cliprect );
71	71

trunk/src/mess/formats/m65_snqk.c

r17961	r17962
298	298	/* first set of AY8910 registers */
299	299	for (i = 0; i < 16; i++ )
300	300	{
301		ay8910_address_w(ay8910, 0, i);
302		ay8910_data_w(ay8910, 0, snapshot_buff[base++]);
	301	ay8910_address_w(ay8910, state->generic_space(), 0, i);
	302	ay8910_data_w(ay8910, state->generic_space(), 0, snapshot_buff[base++]);
303	303	}
304	304
305	305	/* second set of AY8910 registers */
306	306	for (i = 0; i < 16; i++ )
307	307	{
308		ay8910_address_w(ay8910, 0, i);
309		ay8910_data_w(ay8910, 0, snapshot_buff[base++]);
	308	ay8910_address_w(ay8910, state->generic_space(), 0, i);
	309	ay8910_data_w(ay8910, state->generic_space(), 0, snapshot_buff[base++]);
310	310	}
311	311
312	312	for (i = 0; i < 32*16; i++)

trunk/src/mess/formats/spec_snqk.c

r17961	r17962
2357	2357	/* Only set up sound registers for 128K machine or TS2068! */
2358	2358	for (i = 0; i < 16; i++)
2359	2359	{
2360		ay8910_address_w(ay8912, 0, i);
2361		ay8910_data_w(ay8912, 0, snapdata[39 + i]);
	2360	ay8910_address_w(ay8912, state->generic_space(), 0, i);
	2361	ay8910_data_w(ay8912, state->generic_space(), 0, snapdata[39 + i]);
2362	2362	}
2363		ay8910_address_w(ay8912, 0, snapdata[38]);
	2363	ay8910_address_w(ay8912, state->generic_space(), 0, snapdata[38]);
2364	2364	}
2365	2365
2366	2366	pSource = snapdata + header_size;

trunk/src/mess/drivers/vip.c

r17961	r17962
482	482	WRITE_LINE_MEMBER( vip_state::q_w )
483	483	{
484	484	// sound output
485		discrete_sound_w(m_beeper, NODE_01, state);
	485	discrete_sound_w(m_beeper, machine().driver_data()->generic_space(), NODE_01, state);
486	486
487	487	// Q led
488	488	set_led_status(machine(), LED_Q, state);
r17961	r17962
671	671	set_led_status(machine(), LED_POWER, 1);
672	672
673	673	// reset sound
674		discrete_sound_w(m_beeper, NODE_01, 0);
	674	discrete_sound_w(m_beeper, machine().driver_data()->generic_space(), NODE_01, 0);
675	675
676	676	// state saving
677	677	save_item(NAME(m_8000));

trunk/src/mess/drivers/homelab.c

r17961	r17962
642	642	GFXDECODE_ENTRY( "chargen", 0x0000, homelab_charlayout, 0, 1 )
643	643	GFXDECODE_END
644	644
645		static const mea8000_interface brailab4_speech_intf = { "speech", NULL };
	645	static const mea8000_interface brailab4_speech_intf = { "speech", DEVCB_NULL };
646	646
647	647	static QUICKLOAD_LOAD(homelab)
648	648	{

trunk/src/mess/drivers/pc9801.c

r17961	r17962
611	611	if(offset & 0x14)
612	612	printf("Read to undefined port [%02x]\n",offset+0x00);
613	613	else
614		return pic8259_r(machine().device((offset & 8) ? "pic8259_slave" : "pic8259_master"), (offset & 2) >> 1);
	614	return pic8259_r(machine().device((offset & 8) ? "pic8259_slave" : "pic8259_master"), space, (offset & 2) >> 1);
615	615	}
616	616	else // odd
617	617	{
618		return i8237_r(machine().device("dma8237"), (offset & 0x1e) >> 1);
	618	return i8237_r(machine().device("dma8237"), space, (offset & 0x1e) >> 1);
619	619	}
620	620
621	621	return 0xff;
r17961	r17962
628	628	if(offset & 0x14)
629	629	printf("Write to undefined port [%02x] <- %02x\n",offset+0x00,data);
630	630	else
631		pic8259_w(machine().device((offset & 8) ? "pic8259_slave" : "pic8259_master"), (offset & 2) >> 1, data);
	631	pic8259_w(machine().device((offset & 8) ? "pic8259_slave" : "pic8259_master"), space, (offset & 2) >> 1, data);
632	632	}
633	633	else // odd
634	634	{
635		i8237_w(machine().device("dma8237"), (offset & 0x1e) >> 1, data);
	635	i8237_w(machine().device("dma8237"), space, (offset & 0x1e) >> 1, data);
636	636	}
637	637	}
638	638
r17961	r17962
875	875	if(offset & 0x08)
876	876	printf("Read to undefined port [%02x]\n",offset+0x70);
877	877	else
878		return pit8253_r(machine().device("pit8253"), (offset & 6) >> 1);
	878	return pit8253_r(machine().device("pit8253"), space, (offset & 6) >> 1);
879	879	}
880	880
881	881	return 0xff;
r17961	r17962
892	892	else // odd
893	893	{
894	894	if(offset < 0x08)
895		pit8253_w(machine().device("pit8253"), (offset & 6) >> 1, data);
	895	pit8253_w(machine().device("pit8253"), space, (offset & 6) >> 1, data);
896	896	else
897	897	printf("Write to undefined port [%02x] <- %02x\n",offset+0x70,data);
898	898	}
r17961	r17962
1038	1038	{
1039	1039	switch(offset & 6)
1040	1040	{
1041		case 0:   return upd765_status_r(machine().device("upd765_2hd"),0);
1042		case 2: return upd765_data_r(machine().device("upd765_2hd"),0);
	1041	case 0:   return upd765_status_r(machine().device("upd765_2hd"),space, 0);
	1042	case 2: return upd765_data_r(machine().device("upd765_2hd"),space, 0);
1043	1043	case 4: return 0x5f; //unknown port meaning
1044	1044	}
1045	1045	}
r17961	r17962
1065	1065	switch(offset & 6)
1066	1066	{
1067	1067	case 0: printf("Write to undefined port [%02x] <- %02x\n",offset+0x90,data); return;
1068		case 2: upd765_data_w(machine().device("upd765_2hd"),0,data); return;
	1068	case 2: upd765_data_w(machine().device("upd765_2hd"),space, 0,data); return;
1069	1069	case 4:
1070	1070	printf("%02x ctrl\n",data);
1071	1071	if(((m_fdc_2hd_ctrl & 0x80) == 0) && (data & 0x80))
r17961	r17962
1099	1099	{
1100	1100	switch(offset & 6)
1101	1101	{
1102		case 0:   return upd765_status_r(machine().device("upd765_2dd"),0);
1103		case 2: return upd765_data_r(machine().device("upd765_2dd"),0);
	1102	case 0:   return upd765_status_r(machine().device("upd765_2dd"),space, 0);
	1103	case 2: return upd765_data_r(machine().device("upd765_2dd"),space, 0);
1104	1104	case 4: return 0x40; //unknown port meaning, might be 0x70
1105	1105	}
1106	1106	}
r17961	r17962
1121	1121	switch(offset & 6)
1122	1122	{
1123	1123	case 0: printf("Write to undefined port [%02x] <- %02x\n",offset+0xc8,data); return;
1124		case 2: upd765_data_w(machine().device("upd765_2dd"),0,data); return;
	1124	case 2: upd765_data_w(machine().device("upd765_2dd"),space, 0,data); return;
1125	1125	case 4:
1126	1126	printf("%02x ctrl\n",data);
1127	1127	if(((m_fdc_2dd_ctrl & 0x80) == 0) && (data & 0x80))
r17961	r17962
1182	1182	READ8_MEMBER(pc9801_state::pc9801_opn_r)
1183	1183	{
1184	1184	if((offset & 1) == 0)
1185		return ym2203_r(machine().device("opn"),offset >> 1);
	1185	return ym2203_r(machine().device("opn"),space, offset >> 1);
1186	1186	else // odd
1187	1187	{
1188	1188	printf("Read to undefined port [%02x]\n",offset+0x188);
r17961	r17962
1193	1193	WRITE8_MEMBER(pc9801_state::pc9801_opn_w)
1194	1194	{
1195	1195	if((offset & 1) == 0)
1196		ym2203_w(machine().device("opn"),offset >> 1,data);
	1196	ym2203_w(machine().device("opn"),space, offset >> 1,data);
1197	1197	else // odd
1198	1198	{
1199	1199	printf("Write to undefined port [%02x] %02x\n",offset+0x188,data);
r17961	r17962
1411	1411	{
1412	1412	switch(offset & 6)
1413	1413	{
1414		case 0:   return upd765_status_r(machine().device("upd765_2hd"),0);
1415		case 2: return upd765_data_r(machine().device("upd765_2hd"),0);
	1414	case 0:   return upd765_status_r(machine().device("upd765_2hd"),space, 0);
	1415	case 2: return upd765_data_r(machine().device("upd765_2hd"),space, 0);
1416	1416	case 4: return 0x40; //2hd flag
1417	1417	}
1418	1418	}
r17961	r17962
1428	1428	{
1429	1429	switch(offset & 6)
1430	1430	{
1431		case 2: upd765_data_w(machine().device("upd765_2hd"),0,data); return;
	1431	case 2: upd765_data_w(machine().device("upd765_2hd"),space, 0,data); return;
1432	1432	case 4: printf("%02x FDC ctrl\n",data); return;
1433	1433	}
1434	1434	}
r17961	r17962
1446	1446	{
1447	1447	switch(offset & 6)
1448	1448	{
1449		case 0:   return upd765_status_r(machine().device("upd765_2hd"),0);
1450		case 2: return upd765_data_r(machine().device("upd765_2hd"),0);
	1449	case 0:   return upd765_status_r(machine().device("upd765_2hd"),space, 0);
	1450	case 2: return upd765_data_r(machine().device("upd765_2hd"),space, 0);
1451	1451	case 4: return 0x70; //2dd flag
1452	1452	}
1453	1453	}
r17961	r17962
1467	1467	{
1468	1468	switch(offset & 6)
1469	1469	{
1470		case 2: upd765_data_w(machine().device("upd765_2hd"),0,data); return;
	1470	case 2: upd765_data_w(machine().device("upd765_2hd"),space, 0,data); return;
1471	1471	case 4: printf("%02x FDC ctrl\n",data); return;
1472	1472	}
1473	1473	}
r17961	r17962
2377	2377
2378	2378	static READ8_DEVICE_HANDLER( ppi_fdd_portb_r )
2379	2379	{
2380		return 0xff; //upd765_status_r(device->machine().device("upd765_2dd"),0);
	2380	return 0xff; //upd765_status_r(device->machine().device("upd765_2dd"),space, 0);
2381	2381	}
2382	2382
2383	2383	static READ8_DEVICE_HANDLER( ppi_fdd_portc_r )
2384	2384	{
2385		return 0xff; //upd765_data_r(device->machine().device("upd765_2dd"),0);
	2385	return 0xff; //upd765_data_r(device->machine().device("upd765_2dd"),space, 0);
2386	2386	}
2387	2387
2388	2388	static WRITE8_DEVICE_HANDLER( ppi_fdd_portc_w )
2389	2389	{
2390		//upd765_data_w(device->machine().device("upd765_2dd"),0,data);
	2390	//upd765_data_w(device->machine().device("upd765_2dd"),space, 0,data);
2391	2391	}
2392	2392
2393	2393	static I8255A_INTERFACE( ppi_fdd_intf )

trunk/src/mess/drivers/mz2000.c

r17961	r17962
293	293	mz2000_state *state = device->machine().driver_data<mz2000_state>();
294	294
295	295	if(state->m_has_fdc)
296		return wd17xx_r(device, offset) ^ 0xff;
	296	return wd17xx_r(device, space, offset) ^ 0xff;
297	297
298	298	return 0xff;
299	299	}
r17961	r17962
303	303	mz2000_state *state = device->machine().driver_data<mz2000_state>();
304	304
305	305	if(state->m_has_fdc)
306		wd17xx_w(device, offset, data ^ 0xff);
	306	wd17xx_w(device, space, offset, data ^ 0xff);
307	307	}
308	308
309	309	WRITE8_MEMBER(mz2000_state::mz2000_fdc_w)

trunk/src/mess/drivers/z100.c

r17961	r17962
355	355
356	356	switch(offset)
357	357	{
358		case 0: res = wd17xx_status_r(m_fdc,offset); break;
359		case 1: res = wd17xx_track_r(m_fdc,offset);  break;
360		case 2: res = wd17xx_sector_r(m_fdc,offset); break;
361		case 3: res = wd17xx_data_r(m_fdc,offset); break;
	358	case 0: res = wd17xx_status_r(m_fdc,space, offset); break;
	359	case 1: res = wd17xx_track_r(m_fdc,space, offset);  break;
	360	case 2: res = wd17xx_sector_r(m_fdc,space, offset); break;
	361	case 3: res = wd17xx_data_r(m_fdc,space, offset); break;
362	362	}
363	363
364	364	return res;
r17961	r17962
368	368	{
369	369	switch(offset)
370	370	{
371		case 0: wd17xx_command_w(m_fdc,offset,data); break;
372		case 1: wd17xx_track_w(m_fdc,offset,data); break;
373		case 2: wd17xx_sector_w(m_fdc,offset,data); break;
374		case 3: wd17xx_data_w(m_fdc,offset,data); break;
	371	case 0: wd17xx_command_w(m_fdc,space, offset,data); break;
	372	case 1: wd17xx_track_w(m_fdc,space, offset,data); break;
	373	case 2: wd17xx_sector_w(m_fdc,space, offset,data); break;
	374	case 3: wd17xx_data_w(m_fdc,space, offset,data); break;
375	375	case 4: // disk control
376	376	wd17xx_set_drive(m_fdc,data & 3);
377	377	m_z207_cur_drive = data & 3;

trunk/src/mess/drivers/c65.c

r17961	r17962
193	193	{
194	194	device_t *sid = machine().device("sid_r");
195	195
196		return c64_paddle_read(sid, 0);
	196	return c64_paddle_read(sid, space, 0);
197	197	}
198	198
199	199	READ8_MEMBER( c65_state::sid_poty_r )
200	200	{
201	201	device_t *sid = machine().device("sid_r");
202	202
203		return c64_paddle_read(sid, 1);
	203	return c64_paddle_read(sid, space, 1);
204	204	}
205	205
206	206	static MOS6581_INTERFACE( sidr_intf )

trunk/src/mess/drivers/pc88va.c

r17961	r17962
970	970	/* ---x ---- RDY: (0) Busy (1) Ready */
971	971	case 0x06: // FDC control port 2
972	972	return 0;
973		case 0x08: return upd765_status_r(machine().device("upd765"), 0);
974		case 0x0a: return upd765_data_r(machine().device("upd765"), 0);
	973	case 0x08: return upd765_status_r(machine().device("upd765"), space, 0);
	974	case 0x0a: return upd765_data_r(machine().device("upd765"), space, 0);
975	975	}
976	976
977	977	return 0xff;
r17961	r17962
1013	1013	printf("%02x\n",data);
1014	1014	break; // FDC control port 2
1015	1015	case 0x08: break; // UPD765 status
1016		case 0x0a: upd765_data_w(machine().device("upd765"), 0,data); break;
	1016	case 0x0a: upd765_data_w(machine().device("upd765"), space, 0,data); break;
1017	1017	}
1018	1018	}
1019	1019

trunk/src/mess/drivers/pc1512.c

r17961	r17962
474	474	switch (offset)
475	475	{
476	476	case 4:
477		data = upd765_status_r(m_fdc, 0);
	477	data = upd765_status_r(m_fdc, space, 0);
478	478	break;
479	479
480	480	case 5:
481		data = upd765_data_r(m_fdc, 0);
	481	data = upd765_data_r(m_fdc, space, 0);
482	482	break;
483	483	}
484	484
r17961	r17962
529	529	break;
530	530
531	531	case 5:
532		upd765_data_w(m_fdc, 0, data);
	532	upd765_data_w(m_fdc, space, 0, data);
533	533	break;
534	534	}
535	535	}
r17961	r17962
551	551	bool decoded = false;
552	552
553	553	if      (                 addr <= 0x00f) { data = m_dmac->read(space, offset & 0x0f); decoded = true; }
554		else if (addr >= 0x020 && addr <= 0x021) { data = pic8259_r(m_pic, offset & 0x01); decoded = true; }
555		else if (addr >= 0x040 && addr <= 0x043) { data = pit8253_r(m_pit, offset & 0x03); decoded = true; }
	554	else if (addr >= 0x020 && addr <= 0x021) { data = pic8259_r(m_pic, space, offset & 0x01); decoded = true; }
	555	else if (addr >= 0x040 && addr <= 0x043) { data = pit8253_r(m_pit, space, offset & 0x03); decoded = true; }
556	556	else if (addr >= 0x060 && addr <= 0x06f) { data = system_r(space, offset & 0x0f); decoded = true; }
557	557	else if (addr >= 0x070 && addr <= 0x073) { data = m_rtc->read(space, offset & 0x01); decoded = true; }
558	558	else if (addr >= 0x078 && addr <= 0x07f) { data = mouse_r(space, offset & 0x07); decoded = true; }
r17961	r17962
910	910	READ8_MEMBER( pc1512_state::ior2_r )
911	911	{
912	912	if (m_nden)
913		return upd765_dack_r(m_fdc, 0);
	913	return upd765_dack_r(m_fdc, space, 0);
914	914	else
915	915	return m_bus->dack_r(2);
916	916	}
r17961	r17962
934	934	WRITE8_MEMBER( pc1512_state::iow2_w )
935	935	{
936	936	if (m_nden)
937		upd765_dack_w(m_fdc, 0, data);
	937	upd765_dack_w(m_fdc, space, 0, data);
938	938	else
939	939	m_bus->dack_w(2, data);
940	940	}

trunk/src/mess/drivers/pes.c

r17961	r17962
139	139	#ifdef DEBUG_PORTS
140	140	logerror("port1 write: tms5220 data written: %02X\n", data);
141	141	#endif
142		tms5220_data_w(state->m_speech, 0, data);
	142	tms5220_data_w(state->m_speech, space, 0, data);
143	143
144	144	}
145	145
r17961	r17962
147	147	{
148	148	UINT8 data = 0xFF;
149	149	pes_state *state = machine().driver_data<pes_state>();
150		data = tms5220_status_r(state->m_speech, 0);
	150	data = tms5220_status_r(state->m_speech, space, 0);
151	151	#ifdef DEBUG_PORTS
152	152	logerror("port1 read: tms5220 data read: 0x%02X\n", data);
153	153	#endif

trunk/src/mess/drivers/x1.c

r17961	r17962
999	999	switch(offset+0xff8)
1000	1000	{
1001	1001	case 0x0ff8:
1002		return wd17xx_status_r(m_fdc,offset);
	1002	return wd17xx_status_r(m_fdc,space, offset);
1003	1003	case 0x0ff9:
1004		return wd17xx_track_r(m_fdc,offset);
	1004	return wd17xx_track_r(m_fdc,space, offset);
1005	1005	case 0x0ffa:
1006		return wd17xx_sector_r(m_fdc,offset);
	1006	return wd17xx_sector_r(m_fdc,space, offset);
1007	1007	case 0x0ffb:
1008		return wd17xx_data_r(m_fdc,offset);
	1008	return wd17xx_data_r(m_fdc,space, offset);
1009	1009	case 0x0ffc:
1010	1010	printf("FDC: read FM type\n");
1011	1011	return 0xff;
r17961	r17962
1028	1028	switch(offset+0xff8)
1029	1029	{
1030	1030	case 0x0ff8:
1031		wd17xx_command_w(m_fdc,offset,data);
	1031	wd17xx_command_w(m_fdc,space, offset,data);
1032	1032	break;
1033	1033	case 0x0ff9:
1034		wd17xx_track_w(m_fdc,offset,data);
	1034	wd17xx_track_w(m_fdc,space, offset,data);
1035	1035	break;
1036	1036	case 0x0ffa:
1037		wd17xx_sector_w(m_fdc,offset,data);
	1037	wd17xx_sector_w(m_fdc,space, offset,data);
1038	1038	break;
1039	1039	case 0x0ffb:
1040		wd17xx_data_w(m_fdc,offset,data);
	1040	wd17xx_data_w(m_fdc,space, offset,data);
1041	1041	break;
1042	1042	case 0x0ffc:
1043	1043	wd17xx_set_drive(m_fdc,data & 3);
r17961	r17962
1618	1618	else if(offset >= 0x1400 && offset <= 0x17ff)   { return x1_pcg_r(space, offset-0x1400); }
1619	1619	else if(offset >= 0x1900 && offset <= 0x19ff)   { return x1_sub_io_r(space, 0); }
1620	1620	else if(offset >= 0x1a00 && offset <= 0x1aff)   { return machine().device<i8255_device>("ppi8255_0")->read(space, (offset-0x1a00) & 3); }
1621		else if(offset >= 0x1b00 && offset <= 0x1bff)   { return ay8910_r(machine().device("ay"), 0); }
	1621	else if(offset >= 0x1b00 && offset <= 0x1bff)   { return ay8910_r(machine().device("ay"), space, 0); }
1622	1622	//  else if(offset >= 0x1f80 && offset <= 0x1f8f)   { return z80dma_r(machine().device("dma"), 0); }
1623	1623	//  else if(offset >= 0x1f90 && offset <= 0x1f91)   { return z80sio_c_r(machine().device("sio"), (offset-0x1f90) & 1); }
1624	1624	//  else if(offset >= 0x1f92 && offset <= 0x1f93)   { return z80sio_d_r(machine().device("sio"), (offset-0x1f92) & 1); }
r17961	r17962
1654	1654	else if(offset == 0x1800 || offset == 0x1801)   { x1_6845_w(space, offset-0x1800, data); }
1655	1655	else if(offset >= 0x1900 && offset <= 0x19ff)   { x1_sub_io_w(space, 0,data); }
1656	1656	else if(offset >= 0x1a00 && offset <= 0x1aff)   { machine().device<i8255_device>("ppi8255_0")->write(space, (offset-0x1a00) & 3,data); }
1657		else if(offset >= 0x1b00 && offset <= 0x1bff)   { ay8910_data_w(machine().device("ay"), 0,data); }
1658		else if(offset >= 0x1c00 && offset <= 0x1cff)   { ay8910_address_w(machine().device("ay"), 0,data); }
	1657	else if(offset >= 0x1b00 && offset <= 0x1bff)   { ay8910_data_w(machine().device("ay"), space, 0,data); }
	1658	else if(offset >= 0x1c00 && offset <= 0x1cff)   { ay8910_address_w(machine().device("ay"), space, 0,data); }
1659	1659	else if(offset >= 0x1d00 && offset <= 0x1dff)   { x1_rom_bank_1_w(space,0,data); }
1660	1660	else if(offset >= 0x1e00 && offset <= 0x1eff)   { x1_rom_bank_0_w(space,0,data); }
1661	1661	//  else if(offset >= 0x1f80 && offset <= 0x1f8f)   { z80dma_w(machine().device("dma"), 0,data); }
r17961	r17962
1684	1684	m_io_bank_mode = 0; //any read disables the extended mode.
1685	1685
1686	1686	// a * at the end states devices used on plain X1 too
1687		if(offset == 0x0700)                     { return (ym2151_r(machine().device("ym"), offset-0x0700) & 0x7f) | (ioport("SOUND_SW")->read() & 0x80); }
1688		else if(offset == 0x0701)                      { return ym2151_r(machine().device("ym"), offset-0x0700); }
	1687	if(offset == 0x0700)                     { return (ym2151_r(machine().device("ym"), space, offset-0x0700) & 0x7f) | (ioport("SOUND_SW")->read() & 0x80); }
	1688	else if(offset == 0x0701)                      { return ym2151_r(machine().device("ym"), space, offset-0x0700); }
1689	1689	//0x704 is FM sound detection port on X1 turboZ
1690	1690	else if(offset >= 0x0704 && offset <= 0x0707)   { return m_ctc->read(space,offset-0x0704); }
1691	1691	else if(offset == 0x0801)                  { printf("Color image board read\n"); return 0xff; } // *
r17961	r17962
1702	1702	else if(offset >= 0x1400 && offset <= 0x17ff)   { return x1_pcg_r(space, offset-0x1400); }
1703	1703	else if(offset >= 0x1900 && offset <= 0x19ff)   { return x1_sub_io_r(space, 0); }
1704	1704	else if(offset >= 0x1a00 && offset <= 0x1aff)   { return machine().device<i8255_device>("ppi8255_0")->read(space, (offset-0x1a00) & 3); }
1705		else if(offset >= 0x1b00 && offset <= 0x1bff)   { return ay8910_r(machine().device("ay"), 0); }
1706		else if(offset >= 0x1f80 && offset <= 0x1f8f)   { return z80dma_r(machine().device("dma"), 0); }
1707		else if(offset >= 0x1f90 && offset <= 0x1f93)   { return z80dart_ba_cd_r(machine().device("sio"), (offset-0x1f90) & 3); }
	1705	else if(offset >= 0x1b00 && offset <= 0x1bff)   { return ay8910_r(machine().device("ay"), space, 0); }
	1706	else if(offset >= 0x1f80 && offset <= 0x1f8f)   { return z80dma_r(machine().device("dma"), space, 0); }
	1707	else if(offset >= 0x1f90 && offset <= 0x1f93)   { return z80dart_ba_cd_r(machine().device("sio"), space, (offset-0x1f90) & 3); }
1708	1708	else if(offset >= 0x1f98 && offset <= 0x1f9f)   { printf("Extended SIO/CTC read %04x\n",offset); return 0xff; }
1709	1709	else if(offset >= 0x1fa0 && offset <= 0x1fa3)   { return m_ctc->read(space,offset-0x1fa0); }
1710	1710	else if(offset >= 0x1fa8 && offset <= 0x1fab)   { return m_ctc->read(space,offset-0x1fa8); }
r17961	r17962
1730	1730	{
1731	1731	// a * at the end states devices used on plain X1 too
1732	1732	if(m_io_bank_mode == 1)                    { x1_ex_gfxram_w(space, offset, data); }
1733		else if(offset == 0x0700 || offset == 0x0701)   { ym2151_w(machine().device("ym"), offset-0x0700,data); }
	1733	else if(offset == 0x0700 || offset == 0x0701)   { ym2151_w(machine().device("ym"), space, offset-0x0700,data); }
1734	1734	//0x704 is FM sound detection port on X1 turboZ
1735	1735	else if(offset >= 0x0704 && offset <= 0x0707)   { m_ctc->write(space,offset-0x0704,data); }
1736	1736	else if(offset == 0x0800)                  { printf("Color image board write %02x\n",data); } // *
r17961	r17962
1752	1752	else if(offset == 0x1800 || offset == 0x1801)   { x1_6845_w(space, offset-0x1800, data); }
1753	1753	else if(offset >= 0x1900 && offset <= 0x19ff)   { x1_sub_io_w(space, 0,data); }
1754	1754	else if(offset >= 0x1a00 && offset <= 0x1aff)   { machine().device<i8255_device>("ppi8255_0")->write(space, (offset-0x1a00) & 3,data); }
1755		else if(offset >= 0x1b00 && offset <= 0x1bff)   { ay8910_data_w(machine().device("ay"), 0,data); }
1756		else if(offset >= 0x1c00 && offset <= 0x1cff)   { ay8910_address_w(machine().device("ay"), 0,data); }
	1755	else if(offset >= 0x1b00 && offset <= 0x1bff)   { ay8910_data_w(machine().device("ay"), space, 0,data); }
	1756	else if(offset >= 0x1c00 && offset <= 0x1cff)   { ay8910_address_w(machine().device("ay"), space, 0,data); }
1757	1757	else if(offset >= 0x1d00 && offset <= 0x1dff)   { x1_rom_bank_1_w(space,0,data); }
1758	1758	else if(offset >= 0x1e00 && offset <= 0x1eff)   { x1_rom_bank_0_w(space,0,data); }
1759		else if(offset >= 0x1f80 && offset <= 0x1f8f)   { z80dma_w(machine().device("dma"), 0,data); }
1760		else if(offset >= 0x1f90 && offset <= 0x1f93)   { z80dart_ba_cd_w(machine().device("sio"), (offset-0x1f90) & 3,data); }
	1759	else if(offset >= 0x1f80 && offset <= 0x1f8f)   { z80dma_w(machine().device("dma"), space, 0,data); }
	1760	else if(offset >= 0x1f90 && offset <= 0x1f93)   { z80dart_ba_cd_w(machine().device("sio"), space, (offset-0x1f90) & 3,data); }
1761	1761	else if(offset >= 0x1f98 && offset <= 0x1f9f)   { printf("Extended SIO/CTC write %04x %02x\n",offset,data); }
1762	1762	else if(offset >= 0x1fa0 && offset <= 0x1fa3)   { m_ctc->write(space,offset-0x1fa0,data); }
1763	1763	else if(offset >= 0x1fa8 && offset <= 0x1fab)   { m_ctc->write(space,offset-0x1fa8,data); }
r17961	r17962
2295	2295	#if 0
2296	2296	static const z80sio_interface sio_intf =
2297	2297	{
2298		0,               /* interrupt handler */
2299		0,               /* DTR changed handler */
2300		0,               /* RTS changed handler */
2301		0,               /* BREAK changed handler */
2302		0,               /* transmit handler */
2303		0               /* receive handler */
	2298	DEVCB_NULL,               /* interrupt handler */
	2299	DEVCB_NULL,               /* DTR changed handler */
	2300	DEVCB_NULL,               /* RTS changed handler */
	2301	DEVCB_NULL,               /* BREAK changed handler */
	2302	DEVCB_NULL,               /* transmit handler */
	2303	DEVCB_NULL               /* receive handler */
2304	2304	};
2305	2305	#endif
2306	2306

trunk/src/mess/drivers/palm.c

r17961	r17962
171	171	{
172	172	"maincpu",
173	173
174		NULL,                   // Port A Output
175		NULL,                   // Port B Output
176		NULL,                   // Port C Output
177		NULL,                   // Port D Output
178		NULL,                   // Port E Output
179		palm_port_f_out,        // Port F Output
180		NULL,                   // Port G Output
181		NULL,                   // Port J Output
182		NULL,                   // Port K Output
183		NULL,                   // Port M Output
	174	DEVCB_NULL,                   // Port A Output
	175	DEVCB_NULL,                   // Port B Output
	176	DEVCB_NULL,                   // Port C Output
	177	DEVCB_NULL,                   // Port D Output
	178	DEVCB_NULL,                   // Port E Output
	179	DEVCB_HANDLER(palm_port_f_out),// Port F Output
	180	DEVCB_NULL,                   // Port G Output
	181	DEVCB_NULL,                   // Port J Output
	182	DEVCB_NULL,                   // Port K Output
	183	DEVCB_NULL,                   // Port M Output
184	184
185		NULL,                   // Port A Input
186		NULL,                   // Port B Input
187		palm_port_c_in,         // Port C Input
188		NULL,                   // Port D Input
189		NULL,                   // Port E Input
190		palm_port_f_in,         // Port F Input
191		NULL,                   // Port G Input
192		NULL,                   // Port J Input
193		NULL,                   // Port K Input
194		NULL,                   // Port M Input
	185	DEVCB_NULL,                   // Port A Input
	186	DEVCB_NULL,                   // Port B Input
	187	DEVCB_HANDLER(palm_port_c_in),// Port C Input
	188	DEVCB_NULL,                   // Port D Input
	189	DEVCB_NULL,                   // Port E Input
	190	DEVCB_HANDLER(palm_port_f_in),// Port F Input
	191	DEVCB_NULL,                   // Port G Input
	192	DEVCB_NULL,                   // Port J Input
	193	DEVCB_NULL,                   // Port K Input
	194	DEVCB_NULL,                   // Port M Input
195	195
196		palm_dac_transition,
	196	DEVCB_HANDLER(palm_dac_transition),
197	197
198		palm_spim_out,
199		palm_spim_in,
	198	DEVCB_HANDLER(palm_spim_out),
	199	DEVCB_HANDLER(palm_spim_in),
200	200	palm_spim_exchange
201	201	};
202	202

trunk/src/mess/drivers/smc777.c

r17961	r17962
366	366	switch(offset)
367	367	{
368	368	case 0x00:
369		return wd17xx_status_r(dev,offset) ^ 0xff;
	369	return wd17xx_status_r(dev,space, offset) ^ 0xff;
370	370	case 0x01:
371		return wd17xx_track_r(dev,offset) ^ 0xff;
	371	return wd17xx_track_r(dev,space, offset) ^ 0xff;
372	372	case 0x02:
373		return wd17xx_sector_r(dev,offset) ^ 0xff;
	373	return wd17xx_sector_r(dev,space, offset) ^ 0xff;
374	374	case 0x03:
375		return wd17xx_data_r(dev,offset) ^ 0xff;
	375	return wd17xx_data_r(dev,space, offset) ^ 0xff;
376	376	case 0x04: //irq / drq status
377	377	//popmessage("%02x %02x\n",m_fdc_irq_flag,m_fdc_drq_flag);
378	378
r17961	r17962
391	391	switch(offset)
392	392	{
393	393	case 0x00:
394		wd17xx_command_w(dev,offset,data ^ 0xff);
	394	wd17xx_command_w(dev,space, offset,data ^ 0xff);
395	395	break;
396	396	case 0x01:
397		wd17xx_track_w(dev,offset,data ^ 0xff);
	397	wd17xx_track_w(dev,space, offset,data ^ 0xff);
398	398	break;
399	399	case 0x02:
400		wd17xx_sector_w(dev,offset,data ^ 0xff);
	400	wd17xx_sector_w(dev,space, offset,data ^ 0xff);
401	401	break;
402	402	case 0x03:
403		wd17xx_data_w(dev,offset,data ^ 0xff);
	403	wd17xx_data_w(dev,space, offset,data ^ 0xff);
404	404	break;
405	405	case 0x04:
406	406	// ---- xxxx select floppy drive (yes, 15 of them, A to P)

trunk/src/mess/drivers/ace.c

r17961	r17962
507	507
508	508	if (!BIT(data, 6))
509	509	{
510		sp0256_ALD_w(device, 0, data & 0x3f);
	510	sp0256_ALD_w(device, space, 0, data & 0x3f);
511	511	}
512	512	}
513	513

trunk/src/mess/drivers/m20.c

r17961	r17962
231	231
232	232	READ16_MEMBER(m20_state::m20_i8259_r)
233	233	{
234		return pic8259_r(m_i8259, offset)<<1;
	234	return pic8259_r(m_i8259, space, offset)<<1;
235	235	}
236	236
237	237	WRITE16_MEMBER(m20_state::m20_i8259_w)
238	238	{
239		pic8259_w(m_i8259, offset, (data>>1));
	239	pic8259_w(m_i8259, space, offset, (data>>1));
240	240	}
241	241
242	242	WRITE_LINE_MEMBER( m20_state::pic_irq_line_w )
r17961	r17962
380	380	m_maincpu->set_irq_acknowledge_callback(m20_irq_callback);
381	381
382	382	wd17xx_mr_w(m_wd177x, 0);
383		//wd17xx_mr_w(m_wd177x, 1);
	383	//wd17xx_mr_w(m_wd177x, space, 1);
384	384
385	385	memcpy(RAM, ROM, 8);  // we need only the reset vector
386	386	m_maincpu->reset();     // reset the CPU to ensure it picks up the new vector

trunk/src/mess/drivers/plus4.c

r17961	r17962
157	157
158	158	if (!scs && m_t6721)
159	159	{
160		data = t6721_speech_r(m_t6721, offset & 0x03);
	160	data = t6721_speech_r(m_t6721, space, offset & 0x03);
161	161	}
162	162	else if (!user)
163	163	{
r17961	r17962
286	286
287	287	if (!scs && m_t6721)
288	288	{
289		t6721_speech_w(m_t6721, offset & 0x03, data);
	289	t6721_speech_w(m_t6721, space, offset & 0x03, data);
290	290	}
291	291	else if (!user && m_spi_user)
292	292	{

trunk/src/mess/drivers/ip22.c

r17961	r17962
246	246	switch( offset )
247	247	{
248	248	case 0x004/4:
249		ret8 = pc_lpt_control_r(lpt, 0) ^ 0x0d;
	249	ret8 = pc_lpt_control_r(lpt, space, 0) ^ 0x0d;
250	250	//verboselog(( machine, 0, "Parallel Control Read: %02x\n", ret8 );
251	251	return ret8;
252	252	case 0x008/4:
253		ret8 = pc_lpt_status_r(lpt, 0) ^ 0x80;
	253	ret8 = pc_lpt_status_r(lpt, space, 0) ^ 0x80;
254	254	//verboselog(( machine, 0, "Parallel Status Read: %02x\n", ret8 );
255	255	return ret8;
256	256	case 0x030/4:
r17961	r17962
290	290	//      mame_printf_info("INT3: r @ %x mask %08x (PC=%x)\n", offset*4, mem_mask, activecpu_get_pc());
291	291	return m_int3_regs[offset-0x80/4];
292	292	case 0xb0/4:
293		ret8 = pit8253_r(machine().device("pit8254"), 0);
	293	ret8 = pit8253_r(machine().device("pit8254"), space, 0);
294	294	//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 0 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
295	295	return ret8;
296	296	case 0xb4/4:
297		ret8 = pit8253_r(machine().device("pit8254"), 1);
	297	ret8 = pit8253_r(machine().device("pit8254"), space, 1);
298	298	//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 1 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
299	299	return ret8;
300	300	case 0xb8/4:
301		ret8 = pit8253_r(machine().device("pit8254"), 2);
	301	ret8 = pit8253_r(machine().device("pit8254"), space, 2);
302	302	//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 2 Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
303	303	return ret8;
304	304	case 0xbc/4:
305		ret8 = pit8253_r(machine().device("pit8254"), 3);
	305	ret8 = pit8253_r(machine().device("pit8254"), space, 3);
306	306	//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Control Word Register Read: 0x%02x (%08x)\n", ret8, mem_mask );
307	307	return ret8;
308	308	default:
r17961	r17962
321	321	{
322	322	case 0x004/4:
323	323	//verboselog(( machine, 0, "Parallel Control Write: %08x\n", data );
324		pc_lpt_control_w(lpt, 0, data ^ 0x0d);
	324	pc_lpt_control_w(lpt, space, 0, data ^ 0x0d);
325	325	//m_nIOC_ParCntl = data;
326	326	break;
327	327	case 0x030/4:
r17961	r17962
395	395	break;
396	396	case 0xb0/4:
397	397	//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 0 Register Write: 0x%08x (%08x)\n", data, mem_mask );
398		pit8253_w(machine().device("pit8254"), 0, data & 0x000000ff);
	398	pit8253_w(machine().device("pit8254"), space, 0, data & 0x000000ff);
399	399	return;
400	400	case 0xb4/4:
401	401	//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 1 Register Write: 0x%08x (%08x)\n", data, mem_mask );
402		pit8253_w(machine().device("pit8254"), 1, data & 0x000000ff);
	402	pit8253_w(machine().device("pit8254"), space, 1, data & 0x000000ff);
403	403	return;
404	404	case 0xb8/4:
405	405	//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Counter 2 Register Write: 0x%08x (%08x)\n", data, mem_mask );
406		pit8253_w(machine().device("pit8254"), 2, data & 0x000000ff);
	406	pit8253_w(machine().device("pit8254"), space, 2, data & 0x000000ff);
407	407	return;
408	408	case 0xbc/4:
409	409	//verboselog(( machine, 0, "HPC PBUS6 IOC4 Timer Control Word Register Write: 0x%08x (%08x)\n", data, mem_mask );
410		pit8253_w(machine().device("pit8254"), 3, data & 0x000000ff);
	410	pit8253_w(machine().device("pit8254"), space, 3, data & 0x000000ff);
411	411	return;
412	412	default:
413	413	//verboselog(( machine, 0, "Unknown HPC PBUS6 Write: 0x%08x: 0x%08x (%08x)\n", 0x1fbd9800 + ( offset << 2 ), data, mem_mask );

trunk/src/mess/drivers/c128.c

r17961	r17962
968	968
969	969	READ8_MEMBER( c128_state::sid_potx_r )
970	970	{
971		UINT8 cia1_pa = mos6526_pa_r(m_cia1, 0);
	971	UINT8 cia1_pa = mos6526_pa_r(m_cia1, space, 0);
972	972
973	973	int sela = BIT(cia1_pa, 6);
974	974	int selb = BIT(cia1_pa, 7);
r17961	r17962
983	983
984	984	READ8_MEMBER( c128_state::sid_poty_r )
985	985	{
986		UINT8 cia1_pa = mos6526_pa_r(m_cia1, 0);
	986	UINT8 cia1_pa = mos6526_pa_r(m_cia1, space, 0);
987	987
988	988	int sela = BIT(cia1_pa, 6);
989	989	int selb = BIT(cia1_pa, 7);

trunk/src/mess/drivers/mikromik.c

r17961	r17962
96	96	break;
97	97
98	98	case 2:
99		data = i8275_r(m_crtc, offset & 0x01);
	99	data = i8275_r(m_crtc, space, offset & 0x01);
100	100	break;
101	101
102	102	case 3:
103		data = pit8253_r(m_pit, offset & 0x03);
	103	data = pit8253_r(m_pit, space, offset & 0x03);
104	104	break;
105	105
106	106	case 4:
r17961	r17962
110	110	case 5:
111	111	if (BIT(offset, 0))
112	112	{
113		data = upd765_data_r(m_fdc, 0);
	113	data = upd765_data_r(m_fdc, space, 0);
114	114	}
115	115	else
116	116	{
117		data = upd765_status_r(m_fdc, 0);
	117	data = upd765_status_r(m_fdc, space, 0);
118	118	}
119	119	break;
120	120
r17961	r17962
165	165	break;
166	166
167	167	case 2:
168		i8275_w(m_crtc, offset & 0x01, data);
	168	i8275_w(m_crtc, space, offset & 0x01, data);
169	169	break;
170	170
171	171	case 3:
172		pit8253_w(m_pit, offset & 0x03, data);
	172	pit8253_w(m_pit, space, offset & 0x03, data);
173	173	break;
174	174
175	175	case 4:
r17961	r17962
179	179	case 5:
180	180	if (BIT(offset, 0))
181	181	{
182		upd765_data_w(m_fdc, 0, data);
	182	upd765_data_w(m_fdc, space, 0, data);
183	183	}
184	184	break;
185	185

trunk/src/mess/drivers/pcw.c

r17961	r17962
641	641	/* from Jacob Nevins docs. FDC I/O is not fully decoded */
642	642	if (offset & 1)
643	643	{
644		return upd765_data_r(fdc, 0);
	644	return upd765_data_r(fdc, space, 0);
645	645	}
646	646
647		return upd765_status_r(fdc, 0);
	647	return upd765_status_r(fdc, space, 0);
648	648	}
649	649
650	650	WRITE8_MEMBER(pcw_state::pcw_fdc_w)
r17961	r17962
653	653	/* from Jacob Nevins docs. FDC I/O is not fully decoded */
654	654	if (offset & 1)
655	655	{
656		upd765_data_w(fdc, 0,data);
	656	upd765_data_w(fdc, space, 0,data);
657	657	}
658	658	}
659	659

trunk/src/mess/drivers/osi.c

r17961	r17962
270	270	m_keylatch = data;
271	271
272	272	if (ioport("Sound")->read())
273		discrete_sound_w(m_discrete, NODE_01, (data >> 2) & 0x0f);
	273	discrete_sound_w(m_discrete, space, NODE_01, (data >> 2) & 0x0f);
274	274	}
275	275
276	276	WRITE8_MEMBER( uk101_state::keyboard_w )
r17961	r17962
298	298	m_32 = BIT(data, 0);
299	299	m_coloren = BIT(data, 1);
300	300
301		discrete_sound_w(m_discrete, NODE_10, BIT(data, 4));
	301	discrete_sound_w(m_discrete, space, NODE_10, BIT(data, 4));
302	302	}
303	303
304	304	WRITE8_MEMBER( c1p_state::osi630_ctrl_w )

trunk/src/mess/drivers/rt1715.c

r17961	r17962
274	274
275	275	static const z80sio_interface rt1715_sio_intf =
276	276	{
277		NULL,
278		NULL,
279		NULL,
280		NULL,
281		NULL,
282		NULL
	277	DEVCB_NULL,
	278	DEVCB_NULL,
	279	DEVCB_NULL,
	280	DEVCB_NULL,
	281	DEVCB_NULL,
	282	DEVCB_NULL
283	283	};
284	284
285	285	static const z80pio_interface rt1715_pio_data_intf =

trunk/src/mess/drivers/at.c

r17961	r17962
165	165	READ32_MEMBER( at_state::ct486_chipset_r )
166	166	{
167	167	if (ACCESSING_BITS_0_7)
168		return pic8259_r(m_pic8259_master, 0);
	168	return pic8259_r(m_pic8259_master, space, 0);
169	169
170	170	if (ACCESSING_BITS_8_15)
171		return pic8259_r(m_pic8259_master, 1) << 8;
	171	return pic8259_r(m_pic8259_master, space, 1) << 8;
172	172
173	173	if (ACCESSING_BITS_24_31)
174	174	return m_cs4031->data_r(space, 0, 0) << 24;
r17961	r17962
179	179	WRITE32_MEMBER( at_state::ct486_chipset_w )
180	180	{
181	181	if (ACCESSING_BITS_0_7)
182		pic8259_w(m_pic8259_master, 0, data);
	182	pic8259_w(m_pic8259_master, space, 0, data);
183	183
184	184	if (ACCESSING_BITS_8_15)
185		pic8259_w(m_pic8259_master, 1, data >> 8);
	185	pic8259_w(m_pic8259_master, space, 1, data >> 8);
186	186
187	187	if (ACCESSING_BITS_16_23)
188	188	m_cs4031->address_w(space, 0, data >> 16, 0);

trunk/src/mess/drivers/ql.c

r17961	r17962
268	268
269	269	switch (offset)
270	270	{
271		case 0x0000   : result=wd17xx_r(m_fdc, offset); break;
272		case 0x0001   : result=wd17xx_r(m_fdc, offset); break;
273		case 0x0002   : result=wd17xx_r(m_fdc, offset); break;
274		case 0x0003   : result=wd17xx_r(m_fdc, offset); break;
	271	case 0x0000   : result=wd17xx_r(m_fdc, space, offset); break;
	272	case 0x0001   : result=wd17xx_r(m_fdc, space, offset); break;
	273	case 0x0002   : result=wd17xx_r(m_fdc, space, offset); break;
	274	case 0x0003   : result=wd17xx_r(m_fdc, space, offset); break;
275	275	default      : logerror("%s DiskIO undefined read : from %08X\n",machine().describe_context(),m_disk_io_base+offset); break;
276	276	}
277	277
r17961	r17962
285	285
286	286	switch (offset)
287	287	{
288		case 0x0000   : wd17xx_w(m_fdc, offset, data); break;
289		case 0x0001   : wd17xx_w(m_fdc, offset, data); break;
290		case 0x0002   : wd17xx_w(m_fdc, offset, data); break;
291		case 0x0003   : wd17xx_w(m_fdc, offset, data); break;
	288	case 0x0000   : wd17xx_w(m_fdc, space, offset, data); break;
	289	case 0x0001   : wd17xx_w(m_fdc, space, offset, data); break;
	290	case 0x0002   : wd17xx_w(m_fdc, space, offset, data); break;
	291	case 0x0003   : wd17xx_w(m_fdc, space, offset, data); break;
292	292	case 0x0004 : if(m_disk_type==DISK_TYPE_SANDY)
293	293	sandy_set_control(data);break;
294	294	case 0x0008 : if(m_disk_type==DISK_TYPE_SANDY)

trunk/src/mess/drivers/amiga.c

r17961	r17962
48	48	DECLARE_MACHINE_RESET(cdtv);
49	49	};
50	50
51		static READ8_DEVICE_HANDLER( amiga_cia_0_portA_r );
52		static READ8_DEVICE_HANDLER( amiga_cia_0_cdtv_portA_r );
53		static WRITE8_DEVICE_HANDLER( amiga_cia_0_portA_w );
	51	static DECLARE_READ8_DEVICE_HANDLER( amiga_cia_0_portA_r );
	52	static DECLARE_READ8_DEVICE_HANDLER( amiga_cia_0_cdtv_portA_r );
	53	static DECLARE_WRITE8_DEVICE_HANDLER( amiga_cia_0_portA_w );
54	54
55	55	/***************************************************************************
56	56	Battery Backed-Up Clock (MSM6264)

trunk/src/mess/drivers/sorcerer.c

r17961	r17962
390	390	AY_3_1015,
391	391	4800.0,
392	392	4800.0,
393		NULL,
394		NULL,
395		NULL
	393	DEVCB_NULL,
	394	DEVCB_NULL,
	395	DEVCB_NULL
396	396	};
397	397
398	398

trunk/src/mess/drivers/abc80x.c

r17961	r17962
161	161	{
162	162	m_pling = !m_pling;
163	163
164		discrete_sound_w(m_discrete, NODE_01, m_pling);
	164	discrete_sound_w(m_discrete, space, NODE_01, m_pling);
165	165
166	166	return 0xff;
167	167	}
r17961	r17962
175	175	{
176	176	m_pling = !m_pling;
177	177
178		discrete_sound_w(m_discrete, NODE_01, m_pling);
	178	discrete_sound_w(m_discrete, space, NODE_01, m_pling);
179	179
180	180	return 0xff;
181	181	}

trunk/src/mess/drivers/bigbord2.c

r17961	r17962
385	385
386	386	/* Z80 SIO */
387	387
388		static void bigbord2_interrupt(device_t *device, int state)
	388	static WRITE_LINE_DEVICE_HANDLER( bigbord2_interrupt )
389	389	{
390	390	device->machine().device(Z80_TAG)->execute().set_input_line(0, state);
391	391	}
392	392
393	393	const z80sio_interface sio_intf =
394	394	{
395		bigbord2_interrupt,   /* interrupt handler */
396		0,         /* DTR changed handler */
397		0,         /* RTS changed handler */
398		0,         /* BREAK changed handler */
399		0,         /* transmit handler - which channel is this for? */
400		0         /* receive handler - which channel is this for? */
	395	DEVCB_LINE(bigbord2_interrupt),   /* interrupt handler */
	396	DEVCB_NULL,         /* DTR changed handler */
	397	DEVCB_NULL,         /* RTS changed handler */
	398	DEVCB_NULL,         /* BREAK changed handler */
	399	DEVCB_NULL,         /* transmit handler - which channel is this for? */
	400	DEVCB_NULL         /* receive handler - which channel is this for? */
401	401	};
402	402
403	403

trunk/src/mess/drivers/fmtowns.c

r17961	r17962
393	393	READ8_MEMBER(towns_state::towns_dma1_r)
394	394	{
395	395	//  logerror("DMA#1: read register %i\n",offset);
396		return upd71071_r(m_dma_1,offset);
	396	return upd71071_r(m_dma_1,space, offset);
397	397	}
398	398
399	399	WRITE8_MEMBER(towns_state::towns_dma1_w)
400	400	{
401	401	//  logerror("DMA#1: wrote 0x%02x to register %i\n",data,offset);
402		upd71071_w(m_dma_1,offset,data);
	402	upd71071_w(m_dma_1,space, offset,data);
403	403	}
404	404
405	405	READ8_MEMBER(towns_state::towns_dma2_r)
406	406	{
407	407	logerror("DMA#2: read register %i\n",offset);
408		return upd71071_r(m_dma_2,offset);
	408	return upd71071_r(m_dma_2,space, offset);
409	409	}
410	410
411	411	WRITE8_MEMBER(towns_state::towns_dma2_w)
412	412	{
413	413	logerror("DMA#2: wrote 0x%02x to register %i\n",data,offset);
414		upd71071_w(m_dma_2,offset,data);
	414	upd71071_w(m_dma_2,space, offset,data);
415	415	}
416	416
417	417	/*
r17961	r17962
440	440	switch(offset)
441	441	{
442	442	case 0x00:
443		return wd17xx_status_r(fdc,offset/2);
	443	return wd17xx_status_r(fdc,space, offset/2);
444	444	case 0x02:
445		return wd17xx_track_r(fdc,offset/2);
	445	return wd17xx_track_r(fdc,space, offset/2);
446	446	case 0x04:
447		return wd17xx_sector_r(fdc,offset/2);
	447	return wd17xx_sector_r(fdc,space, offset/2);
448	448	case 0x06:
449		return wd17xx_data_r(fdc,offset/2);
	449	return wd17xx_data_r(fdc,space, offset/2);
450	450	case 0x08:  // selected drive status?
451	451	//logerror("FDC: read from offset 0x08\n");
452	452	ret = 0x80;  // always set
r17961	r17962
492	492	return;
493	493	if(data == 0xfe)
494	494	return;
495		wd17xx_command_w(fdc,offset/2,data);
	495	wd17xx_command_w(fdc,space, offset/2,data);
496	496	break;
497	497	case 0x02:
498		wd17xx_track_w(fdc,offset/2,data);
	498	wd17xx_track_w(fdc,space, offset/2,data);
499	499	break;
500	500	case 0x04:
501		wd17xx_sector_w(fdc,offset/2,data);
	501	wd17xx_sector_w(fdc,space, offset/2,data);
502	502	break;
503	503	case 0x06:
504		wd17xx_data_w(fdc,offset/2,data);
	504	wd17xx_data_w(fdc,space, offset/2,data);
505	505	break;
506	506	case 0x08:
507	507	// bit 5 - CLKSEL
r17961	r17962
550	550	{
551	551	towns_state* state = machine.driver_data<towns_state>();
552	552	device_t* fdc = state->m_fdc;
553		return wd17xx_data_r(fdc,0);
	553	return wd17xx_data_r(fdc,state->generic_space(), 0);
554	554	}
555	555
556	556	static void towns_fdc_dma_w(running_machine &machine, UINT16 data)
557	557	{
558	558	towns_state* state = machine.driver_data<towns_state>();
559	559	device_t* fdc = state->m_fdc;
560		wd17xx_data_w(fdc,0,data);
	560	wd17xx_data_w(fdc,state->generic_space(), 0,data);
561	561	}
562	562
563	563	/*

trunk/src/mess/drivers/mz2500.c

r17961	r17962
1253	1253	static READ8_DEVICE_HANDLER( mz2500_wd17xx_r )
1254	1254	{
1255	1255	mz2500_state *state = device->machine().driver_data<mz2500_state>();
1256		return wd17xx_r(device, offset) ^ state->m_fdc_reverse;
	1256	return wd17xx_r(device, space, offset) ^ state->m_fdc_reverse;
1257	1257	}
1258	1258
1259	1259	static WRITE8_DEVICE_HANDLER( mz2500_wd17xx_w )
1260	1260	{
1261	1261	mz2500_state *state = device->machine().driver_data<mz2500_state>();
1262		wd17xx_w(device, offset, data ^ state->m_fdc_reverse);
	1262	wd17xx_w(device, space, offset, data ^ state->m_fdc_reverse);
1263	1263	}
1264	1264
1265	1265	READ8_MEMBER(mz2500_state::mz2500_bplane_latch_r)
r17961	r17962
2084	2084
2085	2085	static const z80sio_interface mz2500_sio_intf =
2086	2086	{
2087		NULL,
2088		NULL,
2089		NULL,
2090		NULL,
2091		NULL,
2092		NULL
	2087	DEVCB_NULL,
	2088	DEVCB_NULL,
	2089	DEVCB_NULL,
	2090	DEVCB_NULL,
	2091	DEVCB_NULL,
	2092	DEVCB_NULL
2093	2093	};
2094	2094
2095	2095	static MACHINE_CONFIG_START( mz2500, mz2500_state )

trunk/src/mess/drivers/nascom1.c

r17961	r17962
257	257	AY_3_1015,
258	258	( XTAL_16MHz / 16 ) / 256,
259	259	( XTAL_16MHz / 16 ) / 256,
260		nascom1_hd6402_si,
261		nascom1_hd6402_so,
262		NULL
	260	DEVCB_HANDLER(nascom1_hd6402_si),
	261	DEVCB_HANDLER(nascom1_hd6402_so),
	262	DEVCB_NULL
263	263	};
264	264
265	265

trunk/src/mess/drivers/wangpc.c

r17961	r17962
715	715	if (m_disable_dreq2)
716	716	return m_bus->dack_r(space, 2);
717	717	else
718		return upd765_dack_r(m_fdc, 0);
	718	return upd765_dack_r(m_fdc, space, 0);
719	719	}
720	720
721	721	WRITE8_MEMBER( wangpc_state::iow2_w )
r17961	r17962
723	723	if (m_disable_dreq2)
724	724	m_bus->dack_w(space, 2, data);
725	725	else
726		upd765_dack_w(m_fdc, 0, data);
	726	upd765_dack_w(m_fdc, space, 0, data);
727	727	}
728	728
729	729	WRITE_LINE_MEMBER( wangpc_state::dack0_w )

trunk/src/mess/drivers/multi8.c

r17961	r17962
326	326	}
327	327	}
328	328
329		READ8_MEMBER(multi8_state::ay8912_0_r){ return ay8910_r(machine().device("aysnd"),0); }
330		READ8_MEMBER(multi8_state::ay8912_1_r){ return ay8910_r(machine().device("aysnd"),1); }
	329	READ8_MEMBER(multi8_state::ay8912_0_r){ return ay8910_r(machine().device("aysnd"),space, 0); }
	330	READ8_MEMBER(multi8_state::ay8912_1_r){ return ay8910_r(machine().device("aysnd"),space, 1); }
331	331
332	332	READ8_MEMBER( multi8_state::multi8_kanji_r )
333	333	{

trunk/src/mess/drivers/ssystem3.c

r17961	r17962
202	202	static WRITE8_DEVICE_HANDLER(ssystem3_via_write_b)
203	203	{
204	204	via6522_device *via_0 = device->machine().device<via6522_device>("via6522_0");
205		address_space* space = device->machine().device("maincpu")->memory().space(AS_PROGRAM);
206	205	UINT8 d;
207	206
208	207	ssystem3_playfield_write(device->machine(), data&1, data&8);
209	208	ssystem3_lcd_write(device->machine(), data&4, data&2);
210	209
211		d=ssystem3_via_read_b(via_0, 0)&~0x40;
	210	d=ssystem3_via_read_b(via_0, space, 0, mem_mask)&~0x40;
212	211	if (data&0x80) d|=0x40;
213	212	//  d&=~0x8f;
214		via_0->write_portb(*space,0, d );
	213	via_0->write_portb(space,0, d );
215	214	}
216	215
217	216	static const via6522_interface ssystem3_via_config=

trunk/src/mess/drivers/ng_aes.c

r17961	r17962
330	330	case 0x00: select_controller(machine(), data & 0x00ff); break;
331	331	//  case 0x18: set_output_latch(machine(), data & 0x00ff); break;
332	332	//  case 0x20: set_output_data(machine(), data & 0x00ff); break;
333		case 0x28: upd4990a_control_16_w(m_upd4990a, 0, data, mem_mask); break;
	333	case 0x28: upd4990a_control_16_w(m_upd4990a, space, 0, data, mem_mask); break;
334	334	//  case 0x30: break; // coin counters
335	335	//  case 0x31: break; // coin counters
336	336	//  case 0x32: break; // coin lockout
r17961	r17962
379	379	static CUSTOM_INPUT( get_calendar_status )
380	380	{
381	381	neogeo_state *state = field.machine().driver_data<neogeo_state>();
382		return (upd4990a_databit_r(state->m_upd4990a, 0) << 1) | upd4990a_testbit_r(state->m_upd4990a, 0);
	382	return (upd4990a_databit_r(state->m_upd4990a, state->generic_space(), 0) << 1) | upd4990a_testbit_r(state->m_upd4990a, state->generic_space(), 0);
383	383	}
384	384
385	385

trunk/src/mess/drivers/bml3.c

r17961	r17962
330	330	bml3_state *state = device->machine().driver_data<bml3_state>();
331	331	UINT8 dev_offs = ((state->m_psg_latch & 3) != 3);
332	332
333		return ym2203_r(device,dev_offs);
	333	return ym2203_r(device,space, dev_offs);
334	334	}
335	335
336	336	static WRITE8_DEVICE_HANDLER( bml3_ym2203_w )
r17961	r17962
338	338	bml3_state *state = device->machine().driver_data<bml3_state>();
339	339	UINT8 dev_offs = ((state->m_psg_latch & 3) != 3);
340	340
341		ym2203_w(device,dev_offs,data);
	341	ym2203_w(device,space, dev_offs,data);
342	342	}
343	343
344	344	READ8_MEMBER( bml3_state::bml3_vram_attr_r)

trunk/src/mess/drivers/trs80.c

r17961	r17962
557	557	AY_3_1015,
558	558	0.0,
559	559	0.0,
560		NULL,
561		NULL,
562		NULL
	560	DEVCB_NULL,
	561	DEVCB_NULL,
	562	DEVCB_NULL
563	563	};
564	564
565	565	static const floppy_interface trs80_floppy_interface =

trunk/src/mess/drivers/abc1600.c

r17961	r17962
182	182	else if (offset < 0x180000)
183	183	{
184	184	// video RAM
185		address_space *program = m_maincpu->space(AS_PROGRAM);
186		data = video_ram_r(*program, offset);
	185	address_space &program = *m_maincpu->space(AS_PROGRAM);
	186	data = video_ram_r(program, offset);
187	187	}
188	188	else
189	189	{
r17961	r17962
209	209	else if (offset < 0x180000)
210	210	{
211	211	// video RAM
212		address_space *program = m_maincpu->space(AS_PROGRAM);
213		video_ram_w(*program, offset, data);
	212	address_space &program = *m_maincpu->space(AS_PROGRAM);
	213	video_ram_w(program, offset, data);
214	214	}
215	215	else
216	216	{
r17961	r17962
242	242
243	243	UINT8 abc1600_state::read_internal_io(offs_t offset)
244	244	{
245		address_space *program = m_maincpu->space(AS_PROGRAM);
	245	address_space &program = *m_maincpu->space(AS_PROGRAM);
246	246	UINT8 data = 0;
247	247
248	248	if (X11)
r17961	r17962
250	250	switch (A10_A9_A8)
251	251	{
252	252	case IORD0:
253		data = iord0_r(*program, offset);
	253	data = iord0_r(program, offset);
254	254	break;
255	255
256	256	default:
r17961	r17962
262	262	switch (A10_A9_A8)
263	263	{
264	264	case FLP:
265		data = wd17xx_r(m_fdc, A2_A1);
	265	data = wd17xx_r(m_fdc, program, A2_A1);
266	266	break;
267	267
268	268	case CRT:
269	269	if (A0)
270		data = m_crtc->register_r(*program, offset);
	270	data = m_crtc->register_r(program, offset);
271	271	else
272		data = m_crtc->status_r(*program, offset);
	272	data = m_crtc->status_r(program, offset);
273	273	break;
274	274
275	275	case DRT:
276		data = z80dart_ba_cd_r(m_dart, A2_A1 ^ 0x03);
	276	data = z80dart_ba_cd_r(m_dart, program, A2_A1 ^ 0x03);
277	277	break;
278	278
279	279	case DMA0:
r17961	r17962
289	289	break;
290	290
291	291	case SCC:
292		data = m_scc->reg_r(*program, A1_A2);
	292	data = m_scc->reg_r(program, A1_A2);
293	293	break;
294	294
295	295	case CIO:
296		data = m_cio->read(*program, A2_A1);
	296	data = m_cio->read(program, A2_A1);
297	297	break;
298	298	}
299	299	}
r17961	r17962
467	467
468	468	void abc1600_state::write_internal_io(offs_t offset, UINT8 data)
469	469	{
470		address_space *program = m_maincpu->space(AS_PROGRAM);
	470	address_space &program = *m_maincpu->space(AS_PROGRAM);
471	471
472	472	if (X11)
473	473	{
474	474	switch (A10_A9_A8)
475	475	{
476	476	case IOWR0:
477		iowr0_w(*program, offset, data);
	477	iowr0_w(program, offset, data);
478	478	break;
479	479
480	480	case IOWR1:
481		iowr1_w(*program, offset, data);
	481	iowr1_w(program, offset, data);
482	482	break;
483	483
484	484	case IOWR2:
485		iowr2_w(*program, offset, data);
	485	iowr2_w(program, offset, data);
486	486	break;
487	487
488	488	case FW:
489	489	if (!A7)
490	490	{
491	491	if (A0)
492		fw1_w(*program, offset, data);
	492	fw1_w(program, offset, data);
493	493	else
494		fw0_w(*program, offset, data);
	494	fw0_w(program, offset, data);
495	495	}
496	496	else
497	497	{
r17961	r17962
500	500	break;
501	501
502	502	case DMAMAP:
503		dmamap_w(*program, offset, data);
	503	dmamap_w(program, offset, data);
504	504	break;
505	505
506	506	case SPEC_CONTR_REG:
507		spec_contr_reg_w(*program, offset, data);
	507	spec_contr_reg_w(program, offset, data);
508	508	break;
509	509
510	510	default:
r17961	r17962
516	516	switch (A10_A9_A8)
517	517	{
518	518	case FLP:
519		wd17xx_w(m_fdc, A2_A1, data);
	519	wd17xx_w(m_fdc, program, A2_A1, data);
520	520	break;
521	521
522	522	case CRT:
523	523	if (A0)
524		m_crtc->register_w(*program, offset, data);
	524	m_crtc->register_w(program, offset, data);
525	525	else
526		m_crtc->address_w(*program, offset, data);
	526	m_crtc->address_w(program, offset, data);
527	527	break;
528	528
529	529	case DRT:
530		z80dart_ba_cd_w(m_dart, A2_A1 ^ 0x03, data);
	530	z80dart_ba_cd_w(m_dart, program, A2_A1 ^ 0x03, data);
531	531	break;
532	532
533	533	case DMA0:
r17961	r17962
543	543	break;
544	544
545	545	case SCC:
546		m_scc->reg_w(*program, A1_A2, data);
	546	m_scc->reg_w(program, A1_A2, data);
547	547	break;
548	548
549	549	case CIO:
550		m_cio->write(*program, A2_A1, data);
	550	m_cio->write(program, A2_A1, data);
551	551	break;
552	552	}
553	553	}
r17961	r17962
770	770
771	771	UINT8 abc1600_state::read_supervisor_memory(offs_t offset)
772	772	{
773		address_space *program = m_maincpu->space(AS_PROGRAM);
	773	address_space &program = *m_maincpu->space(AS_PROGRAM);
774	774	UINT8 data = 0;
775	775
776	776	if (!A2 && !A1)
777	777	{
778	778	// _EP
779		data = page_r(*program, offset);
	779	data = page_r(program, offset);
780	780	}
781	781	else if (!A2 && A1 && A0)
782	782	{
783	783	// _ES
784		data = segment_r(*program, offset);
	784	data = segment_r(program, offset);
785	785	}
786	786	else if (A2 && A1 && A0)
787	787	{
788	788	// _CAUSE
789		data = cause_r(*program, offset);
	789	data = cause_r(program, offset);
790	790	}
791	791
792	792	return data;
r17961	r17962
799	799
800	800	void abc1600_state::write_supervisor_memory(offs_t offset, UINT8 data)
801	801	{
802		address_space *program = m_maincpu->space(AS_PROGRAM);
	802	address_space &program = *m_maincpu->space(AS_PROGRAM);
803	803
804	804	if (!A2 && !A1)
805	805	{
806	806	// _WEP
807		page_w(*program, offset, data);
	807	page_w(program, offset, data);
808	808	}
809	809	else if (!A2 && A1 && A0)
810	810	{
811	811	// _WES
812		segment_w(*program, offset, data);
	812	segment_w(program, offset, data);
813	813	}
814	814	else if (A2 && !A1 && A0)
815	815	{
816	816	// W(C)
817		task_w(*program, offset, data);
	817	task_w(program, offset, data);
818	818	}
819	819	}
820	820
r17961	r17962
1879	1879
1880	1880	void abc1600_state::machine_reset()
1881	1881	{
1882		address_space *program = m_maincpu->space(AS_PROGRAM);
	1882	address_space &program = *m_maincpu->space(AS_PROGRAM);
1883	1883
1884	1884	// clear special control register
1885	1885	for (int i = 0; i < 8; i++)
1886	1886	{
1887		spec_contr_reg_w(*program, 0, i);
	1887	spec_contr_reg_w(program, 0, i);
1888	1888	}
1889	1889
1890	1890	// clear floppy registers
1891		fw0_w(*program, 0, 0);
1892		fw1_w(*program, 0, 0);
	1891	fw0_w(program, 0, 0);
	1892	fw1_w(program, 0, 0);
1893	1893
1894	1894	// clear task register
1895	1895	m_task = 0;

trunk/src/mess/drivers/nanos.c

r17961	r17962
120	120
121	121	/* Z80-SIO Interface */
122	122
123		static void z80daisy_interrupt(device_t *device, int state)
	123	static WRITE_LINE_DEVICE_HANDLER( z80daisy_interrupt )
124	124	{
125	125	device->machine().device("maincpu")->execute().set_input_line(INPUT_LINE_IRQ0, state);
126	126	}
127	127
128	128	static const z80sio_interface sio_intf =
129	129	{
130		z80daisy_interrupt,   /* interrupt handler */
131		NULL,            /* DTR changed handler */
132		NULL,            /* RTS changed handler */
133		NULL,            /* BREAK changed handler */
134		NULL,            /* transmit handler */
135		NULL            /* receive handler */
	130	DEVCB_LINE(z80daisy_interrupt),   /* interrupt handler */
	131	DEVCB_NULL,            /* DTR changed handler */
	132	DEVCB_NULL,            /* RTS changed handler */
	133	DEVCB_NULL,            /* BREAK changed handler */
	134	DEVCB_NULL,            /* transmit handler */
	135	DEVCB_NULL            /* receive handler */
136	136	};
137	137
138	138	/* Z80 Daisy Chain */

trunk/src/mess/drivers/pasopia7.c

r17961	r17962
549	549	{
550	550	switch(offset)
551	551	{
552		case 4: return upd765_status_r(m_fdc, 0);
553		case 5: return upd765_data_r(m_fdc, 0);
	552	case 4: return upd765_status_r(m_fdc, space, 0);
	553	case 5: return upd765_data_r(m_fdc, space, 0);
554	554	//case 6: bit 7 interrupt bit
555	555	}
556	556
r17961	r17962
563	563	{
564	564	case 0: upd765_tc_w(m_fdc, 0); break;
565	565	case 2: upd765_tc_w(m_fdc, 1); break;
566		case 5: upd765_data_w(m_fdc, 0, data); break;
	566	case 5: upd765_data_w(m_fdc, space, 0, data); break;
567	567	case 6:
568	568	upd765_reset_w(m_fdc, data & 0x80);
569	569	floppy_mon_w(floppy_get_device(machine(), 0), (data & 0x40) ? CLEAR_LINE : ASSERT_LINE);

trunk/src/mess/drivers/fm7.c

r17961	r17962
416	416	switch(offset)
417	417	{
418	418	case 0:
419		return wd17xx_status_r(dev,offset);
	419	return wd17xx_status_r(dev,space, offset);
420	420	case 1:
421		return wd17xx_track_r(dev,offset);
	421	return wd17xx_track_r(dev,space, offset);
422	422	case 2:
423		return wd17xx_sector_r(dev,offset);
	423	return wd17xx_sector_r(dev,space, offset);
424	424	case 3:
425		return wd17xx_data_r(dev,offset);
	425	return wd17xx_data_r(dev,space, offset);
426	426	case 4:
427	427	return m_fdc_side | 0xfe;
428	428	case 5:
r17961	r17962
448	448	switch(offset)
449	449	{
450	450	case 0:
451		wd17xx_command_w(dev,offset,data);
	451	wd17xx_command_w(dev,space, offset,data);
452	452	break;
453	453	case 1:
454		wd17xx_track_w(dev,offset,data);
	454	wd17xx_track_w(dev,space, offset,data);
455	455	break;
456	456	case 2:
457		wd17xx_sector_w(dev,offset,data);
	457	wd17xx_sector_w(dev,space, offset,data);
458	458	break;
459	459	case 3:
460		wd17xx_data_w(dev,offset,data);
	460	wd17xx_data_w(dev,space, offset,data);
461	461	break;
462	462	case 4:
463	463	m_fdc_side = data & 0x01;
r17961	r17962
824	824	static void fm7_update_psg(running_machine &machine)
825	825	{
826	826	fm7_state *state = machine.driver_data<fm7_state>();
827		address_space *space = machine.device("maincpu")->memory().space(AS_PROGRAM);
	827	address_space &space = *machine.device("maincpu")->memory().space(AS_PROGRAM);
828	828
829	829	if(state->m_type == SYS_FM7)
830	830	{
r17961	r17962
835	835	break;
836	836	case 0x01:
837	837	// Data read
838		state->m_psg_data = ay8910_r(space->machine().device("psg"),0);
	838	state->m_psg_data = ay8910_r(space.machine().device("psg"),space, 0);
839	839	break;
840	840	case 0x02:
841	841	// Data write
842		ay8910_data_w(space->machine().device("psg"),0,state->m_psg_data);
	842	ay8910_data_w(space.machine().device("psg"),space, 0,state->m_psg_data);
843	843	break;
844	844	case 0x03:
845	845	// Address latch
846		ay8910_address_w(space->machine().device("psg"),0,state->m_psg_data);
	846	ay8910_address_w(space.machine().device("psg"),space, 0,state->m_psg_data);
847	847	break;
848	848	}
849	849	}
r17961	r17962
856	856	break;
857	857	case 0x01:
858	858	// Data read
859		state->m_psg_data = ym2203_r(space->machine().device("ym"),1);
	859	state->m_psg_data = ym2203_r(space.machine().device("ym"),space, 1);
860	860	break;
861	861	case 0x02:
862	862	// Data write
863		ym2203_w(space->machine().device("ym"),1,state->m_psg_data);
	863	ym2203_w(space.machine().device("ym"),space, 1,state->m_psg_data);
864	864	logerror("YM: data write 0x%02x\n",state->m_psg_data);
865	865	break;
866	866	case 0x03:
867	867	// Address latch
868		ym2203_w(space->machine().device("ym"),0,state->m_psg_data);
	868	ym2203_w(space.machine().device("ym"),space, 0,state->m_psg_data);
869	869	logerror("YM: address latch 0x%02x\n",state->m_psg_data);
870	870	break;
871	871	case 0x04:
872	872	// Status register
873		state->m_psg_data = ym2203_r(space->machine().device("ym"),0);
	873	state->m_psg_data = ym2203_r(space.machine().device("ym"),space, 0);
874	874	break;
875	875	case 0x09:
876	876	// Joystick port read
877		state->m_psg_data = space->machine().root_device().ioport("joy1")->read();
	877	state->m_psg_data = space.machine().root_device().ioport("joy1")->read();
878	878	break;
879	879	}
880	880	}

trunk/src/mess/drivers/vidbrain.c

r17961	r17962
141	141
142	142	if (!m_sound_clk && sound_clk)
143	143	{
144		//discrete_sound_w(m_discrete, NODE_01, m_keylatch & 0x03);
	144	//discrete_sound_w(m_discrete, space, NODE_01, m_keylatch & 0x03);
145	145
146	146	UINT8 dac_data = 0;
147	147

trunk/src/mess/drivers/z80ne.c

r17961	r17962
410	410	AY_3_1015,
411	411	4800.0,
412	412	4800.0,
413		NULL,
414		NULL,
415		NULL
	413	DEVCB_NULL,
	414	DEVCB_NULL,
	415	DEVCB_NULL
416	416	};
417	417
418	418	static const cassette_interface z80ne_cassettea_config =
r17961	r17962
436	436	static const kr2376_interface lx388_kr2376_interface =
437	437	{
438	438	50000,
439		NULL
	439	DEVCB_NULL
440	440	};
441	441
442	442	static const floppy_interface z80netf_floppy_interface =

trunk/src/mess/drivers/ami1200.c

r17961	r17962
90	90	/* bit 2 = Power Led on Amiga */
91	91	set_led_status(device->machine(), 0, !BIT(data, 1));
92	92
93		handle_cd32_joystick_cia(state, data, mos6526_r(device, 2));
	93	handle_cd32_joystick_cia(state, data, mos6526_r(device, space, 2));
94	94	}
95	95
96	96	/*************************************

trunk/src/mess/drivers/trs80m2.c

r17961	r17962
334	334
335	335	READ8_MEMBER( trs80m2_state::fdc_r )
336	336	{
337		return wd17xx_r(m_fdc, offset) ^ 0xff;
	337	return wd17xx_r(m_fdc, space, offset) ^ 0xff;
338	338	}
339	339
340	340	WRITE8_MEMBER( trs80m2_state::fdc_w )
341	341	{
342		wd17xx_w(m_fdc, offset, data ^ 0xff);
	342	wd17xx_w(m_fdc, space, offset, data ^ 0xff);
343	343	}
344	344
345	345	WRITE8_MEMBER( trs80m16_state::tcl_w )

trunk/src/mess/drivers/mz6500.c

r17961	r17962
60	60
61	61	READ8_MEMBER( mz6500_state::fdc_r )
62	62	{
63		return (offset) ? upd765_data_r(m_fdc, 0) : upd765_status_r(m_fdc, 0);
	63	return (offset) ? upd765_data_r(m_fdc, space, 0) : upd765_status_r(m_fdc, space, 0);
64	64	}
65	65
66	66	WRITE8_MEMBER( mz6500_state::fdc_w )
67	67	{
68	68	if(offset)
69		upd765_data_w(m_fdc, 0, data);
	69	upd765_data_w(m_fdc, space, 0, data);
70	70	}
71	71
72	72	READ8_MEMBER( mz6500_state::mz6500_vram_r )

trunk/src/mess/drivers/p8k.c

r17961	r17962
201	201
202	202	****************************************************************************/
203	203
204		static void p8k_daisy_interrupt(device_t *device, int state)
	204	static WRITE_LINE_DEVICE_HANDLER( p8k_daisy_interrupt )
205	205	{
206	206	device->machine().device("maincpu")->execute().set_input_line(0, state);
207	207	}
r17961	r17962
300	300
301	301	/* Z80 SIO 0 */
302	302
303		static WRITE8_DEVICE_HANDLER( pk8_sio_0_serial_transmit )
	303	static WRITE16_DEVICE_HANDLER( pk8_sio_0_serial_transmit )
304	304	{
305	305	// send character to terminal
306	306	}
307	307
308	308	static const z80sio_interface p8k_sio_0_intf =
309	309	{
310		p8k_daisy_interrupt,         /* interrupt handler */
311		NULL,               /* DTR changed handler */
312		NULL,               /* RTS changed handler */
313		NULL,               /* BREAK changed handler */
314		pk8_sio_0_serial_transmit,   /* transmit handler */
315		NULL               /* receive handler */
	310	DEVCB_LINE(p8k_daisy_interrupt),         /* interrupt handler */
	311	DEVCB_NULL,               /* DTR changed handler */
	312	DEVCB_NULL,               /* RTS changed handler */
	313	DEVCB_NULL,               /* BREAK changed handler */
	314	DEVCB_HANDLER(pk8_sio_0_serial_transmit),   /* transmit handler */
	315	DEVCB_NULL               /* receive handler */
316	316	};
317	317
318	318	/* Z80 SIO 1 */
319	319
320		static WRITE8_DEVICE_HANDLER( pk8_sio_1_serial_transmit )
	320	static WRITE16_DEVICE_HANDLER( pk8_sio_1_serial_transmit )
321	321	{
322	322	// send character to terminal
323	323	}
324	324
325	325	static const z80sio_interface p8k_sio_1_intf =
326	326	{
327		p8k_daisy_interrupt,         /* interrupt handler */
328		NULL,               /* DTR changed handler */
329		NULL,               /* RTS changed handler */
330		NULL,               /* BREAK changed handler */
331		pk8_sio_1_serial_transmit,   /* transmit handler */
332		NULL               /* receive handler */
	327	DEVCB_LINE(p8k_daisy_interrupt),         /* interrupt handler */
	328	DEVCB_NULL,               /* DTR changed handler */
	329	DEVCB_NULL,               /* RTS changed handler */
	330	DEVCB_NULL,               /* BREAK changed handler */
	331	DEVCB_HANDLER(pk8_sio_1_serial_transmit),   /* transmit handler */
	332	DEVCB_NULL               /* receive handler */
333	333	};
334	334
335	335	/* Z80 Daisy Chain */
r17961	r17962
568	568
569	569	****************************************************************************/
570	570
571		static void p8k_16_daisy_interrupt(device_t *device, int state)
	571	static WRITE_LINE_DEVICE_HANDLER( p8k_16_daisy_interrupt )
572	572	{
573	573	// this must be studied a little bit more :-)
574	574	}
r17961	r17962
634	634
635	635	/* Z80 SIO 0 */
636	636
637		static WRITE8_DEVICE_HANDLER( pk8_16_sio_0_serial_transmit )
	637	static WRITE16_DEVICE_HANDLER( pk8_16_sio_0_serial_transmit )
638	638	{
639	639	// send character to terminal
640	640	}
641	641
642	642	static const z80sio_interface p8k_16_sio_0_intf =
643	643	{
644		p8k_16_daisy_interrupt,         /* interrupt handler */
645		NULL,               /* DTR changed handler */
646		NULL,               /* RTS changed handler */
647		NULL,               /* BREAK changed handler */
648		pk8_16_sio_0_serial_transmit,   /* transmit handler */
649		NULL               /* receive handler */
	644	DEVCB_LINE(p8k_16_daisy_interrupt),         /* interrupt handler */
	645	DEVCB_NULL,               /* DTR changed handler */
	646	DEVCB_NULL,               /* RTS changed handler */
	647	DEVCB_NULL,               /* BREAK changed handler */
	648	DEVCB_HANDLER(pk8_16_sio_0_serial_transmit),   /* transmit handler */
	649	DEVCB_NULL               /* receive handler */
650	650	};
651	651
652	652	/* Z80 SIO 1 */
653	653
654		static WRITE8_DEVICE_HANDLER( pk8_16_sio_1_serial_transmit )
	654	static WRITE16_DEVICE_HANDLER( pk8_16_sio_1_serial_transmit )
655	655	{
656	656	// send character to terminal
657	657	}
658	658
659	659	static const z80sio_interface p8k_16_sio_1_intf =
660	660	{
661		p8k_16_daisy_interrupt,         /* interrupt handler */
662		NULL,               /* DTR changed handler */
663		NULL,               /* RTS changed handler */
664		NULL,               /* BREAK changed handler */
665		pk8_16_sio_1_serial_transmit,   /* transmit handler */
666		NULL               /* receive handler */
	661	DEVCB_LINE(p8k_16_daisy_interrupt),         /* interrupt handler */
	662	DEVCB_NULL,               /* DTR changed handler */
	663	DEVCB_NULL,               /* RTS changed handler */
	664	DEVCB_NULL,               /* BREAK changed handler */
	665	DEVCB_HANDLER(pk8_16_sio_1_serial_transmit),   /* transmit handler */
	666	DEVCB_NULL               /* receive handler */
667	667	};
668	668
669	669	/* Z80 Daisy Chain */

trunk/src/mess/drivers/ngp.c

r17961	r17962
229	229	case 0x21:      /* t6w28 "left" */
230	230	if ( m_io_reg[0x38] == 0x55 && m_io_reg[0x39] == 0xAA )
231	231	{
232		t6w28_w( m_t6w28, 0, data );
	232	t6w28_w( m_t6w28, space, 0, data );
233	233	}
234	234	break;
235	235

trunk/src/mess/drivers/nes.c

r17961	r17962
23	23
24	24	static READ8_DEVICE_HANDLER( psg_4015_r )
25	25	{
26		return nes_psg_r(device, 0x15);
	26	return nes_psg_r(device, space, 0x15);
27	27	}
28	28
29	29	static WRITE8_DEVICE_HANDLER( psg_4015_w )
30	30	{
31		nes_psg_w(device, 0x15, data);
	31	nes_psg_w(device, space, 0x15, data);
32	32	}
33	33
34	34	static WRITE8_DEVICE_HANDLER( psg_4017_w )
35	35	{
36		nes_psg_w(device, 0x17, data);
	36	nes_psg_w(device, space, 0x17, data);
37	37	}
38	38
39	39	WRITE8_MEMBER(nes_state::nes_vh_sprite_dma_w)

trunk/src/mess/drivers/msx.c

r17961	r17962
344	344	static WRITE8_DEVICE_HANDLER( msx_ay8910_w )
345	345	{
346	346	if ( offset & 1 )
347		ay8910_data_w( device, offset, data );
	347	ay8910_data_w( device, space, offset, data );
348	348	else
349		ay8910_address_w( device, offset, data );
	349	ay8910_address_w( device, space, offset, data );
350	350	}
351	351
352	352

trunk/src/mess/drivers/vt100.c

r17961	r17962
95	95	READ8_MEMBER( vt100_state::vt100_flags_r )
96	96	{
97	97	UINT8 ret = 0;
98		ret |= vt_video_lba7_r(m_crtc, 0) << 6;
	98	ret |= vt_video_lba7_r(m_crtc, space, 0) << 6;
99	99	ret |= m_keyboard_int << 7;
100	100	return ret;
101	101	}

trunk/src/mess/drivers/apollo.c

r17961	r17962
1170	1170	}
1171	1171
1172	1172	static APOLLO_KBD_INTERFACE( apollo_kbd_config ) = {
1173		apollo_kbd_putchar,
1174		apollo_kbd_has_beeper,
1175		apollo_kbd_is_german
	1173	DEVCB_HANDLER(apollo_kbd_putchar),
	1174	DEVCB_HANDLER(apollo_kbd_has_beeper),
	1175	DEVCB_HANDLER(apollo_kbd_is_german)
1176	1176	};
1177	1177
1178	1178	static WRITE8_DEVICE_HANDLER( terminal_kbd_putchar ) {

trunk/src/mess/drivers/x1twin.c

r17961	r17962
429	429	#if 0
430	430	static const z80sio_interface sio_intf =
431	431	{
432		0,               /* interrupt handler */
433		0,               /* DTR changed handler */
434		0,               /* RTS changed handler */
435		0,               /* BREAK changed handler */
436		0,               /* transmit handler */
437		0               /* receive handler */
	432	DEVCB_NULL,               /* interrupt handler */
	433	DEVCB_NULL,               /* DTR changed handler */
	434	DEVCB_NULL,               /* RTS changed handler */
	435	DEVCB_NULL,               /* BREAK changed handler */
	436	DEVCB_NULL,               /* transmit handler */
	437	DEVCB_NULL               /* receive handler */
438	438	};
439	439	#endif
440	440

trunk/src/mess/drivers/specpls3.c

r17961	r17962
185	185	{
186	186	spectrum_state *state = space->machine().driver_data<spectrum_state>();
187	187	if (state->m_floppy==1)
188		upd765_data_w(space->machine().device("upd765"), 0,data);
	188	upd765_data_w(space->machine().device("upd765"), *space, 0,data);
189	189	}
190	190
191	191	static  READ8_HANDLER(spectrum_plus3_port_3ffd_r)
r17961	r17962
194	194	if (state->m_floppy==0)
195	195	return 0xff;
196	196	else
197		return upd765_data_r(space->machine().device("upd765"), 0);
	197	return upd765_data_r(space->machine().device("upd765"), *space, 0);
198	198	}
199	199
200	200
r17961	r17962
204	204	if (state->m_floppy==0)
205	205	return 0xff;
206	206	else
207		return upd765_status_r(space->machine().device("upd765"), 0);
	207	return upd765_status_r(space->machine().device("upd765"), *space, 0);
208	208	}
209	209
210	210

trunk/src/mess/drivers/x68k.c

r17961	r17962
347	347	static WRITE16_HANDLER( x68k_dmac_w )
348	348	{
349	349	device_t* device = space->machine().device("hd63450");
350		hd63450_w(device, offset, data, mem_mask);
	350	hd63450_w(device, *space, offset, data, mem_mask);
351	351	}
352	352
353	353	static READ16_HANDLER( x68k_dmac_r )
354	354	{
355	355	device_t* device = space->machine().device("hd63450");
356		return hd63450_r(device, offset, mem_mask);
	356	return hd63450_r(device, *space, offset, mem_mask);
357	357	}
358	358
359	359	static void x68k_keyboard_ctrl_w(x68k_state *state, int data)
r17961	r17962
974	974	{
975	975	case 0x00:
976	976	case 0x01:
977		upd765_data_w(fdc, 0,data);
	977	upd765_data_w(fdc, *space, 0,data);
978	978	break;
979	979	case 0x02:  // drive option signal control
980	980	x = data & 0x0f;
r17961	r17962
1054	1054	switch(offset)
1055	1055	{
1056	1056	case 0x00:
1057		return upd765_status_r(fdc, 0);
	1057	return upd765_status_r(fdc, *space, 0);
1058	1058	case 0x01:
1059		return upd765_data_r(fdc, 0);
	1059	return upd765_data_r(fdc, *space, 0);
1060	1060	case 0x02:
1061	1061	ret = 0x00;
1062	1062	for(x=0;x<4;x++)
r17961	r17962
1103	1103	device_t *fdc = machine.device("upd72065");
1104	1104
1105	1105	if(state->m_fdc.drq_state != 0)
1106		data = upd765_dack_r(fdc, 0);
	1106	data = upd765_dack_r(fdc, state->generic_space(), 0);
1107	1107	//  logerror("FDC: DACK reading\n");
1108	1108	return data;
1109	1109	}
r17961	r17962
1111	1111	static void x68k_fdc_write_byte(running_machine &machine,int addr, int data)
1112	1112	{
1113	1113	device_t *fdc = machine.device("upd72065");
1114		upd765_dack_w(fdc, 0, data);
	1114	upd765_dack_w(fdc, machine.driver_data()->generic_space(), 0, data);
1115	1115	}
1116	1116
1117	1117	static WRITE_LINE_DEVICE_HANDLER ( fdc_drq )
r17961	r17962
1126	1126	{
1127	1127	case 0x00:
1128	1128	case 0x01:
1129		ym2151_w(space->machine().device("ym2151"), offset, data);
	1129	ym2151_w(space->machine().device("ym2151"), *space, offset, data);
1130	1130	break;
1131	1131	}
1132	1132	}
r17961	r17962
1134	1134	static READ16_HANDLER( x68k_fm_r )
1135	1135	{
1136	1136	if(offset == 0x01)
1137		return ym2151_r(space->machine().device("ym2151"), 1);
	1137	return ym2151_r(space->machine().device("ym2151"), *space, 1);
1138	1138
1139	1139	return 0xffff;
1140	1140	}
r17961	r17962
1873	1873	switch(offset)
1874	1874	{
1875	1875	case 0x00:
1876		okim6258_ctrl_w(device,0,data);
	1876	okim6258_ctrl_w(device,space,0,data);
1877	1877	break;
1878	1878	case 0x01:
1879		okim6258_data_w(device,0,data);
	1879	okim6258_data_w(device,space,0,data);
1880	1880	break;
1881	1881	}
1882	1882	}

trunk/src/mess/drivers/pc8801.c

r17961	r17962
1688	1688	READ8_MEMBER(pc8801_state::pc8801_sound_board_r)
1689	1689	{
1690	1690	if(m_has_opna)
1691		return ym2608_r(machine().device("opna"), offset);
	1691	return ym2608_r(machine().device("opna"), space, offset);
1692	1692
1693		return (offset & 2) ? 0xff : ym2203_r(machine().device("opn"), offset);
	1693	return (offset & 2) ? 0xff : ym2203_r(machine().device("opn"), space, offset);
1694	1694	}
1695	1695
1696	1696	WRITE8_MEMBER(pc8801_state::pc8801_sound_board_w)
1697	1697	{
1698	1698	if(m_has_opna)
1699		ym2608_w(machine().device("opna"), offset,data);
	1699	ym2608_w(machine().device("opna"), space, offset,data);
1700	1700	else if((offset & 2) == 0)
1701		ym2203_w(machine().device("opn"), offset,data);
	1701	ym2203_w(machine().device("opn"), space, offset,data);
1702	1702	}
1703	1703
1704	1704	READ8_MEMBER(pc8801_state::pc8801_opna_r)
1705	1705	{
1706	1706	if(m_has_opna && (offset & 2) == 0)
1707		return ym2608_r(machine().device("opna"), (offset & 1) | ((offset & 4) >> 1));
	1707	return ym2608_r(machine().device("opna"), space, (offset & 1) | ((offset & 4) >> 1));
1708	1708
1709	1709	return 0xff;
1710	1710	}
r17961	r17962
1712	1712	WRITE8_MEMBER(pc8801_state::pc8801_opna_w)
1713	1713	{
1714	1714	if(m_has_opna && (offset & 2) == 0)
1715		ym2608_w(machine().device("opna"), (offset & 1) | ((offset & 4) >> 1),data);
	1715	ym2608_w(machine().device("opna"), space, (offset & 1) | ((offset & 4) >> 1),data);
1716	1716	else if(m_has_opna && offset == 2)
1717	1717	{
1718	1718	m_sound_irq_mask = ((data & 0x80) == 0);

trunk/src/mess/drivers/apricot.c

r17961	r17962
120	120	}
121	121	};
122	122
123		static void apricot_sio_irq_w(device_t *device, int st)
	123	static WRITE_LINE_DEVICE_HANDLER( apricot_sio_irq_w )
124	124	{
125		apricot_state *state = device->machine().driver_data<apricot_state>();
126		pic8259_ir5_w(state->m_pic, st);
	125	apricot_state *astate = device->machine().driver_data<apricot_state>();
	126	pic8259_ir5_w(astate->m_pic, state);
127	127	}
128	128
129	129	static const z80sio_interface apricot_z80sio_intf =
130	130	{
131		apricot_sio_irq_w,
132		NULL,
133		NULL,
134		NULL,
135		NULL,
136		NULL
	131	DEVCB_LINE(apricot_sio_irq_w),
	132	DEVCB_NULL,
	133	DEVCB_NULL,
	134	DEVCB_NULL,
	135	DEVCB_NULL,
	136	DEVCB_NULL
137	137	};
138	138
139	139

trunk/src/mess/drivers/apf.c

r17961	r17962
388	388
389	389	WRITE8_MEMBER( apf_state::apf_wd179x_command_w)
390	390	{
391		wd17xx_command_w(m_fdc, offset,~data);
	391	wd17xx_command_w(m_fdc, space, offset,~data);
392	392	}
393	393
394	394	WRITE8_MEMBER( apf_state::apf_wd179x_track_w)
395	395	{
396		wd17xx_track_w(m_fdc, offset,~data);
	396	wd17xx_track_w(m_fdc, space, offset,~data);
397	397	}
398	398
399	399	WRITE8_MEMBER( apf_state::apf_wd179x_sector_w)
400	400	{
401		wd17xx_sector_w(m_fdc, offset,~data);
	401	wd17xx_sector_w(m_fdc, space, offset,~data);
402	402	}
403	403
404	404	WRITE8_MEMBER( apf_state::apf_wd179x_data_w)
405	405	{
406		wd17xx_data_w(m_fdc, offset,~data);
	406	wd17xx_data_w(m_fdc, space, offset,~data);
407	407	}
408	408
409	409	READ8_MEMBER( apf_state::apf_wd179x_status_r)
410	410	{
411		return ~wd17xx_status_r(m_fdc, offset);
	411	return ~wd17xx_status_r(m_fdc, space, offset);
412	412	}
413	413
414	414	READ8_MEMBER( apf_state::apf_wd179x_track_r)
415	415	{
416		return ~wd17xx_track_r(m_fdc, offset);
	416	return ~wd17xx_track_r(m_fdc, space, offset);
417	417	}
418	418
419	419	READ8_MEMBER( apf_state::apf_wd179x_sector_r)
420	420	{
421		return ~wd17xx_sector_r(m_fdc, offset);
	421	return ~wd17xx_sector_r(m_fdc, space, offset);
422	422	}
423	423
424	424	READ8_MEMBER( apf_state::apf_wd179x_data_r)
425	425	{
426		return wd17xx_data_r(m_fdc, offset); // should this be inverted like the rest?
	426	return wd17xx_data_r(m_fdc, space, offset); // should this be inverted like the rest?
427	427	}
428	428
429	429	static ADDRESS_MAP_START( apf_imagination_map, AS_PROGRAM, 8, apf_state )

trunk/src/mess/drivers/snes.c

r17961	r17962
47	47
48	48	static READ8_DEVICE_HANDLER( spc_ram_100_r )
49	49	{
50		return spc_ram_r(device, offset + 0x100);
	50	return spc_ram_r(device, space, offset + 0x100);
51	51	}
52	52
53	53	static WRITE8_DEVICE_HANDLER( spc_ram_100_w )
54	54	{
55		spc_ram_w(device, offset + 0x100, data);
	55	spc_ram_w(device, space, offset + 0x100, data);
56	56	}
57	57
58	58	/*************************************

trunk/src/mess/drivers/bebox.c

r17961	r17962
37	37	#include "formats/pc_dsk.h"
38	38	#include "machine/ram.h"
39	39
40		static READ8_HANDLER(at_dma8237_1_r)  { return i8237_r(space->machine().device("dma8237_2"), offset / 2); }
41		static WRITE8_HANDLER(at_dma8237_1_w) { i8237_w(space->machine().device("dma8237_2"), offset / 2, data); }
	40	static READ8_HANDLER(at_dma8237_1_r)  { return i8237_r(space->machine().device("dma8237_2"), *space, offset / 2); }
	41	static WRITE8_HANDLER(at_dma8237_1_w) { i8237_w(space->machine().device("dma8237_2"), *space, offset / 2, data); }
42	42
43	43	static ADDRESS_MAP_START( bebox_mem, AS_PROGRAM, 64, bebox_state )
44	44	AM_RANGE(0x7FFFF0F0, 0x7FFFF0F7) AM_READWRITE_LEGACY(bebox_cpu0_imask_r, bebox_cpu0_imask_w )

trunk/src/mess/drivers/elwro800.c

r17961	r17962
289	289	device_t *fdc = machine().device("upd765");
290	290	if (offset & 1)
291	291	{
292		return upd765_data_r(fdc,0);
	292	return upd765_data_r(fdc,space, 0);
293	293	}
294	294	else
295	295	{
296		return upd765_status_r(fdc,0);
	296	return upd765_status_r(fdc,space, 0);
297	297	}
298	298	}
299	299	else if (!BIT(cs,4))
r17961	r17962
347	347	device_t *fdc = machine().device("upd765");
348	348	if (offset & 1)
349	349	{
350		upd765_data_w(fdc, 0, data);
	350	upd765_data_w(fdc, space, 0, data);
351	351	}
352	352	}
353	353	else if (!BIT(cs,4))

trunk/src/mess/drivers/exelv.c

r17961	r17962
381	381	{
382	382	logerror("tms7041_portd_w: data = 0x%02x\n", data);
383	383
384		tms5220_data_w(m_tms5220c, 0, BITSWAP8(data,0,1,2,3,4,5,6,7));
	384	tms5220_data_w(m_tms5220c, space, 0, BITSWAP8(data,0,1,2,3,4,5,6,7));
385	385	m_tms7041_portd = data;
386	386	}
387	387

trunk/src/mess/drivers/svision.c

r17961	r17962
150	150	svision_soundport_w(m_sound, 1, offset & 3, data);
151	151	break;
152	152	case 0x18: case 0x19: case 0x1a: case 0x1b: case 0x1c:
153		svision_sounddma_w(m_sound, offset - 0x18, data);
	153	svision_sounddma_w(m_sound, space, offset - 0x18, data);
154	154	break;
155	155	case 0x28: case 0x29: case 0x2a:
156		svision_noise_w(m_sound, offset - 0x28, data);
	156	svision_noise_w(m_sound, space, offset - 0x28, data);
157	157	break;
158	158	default:
159	159	logerror("%.6f svision write %04x %02x\n", machine().time().as_double(), offset, data);

trunk/src/mess/drivers/c64.c

r17961	r17962
427	427
428	428	READ8_MEMBER( c64_state::sid_potx_r )
429	429	{
430		UINT8 cia1_pa = mos6526_pa_r(m_cia1, 0);
	430	UINT8 cia1_pa = mos6526_pa_r(m_cia1, space, 0);
431	431
432	432	int sela = BIT(cia1_pa, 6);
433	433	int selb = BIT(cia1_pa, 7);
r17961	r17962
442	442
443	443	READ8_MEMBER( c64_state::sid_poty_r )
444	444	{
445		UINT8 cia1_pa = mos6526_pa_r(m_cia1, 0);
	445	UINT8 cia1_pa = mos6526_pa_r(m_cia1, space, 0);
446	446
447	447	int sela = BIT(cia1_pa, 6);
448	448	int selb = BIT(cia1_pa, 7);
r17961	r17962
490	490
491	491	*/
492	492
493		UINT8 cia0portb = mos6526_pb_r(m_cia1, 0);
	493	UINT8 cia0portb = mos6526_pb_r(m_cia1, space, 0);
494	494
495	495	return cbm_common_cia0_port_a_r(m_cia1, cia0portb);
496	496	}
r17961	r17962
512	512
513	513	*/
514	514
515		UINT8 cia0porta = mos6526_pa_r(m_cia1, 0);
	515	UINT8 cia0porta = mos6526_pa_r(m_cia1, space, 0);
516	516
517	517	return cbm_common_cia0_port_b_r(m_cia1, cia0porta);
518	518	}

trunk/src/mess/drivers/ptcsol.c

r17961	r17962
522	522	AY_3_1015,
523	523	4800.0,
524	524	4800.0,
525		NULL,
526		NULL,
527		NULL
	525	DEVCB_NULL,
	526	DEVCB_NULL,
	527	DEVCB_NULL
528	528	};
529	529
530	530

trunk/src/mess/drivers/pcm.c

r17961	r17962
269	269
270	270	static const z80sio_interface sio_intf =
271	271	{
272		0, //DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
273		0,         /* DTR changed handler */
274		0,         /* RTS changed handler */
275		0,         /* BREAK changed handler */
276		0,         /* transmit handler */
277		0         /* receive handler */
	272	DEVCB_NULL, //DEVCB_CPU_INPUT_LINE("maincpu", INPUT_LINE_IRQ0), // interrupt callback
	273	DEVCB_NULL,         /* DTR changed handler */
	274	DEVCB_NULL,         /* RTS changed handler */
	275	DEVCB_NULL,         /* BREAK changed handler */
	276	DEVCB_NULL,         /* transmit handler */
	277	DEVCB_NULL         /* receive handler */
278	278	};
279	279
280	280

trunk/src/mess/drivers/vic10.c

r17961	r17962
68	68	}
69	69	else if (offset >= 0xdc00 && offset < 0xe000)
70	70	{
71		data = mos6526_r(m_cia, offset & 0x0f);
	71	data = mos6526_r(m_cia, space, offset & 0x0f);
72	72	}
73	73	else if (offset >= 0xe000)
74	74	{
r17961	r17962
111	111	}
112	112	else if (offset >= 0xdc00 && offset < 0xe000)
113	113	{
114		mos6526_w(m_cia, offset & 0x0f, data);
	114	mos6526_w(m_cia, space, offset & 0x0f, data);
115	115	}
116	116
117	117	m_exp->cd_w(space, offset, data, lorom, uprom, exram);
r17961	r17962
251	251	//  sid6581_interface sid_intf
252	252	//-------------------------------------------------
253	253
254		UINT8 vic10_state::paddle_read(int which)
	254	UINT8 vic10_state::paddle_read(address_space &space, int which)
255	255	{
256	256	int pot1 = 0xff, pot2 = 0xff, pot3 = 0xff, pot4 = 0xff, temp;
257		UINT8 cia0porta = mos6526_pa_r(m_cia, 0);
	257	UINT8 cia0porta = mos6526_pa_r(m_cia, space, 0);
258	258	int controller1 = ioport("CTRLSEL")->read() & 0x07;
259	259	int controller2 = ioport("CTRLSEL")->read() & 0x70;
260	260	// Notice that only a single input is defined for Mouse & Lightpen in both ports
r17961	r17962
366	366
367	367	READ8_MEMBER( vic10_state::sid_potx_r )
368	368	{
369		return paddle_read(0);
	369	return paddle_read(space, 0);
370	370	}
371	371
372	372	READ8_MEMBER( vic10_state::sid_poty_r )
373	373	{
374		return paddle_read(1);
	374	return paddle_read(space, 1);
375	375	}
376	376
377	377	static MOS6581_INTERFACE( sid_intf )
r17961	r17962
409	409
410	410	*/
411	411
412		UINT8 cia0portb = mos6526_pb_r(m_cia, 0);
	412	UINT8 cia0portb = mos6526_pb_r(m_cia, space, 0);
413	413
414	414	return cbm_common_cia0_port_a_r(m_cia, cia0portb);
415	415	}
r17961	r17962
431	431
432	432	*/
433	433
434		UINT8 cia0porta = mos6526_pa_r(m_cia, 0);
	434	UINT8 cia0porta = mos6526_pa_r(m_cia, space, 0);
435	435
436	436	return cbm_common_cia0_port_b_r(m_cia, cia0porta);
437	437	}

trunk/src/mess/drivers/gba.c

r17961	r17962
773	773	}
774	774	break;
775	775	case 0x0060/4:
776		retval = gb_sound_r(gb_device, 0) | gb_sound_r(gb_device, 1)<<16 | gb_sound_r(gb_device, 2)<<24;
	776	retval = gb_sound_r(gb_device, space, 0) | gb_sound_r(gb_device, space, 1)<<16 | gb_sound_r(gb_device, space, 2)<<24;
777	777	break;
778	778	case 0x0064/4:
779		retval = gb_sound_r(gb_device, 3) | gb_sound_r(gb_device, 4)<<8;
	779	retval = gb_sound_r(gb_device, space, 3) | gb_sound_r(gb_device, space, 4)<<8;
780	780	break;
781	781	case 0x0068/4:
782		retval = gb_sound_r(gb_device, 6) | gb_sound_r(gb_device, 7)<<8;
	782	retval = gb_sound_r(gb_device, space, 6) | gb_sound_r(gb_device, space, 7)<<8;
783	783	break;
784	784	case 0x006c/4:
785		retval = gb_sound_r(gb_device, 8) | gb_sound_r(gb_device, 9)<<8;
	785	retval = gb_sound_r(gb_device, space, 8) | gb_sound_r(gb_device, space, 9)<<8;
786	786	break;
787	787	case 0x0070/4:
788		retval = gb_sound_r(gb_device, 0xa) | gb_sound_r(gb_device, 0xb)<<16 | gb_sound_r(gb_device, 0xc)<<24;
	788	retval = gb_sound_r(gb_device, space, 0xa) | gb_sound_r(gb_device, space, 0xb)<<16 | gb_sound_r(gb_device, space, 0xc)<<24;
789	789	break;
790	790	case 0x0074/4:
791		retval = gb_sound_r(gb_device, 0xd) | gb_sound_r(gb_device, 0xe)<<8;
	791	retval = gb_sound_r(gb_device, space, 0xd) | gb_sound_r(gb_device, space, 0xe)<<8;
792	792	break;
793	793	case 0x0078/4:
794		retval = gb_sound_r(gb_device, 0x10) | gb_sound_r(gb_device, 0x11)<<8;
	794	retval = gb_sound_r(gb_device, space, 0x10) | gb_sound_r(gb_device, space, 0x11)<<8;
795	795	break;
796	796	case 0x007c/4:
797		retval = gb_sound_r(gb_device, 0x12) | gb_sound_r(gb_device, 0x13)<<8;
	797	retval = gb_sound_r(gb_device, space, 0x12) | gb_sound_r(gb_device, space, 0x13)<<8;
798	798	break;
799	799	case 0x0080/4:
800		retval = gb_sound_r(gb_device, 0x14) | gb_sound_r(gb_device, 0x15)<<8;
	800	retval = gb_sound_r(gb_device, space, 0x14) | gb_sound_r(gb_device, space, 0x15)<<8;
801	801	if( (mem_mask) & 0xffff0000 )
802	802	{
803	803	verboselog(machine(), 2, "GBA IO Register Read: SOUNDCNT_H (%08x) = %04x\n", 0x04000000 + ( offset << 2 ) + 2, m_SOUNDCNT_H );
r17961	r17962
805	805	}
806	806	break;
807	807	case 0x0084/4:
808		retval = gb_sound_r(gb_device, 0x16);
	808	retval = gb_sound_r(gb_device, space, 0x16);
809	809	break;
810	810	case 0x0088/4:
811	811	if( (mem_mask) & 0x0000ffff )
r17961	r17962
819	819	}
820	820	break;
821	821	case 0x0090/4:
822		retval = gb_wave_r(gb_device, 0) | gb_wave_r(gb_device, 1)<<8 | gb_wave_r(gb_device, 2)<<16 | gb_wave_r(gb_device, 3)<<24;
	822	retval = gb_wave_r(gb_device, space, 0) | gb_wave_r(gb_device, space, 1)<<8 | gb_wave_r(gb_device, space, 2)<<16 | gb_wave_r(gb_device, space, 3)<<24;
823	823	break;
824	824	case 0x0094/4:
825		retval = gb_wave_r(gb_device, 4) | gb_wave_r(gb_device, 5)<<8 | gb_wave_r(gb_device, 6)<<16 | gb_wave_r(gb_device, 7)<<24;
	825	retval = gb_wave_r(gb_device, space, 4) | gb_wave_r(gb_device, space, 5)<<8 | gb_wave_r(gb_device, space, 6)<<16 | gb_wave_r(gb_device, space, 7)<<24;
826	826	break;
827	827	case 0x0098/4:
828		retval = gb_wave_r(gb_device, 8) | gb_wave_r(gb_device, 9)<<8 | gb_wave_r(gb_device, 10)<<16 | gb_wave_r(gb_device, 11)<<24;
	828	retval = gb_wave_r(gb_device, space, 8) | gb_wave_r(gb_device, space, 9)<<8 | gb_wave_r(gb_device, space, 10)<<16 | gb_wave_r(gb_device, space, 11)<<24;
829	829	break;
830	830	case 0x009c/4:
831		retval = gb_wave_r(gb_device, 12) | gb_wave_r(gb_device, 13)<<8 | gb_wave_r(gb_device, 14)<<16 | gb_wave_r(gb_device, 15)<<24;
	831	retval = gb_wave_r(gb_device, space, 12) | gb_wave_r(gb_device, space, 13)<<8 | gb_wave_r(gb_device, space, 14)<<16 | gb_wave_r(gb_device, space, 15)<<24;
832	832	break;
833	833	case 0x00a0/4:
834	834	case 0x00a4/4:
r17961	r17962
1350	1350	case 0x0060/4:
1351	1351	if( (mem_mask) & 0x000000ff )   // SOUNDCNTL
1352	1352	{
1353		gb_sound_w(gb_device, 0, data);
	1353	gb_sound_w(gb_device, space, 0, data);
1354	1354	}
1355	1355	if( (mem_mask) & 0x00ff0000 )
1356	1356	{
1357		gb_sound_w(gb_device, 1, data>>16);   // SOUND1CNT_H
	1357	gb_sound_w(gb_device, space, 1, data>>16);   // SOUND1CNT_H
1358	1358	}
1359	1359	if( (mem_mask) & 0xff000000 )
1360	1360	{
1361		gb_sound_w(gb_device, 2, data>>24);
	1361	gb_sound_w(gb_device, space, 2, data>>24);
1362	1362	}
1363	1363	break;
1364	1364	case 0x0064/4:
1365	1365	if( (mem_mask) & 0x000000ff )   // SOUNDCNTL
1366	1366	{
1367		gb_sound_w(gb_device, 3, data);
	1367	gb_sound_w(gb_device, space, 3, data);
1368	1368	}
1369	1369	if( (mem_mask) & 0x0000ff00 )
1370	1370	{
1371		gb_sound_w(gb_device, 4, data>>8);   // SOUND1CNT_H
	1371	gb_sound_w(gb_device, space, 4, data>>8);   // SOUND1CNT_H
1372	1372	}
1373	1373	break;
1374	1374	case 0x0068/4:
1375	1375	if( (mem_mask) & 0x000000ff )
1376	1376	{
1377		gb_sound_w(gb_device, 6, data);
	1377	gb_sound_w(gb_device, space, 6, data);
1378	1378	}
1379	1379	if( (mem_mask) & 0x0000ff00 )
1380	1380	{
1381		gb_sound_w(gb_device, 7, data>>8);
	1381	gb_sound_w(gb_device, space, 7, data>>8);
1382	1382	}
1383	1383	break;
1384	1384	case 0x006c/4:
1385	1385	if( (mem_mask) & 0x000000ff )
1386	1386	{
1387		gb_sound_w(gb_device, 8, data);
	1387	gb_sound_w(gb_device, space, 8, data);
1388	1388	}
1389	1389	if( (mem_mask) & 0x0000ff00 )
1390	1390	{
1391		gb_sound_w(gb_device, 9, data>>8);
	1391	gb_sound_w(gb_device, space, 9, data>>8);
1392	1392	}
1393	1393	break;
1394	1394	case 0x0070/4:   //SND3CNTL and H
1395	1395	if( (mem_mask) & 0x000000ff )   // SOUNDCNTL
1396	1396	{
1397		gb_sound_w(gb_device, 0xa, data);
	1397	gb_sound_w(gb_device, space, 0xa, data);
1398	1398	}
1399	1399	if( (mem_mask) & 0x00ff0000 )
1400	1400	{
1401		gb_sound_w(gb_device, 0xb, data>>16);   // SOUND1CNT_H
	1401	gb_sound_w(gb_device, space, 0xb, data>>16);   // SOUND1CNT_H
1402	1402	}
1403	1403	if( (mem_mask) & 0xff000000 )
1404	1404	{
1405		gb_sound_w(gb_device, 0xc, data>>24);
	1405	gb_sound_w(gb_device, space, 0xc, data>>24);
1406	1406	}
1407	1407	break;
1408	1408	case 0x0074/4:
1409	1409	if( (mem_mask) & 0x000000ff )
1410	1410	{
1411		gb_sound_w(gb_device, 0xd, data);
	1411	gb_sound_w(gb_device, space, 0xd, data);
1412	1412	}
1413	1413	if( (mem_mask) & 0x0000ff00 )
1414	1414	{
1415		gb_sound_w(gb_device, 0xe, data>>8);
	1415	gb_sound_w(gb_device, space, 0xe, data>>8);
1416	1416	}
1417	1417	break;
1418	1418	case 0x0078/4:
1419	1419	if( (mem_mask) & 0x000000ff )
1420	1420	{
1421		gb_sound_w(gb_device, 0x10, data);
	1421	gb_sound_w(gb_device, space, 0x10, data);
1422	1422	}
1423	1423	if( (mem_mask) & 0x0000ff00 )
1424	1424	{
1425		gb_sound_w(gb_device, 0x11, data>>8);
	1425	gb_sound_w(gb_device, space, 0x11, data>>8);
1426	1426	}
1427	1427	break;
1428	1428	case 0x007c/4:
1429	1429	if( (mem_mask) & 0x000000ff )
1430	1430	{
1431		gb_sound_w(gb_device, 0x12, data);
	1431	gb_sound_w(gb_device, space, 0x12, data);
1432	1432	}
1433	1433	if( (mem_mask) & 0x0000ff00 )
1434	1434	{
1435		gb_sound_w(gb_device, 0x13, data>>8);
	1435	gb_sound_w(gb_device, space, 0x13, data>>8);
1436	1436	}
1437	1437	break;
1438	1438	case 0x0080/4:
1439	1439	if( (mem_mask) & 0x000000ff )
1440	1440	{
1441		gb_sound_w(gb_device, 0x14, data);
	1441	gb_sound_w(gb_device, space, 0x14, data);
1442	1442	}
1443	1443	if( (mem_mask) & 0x0000ff00 )
1444	1444	{
1445		gb_sound_w(gb_device, 0x15, data>>8);
	1445	gb_sound_w(gb_device, space, 0x15, data>>8);
1446	1446	}
1447	1447
1448	1448	if ((mem_mask) & 0xffff0000)
r17961	r17962
1483	1483	dac_device *gb_b_l = machine().device<dac_device>("direct_b_left");
1484	1484	dac_device *gb_b_r = machine().device<dac_device>("direct_b_right");
1485	1485
1486		gb_sound_w(gb_device, 0x16, data);
	1486	gb_sound_w(gb_device, space, 0x16, data);
1487	1487	if ((data & 0x80) && !(m_SOUNDCNT_X & 0x80))
1488	1488	{
1489	1489	m_fifo_a_ptr = m_fifo_a_in = 17;
r17961	r17962
1510	1510	case 0x0090/4:
1511	1511	if( (mem_mask) & 0x000000ff )
1512	1512	{
1513		gb_wave_w(gb_device, 0, data);
	1513	gb_wave_w(gb_device, space, 0, data);
1514	1514	}
1515	1515	if( (mem_mask) & 0x0000ff00 )
1516	1516	{
1517		gb_wave_w(gb_device, 1, data>>8);
	1517	gb_wave_w(gb_device, space, 1, data>>8);
1518	1518	}
1519	1519	if( (mem_mask) & 0x00ff0000 )
1520	1520	{
1521		gb_wave_w(gb_device, 2, data>>16);
	1521	gb_wave_w(gb_device, space, 2, data>>16);
1522	1522	}
1523	1523	if( (mem_mask) & 0xff000000 )
1524	1524	{
1525		gb_wave_w(gb_device, 3, data>>24);
	1525	gb_wave_w(gb_device, space, 3, data>>24);
1526	1526	}
1527	1527	break;
1528	1528	case 0x0094/4:
1529	1529	if( (mem_mask) & 0x000000ff )
1530	1530	{
1531		gb_wave_w(gb_device, 4, data);
	1531	gb_wave_w(gb_device, space, 4, data);
1532	1532	}
1533	1533	if( (mem_mask) & 0x0000ff00 )
1534	1534	{
1535		gb_wave_w(gb_device, 5, data>>8);
	1535	gb_wave_w(gb_device, space, 5, data>>8);
1536	1536	}
1537	1537	if( (mem_mask) & 0x00ff0000 )
1538	1538	{
1539		gb_wave_w(gb_device, 6, data>>16);
	1539	gb_wave_w(gb_device, space, 6, data>>16);
1540	1540	}
1541	1541	if( (mem_mask) & 0xff000000 )
1542	1542	{
1543		gb_wave_w(gb_device, 7, data>>24);
	1543	gb_wave_w(gb_device, space, 7, data>>24);
1544	1544	}
1545	1545	break;
1546	1546	case 0x0098/4:
1547	1547	if( (mem_mask) & 0x000000ff )
1548	1548	{
1549		gb_wave_w(gb_device, 8, data);
	1549	gb_wave_w(gb_device, space, 8, data);
1550	1550	}
1551	1551	if( (mem_mask) & 0x0000ff00 )
1552	1552	{
1553		gb_wave_w(gb_device, 9, data>>8);
	1553	gb_wave_w(gb_device, space, 9, data>>8);
1554	1554	}
1555	1555	if( (mem_mask) & 0x00ff0000 )
1556	1556	{
1557		gb_wave_w(gb_device, 0xa, data>>16);
	1557	gb_wave_w(gb_device, space, 0xa, data>>16);
1558	1558	}
1559	1559	if( (mem_mask) & 0xff000000 )
1560	1560	{
1561		gb_wave_w(gb_device, 0xb, data>>24);
	1561	gb_wave_w(gb_device, space, 0xb, data>>24);
1562	1562	}
1563	1563	break;
1564	1564	case 0x009c/4:
1565	1565	if( (mem_mask) & 0x000000ff )
1566	1566	{
1567		gb_wave_w(gb_device, 0xc, data);
	1567	gb_wave_w(gb_device, space, 0xc, data);
1568	1568	}
1569	1569	if( (mem_mask) & 0x0000ff00 )
1570	1570	{
1571		gb_wave_w(gb_device, 0xd, data>>8);
	1571	gb_wave_w(gb_device, space, 0xd, data>>8);
1572	1572	}
1573	1573	if( (mem_mask) & 0x00ff0000 )
1574	1574	{
1575		gb_wave_w(gb_device, 0xe, data>>16);
	1575	gb_wave_w(gb_device, space, 0xe, data>>16);
1576	1576	}
1577	1577	if( (mem_mask) & 0xff000000 )
1578	1578	{
1579		gb_wave_w(gb_device, 0xf, data>>24);
	1579	gb_wave_w(gb_device, space, 0xf, data>>24);
1580	1580	}
1581	1581	break;
1582	1582	case 0x00a0/4:

trunk/src/mess/drivers/vixen.c

r17961	r17962
557	557	m_256 = BIT(data, 4);
558	558
559	559	// beep enable
560		discrete_sound_w(m_discrete, NODE_01, BIT(data, 5));
	560	discrete_sound_w(m_discrete, space, NODE_01, BIT(data, 5));
561	561	}
562	562
563	563	static I8155_INTERFACE( i8155_intf )

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