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| r17908 Saturday 15th September, 2012 at 21:47:30 UTC by Aaron Giles |
|---|
| First pass at modernizing struct definitions. |
| [src/build] | png2bdc.c verinfo.c |
| [src/emu] | config.c crsshair.c crsshair.h debugger.c emupal.c fileio.h hashfile.c ioport.h machine.h output.c render.h romload.c ui.h uigfx.c uiinput.c uiinput.h |
| [src/emu/cpu] | x86log.c |
| [src/emu/cpu/alph8201] | alph8201.c |
| [src/emu/cpu/apexc] | apexc.c |
| [src/emu/cpu/avr8] | avr8.c |
| [src/emu/cpu/ccpu] | ccpu.c ccpu.h |
| [src/emu/cpu/cop400] | cop400.c cop400.h |
| [src/emu/cpu/cp1610] | cp1610.c |
| [src/emu/cpu/cubeqcpu] | cubeqcpu.h |
| [src/emu/cpu/e132xs] | e132xs.c |
| [src/emu/cpu/esrip] | esrip.h |
| [src/emu/cpu/g65816] | g65816cm.h |
| [src/emu/cpu/h83002] | h8priv.h |
| [src/emu/cpu/hd6309] | hd6309.c |
| [src/emu/cpu/i386] | i386priv.h |
| [src/emu/cpu/i4004] | i4004.c |
| [src/emu/cpu/i8085] | i8085.c i8085.h |
| [src/emu/cpu/i86] | i286.c i86.c i86.h |
| [src/emu/cpu/i960] | i960.c i960dis.h |
| [src/emu/cpu/jaguar] | jaguar.c jaguar.h |
| [src/emu/cpu/konami] | konami.c |
| [src/emu/cpu/lh5801] | lh5801.c lh5801.h |
| [src/emu/cpu/m37710] | m37710cm.h |
| [src/emu/cpu/m6502] | m6502.h |
| [src/emu/cpu/m6800] | m6800.c m6800.h |
| [src/emu/cpu/m6809] | m6809.c m6809.h |
| [src/emu/cpu/mb86233] | mb86233.c mb86233.h |
| [src/emu/cpu/mb88xx] | mb88xx.c mb88xx.h |
| [src/emu/cpu/mc68hc11] | hc11ops.h mc68hc11.c mc68hc11.h |
| [src/emu/cpu/mcs48] | mcs48.c |
| [src/emu/cpu/mcs51] | mcs51.c mcs51.h |
| [src/emu/cpu/mips] | mips3.h mips3com.h mips3drc.c r3000.c r3000.h |
| [src/emu/cpu/mn10200] | mn10200.c |
| [src/emu/cpu/nec] | nec.h necdasm.c necpriv.h v25priv.h |
| [src/emu/cpu/pdp1] | pdp1.c pdp1.h tx0.c tx0.h |
| [src/emu/cpu/pic16c5x] | pic16c5x.c |
| [src/emu/cpu/pic16c62x] | pic16c62x.c |
| [src/emu/cpu/powerpc] | ppc.h ppccom.h ppcdrc.c |
| [src/emu/cpu/pps4] | pps4.c |
| [src/emu/cpu/psx] | dma.h rcnt.h sio.h |
| [src/emu/cpu/rsp] | rsp.h rspdrc.c |
| [src/emu/cpu/s2650] | s2650.c |
| [src/emu/cpu/saturn] | saturn.c saturn.h |
| [src/emu/cpu/sc61860] | sc61860.c sc61860.h |
| [src/emu/cpu/scmp] | scmp.c scmp.h |
| [src/emu/cpu/se3208] | se3208.c |
| [src/emu/cpu/sh2] | sh2.h sh2comn.h sh2drc.c |
| [src/emu/cpu/sm8500] | sm8500.c |
| [src/emu/cpu/ssem] | ssem.c |
| [src/emu/cpu/ssp1601] | ssp1601.c |
| [src/emu/cpu/superfx] | superfx.c superfx.h |
| [src/emu/cpu/t11] | t11.c |
| [src/emu/cpu/tlcs900] | tlcs900.c tlcs900.h |
| [src/emu/cpu/tms0980] | tms0980.c tms0980.h |
| [src/emu/cpu/tms32010] | tms32010.c |
| [src/emu/cpu/tms32025] | tms32025.c |
| [src/emu/cpu/tms32051] | tms32051.c |
| [src/emu/cpu/tms34010] | tms34010.c tms34010.h |
| [src/emu/cpu/unsp] | unsp.h |
| [src/emu/cpu/upd7810] | upd7810.c |
| [src/emu/cpu/v30mz] | v30mz.h |
| [src/emu/cpu/v60] | v60.c |
| [src/emu/cpu/v810] | v810.c |
| [src/emu/cpu/z180] | z180.c |
| [src/emu/cpu/z8] | z8.c |
| [src/emu/cpu/z80] | z80.c |
| [src/emu/debug] | debugcmd.c debugcon.c debugcpu.c debugcpu.h debughlp.c |
| [src/emu/debugint] | debugint.c |
| [src/emu/imagedev] | bitbngr.c bitbngr.h flopdrv.c |
| [src/emu/machine] | 6525tpi.c 6525tpi.h 68681.h 74148.c 74148.h 74153.c 74153.h adc083x.c adc083x.h adc1038.c adc1038.h adc1213x.c adc1213x.h generic.c idectrl.c idectrl.h k053252.c k053252.h latch8.c latch8.h mb14241.c mb87078.c mb87078.h msm6242.h pd4990a.c pit8253.c rp5h01.c s3c2400.h s3c2410.h s3c2440.h smc91c9x.c smc91c9x.h tms6100.c upd4701.c wd17xx.c wd17xx.h |
| [src/emu/sound] | 2151intf.c 2151intf.h 2203intf.c 2203intf.h 2413intf.c 2608intf.c 2608intf.h 2610intf.c 2610intf.h 2612intf.c 2612intf.h 262intf.c 262intf.h 3526intf.c 3526intf.h 3812intf.c 3812intf.h 8950intf.c 8950intf.h aica.h astrocde.c ay8910.c ay8910.h beep.c c140.c c140.h c6280.h cdda.c cem3394.c cem3394.h discrete.h dmadac.c es5506.c es5506.h es8712.c filter.h flt_rc.c flt_rc.h flt_vol.c fm.h gaelco.c gaelco.h hc55516.c iremga20.c k005289.c k007232.h k051649.c k053260.c k053260.h k056800.c k056800.h msm5205.c msm5205.h msm5232.h n63701x.c namco.c namco.h nes_apu.c nes_apu.h nile.c okim6258.c okim6258.h okim6376.c pokey.h qsound.c rf5c400.c rf5c68.c rf5c68.h s2636.c saa1099.c scsp.c scsp.h segapcm.c segapcm.h sid6581.h sn76477.c sn76477.h sn76496.c snkwave.c sp0250.c sp0256.c sp0256.h speaker.c speaker.h st0016.c st0016.h t6w28.c tiaintf.c tms3615.c tms36xx.c tms36xx.h tms5110.c tms5110.h tms5220.c tms5220.h upd7759.c upd7759.h vlm5030.c vlm5030.h vrender0.c vrender0.h x1_010.c x1_010.h ymf271.h ymf278b.h ymz280b.c ymz280b.h zsg2.c zsg2.h |
| [src/emu/video] | 315_5124.h hd63484.c hd63484.h huc6202.h huc6260.h huc6261.h huc6270.h i8275.c i8275.h mc6845.h poly.c poly.h psx.h resnet.h s2636.c s2636.h tlc34076.c tlc34076.h tms9927.c tms9927.h tms9928a.h vector.c vooddefs.h voodoo.h |
| [src/lib/util] | aviio.c aviio.h cdrom.h corefile.c jedparse.c jedparse.h opresolv.h palette.c png.c png.h pool.c un7z.h unzip.h vbiparse.h xmlfile.c xmlfile.h |
| [src/mame/audio] | amiga.c beezer.c cps3.c dcs.c exidy.c flower.c geebee.c gomoku.c hyprolyb.c irem.c leland.c m72.c micro3d.c namco52.c namco52.h namco54.c namco54.h phoenix.c pleiads.c polepos.c redbaron.c segasnd.c seibu.c seibu.h snes_snd.c snk6502.c taitosnd.c taitosnd.h tiamc1.c timeplt.c trackfld.c tx1.c warpwarp.c wiping.c |
| [src/mame/drivers] | atarisy4.c mediagx.c mjkjidai.c renegade.c seattle.c |
| [src/mame/includes] | amiga.h lordgun.h m107.h megadriv.h seta.h |
| [src/mame/machine] | atarigen.h buggychl.c decocass.c fddebug.c gaelco3d.c gaelco3d.h mathbox.c md_cart.c namco06.c namco06.h namco50.c namco51.c namco51.h namco53.c namco53.h namco62.c namco62.h namcoio.c namcoio.h nmk112.c nmk112.h steppers.h taitoio.c taitoio.h |
| [src/mame/video] | atarimo.h avgdvg.c bfm_dm01.h deco16ic.c deco16ic.h decocomn.c decocomn.h galastrm.c gtia.h gticlub.c hng64.c kan_pand.c kan_pand.h konicdev.c konicdev.h mcd212.h midzeus.c midzeus2.c model2.c model3.c namcos22.c taitoic.c taitoic.h turbo.c vrender0.c vrender0.h |
| [src/mess/audio] | channelf.c dave.c dave.h gb.c gmaster.c lynx.c mac.c mea8000.h special.c svision.c t6721.c upd1771.c upd1771.h vc4000.c |
| [src/mess/drivers] | gba.c pasogo.c pcfx.c supracan.c vboy.c |
| [src/mess/formats] | cbm_crt.h studio2_st2.c |
| [src/mess/includes] | apple2.h c64_legacy.h mc68328.h |
| [src/mess/machine] | 6883sam.h 990_tap.c 990_tap.h applefdc.c applefdc.h at45dbxx.c ataricrt.c atarifdc.c ay31015.c ay31015.h beta.c cococart.h ds1315.c e05a03.c e05a03.h er59256.c hd63450.c hd63450.h i8271.c isa_gus.h kb_keytro.c keyboard.c keyboard.h kr2376.c kr2376.h mc6843.h mc6846.h mc6854.h micropolis.c micropolis.h mm58274c.c mm58274c.h mos6530.c mos6530.h nes_ines.c nes_pcb.c null_modem.c omti8621.c omti8621.h pc_lpt.c pc_lpt.h pcf8593.c pf10.c pf10.h s3c44b0.h smartmed.h sst39vfx.c sst39vfx.h terminal.c terminal.h tf20.c tf20.h upd71071.c upd71071.h upd765.c |
| [src/mess/tools/imgtool] | filtbas.c imgtool.h library.h |
| [src/mess/tools/imgtool/modules] | amiga.c cybiko.c cybikoxt.c fat.c os9.c pc_hard.c prodos.c |
| [src/mess/video] | apollo.c crt.h crtc_ega.h dl1416.c dl1416.h gime.h k1ge.h mc6847.h newport.c vdc8563.c vdc8563.h vic4567.c vic4567.h vic6567.c vic6567.h vtvideo.c vtvideo.h |
| [src/osd] | osdcore.h |
| [src/osd/sdl] | debugwin.c draw13.c drawogl.c drawsdl.c gl_shader_mgr.h input.c sdlsync_sdl.c sdlsync_tc.c sdlwork.c testkeys.c video.h window.c window.h |
| [src/osd/windows] | d3dcomm.h d3dhlsl.h d3dintf.h drawd3d.h drawdd.c drawgdi.c input.c ledutil.c output.c output.h video.h window.h winwork.c |
| [src/tools] | jedutil.c regrep.c unidasm.c |
| r17907 | r17908 | |
|---|---|---|
| 34 | 34 | biquad ProtoCoef[2]; |
| 35 | 35 | } lp_filter; |
| 36 | 36 | |
| 37 | typedef struct _filter_state filter_state; | |
| 38 | struct _filter_state | |
| 37 | struct filter_state | |
| 39 | 38 | { |
| 40 | 39 | double capval; |
| 41 | 40 | double exponent; |
| r17907 | r17908 | |
|---|---|---|
| 13 | 13 | #define CLOCK_16H (18432000/3/2/16) |
| 14 | 14 | #define CLOCK_1V (18432000/3/2/384) |
| 15 | 15 | |
| 16 | typedef struct _warpwarp_sound_state warpwarp_sound_state; | |
| 17 | struct _warpwarp_sound_state | |
| 16 | struct warpwarp_sound_state | |
| 18 | 17 | { |
| 19 | 18 | INT16 *m_decay; |
| 20 | 19 | sound_stream *m_channel; |
| r17907 | r17908 | |
|---|---|---|
| 60 | 60 | INT32 lowpass_polybit; |
| 61 | 61 | }; |
| 62 | 62 | |
| 63 | typedef struct _phoenix_sound_state phoenix_sound_state; | |
| 64 | struct _phoenix_sound_state | |
| 63 | struct phoenix_sound_state | |
| 65 | 64 | { |
| 66 | 65 | struct c_state m_c24_state; |
| 67 | 66 | struct c_state m_c25_state; |
| r17907 | r17908 | |
|---|---|---|
| 49 | 49 | #include "namco52.h" |
| 50 | 50 | #include "cpu/mb88xx/mb88xx.h" |
| 51 | 51 | |
| 52 | typedef struct _namco_52xx_state namco_52xx_state; | |
| 53 | struct _namco_52xx_state | |
| 52 | struct namco_52xx_state | |
| 54 | 53 | { |
| 55 | 54 | device_t *m_cpu; |
| 56 | 55 | device_t *m_discrete; |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | #include "devcb.h" |
| 7 | 7 | |
| 8 | 8 | |
| 9 | typedef struct _namco_52xx_interface namco_52xx_interface; | |
| 10 | struct _namco_52xx_interface | |
| 9 | struct namco_52xx_interface | |
| 11 | 10 | { |
| 12 | 11 | const char * discrete; /* name of the discrete sound device */ |
| 13 | 12 | int firstnode; /* index of the first node */ |
| r17907 | r17908 | |
|---|---|---|
| 38 | 38 | TYPE DEFINITIONS |
| 39 | 39 | ***************************************************************************/ |
| 40 | 40 | |
| 41 | typedef struct _filter_state filter_state; | |
| 42 | struct _filter_state | |
| 41 | struct filter_state | |
| 43 | 42 | { |
| 44 | 43 | double capval; /* current capacitor value */ |
| 45 | 44 | double exponent; /* constant exponent */ |
| 46 | 45 | }; |
| 47 | 46 | |
| 48 | 47 | |
| 49 | typedef struct _timer8253_channel timer8253_channel; | |
| 50 | struct _timer8253_channel | |
| 48 | struct timer8253_channel | |
| 51 | 49 | { |
| 52 | 50 | UINT8 holding; /* holding until counts written? */ |
| 53 | 51 | UINT8 latchmode; /* latching mode */ |
| r17907 | r17908 | |
| 63 | 61 | }; |
| 64 | 62 | |
| 65 | 63 | |
| 66 | typedef struct _timer8253 timer8253; | |
| 67 | struct _timer8253 | |
| 64 | struct timer8253 | |
| 68 | 65 | { |
| 69 | 66 | timer8253_channel chan[3]; /* three channels' worth of information */ |
| 70 | 67 | double env[3]; /* envelope value for each channel */ |
| r17907 | r17908 | |
| 75 | 72 | }; |
| 76 | 73 | |
| 77 | 74 | |
| 78 | typedef struct _usb_state usb_state; | |
| 79 | struct _usb_state | |
| 75 | struct usb_state | |
| 80 | 76 | { |
| 81 | 77 | sound_stream * stream; /* output stream */ |
| 82 | 78 | device_t *cpu; /* CPU index of the 8035 */ |
| r17907 | r17908 | |
| 101 | 97 | }; |
| 102 | 98 | |
| 103 | 99 | /* SP0250-based speech board */ |
| 104 | typedef struct _speech_state speech_state; | |
| 105 | struct _speech_state | |
| 100 | struct speech_state | |
| 106 | 101 | { |
| 107 | 102 | UINT8 latch, t0, p2, drq; |
| 108 | 103 | UINT8 *speech; |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | #define TC0140SYT_PORT01_FULL_MASTER (0x04) |
| 16 | 16 | #define TC0140SYT_PORT23_FULL_MASTER (0x08) |
| 17 | 17 | |
| 18 | typedef struct _tc0140syt_state tc0140syt_state; | |
| 19 | struct _tc0140syt_state | |
| 18 | struct tc0140syt_state | |
| 20 | 19 | { |
| 21 | 20 | UINT8 slavedata[4]; /* Data on master->slave port (4 nibbles) */ |
| 22 | 21 | UINT8 masterdata[4]; /* Data on slave->master port (4 nibbles) */ |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | TYPE DEFINITIONS |
| 9 | 9 | ***************************************************************************/ |
| 10 | 10 | |
| 11 | typedef struct _tc0140syt_interface tc0140syt_interface; | |
| 12 | struct _tc0140syt_interface | |
| 11 | struct tc0140syt_interface | |
| 13 | 12 | { |
| 14 | 13 | const char *master; |
| 15 | 14 | const char *slave; |
| r17907 | r17908 | |
|---|---|---|
| 32 | 32 | |
| 33 | 33 | |
| 34 | 34 | |
| 35 | typedef struct _wiping_sound_state wiping_sound_state; | |
| 36 | struct _wiping_sound_state | |
| 35 | struct wiping_sound_state | |
| 37 | 36 | { |
| 38 | 37 | /* data about the sound system */ |
| 39 | 38 | sound_channel m_channel_list[MAX_VOICES]; |
| r17907 | r17908 | |
|---|---|---|
| 184 | 184 | UINT8 writebyte; |
| 185 | 185 | }; |
| 186 | 186 | |
| 187 | typedef struct _leland_sound_state leland_sound_state; | |
| 188 | struct _leland_sound_state | |
| 187 | struct leland_sound_state | |
| 189 | 188 | { |
| 190 | 189 | /* 1st gen */ |
| 191 | 190 | UINT8 *m_dac_buffer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 29 | 29 | } sound_channel; |
| 30 | 30 | |
| 31 | 31 | |
| 32 | typedef struct _gomoku_sound_state gomoku_sound_state; | |
| 33 | struct _gomoku_sound_state | |
| 32 | struct gomoku_sound_state | |
| 34 | 33 | { |
| 35 | 34 | /* data about the sound system */ |
| 36 | 35 | sound_channel m_channel_list[MAX_VOICES]; |
| r17907 | r17908 | |
|---|---|---|
| 140 | 140 | "adpcm2" |
| 141 | 141 | }; |
| 142 | 142 | |
| 143 | typedef struct _seibu_adpcm_state seibu_adpcm_state; | |
| 144 | struct _seibu_adpcm_state | |
| 143 | struct seibu_adpcm_state | |
| 145 | 144 | { |
| 146 | 145 | oki_adpcm_state m_adpcm; |
| 147 | 146 | sound_stream *m_stream; |
| r17907 | r17908 | |
|---|---|---|
| 91 | 91 | extern const ym2151_interface seibu_ym2151_interface; |
| 92 | 92 | extern const ym2203_interface seibu_ym2203_interface; |
| 93 | 93 | |
| 94 | typedef struct _seibu_adpcm_interface seibu_adpcm_interface; | |
| 95 | struct _seibu_adpcm_interface | |
| 94 | struct seibu_adpcm_interface | |
| 96 | 95 | { |
| 97 | 96 | const char *rom_region; |
| 98 | 97 | }; |
| r17907 | r17908 | |
|---|---|---|
| 53 | 53 | struct timer8253chan channel[3]; |
| 54 | 54 | }; |
| 55 | 55 | |
| 56 | typedef struct _tiamc1_sound_state tiamc1_sound_state; | |
| 57 | struct _tiamc1_sound_state | |
| 56 | struct tiamc1_sound_state | |
| 58 | 57 | { |
| 59 | 58 | sound_stream *m_channel; |
| 60 | 59 | int m_timer1_divider; |
| r17907 | r17908 | |
|---|---|---|
| 35 | 35 | } sound_channel; |
| 36 | 36 | |
| 37 | 37 | |
| 38 | typedef struct _flower_sound_state flower_sound_state; | |
| 39 | struct _flower_sound_state | |
| 38 | struct flower_sound_state | |
| 40 | 39 | { |
| 41 | 40 | emu_timer *m_effect_timer; |
| 42 | 41 |
| r17907 | r17908 | |
|---|---|---|
| 264 | 264 | * |
| 265 | 265 | *************************************/ |
| 266 | 266 | |
| 267 | typedef struct _sdrc_state sdrc_state; | |
| 268 | struct _sdrc_state | |
| 267 | struct sdrc_state | |
| 269 | 268 | { |
| 270 | 269 | UINT16 reg[4]; |
| 271 | 270 | UINT8 seed; |
| 272 | 271 | }; |
| 273 | 272 | |
| 274 | 273 | |
| 275 | typedef struct _dsio_denver_state dsio_state; | |
| 276 | struct _dsio_denver_state | |
| 274 | struct dsio_state | |
| 277 | 275 | { |
| 278 | 276 | UINT16 reg[4]; |
| 279 | 277 | UINT8 start_on_next_write; |
| r17907 | r17908 | |
| 281 | 279 | }; |
| 282 | 280 | |
| 283 | 281 | |
| 284 | typedef struct _hle_transfer_state hle_transfer_state; | |
| 285 | struct _hle_transfer_state | |
| 282 | struct hle_transfer_state | |
| 286 | 283 | { |
| 287 | 284 | UINT8 hle_enabled; |
| 288 | 285 | INT32 dcs_state; |
| r17907 | r17908 | |
| 298 | 295 | }; |
| 299 | 296 | |
| 300 | 297 | |
| 301 | typedef struct _dcs_state dcs_state; | |
| 302 | struct _dcs_state | |
| 298 | struct dcs_state | |
| 303 | 299 | { |
| 304 | 300 | adsp21xx_device *cpu; |
| 305 | 301 | address_space *program; |
| r17907 | r17908 | |
|---|---|---|
| 73 | 73 | UINT32 fraction; |
| 74 | 74 | }; |
| 75 | 75 | |
| 76 | typedef struct _exidy_sound_state exidy_sound_state; | |
| 77 | struct _exidy_sound_state | |
| 76 | struct exidy_sound_state | |
| 78 | 77 | { |
| 79 | 78 | cpu_device *m_maincpu; |
| 80 | 79 |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | |
| 9 | 9 | #define CPS3_VOICES 16 |
| 10 | 10 | |
| 11 | typedef struct _cps3_voice cps3_voice; | |
| 12 | struct _cps3_voice | |
| 11 | struct cps3_voice | |
| 13 | 12 | { |
| 14 | 13 | UINT32 regs[8]; |
| 15 | 14 | UINT32 pos; |
| 16 | 15 | UINT16 frac; |
| 17 | 16 | }; |
| 18 | 17 | |
| 19 | typedef struct _cps3_sound_state cps3_sound_state; | |
| 20 | struct _cps3_sound_state | |
| 18 | struct cps3_sound_state | |
| 21 | 19 | { |
| 22 | 20 | sound_stream *m_stream; |
| 23 | 21 | cps3_voice m_voice[CPS3_VOICES]; |
| r17907 | r17908 | |
|---|---|---|
| 3 | 3 | #include "sound/msm5205.h" |
| 4 | 4 | #include "audio/hyprolyb.h" |
| 5 | 5 | |
| 6 | typedef struct _hyprolyb_adpcm_state hyprolyb_adpcm_state; | |
| 7 | struct _hyprolyb_adpcm_state | |
| 6 | struct hyprolyb_adpcm_state | |
| 8 | 7 | { |
| 9 | 8 | device_t *m_msm; |
| 10 | 9 | address_space *m_space; |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | |
| 20 | 20 | #define MASTER_CLOCK XTAL_14_31818MHz |
| 21 | 21 | |
| 22 | typedef struct _timeplt_audio_state timeplt_audio_state; | |
| 23 | struct _timeplt_audio_state | |
| 22 | struct timeplt_audio_state | |
| 24 | 23 | { |
| 25 | 24 | UINT8 m_last_irq_state; |
| 26 | 25 | cpu_device *m_soundcpu; |
| r17907 | r17908 | |
|---|---|---|
| 40 | 40 | * |
| 41 | 41 | *************************************/ |
| 42 | 42 | |
| 43 | typedef struct _audio_channel audio_channel; | |
| 44 | struct _audio_channel | |
| 43 | struct audio_channel | |
| 45 | 44 | { |
| 46 | 45 | emu_timer * irq_timer; |
| 47 | 46 | UINT32 curlocation; |
| r17907 | r17908 | |
| 54 | 53 | }; |
| 55 | 54 | |
| 56 | 55 | |
| 57 | typedef struct _amiga_audio amiga_audio; | |
| 58 | struct _amiga_audio | |
| 56 | struct amiga_audio | |
| 59 | 57 | { |
| 60 | 58 | audio_channel channel[4]; |
| 61 | 59 | sound_stream * stream; |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | |
| 10 | 10 | #define TIMER_RATE (4096/4) |
| 11 | 11 | |
| 12 | typedef struct _trackfld_audio_state trackfld_audio_state; | |
| 13 | struct _trackfld_audio_state | |
| 12 | struct trackfld_audio_state | |
| 14 | 13 | { |
| 15 | 14 | /* sound-related */ |
| 16 | 15 | int m_last_addr; |
| r17907 | r17908 | |
|---|---|---|
| 20 | 20 | |
| 21 | 21 | #define OUTPUT_RATE (48000) |
| 22 | 22 | |
| 23 | typedef struct _redbaron_sound_state redbaron_sound_state; | |
| 24 | struct _redbaron_sound_state | |
| 23 | struct redbaron_sound_state | |
| 25 | 24 | { |
| 26 | 25 | INT16 *m_vol_lookup; |
| 27 | 26 |
| r17907 | r17908 | |
|---|---|---|
| 51 | 51 | #include "namco54.h" |
| 52 | 52 | #include "cpu/mb88xx/mb88xx.h" |
| 53 | 53 | |
| 54 | typedef struct _namco_54xx_state namco_54xx_state; | |
| 55 | struct _namco_54xx_state | |
| 54 | struct namco_54xx_state | |
| 56 | 55 | { |
| 57 | 56 | device_t *m_cpu; |
| 58 | 57 | device_t *m_discrete; |
| r17907 | r17908 | |
|---|---|---|
| 41 | 41 | INT16 form[16]; |
| 42 | 42 | } TONE; |
| 43 | 43 | |
| 44 | typedef struct _snk6502_sound_state snk6502_sound_state; | |
| 45 | struct _snk6502_sound_state | |
| 44 | struct snk6502_sound_state | |
| 46 | 45 | { |
| 47 | 46 | TONE m_tone_channels[CHANNELS]; |
| 48 | 47 | INT32 m_tone_clock_expire; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | #include "sound/discrete.h" |
| 6 | 6 | |
| 7 | 7 | |
| 8 | typedef struct _namco_54xx_config namco_54xx_config; | |
| 9 | struct _namco_54xx_config | |
| 8 | struct namco_54xx_config | |
| 10 | 9 | { |
| 11 | 10 | const char *discrete; /* name of the discrete sound device */ |
| 12 | 11 | int firstnode; /* index of the first node */ |
| r17907 | r17908 | |
|---|---|---|
| 31 | 31 | int idx[3]; |
| 32 | 32 | }; |
| 33 | 33 | |
| 34 | typedef struct _tx1_sound_state tx1_sound_state; | |
| 35 | struct _tx1_sound_state | |
| 34 | struct tx1_sound_state | |
| 36 | 35 | { |
| 37 | 36 | sound_stream *m_stream; |
| 38 | 37 | UINT32 m_freq_to_step; |
| r17907 | r17908 | |
|---|---|---|
| 11 | 11 | #include "sound/discrete.h" |
| 12 | 12 | #include "audio/irem.h" |
| 13 | 13 | |
| 14 | typedef struct _irem_audio_state irem_audio_state; | |
| 15 | struct _irem_audio_state | |
| 14 | struct irem_audio_state | |
| 16 | 15 | { |
| 17 | 16 | UINT8 m_port1; |
| 18 | 17 | UINT8 m_port2; |
| r17907 | r17908 | |
|---|---|---|
| 67 | 67 | Z80_CLEAR |
| 68 | 68 | }; |
| 69 | 69 | |
| 70 | typedef struct _m72_audio_state m72_audio_state; | |
| 71 | struct _m72_audio_state | |
| 70 | struct m72_audio_state | |
| 72 | 71 | { |
| 73 | 72 | UINT8 irqvector; |
| 74 | 73 | UINT32 sample_addr; |
| r17907 | r17908 | |
|---|---|---|
| 92 | 92 | } counter; |
| 93 | 93 | }; |
| 94 | 94 | |
| 95 | typedef struct _beezer_sound_state beezer_sound_state; | |
| 96 | struct _beezer_sound_state | |
| 95 | struct beezer_sound_state | |
| 97 | 96 | { |
| 98 | 97 | cpu_device *m_maincpu; |
| 99 | 98 |
| r17907 | r17908 | |
|---|---|---|
| 11 | 11 | #include "includes/warpwarp.h" |
| 12 | 12 | |
| 13 | 13 | |
| 14 | typedef struct _geebee_sound_state geebee_sound_state; | |
| 15 | struct _geebee_sound_state | |
| 14 | struct geebee_sound_state | |
| 16 | 15 | { |
| 17 | 16 | emu_timer *m_volume_timer; |
| 18 | 17 | UINT16 *m_decay; |
| r17907 | r17908 | |
|---|---|---|
| 195 | 195 | } src_dir_type; |
| 196 | 196 | |
| 197 | 197 | |
| 198 | typedef struct _snes_sound_state snes_sound_state; | |
| 199 | struct _snes_sound_state | |
| 198 | struct snes_sound_state | |
| 200 | 199 | { |
| 201 | 200 | UINT8 *ram; |
| 202 | 201 | sound_stream *channel; |
| r17907 | r17908 | |
|---|---|---|
| 38 | 38 | int freq; |
| 39 | 39 | }; |
| 40 | 40 | |
| 41 | typedef struct _pleiads_sound_state pleiads_sound_state; | |
| 42 | struct _pleiads_sound_state | |
| 41 | struct pleiads_sound_state | |
| 43 | 42 | { |
| 44 | 43 | device_t *m_tms; |
| 45 | 44 | sound_stream *m_channel; |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | #define POLEPOS_R167_SHUNT 1.0/(1.0/POLEPOS_R166 + 1.0/250) |
| 20 | 20 | #define POLEPOS_R168_SHUNT 1.0/(1.0/POLEPOS_R166 + 1.0/250) |
| 21 | 21 | |
| 22 | typedef struct _polepos_sound_state polepos_sound_state; | |
| 23 | struct _polepos_sound_state | |
| 22 | struct polepos_sound_state | |
| 24 | 23 | { |
| 25 | 24 | UINT32 m_current_position; |
| 26 | 25 | int m_sample_msb; |
| r17907 | r17908 | |
|---|---|---|
| 52 | 52 | /* */ |
| 53 | 53 | /***************************************************************************/ |
| 54 | 54 | |
| 55 | typedef struct _tc0220ioc_state tc0220ioc_state; | |
| 56 | struct _tc0220ioc_state | |
| 55 | struct tc0220ioc_state | |
| 57 | 56 | { |
| 58 | 57 | UINT8 regs[8]; |
| 59 | 58 | UINT8 port; |
| r17907 | r17908 | |
| 210 | 209 | /* */ |
| 211 | 210 | /***************************************************************************/ |
| 212 | 211 | |
| 213 | typedef struct _tc0510nio_state tc0510nio_state; | |
| 214 | struct _tc0510nio_state | |
| 212 | struct tc0510nio_state | |
| 215 | 213 | { |
| 216 | 214 | UINT8 regs[8]; |
| 217 | 215 | |
| r17907 | r17908 | |
| 361 | 359 | /* */ |
| 362 | 360 | /***************************************************************************/ |
| 363 | 361 | |
| 364 | typedef struct _tc0640fio_state tc0640fio_state; | |
| 365 | struct _tc0640fio_state | |
| 362 | struct tc0640fio_state | |
| 366 | 363 | { |
| 367 | 364 | UINT8 regs[8]; |
| 368 | 365 |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | TYPE DEFINITIONS |
| 16 | 16 | ***************************************************************************/ |
| 17 | 17 | |
| 18 | typedef struct _tc0220ioc_interface tc0220ioc_interface; | |
| 19 | struct _tc0220ioc_interface | |
| 18 | struct tc0220ioc_interface | |
| 20 | 19 | { |
| 21 | 20 | devcb_read8 read_0; |
| 22 | 21 | devcb_read8 read_1; |
| r17907 | r17908 | |
| 26 | 25 | }; |
| 27 | 26 | |
| 28 | 27 | |
| 29 | typedef struct _tc0510nio_interface tc0510nio_interface; | |
| 30 | struct _tc0510nio_interface | |
| 28 | struct tc0510nio_interface | |
| 31 | 29 | { |
| 32 | 30 | devcb_read8 read_0; |
| 33 | 31 | devcb_read8 read_1; |
| r17907 | r17908 | |
| 37 | 35 | }; |
| 38 | 36 | |
| 39 | 37 | |
| 40 | typedef struct _tc0640fio_interface tc0640fio_interface; | |
| 41 | struct _tc0640fio_interface | |
| 38 | struct tc0640fio_interface | |
| 42 | 39 | { |
| 43 | 40 | devcb_read8 read_0; |
| 44 | 41 | devcb_read8 read_1; |
| r17907 | r17908 | |
|---|---|---|
| 93 | 93 | |
| 94 | 94 | |
| 95 | 95 | |
| 96 | typedef struct _namco_06xx_state namco_06xx_state; | |
| 97 | struct _namco_06xx_state | |
| 96 | struct namco_06xx_state | |
| 98 | 97 | { |
| 99 | 98 | UINT8 m_control; |
| 100 | 99 | emu_timer *m_nmi_timer; |
| r17907 | r17908 | |
|---|---|---|
| 4 | 4 | #include "devlegcy.h" |
| 5 | 5 | |
| 6 | 6 | |
| 7 | typedef struct _namco_06xx_config namco_06xx_config; | |
| 8 | struct _namco_06xx_config | |
| 7 | struct namco_06xx_config | |
| 9 | 8 | { |
| 10 | 9 | const char *nmicpu; |
| 11 | 10 | const char *chip0; |
| r17907 | r17908 | |
|---|---|---|
| 116 | 116 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 117 | 117 | |
| 118 | 118 | |
| 119 | typedef struct _namcoio_state namcoio_state; | |
| 120 | struct _namcoio_state | |
| 119 | struct namcoio_state | |
| 121 | 120 | { |
| 122 | 121 | UINT8 ram[16]; |
| 123 | 122 |
| r17907 | r17908 | |
|---|---|---|
| 7 | 7 | TYPE DEFINITIONS |
| 8 | 8 | ***************************************************************************/ |
| 9 | 9 | |
| 10 | typedef struct _namcoio_interface namcoio_interface; | |
| 11 | struct _namcoio_interface | |
| 10 | struct namcoio_interface | |
| 12 | 11 | { |
| 13 | 12 | devcb_read8 in[4]; |
| 14 | 13 | devcb_write8 out[2]; |
| r17907 | r17908 | |
|---|---|---|
| 13 | 13 | #define TABLESIZE 0x100 |
| 14 | 14 | #define BANKSIZE 0x10000 |
| 15 | 15 | |
| 16 | typedef struct _nmk112_state nmk112_state; | |
| 17 | struct _nmk112_state | |
| 16 | struct nmk112_state | |
| 18 | 17 | { |
| 19 | 18 | /* which chips have their sample address table divided into pages */ |
| 20 | 19 | UINT8 page_mask; |
| r17907 | r17908 | |
|---|---|---|
| 13 | 13 | TYPE DEFINITIONS |
| 14 | 14 | ***************************************************************************/ |
| 15 | 15 | |
| 16 | typedef struct _nmk112_interface nmk112_interface; | |
| 17 | struct _nmk112_interface | |
| 16 | struct nmk112_interface | |
| 18 | 17 | { |
| 19 | 18 | const char *rgn0, *rgn1; |
| 20 | 19 | UINT8 disable_page_mask; |
| r17907 | r17908 | |
|---|---|---|
| 135 | 135 | #include "cpu/mb88xx/mb88xx.h" |
| 136 | 136 | |
| 137 | 137 | |
| 138 | typedef struct _namco_50xx_state namco_50xx_state; | |
| 139 | struct _namco_50xx_state | |
| 138 | struct namco_50xx_state | |
| 140 | 139 | { |
| 141 | 140 | device_t * m_cpu; |
| 142 | 141 | UINT8 m_latched_cmd; |
| r17907 | r17908 | |
|---|---|---|
| 67 | 67 | #define WRITE_PORT(st,num,data) (st)->m_out[num](0, data) |
| 68 | 68 | |
| 69 | 69 | |
| 70 | typedef struct _namco_51xx_state namco_51xx_state; | |
| 71 | struct _namco_51xx_state | |
| 70 | struct namco_51xx_state | |
| 72 | 71 | { |
| 73 | 72 | device_t * m_cpu; |
| 74 | 73 | devcb_resolved_read8 m_in[4]; |
| r17907 | r17908 | |
|---|---|---|
| 4 | 4 | #include "devlegcy.h" |
| 5 | 5 | |
| 6 | 6 | |
| 7 | typedef struct _namco_51xx_interface namco_51xx_interface; | |
| 8 | struct _namco_51xx_interface | |
| 7 | struct namco_51xx_interface | |
| 9 | 8 | { |
| 10 | 9 | devcb_read8 in[4]; /* read handlers for ports A-D */ |
| 11 | 10 | devcb_write8 out[2]; /* write handlers for ports A-B */ |
| r17907 | r17908 | |
|---|---|---|
| 106 | 106 | PSOLAR /* Pier Solar */ |
| 107 | 107 | }; |
| 108 | 108 | |
| 109 | typedef struct _md_pcb md_pcb; | |
| 110 | struct _md_pcb | |
| 109 | struct md_pcb | |
| 111 | 110 | { |
| 112 | 111 | const char *pcb_name; |
| 113 | 112 | int pcb_id; |
| r17907 | r17908 | |
|---|---|---|
| 77 | 77 | #define LINK_SLACK_B ((LINK_SLACK / 3) + 1) |
| 78 | 78 | |
| 79 | 79 | |
| 80 | typedef struct _buf_t buf_t; | |
| 81 | struct _buf_t | |
| 80 | struct buf_t | |
| 82 | 81 | { |
| 83 | 82 | volatile UINT8 data; |
| 84 | 83 | volatile UINT8 stat; |
| r17907 | r17908 | |
| 86 | 85 | volatile int data_cnt; |
| 87 | 86 | }; |
| 88 | 87 | |
| 89 | typedef struct _shmem_t shmem_t; | |
| 90 | struct _shmem_t | |
| 88 | struct shmem_t | |
| 91 | 89 | { |
| 92 | 90 | volatile INT32 lock; |
| 93 | 91 | buf_t buf[2]; |
| r17907 | r17908 | |
| 95 | 93 | |
| 96 | 94 | typedef struct _osd_shared_mem osd_shared_mem; |
| 97 | 95 | |
| 98 | typedef struct _gaelco_serial_state gaelco_serial_state; | |
| 99 | struct _gaelco_serial_state | |
| 96 | struct gaelco_serial_state | |
| 100 | 97 | { |
| 101 | 98 | device_t *m_device; |
| 102 | 99 | devcb_resolved_write_line m_irq_func; |
| r17907 | r17908 | |
|---|---|---|
| 34 | 34 | DEVICE INTERFACE TYPE |
| 35 | 35 | ***************************************************************************/ |
| 36 | 36 | |
| 37 | typedef struct _gaelco_serial_interface gaelco_serial_interface; | |
| 38 | struct _gaelco_serial_interface | |
| 37 | struct gaelco_serial_interface | |
| 39 | 38 | { |
| 40 | 39 | devcb_write_line irq_func; |
| 41 | 40 | }; |
| r17907 | r17908 | |
|---|---|---|
| 1869 | 1869 | |
| 1870 | 1870 | |
| 1871 | 1871 | /* state of the tape */ |
| 1872 | typedef struct _tape_state tape_state; | |
| 1873 | struct _tape_state | |
| 1872 | struct tape_state | |
| 1874 | 1873 | { |
| 1875 | 1874 | running_machine * machine; /* pointer back to the machine */ |
| 1876 | 1875 | emu_timer * timer; /* timer for running the tape */ |
| r17907 | r17908 | |
|---|---|---|
| 220 | 220 | ***************************************************************************/ |
| 221 | 221 | |
| 222 | 222 | /* a single possible instruction decoding */ |
| 223 | typedef struct _fd1094_possibility fd1094_possibility; | |
| 224 | struct _fd1094_possibility | |
| 223 | struct fd1094_possibility | |
| 225 | 224 | { |
| 226 | 225 | offs_t basepc; /* starting PC of the possibility */ |
| 227 | 226 | int length; /* number of words */ |
| r17907 | r17908 | |
| 232 | 231 | }; |
| 233 | 232 | |
| 234 | 233 | /* an entry in the opcode table */ |
| 235 | typedef struct _optable_entry optable_entry; | |
| 236 | struct _optable_entry | |
| 234 | struct optable_entry | |
| 237 | 235 | { |
| 238 | 236 | UINT32 flags; /* per-opcode flags */ |
| 239 | 237 | const char * string; /* identifying string */ |
| r17907 | r17908 | |
|---|---|---|
| 2 | 2 | #include "cpu/z80/z80.h" |
| 3 | 3 | #include "machine/buggychl.h" |
| 4 | 4 | |
| 5 | typedef struct _buggychl_mcu_state buggychl_mcu_state; | |
| 6 | struct _buggychl_mcu_state | |
| 5 | struct buggychl_mcu_state | |
| 7 | 6 | { |
| 8 | 7 | UINT8 m_port_a_in; |
| 9 | 8 | UINT8 m_port_a_out; |
| r17907 | r17908 | |
|---|---|---|
| 61 | 61 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 62 | 62 | |
| 63 | 63 | |
| 64 | typedef struct _namco_53xx_state namco_53xx_state; | |
| 65 | struct _namco_53xx_state | |
| 64 | struct namco_53xx_state | |
| 66 | 65 | { |
| 67 | 66 | device_t * m_cpu; |
| 68 | 67 | UINT8 m_portO; |
| r17907 | r17908 | |
|---|---|---|
| 4 | 4 | #include "devlegcy.h" |
| 5 | 5 | |
| 6 | 6 | |
| 7 | typedef struct _namco_53xx_interface namco_53xx_interface; | |
| 8 | struct _namco_53xx_interface | |
| 7 | struct namco_53xx_interface | |
| 9 | 8 | { |
| 10 | 9 | devcb_read8 k; /* read handlers for K port */ |
| 11 | 10 | devcb_read8 in[4]; /* read handlers for ports A-D */ |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | #define VERBOSE 0 |
| 17 | 17 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 18 | 18 | |
| 19 | typedef struct _namco_62xx_state namco_62xx_state; | |
| 20 | struct _namco_62xx_state | |
| 19 | struct namco_62xx_state | |
| 21 | 20 | { |
| 22 | 21 | device_t* m_cpu; |
| 23 | 22 | devcb_resolved_read8 m_in[4]; |
| r17907 | r17908 | |
|---|---|---|
| 34 | 34 | |
| 35 | 35 | /*------------- Stepper motor interface structure -----------------*/ |
| 36 | 36 | |
| 37 | typedef struct _stepper_interface stepper_interface; | |
| 38 | struct _stepper_interface | |
| 37 | struct stepper_interface | |
| 39 | 38 | { |
| 40 | 39 | UINT8 type; /* Reel unit type */ |
| 41 | 40 | INT16 index_start;/* start position of index (in half steps) */ |
| r17907 | r17908 | |
|---|---|---|
| 4 | 4 | #include "devlegcy.h" |
| 5 | 5 | |
| 6 | 6 | |
| 7 | typedef struct _namco_62xx_interface namco_62xx_interface; | |
| 8 | struct _namco_62xx_interface | |
| 7 | struct namco_62xx_interface | |
| 9 | 8 | { |
| 10 | 9 | devcb_read8 in[4]; /* read handlers for ports A-D */ |
| 11 | 10 | devcb_write8 out[2]; /* write handlers for ports A-B */ |
| r17907 | r17908 | |
|---|---|---|
| 63 | 63 | |
| 64 | 64 | typedef void (*atarigen_scanline_func)(screen_device &screen, int scanline); |
| 65 | 65 | |
| 66 | typedef struct _atarivc_state_desc atarivc_state_desc; | |
| 67 | struct _atarivc_state_desc | |
| 66 | struct atarivc_state_desc | |
| 68 | 67 | { |
| 69 | 68 | UINT32 latch1; /* latch #1 value (-1 means disabled) */ |
| 70 | 69 | UINT32 latch2; /* latch #2 value (-1 means disabled) */ |
| r17907 | r17908 | |
| 81 | 80 | }; |
| 82 | 81 | |
| 83 | 82 | |
| 84 | typedef struct _atarigen_screen_timer atarigen_screen_timer; | |
| 85 | struct _atarigen_screen_timer | |
| 83 | struct atarigen_screen_timer | |
| 86 | 84 | { |
| 87 | 85 | screen_device *screen; |
| 88 | 86 | emu_timer * scanline_interrupt_timer; |
| r17907 | r17908 | |
|---|---|---|
| 29 | 29 | #define MB_TEST 0 |
| 30 | 30 | #define LOG(x) do { if (MB_TEST) logerror x; } while (0) |
| 31 | 31 | |
| 32 | typedef struct _mathbox_state mathbox_state; | |
| 33 | struct _mathbox_state | |
| 32 | struct mathbox_state | |
| 34 | 33 | { |
| 35 | 34 | device_t *device; |
| 36 | 35 | /* math box scratch registers */ |
| r17907 | r17908 | |
|---|---|---|
| 157 | 157 | |
| 158 | 158 | |
| 159 | 159 | |
| 160 | typedef struct _mcd212_ab_t mcd212_ab_t; | |
| 161 | struct _mcd212_ab_t | |
| 160 | struct mcd212_ab_t | |
| 162 | 161 | { |
| 163 | 162 | //* Color limit array. |
| 164 | 163 | BYTE68K limit[3 * BYTE68K_MAX]; |
| r17907 | r17908 | |
|---|---|---|
| 33 | 33 | * |
| 34 | 34 | *************************************/ |
| 35 | 35 | |
| 36 | typedef struct _poly_extra_data poly_extra_data; | |
| 37 | struct _poly_extra_data | |
| 36 | struct poly_extra_data | |
| 38 | 37 | { |
| 39 | 38 | const void * palbase; |
| 40 | 39 | const void * texbase; |
| r17907 | r17908 | |
|---|---|---|
| 36 | 36 | static int count = 0; |
| 37 | 37 | #endif |
| 38 | 38 | |
| 39 | typedef struct _poly_extra_data poly_extra_data; | |
| 40 | struct _poly_extra_data | |
| 39 | struct poly_extra_data | |
| 41 | 40 | { |
| 42 | 41 | UINT32 color; |
| 43 | 42 | int texture_x, texture_y; |
| r17907 | r17908 | |
|---|---|---|
| 35 | 35 | typedef int (*atarimo_special_func)(bitmap_ind16 &bitmap, const rectangle &clip, int code, int color, int xpos, int ypos, rectangle *mobounds); |
| 36 | 36 | |
| 37 | 37 | /* description for a four-word mask */ |
| 38 | typedef struct _atarimo_entry atarimo_entry; | |
| 39 | struct _atarimo_entry | |
| 38 | struct atarimo_entry | |
| 40 | 39 | { |
| 41 | 40 | UINT16 data[4]; |
| 42 | 41 | }; |
| 43 | 42 | |
| 44 | 43 | /* description of the motion objects */ |
| 45 | typedef struct _atarimo_desc atarimo_desc; | |
| 46 | struct _atarimo_desc | |
| 44 | struct atarimo_desc | |
| 47 | 45 | { |
| 48 | 46 | UINT8 gfxindex; /* index to which gfx system */ |
| 49 | 47 | UINT8 banks; /* number of motion object banks */ |
| r17907 | r17908 | |
| 81 | 79 | }; |
| 82 | 80 | |
| 83 | 81 | /* rectangle list */ |
| 84 | typedef struct _atarimo_rect_list atarimo_rect_list; | |
| 85 | struct _atarimo_rect_list | |
| 82 | struct atarimo_rect_list | |
| 86 | 83 | { |
| 87 | 84 | int numrects; |
| 88 | 85 | rectangle * rect; |
| r17907 | r17908 | |
|---|---|---|
| 544 | 544 | /* */ |
| 545 | 545 | /***************************************************************************/ |
| 546 | 546 | |
| 547 | typedef struct _pc080sn_state pc080sn_state; | |
| 548 | struct _pc080sn_state | |
| 547 | struct pc080sn_state | |
| 549 | 548 | { |
| 550 | 549 | UINT16 ctrl[8]; |
| 551 | 550 | |
| r17907 | r17908 | |
| 1048 | 1047 | /* */ |
| 1049 | 1048 | /***************************************************************************/ |
| 1050 | 1049 | |
| 1051 | typedef struct _pc090oj_state pc090oj_state; | |
| 1052 | struct _pc090oj_state | |
| 1050 | struct pc090oj_state | |
| 1053 | 1051 | { |
| 1054 | 1052 | /* NB: pc090oj_ctrl is the internal register controlling flipping |
| 1055 | 1053 | |
| r17907 | r17908 | |
| 1278 | 1276 | /* */ |
| 1279 | 1277 | /***************************************************************************/ |
| 1280 | 1278 | |
| 1281 | typedef struct _tc0080vco_state tc0080vco_state; | |
| 1282 | struct _tc0080vco_state | |
| 1279 | struct tc0080vco_state | |
| 1283 | 1280 | { |
| 1284 | 1281 | UINT16 * ram; |
| 1285 | 1282 | UINT16 * bg0_ram_0; |
| r17907 | r17908 | |
| 1991 | 1988 | /* */ |
| 1992 | 1989 | /***************************************************************************/ |
| 1993 | 1990 | |
| 1994 | typedef struct _tc0100scn_state tc0100scn_state; | |
| 1995 | struct _tc0100scn_state | |
| 1991 | struct tc0100scn_state | |
| 1996 | 1992 | { |
| 1997 | 1993 | UINT16 ctrl[8]; |
| 1998 | 1994 | |
| r17907 | r17908 | |
| 2636 | 2632 | /* */ |
| 2637 | 2633 | /***************************************************************************/ |
| 2638 | 2634 | |
| 2639 | typedef struct _tc0280grd_state tc0280grd_state; | |
| 2640 | struct _tc0280grd_state | |
| 2635 | struct tc0280grd_state | |
| 2641 | 2636 | { |
| 2642 | 2637 | UINT16 * ram; |
| 2643 | 2638 | |
| r17907 | r17908 | |
| 2835 | 2830 | /* */ |
| 2836 | 2831 | /***************************************************************************/ |
| 2837 | 2832 | |
| 2838 | typedef struct _tc0360pri_state tc0360pri_state; | |
| 2839 | struct _tc0360pri_state | |
| 2833 | struct tc0360pri_state | |
| 2840 | 2834 | { |
| 2841 | 2835 | UINT8 regs[16]; |
| 2842 | 2836 | }; |
| r17907 | r17908 | |
| 2941 | 2935 | /* */ |
| 2942 | 2936 | /***************************************************************************/ |
| 2943 | 2937 | |
| 2944 | typedef struct _tc0480scp_state tc0480scp_state; | |
| 2945 | struct _tc0480scp_state | |
| 2938 | struct tc0480scp_state | |
| 2946 | 2939 | { |
| 2947 | 2940 | UINT16 ctrl[0x18]; |
| 2948 | 2941 | |
| r17907 | r17908 | |
| 3925 | 3918 | /* */ |
| 3926 | 3919 | /***************************************************************************/ |
| 3927 | 3920 | |
| 3928 | typedef struct _tc0150rod_state tc0150rod_state; | |
| 3929 | struct _tc0150rod_state | |
| 3921 | struct tc0150rod_state | |
| 3930 | 3922 | { |
| 3931 | 3923 | UINT16 * ram; |
| 3932 | 3924 | |
| r17907 | r17908 | |
| 4761 | 4753 | /* */ |
| 4762 | 4754 | /***************************************************************************/ |
| 4763 | 4755 | |
| 4764 | typedef struct _tc0110pcr_state tc0110pcr_state; | |
| 4765 | struct _tc0110pcr_state | |
| 4756 | struct tc0110pcr_state | |
| 4766 | 4757 | { |
| 4767 | 4758 | running_machine &machine() const { assert(m_machine != NULL); return *m_machine; } |
| 4768 | 4759 | UINT16 * ram; |
| r17907 | r17908 | |
| 5019 | 5010 | /* */ |
| 5020 | 5011 | /***************************************************************************/ |
| 5021 | 5012 | |
| 5022 | typedef struct _tc0180vcu_state tc0180vcu_state; | |
| 5023 | struct _tc0180vcu_state | |
| 5013 | struct tc0180vcu_state | |
| 5024 | 5014 | { |
| 5025 | 5015 | UINT16 ctrl[0x10]; |
| 5026 | 5016 |
| r17907 | r17908 | |
|---|---|---|
| 12 | 12 | TYPE DEFINITIONS |
| 13 | 13 | ***************************************************************************/ |
| 14 | 14 | |
| 15 | typedef struct _pc080sn_interface pc080sn_interface; | |
| 16 | struct _pc080sn_interface | |
| 15 | struct pc080sn_interface | |
| 17 | 16 | { |
| 18 | 17 | int gfxnum; |
| 19 | 18 | |
| r17907 | r17908 | |
| 23 | 22 | }; |
| 24 | 23 | |
| 25 | 24 | |
| 26 | typedef struct _pc090oj_interface pc090oj_interface; | |
| 27 | struct _pc090oj_interface | |
| 25 | struct pc090oj_interface | |
| 28 | 26 | { |
| 29 | 27 | int gfxnum; |
| 30 | 28 | |
| r17907 | r17908 | |
| 33 | 31 | }; |
| 34 | 32 | |
| 35 | 33 | |
| 36 | typedef struct _tc0080vco_interface tc0080vco_interface; | |
| 37 | struct _tc0080vco_interface | |
| 34 | struct tc0080vco_interface | |
| 38 | 35 | { |
| 39 | 36 | int gfxnum; |
| 40 | 37 | int txnum; |
| r17907 | r17908 | |
| 45 | 42 | int has_fg0; /* for debug */ |
| 46 | 43 | }; |
| 47 | 44 | |
| 48 | typedef struct _tc0100scn_interface tc0100scn_interface; | |
| 49 | struct _tc0100scn_interface | |
| 45 | struct tc0100scn_interface | |
| 50 | 46 | { |
| 51 | 47 | const char *screen; |
| 52 | 48 | |
| r17907 | r17908 | |
| 62 | 58 | }; |
| 63 | 59 | |
| 64 | 60 | |
| 65 | typedef struct _tc0280grd_interface tc0280grd_interface; | |
| 66 | struct _tc0280grd_interface | |
| 61 | struct tc0280grd_interface | |
| 67 | 62 | { |
| 68 | 63 | int gfxnum; |
| 69 | 64 | }; |
| 70 | 65 | |
| 71 | 66 | |
| 72 | typedef struct _tc0480scp_interface tc0480scp_interface; | |
| 73 | struct _tc0480scp_interface | |
| 67 | struct tc0480scp_interface | |
| 74 | 68 | { |
| 75 | 69 | int gfxnum; |
| 76 | 70 | int txnum; |
| r17907 | r17908 | |
| 85 | 79 | }; |
| 86 | 80 | |
| 87 | 81 | |
| 88 | typedef struct _tc0150rod_interface tc0150rod_interface; | |
| 89 | struct _tc0150rod_interface | |
| 82 | struct tc0150rod_interface | |
| 90 | 83 | { |
| 91 | 84 | const char *gfx_region; /* gfx region for the road */ |
| 92 | 85 | }; |
| 93 | 86 | |
| 94 | 87 | |
| 95 | typedef struct _tc0110pcr_interface tc0110pcr_interface; | |
| 96 | struct _tc0110pcr_interface | |
| 88 | struct tc0110pcr_interface | |
| 97 | 89 | { |
| 98 | 90 | int pal_offs; |
| 99 | 91 | }; |
| 100 | 92 | |
| 101 | typedef struct _tc0180vcu_interface tc0180vcu_interface; | |
| 102 | struct _tc0180vcu_interface | |
| 93 | struct tc0180vcu_interface | |
| 103 | 94 | { |
| 104 | 95 | int bg_color_base; |
| 105 | 96 | int fg_color_base; |
| r17907 | r17908 | |
|---|---|---|
| 137 | 137 | UINT8 luma; |
| 138 | 138 | } _quad_m2; |
| 139 | 139 | |
| 140 | typedef struct _poly_extra_data poly_extra_data; | |
| 141 | struct _poly_extra_data | |
| 140 | struct poly_extra_data | |
| 142 | 141 | { |
| 143 | 142 | model2_state * state; |
| 144 | 143 | UINT32 lumabase; |
| r17907 | r17908 | |
|---|---|---|
| 35 | 35 | * |
| 36 | 36 | *************************************/ |
| 37 | 37 | |
| 38 | typedef struct _poly_extra_data poly_extra_data; | |
| 39 | struct _poly_extra_data | |
| 38 | struct poly_extra_data | |
| 40 | 39 | { |
| 41 | 40 | const void * palbase; |
| 42 | 41 | const void * texbase; |
| r17907 | r17908 | |
|---|---|---|
| 33 | 33 | rgb_t data[1]; |
| 34 | 34 | }; |
| 35 | 35 | |
| 36 | typedef struct _poly_extra_data poly_extra_data; | |
| 37 | struct _poly_extra_data | |
| 36 | struct poly_extra_data | |
| 38 | 37 | { |
| 39 | 38 | cached_texture *texture; |
| 40 | 39 | bitmap_ind32 *zbuffer; |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | #define X_OFFSET 96 |
| 7 | 7 | #define Y_OFFSET 60 |
| 8 | 8 | |
| 9 | typedef struct _poly_extra_data poly_extra_data; | |
| 10 | struct _poly_extra_data | |
| 9 | struct poly_extra_data | |
| 11 | 10 | { |
| 12 | 11 | bitmap_ind16 *texbase; |
| 13 | 12 | }; |
| 14 | 13 | |
| 15 | typedef struct _polygon polygon; | |
| 16 | struct _polygon | |
| 14 | struct polygon | |
| 17 | 15 | { |
| 18 | 16 | float x; |
| 19 | 17 | float y; |
| r17907 | r17908 | |
|---|---|---|
| 336 | 336 | |
| 337 | 337 | |
| 338 | 338 | |
| 339 | typedef struct _poly_extra_data poly_extra_data; | |
| 340 | struct _poly_extra_data | |
| 339 | struct poly_extra_data | |
| 341 | 340 | { |
| 342 | 341 | /* poly / sprites */ |
| 343 | 342 | running_machine *machine; |
| r17907 | r17908 | |
|---|---|---|
| 13 | 13 | |
| 14 | 14 | #include "includes/atari.h" |
| 15 | 15 | |
| 16 | typedef struct _gtia_interface gtia_interface; | |
| 17 | struct _gtia_interface | |
| 16 | struct gtia_interface | |
| 18 | 17 | { |
| 19 | 18 | UINT8 (*console_read)(address_space *space); |
| 20 | 19 | void (*console_write)(address_space *space, UINT8 data); |
| r17907 | r17908 | |
| 24 | 23 | |
| 25 | 24 | |
| 26 | 25 | /* reading registers */ |
| 27 | typedef struct _gtia_readregs gtia_readregs; | |
| 28 | struct _gtia_readregs | |
| 26 | struct gtia_readregs | |
| 29 | 27 | { |
| 30 | 28 | UINT8 m0pf; /* d000 missile 0 playfield collisions */ |
| 31 | 29 | UINT8 m1pf; /* d001 missile 1 playfield collisions */ |
| r17907 | r17908 | |
| 59 | 57 | }; |
| 60 | 58 | |
| 61 | 59 | /* writing registers */ |
| 62 | typedef struct _gtia_writeregs gtia_writeregs; | |
| 63 | struct _gtia_writeregs | |
| 60 | struct gtia_writeregs | |
| 64 | 61 | { |
| 65 | 62 | UINT8 hposp0; /* d000 player 0 horz position */ |
| 66 | 63 | UINT8 hposp1; /* d001 player 1 horz position */ |
| r17907 | r17908 | |
| 97 | 94 | }; |
| 98 | 95 | |
| 99 | 96 | /* helpers */ |
| 100 | typedef struct _gtia_helpervars gtia_helpervars; | |
| 101 | struct _gtia_helpervars | |
| 97 | struct gtia_helpervars | |
| 102 | 98 | { |
| 103 | 99 | UINT8 grafp0; /* optimized graphics data player 0 */ |
| 104 | 100 | UINT8 grafp1; /* optimized graphics data player 1 */ |
| r17907 | r17908 | |
| 125 | 121 | UINT8 vdelay_p3; /* vertical delay for player 3 */ |
| 126 | 122 | }; |
| 127 | 123 | |
| 128 | typedef struct _gtia_struct gtia_struct; | |
| 129 | struct _gtia_struct | |
| 124 | struct gtia_struct | |
| 130 | 125 | { |
| 131 | 126 | gtia_interface intf; |
| 132 | 127 | gtia_readregs r; /* read registers */ |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | |
| 11 | 11 | |
| 12 | 12 | |
| 13 | typedef struct _sprite_info sprite_info; | |
| 14 | struct _sprite_info | |
| 13 | struct sprite_info | |
| 15 | 14 | { |
| 16 | 15 | UINT16 ve; /* VE0-15 signals for this row */ |
| 17 | 16 | UINT8 lst; /* LST0-7 signals for this row */ |
| r17907 | r17908 | |
|---|---|---|
| 164 | 164 | #include "ui.h" |
| 165 | 165 | |
| 166 | 166 | |
| 167 | typedef struct _deco16ic_state deco16ic_state; | |
| 168 | struct _deco16ic_state | |
| 167 | struct deco16ic_state | |
| 169 | 168 | { |
| 170 | 169 | screen_device *screen; |
| 171 | 170 |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | typedef int (*deco16_bank_cb)( const int bank ); |
| 22 | 22 | |
| 23 | 23 | |
| 24 | typedef struct _deco16ic_interface deco16ic_interface; | |
| 25 | struct _deco16ic_interface | |
| 24 | struct deco16ic_interface | |
| 26 | 25 | { |
| 27 | 26 | const char *screen; |
| 28 | 27 | int split; |
| r17907 | r17908 | |
|---|---|---|
| 112 | 112 | running_machine *m_machine; |
| 113 | 113 | }; |
| 114 | 114 | |
| 115 | typedef struct _vgconf vgconf; | |
| 116 | struct _vgconf | |
| 115 | struct vgconf | |
| 117 | 116 | { |
| 118 | 117 | int (*handler[8])(vgdata *); |
| 119 | 118 | UINT8 (*state_addr)(vgdata *); |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | #include "ui.h" |
| 10 | 10 | |
| 11 | 11 | |
| 12 | typedef struct _decocomn_state decocomn_state; | |
| 13 | struct _decocomn_state | |
| 12 | struct decocomn_state | |
| 14 | 13 | { |
| 15 | 14 | screen_device *screen; |
| 16 | 15 | UINT8 *dirty_palette; |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | ***************************************************************************/ |
| 17 | 17 | |
| 18 | 18 | |
| 19 | typedef struct _decocomn_interface decocomn_interface; | |
| 20 | struct _decocomn_interface | |
| 19 | struct decocomn_interface | |
| 21 | 20 | { |
| 22 | 21 | const char *screen; |
| 23 | 22 | }; |
| r17907 | r17908 | |
|---|---|---|
| 74 | 74 | UINT32 Height; |
| 75 | 75 | } _RenderState; |
| 76 | 76 | |
| 77 | typedef struct _vr0video_state vr0video_state; | |
| 78 | struct _vr0video_state | |
| 77 | struct vr0video_state | |
| 79 | 78 | { |
| 80 | 79 | device_t *cpu; |
| 81 | 80 |
| r17907 | r17908 | |
|---|---|---|
| 7 | 7 | TYPE DEFINITIONS |
| 8 | 8 | ***************************************************************************/ |
| 9 | 9 | |
| 10 | typedef struct _vr0video_interface vr0video_interface; | |
| 11 | struct _vr0video_interface | |
| 10 | struct vr0video_interface | |
| 12 | 11 | { |
| 13 | 12 | const char *cpu; |
| 14 | 13 | }; |
| r17907 | r17908 | |
|---|---|---|
| 50 | 50 | #include "emu.h" |
| 51 | 51 | #include "video/kan_pand.h" |
| 52 | 52 | |
| 53 | typedef struct _kaneko_pandora_state kaneko_pandora_state; | |
| 54 | struct _kaneko_pandora_state | |
| 53 | struct kaneko_pandora_state | |
| 55 | 54 | { |
| 56 | 55 | screen_device *screen; |
| 57 | 56 | UINT8 * spriteram; |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | TYPE DEFINITIONS |
| 16 | 16 | ***************************************************************************/ |
| 17 | 17 | |
| 18 | typedef struct _kaneko_pandora_interface kaneko_pandora_interface; | |
| 19 | struct _kaneko_pandora_interface | |
| 18 | struct kaneko_pandora_interface | |
| 20 | 19 | { |
| 21 | 20 | const char *screen; |
| 22 | 21 | UINT8 gfx_region; |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | #ifndef BFM_DM01 |
| 7 | 7 | #define BFM_DM01 |
| 8 | 8 | |
| 9 | typedef struct _bfmdm01_interface bfmdm01_interface; | |
| 10 | struct _bfmdm01_interface | |
| 9 | struct bfmdm01_interface | |
| 11 | 10 | { |
| 12 | 11 | void (*busy_func)(running_machine &machine, int state); |
| 13 | 12 | }; |
| r17907 | r17908 | |
|---|---|---|
| 1332 | 1332 | /* */ |
| 1333 | 1333 | /***************************************************************************/ |
| 1334 | 1334 | |
| 1335 | typedef struct _k007121_state k007121_state ; | |
| 1336 | struct _k007121_state | |
| 1335 | struct k007121_state | |
| 1337 | 1336 | { |
| 1338 | 1337 | |
| 1339 | 1338 | UINT8 ctrlram[8]; |
| r17907 | r17908 | |
| 1619 | 1618 | /* */ |
| 1620 | 1619 | /***************************************************************************/ |
| 1621 | 1620 | |
| 1622 | typedef struct _k007342_state k007342_state; | |
| 1623 | struct _k007342_state | |
| 1621 | struct k007342_state | |
| 1624 | 1622 | { |
| 1625 | 1623 | UINT8 *ram; |
| 1626 | 1624 | UINT8 *scroll_ram; |
| r17907 | r17908 | |
| 1932 | 1930 | /* */ |
| 1933 | 1931 | /***************************************************************************/ |
| 1934 | 1932 | |
| 1935 | typedef struct _k007420_state k007420_state; | |
| 1936 | struct _k007420_state | |
| 1933 | struct k007420_state | |
| 1937 | 1934 | { |
| 1938 | 1935 | UINT8 *ram; |
| 1939 | 1936 | |
| r17907 | r17908 | |
| 2227 | 2224 | /* */ |
| 2228 | 2225 | /***************************************************************************/ |
| 2229 | 2226 | |
| 2230 | typedef struct _k052109_state k052109_state; | |
| 2231 | struct _k052109_state | |
| 2227 | struct k052109_state | |
| 2232 | 2228 | { |
| 2233 | 2229 | UINT8 *ram; |
| 2234 | 2230 | UINT8 *videoram_F; |
| r17907 | r17908 | |
| 2897 | 2893 | /* */ |
| 2898 | 2894 | /***************************************************************************/ |
| 2899 | 2895 | |
| 2900 | typedef struct _k051960_state k051960_state; | |
| 2901 | struct _k051960_state | |
| 2896 | struct k051960_state | |
| 2902 | 2897 | { |
| 2903 | 2898 | UINT8 *ram; |
| 2904 | 2899 | |
| r17907 | r17908 | |
| 3477 | 3472 | /* */ |
| 3478 | 3473 | /***************************************************************************/ |
| 3479 | 3474 | |
| 3480 | typedef struct _k05324x_state k05324x_state; | |
| 3481 | struct _k05324x_state | |
| 3475 | struct k05324x_state | |
| 3482 | 3476 | { |
| 3483 | 3477 | UINT16 *ram; |
| 3484 | 3478 | UINT16 *buffer; |
| r17907 | r17908 | |
| 4303 | 4297 | /* */ |
| 4304 | 4298 | /***************************************************************************/ |
| 4305 | 4299 | |
| 4306 | typedef struct _k053247_state k053247_state; | |
| 4307 | struct _k053247_state | |
| 4300 | struct k053247_state | |
| 4308 | 4301 | { |
| 4309 | 4302 | UINT16 *ram; |
| 4310 | 4303 | |
| r17907 | r17908 | |
| 5380 | 5373 | /* */ |
| 5381 | 5374 | /***************************************************************************/ |
| 5382 | 5375 | |
| 5383 | typedef struct _k051316_state k051316_state; | |
| 5384 | struct _k051316_state | |
| 5376 | struct k051316_state | |
| 5385 | 5377 | { |
| 5386 | 5378 | UINT8 *ram; |
| 5387 | 5379 | |
| r17907 | r17908 | |
| 5696 | 5688 | /* */ |
| 5697 | 5689 | /***************************************************************************/ |
| 5698 | 5690 | |
| 5699 | typedef struct _k053936_state k053936_state; | |
| 5700 | struct _k053936_state | |
| 5691 | struct k053936_state | |
| 5701 | 5692 | { |
| 5702 | 5693 | UINT16 *ctrl; |
| 5703 | 5694 | UINT16 *linectrl; |
| r17907 | r17908 | |
| 5959 | 5950 | /* */ |
| 5960 | 5951 | /***************************************************************************/ |
| 5961 | 5952 | |
| 5962 | typedef struct _k053251_state k053251_state; | |
| 5963 | struct _k053251_state | |
| 5953 | struct k053251_state | |
| 5964 | 5954 | { |
| 5965 | 5955 | int dirty_tmap[5]; |
| 5966 | 5956 | |
| r17907 | r17908 | |
| 6149 | 6139 | /* */ |
| 6150 | 6140 | /***************************************************************************/ |
| 6151 | 6141 | |
| 6152 | typedef struct _k054000_state k054000_state; | |
| 6153 | struct _k054000_state | |
| 6142 | struct k054000_state | |
| 6154 | 6143 | { |
| 6155 | 6144 | UINT8 regs[0x20]; |
| 6156 | 6145 | }; |
| r17907 | r17908 | |
| 6296 | 6285 | /* */ |
| 6297 | 6286 | /***************************************************************************/ |
| 6298 | 6287 | |
| 6299 | typedef struct _k051733_state k051733_state; | |
| 6300 | struct _k051733_state | |
| 6288 | struct k051733_state | |
| 6301 | 6289 | { |
| 6302 | 6290 | UINT8 ram[0x20]; |
| 6303 | 6291 | UINT8 rng; |
| r17907 | r17908 | |
| 6491 | 6479 | #define K056832_PAGE_WIDTH (K056832_PAGE_COLS*8) |
| 6492 | 6480 | #define K056832_PAGE_COUNT 16 |
| 6493 | 6481 | |
| 6494 | typedef struct _k056832_state k056832_state; | |
| 6495 | struct _k056832_state | |
| 6482 | struct k056832_state | |
| 6496 | 6483 | { |
| 6497 | 6484 | tilemap_t *tilemap[K056832_PAGE_COUNT]; |
| 6498 | 6485 | bitmap_ind16 *pixmap[K056832_PAGE_COUNT]; |
| r17907 | r17908 | |
| 8473 | 8460 | /* K055555 5-bit-per-pixel priority encoder */ |
| 8474 | 8461 | /* This device has 48 8-bit-wide registers */ |
| 8475 | 8462 | |
| 8476 | typedef struct _k055555_state k055555_state; | |
| 8477 | struct _k055555_state | |
| 8463 | struct k055555_state | |
| 8478 | 8464 | { |
| 8479 | 8465 | UINT8 regs[128]; |
| 8480 | 8466 | }; |
| r17907 | r17908 | |
| 8630 | 8616 | // register-handling shell. |
| 8631 | 8617 | |
| 8632 | 8618 | |
| 8633 | typedef struct _k054338_state k054338_state; | |
| 8634 | struct _k054338_state | |
| 8619 | struct k054338_state | |
| 8635 | 8620 | { |
| 8636 | 8621 | UINT16 regs[32]; |
| 8637 | 8622 | int shd_rgb[9]; |
| r17907 | r17908 | |
| 8974 | 8959 | /* */ |
| 8975 | 8960 | /***************************************************************************/ |
| 8976 | 8961 | |
| 8977 | typedef struct _k001006_state k001006_state; | |
| 8978 | struct _k001006_state | |
| 8962 | struct k001006_state | |
| 8979 | 8963 | { |
| 8980 | 8964 | screen_device *screen; |
| 8981 | 8965 | |
| r17907 | r17908 | |
| 9182 | 9166 | #include "video/poly.h" |
| 9183 | 9167 | #include "cpu/sharc/sharc.h" |
| 9184 | 9168 | |
| 9185 | typedef struct _poly_extra_data poly_extra_data; | |
| 9186 | struct _poly_extra_data | |
| 9169 | struct poly_extra_data | |
| 9187 | 9170 | { |
| 9188 | 9171 | UINT32 color; |
| 9189 | 9172 | int texture_x, texture_y; |
| r17907 | r17908 | |
| 9193 | 9176 | int texture_mirror_y; |
| 9194 | 9177 | }; |
| 9195 | 9178 | |
| 9196 | typedef struct _k001005_state k001005_state; | |
| 9197 | struct _k001005_state | |
| 9179 | struct k001005_state | |
| 9198 | 9180 | { |
| 9199 | 9181 | screen_device *screen; |
| 9200 | 9182 | device_t *cpu; |
| r17907 | r17908 | |
| 10151 | 10133 | /***************************************************************************/ |
| 10152 | 10134 | |
| 10153 | 10135 | |
| 10154 | typedef struct _k001604_state k001604_state; | |
| 10155 | struct _k001604_state | |
| 10136 | struct k001604_state | |
| 10156 | 10137 | { |
| 10157 | 10138 | screen_device *screen; |
| 10158 | 10139 | tilemap_t *layer_8x8[2]; |
| r17907 | r17908 | |
| 10597 | 10578 | /* */ |
| 10598 | 10579 | /***************************************************************************/ |
| 10599 | 10580 | |
| 10600 | typedef struct _k037122_state k037122_state; | |
| 10601 | struct _k037122_state | |
| 10581 | struct k037122_state | |
| 10602 | 10582 | { |
| 10603 | 10583 | screen_device *screen; |
| 10604 | 10584 | tilemap_t *layer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 26 | 26 | typedef void (*k056832_callback)(running_machine &machine, int layer, int *code, int *color, int *flags); |
| 27 | 27 | |
| 28 | 28 | |
| 29 | typedef struct _k007342_interface k007342_interface; | |
| 30 | struct _k007342_interface | |
| 29 | struct k007342_interface | |
| 31 | 30 | { |
| 32 | 31 | int gfxnum; |
| 33 | 32 | k007342_callback callback; |
| 34 | 33 | }; |
| 35 | 34 | |
| 36 | typedef struct _k007420_interface k007420_interface; | |
| 37 | struct _k007420_interface | |
| 35 | struct k007420_interface | |
| 38 | 36 | { |
| 39 | 37 | int banklimit; |
| 40 | 38 | k007420_callback callback; |
| 41 | 39 | }; |
| 42 | 40 | |
| 43 | typedef struct _k052109_interface k052109_interface; | |
| 44 | struct _k052109_interface | |
| 41 | struct k052109_interface | |
| 45 | 42 | { |
| 46 | 43 | const char *gfx_memory_region; |
| 47 | 44 | int gfx_num; |
| r17907 | r17908 | |
| 50 | 47 | k052109_callback callback; |
| 51 | 48 | }; |
| 52 | 49 | |
| 53 | typedef struct _k051960_interface k051960_interface; | |
| 54 | struct _k051960_interface | |
| 50 | struct k051960_interface | |
| 55 | 51 | { |
| 56 | 52 | const char *gfx_memory_region; |
| 57 | 53 | int gfx_num; |
| r17907 | r17908 | |
| 60 | 56 | k051960_callback callback; |
| 61 | 57 | }; |
| 62 | 58 | |
| 63 | typedef struct _k05324x_interface k05324x_interface; | |
| 64 | struct _k05324x_interface | |
| 59 | struct k05324x_interface | |
| 65 | 60 | { |
| 66 | 61 | const char *gfx_memory_region; |
| 67 | 62 | int gfx_num; |
| r17907 | r17908 | |
| 71 | 66 | k05324x_callback callback; |
| 72 | 67 | }; |
| 73 | 68 | |
| 74 | typedef struct _k053247_interface k053247_interface; | |
| 75 | struct _k053247_interface | |
| 69 | struct k053247_interface | |
| 76 | 70 | { |
| 77 | 71 | const char *screen; |
| 78 | 72 | const char *gfx_memory_region; |
| r17907 | r17908 | |
| 83 | 77 | k05324x_callback callback; |
| 84 | 78 | }; |
| 85 | 79 | |
| 86 | typedef struct _k051316_interface k051316_interface; | |
| 87 | struct _k051316_interface | |
| 80 | struct k051316_interface | |
| 88 | 81 | { |
| 89 | 82 | const char *gfx_memory_region; |
| 90 | 83 | int gfx_num; |
| r17907 | r17908 | |
| 93 | 86 | k051316_callback callback; |
| 94 | 87 | }; |
| 95 | 88 | |
| 96 | typedef struct _k053936_interface k053936_interface; | |
| 97 | struct _k053936_interface | |
| 89 | struct k053936_interface | |
| 98 | 90 | { |
| 99 | 91 | int wrap, xoff, yoff; |
| 100 | 92 | }; |
| 101 | 93 | |
| 102 | typedef struct _k056832_interface k056832_interface; | |
| 103 | struct _k056832_interface | |
| 94 | struct k056832_interface | |
| 104 | 95 | { |
| 105 | 96 | const char *gfx_memory_region; |
| 106 | 97 | int gfx_num; |
| r17907 | r17908 | |
| 113 | 104 | const char *k055555; // tbyahhoo uses the k056832 together with a k055555 |
| 114 | 105 | }; |
| 115 | 106 | |
| 116 | typedef struct _k054338_interface k054338_interface; | |
| 117 | struct _k054338_interface | |
| 107 | struct k054338_interface | |
| 118 | 108 | { |
| 119 | 109 | const char *screen; |
| 120 | 110 | int alpha_inv; |
| 121 | 111 | const char *k055555; |
| 122 | 112 | }; |
| 123 | 113 | |
| 124 | typedef struct _k001006_interface k001006_interface; | |
| 125 | struct _k001006_interface | |
| 114 | struct k001006_interface | |
| 126 | 115 | { |
| 127 | 116 | const char *gfx_region; |
| 128 | 117 | }; |
| 129 | 118 | |
| 130 | typedef struct _k001005_interface k001005_interface; | |
| 131 | struct _k001005_interface | |
| 119 | struct k001005_interface | |
| 132 | 120 | { |
| 133 | 121 | const char *screen; |
| 134 | 122 | const char *cpu; |
| r17907 | r17908 | |
| 140 | 128 | int gfx_index; |
| 141 | 129 | }; |
| 142 | 130 | |
| 143 | typedef struct _k001604_interface k001604_interface; | |
| 144 | struct _k001604_interface | |
| 131 | struct k001604_interface | |
| 145 | 132 | { |
| 146 | 133 | int gfx_index_1; |
| 147 | 134 | int gfx_index_2; |
| r17907 | r17908 | |
| 151 | 138 | int is_slrasslt; |
| 152 | 139 | }; |
| 153 | 140 | |
| 154 | typedef struct _k037122_interface k037122_interface; | |
| 155 | struct _k037122_interface | |
| 141 | struct k037122_interface | |
| 156 | 142 | { |
| 157 | 143 | const char *screen; |
| 158 | 144 | int gfx_index; |
| r17907 | r17908 | |
|---|---|---|
| 689 | 689 | } hng64trans_t; |
| 690 | 690 | |
| 691 | 691 | |
| 692 | typedef struct _blit_parameters blit_parameters; | |
| 693 | struct _blit_parameters | |
| 692 | struct blit_parameters | |
| 694 | 693 | { |
| 695 | 694 | bitmap_rgb32 * bitmap; |
| 696 | 695 | rectangle cliprect; |
| r17907 | r17908 | |
|---|---|---|
| 349 | 349 | DECLARE_MACHINE_RESET(mtnew); |
| 350 | 350 | }; |
| 351 | 351 | |
| 352 | typedef struct _megadriv_cart megadriv_cart; | |
| 353 | struct _megadriv_cart | |
| 352 | struct megadriv_cart | |
| 354 | 353 | { |
| 355 | 354 | int type; |
| 356 | 355 |
| r17907 | r17908 | |
|---|---|---|
| 320 | 320 | |
| 321 | 321 | #define FLAGS_AGA_CHIPSET (1 << 0) |
| 322 | 322 | |
| 323 | typedef struct _amiga_machine_interface amiga_machine_interface; | |
| 324 | struct _amiga_machine_interface | |
| 323 | struct amiga_machine_interface | |
| 325 | 324 | { |
| 326 | 325 | UINT32 chip_ram_mask; |
| 327 | 326 | |
| r17907 | r17908 | |
| 342 | 341 | #define IS_ECS(intf) ( intf->chip_ram_mask == ECS_CHIP_RAM_MASK && (( intf->flags & FLAGS_AGA_CHIPSET) == 0)) |
| 343 | 342 | #define IS_ECS_OR_AGA(intf) ( intf->chip_ram_mask == ECS_CHIP_RAM_MASK) |
| 344 | 343 | |
| 345 | typedef struct _amiga_autoconfig_device amiga_autoconfig_device; | |
| 346 | struct _amiga_autoconfig_device | |
| 344 | struct amiga_autoconfig_device | |
| 347 | 345 | { |
| 348 | 346 | UINT8 link_memory; /* link into free memory list */ |
| 349 | 347 | UINT8 rom_vector_valid; /* ROM vector offset valid */ |
| r17907 | r17908 | |
| 361 | 359 | void (*uninstall)(running_machine &machine, offs_t base); /* memory uninstallation */ |
| 362 | 360 | }; |
| 363 | 361 | |
| 364 | typedef struct _autoconfig_device autoconfig_device; | |
| 365 | struct _autoconfig_device | |
| 362 | struct autoconfig_device | |
| 366 | 363 | { |
| 367 | 364 | autoconfig_device * next; |
| 368 | 365 | amiga_autoconfig_device device; |
| r17907 | r17908 | |
|---|---|---|
| 4 | 4 | |
| 5 | 5 | *************************************************************************/ |
| 6 | 6 | |
| 7 | typedef struct _lordgun_gun_data lordgun_gun_data; | |
| 8 | struct _lordgun_gun_data | |
| 7 | struct lordgun_gun_data | |
| 9 | 8 | { |
| 10 | 9 | int scr_x, scr_y; |
| 11 | 10 | UINT16 hw_x, hw_y; |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | UINT8 reg[4]; // |
| 16 | 16 | }; |
| 17 | 17 | |
| 18 | typedef struct _game_offset game_offset; | |
| 19 | struct _game_offset | |
| 18 | struct game_offset | |
| 20 | 19 | { |
| 21 | 20 | /* 2 values, for normal and flipped */ |
| 22 | 21 | const char *gamename; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | *************************************************************************/ |
| 6 | 6 | |
| 7 | 7 | |
| 8 | typedef struct _pf_layer_info pf_layer_info; | |
| 9 | struct _pf_layer_info | |
| 8 | struct pf_layer_info | |
| 10 | 9 | { |
| 11 | 10 | tilemap_t * tmap; |
| 12 | 11 | UINT16 vram_base; |
| r17907 | r17908 | |
|---|---|---|
| 80 | 80 | |
| 81 | 81 | #define SPEEDUP_HACKS 1 |
| 82 | 82 | |
| 83 | typedef struct _speedup_entry speedup_entry; | |
| 84 | struct _speedup_entry | |
| 83 | struct speedup_entry | |
| 85 | 84 | { |
| 86 | 85 | UINT32 offset; |
| 87 | 86 | UINT32 pc; |
| r17907 | r17908 | |
|---|---|---|
| 51 | 51 | extern const device_type MJKJIDAI; |
| 52 | 52 | |
| 53 | 53 | /* Start of ADPCM custom chip code */ |
| 54 | typedef struct _mjkjidai_adpcm_state mjkjidai_adpcm_state; | |
| 55 | struct _mjkjidai_adpcm_state | |
| 54 | struct mjkjidai_adpcm_state | |
| 56 | 55 | { |
| 57 | 56 | oki_adpcm_state m_adpcm; |
| 58 | 57 | sound_stream *m_stream; |
| r17907 | r17908 | |
|---|---|---|
| 111 | 111 | |
| 112 | 112 | /********************************************************************************************/ |
| 113 | 113 | |
| 114 | typedef struct _renegade_adpcm_state renegade_adpcm_state; | |
| 115 | struct _renegade_adpcm_state | |
| 114 | struct renegade_adpcm_state | |
| 116 | 115 | { |
| 117 | 116 | oki_adpcm_state m_adpcm; |
| 118 | 117 | sound_stream *m_stream; |
| r17907 | r17908 | |
|---|---|---|
| 121 | 121 | |
| 122 | 122 | |
| 123 | 123 | |
| 124 | typedef struct _poly_extra_data poly_extra_data; | |
| 125 | struct _poly_extra_data | |
| 124 | struct poly_extra_data | |
| 126 | 125 | { |
| 127 | 126 | UINT16 color; |
| 128 | 127 | UINT16 *screen_ram; |
| r17907 | r17908 | |
|---|---|---|
| 380 | 380 | * |
| 381 | 381 | *************************************/ |
| 382 | 382 | |
| 383 | typedef struct _galileo_timer galileo_timer; | |
| 384 | struct _galileo_timer | |
| 383 | struct galileo_timer | |
| 385 | 384 | { |
| 386 | 385 | emu_timer * timer; |
| 387 | 386 | UINT32 count; |
| r17907 | r17908 | |
| 389 | 388 | }; |
| 390 | 389 | |
| 391 | 390 | |
| 392 | typedef struct _galileo_data galileo_data; | |
| 393 | struct _galileo_data | |
| 391 | struct galileo_data | |
| 394 | 392 | { |
| 395 | 393 | /* raw register data */ |
| 396 | 394 | UINT32 reg[0x1000/4]; |
| r17907 | r17908 | |
| 409 | 407 | }; |
| 410 | 408 | |
| 411 | 409 | |
| 412 | typedef struct _widget_data widget_data; | |
| 413 | struct _widget_data | |
| 410 | struct widget_data | |
| 414 | 411 | { |
| 415 | 412 | /* ethernet register address */ |
| 416 | 413 | UINT8 ethernet_addr; |
| r17907 | r17908 | |
|---|---|---|
| 68 | 68 | ***************************************************************************/ |
| 69 | 69 | |
| 70 | 70 | /* a render_font contains information about a single character in a font */ |
| 71 | typedef struct _render_font_char render_font_char; | |
| 72 | struct _render_font_char | |
| 71 | struct render_font_char | |
| 73 | 72 | { |
| 74 | 73 | INT32 width; /* width from this character to the next */ |
| 75 | 74 | INT32 xoffs, yoffs; /* X and Y offset from baseline to top,left of bitmap */ |
| r17907 | r17908 | |
| 79 | 78 | |
| 80 | 79 | |
| 81 | 80 | /* a render_font contains information about a font */ |
| 82 | typedef struct _render_font render_font; | |
| 83 | struct _render_font | |
| 81 | struct render_font | |
| 84 | 82 | { |
| 85 | 83 | int height; /* height of the font, from ascent to descent */ |
| 86 | 84 | int yoffs; /* y offset from baseline to descent */ |
| r17907 | r17908 | |
|---|---|---|
| 24 | 24 | // TYPE DEFINITIONS |
| 25 | 25 | //============================================================ |
| 26 | 26 | |
| 27 | typedef struct _version_info version_info; | |
| 28 | struct _version_info | |
| 27 | struct version_info | |
| 29 | 28 | { |
| 30 | 29 | int version_major; |
| 31 | 30 | int version_minor; |
| r17907 | r17908 | |
|---|---|---|
| 62 | 62 | typedef enum _display_type display_type; |
| 63 | 63 | |
| 64 | 64 | |
| 65 | typedef struct _dasm_table_entry dasm_table_entry; | |
| 66 | struct _dasm_table_entry | |
| 65 | struct dasm_table_entry | |
| 67 | 66 | { |
| 68 | 67 | const char * name; |
| 69 | 68 | display_type display; |
| r17907 | r17908 | |
| 72 | 71 | }; |
| 73 | 72 | |
| 74 | 73 | |
| 75 | typedef struct _options options; | |
| 76 | struct _options | |
| 74 | struct options | |
| 77 | 75 | { |
| 78 | 76 | const char * filename; |
| 79 | 77 | offs_t basepc; |
| r17907 | r17908 | |
|---|---|---|
| 111 | 111 | |
| 112 | 112 | typedef int (*command_func_type)(int argc, char *argv[]); |
| 113 | 113 | |
| 114 | typedef struct _command_entry command_entry; | |
| 115 | struct _command_entry | |
| 114 | struct command_entry | |
| 116 | 115 | { |
| 117 | 116 | const char *command; |
| 118 | 117 | command_func_type command_func; |
| r17907 | r17908 | |
| 126 | 125 | |
| 127 | 126 | |
| 128 | 127 | /* Pin fuse row configuration */ |
| 129 | typedef struct _pin_fuse_rows pin_fuse_rows; | |
| 130 | struct _pin_fuse_rows | |
| 128 | struct pin_fuse_rows | |
| 131 | 129 | { |
| 132 | 130 | UINT16 pin; /* Pin number */ |
| 133 | 131 | UINT16 fuserowoutputenable; /* Fuse row for the output enable */ |
| r17907 | r17908 | |
| 138 | 136 | |
| 139 | 137 | |
| 140 | 138 | /* Pin fuse column configuration */ |
| 141 | typedef struct _pin_fuse_columns pin_fuse_columns; | |
| 142 | struct _pin_fuse_columns | |
| 139 | struct pin_fuse_columns | |
| 143 | 140 | { |
| 144 | 141 | UINT16 pin; /* Pin number */ |
| 145 | 142 | UINT16 lowfusecolumn; /* Column number for low output */ |
| r17907 | r17908 | |
|---|---|---|
| 84 | 84 | TYPE DEFINITIONS |
| 85 | 85 | ***************************************************************************/ |
| 86 | 86 | |
| 87 | typedef struct _summary_file summary_file; | |
| 88 | struct _summary_file | |
| 87 | struct summary_file | |
| 89 | 88 | { |
| 90 | 89 | summary_file * next; |
| 91 | 90 | char name[20]; |
| r17907 | r17908 | |
| 98 | 97 | }; |
| 99 | 98 | |
| 100 | 99 | |
| 101 | typedef struct _summary_list summary_list; | |
| 102 | struct _summary_list | |
| 100 | struct summary_list | |
| 103 | 101 | { |
| 104 | 102 | summary_list * next; |
| 105 | 103 | summary_file * files; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | // old code passed sdl_info * to functions here |
| 23 | 23 | // however the parameter was not used |
| 24 | 24 | // changed interface to more generic one. |
| 25 | typedef struct _glsl_shader_info glsl_shader_info; | |
| 26 | struct _glsl_shader_info | |
| 25 | struct glsl_shader_info | |
| 27 | 26 | { |
| 28 | 27 | int dummy; // avoid compiler breakage |
| 29 | 28 | }; |
| r17907 | r17908 | |
|---|---|---|
| 46 | 46 | #endif |
| 47 | 47 | |
| 48 | 48 | /* sdl_info is the information about SDL for the current screen */ |
| 49 | typedef struct _sdl_info sdl_info; | |
| 50 | struct _sdl_info | |
| 49 | struct sdl_info | |
| 51 | 50 | { |
| 52 | 51 | INT32 blittimer; |
| 53 | 52 | UINT32 extra_flags; |
| r17907 | r17908 | |
|---|---|---|
| 58 | 58 | //============================================================ |
| 59 | 59 | |
| 60 | 60 | |
| 61 | typedef struct _quad_setup_data quad_setup_data; | |
| 62 | struct _quad_setup_data | |
| 61 | struct quad_setup_data | |
| 63 | 62 | { |
| 64 | 63 | INT32 dudx, dvdx, dudy, dvdy; |
| 65 | 64 | INT32 startu, startv; |
| r17907 | r17908 | |
| 70 | 69 | |
| 71 | 70 | typedef void (*texture_copy_func)(texture_info *texture, const render_texinfo *texsource); |
| 72 | 71 | |
| 73 | typedef struct _copy_info copy_info; | |
| 74 | struct _copy_info { | |
| 72 | struct copy_info { | |
| 75 | 73 | int src_fmt; |
| 76 | 74 | Uint32 dst_fmt; |
| 77 | 75 | int dst_bpp; |
| r17907 | r17908 | |
| 117 | 115 | }; |
| 118 | 116 | |
| 119 | 117 | /* sdl_info is the information about SDL for the current screen */ |
| 120 | typedef struct _sdl_info sdl_info; | |
| 121 | struct _sdl_info | |
| 118 | struct sdl_info | |
| 122 | 119 | { |
| 123 | 120 | INT32 blittimer; |
| 124 | 121 | UINT32 extra_flags; |
| r17907 | r17908 | |
|---|---|---|
| 34 | 34 | #include <signal.h> |
| 35 | 35 | #include <sys/time.h> |
| 36 | 36 | |
| 37 | typedef struct _hidden_mutex_t hidden_mutex_t; | |
| 38 | struct _hidden_mutex_t { | |
| 37 | struct hidden_mutex_t { | |
| 39 | 38 | pthread_mutex_t id; |
| 40 | 39 | }; |
| 41 | 40 |
| r17907 | r17908 | |
|---|---|---|
| 50 | 50 | // TYPE DEFINITIONS |
| 51 | 51 | //============================================================ |
| 52 | 52 | |
| 53 | typedef struct _sdl_mode sdl_mode; | |
| 54 | struct _sdl_mode | |
| 53 | struct sdl_mode | |
| 55 | 54 | { |
| 56 | 55 | int width; |
| 57 | 56 | int height; |
| 58 | 57 | }; |
| 59 | 58 | |
| 60 | typedef struct _sdl_monitor_info sdl_monitor_info; | |
| 61 | struct _sdl_monitor_info | |
| 59 | struct sdl_monitor_info | |
| 62 | 60 | { |
| 63 | 61 | sdl_monitor_info * next; // pointer to next monitor in list |
| 64 | 62 | #ifdef PTR64 |
| r17907 | r17908 | |
| 75 | 73 | }; |
| 76 | 74 | |
| 77 | 75 | |
| 78 | typedef struct _sdl_window_config sdl_window_config; | |
| 79 | struct _sdl_window_config | |
| 76 | struct sdl_window_config | |
| 80 | 77 | { |
| 81 | 78 | float aspect; // decoded aspect ratio |
| 82 | 79 | int width; // decoded width |
| r17907 | r17908 | |
| 88 | 85 | }; |
| 89 | 86 | |
| 90 | 87 | |
| 91 | typedef struct _sdl_video_config sdl_video_config; | |
| 92 | struct _sdl_video_config | |
| 88 | struct sdl_video_config | |
| 93 | 89 | { |
| 94 | 90 | // performance options |
| 95 | 91 | int novideo; // don't draw, for pure CPU benchmarking |
| r17907 | r17908 | |
|---|---|---|
| 28 | 28 | #else |
| 29 | 29 | #define LOG( x ) |
| 30 | 30 | #endif |
| 31 | typedef struct _hidden_mutex_t hidden_mutex_t; | |
| 32 | struct _hidden_mutex_t { | |
| 31 | struct hidden_mutex_t { | |
| 33 | 32 | SDL_mutex * id; |
| 34 | 33 | volatile INT32 locked; |
| 35 | 34 | volatile INT32 threadid; |
| r17907 | r17908 | |
|---|---|---|
| 71 | 71 | // TYPE DEFINITIONS |
| 72 | 72 | //============================================================ |
| 73 | 73 | |
| 74 | typedef struct _work_thread_info work_thread_info; | |
| 75 | struct _work_thread_info | |
| 74 | struct work_thread_info | |
| 76 | 75 | { |
| 77 | 76 | osd_work_queue * queue; // pointer back to the queue |
| 78 | 77 | osd_thread * handle; // handle to the thread |
| r17907 | r17908 | |
|---|---|---|
| 213 | 213 | }; |
| 214 | 214 | |
| 215 | 215 | /* sdl_info is the information about SDL for the current screen */ |
| 216 | typedef struct _sdl_info sdl_info; | |
| 217 | struct _sdl_info | |
| 216 | struct sdl_info | |
| 218 | 217 | { |
| 219 | 218 | INT32 blittimer; |
| 220 | 219 | UINT32 extra_flags; |
| r17907 | r17908 | |
| 269 | 268 | }; |
| 270 | 269 | |
| 271 | 270 | /* line_aa_step is used for drawing antialiased lines */ |
| 272 | typedef struct _line_aa_step line_aa_step; | |
| 273 | struct _line_aa_step | |
| 271 | struct line_aa_step | |
| 274 | 272 | { |
| 275 | 273 | float xoffs, yoffs; // X/Y deltas |
| 276 | 274 | float weight; // weight contribution |
| r17907 | r17908 | |
|---|---|---|
| 88 | 88 | //============================================================ |
| 89 | 89 | |
| 90 | 90 | // state information for a keyboard |
| 91 | typedef struct _keyboard_state keyboard_state; | |
| 92 | struct _keyboard_state | |
| 91 | struct keyboard_state | |
| 93 | 92 | { |
| 94 | 93 | INT32 state[0x3ff]; // must be INT32! |
| 95 | 94 | INT8 oldkey[MAX_KEYS]; |
| r17907 | r17908 | |
| 98 | 97 | |
| 99 | 98 | |
| 100 | 99 | // state information for a mouse |
| 101 | typedef struct _mouse_state mouse_state; | |
| 102 | struct _mouse_state | |
| 100 | struct mouse_state | |
| 103 | 101 | { |
| 104 | 102 | INT32 lX, lY; |
| 105 | 103 | INT32 buttons[MAX_BUTTONS]; |
| r17907 | r17908 | |
| 107 | 105 | |
| 108 | 106 | |
| 109 | 107 | // state information for a joystick; DirectInput state must be first element |
| 110 | typedef struct _joystick_state joystick_state; | |
| 111 | struct _joystick_state | |
| 108 | struct joystick_state | |
| 112 | 109 | { |
| 113 | 110 | SDL_Joystick *device; |
| 114 | 111 | INT32 axes[MAX_AXES]; |
| r17907 | r17908 | |
| 119 | 116 | |
| 120 | 117 | #if (USE_XINPUT) |
| 121 | 118 | // state information for a lightgun |
| 122 | typedef struct _lightgun_state lightgun_state; | |
| 123 | struct _lightgun_state | |
| 119 | struct lightgun_state | |
| 124 | 120 | { |
| 125 | 121 | INT32 lX, lY; |
| 126 | 122 | INT32 buttons[MAX_BUTTONS]; |
| r17907 | r17908 | |
| 131 | 127 | #endif |
| 132 | 128 | |
| 133 | 129 | // generic device information |
| 134 | typedef struct _device_info device_info; | |
| 135 | struct _device_info | |
| 130 | struct device_info | |
| 136 | 131 | { |
| 137 | 132 | // device information |
| 138 | 133 | device_info ** head; |
| r17907 | r17908 | |
| 187 | 182 | |
| 188 | 183 | // joystick mapper |
| 189 | 184 | |
| 190 | typedef struct _device_map_t device_map_t; | |
| 191 | struct _device_map_t | |
| 185 | struct device_map_t | |
| 192 | 186 | { |
| 193 | 187 | struct { |
| 194 | 188 | char *name; |
| r17907 | r17908 | |
| 236 | 230 | //============================================================ |
| 237 | 231 | |
| 238 | 232 | // master keyboard translation table |
| 239 | typedef struct _kt_table kt_table; | |
| 240 | struct _kt_table { | |
| 233 | struct kt_table { | |
| 241 | 234 | input_item_id mame_key; |
| 242 | 235 | INT32 sdl_key; |
| 243 | 236 | //const char * vkey; |
| r17907 | r17908 | |
| 503 | 496 | }; |
| 504 | 497 | #endif |
| 505 | 498 | |
| 506 | typedef struct _key_lookup_table key_lookup_table; | |
| 507 | struct _key_lookup_table | |
| 499 | struct key_lookup_table | |
| 508 | 500 | { |
| 509 | 501 | int code; |
| 510 | 502 | const char *name; |
| r17907 | r17908 | |
|---|---|---|
| 58 | 58 | |
| 59 | 59 | typedef struct _win_i win_i; |
| 60 | 60 | |
| 61 | typedef struct _edit edit; | |
| 62 | struct _edit { | |
| 61 | struct edit { | |
| 63 | 62 | GtkEntry *edit_w; |
| 64 | 63 | struct hentry *h, *ch; |
| 65 | 64 | char *hold; |
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| 100 | 100 | |
| 101 | 101 | static sdl_draw_info draw; |
| 102 | 102 | |
| 103 | typedef struct _worker_param worker_param; | |
| 104 | struct _worker_param { | |
| 103 | struct worker_param { | |
| 105 | 104 | running_machine &machine() const { assert(m_machine != NULL); return *m_machine; } |
| 106 | 105 | sdl_window_info *window; |
| 107 | 106 | render_primitive_list *list; |
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| 19 | 19 | |
| 20 | 20 | #include "unicode.h" |
| 21 | 21 | |
| 22 | typedef struct _key_lookup_table key_lookup_table; | |
| 23 | ||
| 24 | struct _key_lookup_table | |
| 22 | struct key_lookup_table | |
| 25 | 23 | { |
| 26 | 24 | int code; |
| 27 | 25 | const char *name; |
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|---|---|---|
| 32 | 32 | // TYPE DEFINITIONS |
| 33 | 33 | //============================================================ |
| 34 | 34 | |
| 35 | typedef struct _sdl_window_info sdl_window_info; | |
| 36 | struct _sdl_window_info | |
| 35 | struct sdl_window_info | |
| 37 | 36 | { |
| 38 | 37 | // Pointer to next window |
| 39 | 38 | sdl_window_info * next; |
| r17907 | r17908 | |
| 101 | 100 | #endif |
| 102 | 101 | }; |
| 103 | 102 | |
| 104 | typedef struct _sdl_draw_info sdl_draw_info; | |
| 105 | struct _sdl_draw_info | |
| 103 | struct sdl_draw_info | |
| 106 | 104 | { |
| 107 | 105 | void (*exit)(void); |
| 108 | 106 | void (*attach)(sdl_draw_info *info, sdl_window_info *window); |
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| 281 | 281 | |
| 282 | 282 | /* osd_directory_entry contains basic information about a file when iterating through */ |
| 283 | 283 | /* a directory */ |
| 284 | typedef struct _osd_directory_entry osd_directory_entry; | |
| 285 | struct _osd_directory_entry | |
| 284 | struct osd_directory_entry | |
| 286 | 285 | { |
| 287 | 286 | const char * name; /* name of the entry */ |
| 288 | 287 | osd_dir_entry_type type; /* type of the entry */ |
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| 66 | 66 | // TYPEDEFS |
| 67 | 67 | //============================================================ |
| 68 | 68 | |
| 69 | typedef struct _registered_client registered_client; | |
| 70 | struct _registered_client | |
| 69 | struct registered_client | |
| 71 | 70 | { |
| 72 | 71 | registered_client * next; // next client in the list |
| 73 | 72 | LPARAM id; // client-specified ID |
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| 88 | 88 | // Abstracted presentation parameters |
| 89 | 89 | //============================================================ |
| 90 | 90 | |
| 91 | typedef struct _d3d_present_parameters d3d_present_parameters; | |
| 92 | struct _d3d_present_parameters | |
| 91 | struct d3d_present_parameters | |
| 93 | 92 | { |
| 94 | 93 | UINT BackBufferWidth; |
| 95 | 94 | UINT BackBufferHeight; |
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| 112 | 111 | // Abstracted device identifier |
| 113 | 112 | //============================================================ |
| 114 | 113 | |
| 115 | typedef struct _d3d_adapter_identifier d3d_adapter_identifier; | |
| 116 | struct _d3d_adapter_identifier | |
| 114 | struct d3d_adapter_identifier | |
| 117 | 115 | { |
| 118 | 116 | char Driver[512]; |
| 119 | 117 | char Description[512]; |
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| 155 | 153 | // Direct3D interfaces |
| 156 | 154 | //============================================================ |
| 157 | 155 | |
| 158 | typedef struct _d3d_interface d3d_interface; | |
| 159 | struct _d3d_interface | |
| 156 | struct d3d_interface | |
| 160 | 157 | { |
| 161 | 158 | HRESULT (*check_device_format)(d3d *d3dptr, UINT adapter, D3DDEVTYPE devtype, D3DFORMAT adapterformat, DWORD usage, D3DRESOURCETYPE restype, D3DFORMAT format); |
| 162 | 159 | HRESULT (*check_device_type)(d3d *d3dptr, UINT adapter, D3DDEVTYPE devtype, D3DFORMAT format, D3DFORMAT backformat, BOOL windowed); |
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| 176 | 173 | // Direct3DDevice interfaces |
| 177 | 174 | //============================================================ |
| 178 | 175 | |
| 179 | typedef struct _d3d_device_interface d3d_device_interface; | |
| 180 | struct _d3d_device_interface | |
| 176 | struct d3d_device_interface | |
| 181 | 177 | { |
| 182 | 178 | HRESULT (*begin_scene)(d3d_device *dev); |
| 183 | 179 | HRESULT (*clear)(d3d_device *dev, DWORD count, const D3DRECT *rects, DWORD flags, D3DCOLOR color, float z, DWORD stencil); |
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| 210 | 206 | // Direct3DSurface interfaces |
| 211 | 207 | //============================================================ |
| 212 | 208 | |
| 213 | typedef struct _d3d_surface_interface d3d_surface_interface; | |
| 214 | struct _d3d_surface_interface | |
| 209 | struct d3d_surface_interface | |
| 215 | 210 | { |
| 216 | 211 | HRESULT (*lock_rect)(d3d_surface *surf, D3DLOCKED_RECT *locked, const RECT *rect, DWORD flags); |
| 217 | 212 | ULONG (*release)(d3d_surface *tex); |
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| 223 | 218 | // Direct3DTexture interfaces |
| 224 | 219 | //============================================================ |
| 225 | 220 | |
| 226 | typedef struct _d3d_texture_interface d3d_texture_interface; | |
| 227 | struct _d3d_texture_interface | |
| 221 | struct d3d_texture_interface | |
| 228 | 222 | { |
| 229 | 223 | HRESULT (*get_surface_level)(d3d_texture *tex, UINT level, d3d_surface **surface); |
| 230 | 224 | HRESULT (*lock_rect)(d3d_texture *tex, UINT level, D3DLOCKED_RECT *locked, const RECT *rect, DWORD flags); |
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| 237 | 231 | // Direct3DVertexBuffer interfaces |
| 238 | 232 | //============================================================ |
| 239 | 233 | |
| 240 | typedef struct _d3d_vertex_buffer_interface d3d_vertex_buffer_interface; | |
| 241 | struct _d3d_vertex_buffer_interface | |
| 234 | struct d3d_vertex_buffer_interface | |
| 242 | 235 | { |
| 243 | 236 | HRESULT (*lock)(d3d_vertex_buffer *vbuf, UINT offset, UINT size, VOID **data, DWORD flags); |
| 244 | 237 | ULONG (*release)(d3d_vertex_buffer *vbuf); |
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| 250 | 243 | // Direct3DEffect interfaces |
| 251 | 244 | //============================================================ |
| 252 | 245 | |
| 253 | typedef struct _d3d_effect_interface d3d_effect_interface; | |
| 254 | struct _d3d_effect_interface | |
| 246 | struct d3d_effect_interface | |
| 255 | 247 | { |
| 256 | 248 | void (*begin)(d3d_effect *effect, UINT *passes, DWORD flags); |
| 257 | 249 | void (*end)(d3d_effect *effect); |
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| 52 | 52 | |
| 53 | 53 | /* hlsl_options is the information about runtime-mutable Direct3D HLSL options */ |
| 54 | 54 | /* in the future this will be moved into an OSD/emu shared buffer */ |
| 55 | typedef struct _hlsl_options hlsl_options; | |
| 56 | struct _hlsl_options | |
| 55 | struct hlsl_options | |
| 57 | 56 | { |
| 58 | 57 | bool params_dirty; |
| 59 | 58 | float shadow_mask_alpha; |
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| 110 | 110 | // TYPE DEFINITIONS |
| 111 | 111 | //============================================================ |
| 112 | 112 | |
| 113 | typedef struct _copydata_id_string copydata_id_string; | |
| 114 | struct _copydata_id_string | |
| 113 | struct copydata_id_string | |
| 115 | 114 | { |
| 116 | 115 | UINT32 id; // ID that was requested |
| 117 | 116 | char string[1]; // string array containing the data |
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| 57 | 57 | //============================================================ |
| 58 | 58 | |
| 59 | 59 | /* gdi_info is the information for the current screen */ |
| 60 | typedef struct _gdi_info gdi_info; | |
| 61 | struct _gdi_info | |
| 60 | struct gdi_info | |
| 62 | 61 | { |
| 63 | 62 | BITMAPINFO bminfo; |
| 64 | 63 | RGBQUAD colors[256]; |
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| 53 | 53 | //============================================================ |
| 54 | 54 | |
| 55 | 55 | /* d3d_texture_info holds information about a texture */ |
| 56 | typedef struct _d3d_texture_info d3d_texture_info; | |
| 57 | struct _d3d_texture_info | |
| 56 | struct d3d_texture_info | |
| 58 | 57 | { |
| 59 | 58 | d3d_texture_info * next; // next texture in the list |
| 60 | 59 | d3d_texture_info * prev; // prev texture in the list |
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| 79 | 78 | |
| 80 | 79 | |
| 81 | 80 | /* d3d_poly_info holds information about a single polygon/d3d primitive */ |
| 82 | typedef struct _d3d_poly_info d3d_poly_info; | |
| 83 | struct _d3d_poly_info | |
| 81 | struct d3d_poly_info | |
| 84 | 82 | { |
| 85 | 83 | D3DPRIMITIVETYPE type; // type of primitive |
| 86 | 84 | UINT32 count; // total number of primitives |
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| 92 | 90 | |
| 93 | 91 | |
| 94 | 92 | /* d3d_vertex describes a single vertex */ |
| 95 | typedef struct _d3d_vertex d3d_vertex; | |
| 96 | struct _d3d_vertex | |
| 93 | struct d3d_vertex | |
| 97 | 94 | { |
| 98 | 95 | float x, y, z; // X,Y,Z coordinates |
| 99 | 96 | float rhw; // RHW when no HLSL, padding when HLSL |
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| 103 | 100 | |
| 104 | 101 | |
| 105 | 102 | /* line_aa_step is used for drawing antialiased lines */ |
| 106 | typedef struct _line_aa_step line_aa_step; | |
| 107 | struct _line_aa_step | |
| 103 | struct line_aa_step | |
| 108 | 104 | { |
| 109 | 105 | float xoffs, yoffs; // X/Y deltas |
| 110 | 106 | float weight; // weight contribution |
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| 112 | 112 | //============================================================ |
| 113 | 113 | |
| 114 | 114 | // state information for a keyboard; DirectInput state must be first element |
| 115 | typedef struct _keyboard_state keyboard_state; | |
| 116 | struct _keyboard_state | |
| 115 | struct keyboard_state | |
| 117 | 116 | { |
| 118 | 117 | UINT8 state[MAX_KEYS]; |
| 119 | 118 | INT8 oldkey[MAX_KEYS]; |
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| 122 | 121 | |
| 123 | 122 | |
| 124 | 123 | // state information for a mouse; DirectInput state must be first element |
| 125 | typedef struct _mouse_state mouse_state; | |
| 126 | struct _mouse_state | |
| 124 | struct mouse_state | |
| 127 | 125 | { |
| 128 | 126 | DIMOUSESTATE2 state; |
| 129 | 127 | LONG raw_x, raw_y, raw_z; |
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| 131 | 129 | |
| 132 | 130 | |
| 133 | 131 | // state information for a joystick; DirectInput state must be first element |
| 134 | typedef struct _joystick_state joystick_state; | |
| 135 | struct _joystick_state | |
| 132 | struct joystick_state | |
| 136 | 133 | { |
| 137 | 134 | DIJOYSTATE state; |
| 138 | 135 | LONG rangemin[8]; |
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| 141 | 138 | |
| 142 | 139 | |
| 143 | 140 | // DirectInput-specific information about a device |
| 144 | typedef struct _dinput_device_info dinput_device_info; | |
| 145 | struct _dinput_device_info | |
| 141 | struct dinput_device_info | |
| 146 | 142 | { |
| 147 | 143 | LPDIRECTINPUTDEVICE device; |
| 148 | 144 | LPDIRECTINPUTDEVICE2 device2; |
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| 152 | 148 | |
| 153 | 149 | |
| 154 | 150 | // RawInput-specific information about a device |
| 155 | typedef struct _rawinput_device_info rawinput_device_info; | |
| 156 | struct _rawinput_device_info | |
| 151 | struct rawinput_device_info | |
| 157 | 152 | { |
| 158 | 153 | HANDLE device; |
| 159 | 154 | }; |
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| 106 | 106 | // TYPE DEFINITIONS |
| 107 | 107 | //============================================================ |
| 108 | 108 | |
| 109 | typedef struct _scalable_lock scalable_lock; | |
| 110 | struct _scalable_lock | |
| 109 | struct scalable_lock | |
| 111 | 110 | { |
| 112 | 111 | #if USE_SCALABLE_LOCKS |
| 113 | 112 | struct |
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| 122 | 121 | }; |
| 123 | 122 | |
| 124 | 123 | |
| 125 | typedef struct _work_thread_info work_thread_info; | |
| 126 | struct _work_thread_info | |
| 124 | struct work_thread_info | |
| 127 | 125 | { |
| 128 | 126 | osd_work_queue * queue; // pointer back to the queue |
| 129 | 127 | HANDLE handle; // handle to the thread |
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| 138 | 138 | } KEYBOARD_INDICATOR_PARAMETERS, *PKEYBOARD_INDICATOR_PARAMETERS; |
| 139 | 139 | |
| 140 | 140 | |
| 141 | typedef struct _id_map_entry id_map_entry; | |
| 142 | struct _id_map_entry | |
| 141 | struct id_map_entry | |
| 143 | 142 | { |
| 144 | 143 | id_map_entry * next; |
| 145 | 144 | const char * name; |
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| 69 | 69 | |
| 70 | 70 | |
| 71 | 71 | /* dd_info is the information about DirectDraw for the current screen */ |
| 72 | typedef struct _dd_info dd_info; | |
| 73 | struct _dd_info | |
| 72 | struct dd_info | |
| 74 | 73 | { |
| 75 | 74 | GUID adapter; // current display adapter |
| 76 | 75 | GUID * adapter_ptr; // pointer to current display adapter |
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| 101 | 100 | |
| 102 | 101 | |
| 103 | 102 | /* monitor_enum_info holds information during a monitor enumeration */ |
| 104 | typedef struct _monitor_enum_info monitor_enum_info; | |
| 105 | struct _monitor_enum_info | |
| 103 | struct monitor_enum_info | |
| 106 | 104 | { |
| 107 | 105 | win_monitor_info * monitor; // pointer to monitor we want |
| 108 | 106 | GUID guid; // GUID of the one we found |
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| 112 | 110 | |
| 113 | 111 | |
| 114 | 112 | /* mode_enum_info holds information during a display mode enumeration */ |
| 115 | typedef struct _mode_enum_info mode_enum_info; | |
| 116 | struct _mode_enum_info | |
| 113 | struct mode_enum_info | |
| 117 | 114 | { |
| 118 | 115 | win_window_info * window; |
| 119 | 116 | INT32 minimum_width, minimum_height; |
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| 62 | 62 | // TYPE DEFINITIONS |
| 63 | 63 | //============================================================ |
| 64 | 64 | |
| 65 | typedef struct _win_monitor_info win_monitor_info; | |
| 66 | struct _win_monitor_info | |
| 65 | struct win_monitor_info | |
| 67 | 66 | { |
| 68 | 67 | win_monitor_info * next; // pointer to next monitor in list |
| 69 | 68 | HMONITOR handle; // handle to the monitor |
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| 74 | 73 | }; |
| 75 | 74 | |
| 76 | 75 | |
| 77 | typedef struct _win_window_config win_window_config; | |
| 78 | struct _win_window_config | |
| 76 | struct win_window_config | |
| 79 | 77 | { |
| 80 | 78 | float aspect; // decoded aspect ratio |
| 81 | 79 | int width; // decoded width |
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| 84 | 82 | }; |
| 85 | 83 | |
| 86 | 84 | |
| 87 | typedef struct _win_video_config win_video_config; | |
| 88 | struct _win_video_config | |
| 85 | struct win_video_config | |
| 89 | 86 | { |
| 90 | 87 | // global configuration |
| 91 | 88 | int windowed; // start windowed? |
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| 114 | 114 | }; |
| 115 | 115 | |
| 116 | 116 | |
| 117 | typedef struct _win_draw_callbacks win_draw_callbacks; | |
| 118 | struct _win_draw_callbacks | |
| 117 | struct win_draw_callbacks | |
| 119 | 118 | { |
| 120 | 119 | void (*exit)(void); |
| 121 | 120 |
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| 60 | 60 | //============================================================ |
| 61 | 61 | |
| 62 | 62 | /* d3d_info is the information about Direct3D for the current screen */ |
| 63 | typedef struct _d3d_info d3d_info; | |
| 64 | struct _d3d_info | |
| 63 | struct d3d_info | |
| 65 | 64 | { |
| 66 | 65 | int adapter; // ordinal adapter number |
| 67 | 66 | int width, height; // current width, height |
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| 71 | 71 | TYPE DEFINITIONS |
| 72 | 72 | ***************************************************************************/ |
| 73 | 73 | |
| 74 | /* in mame.h: typedef struct _debugcpu_private debugcpu_private; */ | |
| 75 | struct _debugcpu_private | |
| 74 | struct debugcpu_private | |
| 76 | 75 | { |
| 77 | 76 | device_t *livecpu; |
| 78 | 77 | device_t *visiblecpu; |
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| 64 | 64 | typedef int (*debug_instruction_hook_func)(device_t &device, offs_t curpc); |
| 65 | 65 | |
| 66 | 66 | |
| 67 | ||
| 67 | ||
| 68 | 68 | |
| 69 | 69 | |
| 70 | 70 | class device_debug |
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| 34 | 34 | TYPE DEFINITIONS |
| 35 | 35 | ***************************************************************************/ |
| 36 | 36 | |
| 37 | typedef struct _global_entry global_entry; | |
| 38 | struct _global_entry | |
| 37 | struct global_entry | |
| 39 | 38 | { |
| 40 | 39 | void * base; |
| 41 | 40 | UINT32 size; |
| 42 | 41 | }; |
| 43 | 42 | |
| 44 | 43 | |
| 45 | typedef struct _cheat_map cheat_map; | |
| 46 | struct _cheat_map | |
| 44 | struct cheat_map | |
| 47 | 45 | { |
| 48 | 46 | UINT64 offset; |
| 49 | 47 | UINT64 first_value; |
| r17907 | r17908 | |
| 53 | 51 | }; |
| 54 | 52 | |
| 55 | 53 | |
| 56 | typedef struct _cheat_system cheat_system; | |
| 57 | struct _cheat_system | |
| 54 | struct cheat_system | |
| 58 | 55 | { |
| 59 | 56 | char cpu; |
| 60 | 57 | UINT64 length; |
| r17907 | r17908 | |
| 66 | 63 | }; |
| 67 | 64 | |
| 68 | 65 | |
| 69 | typedef struct _cheat_region_map cheat_region_map; | |
| 70 | struct _cheat_region_map | |
| 66 | struct cheat_region_map | |
| 71 | 67 | { |
| 72 | 68 | UINT64 offset; |
| 73 | 69 | UINT64 endoffset; |
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| 36 | 36 | TYPE DEFINITIONS |
| 37 | 37 | ***************************************************************************/ |
| 38 | 38 | |
| 39 | typedef struct _debug_command debug_command; | |
| 40 | struct _debug_command | |
| 39 | struct debug_command | |
| 41 | 40 | { |
| 42 | 41 | debug_command * next; |
| 43 | 42 | char command[32]; |
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| 28 | 28 | TYPE DEFINITIONS |
| 29 | 29 | ***************************************************************************/ |
| 30 | 30 | |
| 31 | typedef struct _help_item help_item; | |
| 32 | struct _help_item | |
| 31 | struct help_item | |
| 33 | 32 | { |
| 34 | 33 | const char * tag; |
| 35 | 34 | const char * help; |
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| 2 | 2 | #define __V30MZ_H__ |
| 3 | 3 | |
| 4 | 4 | |
| 5 | typedef struct _nec_config nec_config; | |
| 6 | struct _nec_config | |
| 5 | struct nec_config | |
| 7 | 6 | { |
| 8 | 7 | const UINT8* v25v35_decryptiontable; // internal decryption table |
| 9 | 8 | }; |
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| 54 | 54 | LH5801_IRQ_STATE |
| 55 | 55 | }; |
| 56 | 56 | |
| 57 | typedef struct _lh5801_state lh5801_state; | |
| 58 | struct _lh5801_state | |
| 57 | struct lh5801_state | |
| 59 | 58 | { |
| 60 | 59 | const lh5801_cpu_core *config; |
| 61 | 60 | legacy_cpu_device *device; |
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| 67 | 67 | |
| 68 | 68 | typedef UINT8 (*lh5801_in_func)(device_t *device); |
| 69 | 69 | |
| 70 | typedef struct _lh5801_cpu_core lh5801_cpu_core; | |
| 71 | struct _lh5801_cpu_core | |
| 70 | struct lh5801_cpu_core | |
| 72 | 71 | { |
| 73 | 72 | lh5801_in_func in; |
| 74 | 73 | }; |
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| 79 | 79 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 80 | 80 | |
| 81 | 81 | /* 6809 Registers */ |
| 82 | typedef struct _m68_state_t m68_state_t; | |
| 83 | struct _m68_state_t | |
| 82 | struct m68_state_t | |
| 84 | 83 | { |
| 85 | 84 | PAIR pc; /* Program counter */ |
| 86 | 85 | PAIR ppc; /* Previous program counter */ |
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| 23 | 23 | |
| 24 | 24 | CPU_DISASSEMBLE( m6809 ); |
| 25 | 25 | |
| 26 | typedef struct _m6809_config m6809_config; | |
| 27 | struct _m6809_config | |
| 26 | struct m6809_config | |
| 28 | 27 | { |
| 29 | 28 | UINT8 encrypt_only_first_byte; /* encrypt only the first byte in 10 xx and 11 xx opcodes */ |
| 30 | 29 | }; |
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| 226 | 226 | #define I_YNEC ( MICRO_MASK | M_YTP | M_CKN | M_NE ) |
| 227 | 227 | |
| 228 | 228 | |
| 229 | typedef struct _tms0980_state tms0980_state; | |
| 230 | struct _tms0980_state | |
| 229 | struct tms0980_state | |
| 231 | 230 | { |
| 232 | 231 | UINT8 prev_pc; /* previous program counter */ |
| 233 | 232 | UINT8 prev_pa; /* previous page address register */ |
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| 9 | 9 | }; |
| 10 | 10 | |
| 11 | 11 | |
| 12 | typedef struct _tms0980_config tms0980_config; | |
| 13 | struct _tms0980_config { | |
| 12 | struct tms0980_config { | |
| 14 | 13 | /* O-output PLA configuration */ |
| 15 | 14 | struct { |
| 16 | 15 | UINT8 value; |
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| 36 | 36 | UINT64 timer_cycles; |
| 37 | 37 | } H8S2XXX_TMR; |
| 38 | 38 | |
| 39 | typedef struct _h83xx_state h83xx_state; | |
| 40 | struct _h83xx_state | |
| 39 | struct h83xx_state | |
| 41 | 40 | { |
| 42 | 41 | // main CPU stuff |
| 43 | 42 | UINT32 h8err; |
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| 12 | 12 | #define __UNSP_H__ |
| 13 | 13 | |
| 14 | 14 | typedef struct _unspimp_state unspimp_state; |
| 15 | typedef struct _unsp_state unsp_state; | |
| 16 | struct _unsp_state | |
| 15 | struct unsp_state | |
| 17 | 16 | { |
| 18 | 17 | UINT16 r[16]; |
| 19 | 18 | UINT8 irq; |
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| 57 | 57 | |
| 58 | 58 | |
| 59 | 59 | |
| 60 | typedef struct _pic16c62x_state pic16c62x_state; | |
| 61 | struct _pic16c62x_state | |
| 60 | struct pic16c62x_state | |
| 62 | 61 | { |
| 63 | 62 | /******************** CPU Internal Registers *******************/ |
| 64 | 63 | UINT16 PC; |
| r17907 | r17908 | |
| 109 | 108 | |
| 110 | 109 | |
| 111 | 110 | /* opcode table entry */ |
| 112 | typedef struct _pic16c62x_opcode pic16c62x_opcode; | |
| 113 | struct _pic16c62x_opcode | |
| 111 | struct pic16c62x_opcode | |
| 114 | 112 | { |
| 115 | 113 | UINT8 cycles; |
| 116 | 114 | void (*function)(pic16c62x_state *); |
| 117 | 115 | }; |
| 118 | 116 | /* instruction list entry */ |
| 119 | typedef struct _pic16c62x_instruction pic16c62x_instruction; | |
| 120 | struct _pic16c62x_instruction | |
| 117 | struct pic16c62x_instruction | |
| 121 | 118 | { |
| 122 | 119 | char *format; |
| 123 | 120 | void (*function)(pic16c62x_state *); |
| r17907 | r17908 | |
|---|---|---|
| 41 | 41 | typedef UINT8 (*ccpu_input_func)(device_t *device); |
| 42 | 42 | typedef void (*ccpu_vector_func)(device_t *device, INT16 sx, INT16 sy, INT16 ex, INT16 ey, UINT8 shift); |
| 43 | 43 | |
| 44 | typedef struct _ccpu_config ccpu_config; | |
| 45 | struct _ccpu_config | |
| 44 | struct ccpu_config | |
| 46 | 45 | { |
| 47 | 46 | ccpu_input_func external_input; /* if NULL, assume JMI jumper is present */ |
| 48 | 47 | ccpu_vector_func vector_callback; |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | STRUCTURES & TYPEDEFS |
| 18 | 18 | ***************************************************************************/ |
| 19 | 19 | |
| 20 | typedef struct _ccpu_state ccpu_state; | |
| 21 | struct _ccpu_state | |
| 20 | struct ccpu_state | |
| 22 | 21 | { |
| 23 | 22 | UINT16 PC; |
| 24 | 23 | UINT16 A; |
| r17907 | r17908 | |
|---|---|---|
| 177 | 177 | |
| 178 | 178 | |
| 179 | 179 | /* Configuration structure */ |
| 180 | typedef struct _tms34010_display_params tms34010_display_params; | |
| 181 | struct _tms34010_display_params | |
| 180 | struct tms34010_display_params | |
| 182 | 181 | { |
| 183 | 182 | UINT16 vcount; /* most recent VCOUNT */ |
| 184 | 183 | UINT16 veblnk, vsblnk; /* start/end of VBLANK */ |
| r17907 | r17908 | |
| 189 | 188 | }; |
| 190 | 189 | |
| 191 | 190 | |
| 192 | typedef struct _tms34010_config tms34010_config; | |
| 193 | struct _tms34010_config | |
| 191 | struct tms34010_config | |
| 194 | 192 | { |
| 195 | 193 | UINT8 halt_on_reset; /* /HCS pin, which determines HALT state after reset */ |
| 196 | 194 | const char *screen_tag; /* the screen operated on */ |
| r17907 | r17908 | |
|---|---|---|
| 41 | 41 | #endif |
| 42 | 42 | }; |
| 43 | 43 | |
| 44 | typedef struct _tms34010_state tms34010_state; | |
| 45 | struct _tms34010_state | |
| 44 | struct tms34010_state | |
| 46 | 45 | { |
| 47 | 46 | UINT32 pc; |
| 48 | 47 | UINT32 ppc; |
| r17907 | r17908 | |
|---|---|---|
| 83 | 83 | #define SUPERFX_CFGR_IRQ 0x80 // IRQ |
| 84 | 84 | #define SUPERFX_CFGR_MS0 0x20 // MS0 |
| 85 | 85 | |
| 86 | typedef struct _superfx_config superfx_config; | |
| 87 | struct _superfx_config | |
| 86 | struct superfx_config | |
| 88 | 87 | { |
| 89 | 88 | devcb_write_line out_irq_func; /* IRQ changed callback */ |
| 90 | 89 | }; |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | UINT8 valid[0x20]; |
| 16 | 16 | } cache_t; |
| 17 | 17 | |
| 18 | typedef struct _superfx_state superfx_state; | |
| 19 | struct _superfx_state | |
| 18 | struct superfx_state | |
| 20 | 19 | { |
| 21 | 20 | superfx_config config; |
| 22 | 21 |
| r17907 | r17908 | |
|---|---|---|
| 118 | 118 | ***************************************************************************/ |
| 119 | 119 | |
| 120 | 120 | /* live processor state */ |
| 121 | typedef struct _mcs48_state mcs48_state; | |
| 122 | struct _mcs48_state | |
| 121 | struct mcs48_state | |
| 123 | 122 | { |
| 124 | 123 | UINT16 prevpc; /* 16-bit previous program counter */ |
| 125 | 124 | UINT16 pc; /* 16-bit program counter */ |
| r17907 | r17908 | |
|---|---|---|
| 72 | 72 | /* ======================================================================== */ |
| 73 | 73 | |
| 74 | 74 | /* CPU Structure */ |
| 75 | typedef struct _m37710i_cpu_struct m37710i_cpu_struct; | |
| 76 | struct _m37710i_cpu_struct | |
| 75 | struct m37710i_cpu_struct | |
| 77 | 76 | { |
| 78 | 77 | uint a; /* Accumulator */ |
| 79 | 78 | uint b; /* holds high byte of accumulator */ |
| r17907 | r17908 | |
|---|---|---|
| 114 | 114 | /* The Z180 registers. HALT is set to 1 when the CPU is halted, the refresh */ |
| 115 | 115 | /* register is calculated as follows: refresh=(Regs.R&127)|(Regs.R2&128) */ |
| 116 | 116 | /****************************************************************************/ |
| 117 | typedef struct _z180_state z180_state; | |
| 118 | struct _z180_state | |
| 117 | struct z180_state | |
| 119 | 118 | { |
| 120 | 119 | PAIR PREPC,PC,SP,AF,BC,DE,HL,IX,IY; |
| 121 | 120 | PAIR AF2,BC2,DE2,HL2; |
| r17907 | r17908 | |
|---|---|---|
| 29 | 29 | } |
| 30 | 30 | i8086basicregs; |
| 31 | 31 | |
| 32 | typedef struct _i8086_state i8086_state; | |
| 33 | struct _i8086_state | |
| 32 | struct i8086_state | |
| 34 | 33 | { |
| 35 | 34 | i8086basicregs regs; |
| 36 | 35 | offs_t fetch_xor; |
| r17907 | r17908 | |
|---|---|---|
| 1 | /* ASG 971222 -- rewrote this interface */ | |
| 2 | #pragma once | |
| 3 | ||
| 4 | #ifndef __I86INTF_H__ | |
| 5 | #define __I86INTF_H__ | |
| 6 | ||
| 7 | ||
| 8 | #define INPUT_LINE_INT0 INPUT_LINE_IRQ0 | |
| 9 | #define INPUT_LINE_INT1 INPUT_LINE_IRQ1 | |
| 10 | #define INPUT_LINE_INT2 INPUT_LINE_IRQ2 | |
| 11 | #define INPUT_LINE_INT3 INPUT_LINE_IRQ3 | |
| 12 | #define INPUT_LINE_TEST 20 /* PJB 03/05 */ | |
| 13 | #define INPUT_LINE_DRQ0 21 | |
| 14 | #define INPUT_LINE_DRQ1 22 | |
| 15 | #define INPUT_LINE_TMRIN0 23 | |
| 16 | #define INPUT_LINE_TMRIN1 24 | |
| 17 | ||
| 18 | ||
| 19 | typedef struct _i80186_interface i80186_interface; | |
| 20 | struct _i80186_interface | |
| 21 | { | |
| 22 | devcb_write_line out_tmrout0_func; | |
| 23 | devcb_write_line out_tmrout1_func; | |
| 24 | }; | |
| 25 | #define I80186_INTERFACE(name) const i80186_interface (name) = | |
| 26 | ||
| 27 | ||
| 28 | enum | |
| 29 | { | |
| 30 | I8086_IP, | |
| 31 | I8086_AX, | |
| 32 | I8086_CX, | |
| 33 | I8086_DX, | |
| 34 | I8086_BX, | |
| 35 | I8086_SP, | |
| 36 | I8086_BP, | |
| 37 | I8086_SI, | |
| 38 | I8086_DI, | |
| 39 | I8086_AL, | |
| 40 | I8086_CL, | |
| 41 | I8086_DL, | |
| 42 | I8086_BL, | |
| 43 | I8086_AH, | |
| 44 | I8086_CH, | |
| 45 | I8086_DH, | |
| 46 | I8086_BH, | |
| 47 | I8086_FLAGS, | |
| 48 | I8086_ES, | |
| 49 | I8086_CS, | |
| 50 | I8086_SS, | |
| 51 | I8086_DS, | |
| 52 | I8086_VECTOR, | |
| 53 | ||
| 54 | I8086_GENPC = STATE_GENPC, | |
| 55 | I8086_GENSP = STATE_GENSP, | |
| 56 | I8086_GENPCBASE = STATE_GENPCBASE | |
| 57 | }; | |
| 58 | ||
| 59 | /* Public functions */ | |
| 60 | DECLARE_LEGACY_CPU_DEVICE(I8086, i8086); | |
| 61 | DECLARE_LEGACY_CPU_DEVICE(I8088, i8088); | |
| 62 | DECLARE_LEGACY_CPU_DEVICE(I80186, i80186); | |
| 63 | DECLARE_LEGACY_CPU_DEVICE(I80188, i80188); | |
| 64 | ||
| 65 | #endif /* __I86INTF_H__ */ | |
| 1 | /* ASG 971222 -- rewrote this interface */ | |
| 2 | #pragma once | |
| 3 | ||
| 4 | #ifndef __I86INTF_H__ | |
| 5 | #define __I86INTF_H__ | |
| 6 | ||
| 7 | ||
| 8 | #define INPUT_LINE_INT0 INPUT_LINE_IRQ0 | |
| 9 | #define INPUT_LINE_INT1 INPUT_LINE_IRQ1 | |
| 10 | #define INPUT_LINE_INT2 INPUT_LINE_IRQ2 | |
| 11 | #define INPUT_LINE_INT3 INPUT_LINE_IRQ3 | |
| 12 | #define INPUT_LINE_TEST 20 /* PJB 03/05 */ | |
| 13 | #define INPUT_LINE_DRQ0 21 | |
| 14 | #define INPUT_LINE_DRQ1 22 | |
| 15 | #define INPUT_LINE_TMRIN0 23 | |
| 16 | #define INPUT_LINE_TMRIN1 24 | |
| 17 | ||
| 18 | ||
| 19 | struct i80186_interface | |
| 20 | { | |
| 21 | devcb_write_line out_tmrout0_func; | |
| 22 | devcb_write_line out_tmrout1_func; | |
| 23 | }; | |
| 24 | #define I80186_INTERFACE(name) const i80186_interface (name) = | |
| 25 | ||
| 26 | ||
| 27 | enum | |
| 28 | { | |
| 29 | I8086_IP, | |
| 30 | I8086_AX, | |
| 31 | I8086_CX, | |
| 32 | I8086_DX, | |
| 33 | I8086_BX, | |
| 34 | I8086_SP, | |
| 35 | I8086_BP, | |
| 36 | I8086_SI, | |
| 37 | I8086_DI, | |
| 38 | I8086_AL, | |
| 39 | I8086_CL, | |
| 40 | I8086_DL, | |
| 41 | I8086_BL, | |
| 42 | I8086_AH, | |
| 43 | I8086_CH, | |
| 44 | I8086_DH, | |
| 45 | I8086_BH, | |
| 46 | I8086_FLAGS, | |
| 47 | I8086_ES, | |
| 48 | I8086_CS, | |
| 49 | I8086_SS, | |
| 50 | I8086_DS, | |
| 51 | I8086_VECTOR, | |
| 52 | ||
| 53 | I8086_GENPC = STATE_GENPC, | |
| 54 | I8086_GENSP = STATE_GENSP, | |
| 55 | I8086_GENPCBASE = STATE_GENPCBASE | |
| 56 | }; | |
| 57 | ||
| 58 | /* Public functions */ | |
| 59 | DECLARE_LEGACY_CPU_DEVICE(I8086, i8086); | |
| 60 | DECLARE_LEGACY_CPU_DEVICE(I8088, i8088); | |
| 61 | DECLARE_LEGACY_CPU_DEVICE(I80186, i80186); | |
| 62 | DECLARE_LEGACY_CPU_DEVICE(I80188, i80188); | |
| 63 | ||
| 64 | #endif /* __I86INTF_H__ */ |
| r17907 | r17908 | |
|---|---|---|
| 32 | 32 | UINT8 b[16]; /* or as 8 bit registers */ |
| 33 | 33 | } i80286basicregs; |
| 34 | 34 | |
| 35 | typedef struct _i80286_state i80286_state; | |
| 36 | struct _i80286_state | |
| 35 | struct i80286_state | |
| 37 | 36 | { |
| 38 | 37 | i80286basicregs regs; |
| 39 | 38 | offs_t fetch_xor; |
| r17907 | r17908 | |
|---|---|---|
| 118 | 118 | |
| 119 | 119 | typedef void (*cubeqst_dac_w_func)(device_t *, UINT16); |
| 120 | 120 | |
| 121 | typedef struct _cubeqst_snd_config cubeqst_snd_config; | |
| 122 | struct _cubeqst_snd_config | |
| 121 | struct cubeqst_snd_config | |
| 123 | 122 | { |
| 124 | 123 | cubeqst_dac_w_func dac_w; |
| 125 | 124 | const char * sound_data_region; |
| 126 | 125 | |
| 127 | 126 | }; |
| 128 | 127 | |
| 129 | typedef struct _cubeqst_lin_config cubeqst_lin_config; | |
| 130 | struct _cubeqst_lin_config | |
| 128 | struct cubeqst_lin_config | |
| 131 | 129 | { |
| 132 | 130 | const char * rot_cpu_tag; |
| 133 | 131 | }; |
| 134 | 132 | |
| 135 | typedef struct _cubeqst_rot_config cubeqst_rot_config; | |
| 136 | struct _cubeqst_rot_config | |
| 133 | struct cubeqst_rot_config | |
| 137 | 134 | { |
| 138 | 135 | const char * lin_cpu_tag; |
| 139 | 136 | }; |
| r17907 | r17908 | |
|---|---|---|
| 408 | 408 | #include "debugger.h" |
| 409 | 409 | #include "upd7810.h" |
| 410 | 410 | |
| 411 | typedef struct _upd7810_state upd7810_state; | |
| 412 | struct _upd7810_state | |
| 411 | struct upd7810_state | |
| 413 | 412 | { |
| 414 | 413 | PAIR ppc; /* previous program counter */ |
| 415 | 414 | PAIR pc; /* program counter */ |
| r17907 | r17908 | |
|---|---|---|
| 31 | 31 | ***************************************************************************/ |
| 32 | 32 | |
| 33 | 33 | /* code logging info */ |
| 34 | typedef struct _log_comment log_comment; | |
| 35 | struct _log_comment | |
| 34 | struct log_comment | |
| 36 | 35 | { |
| 37 | 36 | x86code * base; |
| 38 | 37 | const char * string; |
| r17907 | r17908 | |
| 40 | 39 | |
| 41 | 40 | |
| 42 | 41 | /* data ranges */ |
| 43 | typedef struct _data_range_t data_range_t; | |
| 44 | struct _data_range_t | |
| 42 | struct data_range_t | |
| 45 | 43 | { |
| 46 | 44 | x86code * base; |
| 47 | 45 | x86code * end; |
| r17907 | r17908 | |
|---|---|---|
| 37 | 37 | 64 kb external ram (first 8kbyte not seen for program execution?) */ |
| 38 | 38 | |
| 39 | 39 | |
| 40 | typedef struct _sc61860_cpu_core sc61860_cpu_core; | |
| 41 | struct _sc61860_cpu_core | |
| 40 | struct sc61860_cpu_core | |
| 42 | 41 | { |
| 43 | 42 | int (*reset)(device_t *device); |
| 44 | 43 | int (*brk)(device_t *device); |
| r17907 | r17908 | |
|---|---|---|
| 40 | 40 | /**************************************************************************** |
| 41 | 41 | * The 61860 registers. |
| 42 | 42 | ****************************************************************************/ |
| 43 | typedef struct _sc61860_state sc61860_state; | |
| 44 | struct _sc61860_state | |
| 43 | struct sc61860_state | |
| 45 | 44 | { |
| 46 | 45 | sc61860_cpu_core *config; |
| 47 | 46 | UINT8 p, q, r; //7 bits only? |
| r17907 | r17908 | |
|---|---|---|
| 71 | 71 | #define SETREG8(a, b) (a) = ((a) & ~0xff) | ((b) & 0xff) |
| 72 | 72 | #define SETREG16(a, b) (a) = ((a) & ~0xffff) | ((b) & 0xffff) |
| 73 | 73 | |
| 74 | typedef struct _v60_flags v60_flags; | |
| 75 | struct _v60_flags | |
| 74 | struct v60_flags | |
| 76 | 75 | { |
| 77 | 76 | UINT8 CY; |
| 78 | 77 | UINT8 OV; |
| r17907 | r17908 | |
| 81 | 80 | }; |
| 82 | 81 | |
| 83 | 82 | // v60 Register Inside (Hm... It's not a pentium inside :-))) ) |
| 84 | typedef struct _v60_state v60_state; | |
| 85 | struct _v60_state | |
| 83 | struct v60_state | |
| 86 | 84 | { |
| 87 | 85 | offs_t fetch_xor; |
| 88 | 86 | offs_t start_pc; |
| r17907 | r17908 | |
|---|---|---|
| 113 | 113 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 114 | 114 | |
| 115 | 115 | /* 6309 Registers */ |
| 116 | typedef struct _m68_state_t m68_state_t; | |
| 117 | struct _m68_state_t | |
| 116 | struct m68_state_t | |
| 118 | 117 | { |
| 119 | 118 | PAIR pc; /* Program counter */ |
| 120 | 119 | PAIR ppc; /* Previous program counter */ |
| r17907 | r17908 | |
|---|---|---|
| 29 | 29 | |
| 30 | 30 | |
| 31 | 31 | |
| 32 | typedef struct _ssp1601_state_t ssp1601_state_t; | |
| 33 | struct _ssp1601_state_t | |
| 32 | struct ssp1601_state_t | |
| 34 | 33 | { |
| 35 | 34 | PAIR gr[8]; /* general regs, some are 16bit, some 32bit */ |
| 36 | 35 | union { |
| r17907 | r17908 | |
|---|---|---|
| 25 | 25 | /* define this to expand all EA calculations inline */ |
| 26 | 26 | #define INLINE_EA 1 |
| 27 | 27 | |
| 28 | typedef struct _s2650_regs s2650_regs; | |
| 29 | struct _s2650_regs { | |
| 28 | struct s2650_regs { | |
| 30 | 29 | UINT16 ppc; /* previous program counter (page + iar) */ |
| 31 | 30 | UINT16 page; /* 8K page select register (A14..A13) */ |
| 32 | 31 | UINT16 iar; /* instruction address register (A12..A0) */ |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | #include "debugger.h" |
| 22 | 22 | #include "avr8.h" |
| 23 | 23 | |
| 24 | typedef struct _avr8_state avr8_state; | |
| 25 | struct _avr8_state | |
| 24 | struct avr8_state | |
| 26 | 25 | { |
| 27 | 26 | UINT32 pc; |
| 28 | 27 |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | |
| 11 | 11 | */ |
| 12 | 12 | |
| 13 | typedef struct _se3208_state_t se3208_state_t; | |
| 14 | struct _se3208_state_t | |
| 13 | struct se3208_state_t | |
| 15 | 14 | { |
| 16 | 15 | //GPR |
| 17 | 16 | UINT32 R[8]; |
| r17907 | r17908 | |
|---|---|---|
| 292 | 292 | }; |
| 293 | 293 | |
| 294 | 294 | /* Internal registers */ |
| 295 | typedef struct _hyperstone_state hyperstone_state; | |
| 296 | struct _hyperstone_state | |
| 295 | struct hyperstone_state | |
| 297 | 296 | { |
| 298 | 297 | UINT32 global_regs[32]; |
| 299 | 298 | UINT32 local_regs[64]; |
| r17907 | r17908 | |
|---|---|---|
| 234 | 234 | TYPE DEFINITIONS |
| 235 | 235 | ***************************************************************************/ |
| 236 | 236 | |
| 237 | typedef struct _mcs51_uart mcs51_uart; | |
| 238 | struct _mcs51_uart | |
| 237 | struct mcs51_uart | |
| 239 | 238 | { |
| 240 | 239 | UINT8 data_out; //Data to send out |
| 241 | 240 | UINT8 bits_to_send; //How many bits left to send when transmitting out the serial port |
| r17907 | r17908 | |
| 246 | 245 | UINT8 delay_cycles; //Gross Hack; |
| 247 | 246 | }; |
| 248 | 247 | |
| 249 | typedef struct _mcs51_state_t mcs51_state_t; | |
| 250 | struct _mcs51_state_t | |
| 248 | struct mcs51_state_t | |
| 251 | 249 | { |
| 252 | 250 | //Internal stuff |
| 253 | 251 | UINT16 ppc; //previous pc |
| r17907 | r17908 | |
|---|---|---|
| 77 | 77 | ***************************************************************************/ |
| 78 | 78 | |
| 79 | 79 | /* configuration of the DS5002FP */ |
| 80 | typedef struct _ds5002fp_config ds5002fp_config; | |
| 81 | struct _ds5002fp_config | |
| 80 | struct ds5002fp_config | |
| 82 | 81 | { |
| 83 | 82 | UINT8 mcon; /* bootstrap loader MCON register */ |
| 84 | 83 | UINT8 rpctl; /* bootstrap loader RPCTL register */ |
| r17907 | r17908 | |
|---|---|---|
| 250 | 250 | float f[4]; |
| 251 | 251 | } XMM_REG; |
| 252 | 252 | |
| 253 | typedef struct _i386_state i386_state; | |
| 254 | struct _i386_state | |
| 253 | struct i386_state | |
| 255 | 254 | { |
| 256 | 255 | I386_GPR reg; |
| 257 | 256 | I386_SREG sreg[6]; |
| r17907 | r17908 | |
|---|---|---|
| 31 | 31 | #define MC68HC11_IRQ_LINE 0 |
| 32 | 32 | #define MC68HC11_TOC1_LINE 1 |
| 33 | 33 | |
| 34 | typedef struct _hc11_config hc11_config; | |
| 35 | struct _hc11_config | |
| 34 | struct hc11_config | |
| 36 | 35 | { |
| 37 | 36 | int has_extended_io; // I/O enable flag |
| 38 | 37 | int internal_ram_size; |
| r17907 | r17908 | |
|---|---|---|
| 1 | typedef struct _hc11_opcode_list_struct hc11_opcode_list_struct; | |
| 2 | struct _hc11_opcode_list_struct | |
| 1 | struct hc11_opcode_list_struct | |
| 3 | 2 | { |
| 4 | 3 | int page; |
| 5 | 4 | int opcode; |
| r17907 | r17908 | |
|---|---|---|
| 36 | 36 | |
| 37 | 37 | static const int div_tab[4] = { 1, 4, 8, 16 }; |
| 38 | 38 | |
| 39 | typedef struct _hc11_state hc11_state; | |
| 40 | struct _hc11_state | |
| 39 | struct hc11_state | |
| 41 | 40 | { |
| 42 | 41 | union { |
| 43 | 42 | struct { |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | #include "debugger.h" |
| 18 | 18 | #include "tlcs900.h" |
| 19 | 19 | |
| 20 | typedef struct _tlcs900_state tlcs900_state; | |
| 21 | struct _tlcs900_state | |
| 20 | struct tlcs900_state | |
| 22 | 21 | { |
| 23 | 22 | const tlcs900_interface *intf; |
| 24 | 23 |
| r17907 | r17908 | |
|---|---|---|
| 37 | 37 | }; |
| 38 | 38 | |
| 39 | 39 | |
| 40 | typedef struct _tlcs900_interface tlcs900_interface; | |
| 41 | struct _tlcs900_interface | |
| 40 | struct tlcs900_interface | |
| 42 | 41 | { |
| 43 | 42 | devcb_write8 to1; |
| 44 | 43 | devcb_write8 to3; |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | TYPE DEFINITIONS |
| 22 | 22 | ***************************************************************************/ |
| 23 | 23 | |
| 24 | typedef struct _i4004_state i4004_state; | |
| 25 | struct _i4004_state | |
| 24 | struct i4004_state | |
| 26 | 25 | { |
| 27 | 26 | UINT8 A; // Accumulator |
| 28 | 27 | UINT8 R[8]; |
| r17907 | r17908 | |
|---|---|---|
| 20 | 20 | TYPE DEFINITIONS |
| 21 | 21 | ***************************************************************************/ |
| 22 | 22 | |
| 23 | typedef struct _scmp_state scmp_state; | |
| 24 | struct _scmp_state | |
| 23 | struct scmp_state | |
| 25 | 24 | { |
| 26 | 25 | scmp_config config; |
| 27 | 26 | PAIR PC; |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | /*************************************************************************** |
| 18 | 18 | TYPE DEFINITIONS |
| 19 | 19 | ***************************************************************************/ |
| 20 | typedef struct _scmp_config scmp_config; | |
| 21 | struct _scmp_config | |
| 20 | struct scmp_config | |
| 22 | 21 | { |
| 23 | 22 | devcb_write8 flag_out_func; |
| 24 | 23 | devcb_write_line sout_func; |
| r17907 | r17908 | |
|---|---|---|
| 70 | 70 | |
| 71 | 71 | typedef void (*rsp_set_status_func)(device_t *device, UINT32 status); |
| 72 | 72 | |
| 73 | typedef struct _rsp_config rsp_config; | |
| 74 | struct _rsp_config | |
| 73 | struct rsp_config | |
| 75 | 74 | { |
| 76 | 75 | read32_device_func dp_reg_r; |
| 77 | 76 | write32_device_func dp_reg_w; |
| r17907 | r17908 | |
| 155 | 154 | } ACCUMULATOR_REG; |
| 156 | 155 | |
| 157 | 156 | typedef struct _rspimp_state rspimp_state; |
| 158 | typedef struct _rsp_state rsp_state; | |
| 159 | struct _rsp_state | |
| 157 | struct rsp_state | |
| 160 | 158 | { |
| 161 | 159 | const rsp_config *config; |
| 162 | 160 | FILE *exec_output; |
| r17907 | r17908 | |
|---|---|---|
| 82 | 82 | ***************************************************************************/ |
| 83 | 83 | |
| 84 | 84 | /* fast RAM info */ |
| 85 | typedef struct _fast_ram_info fast_ram_info; | |
| 86 | struct _fast_ram_info | |
| 85 | struct fast_ram_info | |
| 87 | 86 | { |
| 88 | 87 | offs_t start; /* start of the RAM block */ |
| 89 | 88 | offs_t end; /* end of the RAM block */ |
| r17907 | r17908 | |
| 93 | 92 | |
| 94 | 93 | |
| 95 | 94 | /* internal compiler state */ |
| 96 | typedef struct _compiler_state compiler_state; | |
| 97 | struct _compiler_state | |
| 95 | struct compiler_state | |
| 98 | 96 | { |
| 99 | 97 | UINT32 cycles; /* accumulated cycles */ |
| 100 | 98 | UINT8 checkints; /* need to check interrupts before next instruction */ |
| r17907 | r17908 | |
|---|---|---|
| 84 | 84 | |
| 85 | 85 | typedef struct _cop400_opcode_map cop400_opcode_map; |
| 86 | 86 | |
| 87 | typedef struct _cop400_state cop400_state; | |
| 88 | struct _cop400_state | |
| 87 | struct cop400_state | |
| 89 | 88 | { |
| 90 | 89 | const cop400_interface *intf; |
| 91 | 90 |
| r17907 | r17908 | |
|---|---|---|
| 99 | 99 | typedef enum _cop400_microbus cop400_microbus; |
| 100 | 100 | |
| 101 | 101 | /* interface */ |
| 102 | typedef struct _cop400_interface cop400_interface; | |
| 103 | struct _cop400_interface | |
| 102 | struct cop400_interface | |
| 104 | 103 | { |
| 105 | 104 | cop400_cki_bond cki; /* CKI bonding option */ |
| 106 | 105 | cop400_cko_bond cko; /* CKO bonding option */ |
| r17907 | r17908 | |
|---|---|---|
| 14 | 14 | #define SSEM_DISASM_ON_UNIMPL 0 |
| 15 | 15 | #define SSEM_DUMP_MEM_ON_UNIMPL 0 |
| 16 | 16 | |
| 17 | typedef struct _ssem_state ssem_state; | |
| 18 | struct _ssem_state | |
| 17 | struct ssem_state | |
| 19 | 18 | { |
| 20 | 19 | UINT32 pc; |
| 21 | 20 | UINT32 a; |
| r17907 | r17908 | |
|---|---|---|
| 56 | 56 | #define M6510_INTERFACE(name) \ |
| 57 | 57 | const m6502_interface (name) = |
| 58 | 58 | |
| 59 | typedef struct _m6502_interface m6502_interface; | |
| 60 | struct _m6502_interface | |
| 59 | struct m6502_interface | |
| 61 | 60 | { |
| 62 | 61 | devcb_read8 read_indexed_func; |
| 63 | 62 | devcb_write8 write_indexed_func; |
| r17907 | r17908 | |
|---|---|---|
| 74 | 74 | typedef void (*jaguar_int_func)(device_t *device); |
| 75 | 75 | |
| 76 | 76 | |
| 77 | typedef struct _jaguar_cpu_config jaguar_cpu_config; | |
| 78 | struct _jaguar_cpu_config | |
| 77 | struct jaguar_cpu_config | |
| 79 | 78 | { |
| 80 | 79 | jaguar_int_func cpu_int_callback; |
| 81 | 80 | }; |
| r17907 | r17908 | |
|---|---|---|
| 79 | 79 | ***************************************************************************/ |
| 80 | 80 | |
| 81 | 81 | /* Jaguar Registers */ |
| 82 | typedef struct _jaguar_state jaguar_state; | |
| 83 | struct _jaguar_state | |
| 82 | struct jaguar_cpu_state | |
| 84 | 83 | { |
| 85 | 84 | /* core registers */ |
| 86 | 85 | UINT32 r[32]; |
| r17907 | r17908 | |
| 97 | 96 | int isdsp; |
| 98 | 97 | int icount; |
| 99 | 98 | int bankswitch_icount; |
| 100 | void (*const *table)(jaguar_state *jaguar, UINT16 op); | |
| 99 | void (*const *table)(jaguar_cpu_state *jaguar, UINT16 op); | |
| 101 | 100 | device_irq_acknowledge_callback irq_callback; |
| 102 | 101 | jaguar_int_func cpu_interrupt; |
| 103 | 102 | legacy_cpu_device *device; |
| r17907 | r17908 | |
| 124 | 123 | FUNCTION TABLES |
| 125 | 124 | ***************************************************************************/ |
| 126 | 125 | |
| 127 | static void abs_rn(jaguar_state *jaguar, UINT16 op); | |
| 128 | static void add_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 129 | static void addc_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 130 | static void addq_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 131 | static void addqmod_n_rn(jaguar_state *jaguar, UINT16 op); /* DSP only */ | |
| 132 | static void addqt_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 133 | static void and_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 134 | static void bclr_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 135 | static void bset_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 136 | static void btst_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 137 | static void cmp_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 138 | static void cmpq_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 139 | static void div_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 140 | static void illegal(jaguar_state *jaguar, UINT16 op); | |
| 141 | static void imacn_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 142 | static void imult_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 143 | static void imultn_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 144 | static void jr_cc_n(jaguar_state *jaguar, UINT16 op); | |
| 145 | static void jump_cc_rn(jaguar_state *jaguar, UINT16 op); | |
| 146 | static void load_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 147 | static void load_r14n_rn(jaguar_state *jaguar, UINT16 op); | |
| 148 | static void load_r15n_rn(jaguar_state *jaguar, UINT16 op); | |
| 149 | static void load_r14rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 150 | static void load_r15rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 151 | static void loadb_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 152 | static void loadw_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 153 | static void loadp_rn_rn(jaguar_state *jaguar, UINT16 op); /* GPU only */ | |
| 154 | static void mirror_rn(jaguar_state *jaguar, UINT16 op); /* DSP only */ | |
| 155 | static void mmult_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 156 | static void move_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 157 | static void move_pc_rn(jaguar_state *jaguar, UINT16 op); | |
| 158 | static void movefa_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 159 | static void movei_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 160 | static void moveq_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 161 | static void moveta_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 162 | static void mtoi_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 163 | static void mult_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 164 | static void neg_rn(jaguar_state *jaguar, UINT16 op); | |
| 165 | static void nop(jaguar_state *jaguar, UINT16 op); | |
| 166 | static void normi_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 167 | static void not_rn(jaguar_state *jaguar, UINT16 op); | |
| 168 | static void or_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 169 | static void pack_rn(jaguar_state *jaguar, UINT16 op); /* GPU only */ | |
| 170 | static void resmac_rn(jaguar_state *jaguar, UINT16 op); | |
| 171 | static void ror_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 172 | static void rorq_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 173 | static void sat8_rn(jaguar_state *jaguar, UINT16 op); /* GPU only */ | |
| 174 | static void sat16_rn(jaguar_state *jaguar, UINT16 op); /* GPU only */ | |
| 175 | static void sat16s_rn(jaguar_state *jaguar, UINT16 op); /* DSP only */ | |
| 176 | static void sat24_rn(jaguar_state *jaguar, UINT16 op); /* GPU only */ | |
| 177 | static void sat32s_rn(jaguar_state *jaguar, UINT16 op); /* DSP only */ | |
| 178 | static void sh_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 179 | static void sha_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 180 | static void sharq_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 181 | static void shlq_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 182 | static void shrq_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 183 | static void store_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 184 | static void store_rn_r14n(jaguar_state *jaguar, UINT16 op); | |
| 185 | static void store_rn_r15n(jaguar_state *jaguar, UINT16 op); | |
| 186 | static void store_rn_r14rn(jaguar_state *jaguar, UINT16 op); | |
| 187 | static void store_rn_r15rn(jaguar_state *jaguar, UINT16 op); | |
| 188 | static void storeb_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 189 | static void storew_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 190 | static void storep_rn_rn(jaguar_state *jaguar, UINT16 op); /* GPU only */ | |
| 191 | static void sub_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 192 | static void subc_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 193 | static void subq_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 194 | static void subqmod_n_rn(jaguar_state *jaguar, UINT16 op); /* DSP only */ | |
| 195 | static void subqt_n_rn(jaguar_state *jaguar, UINT16 op); | |
| 196 | static void xor_rn_rn(jaguar_state *jaguar, UINT16 op); | |
| 126 | static void abs_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 127 | static void add_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 128 | static void addc_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 129 | static void addq_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 130 | static void addqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */ | |
| 131 | static void addqt_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 132 | static void and_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 133 | static void bclr_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 134 | static void bset_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 135 | static void btst_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 136 | static void cmp_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 137 | static void cmpq_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 138 | static void div_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 139 | static void illegal(jaguar_cpu_state *jaguar, UINT16 op); | |
| 140 | static void imacn_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 141 | static void imult_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 142 | static void imultn_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 143 | static void jr_cc_n(jaguar_cpu_state *jaguar, UINT16 op); | |
| 144 | static void jump_cc_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 145 | static void load_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 146 | static void load_r14n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 147 | static void load_r15n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 148 | static void load_r14rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 149 | static void load_r15rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 150 | static void loadb_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 151 | static void loadw_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 152 | static void loadp_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */ | |
| 153 | static void mirror_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */ | |
| 154 | static void mmult_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 155 | static void move_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 156 | static void move_pc_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 157 | static void movefa_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 158 | static void movei_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 159 | static void moveq_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 160 | static void moveta_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 161 | static void mtoi_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 162 | static void mult_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 163 | static void neg_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 164 | static void nop(jaguar_cpu_state *jaguar, UINT16 op); | |
| 165 | static void normi_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 166 | static void not_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 167 | static void or_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 168 | static void pack_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */ | |
| 169 | static void resmac_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 170 | static void ror_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 171 | static void rorq_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 172 | static void sat8_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */ | |
| 173 | static void sat16_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */ | |
| 174 | static void sat16s_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */ | |
| 175 | static void sat24_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */ | |
| 176 | static void sat32s_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */ | |
| 177 | static void sh_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 178 | static void sha_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 179 | static void sharq_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 180 | static void shlq_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 181 | static void shrq_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 182 | static void store_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 183 | static void store_rn_r14n(jaguar_cpu_state *jaguar, UINT16 op); | |
| 184 | static void store_rn_r15n(jaguar_cpu_state *jaguar, UINT16 op); | |
| 185 | static void store_rn_r14rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 186 | static void store_rn_r15rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 187 | static void storeb_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 188 | static void storew_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 189 | static void storep_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); /* GPU only */ | |
| 190 | static void sub_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 191 | static void subc_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 192 | static void subq_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 193 | static void subqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op); /* DSP only */ | |
| 194 | static void subqt_n_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 195 | static void xor_rn_rn(jaguar_cpu_state *jaguar, UINT16 op); | |
| 197 | 196 | |
| 198 | static void (*const gpu_op_table[64])(jaguar_state *jaguar, UINT16 op) = | |
| 197 | static void (*const gpu_op_table[64])(jaguar_cpu_state *jaguar, UINT16 op) = | |
| 199 | 198 | { |
| 200 | 199 | /* 00-03 */ add_rn_rn, addc_rn_rn, addq_n_rn, addqt_n_rn, |
| 201 | 200 | /* 04-07 */ sub_rn_rn, subc_rn_rn, subq_n_rn, subqt_n_rn, |
| r17907 | r17908 | |
| 215 | 214 | /* 60-63 */ store_rn_r14rn, store_rn_r15rn, sat24_rn, pack_rn |
| 216 | 215 | }; |
| 217 | 216 | |
| 218 | static void (*const dsp_op_table[64])(jaguar_state *jaguar, UINT16 op) = | |
| 217 | static void (*const dsp_op_table[64])(jaguar_cpu_state *jaguar, UINT16 op) = | |
| 219 | 218 | { |
| 220 | 219 | /* 00-03 */ add_rn_rn, addc_rn_rn, addq_n_rn, addqt_n_rn, |
| 221 | 220 | /* 04-07 */ sub_rn_rn, subc_rn_rn, subq_n_rn, subqt_n_rn, |
| r17907 | r17908 | |
| 249 | 248 | INLINE FUNCTIONS |
| 250 | 249 | ***************************************************************************/ |
| 251 | 250 | |
| 252 | INLINE jaguar_state *get_safe_token(device_t *device) | |
| 251 | INLINE jaguar_cpu_state *get_safe_token(device_t *device) | |
| 253 | 252 | { |
| 254 | 253 | assert(device != NULL); |
| 255 | 254 | assert(device->type() == JAGUARGPU || |
| 256 | 255 | device->type() == JAGUARDSP); |
| 257 | return (jaguar_state *)downcast<legacy_cpu_device *>(device)->token(); | |
| 256 | return (jaguar_cpu_state *)downcast<legacy_cpu_device *>(device)->token(); | |
| 258 | 257 | } |
| 259 | 258 | |
| 260 | INLINE void update_register_banks(jaguar_state *jaguar) | |
| 259 | INLINE void update_register_banks(jaguar_cpu_state *jaguar) | |
| 261 | 260 | { |
| 262 | 261 | UINT32 temp; |
| 263 | 262 | int i, bank; |
| r17907 | r17908 | |
| 296 | 295 | IRQ HANDLING |
| 297 | 296 | ***************************************************************************/ |
| 298 | 297 | |
| 299 | static void check_irqs(jaguar_state *jaguar) | |
| 298 | static void check_irqs(jaguar_cpu_state *jaguar) | |
| 300 | 299 | { |
| 301 | 300 | int bits, mask, which = 0; |
| 302 | 301 | |
| r17907 | r17908 | |
| 339 | 338 | } |
| 340 | 339 | |
| 341 | 340 | |
| 342 | static void set_irq_line(jaguar_state *jaguar, int irqline, int state) | |
| 341 | static void set_irq_line(jaguar_cpu_state *jaguar, int irqline, int state) | |
| 343 | 342 | { |
| 344 | 343 | int mask = (irqline < 5) ? (0x40 << irqline) : 0x10000; |
| 345 | 344 | jaguar->ctrl[G_CTRL] &= ~mask; |
| r17907 | r17908 | |
| 399 | 398 | } |
| 400 | 399 | |
| 401 | 400 | |
| 402 | static void jaguar_postload(jaguar_state *jaguar) | |
| 401 | static void jaguar_postload(jaguar_cpu_state *jaguar) | |
| 403 | 402 | { |
| 404 | 403 | update_register_banks(jaguar); |
| 405 | 404 | check_irqs(jaguar); |
| r17907 | r17908 | |
| 409 | 408 | static void init_common(int isdsp, legacy_cpu_device *device, device_irq_acknowledge_callback irqcallback) |
| 410 | 409 | { |
| 411 | 410 | const jaguar_cpu_config *configdata = (const jaguar_cpu_config *)device->static_config(); |
| 412 | jaguar_state *jaguar = get_safe_token(device); | |
| 411 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 413 | 412 | |
| 414 | 413 | init_tables(); |
| 415 | 414 | |
| r17907 | r17908 | |
| 445 | 444 | |
| 446 | 445 | static CPU_RESET( jaguar ) |
| 447 | 446 | { |
| 448 | jaguar_state *jaguar = get_safe_token(device); | |
| 447 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 449 | 448 | |
| 450 | 449 | jaguar->b0 = jaguar->r; |
| 451 | 450 | jaguar->b1 = jaguar->a; |
| r17907 | r17908 | |
| 474 | 473 | |
| 475 | 474 | static CPU_EXECUTE( jaguargpu ) |
| 476 | 475 | { |
| 477 | jaguar_state *jaguar = get_safe_token(device); | |
| 476 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 478 | 477 | |
| 479 | 478 | /* if we're halted, we shouldn't be here */ |
| 480 | 479 | if (!(jaguar->ctrl[G_CTRL] & 1)) |
| r17907 | r17908 | |
| 513 | 512 | |
| 514 | 513 | static CPU_EXECUTE( jaguardsp ) |
| 515 | 514 | { |
| 516 | jaguar_state *jaguar = get_safe_token(device); | |
| 515 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 517 | 516 | |
| 518 | 517 | /* if we're halted, we shouldn't be here */ |
| 519 | 518 | if (!(jaguar->ctrl[G_CTRL] & 1)) |
| r17907 | r17908 | |
| 556 | 555 | OPCODES |
| 557 | 556 | ***************************************************************************/ |
| 558 | 557 | |
| 559 | void abs_rn(jaguar_state *jaguar, UINT16 op) | |
| 558 | void abs_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 560 | 559 | { |
| 561 | 560 | int dreg = op & 31; |
| 562 | 561 | UINT32 res = jaguar->r[dreg]; |
| r17907 | r17908 | |
| 569 | 568 | SET_Z(jaguar, res); |
| 570 | 569 | } |
| 571 | 570 | |
| 572 | void add_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 571 | void add_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 573 | 572 | { |
| 574 | 573 | int dreg = op & 31; |
| 575 | 574 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 579 | 578 | CLR_ZNC(jaguar); SET_ZNC_ADD(jaguar, r2, r1, res); |
| 580 | 579 | } |
| 581 | 580 | |
| 582 | void addc_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 581 | void addc_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 583 | 582 | { |
| 584 | 583 | int dreg = op & 31; |
| 585 | 584 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 589 | 588 | CLR_ZNC(jaguar); SET_ZNC_ADD(jaguar, r2, r1, res); |
| 590 | 589 | } |
| 591 | 590 | |
| 592 | void addq_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 591 | void addq_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 593 | 592 | { |
| 594 | 593 | int dreg = op & 31; |
| 595 | 594 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 599 | 598 | CLR_ZNC(jaguar); SET_ZNC_ADD(jaguar, r2, r1, res); |
| 600 | 599 | } |
| 601 | 600 | |
| 602 | void addqmod_n_rn(jaguar_state *jaguar, UINT16 op) /* DSP only */ | |
| 601 | void addqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */ | |
| 603 | 602 | { |
| 604 | 603 | int dreg = op & 31; |
| 605 | 604 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 610 | 609 | CLR_ZNC(jaguar); SET_ZNC_ADD(jaguar, r2, r1, res); |
| 611 | 610 | } |
| 612 | 611 | |
| 613 | void addqt_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 612 | void addqt_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 614 | 613 | { |
| 615 | 614 | int dreg = op & 31; |
| 616 | 615 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 619 | 618 | jaguar->r[dreg] = res; |
| 620 | 619 | } |
| 621 | 620 | |
| 622 | void and_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 621 | void and_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 623 | 622 | { |
| 624 | 623 | int dreg = op & 31; |
| 625 | 624 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 629 | 628 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 630 | 629 | } |
| 631 | 630 | |
| 632 | void bclr_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 631 | void bclr_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 633 | 632 | { |
| 634 | 633 | int dreg = op & 31; |
| 635 | 634 | UINT32 r1 = (op >> 5) & 31; |
| r17907 | r17908 | |
| 639 | 638 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 640 | 639 | } |
| 641 | 640 | |
| 642 | void bset_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 641 | void bset_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 643 | 642 | { |
| 644 | 643 | int dreg = op & 31; |
| 645 | 644 | UINT32 r1 = (op >> 5) & 31; |
| r17907 | r17908 | |
| 649 | 648 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 650 | 649 | } |
| 651 | 650 | |
| 652 | void btst_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 651 | void btst_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 653 | 652 | { |
| 654 | 653 | UINT32 r1 = (op >> 5) & 31; |
| 655 | 654 | UINT32 r2 = jaguar->r[op & 31]; |
| 656 | 655 | CLR_Z(jaguar); jaguar->FLAGS |= (~r2 >> r1) & 1; |
| 657 | 656 | } |
| 658 | 657 | |
| 659 | void cmp_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 658 | void cmp_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 660 | 659 | { |
| 661 | 660 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 662 | 661 | UINT32 r2 = jaguar->r[op & 31]; |
| r17907 | r17908 | |
| 664 | 663 | CLR_ZNC(jaguar); SET_ZNC_SUB(jaguar, r2, r1, res); |
| 665 | 664 | } |
| 666 | 665 | |
| 667 | void cmpq_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 666 | void cmpq_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 668 | 667 | { |
| 669 | 668 | UINT32 r1 = (INT8)(op >> 2) >> 3; |
| 670 | 669 | UINT32 r2 = jaguar->r[op & 31]; |
| r17907 | r17908 | |
| 672 | 671 | CLR_ZNC(jaguar); SET_ZNC_SUB(jaguar, r2, r1, res); |
| 673 | 672 | } |
| 674 | 673 | |
| 675 | void div_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 674 | void div_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 676 | 675 | { |
| 677 | 676 | int dreg = op & 31; |
| 678 | 677 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 694 | 693 | jaguar->r[dreg] = 0xffffffff; |
| 695 | 694 | } |
| 696 | 695 | |
| 697 | void illegal(jaguar_state *jaguar, UINT16 op) | |
| 696 | void illegal(jaguar_cpu_state *jaguar, UINT16 op) | |
| 698 | 697 | { |
| 699 | 698 | } |
| 700 | 699 | |
| 701 | void imacn_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 700 | void imacn_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 702 | 701 | { |
| 703 | 702 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 704 | 703 | UINT32 r2 = jaguar->r[op & 31]; |
| r17907 | r17908 | |
| 706 | 705 | logerror("Unexpected IMACN instruction!\n"); |
| 707 | 706 | } |
| 708 | 707 | |
| 709 | void imult_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 708 | void imult_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 710 | 709 | { |
| 711 | 710 | int dreg = op & 31; |
| 712 | 711 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 716 | 715 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 717 | 716 | } |
| 718 | 717 | |
| 719 | void imultn_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 718 | void imultn_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 720 | 719 | { |
| 721 | 720 | int dreg = op & 31; |
| 722 | 721 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 741 | 740 | } |
| 742 | 741 | } |
| 743 | 742 | |
| 744 | void jr_cc_n(jaguar_state *jaguar, UINT16 op) | |
| 743 | void jr_cc_n(jaguar_cpu_state *jaguar, UINT16 op) | |
| 745 | 744 | { |
| 746 | 745 | if (CONDITION(op & 31)) |
| 747 | 746 | { |
| r17907 | r17908 | |
| 756 | 755 | } |
| 757 | 756 | } |
| 758 | 757 | |
| 759 | void jump_cc_rn(jaguar_state *jaguar, UINT16 op) | |
| 758 | void jump_cc_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 760 | 759 | { |
| 761 | 760 | if (CONDITION(op & 31)) |
| 762 | 761 | { |
| r17907 | r17908 | |
| 773 | 772 | } |
| 774 | 773 | } |
| 775 | 774 | |
| 776 | void load_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 775 | void load_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 777 | 776 | { |
| 778 | 777 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 779 | 778 | jaguar->r[op & 31] = READLONG(jaguar, r1); |
| 780 | 779 | } |
| 781 | 780 | |
| 782 | void load_r14n_rn(jaguar_state *jaguar, UINT16 op) | |
| 781 | void load_r14n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 783 | 782 | { |
| 784 | 783 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| 785 | 784 | jaguar->r[op & 31] = READLONG(jaguar, jaguar->r[14] + 4 * r1); |
| 786 | 785 | } |
| 787 | 786 | |
| 788 | void load_r15n_rn(jaguar_state *jaguar, UINT16 op) | |
| 787 | void load_r15n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 789 | 788 | { |
| 790 | 789 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| 791 | 790 | jaguar->r[op & 31] = READLONG(jaguar, jaguar->r[15] + 4 * r1); |
| 792 | 791 | } |
| 793 | 792 | |
| 794 | void load_r14rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 793 | void load_r14rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 795 | 794 | { |
| 796 | 795 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 797 | 796 | jaguar->r[op & 31] = READLONG(jaguar, jaguar->r[14] + r1); |
| 798 | 797 | } |
| 799 | 798 | |
| 800 | void load_r15rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 799 | void load_r15rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 801 | 800 | { |
| 802 | 801 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 803 | 802 | jaguar->r[op & 31] = READLONG(jaguar, jaguar->r[15] + r1); |
| 804 | 803 | } |
| 805 | 804 | |
| 806 | void loadb_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 805 | void loadb_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 807 | 806 | { |
| 808 | 807 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 809 | 808 | jaguar->r[op & 31] = READBYTE(jaguar, r1); |
| 810 | 809 | } |
| 811 | 810 | |
| 812 | void loadw_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 811 | void loadw_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 813 | 812 | { |
| 814 | 813 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 815 | 814 | jaguar->r[op & 31] = READWORD(jaguar, r1); |
| 816 | 815 | } |
| 817 | 816 | |
| 818 | void loadp_rn_rn(jaguar_state *jaguar, UINT16 op) /* GPU only */ | |
| 817 | void loadp_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */ | |
| 819 | 818 | { |
| 820 | 819 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 821 | 820 | jaguar->ctrl[G_HIDATA] = READWORD(jaguar, r1); |
| 822 | 821 | jaguar->r[op & 31] = READWORD(jaguar, r1+4); |
| 823 | 822 | } |
| 824 | 823 | |
| 825 | void mirror_rn(jaguar_state *jaguar, UINT16 op) /* DSP only */ | |
| 824 | void mirror_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */ | |
| 826 | 825 | { |
| 827 | 826 | int dreg = op & 31; |
| 828 | 827 | UINT32 r1 = jaguar->r[dreg]; |
| r17907 | r17908 | |
| 831 | 830 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 832 | 831 | } |
| 833 | 832 | |
| 834 | void mmult_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 833 | void mmult_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 835 | 834 | { |
| 836 | 835 | int count = jaguar->ctrl[G_MTXC] & 15, i; |
| 837 | 836 | int sreg = (op >> 5) & 31; |
| r17907 | r17908 | |
| 860 | 859 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 861 | 860 | } |
| 862 | 861 | |
| 863 | void move_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 862 | void move_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 864 | 863 | { |
| 865 | 864 | jaguar->r[op & 31] = jaguar->r[(op >> 5) & 31]; |
| 866 | 865 | } |
| 867 | 866 | |
| 868 | void move_pc_rn(jaguar_state *jaguar, UINT16 op) | |
| 867 | void move_pc_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 869 | 868 | { |
| 870 | 869 | jaguar->r[op & 31] = jaguar->ppc; |
| 871 | 870 | } |
| 872 | 871 | |
| 873 | void movefa_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 872 | void movefa_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 874 | 873 | { |
| 875 | 874 | jaguar->r[op & 31] = jaguar->a[(op >> 5) & 31]; |
| 876 | 875 | } |
| 877 | 876 | |
| 878 | void movei_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 877 | void movei_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 879 | 878 | { |
| 880 | 879 | UINT32 res = ROPCODE(jaguar, jaguar->PC) | (ROPCODE(jaguar, jaguar->PC + 2) << 16); |
| 881 | 880 | jaguar->PC += 4; |
| 882 | 881 | jaguar->r[op & 31] = res; |
| 883 | 882 | } |
| 884 | 883 | |
| 885 | void moveq_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 884 | void moveq_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 886 | 885 | { |
| 887 | 886 | jaguar->r[op & 31] = (op >> 5) & 31; |
| 888 | 887 | } |
| 889 | 888 | |
| 890 | void moveta_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 889 | void moveta_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 891 | 890 | { |
| 892 | 891 | jaguar->a[op & 31] = jaguar->r[(op >> 5) & 31]; |
| 893 | 892 | } |
| 894 | 893 | |
| 895 | void mtoi_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 894 | void mtoi_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 896 | 895 | { |
| 897 | 896 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 898 | 897 | jaguar->r[op & 31] = (((INT32)r1 >> 8) & 0xff800000) | (r1 & 0x007fffff); |
| 899 | 898 | } |
| 900 | 899 | |
| 901 | void mult_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 900 | void mult_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 902 | 901 | { |
| 903 | 902 | int dreg = op & 31; |
| 904 | 903 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 908 | 907 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 909 | 908 | } |
| 910 | 909 | |
| 911 | void neg_rn(jaguar_state *jaguar, UINT16 op) | |
| 910 | void neg_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 912 | 911 | { |
| 913 | 912 | int dreg = op & 31; |
| 914 | 913 | UINT32 r2 = jaguar->r[dreg]; |
| r17907 | r17908 | |
| 917 | 916 | CLR_ZNC(jaguar); SET_ZNC_SUB(jaguar, 0, r2, res); |
| 918 | 917 | } |
| 919 | 918 | |
| 920 | void nop(jaguar_state *jaguar, UINT16 op) | |
| 919 | void nop(jaguar_cpu_state *jaguar, UINT16 op) | |
| 921 | 920 | { |
| 922 | 921 | } |
| 923 | 922 | |
| 924 | void normi_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 923 | void normi_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 925 | 924 | { |
| 926 | 925 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 927 | 926 | UINT32 res = 0; |
| r17907 | r17908 | |
| 942 | 941 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 943 | 942 | } |
| 944 | 943 | |
| 945 | void not_rn(jaguar_state *jaguar, UINT16 op) | |
| 944 | void not_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 946 | 945 | { |
| 947 | 946 | int dreg = op & 31; |
| 948 | 947 | UINT32 res = ~jaguar->r[dreg]; |
| r17907 | r17908 | |
| 950 | 949 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 951 | 950 | } |
| 952 | 951 | |
| 953 | void or_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 952 | void or_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 954 | 953 | { |
| 955 | 954 | int dreg = op & 31; |
| 956 | 955 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 960 | 959 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 961 | 960 | } |
| 962 | 961 | |
| 963 | void pack_rn(jaguar_state *jaguar, UINT16 op) /* GPU only */ | |
| 962 | void pack_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */ | |
| 964 | 963 | { |
| 965 | 964 | int dreg = op & 31; |
| 966 | 965 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 974 | 973 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 975 | 974 | } |
| 976 | 975 | |
| 977 | void resmac_rn(jaguar_state *jaguar, UINT16 op) | |
| 976 | void resmac_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 978 | 977 | { |
| 979 | 978 | jaguar->r[op & 31] = (UINT32)jaguar->accum; |
| 980 | 979 | } |
| 981 | 980 | |
| 982 | void ror_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 981 | void ror_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 983 | 982 | { |
| 984 | 983 | int dreg = op & 31; |
| 985 | 984 | UINT32 r1 = jaguar->r[(op >> 5) & 31] & 31; |
| r17907 | r17908 | |
| 989 | 988 | CLR_ZNC(jaguar); SET_ZN(jaguar, res); jaguar->FLAGS |= (r2 >> 30) & 2; |
| 990 | 989 | } |
| 991 | 990 | |
| 992 | void rorq_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 991 | void rorq_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 993 | 992 | { |
| 994 | 993 | int dreg = op & 31; |
| 995 | 994 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 999 | 998 | CLR_ZNC(jaguar); SET_ZN(jaguar, res); jaguar->FLAGS |= (r2 >> 30) & 2; |
| 1000 | 999 | } |
| 1001 | 1000 | |
| 1002 | void sat8_rn(jaguar_state *jaguar, UINT16 op) /* GPU only */ | |
| 1001 | void sat8_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */ | |
| 1003 | 1002 | { |
| 1004 | 1003 | int dreg = op & 31; |
| 1005 | 1004 | INT32 r2 = jaguar->r[dreg]; |
| r17907 | r17908 | |
| 1008 | 1007 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 1009 | 1008 | } |
| 1010 | 1009 | |
| 1011 | void sat16_rn(jaguar_state *jaguar, UINT16 op) /* GPU only */ | |
| 1010 | void sat16_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */ | |
| 1012 | 1011 | { |
| 1013 | 1012 | int dreg = op & 31; |
| 1014 | 1013 | INT32 r2 = jaguar->r[dreg]; |
| r17907 | r17908 | |
| 1017 | 1016 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 1018 | 1017 | } |
| 1019 | 1018 | |
| 1020 | void sat16s_rn(jaguar_state *jaguar, UINT16 op) /* DSP only */ | |
| 1019 | void sat16s_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */ | |
| 1021 | 1020 | { |
| 1022 | 1021 | int dreg = op & 31; |
| 1023 | 1022 | INT32 r2 = jaguar->r[dreg]; |
| r17907 | r17908 | |
| 1026 | 1025 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 1027 | 1026 | } |
| 1028 | 1027 | |
| 1029 | void sat24_rn(jaguar_state *jaguar, UINT16 op) /* GPU only */ | |
| 1028 | void sat24_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */ | |
| 1030 | 1029 | { |
| 1031 | 1030 | int dreg = op & 31; |
| 1032 | 1031 | INT32 r2 = jaguar->r[dreg]; |
| r17907 | r17908 | |
| 1035 | 1034 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 1036 | 1035 | } |
| 1037 | 1036 | |
| 1038 | void sat32s_rn(jaguar_state *jaguar, UINT16 op) /* DSP only */ | |
| 1037 | void sat32s_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */ | |
| 1039 | 1038 | { |
| 1040 | 1039 | int dreg = op & 31; |
| 1041 | 1040 | INT32 r2 = (UINT32)jaguar->r[dreg]; |
| r17907 | r17908 | |
| 1045 | 1044 | CLR_ZN(jaguar); SET_ZN(jaguar, res); |
| 1046 | 1045 | } |
| 1047 | 1046 | |
| 1048 | void sh_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 1047 | void sh_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1049 | 1048 | { |
| 1050 | 1049 | int dreg = op & 31; |
| 1051 | 1050 | INT32 r1 = (INT32)jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1067 | 1066 | SET_ZN(jaguar, res); |
| 1068 | 1067 | } |
| 1069 | 1068 | |
| 1070 | void sha_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 1069 | void sha_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1071 | 1070 | { |
| 1072 | 1071 | int dreg = op & 31; |
| 1073 | 1072 | INT32 r1 = (INT32)jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1089 | 1088 | SET_ZN(jaguar, res); |
| 1090 | 1089 | } |
| 1091 | 1090 | |
| 1092 | void sharq_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 1091 | void sharq_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1093 | 1092 | { |
| 1094 | 1093 | int dreg = op & 31; |
| 1095 | 1094 | INT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1099 | 1098 | CLR_ZNC(jaguar); SET_ZN(jaguar, res); jaguar->FLAGS |= (r2 << 1) & 2; |
| 1100 | 1099 | } |
| 1101 | 1100 | |
| 1102 | void shlq_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 1101 | void shlq_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1103 | 1102 | { |
| 1104 | 1103 | int dreg = op & 31; |
| 1105 | 1104 | INT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1109 | 1108 | CLR_ZNC(jaguar); SET_ZN(jaguar, res); jaguar->FLAGS |= (r2 >> 30) & 2; |
| 1110 | 1109 | } |
| 1111 | 1110 | |
| 1112 | void shrq_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 1111 | void shrq_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1113 | 1112 | { |
| 1114 | 1113 | int dreg = op & 31; |
| 1115 | 1114 | INT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1119 | 1118 | CLR_ZNC(jaguar); SET_ZN(jaguar, res); jaguar->FLAGS |= (r2 << 1) & 2; |
| 1120 | 1119 | } |
| 1121 | 1120 | |
| 1122 | void store_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 1121 | void store_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1123 | 1122 | { |
| 1124 | 1123 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 1125 | 1124 | WRITELONG(jaguar, r1, jaguar->r[op & 31]); |
| 1126 | 1125 | } |
| 1127 | 1126 | |
| 1128 | void store_rn_r14n(jaguar_state *jaguar, UINT16 op) | |
| 1127 | void store_rn_r14n(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1129 | 1128 | { |
| 1130 | 1129 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| 1131 | 1130 | WRITELONG(jaguar, jaguar->r[14] + r1 * 4, jaguar->r[op & 31]); |
| 1132 | 1131 | } |
| 1133 | 1132 | |
| 1134 | void store_rn_r15n(jaguar_state *jaguar, UINT16 op) | |
| 1133 | void store_rn_r15n(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1135 | 1134 | { |
| 1136 | 1135 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| 1137 | 1136 | WRITELONG(jaguar, jaguar->r[15] + r1 * 4, jaguar->r[op & 31]); |
| 1138 | 1137 | } |
| 1139 | 1138 | |
| 1140 | void store_rn_r14rn(jaguar_state *jaguar, UINT16 op) | |
| 1139 | void store_rn_r14rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1141 | 1140 | { |
| 1142 | 1141 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 1143 | 1142 | WRITELONG(jaguar, jaguar->r[14] + r1, jaguar->r[op & 31]); |
| 1144 | 1143 | } |
| 1145 | 1144 | |
| 1146 | void store_rn_r15rn(jaguar_state *jaguar, UINT16 op) | |
| 1145 | void store_rn_r15rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1147 | 1146 | { |
| 1148 | 1147 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 1149 | 1148 | WRITELONG(jaguar, jaguar->r[15] + r1, jaguar->r[op & 31]); |
| 1150 | 1149 | } |
| 1151 | 1150 | |
| 1152 | void storeb_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 1151 | void storeb_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1153 | 1152 | { |
| 1154 | 1153 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 1155 | 1154 | WRITEBYTE(jaguar, r1, jaguar->r[op & 31]); |
| 1156 | 1155 | } |
| 1157 | 1156 | |
| 1158 | void storew_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 1157 | void storew_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1159 | 1158 | { |
| 1160 | 1159 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 1161 | 1160 | WRITEWORD(jaguar, r1, jaguar->r[op & 31]); |
| 1162 | 1161 | } |
| 1163 | 1162 | |
| 1164 | void storep_rn_rn(jaguar_state *jaguar, UINT16 op) /* GPU only */ | |
| 1163 | void storep_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) /* GPU only */ | |
| 1165 | 1164 | { |
| 1166 | 1165 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| 1167 | 1166 | WRITELONG(jaguar, r1, jaguar->ctrl[G_HIDATA]); |
| 1168 | 1167 | WRITELONG(jaguar, r1+4, jaguar->r[op & 31]); |
| 1169 | 1168 | } |
| 1170 | 1169 | |
| 1171 | void sub_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 1170 | void sub_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1172 | 1171 | { |
| 1173 | 1172 | int dreg = op & 31; |
| 1174 | 1173 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1178 | 1177 | CLR_ZNC(jaguar); SET_ZNC_SUB(jaguar, r2, r1, res); |
| 1179 | 1178 | } |
| 1180 | 1179 | |
| 1181 | void subc_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 1180 | void subc_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1182 | 1181 | { |
| 1183 | 1182 | int dreg = op & 31; |
| 1184 | 1183 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1188 | 1187 | CLR_ZNC(jaguar); SET_ZNC_SUB(jaguar, r2, r1, res); |
| 1189 | 1188 | } |
| 1190 | 1189 | |
| 1191 | void subq_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 1190 | void subq_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1192 | 1191 | { |
| 1193 | 1192 | int dreg = op & 31; |
| 1194 | 1193 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1198 | 1197 | CLR_ZNC(jaguar); SET_ZNC_SUB(jaguar, r2, r1, res); |
| 1199 | 1198 | } |
| 1200 | 1199 | |
| 1201 | void subqmod_n_rn(jaguar_state *jaguar, UINT16 op) /* DSP only */ | |
| 1200 | void subqmod_n_rn(jaguar_cpu_state *jaguar, UINT16 op) /* DSP only */ | |
| 1202 | 1201 | { |
| 1203 | 1202 | int dreg = op & 31; |
| 1204 | 1203 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1209 | 1208 | CLR_ZNC(jaguar); SET_ZNC_SUB(jaguar, r2, r1, res); |
| 1210 | 1209 | } |
| 1211 | 1210 | |
| 1212 | void subqt_n_rn(jaguar_state *jaguar, UINT16 op) | |
| 1211 | void subqt_n_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1213 | 1212 | { |
| 1214 | 1213 | int dreg = op & 31; |
| 1215 | 1214 | UINT32 r1 = convert_zero[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1218 | 1217 | jaguar->r[dreg] = res; |
| 1219 | 1218 | } |
| 1220 | 1219 | |
| 1221 | void xor_rn_rn(jaguar_state *jaguar, UINT16 op) | |
| 1220 | void xor_rn_rn(jaguar_cpu_state *jaguar, UINT16 op) | |
| 1222 | 1221 | { |
| 1223 | 1222 | int dreg = op & 31; |
| 1224 | 1223 | UINT32 r1 = jaguar->r[(op >> 5) & 31]; |
| r17907 | r17908 | |
| 1236 | 1235 | |
| 1237 | 1236 | UINT32 jaguargpu_ctrl_r(device_t *device, offs_t offset) |
| 1238 | 1237 | { |
| 1239 | jaguar_state *jaguar = get_safe_token(device); | |
| 1238 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 1240 | 1239 | |
| 1241 | 1240 | if (LOG_GPU_IO) logerror("GPU read register @ F021%02X\n", offset * 4); |
| 1242 | 1241 | |
| r17907 | r17908 | |
| 1246 | 1245 | |
| 1247 | 1246 | void jaguargpu_ctrl_w(device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask) |
| 1248 | 1247 | { |
| 1249 | jaguar_state *jaguar = get_safe_token(device); | |
| 1248 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 1250 | 1249 | UINT32 oldval, newval; |
| 1251 | 1250 | |
| 1252 | 1251 | if (LOG_GPU_IO && offset != G_HIDATA) |
| r17907 | r17908 | |
| 1332 | 1331 | |
| 1333 | 1332 | UINT32 jaguardsp_ctrl_r(device_t *device, offs_t offset) |
| 1334 | 1333 | { |
| 1335 | jaguar_state *jaguar = get_safe_token(device); | |
| 1334 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 1336 | 1335 | |
| 1337 | 1336 | if (LOG_DSP_IO && offset != D_FLAGS) |
| 1338 | 1337 | logerror("DSP read register @ F1A1%02X\n", offset * 4); |
| r17907 | r17908 | |
| 1344 | 1343 | |
| 1345 | 1344 | void jaguardsp_ctrl_w(device_t *device, offs_t offset, UINT32 data, UINT32 mem_mask) |
| 1346 | 1345 | { |
| 1347 | jaguar_state *jaguar = get_safe_token(device); | |
| 1346 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 1348 | 1347 | UINT32 oldval, newval; |
| 1349 | 1348 | |
| 1350 | 1349 | if (LOG_DSP_IO && offset != D_FLAGS) |
| r17907 | r17908 | |
| 1431 | 1430 | |
| 1432 | 1431 | static CPU_SET_INFO( jaguargpu ) |
| 1433 | 1432 | { |
| 1434 | jaguar_state *jaguar = get_safe_token(device); | |
| 1433 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 1435 | 1434 | switch (state) |
| 1436 | 1435 | { |
| 1437 | 1436 | /* --- the following bits of info are set as 64-bit signed integers --- */ |
| r17907 | r17908 | |
| 1489 | 1488 | |
| 1490 | 1489 | CPU_GET_INFO( jaguargpu ) |
| 1491 | 1490 | { |
| 1492 | jaguar_state *jaguar = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; | |
| 1491 | jaguar_cpu_state *jaguar = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; | |
| 1493 | 1492 | switch (state) |
| 1494 | 1493 | { |
| 1495 | 1494 | /* --- the following bits of info are returned as 64-bit signed integers --- */ |
| 1496 | case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(jaguar_state); break; | |
| 1495 | case CPUINFO_INT_CONTEXT_SIZE: info->i = sizeof(jaguar_cpu_state); break; | |
| 1497 | 1496 | case CPUINFO_INT_INPUT_LINES: info->i = 5; break; |
| 1498 | 1497 | case CPUINFO_INT_DEFAULT_IRQ_VECTOR: info->i = 0; break; |
| 1499 | 1498 | case CPUINFO_INT_ENDIANNESS: info->i = ENDIANNESS_BIG; break; |
| r17907 | r17908 | |
| 1628 | 1627 | |
| 1629 | 1628 | static CPU_SET_INFO( jaguardsp ) |
| 1630 | 1629 | { |
| 1631 | jaguar_state *jaguar = get_safe_token(device); | |
| 1630 | jaguar_cpu_state *jaguar = get_safe_token(device); | |
| 1632 | 1631 | switch (state) |
| 1633 | 1632 | { |
| 1634 | 1633 | /* --- the following bits of info are set as 64-bit signed integers --- */ |
| r17907 | r17908 | |
| 1642 | 1641 | |
| 1643 | 1642 | CPU_GET_INFO( jaguardsp ) |
| 1644 | 1643 | { |
| 1645 | jaguar_state *jaguar = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; | |
| 1644 | jaguar_cpu_state *jaguar = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; | |
| 1646 | 1645 | switch (state) |
| 1647 | 1646 | { |
| 1648 | 1647 | /* --- the following bits of info are returned as 64-bit signed integers --- */ |
| r17907 | r17908 | |
|---|---|---|
| 41 | 41 | #define SIO_CONTROL_DSR_IENA ( 1 << 12 ) |
| 42 | 42 | #define SIO_CONTROL_DTR ( 1 << 13 ) |
| 43 | 43 | |
| 44 | typedef struct _psx_sio psx_sio; | |
| 45 | struct _psx_sio | |
| 44 | struct psx_sio | |
| 46 | 45 | { |
| 47 | 46 | UINT32 n_status; |
| 48 | 47 | UINT32 n_mode; |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | typedef delegate<void (UINT32, INT32)> psx_dma_read_delegate; |
| 18 | 18 | typedef delegate<void (UINT32, INT32)> psx_dma_write_delegate; |
| 19 | 19 | |
| 20 | typedef struct _psx_dma_channel psx_dma_channel; | |
| 21 | struct _psx_dma_channel | |
| 20 | struct psx_dma_channel | |
| 22 | 21 | { |
| 23 | 22 | UINT32 n_base; |
| 24 | 23 | UINT32 n_blockcontrol; |
| r17907 | r17908 | |
|---|---|---|
| 23 | 23 | #define PSX_RC_CLC ( 0x100 ) |
| 24 | 24 | #define PSX_RC_DIV ( 0x200 ) |
| 25 | 25 | |
| 26 | typedef struct _psx_root psx_root; | |
| 27 | struct _psx_root | |
| 26 | struct psx_root | |
| 28 | 27 | { |
| 29 | 28 | emu_timer *timer; |
| 30 | 29 | UINT16 n_count; |
| r17907 | r17908 | |
|---|---|---|
| 36 | 36 | TYPE DEFINITIONS |
| 37 | 37 | ***************************************************************************/ |
| 38 | 38 | |
| 39 | typedef struct _i8085_config i8085_config; | |
| 40 | struct _i8085_config | |
| 39 | struct i8085_config | |
| 41 | 40 | { |
| 42 | 41 | devcb_write8 out_status_func; /* STATUS changed callback */ |
| 43 | 42 | devcb_write_line out_inte_func; /* INTE changed callback */ |
| r17907 | r17908 | |
|---|---|---|
| 157 | 157 | TYPE DEFINITIONS |
| 158 | 158 | ***************************************************************************/ |
| 159 | 159 | |
| 160 | typedef struct _i8085_state i8085_state; | |
| 161 | struct _i8085_state | |
| 160 | struct i8085_state | |
| 162 | 161 | { |
| 163 | 162 | i8085_config config; |
| 164 | 163 |
| r17907 | r17908 | |
|---|---|---|
| 129 | 129 | ***************************************************************************/ |
| 130 | 130 | |
| 131 | 131 | /* fast RAM info */ |
| 132 | typedef struct _fast_ram_info fast_ram_info; | |
| 133 | struct _fast_ram_info | |
| 132 | struct fast_ram_info | |
| 134 | 133 | { |
| 135 | 134 | offs_t start; /* start of the RAM block */ |
| 136 | 135 | offs_t end; /* end of the RAM block */ |
| r17907 | r17908 | |
| 140 | 139 | |
| 141 | 140 | |
| 142 | 141 | /* hotspot info */ |
| 143 | typedef struct _hotspot_info hotspot_info; | |
| 144 | struct _hotspot_info | |
| 142 | struct hotspot_info | |
| 145 | 143 | { |
| 146 | 144 | offs_t pc; /* PC to consider */ |
| 147 | 145 | UINT32 opcode; /* required opcode at that PC */ |
| r17907 | r17908 | |
| 150 | 148 | |
| 151 | 149 | |
| 152 | 150 | /* internal compiler state */ |
| 153 | typedef struct _compiler_state compiler_state; | |
| 154 | struct _compiler_state | |
| 151 | struct compiler_state | |
| 155 | 152 | { |
| 156 | 153 | UINT32 cycles; /* accumulated cycles */ |
| 157 | 154 | UINT8 checkints; /* need to check interrupts before next instruction */ |
| r17907 | r17908 | |
|---|---|---|
| 491 | 491 | ***************************************************************************/ |
| 492 | 492 | |
| 493 | 493 | /* PowerPC 4XX-specific serial port state */ |
| 494 | typedef struct _ppc4xx_spu_state ppc4xx_spu_state; | |
| 495 | struct _ppc4xx_spu_state | |
| 494 | struct ppc4xx_spu_state | |
| 496 | 495 | { |
| 497 | 496 | UINT8 regs[9]; |
| 498 | 497 | UINT8 txbuf; |
| r17907 | r17908 | |
| 509 | 508 | |
| 510 | 509 | |
| 511 | 510 | /* PowerPC state */ |
| 512 | typedef struct _powerpc_state powerpc_state; | |
| 513 | struct _powerpc_state | |
| 511 | struct powerpc_state | |
| 514 | 512 | { |
| 515 | 513 | /* core registers */ |
| 516 | 514 | UINT32 pc; |
| r17907 | r17908 | |
|---|---|---|
| 164 | 164 | |
| 165 | 165 | typedef void (*ppc4xx_spu_tx_handler)(device_t *device, UINT8 data); |
| 166 | 166 | |
| 167 | typedef struct _powerpc_config powerpc_config; | |
| 168 | struct _powerpc_config | |
| 167 | struct powerpc_config | |
| 169 | 168 | { |
| 170 | 169 | UINT32 bus_frequency; |
| 171 | 170 | read32_device_func dcr_read_func; |
| r17907 | r17908 | |
|---|---|---|
| 114 | 114 | } |
| 115 | 115 | |
| 116 | 116 | /* opcode table entry */ |
| 117 | typedef struct _tms32010_opcode tms32010_opcode; | |
| 118 | struct _tms32010_opcode | |
| 117 | struct tms32010_opcode | |
| 119 | 118 | { |
| 120 | 119 | UINT8 cycles; |
| 121 | 120 | void (*function)(tms32010_state *); |
| r17907 | r17908 | |
|---|---|---|
| 30 | 30 | #define FLAG_B 0x02 |
| 31 | 31 | #define FLAG_I 0x01 |
| 32 | 32 | |
| 33 | typedef struct _sm8500_state sm8500_state; | |
| 34 | struct _sm8500_state | |
| 33 | struct sm8500_state | |
| 35 | 34 | { |
| 36 | 35 | SM8500_CONFIG config; |
| 37 | 36 | UINT16 PC; |
| r17907 | r17908 | |
|---|---|---|
| 26 | 26 | |
| 27 | 27 | #define SH2_CODE_XOR(a) ((a) ^ NATIVE_ENDIAN_VALUE_LE_BE(2,0)) |
| 28 | 28 | |
| 29 | typedef struct _irq_entry irq_entry; | |
| 30 | struct _irq_entry | |
| 29 | struct irq_entry | |
| 31 | 30 | { |
| 32 | 31 | int irq_vector; |
| 33 | 32 | int irq_priority; |
| r17907 | r17908 | |
|---|---|---|
| 57 | 57 | SH2_R8, SH2_R9, SH2_R10, SH2_R11, SH2_R12, SH2_R13, SH2_R14, SH2_R15, SH2_EA |
| 58 | 58 | }; |
| 59 | 59 | |
| 60 | typedef struct _sh2_cpu_core sh2_cpu_core; | |
| 61 | struct _sh2_cpu_core | |
| 60 | struct sh2_cpu_core | |
| 62 | 61 | { |
| 63 | 62 | int is_slave; |
| 64 | 63 | int (*dma_callback_kludge)(device_t *device, UINT32 src, UINT32 dst, UINT32 data, int size); |
| r17907 | r17908 | |
|---|---|---|
| 89 | 89 | ***************************************************************************/ |
| 90 | 90 | |
| 91 | 91 | /* internal compiler state */ |
| 92 | typedef struct _compiler_state compiler_state; | |
| 93 | struct _compiler_state | |
| 92 | struct compiler_state | |
| 94 | 93 | { |
| 95 | 94 | UINT32 cycles; /* accumulated cycles */ |
| 96 | 95 | UINT8 checkints; /* need to check interrupts before next instruction */ |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | |
| 23 | 23 | extern int mn102_disassemble(char *buffer, UINT32 pc, const UINT8 *oprom); |
| 24 | 24 | |
| 25 | typedef struct _mn102_info mn102_info; | |
| 26 | struct _mn102_info | |
| 25 | struct mn102_info | |
| 27 | 26 | { |
| 28 | 27 | // The UINT32s are really UINT24 |
| 29 | 28 | UINT32 pc; |
| r17907 | r17908 | |
|---|---|---|
| 79 | 79 | UINT16 pm; |
| 80 | 80 | } ST1; |
| 81 | 81 | |
| 82 | typedef struct _tms32051_state tms32051_state; | |
| 83 | struct _tms32051_state | |
| 82 | struct tms32051_state | |
| 84 | 83 | { |
| 85 | 84 | UINT16 pc; |
| 86 | 85 | UINT16 op; |
| r17907 | r17908 | |
|---|---|---|
| 37 | 37 | STRUCTURES & TYPEDEFS |
| 38 | 38 | ***************************************************************************/ |
| 39 | 39 | |
| 40 | typedef struct _mb88_state mb88_state; | |
| 41 | struct _mb88_state | |
| 40 | struct mb88_state | |
| 42 | 41 | { |
| 43 | 42 | UINT8 PC; /* Program Counter: 6 bits */ |
| 44 | 43 | UINT8 PA; /* Page Address: 4 bits */ |
| r17907 | r17908 | |
|---|---|---|
| 54 | 54 | CONFIG STRUCTURE |
| 55 | 55 | ***************************************************************************/ |
| 56 | 56 | |
| 57 | typedef struct _mb88_cpu_core mb88_cpu_core; | |
| 58 | struct _mb88_cpu_core | |
| 57 | struct mb88_cpu_core | |
| 59 | 58 | { |
| 60 | 59 | UINT8 *PLA_config; /* PLA configuration (32 byte values), if NULL assume direct output */ |
| 61 | 60 | }; |
| r17907 | r17908 | |
|---|---|---|
| 170 | 170 | #define M_RDOP(A) cpustate->direct->read_decrypted_byte(A) |
| 171 | 171 | #define M_RDOP_ARG(A) cpustate->direct->read_raw_byte(A) |
| 172 | 172 | |
| 173 | typedef struct _alpha8201_state alpha8201_state; | |
| 174 | struct _alpha8201_state | |
| 173 | struct alpha8201_state | |
| 175 | 174 | { |
| 176 | 175 | UINT8 RAM[8*8]; /* internal GP register 8 * 8bank */ |
| 177 | 176 | unsigned PREVPC; |
| r17907 | r17908 | |
|---|---|---|
| 67 | 67 | /* ======================================================================== */ |
| 68 | 68 | |
| 69 | 69 | /* CPU Structure */ |
| 70 | typedef struct _g65816i_cpu_struct g65816i_cpu_struct; | |
| 71 | struct _g65816i_cpu_struct | |
| 70 | struct g65816i_cpu_struct | |
| 72 | 71 | { |
| 73 | 72 | uint a; /* Accumulator */ |
| 74 | 73 | uint b; /* holds high byte of accumulator */ |
| r17907 | r17908 | |
|---|---|---|
| 343 | 343 | |
| 344 | 344 | #define apexc_readop(address) apexc_readmem(address) |
| 345 | 345 | |
| 346 | typedef struct _apexc_state apexc_state; | |
| 347 | struct _apexc_state | |
| 346 | struct apexc_state | |
| 348 | 347 | { |
| 349 | 348 | UINT32 a; /* accumulator */ |
| 350 | 349 | UINT32 r; /* register */ |
| r17907 | r17908 | |
|---|---|---|
| 66 | 66 | UINT8 b[256]; |
| 67 | 67 | } internalram; |
| 68 | 68 | |
| 69 | typedef struct _v25_state_t v25_state_t; | |
| 70 | struct _v25_state_t | |
| 69 | struct v25_state_t | |
| 71 | 70 | { |
| 72 | 71 | internalram ram; |
| 73 | 72 | offs_t fetch_xor; |
| r17907 | r17908 | |
|---|---|---|
| 7 | 7 | |
| 8 | 8 | #include "emu.h" |
| 9 | 9 | |
| 10 | typedef struct _nec_config nec_config; | |
| 11 | struct _nec_config | |
| 10 | struct nec_config | |
| 12 | 11 | { |
| 13 | 12 | const UINT8* v25v35_decryptiontable; // internal decryption table |
| 14 | 13 | }; |
| r17907 | r17908 | |
|---|---|---|
| 1 | /* ASG 971222 -- rewrote this interface */ | |
| 2 | #ifndef __NEC_H_ | |
| 3 | #define __NEC_H_ | |
| 4 | ||
| 5 | ||
| 6 | typedef struct _nec_config nec_config; | |
| 7 | struct _nec_config | |
| 8 | { | |
| 9 | const UINT8* v25v35_decryptiontable; // internal decryption table | |
| 10 | }; | |
| 11 | ||
| 12 | #define NEC_INPUT_LINE_INTP0 10 | |
| 13 | #define NEC_INPUT_LINE_INTP1 11 | |
| 14 | #define NEC_INPUT_LINE_INTP2 12 | |
| 15 | #define NEC_INPUT_LINE_POLL 20 | |
| 16 | ||
| 17 | #define V25_PORT_P0 0x10000 | |
| 18 | #define V25_PORT_P1 0x10002 | |
| 19 | #define V25_PORT_P2 0x10004 | |
| 20 | #define V25_PORT_PT 0x10006 | |
| 21 | ||
| 22 | enum | |
| 23 | { | |
| 24 | NEC_PC=0, | |
| 25 | NEC_IP, NEC_AW, NEC_CW, NEC_DW, NEC_BW, NEC_SP, NEC_BP, NEC_IX, NEC_IY, | |
| 26 | NEC_FLAGS, NEC_ES, NEC_CS, NEC_SS, NEC_DS, | |
| 27 | NEC_PENDING | |
| 28 | }; | |
| 29 | ||
| 30 | /* Public functions */ | |
| 31 | DECLARE_LEGACY_CPU_DEVICE(V20, v20); | |
| 32 | DECLARE_LEGACY_CPU_DEVICE(V25, v25); | |
| 33 | DECLARE_LEGACY_CPU_DEVICE(V30, v30); | |
| 34 | DECLARE_LEGACY_CPU_DEVICE(V33, v33); | |
| 35 | DECLARE_LEGACY_CPU_DEVICE(V35, v35); | |
| 36 | ||
| 37 | #endif | |
| 1 | /* ASG 971222 -- rewrote this interface */ | |
| 2 | #ifndef __NEC_H_ | |
| 3 | #define __NEC_H_ | |
| 4 | ||
| 5 | ||
| 6 | struct nec_config | |
| 7 | { | |
| 8 | const UINT8* v25v35_decryptiontable; // internal decryption table | |
| 9 | }; | |
| 10 | ||
| 11 | #define NEC_INPUT_LINE_INTP0 10 | |
| 12 | #define NEC_INPUT_LINE_INTP1 11 | |
| 13 | #define NEC_INPUT_LINE_INTP2 12 | |
| 14 | #define NEC_INPUT_LINE_POLL 20 | |
| 15 | ||
| 16 | #define V25_PORT_P0 0x10000 | |
| 17 | #define V25_PORT_P1 0x10002 | |
| 18 | #define V25_PORT_P2 0x10004 | |
| 19 | #define V25_PORT_PT 0x10006 | |
| 20 | ||
| 21 | enum | |
| 22 | { | |
| 23 | NEC_PC=0, | |
| 24 | NEC_IP, NEC_AW, NEC_CW, NEC_DW, NEC_BW, NEC_SP, NEC_BP, NEC_IX, NEC_IY, | |
| 25 | NEC_FLAGS, NEC_ES, NEC_CS, NEC_SS, NEC_DS, | |
| 26 | NEC_PENDING | |
| 27 | }; | |
| 28 | ||
| 29 | /* Public functions */ | |
| 30 | DECLARE_LEGACY_CPU_DEVICE(V20, v20); | |
| 31 | DECLARE_LEGACY_CPU_DEVICE(V25, v25); | |
| 32 | DECLARE_LEGACY_CPU_DEVICE(V30, v30); | |
| 33 | DECLARE_LEGACY_CPU_DEVICE(V33, v33); | |
| 34 | DECLARE_LEGACY_CPU_DEVICE(V35, v35); | |
| 35 | ||
| 36 | #endif |
| r17907 | r17908 | |
|---|---|---|
| 33 | 33 | UINT8 b[16]; /* or as 8 bit registers */ |
| 34 | 34 | } necbasicregs; |
| 35 | 35 | |
| 36 | typedef struct _nec_state_t nec_state_t; | |
| 37 | struct _nec_state_t | |
| 36 | struct nec_state_t | |
| 38 | 37 | { |
| 39 | 38 | necbasicregs regs; |
| 40 | 39 | offs_t fetch_xor; |
| r17907 | r17908 | |
|---|---|---|
| 167 | 167 | ***************************************************************************/ |
| 168 | 168 | |
| 169 | 169 | /* MIPS3 TLB entry */ |
| 170 | typedef struct _mips3_tlb_entry mips3_tlb_entry; | |
| 171 | struct _mips3_tlb_entry | |
| 170 | struct mips3_tlb_entry | |
| 172 | 171 | { |
| 173 | 172 | UINT64 page_mask; |
| 174 | 173 | UINT64 entry_hi; |
| r17907 | r17908 | |
| 181 | 180 | |
| 182 | 181 | |
| 183 | 182 | /* MIPS3 state */ |
| 184 | typedef struct _mips3_state mips3_state; | |
| 185 | struct _mips3_state | |
| 183 | struct mips3_state | |
| 186 | 184 | { |
| 187 | 185 | /* core registers */ |
| 188 | 186 | UINT32 pc; |
| r17907 | r17908 | |
|---|---|---|
| 210 | 210 | STRUCTURES |
| 211 | 211 | ***************************************************************************/ |
| 212 | 212 | |
| 213 | typedef struct _mips3_config mips3_config; | |
| 214 | struct _mips3_config | |
| 213 | struct mips3_config | |
| 215 | 214 | { |
| 216 | 215 | size_t icache; /* code cache size */ |
| 217 | 216 | size_t dcache; /* data cache size */ |
| r17907 | r17908 | |
|---|---|---|
| 150 | 150 | ***************************************************************************/ |
| 151 | 151 | |
| 152 | 152 | /* fast RAM info */ |
| 153 | typedef struct _fast_ram_info fast_ram_info; | |
| 154 | struct _fast_ram_info | |
| 153 | struct fast_ram_info | |
| 155 | 154 | { |
| 156 | 155 | offs_t start; /* start of the RAM block */ |
| 157 | 156 | offs_t end; /* end of the RAM block */ |
| r17907 | r17908 | |
| 161 | 160 | |
| 162 | 161 | |
| 163 | 162 | /* hotspot info */ |
| 164 | typedef struct _hotspot_info hotspot_info; | |
| 165 | struct _hotspot_info | |
| 163 | struct hotspot_info | |
| 166 | 164 | { |
| 167 | 165 | offs_t pc; /* PC to consider */ |
| 168 | 166 | UINT32 opcode; /* required opcode at that PC */ |
| r17907 | r17908 | |
| 171 | 169 | |
| 172 | 170 | |
| 173 | 171 | /* internal compiler state */ |
| 174 | typedef struct _compiler_state compiler_state; | |
| 175 | struct _compiler_state | |
| 172 | struct compiler_state | |
| 176 | 173 | { |
| 177 | 174 | UINT32 cycles; /* accumulated cycles */ |
| 178 | 175 | UINT8 checkints; /* need to check interrupts before next instruction */ |
| r17907 | r17908 | |
|---|---|---|
| 116 | 116 | ***************************************************************************/ |
| 117 | 117 | |
| 118 | 118 | /* R3000 Registers */ |
| 119 | typedef struct _r3000_state r3000_state; | |
| 120 | struct _r3000_state | |
| 119 | struct r3000_state | |
| 121 | 120 | { |
| 122 | 121 | /* core registers */ |
| 123 | 122 | UINT32 pc; |
| r17907 | r17908 | |
|---|---|---|
| 46 | 46 | STRUCTURES |
| 47 | 47 | ***************************************************************************/ |
| 48 | 48 | |
| 49 | typedef struct _r3000_cpu_core r3000_cpu_core; | |
| 50 | struct _r3000_cpu_core | |
| 49 | struct r3000_cpu_core | |
| 51 | 50 | { |
| 52 | 51 | UINT8 hasfpu; /* 1 if we have an FPU, 0 otherwise */ |
| 53 | 52 | size_t icache; /* code cache size */ |
| r17907 | r17908 | |
|---|---|---|
| 142 | 142 | /* The Z80 registers. halt is set to 1 when the CPU is halted, the refresh */ |
| 143 | 143 | /* register is calculated as follows: refresh=(r&127)|(r2&128) */ |
| 144 | 144 | /****************************************************************************/ |
| 145 | typedef struct _z80_state z80_state; | |
| 146 | struct _z80_state | |
| 145 | struct z80_state | |
| 147 | 146 | { |
| 148 | 147 | PAIR prvpc,pc,sp,af,bc,de,hl,ix,iy,wz; |
| 149 | 148 | PAIR af2,bc2,de2,hl2; |
| r17907 | r17908 | |
|---|---|---|
| 80 | 80 | /*************************************************************************** |
| 81 | 81 | CONFIGURATION STRUCTURE |
| 82 | 82 | ***************************************************************************/ |
| 83 | typedef struct _esrip_config_ esrip_config; | |
| 84 | struct _esrip_config_ | |
| 83 | struct esrip_config | |
| 85 | 84 | { |
| 86 | 85 | read16_device_func fdt_r; |
| 87 | 86 | write16_device_func fdt_w; |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | TYPE DEFINITIONS |
| 20 | 20 | ***************************************************************************/ |
| 21 | 21 | |
| 22 | typedef struct _pps4_state pps4_state; | |
| 23 | struct _pps4_state | |
| 22 | struct pps4_state | |
| 24 | 23 | { |
| 25 | 24 | UINT8 A; // Accumulator |
| 26 | 25 | UINT8 X; |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | |
| 17 | 17 | enum { RCACHE_SIZE = 4 }; |
| 18 | 18 | |
| 19 | typedef struct _i960_state_t i960_state_t; | |
| 20 | struct _i960_state_t { | |
| 19 | struct i960_state_t { | |
| 21 | 20 | UINT32 r[0x20]; |
| 22 | 21 | UINT32 rcache[RCACHE_SIZE][0x10]; |
| 23 | 22 | UINT32 rcache_frame_addr[RCACHE_SIZE]; |
| r17907 | r17908 | |
|---|---|---|
| 1 | 1 | #ifndef __I960DIS_H__ |
| 2 | 2 | #define __I960DIS_H__ |
| 3 | 3 | |
| 4 | typedef struct _disassemble_t disassemble_t; | |
| 5 | struct _disassemble_t | |
| 4 | struct disassemble_t | |
| 6 | 5 | { |
| 7 | 6 | char *buffer; // output buffer |
| 8 | 7 | unsigned long IP; |
| r17907 | r17908 | |
|---|---|---|
| 31 | 31 | #define clkIF 3 |
| 32 | 32 | #define clkMEM 3 |
| 33 | 33 | |
| 34 | typedef struct _v810_state v810_state; | |
| 35 | struct _v810_state | |
| 34 | struct v810_state | |
| 36 | 35 | { |
| 37 | 36 | UINT32 reg[65]; |
| 38 | 37 | UINT8 irq_line; |
| r17907 | r17908 | |
|---|---|---|
| 192 | 192 | } |
| 193 | 193 | |
| 194 | 194 | /* opcode table entry */ |
| 195 | typedef struct _tms32025_opcode tms32025_opcode; | |
| 196 | struct _tms32025_opcode | |
| 195 | struct tms32025_opcode | |
| 197 | 196 | { |
| 198 | 197 | UINT8 cycles; |
| 199 | 198 | void (*function)(tms32025_state *); |
| r17907 | r17908 | |
|---|---|---|
| 156 | 156 | TYPE DEFINITIONS |
| 157 | 157 | ***************************************************************************/ |
| 158 | 158 | |
| 159 | typedef struct _z8_state z8_state; | |
| 160 | struct _z8_state | |
| 159 | struct z8_state | |
| 161 | 160 | { |
| 162 | 161 | address_space *program; |
| 163 | 162 | direct_read_data *direct; |
| r17907 | r17908 | |
| 541 | 540 | |
| 542 | 541 | typedef void (*z8_opcode_func) (z8_state *cpustate, UINT8 opcode, int *cycles); |
| 543 | 542 | |
| 544 | typedef struct _z8_opcode_map z8_opcode_map; | |
| 545 | struct _z8_opcode_map | |
| 543 | struct z8_opcode_map | |
| 546 | 544 | { |
| 547 | 545 | z8_opcode_func function; |
| 548 | 546 | int execution_cycles; |
| r17907 | r17908 | |
|---|---|---|
| 67 | 67 | |
| 68 | 68 | |
| 69 | 69 | |
| 70 | typedef struct _pic16c5x_state pic16c5x_state; | |
| 71 | struct _pic16c5x_state | |
| 70 | struct pic16c5x_state | |
| 72 | 71 | { |
| 73 | 72 | /******************** CPU Internal Registers *******************/ |
| 74 | 73 | UINT16 PC; |
| r17907 | r17908 | |
| 117 | 116 | |
| 118 | 117 | |
| 119 | 118 | /* opcode table entry */ |
| 120 | typedef struct _pic16c5x_opcode pic16c5x_opcode; | |
| 121 | struct _pic16c5x_opcode | |
| 119 | struct pic16c5x_opcode | |
| 122 | 120 | { |
| 123 | 121 | UINT8 cycles; |
| 124 | 122 | void (*function)(pic16c5x_state *); |
| r17907 | r17908 | |
|---|---|---|
| 23 | 23 | #define tx0_pulse_reset(cpudevice) (cpudevice)->state().set_state_int(TX0_RESET, 0) |
| 24 | 24 | #define tx0_pulse_io_complete(cpudevice) (cpudevice)->state().set_state_int(TX0_IO_COMPLETE, 0) |
| 25 | 25 | |
| 26 | typedef struct _tx0_reset_param_t tx0_reset_param_t; | |
| 27 | struct _tx0_reset_param_t | |
| 26 | struct tx0_reset_param_t | |
| 28 | 27 | { |
| 29 | 28 | /* 8 standard I/O handlers: |
| 30 | 29 | 0: cpy (8kW only) |
| r17907 | r17908 | |
|---|---|---|
| 348 | 348 | |
| 349 | 349 | |
| 350 | 350 | /* PDP1 Registers */ |
| 351 | typedef struct _pdp1_state pdp1_state; | |
| 352 | struct _pdp1_state | |
| 351 | struct pdp1_state | |
| 353 | 352 | { |
| 354 | 353 | /* processor registers */ |
| 355 | 354 | UINT32 pc; /* program counter (12, 15 or 16 bits) */ |
| r17907 | r17908 | |
|---|---|---|
| 27 | 27 | typedef void (*pdp1_io_sc_func)(device_t *device); |
| 28 | 28 | |
| 29 | 29 | |
| 30 | typedef struct _pdp1_reset_param_t pdp1_reset_param_t; | |
| 31 | struct _pdp1_reset_param_t | |
| 30 | struct pdp1_reset_param_t | |
| 32 | 31 | { |
| 33 | 32 | /* callbacks for iot instructions (required for any I/O) */ |
| 34 | 33 | pdp1_extern_iot_func extern_iot[64]; |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | |
| 22 | 22 | |
| 23 | 23 | /* TX-0 Registers */ |
| 24 | typedef struct _tx0_state tx0_state; | |
| 25 | struct _tx0_state | |
| 24 | struct tx0_state | |
| 26 | 25 | { |
| 27 | 26 | const tx0_reset_param_t *iface; |
| 28 | 27 |
| r17907 | r17908 | |
|---|---|---|
| 30 | 30 | float f; |
| 31 | 31 | } MB86233_REG; |
| 32 | 32 | |
| 33 | typedef struct _mb86233_state mb86233_state; | |
| 34 | struct _mb86233_state | |
| 33 | struct mb86233_state | |
| 35 | 34 | { |
| 36 | 35 | UINT16 pc; |
| 37 | 36 | MB86233_REG a; |
| r17907 | r17908 | |
|---|---|---|
| 45 | 45 | typedef int (*mb86233_fifo_read_func)(device_t *device, UINT32 *data); |
| 46 | 46 | typedef void (*mb86233_fifo_write_func)(device_t *device, UINT32 data); |
| 47 | 47 | |
| 48 | typedef struct _mb86233_cpu_core mb86233_cpu_core; | |
| 49 | struct _mb86233_cpu_core | |
| 48 | struct mb86233_cpu_core | |
| 50 | 49 | { |
| 51 | 50 | mb86233_fifo_read_func fifo_read_cb; |
| 52 | 51 | mb86233_fifo_write_func fifo_write_cb; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | * |
| 23 | 23 | *************************************/ |
| 24 | 24 | |
| 25 | typedef struct _t11_state t11_state; | |
| 26 | struct _t11_state | |
| 25 | struct t11_state | |
| 27 | 26 | { |
| 28 | 27 | PAIR ppc; /* previous program counter */ |
| 29 | 28 | PAIR reg[8]; |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | #define __M6800_H__ |
| 7 | 7 | |
| 8 | 8 | |
| 9 | typedef struct _m6801_interface m6801_interface; | |
| 10 | struct _m6801_interface | |
| 9 | struct m6801_interface | |
| 11 | 10 | { |
| 12 | 11 | devcb_write_line out_sc2_func; |
| 13 | 12 | }; |
| r17907 | r17908 | |
|---|---|---|
| 106 | 106 | #endif |
| 107 | 107 | |
| 108 | 108 | /* 6800 Registers */ |
| 109 | typedef struct _m6800_state m6800_state; | |
| 110 | struct _m6800_state | |
| 109 | struct m6800_state | |
| 111 | 110 | { |
| 112 | 111 | // int subtype; /* CPU subtype */ |
| 113 | 112 | PAIR ppc; /* Previous program counter */ |
| r17907 | r17908 | |
|---|---|---|
| 30 | 30 | #define OV 0x20 |
| 31 | 31 | #define C 0x10 |
| 32 | 32 | |
| 33 | typedef struct _cp1610_state cp1610_state; | |
| 34 | struct _cp1610_state | |
| 33 | struct cp1610_state | |
| 35 | 34 | { |
| 36 | 35 | UINT16 r[8]; /* registers */ |
| 37 | 36 | UINT8 flags; /* flags */ |
| r17907 | r17908 | |
|---|---|---|
| 50 | 50 | #define SATURN_INT_IRQ 1 |
| 51 | 51 | #define SATURN_INT_NMI 2 |
| 52 | 52 | |
| 53 | typedef struct _saturn_cpu_core saturn_cpu_core; | |
| 54 | struct _saturn_cpu_core | |
| 53 | struct saturn_cpu_core | |
| 55 | 54 | { |
| 56 | 55 | void (*out)(device_t*,int); |
| 57 | 56 | int (*in)(device_t*); |
| r17907 | r17908 | |
|---|---|---|
| 52 | 52 | /**************************************************************************** |
| 53 | 53 | * The SATURN registers. |
| 54 | 54 | ****************************************************************************/ |
| 55 | typedef struct _saturn_state saturn_state; | |
| 56 | struct _saturn_state | |
| 55 | struct saturn_state | |
| 57 | 56 | { |
| 58 | 57 | saturn_cpu_core *config; |
| 59 | 58 |
| r17907 | r17908 | |
|---|---|---|
| 43 | 43 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 44 | 44 | |
| 45 | 45 | /* Konami Registers */ |
| 46 | typedef struct _konami_state konami_state; | |
| 47 | struct _konami_state | |
| 46 | struct konami_state | |
| 48 | 47 | { |
| 49 | 48 | PAIR pc; /* Program counter */ |
| 50 | 49 | PAIR ppc; /* Previous program counter */ |
| r17907 | r17908 | |
|---|---|---|
| 27 | 27 | MCFG_DEVICE_CONFIG( _intrf ) |
| 28 | 28 | |
| 29 | 29 | |
| 30 | typedef struct _huc6260_interface huc6260_interface; | |
| 31 | struct _huc6260_interface | |
| 30 | struct huc6260_interface | |
| 32 | 31 | { |
| 33 | 32 | /* Tag for the screen we will be drawing on */ |
| 34 | 33 | const char *screen_tag; |
| r17907 | r17908 | |
|---|---|---|
| 29 | 29 | |
| 30 | 30 | #define FIFO_LENGTH 256 |
| 31 | 31 | |
| 32 | typedef struct _hd63484_state hd63484_state; | |
| 33 | struct _hd63484_state | |
| 32 | struct hd63484_state | |
| 34 | 33 | { |
| 35 | 34 | UINT16 * ram; |
| 36 | 35 | UINT16 reg[256/2]; |
| r17907 | r17908 | |
|---|---|---|
| 37 | 37 | |
| 38 | 38 | #define HD63484_RAM_SIZE 0x100000 |
| 39 | 39 | |
| 40 | typedef struct _hd63484_interface hd63484_interface; | |
| 41 | struct _hd63484_interface | |
| 40 | struct hd63484_interface | |
| 42 | 41 | { |
| 43 | 42 | int skattva_hack; |
| 44 | 43 | }; |
| r17907 | r17908 | |
|---|---|---|
| 1394 | 1394 | *************************************/ |
| 1395 | 1395 | |
| 1396 | 1396 | typedef struct _voodoo_state voodoo_state; |
| 1397 | typedef struct | |
| 1397 | typedef struct | |
| 1398 | 1398 | |
| 1399 | 1399 | |
| 1400 | typedef struct _rgba rgba; | |
| 1401 | struct _rgba | |
| 1400 | struct rgba | |
| 1402 | 1401 | { |
| 1403 | 1402 | #ifdef LSB_FIRST |
| 1404 | 1403 | UINT8 b, g, r, a; |
| r17907 | r17908 | |
| 1421 | 1420 | typedef voodoo_reg rgb_union; |
| 1422 | 1421 | |
| 1423 | 1422 | |
| 1424 | typedef struct _voodoo_stats voodoo_stats; | |
| 1425 | struct _voodoo_stats | |
| 1423 | struct voodoo_stats | |
| 1426 | 1424 | { |
| 1427 | 1425 | UINT8 lastkey; /* last key state */ |
| 1428 | 1426 | UINT8 display; /* display stats? */ |
| r17907 | r17908 | |
| 1448 | 1446 | |
| 1449 | 1447 | |
| 1450 | 1448 | /* note that this structure is an even 64 bytes long */ |
| 1451 | typedef struct _stats_block stats_block; | |
| 1452 | struct _stats_block | |
| 1449 | struct stats_block | |
| 1453 | 1450 | { |
| 1454 | 1451 | INT32 pixels_in; /* pixels in statistic */ |
| 1455 | 1452 | INT32 pixels_out; /* pixels out statistic */ |
| r17907 | r17908 | |
| 1462 | 1459 | }; |
| 1463 | 1460 | |
| 1464 | 1461 | |
| 1465 | typedef struct _fifo_state fifo_state; | |
| 1466 | struct _fifo_state | |
| 1462 | struct fifo_state | |
| 1467 | 1463 | { |
| 1468 | 1464 | UINT32 * base; /* base of the FIFO */ |
| 1469 | 1465 | INT32 size; /* size of the FIFO */ |
| r17907 | r17908 | |
| 1472 | 1468 | }; |
| 1473 | 1469 | |
| 1474 | 1470 | |
| 1475 | typedef struct _cmdfifo_info cmdfifo_info; | |
| 1476 | struct _cmdfifo_info | |
| 1471 | struct cmdfifo_info | |
| 1477 | 1472 | { |
| 1478 | 1473 | UINT8 enable; /* enabled? */ |
| 1479 | 1474 | UINT8 count_holes; /* count holes? */ |
| r17907 | r17908 | |
| 1487 | 1482 | }; |
| 1488 | 1483 | |
| 1489 | 1484 | |
| 1490 | typedef struct _pci_state pci_state; | |
| 1491 | struct _pci_state | |
| 1485 | struct pci_state | |
| 1492 | 1486 | { |
| 1493 | 1487 | fifo_state fifo; /* PCI FIFO */ |
| 1494 | 1488 | UINT32 init_enable; /* initEnable value */ |
| r17907 | r17908 | |
| 1501 | 1495 | }; |
| 1502 | 1496 | |
| 1503 | 1497 | |
| 1504 | typedef struct _ncc_table ncc_table; | |
| 1505 | struct _ncc_table | |
| 1498 | struct ncc_table | |
| 1506 | 1499 | { |
| 1507 | 1500 | UINT8 dirty; /* is the texel lookup dirty? */ |
| 1508 | 1501 | voodoo_reg * reg; /* pointer to our registers */ |
| r17907 | r17908 | |
| 1515 | 1508 | }; |
| 1516 | 1509 | |
| 1517 | 1510 | |
| 1518 | typedef struct _tmu_state tmu_state; | |
| 1519 | struct _tmu_state | |
| 1511 | struct tmu_state | |
| 1520 | 1512 | { |
| 1521 | 1513 | UINT8 * ram; /* pointer to our RAM */ |
| 1522 | 1514 | UINT32 mask; /* mask to apply to pointers */ |
| r17907 | r17908 | |
| 1556 | 1548 | }; |
| 1557 | 1549 | |
| 1558 | 1550 | |
| 1559 | typedef struct _tmu_shared_state tmu_shared_state; | |
| 1560 | struct _tmu_shared_state | |
| 1551 | struct tmu_shared_state | |
| 1561 | 1552 | { |
| 1562 | 1553 | rgb_t rgb332[256]; /* RGB 3-3-2 lookup table */ |
| 1563 | 1554 | rgb_t alpha8[256]; /* alpha 8-bit lookup table */ |
| r17907 | r17908 | |
| 1570 | 1561 | }; |
| 1571 | 1562 | |
| 1572 | 1563 | |
| 1573 | typedef struct _setup_vertex setup_vertex; | |
| 1574 | struct _setup_vertex | |
| 1564 | struct setup_vertex | |
| 1575 | 1565 | { |
| 1576 | 1566 | float x, y; /* X, Y coordinates */ |
| 1577 | 1567 | float a, r, g, b; /* A, R, G, B values */ |
| r17907 | r17908 | |
| 1581 | 1571 | }; |
| 1582 | 1572 | |
| 1583 | 1573 | |
| 1584 | typedef struct _fbi_state fbi_state; | |
| 1585 | struct _fbi_state | |
| 1574 | struct fbi_state | |
| 1586 | 1575 | { |
| 1587 | 1576 | UINT8 * ram; /* pointer to frame buffer RAM */ |
| 1588 | 1577 | UINT32 mask; /* mask to apply to pointers */ |
| r17907 | r17908 | |
| 1650 | 1639 | }; |
| 1651 | 1640 | |
| 1652 | 1641 | |
| 1653 | typedef struct _dac_state dac_state; | |
| 1654 | struct _dac_state | |
| 1642 | struct dac_state | |
| 1655 | 1643 | { |
| 1656 | 1644 | UINT8 reg[8]; /* 8 registers */ |
| 1657 | 1645 | UINT8 read_result; /* pending read result */ |
| 1658 | 1646 | }; |
| 1659 | 1647 | |
| 1660 | 1648 | |
| 1661 | typedef struct _raster_info raster_info; | |
| 1662 | struct _raster_info | |
| 1649 | struct raster_info | |
| 1663 | 1650 | { |
| 1664 | | |
| 1651 | | |
| 1665 | 1652 | poly_draw_scanline_func callback; /* callback pointer */ |
| 1666 | 1653 | UINT8 is_generic; /* TRUE if this is one of the generic rasterizers */ |
| 1667 | 1654 | UINT8 display; /* display index */ |
| r17907 | r17908 | |
| 1676 | 1663 | }; |
| 1677 | 1664 | |
| 1678 | 1665 | |
| 1679 | struct | |
| 1666 | struct | |
| 1680 | 1667 | { |
| 1681 | 1668 | voodoo_state * state; /* pointer back to the voodoo state */ |
| 1682 | 1669 | raster_info * info; /* pointer to rasterizer information */ |
| r17907 | r17908 | |
| 1712 | 1699 | }; |
| 1713 | 1700 | |
| 1714 | 1701 | |
| 1715 | typedef struct _banshee_info banshee_info; | |
| 1716 | struct _banshee_info | |
| 1702 | struct banshee_info | |
| 1717 | 1703 | { |
| 1718 | 1704 | UINT32 io[0x40]; /* I/O registers */ |
| 1719 | 1705 | UINT32 agp[0x80]; /* AGP registers */ |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | #define TEST_REGISTER 0x0e |
| 23 | 23 | #define RESET_STATE 0x0f |
| 24 | 24 | |
| 25 | typedef struct _tlc34076_state tlc34076_state; | |
| 26 | struct _tlc34076_state | |
| 25 | struct tlc34076_state | |
| 27 | 26 | { |
| 28 | 27 | UINT8 local_paletteram[0x300]; |
| 29 | 28 | UINT8 regs[0x10]; |
| r17907 | r17908 | |
|---|---|---|
| 68 | 68 | |
| 69 | 69 | |
| 70 | 70 | /* interface */ |
| 71 | typedef struct _mc6845_interface mc6845_interface; | |
| 72 | struct _mc6845_interface | |
| 71 | struct mc6845_interface | |
| 73 | 72 | { |
| 74 | 73 | const char *m_screen_tag; /* screen we are acting on */ |
| 75 | 74 | int m_hpixels_per_column; /* number of pixels per video memory address */ |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | TYPE DEFINITIONS |
| 18 | 18 | ***************************************************************************/ |
| 19 | 19 | |
| 20 | typedef struct _tlc34076_config tlc34076_config; | |
| 21 | struct _tlc34076_config | |
| 20 | struct tlc34076_config | |
| 22 | 21 | { |
| 23 | 22 | int res_sel; |
| 24 | 23 | }; |
| r17907 | r17908 | |
|---|---|---|
| 76 | 76 | extern const device_type TMS9129; |
| 77 | 77 | |
| 78 | 78 | |
| 79 | typedef struct _tms9928a_interface tms9928a_interface; | |
| 80 | struct _tms9928a_interface | |
| 79 | struct tms9928a_interface | |
| 81 | 80 | { |
| 82 | 81 | const char *m_screen_tag; |
| 83 | 82 | int m_vram_size; /* 4K, 8K, or 16K. This should be replaced by fetching data from an address space? */ |
| r17907 | r17908 | |
|---|---|---|
| 94 | 94 | |
| 95 | 95 | /* Structures */ |
| 96 | 96 | |
| 97 | typedef struct _res_net_channel_info res_net_channel_info; | |
| 98 | struct _res_net_channel_info { | |
| 97 | struct res_net_channel_info { | |
| 99 | 98 | // per channel options |
| 100 | 99 | UINT32 options; |
| 101 | 100 | // Pullup resistor value in Ohms |
| r17907 | r17908 | |
| 121 | 120 | double vBias; |
| 122 | 121 | }; |
| 123 | 122 | |
| 124 | typedef struct _res_net_info res_net_info; | |
| 125 | struct _res_net_info { | |
| 123 | struct res_net_info { | |
| 126 | 124 | // global options |
| 127 | 125 | UINT32 options; |
| 128 | 126 | // The three color channels |
| r17907 | r17908 | |
| 144 | 142 | |
| 145 | 143 | #define RES_NET_MAX_COMP 3 |
| 146 | 144 | |
| 147 | typedef struct _res_net_decode_info res_net_decode_info; | |
| 148 | struct _res_net_decode_info { | |
| 145 | struct res_net_decode_info { | |
| 149 | 146 | int numcomp; |
| 150 | 147 | int start; |
| 151 | 148 | int end; |
| r17907 | r17908 | |
|---|---|---|
| 71 | 71 | typedef void (*voodoo_stall_func)(device_t *device, int state); |
| 72 | 72 | |
| 73 | 73 | |
| 74 | typedef struct _voodoo_config voodoo_config; | |
| 75 | struct _voodoo_config | |
| 74 | struct voodoo_config | |
| 76 | 75 | { |
| 77 | 76 | UINT8 fbmem; |
| 78 | 77 | UINT8 tmumem0; |
| r17907 | r17908 | |
|---|---|---|
| 57 | 57 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 58 | 58 | |
| 59 | 59 | |
| 60 | typedef struct _i8275_t i8275_t; | |
| 61 | ||
| 62 | struct _i8275_t | |
| 60 | struct i8275_t | |
| 63 | 61 | { |
| 64 | 62 | devcb_resolved_write_line out_drq_func; |
| 65 | 63 | devcb_resolved_write_line out_irq_func; |
| r17907 | r17908 | |
|---|---|---|
| 96 | 96 | * |
| 97 | 97 | *************************************/ |
| 98 | 98 | |
| 99 | typedef struct _s2636_state s2636_state; | |
| 100 | struct _s2636_state | |
| 99 | struct s2636_state | |
| 101 | 100 | { |
| 102 | 101 | UINT8 *work_ram; |
| 103 | 102 | int work_ram_size; |
| r17907 | r17908 | |
|---|---|---|
| 47 | 47 | #define I8275_DISPLAY_PIXELS(name) void name(device_t *device, int x, int y, UINT8 linecount, UINT8 charcode, UINT8 lineattr, UINT8 lten, UINT8 rvv, UINT8 vsp, UINT8 gpa, UINT8 hlgt) |
| 48 | 48 | |
| 49 | 49 | /* interface */ |
| 50 | typedef struct _i8275_interface i8275_interface; | |
| 51 | struct _i8275_interface | |
| 50 | struct i8275_interface | |
| 52 | 51 | { |
| 53 | 52 | const char *screen_tag; /* screen we are acting on */ |
| 54 | 53 | int width; /* char width in pixels */ |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | * |
| 20 | 20 | *************************************/ |
| 21 | 21 | |
| 22 | typedef struct _s2636_interface s2636_interface; | |
| 23 | struct _s2636_interface | |
| 22 | struct s2636_interface | |
| 24 | 23 | { |
| 25 | 24 | const char *screen; |
| 26 | 25 | int work_ram_size; |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | MCFG_DEVICE_CONFIG( _intrf ) |
| 17 | 17 | |
| 18 | 18 | |
| 19 | typedef struct _huc6202_interface huc6202_interface; | |
| 20 | struct _huc6202_interface | |
| 19 | struct huc6202_interface | |
| 21 | 20 | { |
| 22 | 21 | /* First gfx input device */ |
| 23 | 22 | devcb_read16 device_0_next_pixel; |
| r17907 | r17908 | |
|---|---|---|
| 30 | 30 | #define CURSOR_ROW_ADDRESS(t) ((t)->reg[8] & 0x3f) |
| 31 | 31 | |
| 32 | 32 | |
| 33 | typedef struct _tms9927_state tms9927_state; | |
| 34 | struct _tms9927_state | |
| 33 | struct tms9927_state | |
| 35 | 34 | { |
| 36 | 35 | /* driver-controlled state */ |
| 37 | 36 | const tms9927_interface *intf; |
| r17907 | r17908 | |
|---|---|---|
| 23 | 23 | MCFG_DEVICE_CONFIG( _intrf ) |
| 24 | 24 | |
| 25 | 25 | |
| 26 | typedef struct _huc6261_interface huc6261_interface; | |
| 27 | struct _huc6261_interface | |
| 26 | struct huc6261_interface | |
| 28 | 27 | { |
| 29 | 28 | /* Tag for the screen we will be drawing on */ |
| 30 | 29 | const char *screen_tag; |
| r17907 | r17908 | |
|---|---|---|
| 73 | 73 | |
| 74 | 74 | |
| 75 | 75 | /* interface */ |
| 76 | typedef struct _tms9927_interface tms9927_interface; | |
| 77 | struct _tms9927_interface | |
| 76 | struct tms9927_interface | |
| 78 | 77 | { |
| 79 | 78 | const char *screen_tag; /* screen we are acting on */ |
| 80 | 79 | int hpixels_per_column; /* number of pixels per video memory address */ |
| r17907 | r17908 | |
|---|---|---|
| 44 | 44 | #define DEBUG_COORDS ( 10 ) |
| 45 | 45 | #define DEBUG_MAX ( 512 ) |
| 46 | 46 | |
| 47 | typedef struct _psx_gpu_debug psx_gpu_debug; | |
| 48 | struct _psx_gpu_debug | |
| 47 | struct psx_gpu_debug | |
| 49 | 48 | { |
| 50 | 49 | bitmap_ind16 *mesh; |
| 51 | 50 | int b_clear; |
| r17907 | r17908 | |
|---|---|---|
| 45 | 45 | |
| 46 | 46 | |
| 47 | 47 | /* tri_extent describes start/end points for a scanline */ |
| 48 | typedef struct _tri_extent tri_extent; | |
| 49 | struct _tri_extent | |
| 48 | struct tri_extent | |
| 50 | 49 | { |
| 51 | 50 | INT16 startx; /* starting X coordinate (inclusive) */ |
| 52 | 51 | INT16 stopx; /* ending X coordinate (exclusive) */ |
| r17907 | r17908 | |
| 54 | 53 | |
| 55 | 54 | |
| 56 | 55 | /* single set of polygon per-parameter data */ |
| 57 | typedef struct _poly_param poly_param; | |
| 58 | struct _poly_param | |
| 56 | struct poly_param | |
| 59 | 57 | { |
| 60 | 58 | float start; /* parameter value at starting X,Y */ |
| 61 | 59 | float dpdx; /* dp/dx relative to starting X */ |
| r17907 | r17908 | |
| 64 | 62 | |
| 65 | 63 | |
| 66 | 64 | /* poly edge is used internally for quad rendering */ |
| 67 | typedef struct _poly_edge poly_edge; | |
| 68 | struct _poly_edge | |
| 65 | struct poly_edge | |
| 69 | 66 | { |
| 70 | 67 | poly_edge * next; /* next edge in sequence */ |
| 71 | 68 | int index; /* index of this edge */ |
| r17907 | r17908 | |
| 77 | 74 | |
| 78 | 75 | |
| 79 | 76 | /* poly section is used internally for quad rendering */ |
| 80 | typedef struct _poly_section poly_section; | |
| 81 | struct _poly_section | |
| 77 | struct poly_section | |
| 82 | 78 | { |
| 83 | 79 | const poly_edge * ledge; /* pointer to left edge */ |
| 84 | 80 | const poly_edge * redge; /* pointer to right edge */ |
| r17907 | r17908 | |
| 87 | 83 | |
| 88 | 84 | |
| 89 | 85 | /* work_unit_shared is a common set of data shared between tris and quads */ |
| 90 | typedef struct _work_unit_shared work_unit_shared; | |
| 91 | struct _work_unit_shared | |
| 86 | struct work_unit_shared | |
| 92 | 87 | { |
| 93 | 88 | polygon_info * polygon; /* pointer to polygon */ |
| 94 | 89 | volatile UINT32 count_next; /* number of scanlines and index of next item to process */ |
| r17907 | r17908 | |
| 101 | 96 | |
| 102 | 97 | |
| 103 | 98 | /* tri_work_unit is a triangle-specific work-unit */ |
| 104 | typedef struct _tri_work_unit tri_work_unit; | |
| 105 | struct _tri_work_unit | |
| 99 | struct tri_work_unit | |
| 106 | 100 | { |
| 107 | 101 | work_unit_shared shared; /* shared data */ |
| 108 | 102 | tri_extent extent[SCANLINES_PER_BUCKET]; /* array of scanline extents */ |
| r17907 | r17908 | |
| 110 | 104 | |
| 111 | 105 | |
| 112 | 106 | /* quad_work_unit is a quad-specific work-unit */ |
| 113 | typedef struct _quad_work_unit quad_work_unit; | |
| 114 | struct _quad_work_unit | |
| 107 | struct quad_work_unit | |
| 115 | 108 | { |
| 116 | 109 | work_unit_shared shared; /* shared data */ |
| 117 | 110 | poly_extent extent[SCANLINES_PER_BUCKET]; /* array of scanline extents */ |
| r17907 | r17908 | |
|---|---|---|
| 59 | 59 | |
| 60 | 60 | |
| 61 | 61 | /* input vertex data */ |
| 62 | typedef struct _poly_vertex poly_vertex; | |
| 63 | struct _poly_vertex | |
| 62 | struct poly_vertex | |
| 64 | 63 | { |
| 65 | 64 | float x; /* X coordinate */ |
| 66 | 65 | float y; /* Y coordinate */ |
| r17907 | r17908 | |
| 69 | 68 | |
| 70 | 69 | |
| 71 | 70 | /* poly_param_extent describes information for a single parameter in an extent */ |
| 72 | typedef struct _poly_param_extent poly_param_extent; | |
| 73 | struct _poly_param_extent | |
| 71 | struct poly_param_extent | |
| 74 | 72 | { |
| 75 | 73 | float start; /* parameter value at starting X,Y */ |
| 76 | 74 | float dpdx; /* dp/dx relative to starting X */ |
| r17907 | r17908 | |
| 78 | 76 | |
| 79 | 77 | |
| 80 | 78 | /* poly_extent describes start/end points for a scanline, along with per-scanline parameters */ |
| 81 | typedef struct _poly_extent poly_extent; | |
| 82 | struct _poly_extent | |
| 79 | struct poly_extent | |
| 83 | 80 | { |
| 84 | 81 | INT16 startx; /* starting X coordinate (inclusive) */ |
| 85 | 82 | INT16 stopx; /* ending X coordinate (exclusive) */ |
| r17907 | r17908 | |
|---|---|---|
| 66 | 66 | #define VECTOR_INT_SCALE (255.0f * 1.5f) |
| 67 | 67 | |
| 68 | 68 | |
| 69 | typedef struct _vector_texture vector_texture; | |
| 70 | struct _vector_texture | |
| 69 | struct vector_texture | |
| 71 | 70 | { |
| 72 | 71 | render_texture * texture; |
| 73 | 72 | bitmap_argb32 * bitmap; |
| r17907 | r17908 | |
|---|---|---|
| 33 | 33 | MCFG_DEVICE_CONFIG( _intrf ) |
| 34 | 34 | |
| 35 | 35 | |
| 36 | typedef struct _huc6270_interface huc6270_interface; | |
| 37 | struct _huc6270_interface | |
| 36 | struct huc6270_interface | |
| 38 | 37 | { |
| 39 | 38 | /* Size of Video ram (mandatory) */ |
| 40 | 39 | UINT32 vram_size; |
| r17907 | r17908 | |
|---|---|---|
| 52 | 52 | TYPE DEFINITIONS |
| 53 | 53 | ***************************************************************************/ |
| 54 | 54 | |
| 55 | typedef struct _sega315_5124_interface sega315_5124_interface; | |
| 56 | struct _sega315_5124_interface | |
| 55 | struct sega315_5124_interface | |
| 57 | 56 | { |
| 58 | 57 | bool m_is_pal; /* false = NTSC, true = PAL */ |
| 59 | 58 | const char *m_screen_tag; |
| r17907 | r17908 | |
|---|---|---|
| 18 | 18 | TYPE DEFINITIONS |
| 19 | 19 | ***************************************************************************/ |
| 20 | 20 | |
| 21 | typedef struct _hash_info hash_info; | |
| 22 | struct _hash_info | |
| 21 | struct hash_info | |
| 23 | 22 | { |
| 24 | 23 | hash_collection *hashes; |
| 25 | 24 | const char *extrainfo; |
| r17907 | r17908 | |
|---|---|---|
| 26 | 26 | TYPE DEFINITIONS |
| 27 | 27 | ***************************************************************************/ |
| 28 | 28 | |
| 29 | typedef struct _output_notify output_notify; | |
| 30 | struct _output_notify | |
| 29 | struct output_notify | |
| 31 | 30 | { |
| 32 | 31 | output_notify * next; /* link to next item */ |
| 33 | 32 | output_notifier_func notifier; /* callback to call */ |
| r17907 | r17908 | |
| 35 | 34 | }; |
| 36 | 35 | |
| 37 | 36 | |
| 38 | typedef struct _output_item output_item; | |
| 39 | struct _output_item | |
| 37 | struct output_item | |
| 40 | 38 | { |
| 41 | 39 | output_item * next; /* next item in list */ |
| 42 | 40 | const char * name; /* string name of the item */ |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | 8 | |
| 9 | typedef struct _ymf262_interface ymf262_interface; | |
| 10 | struct _ymf262_interface | |
| 9 | struct ymf262_interface | |
| 11 | 10 | { |
| 12 | 11 | void (*handler)(device_t *device, int irq); |
| 13 | 12 | }; |
| r17907 | r17908 | |
|---|---|---|
| 37 | 37 | * processor, as each is shared. |
| 38 | 38 | */ |
| 39 | 39 | |
| 40 | typedef struct _nes_interface nes_interface; | |
| 41 | struct _nes_interface | |
| 40 | struct nes_interface | |
| 42 | 41 | { |
| 43 | 42 | const char *cpu_tag; /* CPU tag */ |
| 44 | 43 | }; |
| r17907 | r17908 | |
|---|---|---|
| 72 | 72 | }; |
| 73 | 73 | |
| 74 | 74 | |
| 75 | typedef struct _sp0256_state sp0256_state; | |
| 76 | struct _sp0256_state | |
| 75 | struct sp0256_state | |
| 77 | 76 | { |
| 78 | 77 | device_t *device; |
| 79 | 78 | sound_stream *stream; /* MAME core sound stream */ |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | #define SAMPLE_GAIN 10000.0 |
| 22 | 22 | |
| 23 | 23 | |
| 24 | typedef struct _hc55516_state hc55516_state; | |
| 25 | struct _hc55516_state | |
| 24 | struct hc55516_state | |
| 26 | 25 | { |
| 27 | 26 | sound_stream *channel; |
| 28 | 27 | int clock; /* 0 = software driven, non-0 = oscillator */ |
| r17907 | r17908 | |
|---|---|---|
| 52 | 52 | #include "devlegcy.h" |
| 53 | 53 | |
| 54 | 54 | |
| 55 | typedef struct _sp0256_interface sp0256_interface; | |
| 56 | struct _sp0256_interface | |
| 55 | struct sp0256_interface | |
| 57 | 56 | { |
| 58 | 57 | devcb_write_line lrq_callback; |
| 59 | 58 | devcb_write_line sby_callback; |
| r17907 | r17908 | |
|---|---|---|
| 45 | 45 | UINT32 play; |
| 46 | 46 | }; |
| 47 | 47 | |
| 48 | typedef struct _ga20_state ga20_state; | |
| 49 | struct _ga20_state | |
| 48 | struct ga20_state | |
| 50 | 49 | { |
| 51 | 50 | UINT8 *rom; |
| 52 | 51 | INT32 rom_size; |
| r17907 | r17908 | |
|---|---|---|
| 84 | 84 | #define CTL_STATE_OUTPUT (1) |
| 85 | 85 | #define CTL_STATE_NEXT_OUTPUT (2) |
| 86 | 86 | |
| 87 | typedef struct _tms5110_state tms5110_state; | |
| 88 | struct _tms5110_state | |
| 87 | struct tms5110_state | |
| 89 | 88 | { |
| 90 | 89 | /* coefficient tables */ |
| 91 | 90 | int variant; /* Variant of the 5110 - see tms5110.h */ |
| r17907 | r17908 | |
| 163 | 162 | UINT8 romclk_hack_state; |
| 164 | 163 | }; |
| 165 | 164 | |
| 166 | typedef struct _tmsprom_state tmsprom_state; | |
| 167 | struct _tmsprom_state | |
| 165 | struct tmsprom_state | |
| 168 | 166 | { |
| 169 | 167 | /* Rom interface */ |
| 170 | 168 | UINT32 address; |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | #include "sound/2612intf.h" |
| 17 | 17 | |
| 18 | 18 | |
| 19 | typedef struct _ym2612_state ym2612_state; | |
| 20 | struct _ym2612_state | |
| 19 | struct ym2612_state | |
| 21 | 20 | { |
| 22 | 21 | sound_stream * stream; |
| 23 | 22 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | /* usually 640000 for 8000 Hz sample rate or */ |
| 22 | 22 | /* usually 800000 for 10000 Hz sample rate. */ |
| 23 | 23 | |
| 24 | typedef struct _tms5110_interface tms5110_interface; | |
| 25 | struct _tms5110_interface | |
| 24 | struct tms5110_interface | |
| 26 | 25 | { |
| 27 | 26 | /* legacy interface */ |
| 28 | 27 | int (*M0_callback)(device_t *device); /* function to be called when chip requests another bit */ |
| r17907 | r17908 | |
| 169 | 168 | |
| 170 | 169 | /* PROM controlled TMS5110 interface */ |
| 171 | 170 | |
| 172 | typedef struct _tmsprom_interface tmsprom_interface; | |
| 173 | struct _tmsprom_interface | |
| 171 | struct tmsprom_interface | |
| 174 | 172 | { |
| 175 | 173 | const char *prom_region; /* prom memory region - sound region is automatically assigned */ |
| 176 | 174 | UINT32 rom_size; /* individual rom_size */ |
| r17907 | r17908 | |
|---|---|---|
| 7 | 7 | |
| 8 | 8 | void ym2612_update_request(void *param); |
| 9 | 9 | |
| 10 | typedef struct _ym2612_interface ym2612_interface; | |
| 11 | struct _ym2612_interface | |
| 10 | struct ym2612_interface | |
| 12 | 11 | { |
| 13 | 12 | void (*handler)(device_t *device, int irq); |
| 14 | 13 | }; |
| r17907 | r17908 | |
| 55 | 54 | |
| 56 | 55 | |
| 57 | 56 | |
| 58 | typedef struct _ym3438_interface ym3438_interface; | |
| 59 | struct _ym3438_interface | |
| 57 | struct ym3438_interface | |
| 60 | 58 | { |
| 61 | 59 | void (*handler)(device_t *device, int irq); |
| 62 | 60 | }; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | #include "sound/fmopl.h" |
| 23 | 23 | |
| 24 | 24 | |
| 25 | typedef struct _ym3526_state ym3526_state; | |
| 26 | struct _ym3526_state | |
| 25 | struct ym3526_state | |
| 27 | 26 | { |
| 28 | 27 | sound_stream * stream; |
| 29 | 28 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 39 | 39 | signed char waveram[32]; |
| 40 | 40 | } k051649_sound_channel; |
| 41 | 41 | |
| 42 | typedef struct _k051649_state k051649_state; | |
| 43 | struct _k051649_state | |
| 42 | struct k051649_state | |
| 44 | 43 | { |
| 45 | 44 | k051649_sound_channel channel_list[5]; |
| 46 | 45 |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _ym3526_interface ym3526_interface; | |
| 9 | struct _ym3526_interface | |
| 8 | struct ym3526_interface | |
| 10 | 9 | { |
| 11 | 10 | devcb_write_line out_int_func; |
| 12 | 11 | }; |
| r17907 | r17908 | |
|---|---|---|
| 86 | 86 | long sample_loop; |
| 87 | 87 | } VOICE; |
| 88 | 88 | |
| 89 | typedef struct _c140_state c140_state; | |
| 90 | struct _c140_state | |
| 89 | struct c140_state | |
| 91 | 90 | { |
| 92 | 91 | int sample_rate; |
| 93 | 92 | sound_stream *stream; |
| r17907 | r17908 | |
|---|---|---|
| 52 | 52 | |
| 53 | 53 | */ |
| 54 | 54 | |
| 55 | typedef struct _msm5205_state msm5205_state; | |
| 56 | struct _msm5205_state | |
| 55 | struct msm5205_state | |
| 57 | 56 | { |
| 58 | 57 | const msm5205_interface *intf; |
| 59 | 58 | device_t *device; |
| r17907 | r17908 | |
|---|---|---|
| 70 | 70 | INT32 offset; /* current offset counter */ |
| 71 | 71 | }; |
| 72 | 72 | |
| 73 | typedef struct _qsound_state qsound_state; | |
| 74 | struct _qsound_state | |
| 73 | struct qsound_state | |
| 75 | 74 | { |
| 76 | 75 | /* Private variables */ |
| 77 | 76 | sound_stream * stream; /* Audio stream */ |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | C140_TYPE_ASIC219 |
| 20 | 20 | }; |
| 21 | 21 | |
| 22 | typedef struct _c140_interface c140_interface; | |
| 23 | struct _c140_interface { | |
| 22 | struct c140_interface { | |
| 24 | 23 | int banking_type; |
| 25 | 24 | }; |
| 26 | 25 |
| r17907 | r17908 | |
|---|---|---|
| 24 | 24 | #define MSM6585_S80 (6+8) /* prescaler 1/80 (8KHz), data 4bit */ |
| 25 | 25 | #define MSM6585_S20 (7+8) /* prescaler 1/20(32KHz), data 4bit */ |
| 26 | 26 | |
| 27 | typedef struct _msm5205_interface msm5205_interface; | |
| 28 | struct _msm5205_interface | |
| 27 | struct msm5205_interface | |
| 29 | 28 | { |
| 30 | 29 | void (*vclk_callback)(device_t *); /* VCLK callback */ |
| 31 | 30 | int select; /* prescaler / bit width selector */ |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | #include "sound/fmopl.h" |
| 23 | 23 | |
| 24 | 24 | |
| 25 | typedef struct _ym3812_state ym3812_state; | |
| 26 | struct _ym3812_state | |
| 25 | struct ym3812_state | |
| 27 | 26 | { |
| 28 | 27 | sound_stream * stream; |
| 29 | 28 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | #define CLOCK_SHIFT 8 |
| 16 | 16 | |
| 17 | 17 | |
| 18 | typedef struct _snkwave_state snkwave_state; | |
| 19 | struct _snkwave_state | |
| 18 | struct snkwave_state | |
| 20 | 19 | { |
| 21 | 20 | /* global sound parameters */ |
| 22 | 21 | sound_stream * stream; |
| r17907 | r17908 | |
|---|---|---|
| 18 | 18 | #include "emu.h" |
| 19 | 19 | #include "rf5c400.h" |
| 20 | 20 | |
| 21 | typedef struct _rf5c400_channel rf5c400_channel; | |
| 22 | struct _rf5c400_channel | |
| 21 | struct rf5c400_channel | |
| 23 | 22 | { |
| 24 | 23 | UINT16 startH; |
| 25 | 24 | UINT16 startL; |
| r17907 | r17908 | |
| 47 | 46 | double env_scale; |
| 48 | 47 | }; |
| 49 | 48 | |
| 50 | typedef struct _rf5c400_state rf5c400_state; | |
| 51 | struct _rf5c400_state | |
| 49 | struct rf5c400_state | |
| 52 | 50 | { |
| 53 | 51 | INT16 *rom; |
| 54 | 52 | UINT32 rom_length; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _ym3812_interface ym3812_interface; | |
| 9 | struct _ym3812_interface | |
| 8 | struct ym3812_interface | |
| 10 | 9 | { |
| 11 | 10 | void (*handler)(device_t *device, int linestate); |
| 12 | 11 | }; |
| r17907 | r17908 | |
|---|---|---|
| 96 | 96 | }; |
| 97 | 97 | |
| 98 | 98 | /* this structure defines a SAA1099 chip */ |
| 99 | typedef struct _saa1099_state saa1099_state; | |
| 100 | struct _saa1099_state | |
| 99 | struct saa1099_state | |
| 101 | 100 | { |
| 102 | 101 | device_t *device; |
| 103 | 102 | sound_stream * stream; /* our stream */ |
| r17907 | r17908 | |
|---|---|---|
| 103 | 103 | |
| 104 | 104 | |
| 105 | 105 | /* this structure defines the parameters for a channel */ |
| 106 | typedef struct _cem3394_state cem3394_state; | |
| 107 | struct _cem3394_state | |
| 106 | struct cem3394_state | |
| 108 | 107 | { |
| 109 | 108 | sound_stream * stream; /* our stream */ |
| 110 | 109 | void (*external)(device_t *, int, short *);/* callback to generate external samples */ |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | |
| 11 | 11 | |
| 12 | 12 | /* interface */ |
| 13 | typedef struct _cem3394_interface cem3394_interface; | |
| 14 | struct _cem3394_interface | |
| 13 | struct cem3394_interface | |
| 15 | 14 | { |
| 16 | 15 | double vco_zero_freq; /* frequency at 0V for VCO */ |
| 17 | 16 | double filter_zero_freq; /* frequency at 0V for filter */ |
| r17907 | r17908 | |
|---|---|---|
| 74 | 74 | UINT8 irq_schedule; /* 1 if the IRQ state is updated by timer */ |
| 75 | 75 | }; |
| 76 | 76 | |
| 77 | typedef struct _ymz280b_state ymz280b_state; | |
| 78 | struct _ymz280b_state | |
| 77 | struct ymz280b_state | |
| 79 | 78 | { |
| 80 | 79 | sound_stream * stream; /* which stream are we using */ |
| 81 | 80 | UINT8 *region_base; /* pointer to the base of the region */ |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | #define NUM_CHANNELS (8) |
| 10 | 10 | |
| 11 | 11 | |
| 12 | typedef struct _pcm_channel pcm_channel; | |
| 13 | struct _pcm_channel | |
| 12 | struct pcm_channel | |
| 14 | 13 | { |
| 15 | 14 | UINT8 enable; |
| 16 | 15 | UINT8 env; |
| r17907 | r17908 | |
| 22 | 21 | }; |
| 23 | 22 | |
| 24 | 23 | |
| 25 | typedef struct _rf5c68_state rf5c68_state; | |
| 26 | struct _rf5c68_state | |
| 24 | struct rf5c68_state | |
| 27 | 25 | { |
| 28 | 26 | sound_stream * stream; |
| 29 | 27 | pcm_channel chan[NUM_CHANNELS]; |
| r17907 | r17908 | |
|---|---|---|
| 13 | 13 | #include "devlegcy.h" |
| 14 | 14 | |
| 15 | 15 | |
| 16 | typedef struct _ymz280b_interface ymz280b_interface; | |
| 17 | struct _ymz280b_interface | |
| 16 | struct ymz280b_interface | |
| 18 | 17 | { |
| 19 | 18 | void (*irq_callback)(device_t *device, int state); /* irq callback */ |
| 20 | 19 | devcb_read8 ext_read; /* external RAM read */ |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | READ8_DEVICE_HANDLER( rf5c68_mem_r ); |
| 17 | 17 | WRITE8_DEVICE_HANDLER( rf5c68_mem_w ); |
| 18 | 18 | |
| 19 | typedef struct _rf5c68_interface rf5c68_interface; | |
| 20 | struct _rf5c68_interface | |
| 19 | struct rf5c68_interface | |
| 21 | 20 | { |
| 22 | 21 | void (*sample_end_callback)(device_t* device, int channel); |
| 23 | 22 | }; |
| r17907 | r17908 | |
|---|---|---|
| 39 | 39 | const unsigned char *wave; |
| 40 | 40 | } k005289_sound_channel; |
| 41 | 41 | |
| 42 | typedef struct _k005289_state k005289_state; | |
| 43 | struct _k005289_state | |
| 42 | struct k005289_state | |
| 44 | 43 | { |
| 45 | 44 | k005289_sound_channel channel_list[2]; |
| 46 | 45 |
| r17907 | r17908 | |
|---|---|---|
| 122 | 122 | #define NOISEMODE (R->Register[6]&4)?1:0 |
| 123 | 123 | |
| 124 | 124 | |
| 125 | typedef struct _sn76496_state sn76496_state; | |
| 126 | struct _sn76496_state | |
| 125 | struct sn76496_state | |
| 127 | 126 | { |
| 128 | 127 | sound_stream * Channel; |
| 129 | 128 | INT32 VolTable[16]; /* volume table (for 4-bit to db conversion)*/ |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | |
| 9 | 9 | #include "devlegcy.h" |
| 10 | 10 | |
| 11 | typedef struct _aica_interface aica_interface; | |
| 12 | struct _aica_interface | |
| 11 | struct aica_interface | |
| 13 | 12 | { |
| 14 | 13 | int master; |
| 15 | 14 | int roffset; /* offset in the region */ |
| r17907 | r17908 | |
|---|---|---|
| 43 | 43 | #include "astrocde.h" |
| 44 | 44 | |
| 45 | 45 | |
| 46 | typedef struct _astrocade_state astrocade_state; | |
| 47 | struct _astrocade_state | |
| 46 | struct astrocade_state | |
| 48 | 47 | { |
| 49 | 48 | sound_stream *stream; /* sound stream */ |
| 50 | 49 |
| r17907 | r17908 | |
|---|---|---|
| 77 | 77 | unsigned char reserve[2]; |
| 78 | 78 | } X1_010_CHANNEL; |
| 79 | 79 | |
| 80 | typedef struct _x1_010_state x1_010_state; | |
| 81 | struct _x1_010_state | |
| 80 | struct x1_010_state | |
| 82 | 81 | { |
| 83 | 82 | /* Variables only used here */ |
| 84 | 83 | int rate; // Output sampling rate (Hz) |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | #include "emu.h" |
| 10 | 10 | #include "sound/k056800.h" |
| 11 | 11 | |
| 12 | typedef struct _k056800_state k056800_state; | |
| 13 | struct _k056800_state | |
| 12 | struct k056800_state | |
| 14 | 13 | { |
| 15 | 14 | UINT8 host_reg[8]; |
| 16 | 15 | UINT8 sound_reg[8]; |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | 8 | |
| 9 | typedef struct _x1_010_interface x1_010_interface; | |
| 10 | struct _x1_010_interface | |
| 9 | struct x1_010_interface | |
| 11 | 10 | { |
| 12 | 11 | int adr; /* address */ |
| 13 | 12 | }; |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | typedef void (*k056800_irq_cb)(running_machine &, int); |
| 18 | 18 | |
| 19 | 19 | |
| 20 | typedef struct _k056800_interface k056800_interface; | |
| 21 | struct _k056800_interface | |
| 20 | struct k056800_interface | |
| 22 | 21 | { |
| 23 | 22 | k056800_irq_cb irq_cb; |
| 24 | 23 | }; |
| r17907 | r17908 | |
|---|---|---|
| 167 | 167 | |
| 168 | 168 | *************************************************************/ |
| 169 | 169 | |
| 170 | typedef struct _upd7759_state upd7759_state; | |
| 171 | struct _upd7759_state | |
| 170 | struct upd7759_state | |
| 172 | 171 | { |
| 173 | 172 | device_t *device; |
| 174 | 173 | sound_stream *channel; /* stream channel for playback */ |
| r17907 | r17908 | |
|---|---|---|
| 28 | 28 | } voice; |
| 29 | 29 | |
| 30 | 30 | |
| 31 | typedef struct _namco_63701x namco_63701x; | |
| 32 | struct _namco_63701x | |
| 31 | struct namco_63701x | |
| 33 | 32 | { |
| 34 | 33 | voice voices[2]; |
| 35 | 34 | sound_stream * stream; /* channel assigned by the mixer */ |
| r17907 | r17908 | |
|---|---|---|
| 32 | 32 | */ |
| 33 | 33 | #define CLOCK_DIVIDER (7*6*8) |
| 34 | 34 | |
| 35 | typedef struct _sp0250_state sp0250_state; | |
| 36 | struct _sp0250_state | |
| 35 | struct sp0250_state | |
| 37 | 36 | { |
| 38 | 37 | INT16 amp; |
| 39 | 38 | UINT8 pitch; |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | |
| 16 | 16 | #define UPD7759_STANDARD_CLOCK XTAL_640kHz |
| 17 | 17 | |
| 18 | typedef struct _upd7759_interface upd7759_interface; | |
| 19 | struct _upd7759_interface | |
| 18 | struct upd7759_interface | |
| 20 | 19 | { |
| 21 | 20 | void (*drqcallback)(device_t *device, int param); /* drq callback (per chip, slave mode only) */ |
| 22 | 21 | }; |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | 8 | |
| 9 | typedef struct _ymf271_interface ymf271_interface; | |
| 10 | struct _ymf271_interface | |
| 9 | struct ymf271_interface | |
| 11 | 10 | { |
| 12 | 11 | devcb_read8 ext_read; /* external memory read */ |
| 13 | 12 | devcb_write8 ext_write; /* external memory write */ |
| r17907 | r17908 | |
|---|---|---|
| 84 | 84 | /* Internal oversampling factor (interm. samples vs stream samples) */ |
| 85 | 85 | static const int RATE_MULTIPLIER = 4; |
| 86 | 86 | |
| 87 | typedef struct _speaker_state speaker_state; | |
| 88 | struct _speaker_state | |
| 87 | struct speaker_state | |
| 89 | 88 | { |
| 90 | 89 | sound_stream *channel; |
| 91 | 90 | const INT16 *levels; |
| r17907 | r17908 | |
|---|---|---|
| 7 | 7 | #include "cdrom.h" |
| 8 | 8 | #include "cdda.h" |
| 9 | 9 | |
| 10 | typedef struct _cdda_info cdda_info; | |
| 11 | struct _cdda_info | |
| 10 | struct cdda_info | |
| 12 | 11 | { |
| 13 | 12 | sound_stream * stream; |
| 14 | 13 | cdrom_file * disc; |
| r17907 | r17908 | |
|---|---|---|
| 151 | 151 | * |
| 152 | 152 | *************************************/ |
| 153 | 153 | |
| 154 | typedef struct _ay_ym_param ay_ym_param; | |
| 155 | struct _ay_ym_param | |
| 154 | struct ay_ym_param | |
| 156 | 155 | { |
| 157 | 156 | double r_up; |
| 158 | 157 | double r_down; |
| r17907 | r17908 | |
| 160 | 159 | double res[32]; |
| 161 | 160 | }; |
| 162 | 161 | |
| 163 | typedef struct _ay8910_context ay8910_context; | |
| 164 | struct _ay8910_context | |
| 162 | struct ay8910_context | |
| 165 | 163 | { |
| 166 | 164 | device_t *device; |
| 167 | 165 | int streams; |
| r17907 | r17908 | |
|---|---|---|
| 112 | 112 | |
| 113 | 113 | // ======================> pokey_interface |
| 114 | 114 | |
| 115 | typedef struct _pokey_interface pokey_interface; | |
| 116 | struct _pokey_interface | |
| 115 | struct pokey_interface | |
| 117 | 116 | { |
| 118 | 117 | devcb_read8 m_pot_r_cb[8]; |
| 119 | 118 | devcb_read8 m_allpot_r_cb; |
| r17907 | r17908 | |
|---|---|---|
| 11 | 11 | /* the frequencies are later adjusted by "* clock / FSCALE" */ |
| 12 | 12 | #define FSCALE 1024 |
| 13 | 13 | |
| 14 | typedef struct _tms_state tms_state; | |
| 15 | struct _tms_state { | |
| 14 | struct tms_state { | |
| 16 | 15 | char *subtype; /* subtype name MM6221AA, TMS3615 or TMS3617 */ |
| 17 | 16 | sound_stream * channel; /* returned by stream_create() */ |
| 18 | 17 |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | #define VERBOSE (0) |
| 10 | 10 | #define LOG(x) do { if (VERBOSE) logerror x; } while (0) |
| 11 | 11 | |
| 12 | typedef struct _st0016_state st0016_state; | |
| 13 | struct _st0016_state | |
| 12 | struct st0016_state | |
| 14 | 13 | { |
| 15 | 14 | sound_stream * stream; |
| 16 | 15 | UINT8 **sound_ram; |
| r17907 | r17908 | |
|---|---|---|
| 2 | 2 | #include "tiaintf.h" |
| 3 | 3 | #include "tiasound.h" |
| 4 | 4 | |
| 5 | typedef struct _tia_state tia_state; | |
| 6 | struct _tia_state | |
| 5 | struct tia_state | |
| 7 | 6 | { |
| 8 | 7 | sound_stream * channel; |
| 9 | 8 | void *chip; |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | |
| 16 | 16 | #define SPEAKER_TAG "speaker" |
| 17 | 17 | |
| 18 | typedef struct _speaker_interface speaker_interface; | |
| 19 | struct _speaker_interface | |
| 18 | struct speaker_interface | |
| 20 | 19 | { |
| 21 | 20 | int num_level; /* optional: number of levels (if not two) */ |
| 22 | 21 | const INT16 *levels; /* optional: pointer to level lookup table */ |
| r17907 | r17908 | |
|---|---|---|
| 77 | 77 | #define AY8910_INTERFACE(name) \ |
| 78 | 78 | const ay8910_interface (name) = |
| 79 | 79 | |
| 80 | typedef struct _ay8910_interface ay8910_interface; | |
| 81 | struct _ay8910_interface | |
| 80 | struct ay8910_interface | |
| 82 | 81 | { |
| 83 | 82 | int flags; /* Flags */ |
| 84 | 83 | int res_load[3]; /* Load on channel in ohms */ |
| r17907 | r17908 | |
|---|---|---|
| 11 | 11 | #define TMS3617 17 /* Monster Bash (13 notes, six outputs) */ |
| 12 | 12 | |
| 13 | 13 | /* The interface structure */ |
| 14 | typedef struct _tms36xx_interface tms36xx_interface; | |
| 15 | struct _tms36xx_interface | |
| 14 | struct tms36xx_interface | |
| 16 | 15 | { |
| 17 | 16 | int subtype; |
| 18 | 17 | double decay[6]; /* decay times for the six harmonic notes */ |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _st0016_interface st0016_interface; | |
| 9 | struct _st0016_interface | |
| 8 | struct st0016_interface | |
| 10 | 9 | { |
| 11 | 10 | UINT8 **p_soundram; |
| 12 | 11 | }; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _c6280_interface c6280_interface; | |
| 9 | struct _c6280_interface | |
| 8 | struct c6280_interface | |
| 10 | 9 | { |
| 11 | 10 | const char * cpu; |
| 12 | 11 | }; |
| r17907 | r17908 | |
|---|---|---|
| 3832 | 3832 | * |
| 3833 | 3833 | *************************************/ |
| 3834 | 3834 | |
| 3835 | typedef struct _discrete_lfsr_desc discrete_lfsr_desc; | |
| 3836 | struct _discrete_lfsr_desc | |
| 3835 | struct discrete_lfsr_desc | |
| 3837 | 3836 | { |
| 3838 | 3837 | int clock_type; |
| 3839 | 3838 | int bitlength; |
| r17907 | r17908 | |
| 3854 | 3853 | }; |
| 3855 | 3854 | |
| 3856 | 3855 | |
| 3857 | typedef struct _discrete_op_amp_osc_info discrete_op_amp_osc_info; | |
| 3858 | struct _discrete_op_amp_osc_info | |
| 3856 | struct discrete_op_amp_osc_info | |
| 3859 | 3857 | { |
| 3860 | 3858 | UINT32 type; |
| 3861 | 3859 | double r1; |
| r17907 | r17908 | |
| 3875 | 3873 | |
| 3876 | 3874 | #define DEFAULT_74LS14_VALUES 1.6, 0.8, 3.4 |
| 3877 | 3875 | |
| 3878 | typedef struct _discrete_schmitt_osc_desc discrete_schmitt_osc_desc; | |
| 3879 | struct _discrete_schmitt_osc_desc | |
| 3876 | struct discrete_schmitt_osc_desc | |
| 3880 | 3877 | { |
| 3881 | 3878 | double rIn; |
| 3882 | 3879 | double rFeedback; |
| r17907 | r17908 | |
| 3888 | 3885 | }; |
| 3889 | 3886 | |
| 3890 | 3887 | |
| 3891 | typedef struct _discrete_comp_adder_table discrete_comp_adder_table; | |
| 3892 | struct _discrete_comp_adder_table | |
| 3888 | struct discrete_comp_adder_table | |
| 3893 | 3889 | { |
| 3894 | 3890 | int type; |
| 3895 | 3891 | double cDefault; // Default componet. 0 if not used. |
| r17907 | r17908 | |
| 3898 | 3894 | }; |
| 3899 | 3895 | |
| 3900 | 3896 | |
| 3901 | typedef struct _discrete_dac_r1_ladder discrete_dac_r1_ladder; | |
| 3902 | struct _discrete_dac_r1_ladder | |
| 3897 | struct discrete_dac_r1_ladder | |
| 3903 | 3898 | { |
| 3904 | 3899 | int ladderLength; // 2 to DISC_LADDER_MAXRES. 1 would be useless. |
| 3905 | 3900 | double r[DISC_LADDER_MAXRES]; // Don't use 0 for valid resistors. That is a short. |
| r17907 | r17908 | |
| 3910 | 3905 | }; |
| 3911 | 3906 | |
| 3912 | 3907 | |
| 3913 | typedef struct _discrete_integrate_info discrete_integrate_info; | |
| 3914 | struct _discrete_integrate_info | |
| 3908 | struct discrete_integrate_info | |
| 3915 | 3909 | { |
| 3916 | 3910 | UINT32 type; |
| 3917 | 3911 | double r1; // r1a + r1b |
| r17907 | r17908 | |
| 3927 | 3921 | |
| 3928 | 3922 | |
| 3929 | 3923 | #define DISC_MAX_MIXER_INPUTS 8 |
| 3930 | typedef struct _discrete_mixer_desc discrete_mixer_desc; | |
| 3931 | struct _discrete_mixer_desc | |
| 3924 | struct discrete_mixer_desc | |
| 3932 | 3925 | { |
| 3933 | 3926 | int type; |
| 3934 | 3927 | double r[DISC_MAX_MIXER_INPUTS]; /* static input resistance values. These are in series with rNode, if used. */ |
| r17907 | r17908 | |
| 3943 | 3936 | }; |
| 3944 | 3937 | |
| 3945 | 3938 | |
| 3946 | typedef struct _discrete_op_amp_info discrete_op_amp_info; | |
| 3947 | struct _discrete_op_amp_info | |
| 3939 | struct discrete_op_amp_info | |
| 3948 | 3940 | { |
| 3949 | 3941 | UINT32 type; |
| 3950 | 3942 | double r1; |
| r17907 | r17908 | |
| 3957 | 3949 | }; |
| 3958 | 3950 | |
| 3959 | 3951 | |
| 3960 | typedef struct _discrete_op_amp_1sht_info discrete_op_amp_1sht_info; | |
| 3961 | struct _discrete_op_amp_1sht_info | |
| 3952 | struct discrete_op_amp_1sht_info | |
| 3962 | 3953 | { |
| 3963 | 3954 | UINT32 type; |
| 3964 | 3955 | double r1; |
| r17907 | r17908 | |
| 3973 | 3964 | }; |
| 3974 | 3965 | |
| 3975 | 3966 | |
| 3976 | typedef struct _discrete_op_amp_tvca_info discrete_op_amp_tvca_info; | |
| 3977 | struct _discrete_op_amp_tvca_info | |
| 3967 | struct discrete_op_amp_tvca_info | |
| 3978 | 3968 | { |
| 3979 | 3969 | double r1; |
| 3980 | 3970 | double r2; // r2a + r2b |
| r17907 | r17908 | |
| 4004 | 3994 | }; |
| 4005 | 3995 | |
| 4006 | 3996 | |
| 4007 | typedef struct _discrete_op_amp_filt_info discrete_op_amp_filt_info; | |
| 4008 | struct _discrete_op_amp_filt_info | |
| 3997 | struct discrete_op_amp_filt_info | |
| 4009 | 3998 | { |
| 4010 | 3999 | double r1; |
| 4011 | 4000 | double r2; |
| r17907 | r17908 | |
| 4025 | 4014 | #define DEFAULT_555_HIGH -1 |
| 4026 | 4015 | #define DEFAULT_555_VALUES DEFAULT_555_CHARGE, DEFAULT_555_HIGH |
| 4027 | 4016 | |
| 4028 | typedef struct _discrete_555_desc discrete_555_desc; | |
| 4029 | struct _discrete_555_desc | |
| 4017 | struct discrete_555_desc | |
| 4030 | 4018 | { |
| 4031 | 4019 | int options; /* bit mapped options */ |
| 4032 | 4020 | double v_pos; /* B+ voltage of 555 */ |
| r17907 | r17908 | |
| 4036 | 4024 | |
| 4037 | 4025 | #define DEFAULT_555_CC_SOURCE DEFAULT_555_CHARGE |
| 4038 | 4026 | |
| 4039 | typedef struct _discrete_555_cc_desc discrete_555_cc_desc; | |
| 4040 | struct _discrete_555_cc_desc | |
| 4027 | struct discrete_555_cc_desc | |
| 4041 | 4028 | { |
| 4042 | 4029 | int options; /* bit mapped options */ |
| 4043 | 4030 | double v_pos; /* B+ voltage of 555 */ |
| r17907 | r17908 | |
| 4047 | 4034 | }; |
| 4048 | 4035 | |
| 4049 | 4036 | |
| 4050 | typedef struct _discrete_555_vco1_desc discrete_555_vco1_desc; | |
| 4051 | struct _discrete_555_vco1_desc | |
| 4037 | struct discrete_555_vco1_desc | |
| 4052 | 4038 | { |
| 4053 | 4039 | int options; /* bit mapped options */ |
| 4054 | 4040 | double r1, r2, r3, r4, c; |
| r17907 | r17908 | |
| 4058 | 4044 | }; |
| 4059 | 4045 | |
| 4060 | 4046 | |
| 4061 | typedef struct _discrete_adsr discrete_adsr; | |
| 4062 | struct _discrete_adsr | |
| 4047 | struct discrete_adsr | |
| 4063 | 4048 | { |
| 4064 | 4049 | double attack_time; /* All times are in seconds */ |
| 4065 | 4050 | double attack_value; |
| r17907 | r17908 | |
|---|---|---|
| 175 | 175 | |
| 176 | 176 | #define USEDSP |
| 177 | 177 | |
| 178 | typedef struct _scsp_state scsp_state; | |
| 179 | struct _scsp_state | |
| 178 | struct scsp_state | |
| 180 | 179 | { |
| 181 | 180 | union |
| 182 | 181 | { |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | #include "2610intf.h" |
| 17 | 17 | #include "fm.h" |
| 18 | 18 | |
| 19 | typedef struct _ym2610_state ym2610_state; | |
| 20 | struct _ym2610_state | |
| 19 | struct ym2610_state | |
| 21 | 20 | { |
| 22 | 21 | sound_stream * stream; |
| 23 | 22 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 1 | 1 | #include "emu.h" |
| 2 | 2 | #include "flt_rc.h" |
| 3 | 3 | |
| 4 | typedef struct _filter_rc_state filter_rc_state; | |
| 5 | struct _filter_rc_state | |
| 4 | struct filter_rc_state | |
| 6 | 5 | { |
| 7 | 6 | device_t *device; |
| 8 | 7 | sound_stream * stream; |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | |
| 18 | 18 | #define BEEP_RATE 48000 |
| 19 | 19 | |
| 20 | typedef struct _beep_state beep_state; | |
| 21 | struct _beep_state | |
| 20 | struct beep_state | |
| 22 | 21 | { |
| 23 | 22 | sound_stream *stream; /* stream number */ |
| 24 | 23 | int enable; /* enable beep */ |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | |
| 10 | 10 | #include "devlegcy.h" |
| 11 | 11 | |
| 12 | typedef struct _scsp_interface scsp_interface; | |
| 13 | struct _scsp_interface | |
| 12 | struct scsp_interface | |
| 14 | 13 | { |
| 15 | 14 | int roffset; /* offset in the region */ |
| 16 | 15 | void (*irq_callback)(device_t *device, int state); /* irq callback */ |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _msm5232_interface msm5232_interface; | |
| 9 | struct _msm5232_interface | |
| 8 | struct msm5232_interface | |
| 10 | 9 | { |
| 11 | 10 | double capacity[8]; /* in Farads, capacitors connected to pins: 24,25,26,27 and 37,38,39,40 */ |
| 12 | 11 | void (*gate_handler)(device_t *device, int state); /* callback called when the GATE output pin changes state */ |
| r17907 | r17908 | |
|---|---|---|
| 45 | 45 | * |
| 46 | 46 | */ |
| 47 | 47 | |
| 48 | typedef struct _flt_rc_config flt_rc_config; | |
| 49 | struct _flt_rc_config | |
| 48 | struct flt_rc_config | |
| 50 | 49 | { |
| 51 | 50 | int type; |
| 52 | 51 | double R1; |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | |
| 10 | 10 | void ym2610_update_request(void *param); |
| 11 | 11 | |
| 12 | typedef struct _ym2610_interface ym2610_interface; | |
| 13 | struct _ym2610_interface | |
| 12 | struct ym2610_interface | |
| 14 | 13 | { |
| 15 | 14 | void ( *handler )( device_t *device, int irq ); /* IRQ handler for the YM2610 */ |
| 16 | 15 | }; |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | |
| 9 | 9 | static const int divisor[TONES] = { 478, 451, 426, 402, 379, 358, 338, 319, 301, 284, 268, 253, 239 }; |
| 10 | 10 | |
| 11 | typedef struct _tms_state tms_state; | |
| 12 | struct _tms_state { | |
| 11 | struct tms_state { | |
| 13 | 12 | sound_stream *channel; /* returned by stream_create() */ |
| 14 | 13 | int samplerate; /* output sample rate */ |
| 15 | 14 | int basefreq; /* chip's base frequency */ |
| r17907 | r17908 | |
|---|---|---|
| 49 | 49 | #define VOLUME_LEVELS 0x10 |
| 50 | 50 | |
| 51 | 51 | /* this structure defines a channel */ |
| 52 | typedef struct _gaelco_sound_channel gaelco_sound_channel; | |
| 53 | struct _gaelco_sound_channel | |
| 52 | struct gaelco_sound_channel | |
| 54 | 53 | { |
| 55 | 54 | int active; /* is it playing? */ |
| 56 | 55 | int loop; /* = 0 no looping, = 1 looping */ |
| r17907 | r17908 | |
| 58 | 57 | }; |
| 59 | 58 | |
| 60 | 59 | /* this structure defines the Gaelco custom sound chip */ |
| 61 | typedef struct _gaelco_sound_state gaelco_sound_state; | |
| 62 | struct _gaelco_sound_state | |
| 60 | struct gaelco_sound_state | |
| 63 | 61 | { |
| 64 | 62 | sound_stream *stream; /* our stream */ |
| 65 | 63 | UINT8 *snd_data; /* PCM data */ |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _gaelcosnd_interface gaelcosnd_interface; | |
| 9 | struct _gaelcosnd_interface | |
| 8 | struct gaelcosnd_interface | |
| 10 | 9 | { |
| 11 | 10 | const char *gfxregion; /* shared gfx region name */ |
| 12 | 11 | int banks[4]; /* start of each ROM bank */ |
| r17907 | r17908 | |
|---|---|---|
| 28 | 28 | |
| 29 | 29 | /* --- external SSG(YM2149/AY-3-8910)emulator interface port */ |
| 30 | 30 | /* used by YM2203,YM2608,and YM2610 */ |
| 31 | typedef struct _ssg_callbacks ssg_callbacks; | |
| 32 | struct _ssg_callbacks | |
| 31 | struct ssg_callbacks | |
| 33 | 32 | { |
| 34 | 33 | void (*set_clock)(void *param, int clock); |
| 35 | 34 | void (*write)(void *param, int address, int data); |
| r17907 | r17908 | |
|---|---|---|
| 39 | 39 | * |
| 40 | 40 | *************************************/ |
| 41 | 41 | |
| 42 | typedef struct _dmadac_state dmadac_state; | |
| 43 | struct _dmadac_state | |
| 42 | struct dmadac_state | |
| 44 | 43 | { |
| 45 | 44 | /* sound stream and buffers */ |
| 46 | 45 | sound_stream * channel; |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | #include "2608intf.h" |
| 17 | 17 | #include "fm.h" |
| 18 | 18 | |
| 19 | typedef struct _ym2608_state ym2608_state; | |
| 20 | struct _ym2608_state | |
| 19 | struct ym2608_state | |
| 21 | 20 | { |
| 22 | 21 | sound_stream * stream; |
| 23 | 22 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | #include "sound/s2636.h" |
| 9 | 9 | |
| 10 | 10 | |
| 11 | typedef struct _s2636_sound s2636_sound; | |
| 12 | struct _s2636_sound | |
| 11 | struct s2636_sound | |
| 13 | 12 | { |
| 14 | 13 | sound_stream *channel; |
| 15 | 14 | UINT8 reg[1]; |
| r17907 | r17908 | |
|---|---|---|
| 34 | 34 | INT32 step; |
| 35 | 35 | }; |
| 36 | 36 | |
| 37 | typedef struct _okim6376_state okim6376_state; | |
| 38 | struct _okim6376_state | |
| 37 | struct okim6376_state | |
| 39 | 38 | { |
| 40 | 39 | #define OKIM6376_VOICES 2 |
| 41 | 40 | struct ADPCMVoice voice[OKIM6376_VOICES]; |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | |
| 11 | 11 | void ym2608_update_request(void *param); |
| 12 | 12 | |
| 13 | typedef struct _ym2608_interface ym2608_interface; | |
| 14 | struct _ym2608_interface | |
| 13 | struct ym2608_interface | |
| 15 | 14 | { |
| 16 | 15 | const ay8910_interface ay8910_intf; |
| 17 | 16 | void ( *handler )( device_t *device, int irq ); /* IRQ handler for the YM2608 */ |
| r17907 | r17908 | |
|---|---|---|
| 47 | 47 | #include "zsg2.h" |
| 48 | 48 | |
| 49 | 49 | // 16 registers per channel, 48 channels |
| 50 | typedef struct _zchan zchan; | |
| 51 | struct _zchan | |
| 50 | struct zchan | |
| 52 | 51 | { |
| 53 | 52 | UINT16 v[16]; |
| 54 | 53 | }; |
| 55 | 54 | |
| 56 | typedef struct _zsg2_state zsg2_state; | |
| 57 | struct _zsg2_state | |
| 55 | struct zsg2_state | |
| 58 | 56 | { |
| 59 | 57 | zchan zc[48]; |
| 60 | 58 | UINT16 act[3]; |
| r17907 | r17908 | |
|---|---|---|
| 135 | 135 | ***********************************************************************************************/ |
| 136 | 136 | |
| 137 | 137 | /* struct describing a single playing voice */ |
| 138 | typedef struct _es5506_voice es5506_voice; | |
| 139 | struct _es5506_voice | |
| 138 | struct es5506_voice | |
| 140 | 139 | { |
| 141 | 140 | /* external state */ |
| 142 | 141 | UINT32 control; /* control register */ |
| r17907 | r17908 | |
| 167 | 166 | UINT32 accum_mask; |
| 168 | 167 | }; |
| 169 | 168 | |
| 170 | typedef struct _es5506_state es5506_state; | |
| 171 | struct _es5506_state | |
| 169 | struct es5506_state | |
| 172 | 170 | { |
| 173 | 171 | sound_stream *stream; /* which stream are we using */ |
| 174 | 172 | int sample_rate; /* current sample rate */ |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | READ16_DEVICE_HANDLER( zsg2_r ); |
| 11 | 11 | WRITE16_DEVICE_HANDLER( zsg2_w ); |
| 12 | 12 | |
| 13 | typedef struct _zsg2_interface zsg2_interface; | |
| 14 | struct _zsg2_interface | |
| 13 | struct zsg2_interface | |
| 15 | 14 | { |
| 16 | 15 | const char *samplergn; |
| 17 | 16 | }; |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | typedef double filter_real; |
| 17 | 17 | #endif |
| 18 | 18 | |
| 19 | typedef struct _filter filter; | |
| 20 | struct _filter | |
| 19 | struct filter | |
| 21 | 20 | { |
| 22 | 21 | filter_real xcoeffs[(FILTER_ORDER_MAX+1)/2]; |
| 23 | 22 | unsigned order; |
| 24 | 23 | }; |
| 25 | 24 | |
| 26 | typedef struct _filter_state filter_state; | |
| 27 | struct _filter_state | |
| 25 | struct filter_state | |
| 28 | 26 | { |
| 29 | 27 | unsigned prev_mac; |
| 30 | 28 | filter_real xprev[FILTER_ORDER_MAX]; |
| r17907 | r17908 | |
| 65 | 63 | |
| 66 | 64 | #define Q_TO_DAMP(q) (1.0/q) |
| 67 | 65 | |
| 68 | typedef struct _filter2_context filter2_context; | |
| 69 | struct _filter2_context | |
| 66 | struct filter2_context | |
| 70 | 67 | { |
| 71 | 68 | double x0, x1, x2; /* x[k], x[k-1], x[k-2], current and previous 2 input values */ |
| 72 | 69 | double y0, y1, y2; /* y[k], y[k-1], y[k-2], current and previous 2 output values */ |
| r17907 | r17908 | |
|---|---|---|
| 12 | 12 | |
| 13 | 13 | #include "devlegcy.h" |
| 14 | 14 | |
| 15 | typedef struct _es5505_interface es5505_interface; | |
| 16 | struct _es5505_interface | |
| 15 | struct es5505_interface | |
| 17 | 16 | { |
| 18 | 17 | const char * region0; /* memory region where the sample ROM lives */ |
| 19 | 18 | const char * region1; /* memory region where the sample ROM lives */ |
| r17907 | r17908 | |
| 53 | 52 | |
| 54 | 53 | |
| 55 | 54 | |
| 56 | typedef struct _es5506_interface es5506_interface; | |
| 57 | struct _es5506_interface | |
| 55 | struct es5506_interface | |
| 58 | 56 | { |
| 59 | 57 | const char * region0; /* memory region where the sample ROM lives */ |
| 60 | 58 | const char * region1; /* memory region where the sample ROM lives */ |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | #define YMF278B_STD_CLOCK (33868800) /* standard clock for OPL4 */ |
| 9 | 9 | |
| 10 | 10 | |
| 11 | typedef struct _ymf278b_interface ymf278b_interface; | |
| 12 | struct _ymf278b_interface | |
| 11 | struct ymf278b_interface | |
| 13 | 12 | { |
| 14 | 13 | void (*irq_callback)(device_t *device, int state); /* irq callback */ |
| 15 | 14 | }; |
| r17907 | r17908 | |
|---|---|---|
| 2 | 2 | #include "flt_vol.h" |
| 3 | 3 | |
| 4 | 4 | |
| 5 | typedef struct _filter_volume_state filter_volume_state; | |
| 6 | struct _filter_volume_state | |
| 5 | struct filter_volume_state | |
| 7 | 6 | { |
| 8 | 7 | sound_stream * stream; |
| 9 | 8 | int gain; |
| r17907 | r17908 | |
|---|---|---|
| 23 | 23 | #define MOS6581_INTERFACE(name) \ |
| 24 | 24 | const sid6581_interface (name) = |
| 25 | 25 | |
| 26 | typedef struct _sid6581_interface sid6581_interface; | |
| 27 | struct _sid6581_interface | |
| 26 | struct sid6581_interface | |
| 28 | 27 | { |
| 29 | 28 | devcb_read8 in_potx_cb; |
| 30 | 29 | devcb_read8 in_poty_cb; |
| r17907 | r17908 | |
|---|---|---|
| 12 | 12 | #include "ym2151.h" |
| 13 | 13 | |
| 14 | 14 | |
| 15 | typedef struct _ym2151_state ym2151_state; | |
| 16 | struct _ym2151_state | |
| 15 | struct ym2151_state | |
| 17 | 16 | { |
| 18 | 17 | sound_stream * stream; |
| 19 | 18 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | |
| 11 | 11 | |
| 12 | 12 | /* for stream system */ |
| 13 | typedef struct _ym2413_state ym2413_state; | |
| 14 | struct _ym2413_state | |
| 13 | struct ym2413_state | |
| 15 | 14 | { |
| 16 | 15 | sound_stream * stream; |
| 17 | 16 | void * chip; |
| r17907 | r17908 | |
|---|---|---|
| 13 | 13 | |
| 14 | 14 | #define BASE_SHIFT 16 |
| 15 | 15 | |
| 16 | typedef struct _k053260_channel k053260_channel; | |
| 17 | struct _k053260_channel | |
| 16 | struct k053260_channel | |
| 18 | 17 | { |
| 19 | 18 | UINT32 rate; |
| 20 | 19 | UINT32 size; |
| r17907 | r17908 | |
| 29 | 28 | int ppcm_data; |
| 30 | 29 | }; |
| 31 | 30 | |
| 32 | typedef struct _k053260_state k053260_state; | |
| 33 | struct _k053260_state | |
| 31 | struct k053260_state | |
| 34 | 32 | { |
| 35 | 33 | sound_stream * channel; |
| 36 | 34 | int mode; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _ym2151_interface ym2151_interface; | |
| 9 | struct _ym2151_interface | |
| 8 | struct ym2151_interface | |
| 10 | 9 | { |
| 11 | 10 | devcb_write_line irqhandler; |
| 12 | 11 | devcb_write8 portwritehandler; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | #include "emu.h" |
| 6 | 6 | #include "segapcm.h" |
| 7 | 7 | |
| 8 | typedef struct _segapcm_state segapcm_state; | |
| 9 | struct _segapcm_state | |
| 8 | struct segapcm_state | |
| 10 | 9 | { |
| 11 | 10 | UINT8 *ram; |
| 12 | 11 | UINT8 low[16]; |
| r17907 | r17908 | |
|---|---|---|
| 11 | 11 | |
| 12 | 12 | #include "devlegcy.h" |
| 13 | 13 | |
| 14 | typedef struct _k053260_interface k053260_interface; | |
| 15 | struct _k053260_interface { | |
| 14 | struct k053260_interface { | |
| 16 | 15 | const char *rgnoverride; |
| 17 | 16 | timer_expired_func irq; /* called on SH1 complete cycle ( clock / 32 ) */ |
| 18 | 17 | }; |
| r17907 | r17908 | |
|---|---|---|
| 16 | 16 | #define BANK_MASKF (0xf0<<16) |
| 17 | 17 | #define BANK_MASKF8 (0xf8<<16) |
| 18 | 18 | |
| 19 | typedef struct _sega_pcm_interface sega_pcm_interface; | |
| 20 | struct _sega_pcm_interface | |
| 19 | struct sega_pcm_interface | |
| 21 | 20 | { |
| 22 | 21 | int bank; |
| 23 | 22 | }; |
| r17907 | r17908 | |
|---|---|---|
| 12 | 12 | interrupts |
| 13 | 13 | *************/ |
| 14 | 14 | |
| 15 | typedef struct _vr0_state vr0_state; | |
| 16 | struct _vr0_state | |
| 15 | struct vr0_state | |
| 17 | 16 | { |
| 18 | 17 | UINT32 *TexBase; |
| 19 | 18 | UINT32 *FBBase; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | #include "sound/fmopl.h" |
| 23 | 23 | |
| 24 | 24 | |
| 25 | typedef struct _y8950_state y8950_state; | |
| 26 | struct _y8950_state | |
| 25 | struct y8950_state | |
| 27 | 26 | { |
| 28 | 27 | sound_stream * stream; |
| 29 | 28 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | 8 | |
| 9 | typedef struct _vr0_interface vr0_interface; | |
| 10 | struct _vr0_interface | |
| 9 | struct vr0_interface | |
| 11 | 10 | { |
| 12 | 11 | UINT32 RegBase; |
| 13 | 12 | }; |
| r17907 | r17908 | |
|---|---|---|
| 37 | 37 | |
| 38 | 38 | #define STEP 0x10000 |
| 39 | 39 | |
| 40 | typedef struct _t6w28_state t6w28_state; | |
| 41 | struct _t6w28_state | |
| 40 | struct t6w28_state | |
| 42 | 41 | { |
| 43 | 42 | sound_stream * Channel; |
| 44 | 43 | int SampleRate; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _y8950_interface y8950_interface; | |
| 9 | struct _y8950_interface | |
| 8 | struct y8950_interface | |
| 10 | 9 | { |
| 11 | 10 | void (*handler)(device_t *device, int linestate); |
| 12 | 11 |
| r17907 | r17908 | |
|---|---|---|
| 50 | 50 | } sound_channel; |
| 51 | 51 | |
| 52 | 52 | |
| 53 | typedef struct _namco_sound namco_sound; | |
| 54 | struct _namco_sound | |
| 53 | struct namco_sound | |
| 55 | 54 | { |
| 56 | 55 | /* data about the sound system */ |
| 57 | 56 | sound_channel channel_list[MAX_VOICES]; |
| r17907 | r17908 | |
|---|---|---|
| 193 | 193 | * |
| 194 | 194 | *****************************************************************************/ |
| 195 | 195 | |
| 196 | typedef struct _sn76477_state sn76477_state; | |
| 197 | struct _sn76477_state | |
| 196 | struct sn76477_state | |
| 198 | 197 | { |
| 199 | 198 | /* chip's external interface */ |
| 200 | 199 | UINT32 enable; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _namco_interface namco_interface; | |
| 9 | struct _namco_interface | |
| 8 | struct namco_interface | |
| 10 | 9 | { |
| 11 | 10 | int voices; /* number of voices */ |
| 12 | 11 | int stereo; /* set to 1 to indicate stereo (e.g., System 1) */ |
| r17907 | r17908 | |
|---|---|---|
| 49 | 49 | * |
| 50 | 50 | *****************************************************************************/ |
| 51 | 51 | |
| 52 | typedef struct _sn76477_interface sn76477_interface; | |
| 53 | struct _sn76477_interface | |
| 52 | struct sn76477_interface | |
| 54 | 53 | { |
| 55 | 54 | double noise_clock_res; |
| 56 | 55 | double noise_filter_res; |
| r17907 | r17908 | |
|---|---|---|
| 119 | 119 | #define IP_SIZE_FAST (120/FR_SIZE) |
| 120 | 120 | #define IP_SIZE_FASTER ( 80/FR_SIZE) |
| 121 | 121 | |
| 122 | typedef struct _vlm5030_state vlm5030_state; | |
| 123 | struct _vlm5030_state | |
| 122 | struct vlm5030_state | |
| 124 | 123 | { |
| 125 | 124 | device_t *device; |
| 126 | 125 | const vlm5030_interface *intf; |
| r17907 | r17908 | |
|---|---|---|
| 3 | 3 | #include "fm.h" |
| 4 | 4 | |
| 5 | 5 | |
| 6 | typedef struct _ym2203_state ym2203_state; | |
| 7 | struct _ym2203_state | |
| 6 | struct ym2203_state | |
| 8 | 7 | { |
| 9 | 8 | sound_stream * stream; |
| 10 | 9 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 5 | 5 | |
| 6 | 6 | #include "devlegcy.h" |
| 7 | 7 | |
| 8 | typedef struct _vlm5030_interface vlm5030_interface; | |
| 9 | struct _vlm5030_interface | |
| 8 | struct vlm5030_interface | |
| 10 | 9 | { |
| 11 | 10 | int memory_size; /* memory size of speech rom (0=memory region length) */ |
| 12 | 11 | }; |
| r17907 | r17908 | |
|---|---|---|
| 343 | 343 | |
| 344 | 344 | static const UINT8 reload_table[4] = { 0, 2, 4, 6 }; //sample count reload for 5220c only; 5200 and 5220 always reload with 0; keep in mind this is loaded on IP=0 PC=12 subcycle=1 so it immediately will increment after one sample, effectively being 1,3,5,7 as in the comments above. |
| 345 | 345 | |
| 346 | typedef struct _tms5220_state tms5220_state; | |
| 347 | struct _tms5220_state | |
| 346 | struct tms5220_state | |
| 348 | 347 | { |
| 349 | 348 | /* coefficient tables */ |
| 350 | 349 | int variant; /* Variant of the 5xxx - see tms5110r.h */ |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | |
| 10 | 10 | void ym2203_update_request(void *param); |
| 11 | 11 | |
| 12 | typedef struct _ym2203_interface ym2203_interface; | |
| 13 | struct _ym2203_interface | |
| 12 | struct ym2203_interface | |
| 14 | 13 | { |
| 15 | 14 | const ay8910_interface ay8910_intf; |
| 16 | 15 | devcb_write_line irqhandler; |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | |
| 10 | 10 | #include "devlegcy.h" |
| 11 | 11 | |
| 12 | typedef struct _k007232_interface k007232_interface; | |
| 13 | struct _k007232_interface | |
| 12 | struct k007232_interface | |
| 14 | 13 | { |
| 15 | 14 | void (*portwritehandler)(device_t *, int); |
| 16 | 15 | }; |
| r17907 | r17908 | |
|---|---|---|
| 11 | 11 | /* usually 640000 for 8000 Hz sample rate or */ |
| 12 | 12 | /* usually 800000 for 10000 Hz sample rate. */ |
| 13 | 13 | |
| 14 | typedef struct _tms5220_interface tms5220_interface; | |
| 15 | struct _tms5220_interface | |
| 14 | struct tms5220_interface | |
| 16 | 15 | { |
| 17 | 16 | devcb_write_line irq_func; /* IRQ callback function, active low, i.e. state=0 */ |
| 18 | 17 | devcb_write_line readyq_func; /* Ready callback function, active low, i.e. state=0 */ |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | |
| 22 | 22 | static const int dividers[4] = { 1024, 768, 512, 512 }; |
| 23 | 23 | |
| 24 | typedef struct _okim6258_state okim6258_state; | |
| 25 | struct _okim6258_state | |
| 24 | struct okim6258_state | |
| 26 | 25 | { |
| 27 | 26 | UINT8 status; |
| 28 | 27 |
| r17907 | r17908 | |
|---|---|---|
| 51 | 51 | |
| 52 | 52 | |
| 53 | 53 | |
| 54 | typedef struct _nile_state nile_state; | |
| 55 | struct _nile_state | |
| 54 | struct nile_state | |
| 56 | 55 | { |
| 57 | 56 | sound_stream * stream; |
| 58 | 57 | UINT8 *sound_ram; |
| r17907 | r17908 | |
|---|---|---|
| 7 | 7 | |
| 8 | 8 | /* an interface for the OKIM6258 and similar chips */ |
| 9 | 9 | |
| 10 | typedef struct _okim6258_interface okim6258_interface; | |
| 11 | struct _okim6258_interface | |
| 10 | struct okim6258_interface | |
| 12 | 11 | { |
| 13 | 12 | int divider; |
| 14 | 13 | int adpcm_type; |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | |
| 20 | 20 | |
| 21 | 21 | /* struct describing a playing ADPCM chip */ |
| 22 | typedef struct _es8712_state es8712_state; | |
| 23 | struct _es8712_state | |
| 22 | struct es8712_state | |
| 24 | 23 | { |
| 25 | 24 | UINT8 playing; /* 1 if we're actively playing */ |
| 26 | 25 |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | #include "ymf262.h" |
| 11 | 11 | |
| 12 | 12 | |
| 13 | typedef struct _ymf262_state ymf262_state; | |
| 14 | struct _ymf262_state | |
| 13 | struct ymf262_state | |
| 15 | 14 | { |
| 16 | 15 | sound_stream * stream; |
| 17 | 16 | emu_timer * timer[2]; |
| r17907 | r17908 | |
|---|---|---|
| 55 | 55 | #define SYNCS_MAX2 0x80 |
| 56 | 56 | |
| 57 | 57 | /* GLOBAL VARIABLES */ |
| 58 | typedef struct _nesapu_state nesapu_state; | |
| 59 | struct _nesapu_state | |
| 58 | struct nesapu_state | |
| 60 | 59 | { |
| 61 | 60 | apu_t APU; /* Actual APUs */ |
| 62 | 61 | float apu_incsize; /* Adjustment increment */ |
| r17907 | r17908 | |
|---|---|---|
| 152 | 152 | class debug_view_manager; |
| 153 | 153 | class osd_interface; |
| 154 | 154 | |
| 155 | typedef struct _palette_private palette_private; | |
| 156 | typedef struct _romload_private romload_private; | |
| 157 | typedef struct _ui_input_private ui_input_private; | |
| 158 | typedef struct _debugcpu_private debugcpu_private; | |
| 159 | typedef struct _generic_machine_private generic_machine_private; | |
| 155 | struct palette_private; | |
| 156 | struct romload_private; | |
| 157 | struct ui_input_private; | |
| 158 | struct debugcpu_private; | |
| 159 | struct generic_machine_private; | |
| 160 | 160 | |
| 161 | 161 | |
| 162 | 162 | // ======================> system_time |
| r17907 | r17908 | |
|---|---|---|
| 30 | 30 | TYPE DEFINITIONS |
| 31 | 31 | ***************************************************************************/ |
| 32 | 32 | |
| 33 | typedef struct _crosshair_global crosshair_global; | |
| 34 | struct _crosshair_global | |
| 33 | struct crosshair_global | |
| 35 | 34 | { |
| 36 | 35 | UINT8 usage; /* true if any crosshairs are used */ |
| 37 | 36 | UINT8 used[MAX_PLAYERS]; /* usage per player */ |
| r17907 | r17908 | |
|---|---|---|
| 685 | 685 | struct ioport_field_live; |
| 686 | 686 | class ioport_manager; |
| 687 | 687 | class emu_timer; |
| 688 | ||
| 688 | ||
| 689 | 689 | class analog_field; |
| 690 | 690 | |
| 691 | 691 | // constructor function pointer |
| r17907 | r17908 | |
|---|---|---|
| 93 | 93 | |
| 94 | 94 | typedef INT32 (*slider_update)(running_machine &machine, void *arg, astring *string, INT32 newval); |
| 95 | 95 | |
| 96 | typedef struct _slider_state slider_state; | |
| 97 | struct _slider_state | |
| 96 | struct slider_state | |
| 98 | 97 | { |
| 99 | 98 | slider_state * next; /* pointer to next slider */ |
| 100 | 99 | slider_update update; /* callback */ |
| r17907 | r17908 | |
|---|---|---|
| 43 | 43 | ***************************************************************************/ |
| 44 | 44 | |
| 45 | 45 | /* user-controllable settings for a player */ |
| 46 | typedef struct _crosshair_user_settings crosshair_user_settings; | |
| 47 | struct _crosshair_user_settings | |
| 46 | struct crosshair_user_settings | |
| 48 | 47 | { |
| 49 | 48 | UINT8 used; /* is used */ |
| 50 | 49 | UINT8 mode; /* visibility mode */ |
| r17907 | r17908 | |
|---|---|---|
| 29 | 29 | ***************************************************************************/ |
| 30 | 30 | |
| 31 | 31 | /* information about a shadow table */ |
| 32 | typedef struct _shadow_table_data shadow_table_data; | |
| 33 | struct _shadow_table_data | |
| 32 | struct shadow_table_data | |
| 34 | 33 | { |
| 35 | 34 | UINT32 * base; /* pointer to the base of the table */ |
| 36 | 35 | INT16 dr; /* delta red value */ |
| r17907 | r17908 | |
| 41 | 40 | |
| 42 | 41 | |
| 43 | 42 | /* typedef struct _palette_private palette_private; */ |
| 44 | struct | |
| 43 | struct | |
| 45 | 44 | { |
| 46 | 45 | bitmap_format format; /* format assumed for palette data */ |
| 47 | 46 |
| r17907 | r17908 | |
|---|---|---|
| 171 | 171 | class screen_device; |
| 172 | 172 | class render_container; |
| 173 | 173 | class render_manager; |
| 174 | ||
| 174 | ||
| 175 | 175 | class render_font; |
| 176 | 176 | struct object_transform; |
| 177 | 177 | class layout_element; |
| r17907 | r17908 | |
|---|---|---|
| 57 | 57 | }; |
| 58 | 58 | |
| 59 | 59 | |
| 60 | typedef struct _romload_private rom_load_data; | |
| 61 | struct _romload_private | |
| 60 | struct romload_private | |
| 62 | 61 | { |
| 63 | 62 | running_machine &machine() const { assert(m_machine != NULL); return *m_machine; } |
| 64 | 63 | |
| r17907 | r17908 | |
| 283 | 282 | from SystemBios structure and OPTION_BIOS |
| 284 | 283 | -------------------------------------------------*/ |
| 285 | 284 | |
| 286 | static void determine_bios_rom(rom | |
| 285 | static void determine_bios_rom(rom | |
| 287 | 286 | { |
| 288 | 287 | const char *defaultname = NULL; |
| 289 | 288 | const rom_entry *rom; |
| r17907 | r17908 | |
| 337 | 336 | that will need to be loaded |
| 338 | 337 | -------------------------------------------------*/ |
| 339 | 338 | |
| 340 | static void count_roms(rom | |
| 339 | static void count_roms(rom | |
| 341 | 340 | { |
| 342 | 341 | const rom_entry *region, *rom; |
| 343 | 342 | |
| r17907 | r17908 | |
| 375 | 374 | for missing files |
| 376 | 375 | -------------------------------------------------*/ |
| 377 | 376 | |
| 378 | static void handle_missing_file(rom | |
| 377 | static void handle_missing_file(rom | |
| 379 | 378 | { |
| 380 | 379 | /* optional files are okay */ |
| 381 | 380 | if (ROM_ISOPTIONAL(romp)) |
| r17907 | r17908 | |
| 406 | 405 | correct checksums for a given ROM |
| 407 | 406 | -------------------------------------------------*/ |
| 408 | 407 | |
| 409 | static void dump_wrong_and_correct_checksums(rom | |
| 408 | static void dump_wrong_and_correct_checksums(rom | |
| 410 | 409 | { |
| 411 | 410 | astring tempstr; |
| 412 | 411 | romdata->errorstring.catprintf(" EXPECTED: %s\n", hashes.macro_string(tempstr)); |
| r17907 | r17908 | |
| 419 | 418 | and hash signatures of a file |
| 420 | 419 | -------------------------------------------------*/ |
| 421 | 420 | |
| 422 | static void verify_length_and_hash(rom | |
| 421 | static void verify_length_and_hash(rom | |
| 423 | 422 | { |
| 424 | 423 | /* we've already complained if there is no file */ |
| 425 | 424 | if (romdata->file == NULL) |
| r17907 | r17908 | |
| 463 | 462 | messages about ROM loading to the user |
| 464 | 463 | -------------------------------------------------*/ |
| 465 | 464 | |
| 466 | static void display_loading_rom_message(rom | |
| 465 | static void display_loading_rom_message(rom | |
| 467 | 466 | { |
| 468 | 467 | char buffer[200]; |
| 469 | 468 | |
| r17907 | r17908 | |
| 483 | 482 | results of ROM loading |
| 484 | 483 | -------------------------------------------------*/ |
| 485 | 484 | |
| 486 | static void display_rom_load_results(rom | |
| 485 | static void display_rom_load_results(rom | |
| 487 | 486 | { |
| 488 | 487 | /* final status display */ |
| 489 | 488 | display_loading_rom_message(romdata, NULL); |
| r17907 | r17908 | |
| 512 | 511 | byte swapping and inverting data as necessary |
| 513 | 512 | -------------------------------------------------*/ |
| 514 | 513 | |
| 515 | static void region_post_process(rom | |
| 514 | static void region_post_process(rom | |
| 516 | 515 | { |
| 517 | 516 | memory_region *region = romdata->machine().root_device().memregion(rgntag); |
| 518 | 517 | UINT8 *base; |
| r17907 | r17908 | |
| 553 | 552 | up the parent and loading by checksum |
| 554 | 553 | -------------------------------------------------*/ |
| 555 | 554 | |
| 556 | static int open_rom_file(rom | |
| 555 | static int open_rom_file(rom | |
| 557 | 556 | { |
| 558 | 557 | file_error filerr = FILERR_NOT_FOUND; |
| 559 | 558 | UINT32 romsize = rom_file_size(romp); |
| r17907 | r17908 | |
| 651 | 650 | random data for a NULL file |
| 652 | 651 | -------------------------------------------------*/ |
| 653 | 652 | |
| 654 | static int rom_fread(rom | |
| 653 | static int rom_fread(rom | |
| 655 | 654 | { |
| 656 | 655 | /* files just pass through */ |
| 657 | 656 | if (romdata->file != NULL) |
| r17907 | r17908 | |
| 670 | 669 | entry |
| 671 | 670 | -------------------------------------------------*/ |
| 672 | 671 | |
| 673 | static int read_rom_data(rom | |
| 672 | static int read_rom_data(rom | |
| 674 | 673 | { |
| 675 | 674 | int datashift = ROM_GETBITSHIFT(romp); |
| 676 | 675 | int datamask = ((1 << ROM_GETBITWIDTH(romp)) - 1) << datashift; |
| r17907 | r17908 | |
| 790 | 789 | fill_rom_data - fill a region of ROM space |
| 791 | 790 | -------------------------------------------------*/ |
| 792 | 791 | |
| 793 | static void fill_rom_data(rom | |
| 792 | static void fill_rom_data(rom | |
| 794 | 793 | { |
| 795 | 794 | UINT32 numbytes = ROM_GETLENGTH(romp); |
| 796 | 795 | UINT8 *base = romdata->region->base() + ROM_GETOFFSET(romp); |
| r17907 | r17908 | |
| 812 | 811 | copy_rom_data - copy a region of ROM space |
| 813 | 812 | -------------------------------------------------*/ |
| 814 | 813 | |
| 815 | static void copy_rom_data(rom | |
| 814 | static void copy_rom_data(rom | |
| 816 | 815 | { |
| 817 | 816 | UINT8 *base = romdata->region->base() + ROM_GETOFFSET(romp); |
| 818 | 817 | const char *srcrgntag = ROM_GETNAME(romp); |
| r17907 | r17908 | |
| 846 | 845 | for a region |
| 847 | 846 | -------------------------------------------------*/ |
| 848 | 847 | |
| 849 | static void process_rom_entries(rom | |
| 848 | static void process_rom_entries(rom | |
| 850 | 849 | { |
| 851 | 850 | UINT32 lastflags = 0; |
| 852 | 851 | |
| r17907 | r17908 | |
| 1137 | 1136 | for a region |
| 1138 | 1137 | -------------------------------------------------*/ |
| 1139 | 1138 | |
| 1140 | static void process_disk_entries(rom | |
| 1139 | static void process_disk_entries(rom | |
| 1141 | 1140 | { |
| 1142 | 1141 | /* loop until we hit the end of this region */ |
| 1143 | 1142 | for ( ; !ROMENTRY_ISREGIONEND(romp); romp++) |
| r17907 | r17908 | |
| 1262 | 1261 | void load_software_part_region(device_t *device, char *swlist, char *swname, rom_entry *start_region) |
| 1263 | 1262 | { |
| 1264 | 1263 | astring locationtag(swlist), breakstr("%"); |
| 1265 | rom | |
| 1264 | rom | |
| 1266 | 1265 | const rom_entry *region; |
| 1267 | 1266 | astring regiontag; |
| 1268 | 1267 | |
| r17907 | r17908 | |
| 1375 | 1374 | process_region_list - process a region list |
| 1376 | 1375 | -------------------------------------------------*/ |
| 1377 | 1376 | |
| 1378 | static void process_region_list(rom | |
| 1377 | static void process_region_list(rom | |
| 1379 | 1378 | { |
| 1380 | 1379 | astring regiontag; |
| 1381 | 1380 | |
| r17907 | r17908 | |
| 1442 | 1441 | |
| 1443 | 1442 | void rom_init(running_machine &machine) |
| 1444 | 1443 | { |
| 1445 | rom | |
| 1444 | rom | |
| 1446 | 1445 | |
| 1447 | 1446 | /* allocate private data */ |
| 1448 | 1447 | machine.romload_data = romdata = auto_alloc_clear(machine, romload_private); |
| r17907 | r17908 | |
|---|---|---|
| 29 | 29 | TYPE DEFINITIONS |
| 30 | 30 | ***************************************************************************/ |
| 31 | 31 | |
| 32 | typedef struct _floppy_drive floppy_drive; | |
| 33 | struct _floppy_drive | |
| 32 | struct floppy_drive | |
| 34 | 33 | { |
| 35 | 34 | /* callbacks */ |
| 36 | 35 | devcb_resolved_write_line out_idx_func; |
| r17907 | r17908 | |
| 91 | 90 | }; |
| 92 | 91 | |
| 93 | 92 | |
| 94 | typedef struct _floppy_error_map floppy_error_map; | |
| 95 | struct _floppy_error_map | |
| 93 | struct floppy_error_map | |
| 96 | 94 | { |
| 97 | 95 | floperr_t ferr; |
| 98 | 96 | image_error_t ierr; |
| r17907 | r17908 | |
|---|---|---|
| 331 | 331 | |
| 332 | 332 | void bitbanger_device::device_config_complete(void) |
| 333 | 333 | { |
| 334 | const | |
| 334 | const | |
| 335 | 335 | if(intf != NULL) |
| 336 | 336 | { |
| 337 | *static_cast< | |
| 337 | *static_cast< | |
| 338 | 338 | } |
| 339 | 339 | else |
| 340 | 340 | { |
| r17907 | r17908 | |
|---|---|---|
| 65 | 65 | TYPE DEFINITIONS |
| 66 | 66 | ***************************************************************************/ |
| 67 | 67 | |
| 68 | typedef struct _bitbanger_config bitbanger_config; | |
| 69 | struct _bitbanger_config | |
| 68 | struct bitbanger_config | |
| 70 | 69 | { |
| 71 | 70 | /* callback to driver */ |
| 72 | 71 | devcb_write_line m_input_callback; |
| r17907 | r17908 | |
| 85 | 84 | |
| 86 | 85 | class bitbanger_device : public device_t, |
| 87 | 86 | public device_image_interface, |
| 88 | public | |
| 87 | public | |
| 89 | 88 | { |
| 90 | 89 | public: |
| 91 | 90 | // construction/destruction |
| r17907 | r17908 | |
|---|---|---|
| 24 | 24 | TYPE DEFINITIONS |
| 25 | 25 | ***************************************************************************/ |
| 26 | 26 | |
| 27 | typedef struct _config_type config_type; | |
| 28 | struct _config_type | |
| 27 | struct config_type | |
| 29 | 28 | { |
| 30 | | |
| 29 | | |
| 31 | 30 | const char * name; /* node name */ |
| 32 | 31 | config_saveload_delegate load; /* load callback */ |
| 33 | 32 | config_saveload_delegate save; /* save callback */ |
| r17907 | r17908 | |
|---|---|---|
| 23 | 23 | TYPE DEFINITIONS |
| 24 | 24 | ***************************************************************************/ |
| 25 | 25 | |
| 26 | typedef struct _ui_gfx_state ui_gfx_state; | |
| 27 | struct _ui_gfx_state | |
| 26 | struct ui_gfx_state | |
| 28 | 27 | { |
| 29 | 28 | UINT8 mode; /* which mode are we in? */ |
| 30 | 29 |
| r17907 | r17908 | |
|---|---|---|
| 34 | 34 | ***************************************************************************/ |
| 35 | 35 | |
| 36 | 36 | /* private input port state */ |
| 37 | struct | |
| 37 | struct | |
| 38 | 38 | { |
| 39 | 39 | /* pressed states; retrieved with ui_input_pressed() */ |
| 40 | 40 | osd_ticks_t next_repeat[IPT_COUNT]; |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | TYPE DEFINITIONS |
| 22 | 22 | ***************************************************************************/ |
| 23 | 23 | |
| 24 | enum | |
| 24 | enum | |
| 25 | 25 | { |
| 26 | 26 | UI_EVENT_NONE, |
| 27 | 27 | UI_EVENT_MOUSE_MOVE, |
| r17907 | r17908 | |
| 31 | 31 | UI_EVENT_MOUSE_DOUBLE_CLICK, |
| 32 | 32 | UI_EVENT_CHAR |
| 33 | 33 | }; |
| 34 | typedef enum _ui_event_type ui_event_type; | |
| 35 | 34 | |
| 36 | 35 | |
| 37 | typedef struct _ui_event ui_event; | |
| 38 | struct _ui_event | |
| 36 | struct ui_event | |
| 39 | 37 | { |
| 40 | 38 | ui_event_type event_type; |
| 41 | 39 | render_target * target; |
| r17907 | r17908 | |
|---|---|---|
| 20 | 20 | TYPE DEFINITIONS |
| 21 | 21 | ***************************************************************************/ |
| 22 | 22 | |
| 23 | typedef struct _adc12138_state adc12138_state; | |
| 24 | struct _adc12138_state | |
| 23 | struct adc12138_state | |
| 25 | 24 | { |
| 26 | 25 | adc1213x_input_convert_func input_callback_r; |
| 27 | 26 |
| r17907 | r17908 | |
|---|---|---|
| 73 | 73 | |
| 74 | 74 | typedef double (*adc1213x_input_convert_func)(device_t *device, UINT8 input); |
| 75 | 75 | |
| 76 | typedef struct _adc12138_interface adc12138_interface; | |
| 77 | struct _adc12138_interface | |
| 76 | struct adc12138_interface | |
| 78 | 77 | { |
| 79 | 78 | adc1213x_input_convert_func input_callback_r; |
| 80 | 79 | }; |
| r17907 | r17908 | |
|---|---|---|
| 37 | 37 | #include "machine/74153.h" |
| 38 | 38 | |
| 39 | 39 | |
| 40 | typedef struct _ttl74153_state ttl74153_state; | |
| 41 | struct _ttl74153_state | |
| 40 | struct ttl74153_state | |
| 42 | 41 | { |
| 43 | 42 | /* callback */ |
| 44 | 43 | void (*output_cb)(device_t *device); |
| r17907 | r17908 | |
|---|---|---|
| 39 | 39 | #include "devlegcy.h" |
| 40 | 40 | |
| 41 | 41 | |
| 42 | typedef struct _ttl74153_config ttl74153_config; | |
| 43 | struct _ttl74153_config | |
| 42 | struct ttl74153_config | |
| 44 | 43 | { |
| 45 | 44 | void (*output_cb)(device_t *device); |
| 46 | 45 | }; |
| r17907 | r17908 | |
|---|---|---|
| 73 | 73 | #define TMS6100_READ_PENDING 0x01 |
| 74 | 74 | #define TMS6100_NEXT_READ_IS_DUMMY 0x02 |
| 75 | 75 | |
| 76 | typedef struct _tms6100_state tms6100_state; | |
| 77 | struct _tms6100_state | |
| 76 | struct tms6100_state | |
| 78 | 77 | { |
| 79 | 78 | /* Rom interface */ |
| 80 | 79 | UINT32 address; |
| r17907 | r17908 | |
|---|---|---|
| 106 | 106 | TYPE DEFINITIONS |
| 107 | 107 | ***************************************************************************/ |
| 108 | 108 | |
| 109 | typedef struct _smc91c9x_state smc91c9x_state; | |
| 110 | struct _smc91c9x_state | |
| 109 | struct smc91c9x_state | |
| 111 | 110 | { |
| 112 | 111 | device_t *device; |
| 113 | 112 | smc91c9x_irq_func irq_handler; |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | typedef void (*smc91c9x_irq_func)(device_t *device, int state); |
| 20 | 20 | |
| 21 | 21 | |
| 22 | typedef struct _smc91c9x_config smc91c9x_config; | |
| 23 | struct _smc91c9x_config | |
| 22 | struct smc91c9x_config | |
| 24 | 23 | { |
| 25 | 24 | smc91c9x_irq_func interrupt; |
| 26 | 25 | }; |
| r17907 | r17908 | |
|---|---|---|
| 44 | 44 | TYPE DEFINITIONS |
| 45 | 45 | ***************************************************************************/ |
| 46 | 46 | |
| 47 | typedef struct _adc0831_state adc0831_state; | |
| 48 | struct _adc0831_state | |
| 47 | struct adc0831_state | |
| 49 | 48 | { |
| 50 | 49 | adc083x_input_convert_func input_callback_r; |
| 51 | 50 |
| r17907 | r17908 | |
|---|---|---|
| 101 | 101 | |
| 102 | 102 | typedef double (*adc083x_input_convert_func)(device_t *device, UINT8 input); |
| 103 | 103 | |
| 104 | typedef struct _adc083x_interface adc083x_interface; | |
| 105 | struct _adc083x_interface | |
| 104 | struct adc083x_interface | |
| 106 | 105 | { |
| 107 | 106 | adc083x_input_convert_func input_callback_r; |
| 108 | 107 | }; |
| r17907 | r17908 | |
|---|---|---|
| 25 | 25 | |
| 26 | 26 | // ======================> msm6242_interface |
| 27 | 27 | |
| 28 | typedef struct _msm6242_interface msm6242_interface; | |
| 29 | struct _msm6242_interface | |
| 28 | struct msm6242_interface | |
| 30 | 29 | { |
| 31 | 30 | devcb_write_line m_out_int_cb; |
| 32 | 31 | }; |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | TYPE DEFINITIONS |
| 16 | 16 | ***************************************************************************/ |
| 17 | 17 | |
| 18 | typedef struct _upd4701_state upd4701_state; | |
| 19 | struct _upd4701_state | |
| 18 | struct upd4701_state | |
| 20 | 19 | { |
| 21 | 20 | int cs; |
| 22 | 21 | int xy; |
| r17907 | r17908 | |
|---|---|---|
| 287 | 287 | TYPE DEFINITIONS |
| 288 | 288 | ***************************************************************************/ |
| 289 | 289 | |
| 290 | typedef struct _wd1770_state wd1770_state; | |
| 291 | struct _wd1770_state | |
| 290 | struct wd1770_state | |
| 292 | 291 | { |
| 293 | 292 | /* callbacks */ |
| 294 | 293 | devcb_resolved_read_line in_dden_func; |
| r17907 | r17908 | |
|---|---|---|
| 14 | 14 | TYPE DEFINITIONS |
| 15 | 15 | ***************************************************************************/ |
| 16 | 16 | |
| 17 | typedef struct _adc1038_state adc1038_state; | |
| 18 | struct _adc1038_state | |
| 17 | struct adc1038_state | |
| 19 | 18 | { |
| 20 | 19 | int cycle; |
| 21 | 20 | int clk; |
| r17907 | r17908 | |
|---|---|---|
| 233 | 233 | ***************************************************************************/ |
| 234 | 234 | |
| 235 | 235 | /* Interface */ |
| 236 | typedef struct _wd17xx_interface wd17xx_interface; | |
| 237 | struct _wd17xx_interface | |
| 236 | struct wd17xx_interface | |
| 238 | 237 | { |
| 239 | 238 | devcb_read_line in_dden_func; |
| 240 | 239 | devcb_write_line out_intrq_func; |
| r17907 | r17908 | |
|---|---|---|
| 73 | 73 | typedef int (*s3c24xx_core_pin_r_func)( device_t *device, int pin); |
| 74 | 74 | typedef void (*s3c24xx_core_pin_w_func)( device_t *device, int pin, int data); |
| 75 | 75 | |
| 76 | typedef struct _s3c2440_interface_core s3c2440_interface_core; | |
| 77 | struct _s3c2440_interface_core | |
| 76 | struct s3c2440_interface_core | |
| 78 | 77 | { |
| 79 | 78 | s3c24xx_core_pin_r_func pin_r; |
| 80 | 79 | s3c24xx_core_pin_w_func pin_w; |
| 81 | 80 | }; |
| 82 | 81 | |
| 83 | typedef struct _s3c2440_interface_gpio s3c2440_interface_gpio; | |
| 84 | struct _s3c2440_interface_gpio | |
| 82 | struct s3c2440_interface_gpio | |
| 85 | 83 | { |
| 86 | 84 | s3c24xx_gpio_port_r_func port_r; |
| 87 | 85 | s3c24xx_gpio_port_w_func port_w; |
| 88 | 86 | }; |
| 89 | 87 | |
| 90 | typedef struct _s3c2440_interface_i2c s3c2440_interface_i2c; | |
| 91 | struct _s3c2440_interface_i2c | |
| 88 | struct s3c2440_interface_i2c | |
| 92 | 89 | { |
| 93 | 90 | write_line_device_func scl_w; |
| 94 | 91 | read_line_device_func sda_r; |
| 95 | 92 | write_line_device_func sda_w; |
| 96 | 93 | }; |
| 97 | 94 | |
| 98 | typedef struct _s3c2440_interface_adc s3c2440_interface_adc; | |
| 99 | struct _s3c2440_interface_adc | |
| 95 | struct s3c2440_interface_adc | |
| 100 | 96 | { |
| 101 | 97 | read32_device_func data_r; |
| 102 | 98 | }; |
| 103 | 99 | |
| 104 | typedef struct _s3c2440_interface_i2s s3c2440_interface_i2s; | |
| 105 | struct _s3c2440_interface_i2s | |
| 100 | struct s3c2440_interface_i2s | |
| 106 | 101 | { |
| 107 | 102 | write16_device_func data_w; |
| 108 | 103 | }; |
| 109 | 104 | |
| 110 | typedef struct _s3c2440_interface_nand s3c2440_interface_nand; | |
| 111 | struct _s3c2440_interface_nand | |
| 105 | struct s3c2440_interface_nand | |
| 112 | 106 | { |
| 113 | 107 | write8_device_func command_w; |
| 114 | 108 | write8_device_func address_w; |
| r17907 | r17908 | |
| 116 | 110 | write8_device_func data_w; |
| 117 | 111 | }; |
| 118 | 112 | |
| 119 | typedef struct _s3c2440_interface_lcd s3c2440_interface_lcd; | |
| 120 | struct _s3c2440_interface_lcd | |
| 113 | struct s3c2440_interface_lcd | |
| 121 | 114 | { |
| 122 | 115 | int flags; |
| 123 | 116 | }; |
| 124 | 117 | |
| 125 | typedef struct _s3c2440_interface s3c2440_interface; | |
| 126 | struct _s3c2440_interface | |
| 118 | struct s3c2440_interface | |
| 127 | 119 | { |
| 128 | 120 | s3c2440_interface_core core; |
| 129 | 121 | s3c2440_interface_gpio gpio; |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | |
| 20 | 20 | typedef int (*adc1038_input_read_func)(device_t *device, int input); |
| 21 | 21 | |
| 22 | typedef struct _adc1038_interface adc1038_interface; | |
| 23 | struct _adc1038_interface | |
| 22 | struct adc1038_interface | |
| 24 | 23 | { |
| 25 | 24 | int gticlub_hack; |
| 26 | 25 | adc1038_input_read_func input_callback_r; |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | #include "sound/discrete.h" |
| 11 | 11 | #include "latch8.h" |
| 12 | 12 | |
| 13 | typedef struct _latch8_t latch8_t; | |
| 14 | struct _latch8_t | |
| 13 | struct latch8_t | |
| 15 | 14 | { |
| 16 | 15 | latch8_config *intf; |
| 17 | 16 | UINT8 value; |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | TYPE DEFINITIONS |
| 22 | 22 | ***************************************************************************/ |
| 23 | 23 | |
| 24 | typedef struct _latch8_devread latch8_devread; | |
| 25 | struct _latch8_devread | |
| 24 | struct latch8_devread | |
| 26 | 25 | { |
| 27 | 26 | /* only for byte reads, does not affect bit reads and node_map */ |
| 28 | 27 | UINT32 from_bit; |
| r17907 | r17908 | |
| 31 | 30 | read8_space_func read_handler; |
| 32 | 31 | }; |
| 33 | 32 | |
| 34 | typedef struct _latch8_config latch8_config; | |
| 35 | struct _latch8_config | |
| 33 | struct latch8_config | |
| 36 | 34 | { |
| 37 | 35 | /* only for byte reads, does not affect bit reads and node_map */ |
| 38 | 36 | UINT32 maskout; |
| r17907 | r17908 | |
|---|---|---|
| 7 | 7 | #include "emu.h" |
| 8 | 8 | #include "machine/mb14241.h" |
| 9 | 9 | |
| 10 | typedef struct _mb14241_state mb14241_state; | |
| 11 | struct _mb14241_state | |
| 10 | struct mb14241_state | |
| 12 | 11 | { |
| 13 | 12 | UINT16 shift_data; /* 15 bits only */ |
| 14 | 13 | UINT8 shift_count; /* 3 bits */ |
| r17907 | r17908 | |
|---|---|---|
| 103 | 103 | /*************************************************************************** |
| 104 | 104 | TYPE DEFINITIONS |
| 105 | 105 | ***************************************************************************/ |
| 106 | typedef struct _ide_device ide_device; | |
| 107 | struct _ide_device | |
| 106 | struct ide_device | |
| 108 | 107 | { |
| 109 | 108 | UINT16 cur_cylinder; |
| 110 | 109 | UINT8 cur_sector; |
| r17907 | r17908 | |
| 115 | 114 | }; |
| 116 | 115 | |
| 117 | 116 | |
| 118 | typedef struct _ide_state ide_state; | |
| 119 | struct _ide_state | |
| 117 | struct ide_state | |
| 120 | 118 | { |
| 121 | 119 | device_t *device; |
| 122 | 120 |
| r17907 | r17908 | |
|---|---|---|
| 42 | 42 | #include "machine/74148.h" |
| 43 | 43 | |
| 44 | 44 | |
| 45 | typedef struct _ttl74148_state ttl74148_state; | |
| 46 | struct _ttl74148_state | |
| 45 | struct ttl74148_state | |
| 47 | 46 | { |
| 48 | 47 | /* callback */ |
| 49 | 48 | void (*output_cb)(device_t *device); |
| r17907 | r17908 | |
|---|---|---|
| 130 | 130 | TYPE DEFINITIONS |
| 131 | 131 | ***************************************************************************/ |
| 132 | 132 | |
| 133 | typedef struct _ide_config ide_config; | |
| 134 | struct _ide_config | |
| 133 | struct ide_config | |
| 135 | 134 | { |
| 136 | 135 | void (*interrupt)(device_t *device, int state); |
| 137 | 136 | const char *bmcpu; /* name of bus master CPU */ |
| r17907 | r17908 | |
|---|---|---|
| 44 | 44 | #include "devlegcy.h" |
| 45 | 45 | |
| 46 | 46 | |
| 47 | typedef struct _ttl74148_config ttl74148_config; | |
| 48 | struct _ttl74148_config | |
| 47 | struct ttl74148_config | |
| 49 | 48 | { |
| 50 | 49 | void (*output_cb)(device_t *device); |
| 51 | 50 | }; |
| r17907 | r17908 | |
|---|---|---|
| 3 | 3 | |
| 4 | 4 | #include "devlegcy.h" |
| 5 | 5 | |
| 6 | typedef struct _duart68681_config duart68681_config; | |
| 7 | struct _duart68681_config | |
| 6 | struct duart68681_config | |
| 8 | 7 | { |
| 9 | 8 | void (*irq_handler)(device_t *device, int state, UINT8 vector); |
| 10 | 9 | void (*tx_callback)(device_t *device, int channel, UINT8 data); |
| r17907 | r17908 | |
|---|---|---|
| 48 | 48 | TYPE DEFINITIONS |
| 49 | 49 | ***************************************************************************/ |
| 50 | 50 | |
| 51 | typedef struct _upd4990a_state upd4990a_state; | |
| 52 | struct _upd4990a_state | |
| 51 | struct upd4990a_state | |
| 53 | 52 | { |
| 54 | 53 | int seconds; /* seconds BCD */ |
| 55 | 54 | int minutes; /* minutes BCD */ |
| r17907 | r17908 | |
|---|---|---|
| 65 | 65 | typedef int (*s3c24xx_core_pin_r_func)( device_t *device, int pin); |
| 66 | 66 | typedef void (*s3c24xx_core_pin_w_func)( device_t *device, int pin, int data); |
| 67 | 67 | |
| 68 | typedef struct _s3c2400_interface_core s3c2400_interface_core; | |
| 69 | struct _s3c2400_interface_core | |
| 68 | struct s3c2400_interface_core | |
| 70 | 69 | { |
| 71 | 70 | s3c24xx_core_pin_r_func pin_r; |
| 72 | 71 | s3c24xx_core_pin_w_func pin_w; |
| 73 | 72 | }; |
| 74 | 73 | |
| 75 | typedef struct _s3c2400_interface_gpio s3c2400_interface_gpio; | |
| 76 | struct _s3c2400_interface_gpio | |
| 74 | struct s3c2400_interface_gpio | |
| 77 | 75 | { |
| 78 | 76 | s3c24xx_gpio_port_r_func port_r; |
| 79 | 77 | s3c24xx_gpio_port_w_func port_w; |
| 80 | 78 | }; |
| 81 | 79 | |
| 82 | typedef struct _s3c2400_interface_i2c s3c2400_interface_i2c; | |
| 83 | struct _s3c2400_interface_i2c | |
| 80 | struct s3c2400_interface_i2c | |
| 84 | 81 | { |
| 85 | 82 | write_line_device_func scl_w; |
| 86 | 83 | read_line_device_func sda_r; |
| 87 | 84 | write_line_device_func sda_w; |
| 88 | 85 | }; |
| 89 | 86 | |
| 90 | typedef struct _s3c2400_interface_adc s3c2400_interface_adc; | |
| 91 | struct _s3c2400_interface_adc | |
| 87 | struct s3c2400_interface_adc | |
| 92 | 88 | { |
| 93 | 89 | read32_device_func data_r; |
| 94 | 90 | }; |
| 95 | 91 | |
| 96 | typedef struct _s3c2400_interface_i2s s3c2400_interface_i2s; | |
| 97 | struct _s3c2400_interface_i2s | |
| 92 | struct s3c2400_interface_i2s | |
| 98 | 93 | { |
| 99 | 94 | write16_device_func data_w; |
| 100 | 95 | }; |
| 101 | 96 | |
| 102 | typedef struct _s3c2400_interface_lcd s3c2400_interface_lcd; | |
| 103 | struct _s3c2400_interface_lcd | |
| 97 | struct s3c2400_interface_lcd | |
| 104 | 98 | { |
| 105 | 99 | int flags; |
| 106 | 100 | }; |
| 107 | 101 | |
| 108 | typedef struct _s3c2400_interface s3c2400_interface; | |
| 109 | struct _s3c2400_interface | |
| 102 | struct s3c2400_interface | |
| 110 | 103 | { |
| 111 | 104 | s3c2400_interface_core core; |
| 112 | 105 | s3c2400_interface_gpio gpio; |
| r17907 | r17908 | |
|---|---|---|
| 28 | 28 | TYPE DEFINITIONS |
| 29 | 29 | ***************************************************************************/ |
| 30 | 30 | |
| 31 | struct | |
| 31 | struct | |
| 32 | 32 | { |
| 33 | 33 | /* tickets and coin counters */ |
| 34 | 34 | UINT32 dispensed_tickets; |
| r17907 | r17908 | |
|---|---|---|
| 29 | 29 | TYPE DEFINITIONS |
| 30 | 30 | ***************************************************************************/ |
| 31 | 31 | |
| 32 | typedef struct _rp5h01_state rp5h01_state; | |
| 33 | struct _rp5h01_state | |
| 32 | struct rp5h01_state | |
| 34 | 33 | { |
| 35 | 34 | int counter; |
| 36 | 35 | int counter_mode; /* test pin */ |
| r17907 | r17908 | |
|---|---|---|
| 75 | 75 | typedef int (*s3c24xx_core_pin_r_func)( device_t *device, int pin); |
| 76 | 76 | typedef void (*s3c24xx_core_pin_w_func)( device_t *device, int pin, int data); |
| 77 | 77 | |
| 78 | typedef struct _s3c2410_interface_core s3c2410_interface_core; | |
| 79 | struct _s3c2410_interface_core | |
| 78 | struct s3c2410_interface_core | |
| 80 | 79 | { |
| 81 | 80 | s3c24xx_core_pin_r_func pin_r; |
| 82 | 81 | s3c24xx_core_pin_w_func pin_w; |
| 83 | 82 | }; |
| 84 | 83 | |
| 85 | typedef struct _s3c2410_interface_gpio s3c2410_interface_gpio; | |
| 86 | struct _s3c2410_interface_gpio | |
| 84 | struct s3c2410_interface_gpio | |
| 87 | 85 | { |
| 88 | 86 | s3c24xx_gpio_port_r_func port_r; |
| 89 | 87 | s3c24xx_gpio_port_w_func port_w; |
| 90 | 88 | }; |
| 91 | 89 | |
| 92 | typedef struct _s3c2410_interface_i2c s3c2410_interface_i2c; | |
| 93 | struct _s3c2410_interface_i2c | |
| 90 | struct s3c2410_interface_i2c | |
| 94 | 91 | { |
| 95 | 92 | write_line_device_func scl_w; |
| 96 | 93 | read_line_device_func sda_r; |
| 97 | 94 | write_line_device_func sda_w; |
| 98 | 95 | }; |
| 99 | 96 | |
| 100 | typedef struct _s3c2410_interface_adc s3c2410_interface_adc; | |
| 101 | struct _s3c2410_interface_adc | |
| 97 | struct s3c2410_interface_adc | |
| 102 | 98 | { |
| 103 | 99 | read32_device_func data_r; |
| 104 | 100 | }; |
| 105 | 101 | |
| 106 | typedef struct _s3c2410_interface_i2s s3c2410_interface_i2s; | |
| 107 | struct _s3c2410_interface_i2s | |
| 102 | struct s3c2410_interface_i2s | |
| 108 | 103 | { |
| 109 | 104 | write16_device_func data_w; |
| 110 | 105 | }; |
| 111 | 106 | |
| 112 | typedef struct _s3c2410_interface_nand s3c2410_interface_nand; | |
| 113 | struct _s3c2410_interface_nand | |
| 107 | struct s3c2410_interface_nand | |
| 114 | 108 | { |
| 115 | 109 | write8_device_func command_w; |
| 116 | 110 | write8_device_func address_w; |
| r17907 | r17908 | |
| 118 | 112 | write8_device_func data_w; |
| 119 | 113 | }; |
| 120 | 114 | |
| 121 | typedef struct _s3c2410_interface_lcd s3c2410_interface_lcd; | |
| 122 | struct _s3c2410_interface_lcd | |
| 115 | struct s3c2410_interface_lcd | |
| 123 | 116 | { |
| 124 | 117 | int flags; |
| 125 | 118 | }; |
| 126 | 119 | |
| 127 | typedef struct _s3c2410_interface s3c2410_interface; | |
| 128 | struct _s3c2410_interface | |
| 120 | struct s3c2410_interface | |
| 129 | 121 | { |
| 130 | 122 | s3c2410_interface_core core; |
| 131 | 123 | s3c2410_interface_gpio gpio; |
| r17907 | r17908 | |
|---|---|---|
| 106 | 106 | TYPE DEFINITIONS |
| 107 | 107 | ***************************************************************************/ |
| 108 | 108 | |
| 109 | typedef struct _tpi6525_state tpi6525_state; | |
| 110 | struct _tpi6525_state | |
| 109 | struct tpi6525_state | |
| 111 | 110 | { |
| 112 | 111 | devcb_resolved_write_line out_irq_func; |
| 113 | 112 | devcb_resolved_read8 in_pa_func; |
| r17907 | r17908 | |
|---|---|---|
| 34 | 34 | TYPE DEFINITIONS |
| 35 | 35 | ***************************************************************************/ |
| 36 | 36 | |
| 37 | typedef struct _tpi6525_interface tpi6525_interface; | |
| 38 | struct _tpi6525_interface | |
| 37 | struct tpi6525_interface | |
| 39 | 38 | { |
| 40 | 39 | devcb_write_line out_irq_func; |
| 41 | 40 |
| r17907 | r17908 | |
|---|---|---|
| 55 | 55 | #include "emu.h" |
| 56 | 56 | #include "k053252.h" |
| 57 | 57 | |
| 58 | typedef struct _k053252_state k053252_state; | |
| 59 | struct _k053252_state | |
| 58 | struct k053252_state | |
| 60 | 59 | { |
| 61 | 60 | UINT8 regs[16]; |
| 62 | 61 | UINT16 hc,hfp,hbp; |
| r17907 | r17908 | |
|---|---|---|
| 71 | 71 | #include "emu.h" |
| 72 | 72 | #include "machine/mb87078.h" |
| 73 | 73 | |
| 74 | typedef struct _mb87078_state mb87078_state; | |
| 75 | struct _mb87078_state | |
| 74 | struct mb87078_state | |
| 76 | 75 | { |
| 77 | 76 | int gain[4]; /* gain index 0-63,64,65 */ |
| 78 | 77 | int channel_latch; /* current channel */ |
| r17907 | r17908 | |
|---|---|---|
| 82 | 82 | UINT32 cycles_to_output; /* cycles until output callback called */ |
| 83 | 83 | }; |
| 84 | 84 | |
| 85 | typedef struct _pit8253_t pit8253_t; | |
| 86 | struct _pit8253_t | |
| 85 | struct pit8253_t | |
| 87 | 86 | { |
| 88 | const | |
| 87 | const | |
| 89 | 88 | int device_type; |
| 90 | | |
| 89 | | |
| 91 | 90 | }; |
| 92 | 91 | |
| 93 | 92 | #define CTRL_ACCESS(control) (((control) >> 4) & 0x03) |
| r17907 | r17908 | |
| 111 | 110 | } |
| 112 | 111 | |
| 113 | 112 | |
| 114 | static | |
| 113 | static | |
| 115 | 114 | { |
| 116 | 115 | which &= 3; |
| 117 | 116 | if (which < MAX_TIMER) |
| r17907 | r17908 | |
| 120 | 119 | } |
| 121 | 120 | |
| 122 | 121 | |
| 123 | static int pit8253_gate( | |
| 122 | static int pit8253_gate( | |
| 124 | 123 | { |
| 125 | 124 | if (!timer->in_gate_func.isnull()) |
| 126 | 125 | return timer->in_gate_func(); |
| r17907 | r17908 | |
| 159 | 158 | /* This function subtracts 1 from timer->value "cycles" times, taking into |
| 160 | 159 | account binary or BCD operation, and wrapping around from 0 to 0xFFFF or |
| 161 | 160 | 0x9999 as necessary. */ |
| 162 | static void decrease_counter_value( | |
| 161 | static void decrease_counter_value( | |
| 163 | 162 | { |
| 164 | 163 | UINT16 value; |
| 165 | 164 | int units, tens, hundreds, thousands; |
| r17907 | r17908 | |
| 215 | 214 | |
| 216 | 215 | |
| 217 | 216 | /* Counter loading: transfer of a count from the CR to the CE */ |
| 218 | static void load_counter_value(device_t *device, | |
| 217 | static void load_counter_value(device_t *device, | |
| 219 | 218 | { |
| 220 | 219 | timer->value = timer->count; |
| 221 | 220 | timer->null_count = 1; |
| r17907 | r17908 | |
| 224 | 223 | } |
| 225 | 224 | |
| 226 | 225 | |
| 227 | static void set_output(device_t *device, | |
| 226 | static void set_output(device_t *device, | |
| 228 | 227 | { |
| 229 | 228 | if (output != timer->output) |
| 230 | 229 | { |
| r17907 | r17908 | |
| 236 | 235 | |
| 237 | 236 | /* This emulates timer "timer" for "elapsed_cycles" cycles and assumes no |
| 238 | 237 | callbacks occur during that time. */ |
| 239 | static void simulate2(device_t *device, | |
| 238 | static void simulate2(device_t *device, | |
| 240 | 239 | { |
| 241 | 240 | UINT32 adjusted_value; |
| 242 | 241 | int bcd = CTRL_BCD(timer->control); |
| r17907 | r17908 | |
| 639 | 638 | inaccurate by more than one cycle, and the output changed multiple |
| 640 | 639 | times during the discrepancy. In practice updates should still be O(1). |
| 641 | 640 | */ |
| 642 | static void simulate(device_t *device, | |
| 641 | static void simulate(device_t *device, | |
| 643 | 642 | { |
| 644 | 643 | if ( elapsed_cycles > 0 ) |
| 645 | 644 | simulate2(device, timer, elapsed_cycles); |
| r17907 | r17908 | |
| 650 | 649 | |
| 651 | 650 | |
| 652 | 651 | /* This brings timer "timer" up to date */ |
| 653 | static void update(device_t *device, | |
| 652 | static void update(device_t *device, | |
| 654 | 653 | { |
| 655 | 654 | /* With the 82C54's maximum clockin of 10MHz, 64 bits is nearly 60,000 |
| 656 | 655 | years of time. Should be enough for now. */ |
| r17907 | r17908 | |
| 677 | 676 | { |
| 678 | 677 | device_t *device = (device_t *)ptr; |
| 679 | 678 | pit8253_t *pit8253 = get_safe_token(device); |
| 680 | | |
| 679 | | |
| 681 | 680 | |
| 682 | 681 | LOG2(("pit8253: output_changed(): timer %d\n",param)); |
| 683 | 682 | |
| r17907 | r17908 | |
| 688 | 687 | /* We recycle bit 0 of timer->value to hold the phase in mode 3 when count is |
| 689 | 688 | odd. Since read commands in mode 3 always return even numbers, we need to |
| 690 | 689 | mask this bit off. */ |
| 691 | static UINT16 masked_value( | |
| 690 | static UINT16 masked_value( | |
| 692 | 691 | { |
| 693 | 692 | LOG2(("pit8253: masked_value\n")); |
| 694 | 693 | |
| r17907 | r17908 | |
| 705 | 704 | READ8_DEVICE_HANDLER( pit8253_r ) |
| 706 | 705 | { |
| 707 | 706 | pit8253_t *pit8253 = get_safe_token(device); |
| 708 | | |
| 707 | | |
| 709 | 708 | UINT8 data; |
| 710 | 709 | UINT16 value; |
| 711 | 710 | |
| r17907 | r17908 | |
| 773 | 772 | |
| 774 | 773 | |
| 775 | 774 | /* Loads a new value from the bus to the count register (CR) */ |
| 776 | static void load_count(device_t *device, | |
| 775 | static void load_count(device_t *device, | |
| 777 | 776 | { |
| 778 | 777 | int mode = CTRL_MODE(timer->control); |
| 779 | 778 | |
| r17907 | r17908 | |
| 806 | 805 | } |
| 807 | 806 | |
| 808 | 807 | |
| 809 | static void readback(device_t *device, | |
| 808 | static void readback(device_t *device, | |
| 810 | 809 | { |
| 811 | 810 | UINT16 value; |
| 812 | 811 | update(device, timer); |
| r17907 | r17908 | |
| 861 | 860 | WRITE8_DEVICE_HANDLER( pit8253_w ) |
| 862 | 861 | { |
| 863 | 862 | pit8253_t *pit8253 = get_safe_token(device); |
| 864 | | |
| 863 | | |
| 865 | 864 | int read_command; |
| 866 | 865 | |
| 867 | 866 | LOG2(("pit8253_w(): offset=%d data=0x%02x\n", offset, data)); |
| r17907 | r17908 | |
| 984 | 983 | static void pit8253_gate_w(device_t *device, int gate, int state) |
| 985 | 984 | { |
| 986 | 985 | pit8253_t *pit8253 = get_safe_token(device); |
| 987 | | |
| 986 | | |
| 988 | 987 | |
| 989 | 988 | LOG2(("pit8253_gate_w(): gate=%d state=%d\n", gate, state)); |
| 990 | 989 | |
| r17907 | r17908 | |
| 1022 | 1021 | int pit8253_get_output(device_t *device, int timerno) |
| 1023 | 1022 | { |
| 1024 | 1023 | pit8253_t *pit8253 = get_safe_token(device); |
| 1025 | | |
| 1024 | | |
| 1026 | 1025 | int result; |
| 1027 | 1026 | |
| 1028 | 1027 | update(device, timer); |
| r17907 | r17908 | |
| 1036 | 1035 | void pit8253_set_clockin(device_t *device, int timerno, double new_clockin) |
| 1037 | 1036 | { |
| 1038 | 1037 | pit8253_t *pit8253 = get_safe_token(device); |
| 1039 | | |
| 1038 | | |
| 1040 | 1039 | |
| 1041 | 1040 | LOG2(("pit8253_set_clockin(): PIT timer=%d, clockin = %lf\n", timerno,new_clockin)); |
| 1042 | 1041 | |
| r17907 | r17908 | |
| 1049 | 1048 | static void pit8253_set_clock_signal(device_t *device, int timerno, int state) |
| 1050 | 1049 | { |
| 1051 | 1050 | pit8253_t *pit8253 = get_safe_token(device); |
| 1052 | | |
| 1051 | | |
| 1053 | 1052 | |
| 1054 | 1053 | LOG2(("pit8253_set_clock_signal(): PIT timer=%d, state = %d\n", timerno, state)); |
| 1055 | 1054 | |
| r17907 | r17908 | |
| 1077 | 1076 | /* register for state saving */ |
| 1078 | 1077 | for (timerno = 0; timerno < MAX_TIMER; timerno++) |
| 1079 | 1078 | { |
| 1080 | | |
| 1079 | | |
| 1081 | 1080 | |
| 1082 | 1081 | /* initialize timer */ |
| 1083 | 1082 | timer->clockin = pit8253->config->timer[timerno].clockin; |
| r17907 | r17908 | |
| 1127 | 1126 | |
| 1128 | 1127 | for (i = 0; i < MAX_TIMER; i++) |
| 1129 | 1128 | { |
| 1130 | | |
| 1129 | | |
| 1131 | 1130 | /* According to Intel's 8254 docs, the state of a timer is undefined |
| 1132 | 1131 | until the first mode control word is written. Here we define this |
| 1133 | 1132 | undefined behaviour */ |
| r17907 | r17908 | |
|---|---|---|
| 30 | 30 | |
| 31 | 31 | |
| 32 | 32 | |
| 33 | typedef struct _k053252_interface k053252_interface; | |
| 34 | struct _k053252_interface | |
| 33 | struct k053252_interface | |
| 35 | 34 | { |
| 36 | 35 | const char *screen; |
| 37 | 36 | devcb_write_line int1_en; |
| r17907 | r17908 | |
|---|---|---|
| 18 | 18 | |
| 19 | 19 | typedef void (*mb87078_gain_changed_cb)(running_machine &machine, int channel, int percent /*, float decibels*/); |
| 20 | 20 | |
| 21 | typedef struct _mb87078_interface mb87078_interface; | |
| 22 | struct _mb87078_interface | |
| 21 | struct mb87078_interface | |
| 23 | 22 | { |
| 24 | 23 | mb87078_gain_changed_cb gain_changed_cb; |
| 25 | 24 | }; |
| r17907 | r17908 | |
|---|---|---|
| 26 | 26 | TYPE DEFINITIONS |
| 27 | 27 | ***************************************************************************/ |
| 28 | 28 | |
| 29 | typedef struct _machine_entry machine_entry; | |
| 30 | struct _machine_entry | |
| 29 | struct machine_entry | |
| 31 | 30 | { |
| 32 | 31 | machine_entry * next; |
| 33 | 32 | running_machine * machine; |
| r17907 | r17908 | |
|---|---|---|
| 55 | 55 | //************************************************************************** |
| 56 | 56 | |
| 57 | 57 | // forward declarations |
| 58 | typedef struct _zip_file_header zip_file_header; | |
| 59 | typedef struct _zip_file zip_file; | |
| 58 | struct zip_file_header; | |
| 59 | struct zip_file; | |
| 60 | 60 | |
| 61 | typedef struct __7z_file_header _7z_file_header; | |
| 62 | typedef struct __7z_file _7z_file; | |
| 61 | struct _7z_file_header; | |
| 62 | struct _7z_file; | |
| 63 | 63 | |
| 64 | 64 | // ======================> path_iterator |
| 65 | 65 |
| r17907 | r17908 | |
|---|---|---|
| 108 | 108 | TYPE DEFINITIONS |
| 109 | 109 | ***************************************************************************/ |
| 110 | 110 | |
| 111 | typedef struct _adjustment adjustment; | |
| 112 | struct _adjustment | |
| 111 | struct adjustment | |
| 113 | 112 | { |
| 114 | 113 | int visible; |
| 115 | 114 | int lower; |
| r17907 | r17908 | |
|---|---|---|
| 48 | 48 | ***************************************************************************/ |
| 49 | 49 | |
| 50 | 50 | /* object to track dirty states */ |
| 51 | typedef struct _dirty_state dirty_state; | |
| 52 | struct _dirty_state | |
| 51 | struct dirty_state | |
| 53 | 52 | { |
| 54 | 53 | UINT32 * dirty; /* bitmap of dirty entries */ |
| 55 | 54 | UINT32 mindirty; /* minimum dirty entry */ |
| r17907 | r17908 | |
|---|---|---|
| 107 | 107 | TYPE DEFINITIONS |
| 108 | 108 | ***************************************************************************/ |
| 109 | 109 | |
| 110 | typedef struct _avi_chunk avi_chunk; | |
| 111 | struct _avi_chunk | |
| 110 | struct avi_chunk | |
| 112 | 111 | { |
| 113 | 112 | UINT64 offset; /* file offset of chunk header */ |
| 114 | 113 | UINT64 size; /* size of this chunk */ |
| r17907 | r17908 | |
| 117 | 116 | }; |
| 118 | 117 | |
| 119 | 118 | |
| 120 | typedef struct _avi_chunk_list avi_chunk_list; | |
| 121 | struct _avi_chunk_list | |
| 119 | struct avi_chunk_list | |
| 122 | 120 | { |
| 123 | 121 | UINT64 offset; /* offset in the file of header */ |
| 124 | 122 | UINT32 length; /* length of the chunk including header */ |
| 125 | 123 | }; |
| 126 | 124 | |
| 127 | 125 | |
| 128 | typedef struct _huffyuv_table huffyuv_table; | |
| 129 | struct _huffyuv_table | |
| 126 | struct huffyuv_table | |
| 130 | 127 | { |
| 131 | 128 | UINT8 shift[256]; /* bit shift amounts */ |
| 132 | 129 | UINT32 bits[256]; /* bit match values */ |
| r17907 | r17908 | |
| 136 | 133 | }; |
| 137 | 134 | |
| 138 | 135 | |
| 139 | typedef struct _huffyuv_data huffyuv_data; | |
| 140 | struct _huffyuv_data | |
| 136 | struct huffyuv_data | |
| 141 | 137 | { |
| 142 | 138 | UINT8 predictor; /* predictor */ |
| 143 | 139 | huffyuv_table table[3]; /* array of tables */ |
| 144 | 140 | }; |
| 145 | 141 | |
| 146 | 142 | |
| 147 | typedef struct _avi_stream avi_stream; | |
| 148 | struct _avi_stream | |
| 143 | struct avi_stream | |
| 149 | 144 | { |
| 150 | 145 | UINT32 type; /* subtype of stream */ |
| 151 | 146 | UINT32 format; /* format of stream data */ |
| r17907 | r17908 | |
|---|---|---|
| 92 | 92 | |
| 93 | 93 | typedef struct _cdrom_file cdrom_file; |
| 94 | 94 | |
| 95 | ||
| 96 | 95 | struct cdrom_track_info |
| 97 | 96 | { |
| 98 | 97 | /* fields used by CHDMAN and in MAME */ |
| r17907 | r17908 | |
|---|---|---|
| 107 | 107 | typedef struct _avi_file avi_file; |
| 108 | 108 | |
| 109 | 109 | |
| 110 | typedef struct _avi_movie_info avi_movie_info; | |
| 111 | struct _avi_movie_info | |
| 110 | struct avi_movie_info | |
| 112 | 111 | { |
| 113 | 112 | UINT32 video_format; /* format of video data */ |
| 114 | 113 | UINT32 video_timescale; /* timescale for video data */ |
| r17907 | r17908 | |
|---|---|---|
| 57 | 57 | OPTIONTYPE_ENUM_VALUE |
| 58 | 58 | }; |
| 59 | 59 | |
| 60 | typedef struct _option_guide option_guide; | |
| 61 | struct _option_guide | |
| 60 | struct option_guide | |
| 62 | 61 | { |
| 63 | 62 | enum option_type option_type; |
| 64 | 63 | int parameter; |
| r17907 | r17908 | |
|---|---|---|
| 87 | 87 | TYPE DEFINITIONS |
| 88 | 88 | ***************************************************************************/ |
| 89 | 89 | |
| 90 | typedef struct _vbi_metadata vbi_metadata; | |
| 91 | struct _vbi_metadata | |
| 90 | struct vbi_metadata | |
| 92 | 91 | { |
| 93 | 92 | UINT8 white; /* white flag: on or off */ |
| 94 | 93 | UINT32 line16; /* line 16 code */ |
| r17907 | r17908 | |
|---|---|---|
| 50 | 50 | TYPE DEFINITIONS |
| 51 | 51 | ***************************************************************************/ |
| 52 | 52 | |
| 53 | typedef struct _image_data_chunk image_data_chunk; | |
| 54 | struct _image_data_chunk | |
| 53 | struct image_data_chunk | |
| 55 | 54 | { |
| 56 | 55 | image_data_chunk * next; |
| 57 | 56 | int length; |
| r17907 | r17908 | |
| 59 | 58 | }; |
| 60 | 59 | |
| 61 | 60 | |
| 62 | typedef struct _png_private png_private; | |
| 63 | struct _png_private | |
| 61 | struct png_private | |
| 64 | 62 | { |
| 65 | 63 | png_info * pnginfo; |
| 66 | 64 | image_data_chunk * idata; |
| r17907 | r17908 | |
|---|---|---|
| 109 | 109 | TYPE DEFINITIONS |
| 110 | 110 | ***************************************************************************/ |
| 111 | 111 | |
| 112 | typedef struct _png_text png_text; | |
| 113 | struct _png_text | |
| 112 | struct png_text | |
| 114 | 113 | { |
| 115 | 114 | png_text * next; |
| 116 | 115 | const char * keyword; /* this is allocated */ |
| r17907 | r17908 | |
| 118 | 117 | }; |
| 119 | 118 | |
| 120 | 119 | |
| 121 | typedef struct _png_info png_info; | |
| 122 | struct _png_info | |
| 120 | struct png_info | |
| 123 | 121 | { |
| 124 | 122 | UINT8 * image; |
| 125 | 123 | UINT32 width, height; |
| r17907 | r17908 | |
|---|---|---|
| 65 | 65 | TYPE DEFINITIONS |
| 66 | 66 | ***************************************************************************/ |
| 67 | 67 | |
| 68 | typedef struct _parse_info parse_info; | |
| 69 | struct _parse_info | |
| 68 | struct parse_info | |
| 70 | 69 | { |
| 71 | 70 | UINT16 checksum; /* checksum value */ |
| 72 | 71 | UINT32 explicit_numfuses; /* explicitly specified number of fuses */ |
| r17907 | r17908 | |
|---|---|---|
| 54 | 54 | TYPE DEFINITIONS |
| 55 | 55 | ***************************************************************************/ |
| 56 | 56 | |
| 57 | typedef struct _xml_parse_info xml_parse_info; | |
| 58 | struct _xml_parse_info | |
| 57 | struct xml_parse_info | |
| 59 | 58 | { |
| 60 | 59 | XML_Parser parser; |
| 61 | 60 | xml_data_node * rootnode; |
| r17907 | r17908 | |
|---|---|---|
| 62 | 62 | TYPE DEFINITIONS |
| 63 | 63 | ***************************************************************************/ |
| 64 | 64 | |
| 65 | typedef struct _jed_data jed_data; | |
| 66 | struct _jed_data | |
| 65 | struct jed_data | |
| 67 | 66 | { |
| 68 | 67 | UINT32 numfuses; /* number of defined fuses */ |
| 69 | 68 | UINT8 fusemap[JED_MAX_FUSES / 8];/* array of bit-packed data */ |
| r17907 | r17908 | |
|---|---|---|
| 75 | 75 | |
| 76 | 76 | |
| 77 | 77 | /* a node representing an attribute */ |
| 78 | typedef struct _xml_attribute_node xml_attribute_node; | |
| 79 | struct _xml_attribute_node | |
| 78 | struct xml_attribute_node | |
| 80 | 79 | { |
| 81 | 80 | xml_attribute_node * next; /* pointer to next attribute node */ |
| 82 | 81 | const char * name; /* pointer to copy of tag name */ |
| r17907 | r17908 | |
| 85 | 84 | |
| 86 | 85 | |
| 87 | 86 | /* a node representing a data item and its relationships */ |
| 88 | typedef struct _xml_data_node xml_data_node; | |
| 89 | struct _xml_data_node | |
| 87 | struct xml_data_node | |
| 90 | 88 | { |
| 91 | 89 | xml_data_node * next; /* pointer to next sibling node */ |
| 92 | 90 | xml_data_node * parent; /* pointer to parent node */ |
| r17907 | r17908 | |
| 99 | 97 | |
| 100 | 98 | |
| 101 | 99 | /* extended error information from parsing */ |
| 102 | typedef struct _xml_parse_error xml_parse_error; | |
| 103 | struct _xml_parse_error | |
| 100 | struct xml_parse_error | |
| 104 | 101 | { |
| 105 | 102 | const char * error_message; |
| 106 | 103 | int error_line; |
| r17907 | r17908 | |
| 109 | 106 | |
| 110 | 107 | |
| 111 | 108 | /* parsing options */ |
| 112 | typedef struct _xml_parse_options xml_parse_options; | |
| 113 | struct _xml_parse_options | |
| 109 | struct xml_parse_options | |
| 114 | 110 | { |
| 115 | 111 | xml_parse_error * error; |
| 116 | 112 | void (*init_parser)(struct XML_ParserStruct *parser); |
| r17907 | r17908 | |
|---|---|---|
| 120 | 120 | ***************************************************************************/ |
| 121 | 121 | |
| 122 | 122 | /* describes an open _7Z file */ |
| 123 | typedef struct __7z_file _7z_file; | |
| 124 | struct __7z_file | |
| 123 | struct _7z_file | |
| 125 | 124 | { |
| 126 | 125 | const char * filename; /* copy of _7Z filename (for caching) */ |
| 127 | 126 |
| r17907 | r17908 | |
|---|---|---|
| 58 | 58 | ***************************************************************************/ |
| 59 | 59 | |
| 60 | 60 | /* an object type entry */ |
| 61 | typedef struct _objtype_entry objtype_entry; | |
| 62 | struct _objtype_entry | |
| 61 | struct objtype_entry | |
| 63 | 62 | { |
| 64 | 63 | objtype_entry * next; |
| 65 | 64 | UINT32 type; |
| r17907 | r17908 | |
| 69 | 68 | |
| 70 | 69 | |
| 71 | 70 | /* an entry in a pool */ |
| 72 | typedef struct _object_entry object_entry; | |
| 73 | struct _object_entry | |
| 71 | struct object_entry | |
| 74 | 72 | { |
| 75 | 73 | object_entry * next; |
| 76 | 74 | object_entry * globalnext; |
| r17907 | r17908 | |
| 84 | 82 | |
| 85 | 83 | |
| 86 | 84 | /* a block of entry items */ |
| 87 | typedef struct _object_entry_block object_entry_block; | |
| 88 | struct _object_entry_block | |
| 85 | struct object_entry_block | |
| 89 | 86 | { |
| 90 | 87 | object_entry_block *next; |
| 91 | 88 | object_entry entry[OBJECT_ENTRY_BLOCK]; |
| r17907 | r17908 | |
|---|---|---|
| 73 | 73 | ***************************************************************************/ |
| 74 | 74 | |
| 75 | 75 | /* contains extracted file header information */ |
| 76 | typedef struct _zip_file_header zip_file_header; | |
| 77 | struct _zip_file_header | |
| 76 | struct zip_file_header | |
| 78 | 77 | { |
| 79 | 78 | UINT32 signature; /* central file header signature */ |
| 80 | 79 | UINT16 version_created; /* version made by */ |
| r17907 | r17908 | |
| 102 | 101 | |
| 103 | 102 | |
| 104 | 103 | /* contains extracted end of central directory information */ |
| 105 | typedef struct _zip_ecd zip_ecd; | |
| 106 | struct _zip_ecd | |
| 104 | struct zip_ecd | |
| 107 | 105 | { |
| 108 | 106 | UINT32 signature; /* end of central dir signature */ |
| 109 | 107 | UINT16 disk_number; /* number of this disk */ |
| r17907 | r17908 | |
| 121 | 119 | |
| 122 | 120 | |
| 123 | 121 | /* describes an open ZIP file */ |
| 124 | typedef struct _zip_file zip_file; | |
| 125 | struct _zip_file | |
| 122 | struct zip_file | |
| 126 | 123 | { |
| 127 | 124 | const char * filename; /* copy of ZIP filename (for caching) */ |
| 128 | 125 | osd_file * file; /* OSD file handle */ |
| r17907 | r17908 | |
|---|---|---|
| 82 | 82 | typedef enum _text_file_type text_file_type; |
| 83 | 83 | |
| 84 | 84 | |
| 85 | typedef struct _zlib_data zlib_data; | |
| 86 | struct _zlib_data | |
| 85 | struct zlib_data | |
| 87 | 86 | { |
| 88 | 87 | z_stream stream; |
| 89 | 88 | UINT8 buffer[1024]; |
| r17907 | r17908 | |
|---|---|---|
| 241 | 241 | |
| 242 | 242 | |
| 243 | 243 | |
| 244 | typedef struct _imgtool_partition_info imgtool_partition_info; | |
| 245 | struct _imgtool_partition_info | |
| 244 | struct imgtool_partition_info | |
| 246 | 245 | { |
| 247 | 246 | imgtool_get_info get_info; |
| 248 | 247 | UINT64 base_block; |
| r17907 | r17908 | |
| 334 | 333 | |
| 335 | 334 | |
| 336 | 335 | |
| 337 | typedef struct _imgtool_module imgtool_module; | |
| 338 | struct _imgtool_module | |
| 336 | struct imgtool_module | |
| 339 | 337 | { |
| 340 | 338 | imgtool_module *previous; |
| 341 | 339 | imgtool_module *next; |
| r17907 | r17908 | |
|---|---|---|
| 50 | 50 | * --------------------------------------------------------------------------- |
| 51 | 51 | */ |
| 52 | 52 | |
| 53 | typedef struct _imgtool_module_features imgtool_module_features; | |
| 54 | struct _imgtool_module_features | |
| 53 | struct imgtool_module_features | |
| 55 | 54 | { |
| 56 | 55 | unsigned int supports_create : 1; |
| 57 | 56 | unsigned int supports_open : 1; |
| r17907 | r17908 | |
| 60 | 59 | unsigned int is_read_only : 1; |
| 61 | 60 | }; |
| 62 | 61 | |
| 63 | typedef struct _imgtool_partition_features imgtool_partition_features; | |
| 64 | struct _imgtool_partition_features | |
| 62 | struct imgtool_partition_features | |
| 65 | 63 | { |
| 66 | 64 | unsigned int supports_reading : 1; |
| 67 | 65 | unsigned int supports_writing : 1; |
| r17907 | r17908 | |
|---|---|---|
| 36 | 36 | TYPE DEFINITIONS |
| 37 | 37 | ***************************************************************************/ |
| 38 | 38 | |
| 39 | typedef struct _basictoken_tableent basictoken_tableent; | |
| 40 | struct _basictoken_tableent | |
| 39 | struct basictoken_tableent | |
| 41 | 40 | { |
| 42 | 41 | UINT8 shift; |
| 43 | 42 | UINT8 base; |
| r17907 | r17908 | |
| 47 | 46 | |
| 48 | 47 | |
| 49 | 48 | |
| 50 | typedef struct _basictokens basictokens; | |
| 51 | struct _basictokens | |
| 49 | struct basictokens | |
| 52 | 50 | { |
| 53 | 51 | UINT16 baseaddress; |
| 54 | 52 | unsigned int skip_bytes : 15; |
| r17907 | r17908 | |
|---|---|---|
| 70 | 70 | extern void fat_get_info(const imgtool_class *imgclass, UINT32 state, union imgtoolinfo *info); |
| 71 | 71 | |
| 72 | 72 | |
| 73 | typedef struct _pc_chd_image_info pc_chd_image_info; | |
| 74 | struct _pc_chd_image_info | |
| 73 | struct pc_chd_image_info | |
| 75 | 74 | { |
| 76 | 75 | struct mess_hard_disk_file hard_disk; |
| 77 | 76 |
| r17907 | r17908 | |
|---|---|---|
| 131 | 131 | #define ROOTDIR_BLOCK 2 |
| 132 | 132 | #define BLOCK_SIZE 512 |
| 133 | 133 | |
| 134 | typedef struct _prodos_diskinfo prodos_diskinfo; | |
| 135 | struct _prodos_diskinfo | |
| 134 | struct prodos_diskinfo | |
| 136 | 135 | { |
| 137 | 136 | imgtoolerr_t (*load_block)(imgtool_image *image, int block, void *buffer); |
| 138 | 137 | imgtoolerr_t (*save_block)(imgtool_image *image, int block, const void *buffer); |
| r17907 | r17908 | |
| 142 | 141 | UINT16 total_blocks; |
| 143 | 142 | }; |
| 144 | 143 | |
| 145 | typedef struct _prodos_direnum prodos_direnum; | |
| 146 | struct _prodos_direnum | |
| 144 | struct prodos_direnum | |
| 147 | 145 | { |
| 148 | 146 | UINT32 block; |
| 149 | 147 | UINT32 index; |
| 150 | 148 | UINT8 block_data[BLOCK_SIZE]; |
| 151 | 149 | }; |
| 152 | 150 | |
| 153 | typedef struct _prodos_dirent prodos_dirent; | |
| 154 | struct _prodos_dirent | |
| 151 | struct prodos_dirent | |
| 155 | 152 | { |
| 156 | 153 | char filename[16]; |
| 157 | 154 | UINT8 storage_type; |
| r17907 | r17908 | |
|---|---|---|
| 20 | 20 | CREATE_DIR |
| 21 | 21 | } creation_policy_t; |
| 22 | 22 | |
| 23 | typedef struct _os9_diskinfo os9_diskinfo; | |
| 24 | struct _os9_diskinfo | |
| 23 | struct os9_diskinfo | |
| 25 | 24 | { |
| 26 | 25 | UINT32 total_sectors; |
| 27 | 26 | UINT32 sectors_per_track; |
| r17907 | r17908 | |
|---|---|---|
| 144 | 144 | |
| 145 | 145 | #define LOG(x) |
| 146 | 146 | |
| 147 | typedef struct _fat_partition_info fat_partition_info; | |
| 148 | struct _fat_partition_info | |
| 147 | struct fat_partition_info | |
| 149 | 148 | { |
| 150 | 149 | UINT32 fat_bits; |
| 151 | 150 | UINT32 sectors_per_cluster; |
| r17907 | r17908 | |
| 158 | 157 | UINT32 total_clusters; |
| 159 | 158 | }; |
| 160 | 159 | |
| 161 | typedef struct _fat_file fat_file; | |
| 162 | struct _fat_file | |
| 160 | struct fat_file | |
| 163 | 161 | { |
| 164 | 162 | unsigned int root : 1; |
| 165 | 163 | unsigned int directory : 1; |
| r17907 | r17908 | |
| 174 | 172 | UINT32 dirent_sector_offset; |
| 175 | 173 | }; |
| 176 | 174 | |
| 177 | typedef struct _fat_dirent fat_dirent; | |
| 178 | struct _fat_dirent | |
| 175 | struct fat_dirent | |
| 179 | 176 | { |
| 180 | 177 | char long_filename[512]; |
| 181 | 178 | char short_filename[13]; |
| r17907 | r17908 | |
| 189 | 186 | time_t lastmodified_time; |
| 190 | 187 | }; |
| 191 | 188 | |
| 192 | typedef struct _fat_freeentry_info fat_freeentry_info; | |
| 193 | struct _fat_freeentry_info | |
| 189 | struct fat_freeentry_info | |
| 194 | 190 | { |
| 195 | 191 | UINT32 required_size; |
| 196 | 192 | UINT32 candidate_position; |
| 197 | 193 | UINT32 position; |
| 198 | 194 | }; |
| 199 | 195 | |
| 200 | typedef struct _fat_mediatype fat_mediatype; | |
| 201 | struct _fat_mediatype | |
| 196 | struct fat_mediatype | |
| 202 | 197 | { |
| 203 | 198 | UINT8 media_descriptor; |
| 204 | 199 | UINT8 heads; |
| r17907 | r17908 | |
|---|---|---|
| 67 | 67 | } sec_type; |
| 68 | 68 | |
| 69 | 69 | |
| 70 | typedef struct _amiga_date amiga_date; | |
| 71 | struct _amiga_date | |
| 70 | struct amiga_date | |
| 72 | 71 | { |
| 73 | 72 | UINT32 days; /* days since 1 jan 78 */ |
| 74 | 73 | UINT32 mins; /* minutes past midnight */ |
| r17907 | r17908 | |
| 76 | 75 | }; |
| 77 | 76 | |
| 78 | 77 | |
| 79 | typedef struct _root_block root_block; | |
| 80 | struct _root_block | |
| 78 | struct root_block | |
| 81 | 79 | { |
| 82 | 80 | UINT32 ht_size; /* Hash table size in long */ |
| 83 | 81 | UINT32 chksum; /* Rootblock checksum */ |
| r17907 | r17908 | |
| 93 | 91 | }; |
| 94 | 92 | |
| 95 | 93 | |
| 96 | typedef struct _bitmap_block bitmap_block; | |
| 97 | struct _bitmap_block | |
| 94 | struct bitmap_block | |
| 98 | 95 | { |
| 99 | 96 | UINT32 chksum; /* checksum, normal algorithm */ |
| 100 | 97 | UINT32 map[MSIZE]; /* bitmap */ |
| 101 | 98 | }; |
| 102 | 99 | |
| 103 | 100 | |
| 104 | typedef struct _bitmap_ext_block bitmap_ext_block; | |
| 105 | struct _bitmap_ext_block | |
| 101 | struct bitmap_ext_block | |
| 106 | 102 | { |
| 107 | 103 | UINT32 map[MSIZE]; /* bitmap */ |
| 108 | 104 | UINT32 next; /* next extension block */ |
| 109 | 105 | }; |
| 110 | 106 | |
| 111 | 107 | |
| 112 | typedef struct _file_block file_block; | |
| 113 | struct _file_block | |
| 108 | struct file_block | |
| 114 | 109 | { |
| 115 | 110 | UINT32 header_key; /* self pointer (to this block) */ |
| 116 | 111 | UINT32 high_seq; /* number of data block ptr stored here */ |
| r17907 | r17908 | |
| 134 | 129 | }; |
| 135 | 130 | |
| 136 | 131 | |
| 137 | typedef struct _file_ext_block file_ext_block; | |
| 138 | struct _file_ext_block | |
| 132 | struct file_ext_block | |
| 139 | 133 | { |
| 140 | 134 | UINT32 header_key; /* self pointer (to this block) */ |
| 141 | 135 | UINT32 high_seq; /* number of data block ptr stored here */ |
| r17907 | r17908 | |
| 146 | 140 | }; |
| 147 | 141 | |
| 148 | 142 | |
| 149 | typedef struct _data_block data_block; | |
| 150 | struct _data_block | |
| 143 | struct data_block | |
| 151 | 144 | { |
| 152 | 145 | UINT32 header_key; /* self pointer (to this block) */ |
| 153 | 146 | UINT32 seq_num; /* file data block number */ |
| r17907 | r17908 | |
| 158 | 151 | }; |
| 159 | 152 | |
| 160 | 153 | |
| 161 | typedef struct _dir_block dir_block; | |
| 162 | struct _dir_block | |
| 154 | struct dir_block | |
| 163 | 155 | { |
| 164 | 156 | UINT32 header_key; /* self pointer (to this block) */ |
| 165 | 157 | UINT32 chksum; /* same algorithm as rootblock */ |
| r17907 | r17908 | |
| 179 | 171 | }; |
| 180 | 172 | |
| 181 | 173 | |
| 182 | typedef struct _hardlink_block hardlink_block; | |
| 183 | struct _hardlink_block | |
| 174 | struct hardlink_block | |
| 184 | 175 | { |
| 185 | 176 | UINT32 header_key; /* self pointer (to this block) */ |
| 186 | 177 | UINT32 chksum; /* same algorithm as rootblock */ |
| r17907 | r17908 | |
| 198 | 189 | }; |
| 199 | 190 | |
| 200 | 191 | |
| 201 | typedef struct _softlink_block softlink_block; | |
| 202 | struct _softlink_block | |
| 192 | struct softlink_block | |
| 203 | 193 | { |
| 204 | 194 | UINT32 header_key; /* self pointer (to this block) */ |
| 205 | 195 | UINT32 chksum; /* same algorithm as rootblock */ |
| r17907 | r17908 | |
| 216 | 206 | |
| 217 | 207 | |
| 218 | 208 | /* Basic Amiga floppy disk image info */ |
| 219 | typedef struct _amiga_floppy amiga_floppy; | |
| 220 | struct _amiga_floppy | |
| 209 | struct amiga_floppy | |
| 221 | 210 | { |
| 222 | 211 | imgtool_stream *stream; |
| 223 | 212 | UINT8 sectors; |
| r17907 | r17908 | |
| 225 | 214 | |
| 226 | 215 | |
| 227 | 216 | /* iterator used to walk through directory entries */ |
| 228 | typedef struct _amiga_iterator amiga_iterator; | |
| 229 | struct _amiga_iterator | |
| 217 | struct amiga_iterator | |
| 230 | 218 | { |
| 231 | 219 | unsigned int index; /* current file index */ |
| 232 | 220 | int block; /* block number we are iterating */ |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | |
| 11 | 11 | #include <zlib.h> |
| 12 | 12 | |
| 13 | typedef struct _cybiko_file_system cybiko_file_system; | |
| 14 | struct _cybiko_file_system | |
| 13 | struct cybiko_file_system | |
| 15 | 14 | { |
| 16 | 15 | imgtool_stream *stream; |
| 17 | 16 | UINT32 page_count, page_size, block_count_boot, block_count_file; |
| 18 | 17 | UINT16 write_count; |
| 19 | 18 | }; |
| 20 | 19 | |
| 21 | typedef struct _cybiko_iter cybiko_iter; | |
| 22 | struct _cybiko_iter | |
| 20 | struct cybiko_iter | |
| 23 | 21 | { |
| 24 | 22 | UINT16 block; |
| 25 | 23 | }; |
| 26 | 24 | |
| 27 | typedef struct _cfs_file cfs_file; | |
| 28 | struct _cfs_file | |
| 25 | struct cfs_file | |
| 29 | 26 | { |
| 30 | 27 | char name[64]; // name of the file |
| 31 | 28 | UINT32 date; // date/time of the file (seconds since 1900/01/01) |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | |
| 11 | 11 | #include <zlib.h> |
| 12 | 12 | |
| 13 | typedef struct _cybiko_file_system cybiko_file_system; | |
| 14 | struct _cybiko_file_system | |
| 13 | struct cybiko_file_system | |
| 15 | 14 | { |
| 16 | 15 | imgtool_stream *stream; |
| 17 | 16 | UINT32 page_count, page_size, block_count_boot, block_count_file; |
| 18 | 17 | UINT16 write_count; |
| 19 | 18 | }; |
| 20 | 19 | |
| 21 | typedef struct _cybiko_iter cybiko_iter; | |
| 22 | struct _cybiko_iter | |
| 20 | struct cybiko_iter | |
| 23 | 21 | { |
| 24 | 22 | UINT16 block; |
| 25 | 23 | }; |
| 26 | 24 | |
| 27 | typedef struct _cfs_file cfs_file; | |
| 28 | struct _cfs_file | |
| 25 | struct cfs_file | |
| 29 | 26 | { |
| 30 | 27 | char name[64]; // name of the file |
| 31 | 28 | UINT32 date; // date/time of the file (seconds since 1900/01/01) |
| r17907 | r17908 | |
|---|---|---|
| 30 | 30 | TYPE DEFINITIONS |
| 31 | 31 | ***************************************************************************/ |
| 32 | 32 | |
| 33 | typedef struct _mac_sound mac_sound; | |
| 34 | struct _mac_sound | |
| 33 | struct mac_sound | |
| 35 | 34 | { |
| 36 | 35 | sound_stream *mac_stream; |
| 37 | 36 | int sample_enable; |
| r17907 | r17908 | |
|---|---|---|
| 7 | 7 | #include "cpu/upd7810/upd7810.h" |
| 8 | 8 | #include "includes/gmaster.h" |
| 9 | 9 | |
| 10 | typedef struct _gmaster_sound gmaster_sound; | |
| 11 | struct _gmaster_sound | |
| 10 | struct gmaster_sound | |
| 12 | 11 | { |
| 13 | 12 | /*bool*/int level; |
| 14 | 13 | sound_stream *mixer_channel; |
| r17907 | r17908 | |
|---|---|---|
| 118 | 118 | #define STATE_TONE 2 |
| 119 | 119 | #define STATE_ADPCM 3 |
| 120 | 120 | |
| 121 | typedef struct _upd1771_state upd1771_state; | |
| 122 | struct _upd1771_state | |
| 121 | struct upd1771_state | |
| 123 | 122 | { |
| 124 | 123 | sound_stream *channel; |
| 125 | 124 | devcb_resolved_write_line ack_out_func; |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | #include "includes/vc4000.h" |
| 9 | 9 | |
| 10 | 10 | |
| 11 | typedef struct _vc4000_sound vc4000_sound; | |
| 12 | struct _vc4000_sound | |
| 11 | struct vc4000_sound | |
| 13 | 12 | { |
| 14 | 13 | sound_stream *channel; |
| 15 | 14 | UINT8 reg[1]; |
| r17907 | r17908 | |
|---|---|---|
| 13 | 13 | TYPE DEFINITIONS |
| 14 | 14 | ***************************************************************************/ |
| 15 | 15 | |
| 16 | typedef struct _upd1771_interface upd1771_interface; | |
| 17 | struct _upd1771_interface | |
| 16 | struct upd1771_interface | |
| 18 | 17 | { |
| 19 | 18 | devcb_write_line ack_callback; |
| 20 | 19 | }; |
| r17907 | r17908 | |
|---|---|---|
| 3 | 3 | |
| 4 | 4 | static const int max_amplitude = 0x7fff; |
| 5 | 5 | |
| 6 | typedef struct _channelf_sound_state channelf_sound_state; | |
| 7 | struct _channelf_sound_state | |
| 6 | struct channelf_sound_state | |
| 8 | 7 | { |
| 9 | 8 | sound_stream *channel; |
| 10 | 9 | int sound_mode; |
| r17907 | r17908 | |
|---|---|---|
| 28 | 28 | TYPE DEFINITIONS |
| 29 | 29 | ***************************************************************************/ |
| 30 | 30 | |
| 31 | typedef struct _dave_t dave_t; | |
| 32 | struct _dave_t | |
| 31 | struct dave_t | |
| 33 | 32 | { |
| 34 | 33 | devcb_resolved_read8 reg_r; |
| 35 | 34 | devcb_resolved_write8 reg_w; |
| r17907 | r17908 | |
|---|---|---|
| 34 | 34 | |
| 35 | 35 | /* ---------- configuration ------------ */ |
| 36 | 36 | |
| 37 | typedef struct _mea8000_interface mea8000_interface; | |
| 38 | struct _mea8000_interface | |
| 37 | struct mea8000_interface | |
| 39 | 38 | { |
| 40 | 39 | /* output channel */ |
| 41 | 40 | const char * channel; |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | |
| 10 | 10 | #include "includes/special.h" |
| 11 | 11 | |
| 12 | typedef struct _specimx_sound_state specimx_sound_state; | |
| 13 | struct _specimx_sound_state | |
| 12 | struct specimx_sound_state | |
| 14 | 13 | { |
| 15 | 14 | sound_stream *mixer_channel; |
| 16 | 15 | int specimx_input[3]; |
| r17907 | r17908 | |
|---|---|---|
| 57 | 57 | #include "audio/t6721.h" |
| 58 | 58 | |
| 59 | 59 | |
| 60 | typedef struct _t6721_state t6721_state; | |
| 61 | struct _t6721_state | |
| 60 | struct t6721_state | |
| 62 | 61 | { |
| 63 | 62 | emu_timer *timer; |
| 64 | 63 |
| r17907 | r17908 | |
|---|---|---|
| 60 | 60 | TYPE DEFINITIONS |
| 61 | 61 | ***************************************************************************/ |
| 62 | 62 | |
| 63 | typedef struct _dave_interface dave_interface; | |
| 64 | struct _dave_interface | |
| 63 | struct dave_interface | |
| 65 | 64 | { |
| 66 | 65 | devcb_read8 reg_r; |
| 67 | 66 | devcb_write8 reg_w; |
| r17907 | r17908 | |
|---|---|---|
| 147 | 147 | }; |
| 148 | 148 | |
| 149 | 149 | |
| 150 | typedef struct _gb_sound_t gb_sound_t; | |
| 151 | struct _gb_sound_t | |
| 150 | struct gb_sound_t | |
| 152 | 151 | { |
| 153 | 152 | sound_stream *channel; |
| 154 | 153 | int rate; |
| r17907 | r17908 | |
|---|---|---|
| 99 | 99 | int count; |
| 100 | 100 | } LYNX_AUDIO; |
| 101 | 101 | |
| 102 | typedef struct _lynx_sound_state lynx_sound_state; | |
| 103 | struct _lynx_sound_state | |
| 102 | struct lynx_sound_state | |
| 104 | 103 | { |
| 105 | 104 | sound_stream *mixer_channel; |
| 106 | 105 | float usec_per_sample; |
| r17907 | r17908 | |
|---|---|---|
| 45 | 45 | int count; |
| 46 | 46 | } SVISION_CHANNEL; |
| 47 | 47 | |
| 48 | typedef struct _svision_sound_state svision_sound_state; | |
| 49 | struct _svision_sound_state | |
| 48 | struct svision_sound_state | |
| 50 | 49 | { |
| 51 | 50 | sound_stream *mixer_channel; |
| 52 | 51 | SVISION_DMA dma; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | |
| 23 | 23 | typedef void (*omti8621_set_irq)(const running_machine*, int); |
| 24 | 24 | |
| 25 | typedef struct _omti8621_config omti8621_config; | |
| 26 | struct _omti8621_config { | |
| 25 | struct omti8621_config { | |
| 27 | 26 | omti8621_set_irq set_irq; |
| 28 | 27 | }; |
| 29 | 28 |
| r17907 | r17908 | |
|---|---|---|
| 188 | 188 | |
| 189 | 189 | void generic_keyboard_device::device_config_complete() |
| 190 | 190 | { |
| 191 | const | |
| 191 | const | |
| 192 | 192 | if(intf != NULL) |
| 193 | 193 | { |
| 194 | *static_cast< | |
| 194 | *static_cast< | |
| 195 | 195 | } |
| 196 | 196 | else |
| 197 | 197 | { |
| r17907 | r17908 | |
|---|---|---|
| 41 | 41 | }; |
| 42 | 42 | typedef enum _cococart_line_value cococart_line_value; |
| 43 | 43 | |
| 44 | typedef struct _coco_cartridge_line coco_cartridge_line; | |
| 45 | struct _coco_cartridge_line | |
| 44 | struct coco_cartridge_line | |
| 46 | 45 | { |
| 47 | 46 | emu_timer *timer[TIMER_POOL]; |
| 48 | 47 | int timer_index; |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | TYPE DEFINITIONS |
| 9 | 9 | ***************************************************************************/ |
| 10 | 10 | |
| 11 | typedef struct _keyboard_interface keyboard_interface; | |
| 12 | struct _keyboard_interface | |
| 11 | struct keyboard_interface | |
| 13 | 12 | { |
| 14 | 13 | devcb_write8 m_keyboard_cb; |
| 15 | 14 | }; |
| r17907 | r17908 | |
| 40 | 39 | |
| 41 | 40 | class generic_keyboard_device : |
| 42 | 41 | public device_t, |
| 43 | public | |
| 42 | public | |
| 44 | 43 | { |
| 45 | 44 | public: |
| 46 | 45 | generic_keyboard_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock); |
| r17907 | r17908 | |
|---|---|---|
| 296 | 296 | } |
| 297 | 297 | #endif |
| 298 | 298 | |
| 299 | typedef struct _a800_pcb a800_pcb; | |
| 300 | struct _a800_pcb | |
| 299 | struct a800_pcb | |
| 301 | 300 | { |
| 302 | 301 | const char *pcb_name; |
| 303 | 302 | int pcb_id; |
| r17907 | r17908 | |
|---|---|---|
| 38 | 38 | TYPE DEFINITIONS |
| 39 | 39 | ***************************************************************************/ |
| 40 | 40 | |
| 41 | typedef struct _mos6530_port mos6530_port; | |
| 42 | struct _mos6530_port | |
| 41 | struct mos6530_port | |
| 43 | 42 | { |
| 44 | 43 | devcb_resolved_read8 in_port_func; |
| 45 | 44 | devcb_resolved_write8 out_port_func; |
| r17907 | r17908 | |
| 50 | 49 | }; |
| 51 | 50 | |
| 52 | 51 | |
| 53 | typedef struct _mos6530_state mos6530_state; | |
| 54 | struct _mos6530_state | |
| 52 | struct mos6530_state | |
| 55 | 53 | { |
| 56 | 54 | devcb_resolved_write_line out_irq_func; |
| 57 | 55 |
| r17907 | r17908 | |
|---|---|---|
| 69 | 69 | TYPE DEFINITIONS |
| 70 | 70 | ***************************************************************************/ |
| 71 | 71 | |
| 72 | typedef struct _mos6530_interface mos6530_interface; | |
| 73 | struct _mos6530_interface | |
| 72 | struct mos6530_interface | |
| 74 | 73 | { |
| 75 | 74 | devcb_read8 in_pa_func; |
| 76 | 75 | devcb_write8 out_pa_func; |
| r17907 | r17908 | |
|---|---|---|
| 53 | 53 | |
| 54 | 54 | /* ---------- configuration ------------ */ |
| 55 | 55 | |
| 56 | typedef struct _mc6854_interface mc6854_interface; | |
| 57 | struct _mc6854_interface | |
| 56 | struct mc6854_interface | |
| 58 | 57 | { |
| 59 | 58 | devcb_write_line out_irq_func; /* interrupt request */ |
| 60 | 59 |
| r17907 | r17908 | |
|---|---|---|
| 11 | 11 | TYPE DEFINITIONS |
| 12 | 12 | ***************************************************************************/ |
| 13 | 13 | |
| 14 | typedef struct _smartmedia_cartslot_config smartmedia_cartslot_config; | |
| 15 | struct _smartmedia_cartslot_config | |
| 14 | struct smartmedia_cartslot_config | |
| 16 | 15 | { |
| 17 | 16 | const char * interface; |
| 18 | 17 | }; |
| r17907 | r17908 | |
| 47 | 46 | #define NAND_CHIP_K9F1G08U0B { 5, { 0xEC, 0xF1, 0x00, 0x95, 0x40 }, 2048, 64, 64, 1024, 2, 2, 0 } /* K9F1G08U0B */ |
| 48 | 47 | #define NAND_CHIP_K9LAG08U0M { 5, { 0xEC, 0xD5, 0x55, 0x25, 0x68 }, 2048, 64, 128, 8192, 2, 3, 0 } /* K9LAG08U0M */ |
| 49 | 48 | |
| 50 | typedef struct _nand_chip nand_chip; | |
| 51 | struct _nand_chip | |
| 49 | struct nand_chip | |
| 52 | 50 | { |
| 53 | 51 | int id_len; |
| 54 | 52 | UINT8 id[5]; |
| r17907 | r17908 | |
|---|---|---|
| 32 | 32 | |
| 33 | 33 | /* ---------- configuration ------------ */ |
| 34 | 34 | |
| 35 | typedef struct _mc6846_interface mc6846_interface; | |
| 36 | struct _mc6846_interface | |
| 35 | struct mc6846_interface | |
| 37 | 36 | { |
| 38 | 37 | /* CPU write to the outside through chip */ |
| 39 | 38 | write8_device_func out_port_func; /* 8-bit output */ |
| r17907 | r17908 | |
|---|---|---|
| 18 | 18 | TYPE DEFINITIONS |
| 19 | 19 | ***************************************************************************/ |
| 20 | 20 | |
| 21 | typedef struct _sst39vfx_t sst39vfx_t; | |
| 22 | struct _sst39vfx_t | |
| 21 | struct sst39vfx_t | |
| 23 | 22 | { |
| 24 | 23 | UINT8 *data; |
| 25 | 24 | UINT32 size; |
| r17907 | r17908 | |
|---|---|---|
| 18 | 18 | TYPE DEFINITIONS |
| 19 | 19 | ***************************************************************************/ |
| 20 | 20 | |
| 21 | typedef struct _sst39vfx_config sst39vfx_config; | |
| 22 | struct _sst39vfx_config | |
| 21 | struct sst39vfx_config | |
| 23 | 22 | { |
| 24 | 23 | int cpu_datawidth; |
| 25 | 24 | int cpu_endianess; |
| r17907 | r17908 | |
|---|---|---|
| 97 | 97 | UINT8 mask; |
| 98 | 98 | }; |
| 99 | 99 | |
| 100 | typedef struct _upd71071_t upd71071_t; | |
| 101 | struct _upd71071_t | |
| 100 | struct upd71071_t | |
| 102 | 101 | { |
| 103 | 102 | struct upd71071_reg reg; |
| 104 | 103 | int selected_channel; |
| r17907 | r17908 | |
|---|---|---|
| 3 | 3 | |
| 4 | 4 | #include "emu.h" |
| 5 | 5 | |
| 6 | typedef struct _upd71071_interface upd71071_intf; | |
| 7 | struct _upd71071_interface | |
| 6 | struct upd71071_intf | |
| 8 | 7 | { |
| 9 | 8 | const char* cputag; |
| 10 | 9 | int clock; |
| r17907 | r17908 | |
|---|---|---|
| 12 | 12 | TYPE DEFINITIONS |
| 13 | 13 | ***************************************************************************/ |
| 14 | 14 | |
| 15 | typedef struct _e05a03_state e05a03_state; | |
| 16 | struct _e05a03_state | |
| 15 | struct e05a03_state | |
| 17 | 16 | { |
| 18 | 17 | /* 24-bit shift register, port 0x00, 0x01 and 0x02 */ |
| 19 | 18 | UINT32 shift; |
| r17907 | r17908 | |
|---|---|---|
| 14 | 14 | TYPE DEFINITIONS |
| 15 | 15 | ***************************************************************************/ |
| 16 | 16 | |
| 17 | typedef struct _e05a03_interface e05a03_interface; | |
| 18 | struct _e05a03_interface | |
| 17 | struct e05a03_interface | |
| 19 | 18 | { |
| 20 | 19 | devcb_read8 in_data_func; |
| 21 | 20 |
| r17907 | r17908 | |
|---|---|---|
| 44 | 44 | unsigned int wp : 1; /* TRUE if tape is write-protected */ |
| 45 | 45 | } tape_unit_t; |
| 46 | 46 | |
| 47 | typedef struct _tap_990_t tap_990_t; | |
| 48 | struct _tap_990_t | |
| 47 | struct tap_990_t | |
| 49 | 48 | { |
| 50 | 49 | UINT16 w[8]; |
| 51 | 50 | |
| r17907 | r17908 | |
| 54 | 53 | tape_unit_t t[MAX_TAPE_UNIT]; |
| 55 | 54 | }; |
| 56 | 55 | |
| 57 | typedef struct _ti990_tape_t ti990_tape_t; | |
| 58 | struct _ti990_tape_t | |
| 56 | struct ti990_tape_t | |
| 59 | 57 | { |
| 60 | 58 | int dummy; |
| 61 | 59 | }; |
| r17907 | r17908 | |
|---|---|---|
| 8 | 8 | TYPE DEFINITIONS |
| 9 | 9 | ***************************************************************************/ |
| 10 | 10 | |
| 11 | typedef struct _ti990_tpc_interface ti990_tpc_interface; | |
| 12 | struct _ti990_tpc_interface | |
| 11 | struct ti990_tpc_interface | |
| 13 | 12 | { |
| 14 | 13 | void (*interrupt_callback)(running_machine &machine, int state); |
| 15 | 14 | }; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | } ds1315_mode_t; |
| 23 | 23 | |
| 24 | 24 | |
| 25 | typedef struct _ds1315_t ds1315_t; | |
| 26 | struct _ds1315_t | |
| 25 | struct ds1315_t | |
| 27 | 26 | { |
| 28 | 27 | int count; |
| 29 | 28 | ds1315_mode_t mode; |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | TYPE DEFINITIONS |
| 22 | 22 | ***************************************************************************/ |
| 23 | 23 | |
| 24 | typedef struct _pc_lpt_state pc_lpt_state; | |
| 25 | struct _pc_lpt_state | |
| 24 | struct pc_lpt_state | |
| 26 | 25 | { |
| 27 | 26 | centronics_device *centronics; |
| 28 | 27 |
| r17907 | r17908 | |
|---|---|---|
| 15 | 15 | TYPE DEFINITIONS |
| 16 | 16 | ***************************************************************************/ |
| 17 | 17 | |
| 18 | typedef struct _pc_lpt_interface pc_lpt_interface; | |
| 19 | struct _pc_lpt_interface | |
| 18 | struct pc_lpt_interface | |
| 20 | 19 | { |
| 21 | 20 | devcb_write_line out_irq_func; |
| 22 | 21 | }; |
| r17907 | r17908 | |
|---|---|---|
| 63 | 63 | typedef UINT32 (*s3c44b0_gpio_port_r_func)( device_t *device, int port); |
| 64 | 64 | typedef void (*s3c44b0_gpio_port_w_func)( device_t *device, int port, UINT32 data); |
| 65 | 65 | |
| 66 | typedef struct _s3c44b0_interface_gpio s3c44b0_interface_gpio; | |
| 67 | struct _s3c44b0_interface_gpio | |
| 66 | struct s3c44b0_interface_gpio | |
| 68 | 67 | { |
| 69 | 68 | s3c44b0_gpio_port_r_func port_r; |
| 70 | 69 | s3c44b0_gpio_port_w_func port_w; |
| 71 | 70 | }; |
| 72 | 71 | |
| 73 | typedef struct _s3c44b0_interface_i2c s3c44b0_interface_i2c; | |
| 74 | struct _s3c44b0_interface_i2c | |
| 72 | struct s3c44b0_interface_i2c | |
| 75 | 73 | { |
| 76 | 74 | write_line_device_func scl_w; |
| 77 | 75 | read_line_device_func sda_r; |
| 78 | 76 | write_line_device_func sda_w; |
| 79 | 77 | }; |
| 80 | 78 | |
| 81 | typedef struct _s3c44b0_interface_adc s3c44b0_interface_adc; | |
| 82 | struct _s3c44b0_interface_adc | |
| 79 | struct s3c44b0_interface_adc | |
| 83 | 80 | { |
| 84 | 81 | read32_device_func data_r; |
| 85 | 82 | }; |
| 86 | 83 | |
| 87 | typedef struct _s3c44b0_interface_i2s s3c44b0_interface_i2s; | |
| 88 | struct _s3c44b0_interface_i2s | |
| 84 | struct s3c44b0_interface_i2s | |
| 89 | 85 | { |
| 90 | 86 | write16_device_func data_w; |
| 91 | 87 | }; |
| 92 | 88 | |
| 93 | typedef struct _s3c44b0_interface s3c44b0_interface; | |
| 94 | struct _s3c44b0_interface | |
| 89 | struct s3c44b0_interface | |
| 95 | 90 | { |
| 96 | 91 | s3c44b0_interface_gpio gpio; |
| 97 | 92 | s3c44b0_interface_i2c i2c; |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | |
| 7 | 7 | ****************************************************************************************/ |
| 8 | 8 | |
| 9 | typedef struct _nes_mmc nes_mmc; | |
| 10 | struct _nes_mmc | |
| 9 | struct nes_mmc | |
| 11 | 10 | { |
| 12 | 11 | int iNesMapper; /* iNES Mapper # */ |
| 13 | 12 | int pcb_id; |
| r17907 | r17908 | |
|---|---|---|
| 62 | 62 | TYPE DEFINITIONS |
| 63 | 63 | ***************************************************************************/ |
| 64 | 64 | |
| 65 | typedef struct _micropolis_state micropolis_state; | |
| 66 | struct _micropolis_state | |
| 65 | struct micropolis_state | |
| 67 | 66 | { |
| 68 | 67 | /* register */ |
| 69 | 68 | UINT8 data; |
| r17907 | r17908 | |
|---|---|---|
| 45 | 45 | ***************************************************************************/ |
| 46 | 46 | |
| 47 | 47 | /* Interface */ |
| 48 | typedef struct _micropolis_interface micropolis_interface; | |
| 49 | struct _micropolis_interface | |
| 48 | struct micropolis_interface | |
| 50 | 49 | { |
| 51 | 50 | devcb_read_line in_dden_func; |
| 52 | 51 | devcb_write_line out_intrq_func; |
| r17907 | r17908 | |
|---|---|---|
| 30 | 30 | TYPE DEFINITIONS |
| 31 | 31 | ***************************************************************************/ |
| 32 | 32 | |
| 33 | typedef struct _tf20_state tf20_state; | |
| 34 | struct _tf20_state | |
| 33 | struct tf20_state | |
| 35 | 34 | { |
| 36 | 35 | ram_device *ram; |
| 37 | 36 | device_t *upd765a; |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | ***************************************************************************/ |
| 18 | 18 | |
| 19 | 19 | #if 0 |
| 20 | typedef struct _tf20_interface tf20_interface; | |
| 21 | struct _tf20_interface | |
| 20 | struct tf20_interface | |
| 22 | 21 | { |
| 23 | 22 | }; |
| 24 | 23 | #endif |
| r17907 | r17908 | |
|---|---|---|
| 6 | 6 | |
| 7 | 7 | #include "hd63450.h" |
| 8 | 8 | |
| 9 | typedef struct _hd63450_regs hd63450_regs; | |
| 10 | struct _hd63450_regs | |
| 9 | struct hd63450_regs | |
| 11 | 10 | { // offsets in bytes |
| 12 | 11 | unsigned char csr; // [00] Channel status register (R/W) |
| 13 | 12 | unsigned char cer; // [01] Channel error register (R) |
| r17907 | r17908 | |
| 29 | 28 | unsigned char gcr; // [3f] General Control Register (R/W) |
| 30 | 29 | }; |
| 31 | 30 | |
| 32 | typedef struct _hd63450_t hd63450_t; | |
| 33 | struct _hd63450_t | |
| 31 | struct hd63450_t | |
| 34 | 32 | { |
| 35 | 33 | hd63450_regs reg[4]; |
| 36 | 34 | emu_timer* timer[4]; // for timing data reading/writing each channel |
| r17907 | r17908 | |
|---|---|---|
| 4 | 4 | |
| 5 | 5 | #include "emu.h" |
| 6 | 6 | |
| 7 | typedef struct _hd63450_interface hd63450_intf; | |
| 8 | struct _hd63450_interface | |
| 7 | struct hd63450_intf | |
| 9 | 8 | { |
| 10 | 9 | const char *cpu_tag; |
| 11 | 10 | attotime clock[4]; |
| r17907 | r17908 | |
|---|---|---|
| 64 | 64 | } |
| 65 | 65 | }; |
| 66 | 66 | |
| 67 | typedef struct _kr2376_t kr2376_t; | |
| 68 | struct _kr2376_t | |
| 67 | struct kr2376_t | |
| 69 | 68 | { |
| 70 | 69 | const kr2376_interface *intf; |
| 71 | 70 | int pins[41]; |
| r17907 | r17908 | |
|---|---|---|
| 79 | 79 | } kr2376_output_pin_t; |
| 80 | 80 | |
| 81 | 81 | /* interface */ |
| 82 | typedef struct _kr2376_interface kr2376_interface; | |
| 83 | struct _kr2376_interface | |
| 82 | struct kr2376_interface | |
| 84 | 83 | { |
| 85 | 84 | /* The clock of the chip (Typical 50 kHz) */ |
| 86 | 85 | int clock; |
| r17907 | r17908 | |
|---|---|---|
| 119 | 119 | TYPE DEFINITIONS |
| 120 | 120 | ***************************************************************************/ |
| 121 | 121 | |
| 122 | typedef struct _applefdc_token applefdc_token; | |
| 123 | struct _applefdc_token | |
| 122 | struct applefdc_token | |
| 124 | 123 | { |
| 125 | 124 | /* data that is constant for the lifetime of the emulation */ |
| 126 | 125 | emu_timer *motor_timer; |
| r17907 | r17908 | |
|---|---|---|
| 86 | 86 | TYPE DEFINITIONS |
| 87 | 87 | ***************************************************************************/ |
| 88 | 88 | |
| 89 | typedef struct _applefdc_interface applefdc_interface; | |
| 90 | struct _applefdc_interface | |
| 89 | struct applefdc_interface | |
| 91 | 90 | { |
| 92 | 91 | void (*set_lines)(device_t *device, UINT8 lines); |
| 93 | 92 | void (*set_enable_lines)(device_t *device, int enable_mask); |
| r17907 | r17908 | |
|---|---|---|
| 84 | 84 | |
| 85 | 85 | #define UPD765_BAD_MEDIA 0x100 |
| 86 | 86 | |
| 87 | typedef struct _upd765_t upd765_t; | |
| 88 | struct _upd765_t | |
| 87 | struct upd765_t | |
| 89 | 88 | { |
| 90 | 89 | devcb_resolved_write_line out_int_func; |
| 91 | 90 | devcb_resolved_write_line out_drq_func; |
| r17907 | r17908 | |
|---|---|---|
| 58 | 58 | UINT32 size, pos; |
| 59 | 59 | } AT45DBXX_IO; |
| 60 | 60 | |
| 61 | typedef struct _at45dbxx_t at45dbxx_t; | |
| 62 | struct _at45dbxx_t | |
| 61 | struct at45dbxx_t | |
| 63 | 62 | { |
| 64 | 63 | UINT8 *data; |
| 65 | 64 | UINT32 size; |
| r17907 | r17908 | |
|---|---|---|
| 19 | 19 | |
| 20 | 20 | |
| 21 | 21 | /* interface */ |
| 22 | typedef struct _sam6883_interface sam6883_interface; | |
| 23 | struct _sam6883_interface | |
| 22 | struct sam6883_interface | |
| 24 | 23 | { |
| 25 | 24 | /* the CPU/space from which the SAM reads data */ |
| 26 | 25 | const char * m_cpu_tag; |
| r17907 | r17908 | |
|---|---|---|
| 81 | 81 | TYPE DEFINITIONS |
| 82 | 82 | ***************************************************************************/ |
| 83 | 83 | |
| 84 | typedef struct _kb_keytr_state kb_keytr_state; | |
| 85 | struct _kb_keytr_state | |
| 84 | struct kb_keytr_state | |
| 86 | 85 | { |
| 87 | 86 | device_t *cpu; |
| 88 | 87 |
| r17907 | r17908 | |
|---|---|---|
| 333 | 333 | |
| 334 | 334 | void generic_terminal_device::device_config_complete() |
| 335 | 335 | { |
| 336 | const | |
| 336 | const | |
| 337 | 337 | if(intf != NULL) |
| 338 | 338 | { |
| 339 | *static_cast< | |
| 339 | *static_cast< | |
| 340 | 340 | } |
| 341 | 341 | else |
| 342 | 342 | { |
| r17907 | r17908 | |
|---|---|---|
| 10 | 10 | TYPE DEFINITIONS |
| 11 | 11 | ***************************************************************************/ |
| 12 | 12 | |
| 13 | typedef struct _terminal_interface terminal_interface; | |
| 14 | struct _terminal_interface | |
| 13 | struct terminal_interface | |
| 15 | 14 | { |
| 16 | 15 | devcb_write8 m_keyboard_cb; |
| 17 | 16 | }; |
| r17907 | r17908 | |
| 49 | 48 | |
| 50 | 49 | class generic_terminal_device : |
| 51 | 50 | public device_t, |
| 52 | public | |
| 51 | public | |
| 53 | 52 | { |
| 54 | 53 | public: |
| 55 | 54 | generic_terminal_device(const machine_config &mconfig, device_type type, const char *name, const char *tag, device_t *owner, UINT32 clock); |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | TYPE DEFINITIONS |
| 22 | 22 | ***************************************************************************/ |
| 23 | 23 | |
| 24 | typedef struct _er59256_t er59256_t; | |
| 25 | struct _er59256_t | |
| 24 | struct er59256_t | |
| 26 | 25 | { |
| 27 | 26 | /* The actual memory */ |
| 28 | 27 | UINT16 eerom[EEROM_WORDS]; |
| r17907 | r17908 | |
|---|---|---|
| 4 | 4 | |
| 5 | 5 | ****************************************************************************************/ |
| 6 | 6 | |
| 7 | typedef struct _nes_pcb nes_pcb; | |
| 8 | struct _nes_pcb | |
| 7 | struct nes_pcb | |
| 9 | 8 | { |
| 10 | 9 | const char *pcb_name; |
| 11 | 10 | int pcb_id; |
| r17907 | r17908 | |
| 11894 | 11893 | const char *read_name; |
| 11895 | 11894 | }; |
| 11896 | 11895 | |
| 11897 | typedef struct _nes_pcb_intf nes_pcb_intf; | |
| 11898 | struct _nes_pcb_intf | |
| 11896 | struct nes_pcb_intf | |
| 11899 | 11897 | { |
| 11900 | 11898 | int mmc_pcb; |
| 11901 | 11899 | nes_memory_accessor mmc_l; /* $4100-$5fff read/write routines */ |
| r17907 | r17908 | |
|---|---|---|
| 9 | 9 | { |
| 10 | 10 | } |
| 11 | 11 | |
| 12 | static | |
| 12 | static | |
| 13 | 13 | { |
| 14 | 14 | DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, null_modem_device, read), |
| 15 | 15 | BITBANGER_MODEM, |
| r17907 | r17908 | |
|---|---|---|
| 18 | 18 | TYPE DEFINITIONS |
| 19 | 19 | ***************************************************************************/ |
| 20 | 20 | |
| 21 | typedef struct _pf10_state pf10_state; | |
| 22 | struct _pf10_state | |
| 21 | struct pf10_state | |
| 23 | 22 | { |
| 24 | 23 | UINT8 dummy; |
| 25 | 24 | }; |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | ***************************************************************************/ |
| 18 | 18 | |
| 19 | 19 | #if 0 |
| 20 | typedef struct _pf10_interface pf10_interface; | |
| 21 | struct _pf10_interface | |
| 20 | struct pf10_interface | |
| 22 | 21 | { |
| 23 | 22 | }; |
| 24 | 23 | #endif |
| r17907 | r17908 | |
|---|---|---|
| 62 | 62 | #define IRQ_VOLUME_RAMP 0x40 |
| 63 | 63 | #define IRQ_DRAM_TC_DMA 0x80 |
| 64 | 64 | |
| 65 | struct | |
| 65 | struct | |
| 66 | 66 | { |
| 67 | 67 | UINT8 voice_ctrl; |
| 68 | 68 | UINT16 freq_ctrl; |
| r17907 | r17908 | |
| 79 | 79 | bool rollover; |
| 80 | 80 | INT16 sample; // current sample data |
| 81 | 81 | }; |
| 82 | typedef struct _gus_voice gus_voice; | |
| 83 | ||
| 84 | struct _gf1_interface | |
| 82 | struct gf1_interface | |
| 85 | 83 | { |
| 86 | 84 | devcb_write_line wave_irq_cb; |
| 87 | 85 | devcb_write_line ramp_irq_cb; |
| r17907 | r17908 | |
| 93 | 91 | devcb_write_line drq2_cb; |
| 94 | 92 | devcb_write_line nmi_cb; |
| 95 | 93 | }; |
| 96 | typedef struct _gf1_interface gf1_interface; | |
| 97 | 94 | |
| 98 | 95 | class gf1_device : |
| 99 | 96 | public device_t, |
| r17907 | r17908 | |
|---|---|---|
| 42 | 42 | TYPE DEFINITIONS |
| 43 | 43 | ***************************************************************************/ |
| 44 | 44 | |
| 45 | typedef struct _pcf8593_t pcf8593_t; | |
| 46 | struct _pcf8593_t | |
| 45 | struct pcf8593_t | |
| 47 | 46 | { |
| 48 | 47 | UINT8 data[16]; |
| 49 | 48 | int pin_scl, pin_sda, inp; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | it is from cpu to fdc */ |
| 23 | 23 | #define I8271_FLAGS_DATA_DIRECTION 0x02 |
| 24 | 24 | |
| 25 | typedef struct _i8271_t i8271_t; | |
| 26 | struct _i8271_t | |
| 25 | struct i8271_t | |
| 27 | 26 | { |
| 28 | 27 | int flags; |
| 29 | 28 | int state; |
| r17907 | r17908 | |
|---|---|---|
| 17 | 17 | TYPE DEFINITIONS |
| 18 | 18 | ***************************************************************************/ |
| 19 | 19 | |
| 20 | typedef struct _beta_disk_state beta_disk_state; | |
| 21 | struct _beta_disk_state | |
| 20 | struct beta_disk_state | |
| 22 | 21 | { |
| 23 | 22 | UINT8 betadisk_status; |
| 24 | 23 | UINT8 betadisk_active; |
| r17907 | r17908 | |
|---|---|---|
| 84 | 84 | } state_t; |
| 85 | 85 | |
| 86 | 86 | |
| 87 | typedef struct _ay31015_t ay31015_t; | |
| 88 | struct _ay31015_t | |
| 87 | struct ay31015_t | |
| 89 | 88 | { |
| 90 | 89 | const ay31015_config *config; |
| 91 | 90 |
| r17907 | r17908 | |
|---|---|---|
| 49 | 49 | } ay31015_output_pin_t; |
| 50 | 50 | |
| 51 | 51 | |
| 52 | typedef struct _ay31015_config ay31015_config; | |
| 53 | struct _ay31015_config | |
| 52 | struct ay31015_config | |
| 54 | 53 | { |
| 55 | 54 | ay31015_type_t type; /* Type of chip */ |
| 56 | 55 | double transmitter_clock; /* TCP - pin 40 */ |
| r17907 | r17908 | |
|---|---|---|
| 21 | 21 | #include "emu.h" |
| 22 | 22 | #include "mm58274c.h" |
| 23 | 23 | |
| 24 | typedef struct _mm58274c_t mm58274c_t; | |
| 25 | ||
| 26 | struct _mm58274c_t | |
| 24 | struct mm58274c_t | |
| 27 | 25 | { |
| 28 | 26 | const mm58274c_interface *intf; |
| 29 | 27 |
| r17907 | r17908 | |
|---|---|---|
| 33 | 33 | |
| 34 | 34 | /* ---------- configuration ------------ */ |
| 35 | 35 | |
| 36 | typedef struct _mc6843_interface mc6843_interface; | |
| 37 | struct _mc6843_interface | |
| 36 | struct mc6843_interface | |
| 38 | 37 | { |
| 39 | 38 | void ( * irq_func ) ( device_t *device, int state ); |
| 40 | 39 | }; |
| r17907 | r17908 | |
|---|---|---|
| 36 | 36 | to 6 (saturday) and is needed to correctly retrieve the day-of-week |
| 37 | 37 | from the host system clock. |
| 38 | 38 | */ |
| 39 | typedef struct _mm58274c_interface mm58274c_interface; | |
| 40 | struct _mm58274c_interface | |
| 39 | struct mm58274c_interface | |
| 41 | 40 | { |
| 42 | 41 | int mode24; /* 24/12 mode */ |
| 43 | 42 | int day1; /* first day of week */ |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | #define VERBOSE_SERIAL 0 |
| 23 | 23 | #define VERBOSE_CHKSUM 0 |
| 24 | 24 | |
| 25 | typedef struct _atari_drive atari_drive; | |
| 26 | struct _atari_drive | |
| 25 | struct atari_drive | |
| 27 | 26 | { |
| 28 | 27 | UINT8 *image; /* malloc'd image */ |
| 29 | 28 | int type; /* type of image (XFD, ATR, DSK) */ |
| r17907 | r17908 | |
| 38 | 37 | int sectors; /* total sectors, ie. tracks x heads x spt */ |
| 39 | 38 | }; |
| 40 | 39 | |
| 41 | typedef struct _atari_fdc_t atari_fdc_t; | |
| 42 | struct _atari_fdc_t | |
| 40 | struct atari_fdc_t | |
| 43 | 41 | { |
| 44 | 42 | int serout_count; |
| 45 | 43 | int serout_offs; |
| r17907 | r17908 | |
| 87 | 85 | * It is used to determine the format of a XFD image by it's size only |
| 88 | 86 | *****************************************************************************/ |
| 89 | 87 | |
| 90 | typedef struct _dsk_format dsk_format; | |
| 91 | struct _dsk_format | |
| 88 | struct dsk_format | |
| 92 | 89 | { |
| 93 | 90 | UINT8 density; |
| 94 | 91 | UINT8 tracks; |
| r17907 | r17908 | |
| 108 | 105 | }; |
| 109 | 106 | |
| 110 | 107 | /* combined with the size the image should have */ |
| 111 | typedef struct _xfd_format xfd_format; | |
| 112 | struct _xfd_format | |
| 108 | struct xfd_format | |
| 113 | 109 | { |
| 114 | 110 | int size; |
| 115 | 111 | dsk_format dsk; |
| r17907 | r17908 | |
|---|---|---|
| 128 | 128 | #define OMTI_CMD_READ_CONFIGURATION 0xec |
| 129 | 129 | #define OMTI_CMD_INVALID_COMMAND 0xff |
| 130 | 130 | |
| 131 | typedef struct _disk_data disk_data; | |
| 132 | struct _disk_data | |
| 131 | struct disk_data | |
| 133 | 132 | { |
| 134 | 133 | device_t *device; |
| 135 | 134 | UINT16 type; |
| r17907 | r17908 | |
| 148 | 147 | UINT8 esdi_defect_list[256]; |
| 149 | 148 | }; |
| 150 | 149 | |
| 151 | typedef struct _omti8621_state omti8621_state; | |
| 152 | struct _omti8621_state { | |
| 150 | struct omti8621_state { | |
| 153 | 151 | device_t *device; |
| 154 | 152 | omti8621_set_irq irq_handler; |
| 155 | 153 |
| r17907 | r17908 | |
|---|---|---|
| 94 | 94 | TYPE DEFINITIONS |
| 95 | 95 | ***************************************************************************/ |
| 96 | 96 | |
| 97 | typedef struct _mc68328_interface mc68328_interface; | |
| 98 | struct _mc68328_interface | |
| 97 | struct mc68328_interface | |
| 99 | 98 | { |
| 100 | 99 | const char *m68k_cpu_tag; |
| 101 | 100 |
| r17907 | r17908 | |
|---|---|---|
| 23 | 23 | int addr, size, index, start; |
| 24 | 24 | } C64_ROM; |
| 25 | 25 | |
| 26 | typedef struct _c64_cart_t c64_cart_t; | |
| 27 | struct _c64_cart_t { | |
| 26 | struct c64_cart_t { | |
| 28 | 27 | C64_ROM bank[C64_MAX_ROMBANK]; |
| 29 | 28 | INT8 game; |
| 30 | 29 | INT8 exrom; |
| r17907 | r17908 | |
|---|---|---|
| 88 | 88 | A2MEM_DUAL = 2 /* this is a bank where read and write can go different places */ |
| 89 | 89 | } bank_disposition_t; |
| 90 | 90 | |
| 91 | typedef struct _apple2_meminfo apple2_meminfo; | |
| 92 | struct _apple2_meminfo | |
| 91 | struct apple2_meminfo | |
| 93 | 92 | { |
| 94 | 93 | UINT32 read_mem; |
| 95 | 94 | read8_delegate *read_handler; |
| r17907 | r17908 | |
| 97 | 96 | write8_delegate *write_handler; |
| 98 | 97 | }; |
| 99 | 98 | |
| 100 | typedef struct _apple2_memmap_entry apple2_memmap_entry; | |
| 101 | struct _apple2_memmap_entry | |
| 99 | struct apple2_memmap_entry | |
| 102 | 100 | { |
| 103 | 101 | offs_t begin; |
| 104 | 102 | offs_t end; |
| r17907 | r17908 | |
| 106 | 104 | bank_disposition_t bank_disposition; |
| 107 | 105 | }; |
| 108 | 106 | |
| 109 | typedef struct _apple2_memmap_config apple2_memmap_config; | |
| 110 | struct _apple2_memmap_config | |
| 107 | struct apple2_memmap_config | |
| 111 | 108 | { |
| 112 | 109 | int first_bank; |
| 113 | 110 | UINT8 *auxmem; |
| r17907 | r17908 | |
|---|---|---|
| 186 | 186 | UINT32 nPalette[0x10000]; |
| 187 | 187 | } CMAP_t; |
| 188 | 188 | |
| 189 | typedef struct _newport_video_t newport_video_t; | |
| 190 | struct _newport_video_t | |
| 189 | struct newport_video_t | |
| 191 | 190 | { |
| 192 | 191 | VC2_t VC2; |
| 193 | 192 | XMAP_t XMAP0; |
| r17907 | r17908 | |
|---|---|---|
| 71 | 71 | #define CR2_SHIFT_ACCESS 0x02 |
| 72 | 72 | #define CR2_PLANE_ACCESS 0x03 |
| 73 | 73 | |
| 74 | typedef struct _screen_data screen_data_t; | |
| 75 | struct _screen_data { | |
| 74 | struct screen_data_t { | |
| 76 | 75 | UINT16 width; |
| 77 | 76 | UINT16 height; |
| 78 | 77 | UINT16 buffer_width; |
| r17907 | r17908 | |
|---|---|---|
| 36 | 36 | |
| 37 | 37 | |
| 38 | 38 | /* interface */ |
| 39 | typedef struct _crtc_ega_interface crtc_ega_interface; | |
| 40 | struct _crtc_ega_interface | |
| 39 | struct crtc_ega_interface | |
| 41 | 40 | { |
| 42 | 41 | const char *m_screen_tag; /* screen we are acting on */ |
| 43 | 42 | int m_hpixels_per_column; /* number of pixels per video memory address */ |
| r17907 | r17908 | |
|---|---|---|
| 31 | 31 | UINT8 bitmap[8][SPRITE_BASE_X_SIZE * 2 / 8 + 1 /*for simplier sprite collision detection*/]; |
| 32 | 32 | }; |
| 33 | 33 | |
| 34 | typedef struct _vic3_state vic3_state; | |
| 35 | struct _vic3_state | |
| 34 | struct vic3_state | |
| 36 | 35 | { |
| 37 | 36 | vic3_type type; |
| 38 | 37 |
| r17907 | r17908 | |
|---|---|---|
| 32 | 32 | VIC4567_PAL |
| 33 | 33 | } vic3_type; |
| 34 | 34 | |
| 35 | typedef struct _vic3_interface vic3_interface; | |
| 36 | struct _vic3_interface | |
| 35 | struct vic3_interface | |
| 37 | 36 | { |
| 38 | 37 | const char *screen; |
| 39 | 38 | const char *cpu; |
| r17907 | r17908 | |
|---|---|---|
| 25 | 25 | TYPE DEFINITIONS |
| 26 | 26 | ***************************************************************************/ |
| 27 | 27 | |
| 28 | typedef struct _vt_video_t vt_video_t; | |
| 29 | struct _vt_video_t | |
| 28 | struct vt_video_t | |
| 30 | 29 | { |
| 31 | 30 | devcb_resolved_read8 in_ram_func; |
| 32 | 31 | devcb_resolved_write8 clear_video_interrupt; |
| r17907 | r17908 | |
|---|---|---|
| 48 | 48 | TYPE DEFINITIONS |
| 49 | 49 | ***************************************************************************/ |
| 50 | 50 | |
| 51 | typedef struct _vt_video_interface vt_video_interface; | |
| 52 | struct _vt_video_interface | |
| 51 | struct vt_video_interface | |
| 53 | 52 | { |
| 54 | 53 | const char *screen_tag; /* screen we are acting on */ |
| 55 | 54 | const char *char_rom_region_tag; /* character rom region */ |
| r17907 | r17908 | |
|---|---|---|
| 40 | 40 | MCFG_SCREEN_VBLANK_TIME(0) \ |
| 41 | 41 | |
| 42 | 42 | /* interface */ |
| 43 | typedef struct _mc6847_interface mc6847_interface; | |
| 44 | struct _mc6847_interface | |
| 43 | struct mc6847_interface | |
| 45 | 44 | { |
| 46 | 45 | /* screen we are acting on */ |
| 47 | 46 | const char *m_screen_tag; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | #include "emu.h" |
| 23 | 23 | #include "video/vdc8563.h" |
| 24 | 24 | |
| 25 | typedef struct _vdc8563_state vdc8563_state; | |
| 26 | struct _vdc8563_state | |
| 25 | struct vdc8563_state | |
| 27 | 26 | { |
| 28 | 27 | screen_device *screen; |
| 29 | 28 |
| r17907 | r17908 | |
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| 18 | 18 | TYPE DEFINITIONS |
| 19 | 19 | ***************************************************************************/ |
| 20 | 20 | |
| 21 | typedef struct _vdc8563_interface vdc8563_interface; | |
| 22 | struct _vdc8563_interface | |
| 21 | struct vdc8563_interface | |
| 23 | 22 | { |
| 24 | 23 | const char *screen; |
| 25 | 24 | int ram16konly; |
| r17907 | r17908 | |
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| 74 | 74 | #include "emu.h" |
| 75 | 75 | #include "video/vic6567.h" |
| 76 | 76 | |
| 77 | typedef struct _vic2_state vic2_state; | |
| 78 | struct _vic2_state | |
| 77 | struct vic2_state | |
| 79 | 78 | { |
| 80 | 79 | vic2_type type; |
| 81 | 80 |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | VIC8566 // VIC IIe PAL |
| 23 | 23 | } vic2_type; |
| 24 | 24 | |
| 25 | typedef struct _vic2_interface vic2_interface; | |
| 26 | struct _vic2_interface | |
| 25 | struct vic2_interface | |
| 27 | 26 | { |
| 28 | 27 | const char *screen; |
| 29 | 28 | const char *cpu; |
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| 12 | 12 | |
| 13 | 13 | /*----------- defined in video/crt.c -----------*/ |
| 14 | 14 | |
| 15 | typedef struct _crt_interface crt_interface; | |
| 16 | struct _crt_interface | |
| 15 | struct crt_interface | |
| 17 | 16 | { |
| 18 | 17 | int num_levels; |
| 19 | 18 | int offset_x, offset_y; |
| r17907 | r17908 | |
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| 95 | 95 | TYPE DEFINITIONS |
| 96 | 96 | ***************************************************************************/ |
| 97 | 97 | |
| 98 | typedef struct _dl1416_state dl1416_state; | |
| 99 | struct _dl1416_state | |
| 98 | struct dl1416_state | |
| 100 | 99 | { |
| 101 | 100 | int write_enable; |
| 102 | 101 | int chip_enable; |
| r17907 | r17908 | |
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| 22 | 22 | |
| 23 | 23 | typedef void (*dl1416_update_func)(device_t *device, int digit, int data); |
| 24 | 24 | |
| 25 | typedef struct _dl1416_interface dl1416_interface; | |
| 26 | struct _dl1416_interface | |
| 25 | struct dl1416_interface | |
| 27 | 26 | { |
| 28 | 27 | dl1416_update_func update; |
| 29 | 28 | }; |
| r17907 | r17908 | |
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| 21 | 21 | //************************************************************************** |
| 22 | 22 | |
| 23 | 23 | /* interface */ |
| 24 | typedef struct _gime_interface gime_interface; | |
| 25 | struct _gime_interface | |
| 24 | struct gime_interface | |
| 26 | 25 | { |
| 27 | 26 | const char *m_screen_tag; /* screen we are acting on */ |
| 28 | 27 | const char *m_maincpu_tag; /* tag of main CPU */ |
| r17907 | r17908 | |
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| 52 | 52 | MCFG_DEVICE_CONFIG( _config ) |
| 53 | 53 | |
| 54 | 54 | |
| 55 | typedef struct _k1ge_interface k1ge_interface; | |
| 56 | struct _k1ge_interface | |
| 55 | struct k1ge_interface | |
| 57 | 56 | { |
| 58 | 57 | const char *screen_tag; /* screen we are drawing on */ |
| 59 | 58 | const char *vram_tag; /* memory region we will use for video ram */ |
| r17907 | r17908 | |
|---|---|---|
| 116 | 116 | // TYPE DEFINITIONS |
| 117 | 117 | //************************************************************************** |
| 118 | 118 | |
| 119 | typedef struct _cbm_crt_header cbm_crt_header; | |
| 120 | struct _cbm_crt_header | |
| 119 | struct cbm_crt_header | |
| 121 | 120 | { |
| 122 | 121 | UINT8 signature[16]; |
| 123 | 122 | UINT8 header_length[4]; |
| r17907 | r17908 | |
| 130 | 129 | }; |
| 131 | 130 | |
| 132 | 131 | |
| 133 | typedef struct _cbm_crt_chip cbm_crt_chip; | |
| 134 | struct _cbm_crt_chip | |
| 132 | struct cbm_crt_chip | |
| 135 | 133 | { |
| 136 | 134 | UINT8 signature[4]; |
| 137 | 135 | UINT8 packet_length[4]; |
| r17907 | r17908 | |
|---|---|---|
| 22 | 22 | TYPE DEFINITIONS |
| 23 | 23 | ***************************************************************************/ |
| 24 | 24 | |
| 25 | typedef struct _st2_header st2_header; | |
| 26 | struct _st2_header | |
| 25 | struct st2_header | |
| 27 | 26 | { |
| 28 | 27 | UINT8 header[4]; /* "RCA2" in ASCII code */ |
| 29 | 28 | UINT8 blocks; /* Total number of 256 byte blocks in file (including this one) */ |
| r17907 | r17908 | |
|---|---|---|
| 41 | 41 | UINT32 tcr, wcr, kcr; |
| 42 | 42 | }; |
| 43 | 43 | |
| 44 | typedef struct _vip_regs_t vip_regs_t; | |
| 45 | struct _vip_regs_t | |
| 44 | struct vip_regs_t | |
| 46 | 45 | { |
| 47 | 46 | |
| 48 | 47 | UINT16 INTPND; |
| r17907 | r17908 | |
| 1337 | 1336 | GFXDECODE_ENTRY( "pcg", 0x00000, vboy_pcg_8x8, 0, 1 ) |
| 1338 | 1337 | GFXDECODE_END |
| 1339 | 1338 | |
| 1340 | typedef struct _vboy_pcb vboy_pcb; | |
| 1341 | struct _vboy_pcb | |
| 1339 | struct vboy_pcb | |
| 1342 | 1340 | { |
| 1343 | 1341 | const char *pcb_name; |
| 1344 | 1342 | int pcb_id; |
| r17907 | r17908 | |
|---|---|---|
| 18 | 18 | rtc interrupt irq 2 |
| 19 | 19 | */ |
| 20 | 20 | |
| 21 | typedef struct _vg230_t vg230_t; | |
| 22 | struct _vg230_t | |
| 21 | struct vg230_t | |
| 23 | 22 | { |
| 24 | 23 | UINT8 index; |
| 25 | 24 | UINT8 data[0x100]; |
| r17907 | r17908 | |
| 40 | 39 | } pmu; |
| 41 | 40 | }; |
| 42 | 41 | |
| 43 | typedef struct _ems_t ems_t; | |
| 44 | struct _ems_t | |
| 42 | struct ems_t | |
| 45 | 43 | { |
| 46 | 44 | UINT8 data; |
| 47 | 45 | int index; |
| r17907 | r17908 | |
| 66 | 64 | DECLARE_WRITE8_MEMBER(ems_w); |
| 67 | 65 | DECLARE_READ8_MEMBER(vg230_io_r); |
| 68 | 66 | DECLARE_WRITE8_MEMBER(vg230_io_w); |
| 69 | struct _vg230_t m_vg230; | |
| 70 | struct _ems_t m_ems; | |
| 67 | vg230_t m_vg230; | |
| 68 | ems_t m_ems; | |
| 71 | 69 | DECLARE_DRIVER_INIT(pasogo); |
| 72 | 70 | virtual void machine_reset(); |
| 73 | 71 | virtual void palette_init(); |
| r17907 | r17908 | |
| 467 | 465 | |
| 468 | 466 | //static const unsigned i86_address_mask = 0x000fffff; |
| 469 | 467 | |
| 470 | static const | |
| 468 | static const | |
| 471 | 469 | { |
| 472 | 470 | { |
| 473 | 471 | { |
| r17907 | r17908 | |
| 492 | 490 | device->machine().device("maincpu")->execute().set_input_line(0, state ? HOLD_LINE : CLEAR_LINE); |
| 493 | 491 | } |
| 494 | 492 | |
| 495 | static const | |
| 493 | static const | |
| 496 | 494 | { |
| 497 | 495 | DEVCB_LINE(pasogo_pic8259_set_int_line), |
| 498 | 496 | DEVCB_LINE_VCC, |
| r17907 | r17908 | |
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| 92 | 92 | |
| 93 | 93 | #define ENABLE_VERBOSE_LOG (1) |
| 94 | 94 | |
| 95 | typedef struct _acan_dma_regs_t acan_dma_regs_t; | |
| 96 | struct _acan_dma_regs_t | |
| 95 | struct acan_dma_regs_t | |
| 97 | 96 | { |
| 98 | 97 | UINT32 source[2]; |
| 99 | 98 | UINT32 dest[2]; |
| r17907 | r17908 | |
| 101 | 100 | UINT16 control[2]; |
| 102 | 101 | }; |
| 103 | 102 | |
| 104 | typedef struct _acan_sprdma_regs_t acan_sprdma_regs_t; | |
| 105 | struct _acan_sprdma_regs_t | |
| 103 | struct acan_sprdma_regs_t | |
| 106 | 104 | { |
| 107 | 105 | UINT32 src; |
| 108 | 106 | UINT16 src_inc; |
| r17907 | r17908 | |
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| 13 | 13 | #include "video/huc6270.h" |
| 14 | 14 | #include "video/huc6272.h" |
| 15 | 15 | |
| 16 | typedef struct _pcfx_pad_t pcfx_pad_t; | |
| 17 | ||
| 18 | struct _pcfx_pad_t | |
| 16 | struct pcfx_pad_t | |
| 19 | 17 | { |
| 20 | 18 | UINT8 ctrl[2]; |
| 21 | 19 | UINT8 status[2]; |
| r17907 | r17908 | |
|---|---|---|
| 2976 | 2976 | return chip; |
| 2977 | 2977 | } |
| 2978 | 2978 | |
| 2979 | typedef struct _gba_pcb gba_pcb; | |
| 2980 | struct _gba_pcb | |
| 2979 | struct gba_pcb | |
| 2981 | 2980 | { |
| 2982 | 2981 | const char *pcb_name; |
| 2983 | 2982 | int pcb_id; |
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