trunk/src/mame/audio/t5182.c
| r17836 | r17837 | |
| 162 | 162 | static UINT8 *t5182_sharedram; |
| 163 | 163 | static int irqstate; |
| 164 | 164 | |
| 165 | void t5182_init(running_machine &machine) |
| 166 | { |
| 167 | t5182_sharedram = reinterpret_cast<UINT8 *>(machine.root_device().memshare("t5182_sharedram")->ptr()); |
| 168 | } |
| 169 | |
| 165 | 170 | READ8_HANDLER(t5182_sharedram_r) |
| 166 | 171 | { |
| 167 | 172 | return t5182_sharedram[offset]; |
| r17836 | r17837 | |
| 298 | 303 | ADDRESS_MAP_START( t5182_map, AS_PROGRAM, 8, driver_device ) |
| 299 | 304 | AM_RANGE(0x0000, 0x1fff) AM_ROM // internal ROM |
| 300 | 305 | AM_RANGE(0x2000, 0x27ff) AM_RAM AM_MIRROR(0x1800) // internal RAM |
| 301 | | AM_RANGE(0x4000, 0x40ff) AM_RAM AM_MIRROR(0x3F00) AM_BASE_LEGACY(&t5182_sharedram) // 2016 with four 74ls245s, one each for main and t5182 address and data. pins 23, 22, 20, 19, 18 are all tied low so only 256 bytes are usable |
| 306 | AM_RANGE(0x4000, 0x40ff) AM_RAM AM_MIRROR(0x3F00) AM_SHARE("t5182_sharedram") // 2016 with four 74ls245s, one each for main and t5182 address and data. pins 23, 22, 20, 19, 18 are all tied low so only 256 bytes are usable |
| 302 | 307 | AM_RANGE(0x8000, 0xffff) AM_ROM // external ROM |
| 303 | 308 | ADDRESS_MAP_END |
| 304 | 309 | |
trunk/src/mame/machine/naomi.c
| r17836 | r17837 | |
| 22 | 22 | #include "includes/naomi.h" |
| 23 | 23 | #include "includes/dc.h" |
| 24 | 24 | |
| 25 | | UINT64 *naomi_ram64; |
| 26 | 25 | int jvsboard_type; |
| 27 | 26 | UINT16 actel_id; |
| 28 | 27 | |
| r17836 | r17837 | |
| 34 | 33 | // else |
| 35 | 34 | // printf("%08x\n", space->device().safe_pc()); |
| 36 | 35 | |
| 37 | | return naomi_ram64[0x2ad238/8]; |
| 36 | return space->machine().driver_data<dc_state>()->dc_ram[0x2ad238/8]; |
| 38 | 37 | } |
| 39 | 38 | |
| 40 | 39 | static READ64_HANDLER( naomi_biosh_idle_skip_r ) |
| r17836 | r17837 | |
| 44 | 43 | |
| 45 | 44 | // printf("%08x\n", space->device().safe_pc()); |
| 46 | 45 | |
| 47 | | return naomi_ram64[0x2b0600/8]; |
| 46 | return space->machine().driver_data<dc_state>()->dc_ram[0x2b0600/8]; |
| 48 | 47 | } |
| 49 | 48 | |
| 50 | 49 | static READ64_HANDLER( naomi2_biose_idle_skip_r ) |
| r17836 | r17837 | |
| 55 | 54 | // else |
| 56 | 55 | // printf("%08x\n", space->device().safe_pc()); |
| 57 | 56 | |
| 58 | | return naomi_ram64[0x2b0600/8]; |
| 57 | return space->machine().driver_data<dc_state>()->dc_ram[0x2b0600/8]; |
| 59 | 58 | } |
| 60 | 59 | |
| 61 | 60 | static UINT8 asciihex_to_dec(UINT8 in) |
| r17836 | r17837 | |
| 246 | 245 | if (space->device().safe_pc()==0x0c0c9adc) |
| 247 | 246 | space->device().execute().spin_until_time(attotime::from_usec(500)); |
| 248 | 247 | |
| 249 | | return naomi_ram64[0x1aae18/8]; |
| 248 | return space->machine().driver_data<dc_state>()->dc_ram[0x1aae18/8]; |
| 250 | 249 | } |
| 251 | 250 | |
| 252 | 251 | DRIVER_INIT_MEMBER(dc_state,ggxxsla) |
| r17836 | r17837 | |
| 260 | 259 | if (space->device().safe_pc()==0xc0b5c3c) // or 0xc0bab0c |
| 261 | 260 | space->device().execute().spin_until_time(attotime::from_usec(500)); |
| 262 | 261 | |
| 263 | | return naomi_ram64[0x1837b8/8]; |
| 262 | return space->machine().driver_data<dc_state>()->dc_ram[0x1837b8/8]; |
| 264 | 263 | } |
| 265 | 264 | |
| 266 | 265 | |
| r17836 | r17837 | |
| 277 | 276 | |
| 278 | 277 | //printf("%08x\n", space->device().safe_pc()); |
| 279 | 278 | |
| 280 | | return naomi_ram64[0x18d6c8/8]; |
| 279 | return space->machine().driver_data<dc_state>()->dc_ram[0x18d6c8/8]; |
| 281 | 280 | } |
| 282 | 281 | |
| 283 | 282 | DRIVER_INIT_MEMBER(dc_state,ggxxrl) |
| r17836 | r17837 | |
| 292 | 291 | if (space->device().safe_pc()==0xc36a2dc) |
| 293 | 292 | space->device().execute().spin_until_time(attotime::from_usec(500)); |
| 294 | 293 | |
| 295 | | return naomi_ram64[0x5dc900/8]; |
| 294 | return space->machine().driver_data<dc_state>()->dc_ram[0x5dc900/8]; |
| 296 | 295 | } |
| 297 | 296 | |
| 298 | 297 | DRIVER_INIT_MEMBER(dc_state,sfz3ugd) |
| r17836 | r17837 | |
| 340 | 339 | // else |
| 341 | 340 | // printf("%08x\n", space->device().safe_pc()); |
| 342 | 341 | |
| 343 | | return naomi_ram64[0xa25fb8/8]; |
| 342 | return space->machine().driver_data<dc_state>()->dc_ram[0xa25fb8/8]; |
| 344 | 343 | } |
| 345 | 344 | |
| 346 | 345 | DRIVER_INIT_MEMBER(dc_state,hotd2) |
trunk/src/mame/machine/megadriv.c
| r17836 | r17837 | |
| 56 | 56 | int genesis_other_hacks = 0; // misc hacks |
| 57 | 57 | |
| 58 | 58 | timer_device* megadriv_scanline_timer; |
| 59 | | UINT16* megadrive_ram = NULL; |
| 60 | 59 | |
| 61 | 60 | struct genesis_z80_vars |
| 62 | 61 | { |
| r17836 | r17837 | |
| 577 | 576 | AM_RANGE(0xa11200, 0xa11201) AM_WRITE_LEGACY(megadriv_68k_req_z80_reset) |
| 578 | 577 | |
| 579 | 578 | /* these are fake - remove allocs in VIDEO_START to use these to view ram instead */ |
| 580 | | // AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_BASE_LEGACY(&megadrive_vdp_vram) |
| 581 | | // AM_RANGE(0xb10000, 0xb1007f) AM_RAM AM_BASE_LEGACY(&megadrive_vdp_vsram) |
| 582 | | // AM_RANGE(0xb10100, 0xb1017f) AM_RAM AM_BASE_LEGACY(&megadrive_vdp_cram) |
| 579 | // AM_RANGE(0xb00000, 0xb0ffff) AM_RAM AM_SHARE("megadrive_vdp_vram") |
| 580 | // AM_RANGE(0xb10000, 0xb1007f) AM_RAM AM_SHARE("megadrive_vdp_vsram") |
| 581 | // AM_RANGE(0xb10100, 0xb1017f) AM_RAM AM_SHARE("megadrive_vdp_cram") |
| 583 | 582 | |
| 584 | 583 | AM_RANGE(0xc00000, 0xc0001f) AM_DEVREADWRITE("gen_vdp", sega_genesis_vdp_device, megadriv_vdp_r,megadriv_vdp_w) |
| 585 | 584 | AM_RANGE(0xd00000, 0xd0001f) AM_DEVREADWRITE("gen_vdp", sega_genesis_vdp_device, megadriv_vdp_r,megadriv_vdp_w) // the earth defend |
| 586 | 585 | |
| 587 | | AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_BASE_LEGACY(&megadrive_ram) |
| 586 | AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_SHARE("megadrive_ram") |
| 588 | 587 | // AM_RANGE(0xff0000, 0xffffff) AM_READONLY |
| 589 | 588 | /* 0xe00000 - 0xffffff) == MAIN RAM (64kb, Mirrored, most games use ff0000 - ffffff) */ |
| 590 | 589 | ADDRESS_MAP_END |
| r17836 | r17837 | |
| 883 | 882 | AM_RANGE(0xc00000, 0xc0001f) AM_DEVREADWRITE("gen_vdp", sega_genesis_vdp_device, megadriv_vdp_r,megadriv_vdp_w) |
| 884 | 883 | AM_RANGE(0xd00000, 0xd0001f) AM_DEVREADWRITE("gen_vdp", sega_genesis_vdp_device, megadriv_vdp_r,megadriv_vdp_w) |
| 885 | 884 | |
| 886 | | AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_BASE_LEGACY(&megadrive_ram) |
| 885 | AM_RANGE(0xe00000, 0xe0ffff) AM_RAM AM_MIRROR(0x1f0000) AM_SHARE("megadrive_ram") |
| 887 | 886 | ADDRESS_MAP_END |
| 888 | 887 | |
| 889 | 888 | MACHINE_CONFIG_DERIVED( md_bootleg, megadriv ) |
| r17836 | r17837 | |
| 1008 | 1007 | { |
| 1009 | 1008 | // set_refresh_rate(megadriv_framerate); |
| 1010 | 1009 | // machine.device("maincpu")->set_clock_scale(0.9950f); /* Fatal Rewind is very fussy... (and doesn't work now anyway, so don't bother with this) */ |
| 1011 | | if (megadrive_ram) |
| 1012 | | memset(megadrive_ram,0x00,0x10000); |
| 1010 | if (state->m_megadrive_ram) |
| 1011 | memset(state->m_megadrive_ram,0x00,0x10000); |
| 1013 | 1012 | } |
| 1014 | 1013 | |
| 1015 | 1014 | megadriv_reset_vdp(machine); |
trunk/src/mame/machine/namcos2.c
| r17836 | r17837 | |
| 164 | 164 | /* 68000 Shared serial communications processor (CPU5?) */ |
| 165 | 165 | /**************************************************************/ |
| 166 | 166 | |
| 167 | | static UINT16 namcos2_68k_serial_comms_ctrl[0x8]; |
| 168 | | UINT16 *namcos2_68k_serial_comms_ram; |
| 169 | | |
| 170 | | READ16_HANDLER( namcos2_68k_serial_comms_ram_r ){ |
| 171 | | return namcos2_68k_serial_comms_ram[offset]; |
| 167 | READ16_MEMBER( namcos2_state::serial_comms_ram_r ){ |
| 168 | return m_serial_comms_ram[offset]; |
| 172 | 169 | } |
| 173 | 170 | |
| 174 | | WRITE16_HANDLER( namcos2_68k_serial_comms_ram_w ){ |
| 175 | | COMBINE_DATA( &namcos2_68k_serial_comms_ram[offset] ); |
| 171 | WRITE16_MEMBER( namcos2_state::serial_comms_ram_w ){ |
| 172 | COMBINE_DATA( &m_serial_comms_ram[offset] ); |
| 176 | 173 | } |
| 177 | 174 | |
| 178 | | READ16_HANDLER( namcos2_68k_serial_comms_ctrl_r ) |
| 175 | READ16_MEMBER( namcos2_state::serial_comms_ctrl_r ) |
| 179 | 176 | { |
| 180 | | UINT16 retval = namcos2_68k_serial_comms_ctrl[offset]; |
| 177 | UINT16 retval = m_serial_comms_ctrl[offset]; |
| 181 | 178 | |
| 182 | 179 | switch(offset){ |
| 183 | 180 | case 0x00: |
| r17836 | r17837 | |
| 190 | 187 | return retval; |
| 191 | 188 | } |
| 192 | 189 | |
| 193 | | WRITE16_HANDLER( namcos2_68k_serial_comms_ctrl_w ) |
| 190 | WRITE16_MEMBER( namcos2_state::serial_comms_ctrl_w ) |
| 194 | 191 | { |
| 195 | | COMBINE_DATA( &namcos2_68k_serial_comms_ctrl[offset] ); |
| 192 | COMBINE_DATA( &m_serial_comms_ctrl[offset] ); |
| 196 | 193 | } |
| 197 | 194 | |
| 198 | 195 | /*************************************************************/ |
trunk/src/mame/machine/megacd.c
| r17836 | r17837 | |
| 2235 | 2235 | void segacd_init_main_cpu( running_machine& machine ) |
| 2236 | 2236 | { |
| 2237 | 2237 | address_space* space = machine.device("maincpu")->memory().space(AS_PROGRAM); |
| 2238 | | |
| 2238 | |
| 2239 | segacd_font_bits = reinterpret_cast<UINT16 *>(machine.root_device().memshare("segacd_font")->ptr()); |
| 2240 | segacd_backupram = reinterpret_cast<UINT16 *>(machine.root_device().memshare("backupram")->ptr()); |
| 2241 | segacd_dataram = reinterpret_cast<UINT16 *>(machine.root_device().memshare("dataram")->ptr()); |
| 2242 | segacd_dataram2 = reinterpret_cast<UINT16 *>(machine.root_device().memshare("dataram2")->ptr()); |
| 2243 | segacd_4meg_prgram = reinterpret_cast<UINT16 *>(machine.root_device().memshare("segacd_program")->ptr()); |
| 2244 | |
| 2239 | 2245 | segacd_4meg_prgbank = 0; |
| 2240 | 2246 | |
| 2241 | 2247 | |
| r17836 | r17837 | |
| 3008 | 3014 | } |
| 3009 | 3015 | |
| 3010 | 3016 | ADDRESS_MAP_START( segacd_map, AS_PROGRAM, 16, driver_device ) |
| 3011 | | AM_RANGE(0x000000, 0x07ffff) AM_RAM AM_BASE_LEGACY(&segacd_4meg_prgram) |
| 3017 | AM_RANGE(0x000000, 0x07ffff) AM_RAM AM_SHARE("segacd_program") |
| 3012 | 3018 | |
| 3013 | | AM_RANGE(0x080000, 0x0bffff) AM_READWRITE_LEGACY(segacd_sub_dataram_part1_r, segacd_sub_dataram_part1_w) AM_BASE_LEGACY(&segacd_dataram) |
| 3014 | | AM_RANGE(0x0c0000, 0x0dffff) AM_READWRITE_LEGACY(segacd_sub_dataram_part2_r, segacd_sub_dataram_part2_w) AM_BASE_LEGACY(&segacd_dataram2) |
| 3019 | AM_RANGE(0x080000, 0x0bffff) AM_READWRITE_LEGACY(segacd_sub_dataram_part1_r, segacd_sub_dataram_part1_w) AM_SHARE("dataram") |
| 3020 | AM_RANGE(0x0c0000, 0x0dffff) AM_READWRITE_LEGACY(segacd_sub_dataram_part2_r, segacd_sub_dataram_part2_w) AM_SHARE("dataram2") |
| 3015 | 3021 | |
| 3016 | | AM_RANGE(0xfe0000, 0xfe3fff) AM_READWRITE_LEGACY(segacd_backupram_r,segacd_backupram_w) AM_SHARE("backupram") AM_BASE_LEGACY(&segacd_backupram)// backup RAM, odd bytes only! |
| 3022 | AM_RANGE(0xfe0000, 0xfe3fff) AM_READWRITE_LEGACY(segacd_backupram_r,segacd_backupram_w) AM_SHARE("backupram") // backup RAM, odd bytes only! |
| 3017 | 3023 | |
| 3018 | 3024 | AM_RANGE(0xff0000, 0xff001f) AM_DEVWRITE8_LEGACY("rfsnd", rf5c68_w, 0x00ff) // PCM, RF5C164 |
| 3019 | 3025 | AM_RANGE(0xff0020, 0xff003f) AM_DEVREAD8_LEGACY("rfsnd", rf5c68_r, 0x00ff) |
| r17836 | r17837 | |
| 3038 | 3044 | AM_RANGE(0xff8038, 0xff8041) AM_READ8_LEGACY(segacd_cdd_rx_r,0xffff) |
| 3039 | 3045 | AM_RANGE(0xff8042, 0xff804b) AM_WRITE8_LEGACY(segacd_cdd_tx_w,0xffff) |
| 3040 | 3046 | AM_RANGE(0xff804c, 0xff804d) AM_READWRITE_LEGACY(segacd_font_color_r, segacd_font_color_w) |
| 3041 | | AM_RANGE(0xff804e, 0xff804f) AM_RAM AM_BASE_LEGACY(&segacd_font_bits) |
| 3047 | AM_RANGE(0xff804e, 0xff804f) AM_RAM AM_SHARE("segacd_font") |
| 3042 | 3048 | AM_RANGE(0xff8050, 0xff8057) AM_READ_LEGACY(segacd_font_converted_r) |
| 3043 | 3049 | AM_RANGE(0xff8058, 0xff8059) AM_READWRITE_LEGACY(segacd_stampsize_r, segacd_stampsize_w) // Stamp size |
| 3044 | 3050 | AM_RANGE(0xff805a, 0xff805b) AM_READWRITE_LEGACY(segacd_stampmap_base_address_r, segacd_stampmap_base_address_w) // Stamp map base address |
trunk/src/mame/includes/megadriv.h
| r17836 | r17837 | |
| 105 | 105 | public: |
| 106 | 106 | md_base_state(const machine_config &mconfig, device_type type, const char *tag) |
| 107 | 107 | : driver_device(mconfig, type, tag), |
| 108 | | m_vdp(*this,"gen_vdp") |
| 108 | m_vdp(*this,"gen_vdp"), |
| 109 | m_megadrive_ram(*this,"megadrive_ram") |
| 109 | 110 | { } |
| 110 | 111 | required_device<sega_genesis_vdp_device> m_vdp; |
| 112 | optional_shared_ptr<UINT16> m_megadrive_ram; |
| 111 | 113 | |
| 112 | 114 | DECLARE_DRIVER_INIT(megadriv_c2); |
| 113 | 115 | DECLARE_DRIVER_INIT(megadrie); |
| r17836 | r17837 | |
| 445 | 447 | { |
| 446 | 448 | public: |
| 447 | 449 | segacd_state(const machine_config &mconfig, device_type type, const char *tag) |
| 448 | | : _32x_state(mconfig, type, tag) { } |
| 450 | : _32x_state(mconfig, type, tag), |
| 451 | m_font_bits(*this,"segacd_font") { } |
| 452 | |
| 453 | required_shared_ptr<UINT16> m_font_bits; |
| 449 | 454 | }; |
| 450 | 455 | |
| 451 | 456 | extern int sega_cd_connected; |
trunk/src/mame/includes/dc.h
| r17836 | r17837 | |
| 15 | 15 | dc_framebuffer_ram(*this, "frameram"), |
| 16 | 16 | dc_texture_ram(*this, "dc_texture_ram"), |
| 17 | 17 | dc_sound_ram(*this, "dc_sound_ram"), |
| 18 | dc_ram(*this, "dc_ram"), |
| 18 | 19 | pvr2_texture_ram(*this, "textureram2"), |
| 19 | 20 | pvr2_framebuffer_ram(*this, "frameram2"), |
| 20 | 21 | elan_ram(*this, "elan_ram") { } |
| r17836 | r17837 | |
| 23 | 24 | required_shared_ptr<UINT64> dc_texture_ram; // '64-bit access area' |
| 24 | 25 | |
| 25 | 26 | required_shared_ptr<UINT32> dc_sound_ram; |
| 27 | required_shared_ptr<UINT64> dc_ram; |
| 26 | 28 | |
| 27 | 29 | /* machine related */ |
| 28 | 30 | UINT32 dc_rtcregister[4]; |
trunk/src/mame/includes/pgm.h
| r17836 | r17837 | |
| 16 | 16 | : driver_device(mconfig, type, tag), |
| 17 | 17 | m_videoregs(*this, "videoregs"), |
| 18 | 18 | m_videoram(*this, "videoram"), |
| 19 | | m_z80_mainram(*this, "z80_mainram") |
| 19 | m_z80_mainram(*this, "z80_mainram"), |
| 20 | m_mainram(*this, "sram") |
| 20 | 21 | { |
| 21 | 22 | m_irq4_disabled = 0; |
| 22 | 23 | } |
| r17836 | r17837 | |
| 25 | 26 | required_shared_ptr<UINT16> m_videoregs; |
| 26 | 27 | required_shared_ptr<UINT16> m_videoram; |
| 27 | 28 | required_shared_ptr<UINT8> m_z80_mainram; |
| 28 | | // UINT16 * m_mainram; // currently this is also used by nvram handler |
| 29 | required_shared_ptr<UINT16> m_mainram; |
| 29 | 30 | UINT16 * m_bg_videoram; |
| 30 | 31 | UINT16 * m_tx_videoram; |
| 31 | 32 | UINT16 * m_rowscrollram; |
| r17836 | r17837 | |
| 299 | 300 | |
| 300 | 301 | |
| 301 | 302 | |
| 302 | | extern UINT16 *pgm_mainram; // used by nvram handler, we cannot move it to driver data struct |
| 303 | | |
| 304 | 303 | /*----------- defined in drivers/pgm.c -----------*/ |
| 305 | 304 | |
| 306 | 305 | void pgm_basic_init( running_machine &machine, bool set_bank = true ); |
trunk/src/mame/includes/namcos2.h
| r17836 | r17837 | |
| 188 | 188 | m_dpram(*this, "dpram"), |
| 189 | 189 | m_paletteram(*this, "paletteram"), |
| 190 | 190 | m_spriteram(*this, "spriteram"), |
| 191 | m_serial_comms_ram(*this, "serialram"), |
| 191 | 192 | m_rozram(*this, "rozram"), |
| 192 | 193 | m_roz_ctrl(*this, "rozctrl"), |
| 193 | 194 | m_c45_road(*this, "c45_road") |
| r17836 | r17837 | |
| 250 | 251 | DECLARE_WRITE16_MEMBER( rozram_word_w ); |
| 251 | 252 | DECLARE_READ16_MEMBER( gfx_ctrl_r ); |
| 252 | 253 | DECLARE_WRITE16_MEMBER( gfx_ctrl_w ); |
| 254 | DECLARE_READ16_MEMBER( serial_comms_ram_r ); |
| 255 | DECLARE_WRITE16_MEMBER( serial_comms_ram_w ); |
| 256 | DECLARE_READ16_MEMBER( serial_comms_ctrl_r ); |
| 257 | DECLARE_WRITE16_MEMBER( serial_comms_ctrl_w ); |
| 253 | 258 | |
| 254 | 259 | void draw_sprite_init(); |
| 255 | 260 | void update_palette(); |
| r17836 | r17837 | |
| 264 | 269 | required_shared_ptr<UINT8> m_dpram; /* 2Kx8 */ |
| 265 | 270 | required_shared_ptr<UINT16> m_paletteram; |
| 266 | 271 | optional_shared_ptr<UINT16> m_spriteram; |
| 272 | optional_shared_ptr<UINT16> m_serial_comms_ram; |
| 267 | 273 | optional_shared_ptr<UINT16> m_rozram; |
| 268 | 274 | optional_shared_ptr<UINT16> m_roz_ctrl; |
| 269 | 275 | tilemap_t *m_tilemap_roz; |
| 270 | 276 | UINT16 m_gfx_ctrl; |
| 277 | UINT16 m_serial_comms_ctrl[0x8]; |
| 271 | 278 | |
| 272 | 279 | optional_device<namco_c45_road_device> m_c45_road; |
| 273 | 280 | }; |
| r17836 | r17837 | |
| 309 | 316 | READ16_HANDLER( namcos2_68k_data_rom_r ); |
| 310 | 317 | |
| 311 | 318 | /**************************************************************/ |
| 312 | | /* Shared serial communications processory (CPU5 ????) */ |
| 313 | | /**************************************************************/ |
| 314 | | READ16_HANDLER( namcos2_68k_serial_comms_ram_r ); |
| 315 | | WRITE16_HANDLER( namcos2_68k_serial_comms_ram_w ); |
| 316 | | READ16_HANDLER( namcos2_68k_serial_comms_ctrl_r ); |
| 317 | | WRITE16_HANDLER( namcos2_68k_serial_comms_ctrl_w ); |
| 318 | | |
| 319 | | extern UINT16 *namcos2_68k_serial_comms_ram; |
| 320 | | |
| 321 | | /**************************************************************/ |
| 322 | 319 | /* Shared protection/random number generator */ |
| 323 | 320 | /**************************************************************/ |
| 324 | 321 | READ16_HANDLER( namcos2_68k_key_r ); |
trunk/src/mame/includes/konamigx.h
| r17836 | r17837 | |
| 8 | 8 | m_psacram(*this,"psacram"), |
| 9 | 9 | m_subpaletteram32(*this,"subpaletteram"), |
| 10 | 10 | m_k053936_0_ctrl(*this,"k053936_0_ctrl",32), |
| 11 | | m_k053936_0_linectrl(*this,"k053936_0_line",32) |
| 11 | m_k053936_0_linectrl(*this,"k053936_0_line",32), |
| 12 | m_konamigx_type3_psac2_bank(*this,"psac2_bank") |
| 12 | 13 | { } |
| 13 | 14 | |
| 14 | 15 | required_device<cpu_device> m_maincpu; |
| r17836 | r17837 | |
| 17 | 18 | optional_shared_ptr<UINT32> m_subpaletteram32; |
| 18 | 19 | optional_shared_ptr<UINT16> m_k053936_0_ctrl; |
| 19 | 20 | optional_shared_ptr<UINT16> m_k053936_0_linectrl; |
| 21 | optional_shared_ptr<UINT32> m_konamigx_type3_psac2_bank; |
| 20 | 22 | DECLARE_WRITE32_MEMBER(esc_w); |
| 21 | 23 | DECLARE_WRITE32_MEMBER(eeprom_w); |
| 22 | 24 | DECLARE_WRITE32_MEMBER(control_w); |
| r17836 | r17837 | |
| 148 | 150 | SCREEN_UPDATE_RGB32(konamigx_left); |
| 149 | 151 | SCREEN_UPDATE_RGB32(konamigx_right); |
| 150 | 152 | |
| 151 | | #ifdef UNUSED_FUNCTION |
| 152 | | #endif |
| 153 | | |
| 154 | 153 | extern int konamigx_current_frame; |
| 155 | | extern UINT32* konamigx_type3_psac2_bank; |
| 156 | 154 | |
| 157 | 155 | |
| 158 | 156 | /*----------- defined in machine/konamigx.c -----------*/ |
trunk/src/mame/drivers/naomi.c
| r17836 | r17837 | |
| 1582 | 1582 | AM_RANGE(0x08000000, 0x09ffffff) AM_MIRROR(0x02000000) AM_NOP // 'Unassigned' |
| 1583 | 1583 | |
| 1584 | 1584 | /* Area 3 */ |
| 1585 | | AM_RANGE(0x0c000000, 0x0dffffff) AM_MIRROR(0xa2000000) AM_RAM AM_BASE_LEGACY(&naomi_ram64) |
| 1585 | AM_RANGE(0x0c000000, 0x0dffffff) AM_MIRROR(0xa2000000) AM_RAM AM_SHARE("dc_ram") |
| 1586 | 1586 | |
| 1587 | 1587 | /* Area 4 */ |
| 1588 | 1588 | AM_RANGE(0x10000000, 0x107fffff) AM_MIRROR(0x02000000) AM_WRITE_LEGACY(ta_fifo_poly_w ) |
| r17836 | r17837 | |
| 1644 | 1644 | AM_RANGE(0x0a000000, 0x0bffffff) AM_RAM AM_SHARE("elan_ram") // T&L chip RAM |
| 1645 | 1645 | |
| 1646 | 1646 | /* Area 3 */ |
| 1647 | | AM_RANGE(0x0c000000, 0x0dffffff) AM_MIRROR(0xa2000000) AM_RAM AM_BASE_LEGACY(&naomi_ram64) |
| 1647 | AM_RANGE(0x0c000000, 0x0dffffff) AM_MIRROR(0xa2000000) AM_RAM AM_SHARE("dc_ram") |
| 1648 | 1648 | |
| 1649 | 1649 | /* Area 4 */ |
| 1650 | 1650 | AM_RANGE(0x10000000, 0x107fffff) AM_WRITE_LEGACY(ta_fifo_poly_w ) |
| r17836 | r17837 | |
| 1786 | 1786 | AM_RANGE(0x08000000, 0x0bffffff) AM_NOP // 'Unassigned' |
| 1787 | 1787 | |
| 1788 | 1788 | /* Area 3 */ |
| 1789 | | AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM AM_BASE_LEGACY(&naomi_ram64) AM_SHARE("share4") |
| 1790 | | AM_RANGE(0x0d000000, 0x0dffffff) AM_RAM AM_SHARE("share4")// extra ram on Naomi (mirror on DC) |
| 1791 | | AM_RANGE(0x0e000000, 0x0effffff) AM_RAM AM_SHARE("share4")// mirror |
| 1792 | | AM_RANGE(0x0f000000, 0x0fffffff) AM_RAM AM_SHARE("share4")// mirror |
| 1789 | AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM AM_SHARE("dc_ram") |
| 1790 | AM_RANGE(0x0d000000, 0x0dffffff) AM_RAM AM_SHARE("dc_ram")// extra ram on Naomi (mirror on DC) |
| 1791 | AM_RANGE(0x0e000000, 0x0effffff) AM_RAM AM_SHARE("dc_ram")// mirror |
| 1792 | AM_RANGE(0x0f000000, 0x0fffffff) AM_RAM AM_SHARE("dc_ram")// mirror |
| 1793 | 1793 | |
| 1794 | | AM_RANGE(0x8c000000, 0x8cffffff) AM_RAM AM_SHARE("share4") // RAM access through cache |
| 1795 | | AM_RANGE(0x8d000000, 0x8dffffff) AM_RAM AM_SHARE("share4") // RAM access through cache |
| 1794 | AM_RANGE(0x8c000000, 0x8cffffff) AM_RAM AM_SHARE("dc_ram") // RAM access through cache |
| 1795 | AM_RANGE(0x8d000000, 0x8dffffff) AM_RAM AM_SHARE("dc_ram") // RAM access through cache |
| 1796 | 1796 | |
| 1797 | 1797 | /* Area 4 - half the texture memory, like dreamcast, not naomi */ |
| 1798 | 1798 | AM_RANGE(0x10000000, 0x107fffff) AM_MIRROR(0x02000000) AM_WRITE_LEGACY(ta_fifo_poly_w ) |
trunk/src/mame/drivers/neogeo.c
| r17836 | r17837 | |
| 167 | 167 | *************************************/ |
| 168 | 168 | |
| 169 | 169 | static UINT8 *memcard_data; |
| 170 | | static UINT16 *save_ram; |
| 171 | 170 | |
| 172 | 171 | static const char *audio_banks[4] = |
| 173 | 172 | { |
| r17836 | r17837 | |
| 499 | 498 | { |
| 500 | 499 | |
| 501 | 500 | if (m_save_ram_unlocked) |
| 502 | | COMBINE_DATA(&save_ram[offset]); |
| 501 | COMBINE_DATA(&m_save_ram[offset]); |
| 503 | 502 | } |
| 504 | 503 | |
| 505 | 504 | |
| r17836 | r17837 | |
| 992 | 991 | neogeo_state *state = machine.driver_data<neogeo_state>(); |
| 993 | 992 | |
| 994 | 993 | /* configure NVRAM */ |
| 995 | | machine.device<nvram_device>("saveram")->set_base(save_ram, 0x10000); |
| 994 | machine.device<nvram_device>("saveram")->set_base(state->m_save_ram, 0x10000); |
| 996 | 995 | |
| 997 | 996 | /* set the BIOS bank */ |
| 998 | 997 | state->membank(NEOGEO_BANK_BIOS)->set_base(state->memregion("mainbios")->base()); |
| r17836 | r17837 | |
| 1105 | 1104 | AM_RANGE(0x400000, 0x401fff) AM_MIRROR(0x3fe000) AM_READWRITE(neogeo_paletteram_r, neogeo_paletteram_w) |
| 1106 | 1105 | AM_RANGE(0x800000, 0x800fff) AM_READWRITE(memcard_r, memcard_w) |
| 1107 | 1106 | AM_RANGE(0xc00000, 0xc1ffff) AM_MIRROR(0x0e0000) AM_ROMBANK(NEOGEO_BANK_BIOS) |
| 1108 | | AM_RANGE(0xd00000, 0xd0ffff) AM_MIRROR(0x0f0000) AM_RAM_WRITE(save_ram_w) AM_BASE_LEGACY(&save_ram) |
| 1107 | AM_RANGE(0xd00000, 0xd0ffff) AM_MIRROR(0x0f0000) AM_RAM_WRITE(save_ram_w) AM_SHARE("save_ram") |
| 1109 | 1108 | AM_RANGE(0xe00000, 0xffffff) AM_READ(neogeo_unmapped_r) |
| 1110 | 1109 | ADDRESS_MAP_END |
| 1111 | 1110 | |
trunk/src/mame/drivers/tmmjprd.c
| r17836 | r17837 | |
| 672 | 672 | AM_RANGE(0x000000, 0x1fffff) AM_ROM |
| 673 | 673 | AM_RANGE(0x200010, 0x200013) AM_READ(randomtmmjprds) // gfx chip status? |
| 674 | 674 | /* check these are used .. */ |
| 675 | | // AM_RANGE(0x200010, 0x200013) AM_WRITEONLY AM_BASE_LEGACY(&tmmjprd_viewregs0 ) |
| 675 | // AM_RANGE(0x200010, 0x200013) AM_WRITEONLY AM_SHARE("tmmjprd_viewregs0") |
| 676 | 676 | AM_RANGE(0x200100, 0x200117) AM_WRITEONLY AM_SHARE("tilemap_regs.0" ) // tilemap regs1 |
| 677 | 677 | AM_RANGE(0x200120, 0x200137) AM_WRITEONLY AM_SHARE("tilemap_regs.1" ) // tilemap regs2 |
| 678 | 678 | AM_RANGE(0x200140, 0x200157) AM_WRITEONLY AM_SHARE("tilemap_regs.2" ) // tilemap regs3 |
| r17836 | r17837 | |
| 681 | 681 | // AM_RANGE(0x200300, 0x200303) AM_WRITE_LEGACY(tmmjprd_rombank_w) // used during rom testing, rombank/area select + something else? |
| 682 | 682 | AM_RANGE(0x20040c, 0x20040f) AM_WRITE(tmmjprd_brt_1_w) |
| 683 | 683 | AM_RANGE(0x200410, 0x200413) AM_WRITE(tmmjprd_brt_2_w) |
| 684 | | // AM_RANGE(0x200500, 0x200503) AM_WRITEONLY AM_BASE_LEGACY(&tmmjprd_viewregs7 ) |
| 685 | | // AM_RANGE(0x200700, 0x20070f) AM_WRITE(tmmjprd_blitter_w) AM_BASE_LEGACY(&tmmjprd_blitterregs ) |
| 686 | | // AM_RANGE(0x200800, 0x20080f) AM_WRITEONLY AM_BASE_LEGACY(&tmmjprd_viewregs9 ) // never changes? |
| 684 | // AM_RANGE(0x200500, 0x200503) AM_WRITEONLY AM_SHARE("tmmjprd_viewregs7") |
| 685 | // AM_RANGE(0x200700, 0x20070f) AM_WRITE(tmmjprd_blitter_w) AM_SHARE("tmmjprd_blitterregs") |
| 686 | // AM_RANGE(0x200800, 0x20080f) AM_WRITEONLY AM_SHARE("tmmjprd_viewregs9") // never changes? |
| 687 | 687 | AM_RANGE(0x200900, 0x2009ff) AM_DEVREADWRITE16("i5000snd", i5000snd_device, read, write, 0xffffffff) |
| 688 | 688 | /* hmm */ |
| 689 | | // AM_RANGE(0x279700, 0x279713) AM_WRITEONLY AM_BASE_LEGACY(&tmmjprd_viewregs10 ) |
| 689 | // AM_RANGE(0x279700, 0x279713) AM_WRITEONLY AM_SHARE("tmmjprd_viewregs10") |
| 690 | 690 | /* tilemaps */ |
| 691 | 691 | AM_RANGE(0x280000, 0x283fff) AM_READWRITE(tmmjprd_tilemap0_r,tmmjprd_tilemap0_w) |
| 692 | 692 | AM_RANGE(0x284000, 0x287fff) AM_READWRITE(tmmjprd_tilemap1_r,tmmjprd_tilemap1_w) |
trunk/src/mame/drivers/aleck64.c
| r17836 | r17837 | |
| 276 | 276 | */ |
| 277 | 277 | |
| 278 | 278 | static ADDRESS_MAP_START( n64_map, AS_PROGRAM, 32, n64_state ) |
| 279 | | AM_RANGE(0x00000000, 0x007fffff) AM_RAM /*AM_MIRROR(0xc0000000)*/ AM_BASE_LEGACY(&rdram) // RDRAM |
| 279 | AM_RANGE(0x00000000, 0x007fffff) AM_RAM /*AM_MIRROR(0xc0000000)*/ AM_SHARE("rdram") // RDRAM |
| 280 | 280 | |
| 281 | 281 | AM_RANGE(0x03f00000, 0x03f00027) AM_DEVREADWRITE("rcp", n64_periphs, rdram_reg_r, rdram_reg_w) |
| 282 | | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("dmem") // RSP DMEM |
| 283 | | AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("imem") // RSP IMEM |
| 282 | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("rsp_dmem") // RSP DMEM |
| 283 | AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("rsp_imem") // RSP IMEM |
| 284 | 284 | AM_RANGE(0x04040000, 0x040fffff) AM_DEVREADWRITE_LEGACY("rsp", n64_sp_reg_r, n64_sp_reg_w) // RSP |
| 285 | 285 | AM_RANGE(0x04100000, 0x041fffff) AM_DEVREADWRITE_LEGACY("rsp", n64_dp_reg_r, n64_dp_reg_w) // RDP |
| 286 | 286 | AM_RANGE(0x04300000, 0x043fffff) AM_DEVREADWRITE("rcp", n64_periphs, mi_reg_r, mi_reg_w) // MIPS Interface |
| r17836 | r17837 | |
| 305 | 305 | ADDRESS_MAP_END |
| 306 | 306 | |
| 307 | 307 | static ADDRESS_MAP_START( rsp_map, AS_PROGRAM, 32, n64_state ) |
| 308 | | AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("dmem") |
| 309 | | AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("imem") |
| 310 | | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_BASE_LEGACY(&rsp_dmem) AM_SHARE("dmem") |
| 311 | | AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_BASE_LEGACY(&rsp_imem) AM_SHARE("imem") |
| 308 | AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("rsp_dmem") |
| 309 | AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("rsp_imem") |
| 310 | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("rsp_dmem") |
| 311 | AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("rsp_imem") |
| 312 | 312 | ADDRESS_MAP_END |
| 313 | 313 | |
| 314 | 314 | static INPUT_PORTS_START( aleck64 ) |
trunk/src/mame/drivers/namcos2.c
| r17836 | r17837 | |
| 594 | 594 | AM_RANGE(0x440000, 0x44ffff) AM_READWRITE(paletteram_word_r,paletteram_word_w) AM_SHARE("paletteram") |
| 595 | 595 | AM_RANGE(0x460000, 0x460fff) AM_READWRITE(dpram_word_r,dpram_word_w) |
| 596 | 596 | AM_RANGE(0x468000, 0x468fff) AM_READWRITE(dpram_word_r,dpram_word_w) /* mirror */ |
| 597 | | AM_RANGE(0x480000, 0x483fff) AM_READWRITE_LEGACY(namcos2_68k_serial_comms_ram_r,namcos2_68k_serial_comms_ram_w) AM_BASE_LEGACY(&namcos2_68k_serial_comms_ram) |
| 598 | | AM_RANGE(0x4a0000, 0x4a000f) AM_READWRITE_LEGACY(namcos2_68k_serial_comms_ctrl_r,namcos2_68k_serial_comms_ctrl_w) |
| 597 | AM_RANGE(0x480000, 0x483fff) AM_READWRITE(serial_comms_ram_r,serial_comms_ram_w) AM_SHARE("serialram") |
| 598 | AM_RANGE(0x4a0000, 0x4a000f) AM_READWRITE(serial_comms_ctrl_r,serial_comms_ctrl_w) |
| 599 | 599 | ADDRESS_MAP_END |
| 600 | 600 | |
| 601 | 601 | /*************************************************************/ |
trunk/src/mame/drivers/nmk16.c
| r17836 | r17837 | |
| 882 | 882 | AM_RANGE(0x044022, 0x044023) AM_READNOP /* No Idea */ |
| 883 | 883 | // AM_RANGE(0x0b0000, 0x0b7fff) AM_RAM /* Work RAM */ |
| 884 | 884 | // AM_RANGE(0x0b8000, 0x0b8fff) AM_RAM AM_SHARE("spriteram") /* Sprite RAM */ |
| 885 | | // AM_RANGE(0x0b9000, 0x0bdfff) AM_RAM AM_BASE_LEGACY(&nmk16_mcu_work_ram) /* Work RAM */ |
| 886 | | // AM_RANGE(0x0be000, 0x0befff) AM_READWRITE(mcu_shared_r,tdragon_mcu_shared_w) AM_BASE_LEGACY(&nmk16_mcu_shared_ram) /* Work RAM */ |
| 885 | // AM_RANGE(0x0b9000, 0x0bdfff) AM_RAM AM_SHARE("mcu_work_ram") /* Work RAM */ |
| 886 | // AM_RANGE(0x0be000, 0x0befff) AM_READWRITE(mcu_shared_r,tdragon_mcu_shared_w) AM_SHARE("mcu_shared_ram") /* Work RAM */ |
| 887 | 887 | // AM_RANGE(0x0bf000, 0x0bffff) AM_RAM /* Work RAM */ |
| 888 | 888 | AM_RANGE(0x0b0000, 0x0bffff) AM_RAM_WRITE(tdragon_mainram_w ) AM_SHARE("mainram") |
| 889 | 889 | AM_RANGE(0x0c0000, 0x0c0001) AM_READ_PORT("IN0") |
trunk/src/mess/drivers/ng_aes.c
| r17836 | r17837 | |
| 110 | 110 | |
| 111 | 111 | //static UINT16 *save_ram; |
| 112 | 112 | |
| 113 | | UINT16* neocd_work_ram; |
| 113 | //UINT16* neocd_work_ram; |
| 114 | 114 | |
| 115 | 115 | /************************************* |
| 116 | 116 | * |
| r17836 | r17837 | |
| 1310 | 1310 | static ADDRESS_MAP_START( neocd_main_map, AS_PROGRAM, 16, ng_aes_state ) |
| 1311 | 1311 | AM_RANGE(0x000000, 0x00007f) AM_RAMBANK(NEOGEO_BANK_VECTORS) |
| 1312 | 1312 | AM_RANGE(0x000080, 0x0fffff) AM_RAM |
| 1313 | | AM_RANGE(0x100000, 0x10ffff) AM_MIRROR(0x0f0000) AM_RAM AM_BASE_LEGACY(&neocd_work_ram) |
| 1313 | AM_RANGE(0x100000, 0x10ffff) AM_MIRROR(0x0f0000) AM_RAM AM_SHARE("neocd_work_ram") |
| 1314 | 1314 | /* some games have protection devices in the 0x200000 region, it appears to map to cart space, not surprising, the ROM is read here too */ |
| 1315 | 1315 | AM_RANGE(0x200000, 0x2fffff) AM_ROMBANK(NEOGEO_BANK_CARTRIDGE) |
| 1316 | 1316 | AM_RANGE(0x2ffff0, 0x2fffff) AM_WRITE(main_cpu_bank_select_w) |
trunk/src/mess/drivers/dc.c
| r17836 | r17837 | |
| 40 | 40 | extern READ64_HANDLER( dc_mess_g1_ctrl_r ); |
| 41 | 41 | extern WRITE64_HANDLER( dc_mess_g1_ctrl_w ); |
| 42 | 42 | |
| 43 | | static UINT64 *dc_ram; |
| 44 | | |
| 45 | 43 | static READ64_HANDLER( dcus_idle_skip_r ) |
| 46 | 44 | { |
| 47 | 45 | if (space->device().safe_pc()==0xc0ba52a) |
| 48 | 46 | space->device().execute().spin_until_time(attotime::from_usec(2500)); |
| 49 | 47 | // device_spinuntil_int(&space->device()); |
| 50 | 48 | |
| 51 | | return dc_ram[0x2303b0/8]; |
| 49 | return space->machine().driver_data<dc_state>()->dc_ram[0x2303b0/8]; |
| 52 | 50 | } |
| 53 | 51 | |
| 54 | 52 | static READ64_HANDLER( dcjp_idle_skip_r ) |
| r17836 | r17837 | |
| 57 | 55 | space->device().execute().spin_until_time(attotime::from_usec(2500)); |
| 58 | 56 | // device_spinuntil_int(&space->device()); |
| 59 | 57 | |
| 60 | | return dc_ram[0x2302f8/8]; |
| 58 | return space->machine().driver_data<dc_state>()->dc_ram[0x2302f8/8]; |
| 61 | 59 | } |
| 62 | 60 | |
| 63 | 61 | DRIVER_INIT_MEMBER(dc_state,dc) |
| r17836 | r17837 | |
| 179 | 177 | AM_RANGE(0x05000000, 0x05ffffff) AM_RAM AM_SHARE("frameram") // apparently this actually accesses the same memory as the 64-bit texture memory access, but in a different format, keep it apart for now |
| 180 | 178 | |
| 181 | 179 | /* Area 3 */ |
| 182 | | AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM AM_SHARE("share4") AM_BASE_LEGACY(&dc_ram) |
| 183 | | AM_RANGE(0x0d000000, 0x0dffffff) AM_RAM AM_SHARE("share4")// extra ram on Naomi (mirror on DC) |
| 184 | | AM_RANGE(0x0e000000, 0x0effffff) AM_RAM AM_SHARE("share4")// mirror |
| 185 | | AM_RANGE(0x0f000000, 0x0fffffff) AM_RAM AM_SHARE("share4")// mirror |
| 180 | AM_RANGE(0x0c000000, 0x0cffffff) AM_RAM AM_SHARE("dc_ram") |
| 181 | AM_RANGE(0x0d000000, 0x0dffffff) AM_RAM AM_SHARE("dc_ram")// extra ram on Naomi (mirror on DC) |
| 182 | AM_RANGE(0x0e000000, 0x0effffff) AM_RAM AM_SHARE("dc_ram")// mirror |
| 183 | AM_RANGE(0x0f000000, 0x0fffffff) AM_RAM AM_SHARE("dc_ram")// mirror |
| 186 | 184 | |
| 187 | 185 | /* Area 4 */ |
| 188 | 186 | AM_RANGE(0x10000000, 0x107fffff) AM_WRITE_LEGACY(ta_fifo_poly_w ) |
| r17836 | r17837 | |
| 193 | 191 | AM_RANGE(0x12800000, 0x12ffffff) AM_WRITE_LEGACY(ta_fifo_yuv_w ) |
| 194 | 192 | AM_RANGE(0x13000000, 0x137fffff) AM_WRITE_LEGACY(ta_texture_directpath1_w ) AM_MIRROR(0x00800000) // access to texture / fraembfufer memory (either 32-bit or 64-bit area depending on SB_LMMODE1 register - cannot be written directly, only through dma / store queue |
| 195 | 193 | |
| 196 | | AM_RANGE(0x8c000000, 0x8cffffff) AM_RAM AM_SHARE("share4") // another RAM mirror |
| 194 | AM_RANGE(0x8c000000, 0x8cffffff) AM_RAM AM_SHARE("dc_ram") // another RAM mirror |
| 197 | 195 | |
| 198 | 196 | AM_RANGE(0xa0000000, 0xa01fffff) AM_ROM AM_REGION("maincpu", 0) |
| 199 | 197 | ADDRESS_MAP_END |
trunk/src/mess/drivers/n64.c
| r17836 | r17837 | |
| 20 | 20 | } |
| 21 | 21 | |
| 22 | 22 | static ADDRESS_MAP_START( n64_map, AS_PROGRAM, 32, n64_state ) |
| 23 | | AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_BASE_LEGACY(&rdram) // RDRAM |
| 23 | AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_SHARE("rdram") // RDRAM |
| 24 | 24 | AM_RANGE(0x03f00000, 0x03f00027) AM_DEVREADWRITE("rcp", n64_periphs, rdram_reg_r, rdram_reg_w) |
| 25 | 25 | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("dmem") // RSP DMEM |
| 26 | 26 | AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("imem") // RSP IMEM |
| r17836 | r17837 | |
| 33 | 33 | AM_RANGE(0x04700000, 0x047fffff) AM_DEVREADWRITE("rcp", n64_periphs, ri_reg_r, ri_reg_w) // RDRAM Interface |
| 34 | 34 | AM_RANGE(0x04800000, 0x048fffff) AM_DEVREADWRITE("rcp", n64_periphs, si_reg_r, si_reg_w) // Serial Interface |
| 35 | 35 | AM_RANGE(0x05000508, 0x0500050b) AM_READ_LEGACY(dd_null_r); |
| 36 | | AM_RANGE(0x08000000, 0x0801ffff) AM_RAM AM_BASE_LEGACY(&n64_sram) // Cartridge SRAM |
| 36 | AM_RANGE(0x08000000, 0x0801ffff) AM_RAM AM_SHARE("sram") // Cartridge SRAM |
| 37 | 37 | AM_RANGE(0x10000000, 0x13ffffff) AM_ROM AM_REGION("user2", 0) // Cartridge |
| 38 | 38 | AM_RANGE(0x1fc00000, 0x1fc007bf) AM_ROM AM_REGION("user1", 0) // PIF ROM |
| 39 | 39 | AM_RANGE(0x1fc007c0, 0x1fc007ff) AM_DEVREADWRITE("rcp", n64_periphs, pif_ram_r, pif_ram_w) |
| 40 | 40 | ADDRESS_MAP_END |
| 41 | 41 | |
| 42 | 42 | static ADDRESS_MAP_START( n64dd_map, AS_PROGRAM, 32, n64_state ) |
| 43 | | AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_BASE_LEGACY(&rdram) // RDRAM |
| 43 | AM_RANGE(0x00000000, 0x007fffff) AM_RAM AM_SHARE("rdram") // RDRAM |
| 44 | 44 | AM_RANGE(0x03f00000, 0x03f00027) AM_DEVREADWRITE("rcp", n64_periphs, rdram_reg_r, rdram_reg_w) |
| 45 | 45 | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("dmem") // RSP DMEM |
| 46 | 46 | AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("imem") // RSP IMEM |
| r17836 | r17837 | |
| 54 | 54 | AM_RANGE(0x04800000, 0x048fffff) AM_DEVREADWRITE("rcp", n64_periphs, si_reg_r, si_reg_w) // Serial Interface |
| 55 | 55 | AM_RANGE(0x05000000, 0x05ffffff) AM_DEVREADWRITE("rcp", n64_periphs, dd_reg_r, dd_reg_w) // 64DD Interface |
| 56 | 56 | AM_RANGE(0x06000000, 0x063fffff) AM_ROM AM_REGION("ddipl", 0) // 64DD IPL ROM |
| 57 | | AM_RANGE(0x08000000, 0x0801ffff) AM_RAM AM_BASE_LEGACY(&n64_sram) // Cartridge SRAM |
| 57 | AM_RANGE(0x08000000, 0x0801ffff) AM_RAM AM_SHARE("sram") // Cartridge SRAM |
| 58 | 58 | AM_RANGE(0x10000000, 0x13ffffff) AM_ROM AM_REGION("user2", 0) // Cartridge |
| 59 | 59 | AM_RANGE(0x1fc00000, 0x1fc007bf) AM_ROM AM_REGION("user1", 0) // PIF ROM |
| 60 | 60 | AM_RANGE(0x1fc007c0, 0x1fc007ff) AM_DEVREADWRITE("rcp", n64_periphs, pif_ram_r, pif_ram_w) |
| r17836 | r17837 | |
| 63 | 63 | static ADDRESS_MAP_START( rsp_map, AS_PROGRAM, 32, n64_state ) |
| 64 | 64 | AM_RANGE(0x00000000, 0x00000fff) AM_RAM AM_SHARE("dmem") |
| 65 | 65 | AM_RANGE(0x00001000, 0x00001fff) AM_RAM AM_SHARE("imem") |
| 66 | | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_BASE_LEGACY(&rsp_dmem) AM_SHARE("dmem") |
| 67 | | AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_BASE_LEGACY(&rsp_imem) AM_SHARE("imem") |
| 66 | AM_RANGE(0x04000000, 0x04000fff) AM_RAM AM_SHARE("rsp_dmem") AM_SHARE("dmem") |
| 67 | AM_RANGE(0x04001000, 0x04001fff) AM_RAM AM_SHARE("rsp_imem") AM_SHARE("imem") |
| 68 | 68 | ADDRESS_MAP_END |
| 69 | 69 | |
| 70 | 70 | static INPUT_PORTS_START( n64 ) |