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r17835 Wednesday 12th September, 2012 at 14:27:13 UTC by Angelo Salese
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[src/emu/machine]	seibu_cop.c seibu_cop.h
[src/mame/machine]	seicop.c

trunk/src/mame/machine/seicop.c

r17834	r17835
1542	1542	case (0x026/2): { state->m_scrollram16[3] = seibu_vregs[offset]; break; }
1543	1543	case (0x028/2): { state->m_scrollram16[4] = seibu_vregs[offset]; break; }
1544	1544	case (0x02a/2): { state->m_scrollram16[5] = seibu_vregs[offset]; break; }
1545		//      case (0x03a/2): Godzilla sets this up to be 0x1ef / 0x1eb, presumably bit 2 is vertical wrap-around on/off?
	1545
1546	1546	default: { logerror("seibu_common_video_regs_w unhandled offset %02x %04x\n",offset*2,data); break; }
1547	1547	}
1548	1548	}
r17834	r17835
2630	2630	//  return;
2631	2631
2632	2632	address = (cop_dma_src[cop_dma_trigger] << 6);
2633		length = ((cop_dma_size[cop_dma_trigger]+1) << 4);
	2633	length = ((cop_dma_size[cop_dma_trigger]+1) << 5);
2634	2634
2635		for (i=address;i<address+length;i+=4)
	2635	for (i=address;i<address+length;i+=2)
2636	2636	{
2637		space->write_dword(i, fill_val);
	2637	space->write_word(i, fill_val);
2638	2638	}
2639	2639
2640	2640	return;

trunk/src/emu/machine/seibu_cop.c

r17834	r17835
1	1	/***************************************************************************
2	2
3		Template for skeleton device
	3	Seibu COP protection device
4	4
	5	(this header needs expanding)
	6
5	7	***************************************************************************/
6	8
7	9	#include "emu.h"
r17834	r17835
16	18	// device type definition
17	19	const device_type SEIBU_COP = &device_creator<seibu_cop_device>;
18	20
	21	#if 0
	22	static ADDRESS_MAP_START( seibu_cop_vram, AS_0, 16, seibu_cop_device )
	23	ADDRESS_MAP_END
	24	#endif
19	25
20	26	//**************************************************************************
21	27	//  LIVE DEVICE
r17834	r17835
86	92	//  READ/WRITE HANDLERS
87	93	//**************************************************************************
88	94
89		READ8_MEMBER( seibu_cop_device::read )
	95	READ16_MEMBER( seibu_cop_device::read )
90	96	{
91	97	return 0;
92	98	}
93	99
94		WRITE8_MEMBER( seibu_cop_device::write )
	100	WRITE16_MEMBER( seibu_cop_device::write )
95	101	{
	102	switch(offset)
	103	{
	104	case 0x028/2:
	105	COMBINE_DATA(&m_dma_fill_val_lo);
	106	m_dma_fill_val = (m_dma_fill_val_lo) | (m_dma_fill_val_hi << 16);
	107	break;
	108
	109	case 0x02a/2:
	110	COMBINE_DATA(&m_dma_fill_val_hi);
	111	m_dma_fill_val = (m_dma_fill_val_lo) | (m_dma_fill_val_hi << 16);
	112	break;
	113
	114	case (0x05a/2): COMBINE_DATA(&m_pal_brightness_val); break;
	115	case (0x05c/2): COMBINE_DATA(&m_pal_brightness_mode); break;
	116
	117	case 0x074/2:
	118	/*
	119	This sets up a DMA mode of some sort
	120	0x0e00: grainbow, cupsoc
	121	0x0a00: legionna, godzilla, denjinmk
	122	0x0600: heatbrl
	123	0x1e00: zeroteam, xsedae
	124	raiden2 and raidendx doesn't set this up, this could indicate that this is related to the non-private buffer DMAs
	125	(both only uses 0x14 and 0x15 as DMAs)
	126	*/
	127	COMBINE_DATA(&m_dma_unk_param);
	128	break;
	129
	130	case (0x076/2):
	131	COMBINE_DATA(&m_cop_dma_fade_table);
	132	break;
	133
	134	case (0x078/2): /* DMA source address */
	135	COMBINE_DATA(&m_cop_dma_src[m_cop_dma_trigger]);
	136	break;
	137
	138	case (0x07a/2): /* DMA length */
	139	COMBINE_DATA(&m_cop_dma_size[m_cop_dma_trigger]);
	140	break;
	141
	142	case (0x07c/2): /* DMA destination */
	143	COMBINE_DATA(&m_cop_dma_dst[m_cop_dma_trigger]);
	144	break;
	145
	146	case (0x07e/2): /* DMA parameter */
	147	COMBINE_DATA(&m_cop_dma_exec_param);
	148	m_cop_dma_trigger = m_cop_dma_exec_param & 7;
	149	break;
	150	}
96	151	}

trunk/src/emu/machine/seibu_cop.h

r17834	r17835
44	44	seibu_cop_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock);
45	45
46	46	// I/O operations
47		DECLARE_WRITE8_MEMBER( write );
48		DECLARE_READ8_MEMBER( read );
	47	DECLARE_WRITE16_MEMBER( write );
	48	DECLARE_READ16_MEMBER( read );
49	49
50	50	protected:
51	51	// device-level overrides
r17834	r17835
57	57	private:
58	58	devcb_resolved_read8      m_in_mreq_func;
59	59	devcb_resolved_write8      m_out_mreq_func;
	60
	61	UINT16 m_dma_unk_param, m_cop_dma_fade_table, m_cop_dma_src[8], m_cop_dma_dst[8], m_cop_dma_size[8], m_cop_dma_exec_param;
	62	UINT8 m_cop_dma_trigger;
	63	UINT16 m_dma_fill_val_lo,m_dma_fill_val_hi;
	64	UINT32 m_dma_fill_val;
	65	UINT8 m_pal_brightness_val, m_pal_brightness_mode;
60	66	};
61	67
62	68

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