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r17789 Tuesday 11th September, 2012 at 05:50:50 UTC by Aaron Giles
Add safe_pc() and safe_pcbase() methods to device_t. Convert all cpu_get_pc() to safe_pc() and cpu_getpreviouspc() to safe_basepc(). Removed the old macros.

[src/emu]	devcpu.h device.h distate.c distate.h
[src/emu/cpu/m6502]	opsce02.h
[src/emu/cpu/m6800]	m6800.c
[src/emu/cpu/m68000]	68307bus.c 68307ser.c 68307sim.c 68307tmu.c 68340dma.c 68340ser.c 68340sim.c 68340tmu.c m68kcpu.c
[src/emu/cpu/sh2]	sh2comn.c
[src/emu/cpu/tlcs90]	tlcs90.c
[src/emu/cpu/tms34010]	34010gfx.c tms34010.c
[src/emu/debug]	dvdisasm.c
[src/emu/machine]	53c810.c am53cf96.c k056230.c ldpr8210.c ldv1000.c ldvp931.c ncr539x.c tmp68301.c wd33c93.c
[src/emu/sound]	nile.c
[src/emu/video]	hd63484.c pc_vga.c voodoo.c
[src/mame/audio]	beezer.c cage.c dcs.c exidy.c harddriv.c invinco.c jaguar.c leland.c mw8080bw.c segasnd.c seibu.c snes_snd.c taito_en.c taitosnd.c
[src/mame/drivers]	1943.c 2mindril.c 39in1.c 8080bw.c 88games.c acommand.c aeroboto.c albazg.c aleck64.c alpha68k.c artmagic.c astrafr.c astrocorp.c atarigt.c atarigx2.c backfire.c bbusters.c beathead.c bfcobra.c bfm_sc4h.c bfm_swp.c bigevglf.c bionicc.c bking.c blockhl.c bmcbowl.c btime.c cabaret.c calchase.c cave.c cbasebal.c cbuster.c cd32.c cdi.c centiped.c chaknpop.c cninja.c cntsteer.c cobra.c coolpool.c cps1.c crbaloon.c crgolf.c cvs.c cyclemb.c d9final.c darius.c dblewing.c dcheese.c ddenlovr.c ddragon.c ddragon3.c dec0.c deco32.c deco_mlc.c djmain.c dkong.c dorachan.c dunhuang.c dynax.c enigma2.c eolithsp.c epos.c esd16.c esripsys.c exerion.c fantland.c fastfred.c firetrap.c fitfight.c flstory.c fromanc2.c fuukifg2.c gaelco3d.c gaiden.c galastrm.c galaxian.c galaxold.c gaplus.c gbusters.c gcpinbal.c gei.c ghosteo.c gladiatr.c glass.c goal92.c goindol.c gradius3.c gsword.c gunbustr.c halleys.c hexion.c hitpoker.c hng64.c homedata.c hotblock.c hyprduel.c igs009.c igs011.c igs_m027.c igspoker.c itech32.c jackie.c jaguar.c jalmah.c jokrwild.c kaneko16.c kickgoal.c kinst.c koftball.c konamigv.c konamigx.c konamim2.c ksys573.c ladybug.c lastfght.c lethal.c liberate.c littlerb.c looping.c lwings.c m107.c m92.c macrossp.c macs.c mainevt.c malzak.c mcr.c mcr3.c mcr68.c mediagx.c megadrvb.c megaplay.c meritm.c metro.c midqslvr.c midvunit.c midzeus.c missile.c mitchell.c mjkjidai.c mjsister.c model1.c model2.c model3.c mole.c monzagp.c mosaic.c mpu3.c mpu4hw.c mpu4vid.c mpu5hw.c mquake.c msisaac.c mw8080bw.c mystwarr.c namcona1.c namconb1.c namcos10.c namcos11.c namcos21.c namcos22.c namcos23.c naughtyb.c neogeo.c neoprint.c ninjaw.c nmk16.c nwk-tr.c nyny.c offtwall.c ojankohs.c opwolf.c overdriv.c pacman.c pandoras.c paradise.c parodius.c pasha2.c pbaction.c pcat_nit.c pcxt.c pgm.c pirates.c pktgaldx.c playmark.c pluto5.c plygonet.c pntnpuzl.c polepos.c policetr.c ppmast93.c psikyo.c punchout.c qdrmfgp.c quizo.c quizpun2.c r2dtank.c raiden.c realbrk.c rmhaihai.c rollerg.c roul.c route16.c royalmah.c sandscrp.c saturn.c scramble.c sderby.c seattle.c segac2.c segag80r.c segag80v.c segald.c segaorun.c segas16b.c segas18.c segas24.c segas32.c seibuspi.c seicross.c seta.c seta2.c sf.c shangha3.c simpl156.c slapfght.c snesb.c solomon.c sothello.c spaceg.c spdodgeb.c spoker.c spy.c srmp6.c ssfindo.c sshangha.c ssv.c stadhero.c starwars.c strnskil.c stv.c suna16.c suna8.c supbtime.c superchs.c superqix.c suprgolf.c suprnova.c surpratk.c system1.c system16.c taito_f2.c taito_f3.c taito_l.c taito_o.c taito_z.c taitoair.c taitojc.c taitotz.c tecmosys.c tehkanwc.c tetrisp2.c thedeep.c thunderx.c tickee.c tigeroad.c tmaster.c tmnt.c toaplan2.c tomcat.c topspeed.c trvmadns.c tumbleb.c twinkle.c undrfire.c vamphalf.c vball.c vegas.c vendetta.c viper.c voyager.c vsnes.c wecleman.c wgp.c wheelfir.c witch.c xexex.c xmen.c xtheball.c xyonix.c yunsung8.c zn.c
[src/mame/includes]	megadriv.h
[src/mame/machine]	3do.c ajax.c amiga.c archimds.c arkanoid.c asic65.c atarigen.c balsente.c bonzeadv.c btime.c bublbobl.c buggychl.c cchip.c cd32.c cdi070.c cdicdic.c cdislave.c chaknpop.c dc.c dec0.c decocass.c decoprot.c fddebug.c flstory.c gaelco2.c gaelcrpt.c galaxold.c harddriv.c kaneko_hit.c kaneko_toybox.c konamigx.c konppc.c leland.c lkage.c lsasquad.c m68kfmly.c maniach.c mcr.c mcr68.c md_cart.c mega32x.c megadriv.c megavdp.c mexico86.c midtunit.c midwayic.c midwunit.c midxunit.c midyunit.c model1.c n64.c namcoio.c namcond1.c namcos1.c namcos2.c naomi.c neoboot.c neoprot.c nmk004.c opwolf.c pgmprot1.c pgmprot2.c pgmprot3.c pgmprot4.c pgmprot6.c retofinv.c scramble.c segaic16.c segas32.c seicop.c slapfght.c slapstic.c smpc.c snes.c stvprot.c taitoio.c taitosj.c tatsumi.c tnzs.c toaplan1.c twincobr.c tx1.c volfied.c xevious.c
[src/mame/video]	airbustr.c battlera.c beathead.c bwing.c capbowl.c cischeat.c cvs.c dc.c dcheese.c dogfgt.c dooyong.c dynax.c flstory.c galivan.c galpani2.c ginganin.c gticlub.c hexion.c homedata.c itech8.c jaguar.c kaneko_grap2.c kaneko_spr.c konamiic.c konicdev.c lethalj.c m107.c m92.c mcd212.c megasys1.c midvunit.c midzeus.c midzeus2.c mitchell.c mjkjidai.c othldrby.c policetr.c scn2674.c segag80r.c seta.c seta2.c st0016.c st0020.c stvvdp1.c suna16.c taito_l.c taitoic.c tatsumi.c victory.c williams.c
[src/mess/audio]	mea8000.c
[src/mess/devices]	sonydriv.c
[src/mess/drivers]	a2600.c apollo.c bebox.c camplynx.c craft.c cxhumax.c dc.c esq1.c esq5505.c ex800.c gba.c gp2x.c gp32.c ip20.c ip22.c mac.c nc.c next.c ng_aes.c pasogo.c pasopia7.c pc8801.c pc88va.c pc9801.c rainbow.c rex6000.c rvoice.c scv.c sgi_ip2.c sgi_ip6.c smc777.c socrates.c ssystem3.c supracan.c vboy.c vii.c vk100.c x1.c x68k.c
[src/mess/machine]	3c505.c a2cffa.c a2memexp.c a2mockingboard.c a2scsi.c a2videoterm.c amigacd.c amigacrt.c apollo_kbd.c apple2.c bbc.c bebox.c c65.c coco.c compis.c cuda.c dccons.c dec_lk201.c dgn_beta.c egret.c gamecom.c gb.c hp48.c intv.c isa_hdc.c isa_ide_cd.c lisa.c mac.c macpci.c mb8795.c mc6843.c mc6846.c mc6854.c mface2.c mos6530.c ncr5380.c ncr5390.c nes.c nextmo.c nubus_asntmc3b.c omti8621.c oric.c pc.c pc1403.c pce.c pokemini.c psxcd.c rm380z.c rmnimbus.c sc499.c sgi.c sms.c sym1.c tandy1t.c thomflop.c thomson.c wswan.c z80ne.c
[src/mess/video]	crtc_ega.c gba.c mac.c newport.c nubus_48gc.c nubus_cb264.c nubus_m2hires.c nubus_spec8.c nubus_specpdq.c nubus_wsportrait.c rm380z.c rmnimbus.c ssystem3.c stic.c x68k.c

trunk/src/mame/audio/jaguar.c

r17788	r17789
217	217	READ16_MEMBER( jaguar_state::jerry_regs_r )
218	218	{
219	219	if (offset != JINTCTRL && offset != JINTCTRL+2)
220		logerror("%08X:jerry read register @ F10%03X\n", cpu_get_previouspc(&space.device()), offset * 2);
	220	logerror("%08X:jerry read register @ F10%03X\n", space.device().safe_pcbase(), offset * 2);
221	221
222	222	switch (offset)
223	223	{
r17788	r17789
244	244	}
245	245
246	246	if (offset != JINTCTRL && offset != JINTCTRL+2 && offset != ASICTRL)
247		logerror("%08X:jerry write register @ F10%03X = %04X\n", cpu_get_previouspc(&space.device()), offset * 2, data);
	247	logerror("%08X:jerry write register @ F10%03X = %04X\n", space.device().safe_pcbase(), offset * 2, data);
248	248	}
249	249
250	250
r17788	r17789
322	322
323	323	READ32_MEMBER( jaguar_state::serial_r )
324	324	{
325		logerror("%08X:jaguar_serial_r(%X)\n", cpu_get_previouspc(&space.device()), offset);
	325	logerror("%08X:jaguar_serial_r(%X)\n", space.device().safe_pcbase(), offset);
326	326	return 0;
327	327	}
328	328
r17788	r17789
358	358	break;
359	359
360	360	default:
361		logerror("%08X:jaguar_serial_w(%X,%X)\n", cpu_get_previouspc(&space.device()), offset, data);
	361	logerror("%08X:jaguar_serial_w(%X,%X)\n", space.device().safe_pcbase(), offset, data);
362	362	break;
363	363	}
364	364	}

trunk/src/mame/audio/cage.c

r17788	r17789
410	410	}
411	411
412	412	if (LOG_32031_IOPORTS)
413		logerror("CAGE:%06X:%s read -> %08X\n", cpu_get_pc(&space->device()), register_names[offset & 0x7f], result);
	413	logerror("CAGE:%06X:%s read -> %08X\n", space->device().safe_pc(), register_names[offset & 0x7f], result);
414	414	return result;
415	415	}
416	416
r17788	r17789
423	423	COMBINE_DATA(&tms32031_io_regs[offset]);
424	424
425	425	if (LOG_32031_IOPORTS)
426		logerror("CAGE:%06X:%s write = %08X\n", cpu_get_pc(&space->device()), register_names[offset & 0x7f], tms32031_io_regs[offset]);
	426	logerror("CAGE:%06X:%s write = %08X\n", space->device().safe_pc(), register_names[offset & 0x7f], tms32031_io_regs[offset]);
427	427
428	428	switch (offset)
429	429	{
r17788	r17789
506	506	{
507	507	cage_t *state = &cage;
508	508	if (LOG_COMM)
509		logerror("%06X:CAGE read command = %04X\n", cpu_get_pc(&space->device()), state->from_main);
	509	logerror("%06X:CAGE read command = %04X\n", space->device().safe_pc(), state->from_main);
510	510	state->cpu_to_cage_ready = 0;
511	511	update_control_lines(space->machine());
512	512	device_set_input_line(state->cpu, TMS3203X_IRQ0, CLEAR_LINE);
r17788	r17789
519	519	if (LOG_COMM)
520	520	{
521	521	cage_t *state = &cage;
522		logerror("%06X:CAGE ack command = %04X\n", cpu_get_pc(&space->device()), state->from_main);
	522	logerror("%06X:CAGE ack command = %04X\n", space->device().safe_pc(), state->from_main);
523	523	}
524	524	}
525	525
r17788	r17789
528	528	{
529	529	cage_t *state = &cage;
530	530	if (LOG_COMM)
531		logerror("%06X:Data from CAGE = %04X\n", cpu_get_pc(&space->device()), data);
	531	logerror("%06X:Data from CAGE = %04X\n", space->device().safe_pc(), data);
532	532	driver_device *drvstate = space->machine().driver_data<driver_device>();
533	533	drvstate->soundlatch_word_w(*space, 0, data, mem_mask);
534	534	state->cage_to_cpu_ready = 1;

trunk/src/mame/audio/segasnd.c

r17788	r17789
465	465	{
466	466	usb_state *usb = get_safe_token(device);
467	467
468		LOG(("%04X:usb_data_r = %02X\n", cpu_get_pc(usb->maincpu), (usb->out_latch & 0x81) | (usb->in_latch & 0x7e)));
	468	LOG(("%04X:usb_data_r = %02X\n", usb->maincpu->safe_pc(), (usb->out_latch & 0x81) | (usb->in_latch & 0x7e)));
469	469
470	470	device_adjust_icount(usb->maincpu, -200);
471	471
r17788	r17789
496	496	{
497	497	usb_state *usb = get_safe_token(device);
498	498
499		LOG(("%04X:usb_data_w = %02X\n", cpu_get_pc(usb->maincpu), data));
	499	LOG(("%04X:usb_data_w = %02X\n", usb->maincpu->safe_pc(), data));
500	500	device->machine().scheduler().synchronize(FUNC(delayed_usb_data_w), data, usb);
501	501
502	502	/* boost the interleave so that sequences can be sent */
r17788	r17789
519	519	if (usb->in_latch & 0x80)
520	520	usb->program_ram[offset] = data;
521	521	else
522		LOG(("%04X:sega_usb_ram_w(%03X) = %02X while /LOAD disabled\n", cpu_get_pc(usb->maincpu), offset, data));
	522	LOG(("%04X:sega_usb_ram_w(%03X) = %02X while /LOAD disabled\n", usb->maincpu->safe_pc(), offset, data));
523	523	}
524	524
525	525
r17788	r17789
536	536
537	537	/* bits 0-6 are inputs and map to bits 0-6 of the input latch */
538	538	if ((usb->in_latch & 0x7f) != 0)
539		LOG(("%03X: P1 read = %02X\n", cpu_get_pc(usb->maincpu), usb->in_latch & 0x7f));
	539	LOG(("%03X: P1 read = %02X\n", usb->maincpu->safe_pc(), usb->in_latch & 0x7f));
540	540	return usb->in_latch & 0x7f;
541	541	}
542	542
r17788	r17789
547	547
548	548	/* bit 7 maps to bit 0 on the output latch */
549	549	usb->out_latch = (usb->out_latch & 0xfe) | (data >> 7);
550		LOG(("%03X: P1 write = %02X\n", cpu_get_pc(usb->maincpu), data));
	550	LOG(("%03X: P1 write = %02X\n", usb->maincpu->safe_pc(), data));
551	551	}
552	552
553	553
r17788	r17789
570	570	if ((old & 0x80) && !(data & 0x80))
571	571	usb->t1_clock = 0;
572	572
573		LOG(("%03X: P2 write -> bank=%d ready=%d clock=%d\n", cpu_get_pc(usb->maincpu), data & 3, (data >> 6) & 1, (data >> 7) & 1));
	573	LOG(("%03X: P2 write -> bank=%d ready=%d clock=%d\n", usb->maincpu->safe_pc(), data & 3, (data >> 6) & 1, (data >> 7) & 1));
574	574	}
575	575
576	576

trunk/src/mame/audio/taitosnd.c

r17788	r17789
110	110	break;
111	111
112	112	case 0x04:      // port status
113		//logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, cpu_get_pc(&space->device()) );
	113	//logerror("taitosnd: Master issued control value %02x (PC = %08x) \n",data, space->device().safe_pc() );
114	114	/* this does a hi-lo transition to reset the sound cpu */
115	115	if (data)
116	116	device_set_input_line(tc0140syt->slavecpu, INPUT_LINE_RESET, ASSERT_LINE);
r17788	r17789
241	241	break;
242	242
243	243	case 0x01:      // mode #1
244		//logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],cpu_get_pc(&space->device()));
	244	//logerror("taitosnd: Slave cpu receives 0/1 : %01x%01x PC=%4x\n", tc0140syt->slavedata[1] , tc0140syt->slavedata[0],space->device().safe_pc());
245	245	tc0140syt->status &= ~TC0140SYT_PORT01_FULL;
246	246	res = tc0140syt->slavedata[tc0140syt->submode ++];
247	247	break;

trunk/src/mame/audio/leland.c

r17788	r17789
1258	1258	switch (offset)
1259	1259	{
1260	1260	case 0x22/2:
1261		logerror("%05X:ERROR - read from 80186 EOI\n", cpu_get_pc(state->m_i80186.cpu));
	1261	logerror("%05X:ERROR - read from 80186 EOI\n", state->m_i80186.cpu->safe_pc());
1262	1262	break;
1263	1263
1264	1264	case 0x24/2:
1265		if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", cpu_get_pc(state->m_i80186.cpu));
	1265	if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", state->m_i80186.cpu->safe_pc());
1266	1266	if (state->m_i80186.intr.poll_status & 0x8000)
1267	1267	int_callback(state->m_i80186.cpu, 0);
1268	1268	return state->m_i80186.intr.poll_status;
1269	1269
1270	1270	case 0x26/2:
1271		if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", cpu_get_pc(state->m_i80186.cpu));
	1271	if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", state->m_i80186.cpu->safe_pc());
1272	1272	return state->m_i80186.intr.poll_status;
1273	1273
1274	1274	case 0x28/2:
1275		if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", cpu_get_pc(state->m_i80186.cpu));
	1275	if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", state->m_i80186.cpu->safe_pc());
1276	1276	temp  = (state->m_i80186.intr.timer  >> 3) & 0x01;
1277	1277	temp |= (state->m_i80186.intr.dma[0] >> 1) & 0x04;
1278	1278	temp |= (state->m_i80186.intr.dma[1] >> 0) & 0x08;
r17788	r17789
1283	1283	return temp;
1284	1284
1285	1285	case 0x2a/2:
1286		if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", cpu_get_pc(state->m_i80186.cpu));
	1286	if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", state->m_i80186.cpu->safe_pc());
1287	1287	return state->m_i80186.intr.priority_mask;
1288	1288
1289	1289	case 0x2c/2:
1290		if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", cpu_get_pc(state->m_i80186.cpu));
	1290	if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", state->m_i80186.cpu->safe_pc());
1291	1291	return state->m_i80186.intr.in_service;
1292	1292
1293	1293	case 0x2e/2:
1294		if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", cpu_get_pc(state->m_i80186.cpu));
	1294	if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", state->m_i80186.cpu->safe_pc());
1295	1295	temp = state->m_i80186.intr.request & ~0x0001;
1296	1296	if (state->m_i80186.intr.status & 0x0007)
1297	1297	temp |= 1;
1298	1298	return temp;
1299	1299
1300	1300	case 0x30/2:
1301		if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", cpu_get_pc(state->m_i80186.cpu));
	1301	if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", state->m_i80186.cpu->safe_pc());
1302	1302	return state->m_i80186.intr.status;
1303	1303
1304	1304	case 0x32/2:
1305		if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
	1305	if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", state->m_i80186.cpu->safe_pc());
1306	1306	return state->m_i80186.intr.timer;
1307	1307
1308	1308	case 0x34/2:
1309		if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
	1309	if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", state->m_i80186.cpu->safe_pc());
1310	1310	return state->m_i80186.intr.dma[0];
1311	1311
1312	1312	case 0x36/2:
1313		if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
	1313	if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", state->m_i80186.cpu->safe_pc());
1314	1314	return state->m_i80186.intr.dma[1];
1315	1315
1316	1316	case 0x38/2:
1317		if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
	1317	if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", state->m_i80186.cpu->safe_pc());
1318	1318	return state->m_i80186.intr.ext[0];
1319	1319
1320	1320	case 0x3a/2:
1321		if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
	1321	if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", state->m_i80186.cpu->safe_pc());
1322	1322	return state->m_i80186.intr.ext[1];
1323	1323
1324	1324	case 0x3c/2:
1325		if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
	1325	if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", state->m_i80186.cpu->safe_pc());
1326	1326	return state->m_i80186.intr.ext[2];
1327	1327
1328	1328	case 0x3e/2:
1329		if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", cpu_get_pc(state->m_i80186.cpu));
	1329	if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", state->m_i80186.cpu->safe_pc());
1330	1330	return state->m_i80186.intr.ext[3];
1331	1331
1332	1332	case 0x50/2:
1333	1333	case 0x58/2:
1334	1334	case 0x60/2:
1335		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4);
	1335	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4);
1336	1336	which = (offset - 0x50/2) / 4;
1337	1337	if (ACCESSING_BITS_0_7)
1338	1338	internal_timer_sync(state, which);
r17788	r17789
1341	1341	case 0x52/2:
1342	1342	case 0x5a/2:
1343	1343	case 0x62/2:
1344		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4);
	1344	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4);
1345	1345	which = (offset - 0x50/2) / 4;
1346	1346	return state->m_i80186.timer[which].maxA;
1347	1347
1348	1348	case 0x54/2:
1349	1349	case 0x5c/2:
1350		logerror("%05X:read 80186 Timer %d max B\n", cpu_get_pc(state->m_i80186.cpu), (offset/2 - 0x50) / 4);
	1350	logerror("%05X:read 80186 Timer %d max B\n", state->m_i80186.cpu->safe_pc(), (offset/2 - 0x50) / 4);
1351	1351	which = (offset - 0x50/2) / 4;
1352	1352	return state->m_i80186.timer[which].maxB;
1353	1353
1354	1354	case 0x56/2:
1355	1355	case 0x5e/2:
1356	1356	case 0x66/2:
1357		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4);
	1357	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4);
1358	1358	which = (offset - 0x50/2) / 4;
1359	1359	return state->m_i80186.timer[which].control;
1360	1360
1361	1361	case 0xa0/2:
1362		if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", cpu_get_pc(state->m_i80186.cpu));
	1362	if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", state->m_i80186.cpu->safe_pc());
1363	1363	return state->m_i80186.mem.upper;
1364	1364
1365	1365	case 0xa2/2:
1366		if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", cpu_get_pc(state->m_i80186.cpu));
	1366	if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", state->m_i80186.cpu->safe_pc());
1367	1367	return state->m_i80186.mem.lower;
1368	1368
1369	1369	case 0xa4/2:
1370		if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", cpu_get_pc(state->m_i80186.cpu));
	1370	if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", state->m_i80186.cpu->safe_pc());
1371	1371	return state->m_i80186.mem.peripheral;
1372	1372
1373	1373	case 0xa6/2:
1374		if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", cpu_get_pc(state->m_i80186.cpu));
	1374	if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", state->m_i80186.cpu->safe_pc());
1375	1375	return state->m_i80186.mem.middle;
1376	1376
1377	1377	case 0xa8/2:
1378		if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", cpu_get_pc(state->m_i80186.cpu));
	1378	if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", state->m_i80186.cpu->safe_pc());
1379	1379	return state->m_i80186.mem.middle_size;
1380	1380
1381	1381	case 0xc0/2:
1382	1382	case 0xd0/2:
1383		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
	1383	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
1384	1384	which = (offset - 0xc0/2) / 8;
1385	1385	state->m_dma_stream->update();
1386	1386	return state->m_i80186.dma[which].source;
1387	1387
1388	1388	case 0xc2/2:
1389	1389	case 0xd2/2:
1390		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
	1390	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
1391	1391	which = (offset - 0xc0/2) / 8;
1392	1392	state->m_dma_stream->update();
1393	1393	return state->m_i80186.dma[which].source >> 16;
1394	1394
1395	1395	case 0xc4/2:
1396	1396	case 0xd4/2:
1397		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
	1397	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
1398	1398	which = (offset - 0xc0/2) / 8;
1399	1399	state->m_dma_stream->update();
1400	1400	return state->m_i80186.dma[which].dest;
1401	1401
1402	1402	case 0xc6/2:
1403	1403	case 0xd6/2:
1404		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
	1404	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
1405	1405	which = (offset - 0xc0/2) / 8;
1406	1406	state->m_dma_stream->update();
1407	1407	return state->m_i80186.dma[which].dest >> 16;
1408	1408
1409	1409	case 0xc8/2:
1410	1410	case 0xd8/2:
1411		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
	1411	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
1412	1412	which = (offset - 0xc0/2) / 8;
1413	1413	state->m_dma_stream->update();
1414	1414	return state->m_i80186.dma[which].count;
1415	1415
1416	1416	case 0xca/2:
1417	1417	case 0xda/2:
1418		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8);
	1418	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8);
1419	1419	which = (offset - 0xc0/2) / 8;
1420	1420	state->m_dma_stream->update();
1421	1421	return state->m_i80186.dma[which].control;
1422	1422
1423	1423	default:
1424		logerror("%05X:read 80186 port %02X\n", cpu_get_pc(state->m_i80186.cpu), offset*2);
	1424	logerror("%05X:read 80186 port %02X\n", state->m_i80186.cpu->safe_pc(), offset*2);
1425	1425	break;
1426	1426	}
1427	1427	return 0x00;
r17788	r17789
1449	1449	switch (offset)
1450	1450	{
1451	1451	case 0x22/2:
1452		if (LOG_PORTS) logerror("%05X:80186 EOI = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1452	if (LOG_PORTS) logerror("%05X:80186 EOI = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1453	1453	handle_eoi(device, 0x8000);
1454	1454	update_interrupt_state(device);
1455	1455	break;
1456	1456
1457	1457	case 0x24/2:
1458		logerror("%05X:ERROR - write to 80186 interrupt poll = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1458	logerror("%05X:ERROR - write to 80186 interrupt poll = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1459	1459	break;
1460	1460
1461	1461	case 0x26/2:
1462		logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1462	logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1463	1463	break;
1464	1464
1465	1465	case 0x28/2:
1466		if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1466	if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1467	1467	state->m_i80186.intr.timer  = (state->m_i80186.intr.timer  & ~0x08) | ((data << 3) & 0x08);
1468	1468	state->m_i80186.intr.dma[0] = (state->m_i80186.intr.dma[0] & ~0x08) | ((data << 1) & 0x08);
1469	1469	state->m_i80186.intr.dma[1] = (state->m_i80186.intr.dma[1] & ~0x08) | ((data << 0) & 0x08);
r17788	r17789
1475	1475	break;
1476	1476
1477	1477	case 0x2a/2:
1478		if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1478	if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1479	1479	state->m_i80186.intr.priority_mask = data & 0x0007;
1480	1480	update_interrupt_state(device);
1481	1481	break;
1482	1482
1483	1483	case 0x2c/2:
1484		if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1484	if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1485	1485	state->m_i80186.intr.in_service = data & 0x00ff;
1486	1486	update_interrupt_state(device);
1487	1487	break;
1488	1488
1489	1489	case 0x2e/2:
1490		if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1490	if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1491	1491	state->m_i80186.intr.request = (state->m_i80186.intr.request & ~0x00c0) | (data & 0x00c0);
1492	1492	update_interrupt_state(device);
1493	1493	break;
1494	1494
1495	1495	case 0x30/2:
1496		if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1496	if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1497	1497	state->m_i80186.intr.status = (state->m_i80186.intr.status & ~0x8000) | (data & 0x8000);
1498	1498	state->m_i80186.intr.status = (state->m_i80186.intr.status & ~0x0007) | (data & 0x0007);
1499	1499	update_interrupt_state(device);
1500	1500	break;
1501	1501
1502	1502	case 0x32/2:
1503		if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1503	if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1504	1504	state->m_i80186.intr.timer = data & 0x000f;
1505	1505	break;
1506	1506
1507	1507	case 0x34/2:
1508		if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1508	if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1509	1509	state->m_i80186.intr.dma[0] = data & 0x000f;
1510	1510	break;
1511	1511
1512	1512	case 0x36/2:
1513		if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1513	if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1514	1514	state->m_i80186.intr.dma[1] = data & 0x000f;
1515	1515	break;
1516	1516
1517	1517	case 0x38/2:
1518		if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1518	if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1519	1519	state->m_i80186.intr.ext[0] = data & 0x007f;
1520	1520	break;
1521	1521
1522	1522	case 0x3a/2:
1523		if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1523	if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1524	1524	state->m_i80186.intr.ext[1] = data & 0x007f;
1525	1525	break;
1526	1526
1527	1527	case 0x3c/2:
1528		if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1528	if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1529	1529	state->m_i80186.intr.ext[2] = data & 0x001f;
1530	1530	break;
1531	1531
1532	1532	case 0x3e/2:
1533		if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1533	if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1534	1534	state->m_i80186.intr.ext[3] = data & 0x001f;
1535	1535	break;
1536	1536
1537	1537	case 0x50/2:
1538	1538	case 0x58/2:
1539	1539	case 0x60/2:
1540		if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4, data, mem_mask);
	1540	if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4, data, mem_mask);
1541	1541	which = (offset - 0x50/2) / 4;
1542	1542	internal_timer_update(state, which, data, -1, -1, -1);
1543	1543	break;
r17788	r17789
1545	1545	case 0x52/2:
1546	1546	case 0x5a/2:
1547	1547	case 0x62/2:
1548		if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4, data, mem_mask);
	1548	if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4, data, mem_mask);
1549	1549	which = (offset - 0x50/2) / 4;
1550	1550	internal_timer_update(state, which, -1, data, -1, -1);
1551	1551	break;
1552	1552
1553	1553	case 0x54/2:
1554	1554	case 0x5c/2:
1555		if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4, data, mem_mask);
	1555	if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4, data, mem_mask);
1556	1556	which = (offset - 0x50/2) / 4;
1557	1557	internal_timer_update(state, which, -1, -1, data, -1);
1558	1558	break;
r17788	r17789
1560	1560	case 0x56/2:
1561	1561	case 0x5e/2:
1562	1562	case 0x66/2:
1563		if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0x50/2) / 4, data, mem_mask);
	1563	if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0x50/2) / 4, data, mem_mask);
1564	1564	which = (offset - 0x50/2) / 4;
1565	1565	internal_timer_update(state, which, -1, -1, -1, data);
1566	1566	break;
1567	1567
1568	1568	case 0xa0/2:
1569		if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1569	if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1570	1570	state->m_i80186.mem.upper = data | 0xc038;
1571	1571	break;
1572	1572
1573	1573	case 0xa2/2:
1574		if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1574	if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1575	1575	state->m_i80186.mem.lower = (data & 0x3fff) | 0x0038;
1576	1576	break;
1577	1577
1578	1578	case 0xa4/2:
1579		if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1579	if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1580	1580	state->m_i80186.mem.peripheral = data | 0x0038;
1581	1581	break;
1582	1582
1583	1583	case 0xa6/2:
1584		if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1584	if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1585	1585	state->m_i80186.mem.middle = data | 0x01f8;
1586	1586	break;
1587	1587
1588	1588	case 0xa8/2:
1589		if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1589	if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1590	1590	state->m_i80186.mem.middle_size = data | 0x8038;
1591	1591
1592	1592	temp = (state->m_i80186.mem.peripheral & 0xffc0) << 4;
r17788	r17789
1608	1608
1609	1609	case 0xc0/2:
1610	1610	case 0xd0/2:
1611		if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
	1611	if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
1612	1612	which = (offset - 0xc0/2) / 8;
1613	1613	state->m_dma_stream->update();
1614	1614	state->m_i80186.dma[which].source = (state->m_i80186.dma[which].source & ~0x0ffff) | (data & 0x0ffff);
r17788	r17789
1616	1616
1617	1617	case 0xc2/2:
1618	1618	case 0xd2/2:
1619		if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
	1619	if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
1620	1620	which = (offset - 0xc0/2) / 8;
1621	1621	state->m_dma_stream->update();
1622	1622	state->m_i80186.dma[which].source = (state->m_i80186.dma[which].source & ~0xf0000) | ((data << 16) & 0xf0000);
r17788	r17789
1624	1624
1625	1625	case 0xc4/2:
1626	1626	case 0xd4/2:
1627		if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
	1627	if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
1628	1628	which = (offset - 0xc0/2) / 8;
1629	1629	state->m_dma_stream->update();
1630	1630	state->m_i80186.dma[which].dest = (state->m_i80186.dma[which].dest & ~0x0ffff) | (data & 0x0ffff);
r17788	r17789
1632	1632
1633	1633	case 0xc6/2:
1634	1634	case 0xd6/2:
1635		if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
	1635	if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
1636	1636	which = (offset - 0xc0/2) / 8;
1637	1637	state->m_dma_stream->update();
1638	1638	state->m_i80186.dma[which].dest = (state->m_i80186.dma[which].dest & ~0xf0000) | ((data << 16) & 0xf0000);
r17788	r17789
1640	1640
1641	1641	case 0xc8/2:
1642	1642	case 0xd8/2:
1643		if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
	1643	if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
1644	1644	which = (offset - 0xc0/2) / 8;
1645	1645	state->m_dma_stream->update();
1646	1646	state->m_i80186.dma[which].count = data;
r17788	r17789
1648	1648
1649	1649	case 0xca/2:
1650	1650	case 0xda/2:
1651		if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), (offset - 0xc0/2) / 8, data, mem_mask);
	1651	if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), (offset - 0xc0/2) / 8, data, mem_mask);
1652	1652	which = (offset - 0xc0/2) / 8;
1653	1653	state->m_dma_stream->update();
1654	1654	update_dma_control(state, which, data);
1655	1655	break;
1656	1656
1657	1657	case 0xfe/2:
1658		if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), data, mem_mask);
	1658	if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), data, mem_mask);
1659	1659
1660	1660	/* we assume here there that this doesn't happen too often */
1661	1661	/* plus, we can't really remove the old memory range, so we also assume that it's */
r17788	r17789
1674	1674	break;
1675	1675
1676	1676	default:
1677		logerror("%05X:80186 port %02X = %04X & %04X\n", cpu_get_pc(state->m_i80186.cpu), offset*2, data, mem_mask);
	1677	logerror("%05X:80186 port %02X = %04X & %04X\n", state->m_i80186.cpu->safe_pc(), offset*2, data, mem_mask);
1678	1678	break;
1679	1679	}
1680	1680	}
r17788	r17789
1830	1830
1831	1831	if (LOG_COMM)
1832	1832	{
1833		logerror("%04X:80186 control = %02X", cpu_get_previouspc(state->m_i80186.cpu), data);
	1833	logerror("%04X:80186 control = %02X", state->m_i80186.cpu->safe_pcbase(), data);
1834	1834	if (!(data & 0x80)) logerror("  /RESET");
1835	1835	if (!(data & 0x40)) logerror("  ZNMI");
1836	1836	if (!(data & 0x20)) logerror("  INT0");
r17788	r17789
1902	1902	WRITE8_DEVICE_HANDLER( leland_80186_command_hi_w )
1903	1903	{
1904	1904	leland_sound_state *state = get_safe_token(device);
1905		if (LOG_COMM) logerror("%04X:Write sound command latch hi = %02X\n", cpu_get_previouspc(state->m_i80186.cpu), data);
	1905	if (LOG_COMM) logerror("%04X:Write sound command latch hi = %02X\n", state->m_i80186.cpu->safe_pcbase(), data);
1906	1906	state->m_sound_command = (state->m_sound_command & 0x00ff) | (data << 8);
1907	1907	}
1908	1908
r17788	r17789
1910	1910	static READ16_DEVICE_HANDLER( main_to_sound_comm_r )
1911	1911	{
1912	1912	leland_sound_state *state = get_safe_token(device);
1913		if (LOG_COMM) logerror("%05X:Read sound command latch = %02X\n", cpu_get_pc(state->m_i80186.cpu), state->m_sound_command);
	1913	if (LOG_COMM) logerror("%05X:Read sound command latch = %02X\n", state->m_i80186.cpu->safe_pc(), state->m_sound_command);
1914	1914	return state->m_sound_command;
1915	1915	}
1916	1916
r17788	r17789
1953	1953	READ8_DEVICE_HANDLER( leland_80186_response_r )
1954	1954	{
1955	1955	leland_sound_state *state = get_safe_token(device);
1956		offs_t pc = cpu_get_previouspc(state->m_i80186.cpu);
	1956	offs_t pc = state->m_i80186.cpu->safe_pcbase();
1957	1957
1958	1958	if (LOG_COMM) logerror("%04X:Read sound response latch = %02X\n", pc, state->m_sound_response);
1959	1959
r17788	r17789
1966	1966	static WRITE16_DEVICE_HANDLER( sound_to_main_comm_w )
1967	1967	{
1968	1968	leland_sound_state *state = get_safe_token(device);
1969		if (LOG_COMM) logerror("%05X:Write sound response latch = %02X\n", cpu_get_pc(state->m_i80186.cpu), data);
	1969	if (LOG_COMM) logerror("%05X:Write sound response latch = %02X\n", state->m_i80186.cpu->safe_pc(), data);
1970	1970	state->m_sound_response = data;
1971	1971	}
1972	1972
r17788	r17789
2015	2015
2016	2016	/* set the new value */
2017	2017	d->value = (INT16)(UINT8)data - 0x80;
2018		if (LOG_DAC) logerror("%05X:DAC %d value = %02X\n", cpu_get_pc(state->m_i80186.cpu), offset, (UINT8)data);
	2018	if (LOG_DAC) logerror("%05X:DAC %d value = %02X\n", state->m_i80186.cpu->safe_pc(), offset, (UINT8)data);
2019	2019
2020	2020	/* if we haven't overflowed the buffer, add the value value to it */
2021	2021	if (count < DAC_BUFFER_SIZE - 1)
r17788	r17789
2038	2038	if (ACCESSING_BITS_8_15)
2039	2039	{
2040	2040	d->volume = ((data >> 8) ^ 0x00) / DAC_VOLUME_SCALE;
2041		if (LOG_DAC) logerror("%05X:DAC %d volume = %02X\n", cpu_get_pc(state->m_i80186.cpu), offset, data);
	2041	if (LOG_DAC) logerror("%05X:DAC %d volume = %02X\n", state->m_i80186.cpu->safe_pc(), offset, data);
2042	2042	}
2043	2043	}
2044	2044
r17788	r17789
2071	2071
2072	2072	/* update the volume */
2073	2073	d->volume = (offset & 0xff) / DAC_VOLUME_SCALE;
2074		if (LOG_DAC) logerror("%05X:DAC %d value = %02X, volume = %02X\n", cpu_get_pc(state->m_i80186.cpu), which, data, (offset & 0x1fe) / 2);
	2074	if (LOG_DAC) logerror("%05X:DAC %d value = %02X, volume = %02X\n", state->m_i80186.cpu->safe_pc(), which, data, (offset & 0x1fe) / 2);
2075	2075	}
2076	2076
2077	2077
r17788	r17789
2088	2088
2089	2089	/* set the new value */
2090	2090	d->value = (INT16)data16 - 0x200;
2091		if (LOG_DAC) logerror("%05X:DAC 10-bit value = %02X\n", cpu_get_pc(state->m_i80186.cpu), data16);
	2091	if (LOG_DAC) logerror("%05X:DAC 10-bit value = %02X\n", state->m_i80186.cpu->safe_pc(), data16);
2092	2092
2093	2093	/* if we haven't overflowed the buffer, add the value value to it */
2094	2094	if (count < DAC_BUFFER_SIZE - 1)
r17788	r17789
2164	2164	return;
2165	2165	}
2166	2166	}
2167		logerror("%05X:Unexpected peripheral write %d/%02X = %02X\n", cpu_get_pc(state->m_i80186.cpu), 5, offset, data);
	2167	logerror("%05X:Unexpected peripheral write %d/%02X = %02X\n", state->m_i80186.cpu->safe_pc(), 5, offset, data);
2168	2168	}
2169	2169
2170	2170
r17788	r17789
2211	2211	if (state->m_is_redline)
2212	2212	return pit8254_r(device, offset | 0x80, mem_mask);
2213	2213	else
2214		logerror("%05X:Unexpected peripheral read %d/%02X\n", cpu_get_pc(state->m_i80186.cpu), select, offset*2);
	2214	logerror("%05X:Unexpected peripheral read %d/%02X\n", state->m_i80186.cpu->safe_pc(), select, offset*2);
2215	2215	break;
2216	2216
2217	2217	default:
2218		logerror("%05X:Unexpected peripheral read %d/%02X\n", cpu_get_pc(state->m_i80186.cpu), select, offset*2);
	2218	logerror("%05X:Unexpected peripheral read %d/%02X\n", state->m_i80186.cpu->safe_pc(), select, offset*2);
2219	2219	break;
2220	2220	}
2221	2221	return 0xffff;
r17788	r17789
2257	2257	break;
2258	2258
2259	2259	default:
2260		logerror("%05X:Unexpected peripheral write %d/%02X = %02X\n", cpu_get_pc(state->m_i80186.cpu), select, offset, data);
	2260	logerror("%05X:Unexpected peripheral write %d/%02X = %02X\n", state->m_i80186.cpu->safe_pc(), select, offset, data);
2261	2261	break;
2262	2262	}
2263	2263	}

trunk/src/mame/audio/taito_en.c

r17788	r17789
94	94
95	95	static READ16_HANDLER( es5510_dsp_r )
96	96	{
97		//  logerror("%06x: DSP read offset %04x (data is %04x)\n",cpu_get_pc(&space->device()),offset,es5510_dsp_ram[offset]);
	97	//  logerror("%06x: DSP read offset %04x (data is %04x)\n",space->device().safe_pc(),offset,es5510_dsp_ram[offset]);
98	98	//  if (es_tmp) return es5510_dsp_ram[offset];
99	99	/*
100	100	switch (offset) {
r17788	r17789
128	128	UINT8 *snd_mem = (UINT8 *)space->machine().root_device().memregion("ensoniq.0")->base();
129	129
130	130	//  if (offset>4 && offset!=0x80  && offset!=0xa0  && offset!=0xc0  && offset!=0xe0)
131		//      logerror("%06x: DSP write offset %04x %04x\n",cpu_get_pc(&space->device()),offset,data);
	131	//      logerror("%06x: DSP write offset %04x %04x\n",space->device().safe_pc(),offset,data);
132	132
133	133	COMBINE_DATA(&es5510_dsp_ram[offset]);
134	134

trunk/src/mame/audio/seibu.c

r17788	r17789
383	383
384	384	READ16_HANDLER( seibu_main_word_r )
385	385	{
386		//logerror("%06x: seibu_main_word_r(%x)\n",cpu_get_pc(&space->device()),offset);
	386	//logerror("%06x: seibu_main_word_r(%x)\n",space->device().safe_pc(),offset);
387	387	switch (offset)
388	388	{
389	389	case 2:
r17788	r17789
392	392	case 5:
393	393	return main2sub_pending ? 1 : 0;
394	394	default:
395		//logerror("%06x: seibu_main_word_r(%x)\n",cpu_get_pc(&space->device()),offset);
	395	//logerror("%06x: seibu_main_word_r(%x)\n",space->device().safe_pc(),offset);
396	396	return 0xffff;
397	397	}
398	398	}
399	399
400	400	WRITE16_HANDLER( seibu_main_word_w )
401	401	{
402		//printf("%06x: seibu_main_word_w(%x,%02x)\n",cpu_get_pc(&space->device()),offset,data);
	402	//printf("%06x: seibu_main_word_w(%x,%02x)\n",space->device().safe_pc(),offset,data);
403	403	if (ACCESSING_BITS_0_7)
404	404	{
405	405	switch (offset)
r17788	r17789
418	418	main2sub_pending = 1;
419	419	break;
420	420	default:
421		//logerror("%06x: seibu_main_word_w(%x,%02x)\n",cpu_get_pc(&space->device()),offset,data);
	421	//logerror("%06x: seibu_main_word_w(%x,%02x)\n",space->device().safe_pc(),offset,data);
422	422	break;
423	423	}
424	424	}

trunk/src/mame/audio/dcs.c

r17788	r17789
1451	1451	{
1452	1452	dsio_state &dsio = dcs.dsio;
1453	1453	if (LOG_DCS_TRANSFERS)
1454		logerror("%08X:IDMA_addr = %04X\n", cpu_get_pc(&space->device()), data);
	1454	logerror("%08X:IDMA_addr = %04X\n", space->device().safe_pc(), data);
1455	1455	downcast<adsp2181_device *>(dcs.cpu)->idma_addr_w(data);
1456	1456	if (data == 0)
1457	1457	dsio.start_on_next_write = 2;
r17788	r17789
1461	1461	WRITE32_HANDLER( dsio_idma_data_w )
1462	1462	{
1463	1463	dsio_state &dsio = dcs.dsio;
1464		UINT32 pc = cpu_get_pc(&space->device());
	1464	UINT32 pc = space->device().safe_pc();
1465	1465	if (ACCESSING_BITS_0_15)
1466	1466	{
1467	1467	if (LOG_DCS_TRANSFERS)
r17788	r17789
1487	1487	UINT32 result;
1488	1488	result = downcast<adsp2181_device *>(dcs.cpu)->idma_data_r();
1489	1489	if (LOG_DCS_TRANSFERS)
1490		logerror("%08X:IDMA_data_r(%04X) = %04X\n", cpu_get_pc(&space->device()), downcast<adsp2181_device *>(dcs.cpu)->idma_addr_r(), result);
	1490	logerror("%08X:IDMA_data_r(%04X) = %04X\n", space->device().safe_pc(), downcast<adsp2181_device *>(dcs.cpu)->idma_addr_r(), result);
1491	1491	return result;
1492	1492	}
1493	1493
r17788	r17789
1622	1622	if (dcs.auto_ack)
1623	1623	input_latch_ack_w(space,0,0,0xffff);
1624	1624	if (LOG_DCS_IO)
1625		logerror("%08X:input_latch_r(%04X)\n", cpu_get_pc(&space->device()), dcs.input_data);
	1625	logerror("%08X:input_latch_r(%04X)\n", space->device().safe_pc(), dcs.input_data);
1626	1626	return dcs.input_data;
1627	1627	}
1628	1628
r17788	r17789
1644	1644	static WRITE16_HANDLER( output_latch_w )
1645	1645	{
1646	1646	if (LOG_DCS_IO)
1647		logerror("%08X:output_latch_w(%04X) (empty=%d)\n", cpu_get_pc(&space->device()), data, IS_OUTPUT_EMPTY());
	1647	logerror("%08X:output_latch_w(%04X) (empty=%d)\n", space->device().safe_pc(), data, IS_OUTPUT_EMPTY());
1648	1648	space->machine().scheduler().synchronize(FUNC(latch_delayed_w), data);
1649	1649	}
1650	1650
r17788	r17789
1698	1698	static WRITE16_HANDLER( output_control_w )
1699	1699	{
1700	1700	if (LOG_DCS_IO)
1701		logerror("%04X:output_control = %04X\n", cpu_get_pc(&space->device()), data);
	1701	logerror("%04X:output_control = %04X\n", space->device().safe_pc(), data);
1702	1702	space->machine().scheduler().synchronize(FUNC(output_control_delayed_w), data);
1703	1703	}
1704	1704
r17788	r17789
1884	1884	/* bit 9 forces a reset */
1885	1885	if (data & 0x0200)
1886	1886	{
1887		logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", cpu_get_pc(&space->device()));
	1887	logerror("%04X:Rebooting DCS due to SYSCONTROL write\n", space->device().safe_pc());
1888	1888	device_set_input_line(dcs.cpu, INPUT_LINE_RESET, PULSE_LINE);
1889	1889	dcs_boot(space->machine());
1890	1890	dcs.control_regs[SYSCONTROL_REG] = 0;

trunk/src/mame/audio/exidy.c

r17788	r17789
686	686	return 0;
687	687	/* offset 1 reads the status register: bits 2 1 0 correspond to ints on channels 2,1,0, and bit 7 is an 'OR' of bits 2,1,0 */
688	688	case 1:
689		logerror("%04X:exidy_sh6840_r - unexpected read, status register is TODO!\n", cpu_get_pc(state->m_maincpu));
	689	logerror("%04X:exidy_sh6840_r - unexpected read, status register is TODO!\n", state->m_maincpu->safe_pc());
690	690	return 0;
691	691	/* offsets 2,4,6 read channel 0,1,2 MSBs and latch the LSB*/
692	692	case 2: case 4: case 6:
r17788	r17789
1043	1043	exidy_sound_state *state = get_safe_token(device);
1044	1044	UINT8 ret = state->m_pia1->b_output();
1045	1045
1046		if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound response read = %02X\n", cpu_get_previouspc(state->m_maincpu), ret);
	1046	if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound response read = %02X\n", state->m_maincpu->safe_pcbase(), ret);
1047	1047
1048	1048	state->m_pia1->cb1_w(0);
1049	1049
r17788	r17789
1056	1056	exidy_sound_state *state = get_safe_token(device);
1057	1057	UINT8 ret = (state->m_pia1->ca1_r() << 7) | (state->m_pia1->cb1_r() << 6);
1058	1058
1059		if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound status read = %02X\n", cpu_get_previouspc(state->m_maincpu), ret);
	1059	if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound status read = %02X\n", state->m_maincpu->safe_pcbase(), ret);
1060	1060
1061	1061	return ret;
1062	1062	}
r17788	r17789
1073	1073	{
1074	1074	exidy_sound_state *state = get_safe_token(device);
1075	1075
1076		if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound command = %02X\n", cpu_get_previouspc(state->m_maincpu), data);
	1076	if (VICTORY_LOG_SOUND) logerror("%04X:!!!! Sound command = %02X\n", state->m_maincpu->safe_pcbase(), data);
1077	1077
1078	1078	device->machine().scheduler().synchronize(FUNC(delayed_command_w), data, state->m_pia1);
1079	1079	}

trunk/src/mame/audio/invinco.c

r17788	r17789
108	108	}
109	109
110	110	#if 0
111		logerror("Went LO: %02X  %04X\n", bitsGoneLow, cpu_get_pc(&space->device()));
	111	logerror("Went LO: %02X  %04X\n", bitsGoneLow, space->device().safe_pc());
112	112	#endif
113	113	}

trunk/src/mame/audio/harddriv.c

r17788	r17789
54	54	READ16_MEMBER(harddriv_state::hd68k_snd_data_r)
55	55	{
56	56	m_soundflag = 0;
57		logerror("%06X:main read from sound=%04X\n", cpu_get_previouspc(&space.device()), m_sounddata);
	57	logerror("%06X:main read from sound=%04X\n", space.device().safe_pcbase(), m_sounddata);
58	58	return m_sounddata;
59	59	}
60	60
r17788	r17789
77	77	WRITE16_MEMBER(harddriv_state::hd68k_snd_data_w)
78	78	{
79	79	machine().scheduler().synchronize(FUNC(delayed_68k_w), data);
80		logerror("%06X:main write to sound=%04X\n", cpu_get_previouspc(&space.device()), data);
	80	logerror("%06X:main write to sound=%04X\n", space.device().safe_pcbase(), data);
81	81	}
82	82
83	83
r17788	r17789
87	87	device_set_input_line(m_soundcpu, INPUT_LINE_RESET, CLEAR_LINE);
88	88	m_mainflag = m_soundflag = 0;
89	89	update_68k_interrupts(machine());
90		logerror("%06X:Reset sound\n", cpu_get_previouspc(&space.device()));
	90	logerror("%06X:Reset sound\n", space.device().safe_pcbase());
91	91	}
92	92
93	93
r17788	r17789
102	102	{
103	103	m_mainflag = 0;
104	104	update_68k_interrupts(machine());
105		logerror("%06X:sound read from main=%04X\n", cpu_get_previouspc(&space.device()), m_maindata);
	105	logerror("%06X:sound read from main=%04X\n", space.device().safe_pcbase(), m_maindata);
106	106	return m_maindata;
107	107	}
108	108
r17788	r17789
111	111	{
112	112	COMBINE_DATA(&m_sounddata);
113	113	m_soundflag = 1;
114		logerror("%06X:sound write to main=%04X\n", cpu_get_previouspc(&space.device()), data);
	114	logerror("%06X:sound write to main=%04X\n", space.device().safe_pcbase(), data);
115	115	}
116	116
117	117
r17788	r17789
124	124
125	125	READ16_MEMBER(harddriv_state::hdsnd68k_switches_r)
126	126	{
127		logerror("%06X:hdsnd68k_switches_r(%04X)\n", cpu_get_previouspc(&space.device()), offset);
	127	logerror("%06X:hdsnd68k_switches_r(%04X)\n", space.device().safe_pcbase(), offset);
128	128	return 0;
129	129	}
130	130
131	131
132	132	READ16_MEMBER(harddriv_state::hdsnd68k_320port_r)
133	133	{
134		logerror("%06X:hdsnd68k_320port_r(%04X)\n", cpu_get_previouspc(&space.device()), offset);
	134	logerror("%06X:hdsnd68k_320port_r(%04X)\n", space.device().safe_pcbase(), offset);
135	135	return 0;
136	136	}
137	137
r17788	r17789
143	143	//            D14 = 'Sound Flag'
144	144	//            D13 = Test Switch
145	145	//            D12 = 5220 Ready Flag (0=Ready)
146		logerror("%06X:hdsnd68k_status_r(%04X)\n", cpu_get_previouspc(&space.device()), offset);
	146	logerror("%06X:hdsnd68k_status_r(%04X)\n", space.device().safe_pcbase(), offset);
147	147	return (m_mainflag << 15) | (m_soundflag << 14) | 0x2000 | 0;//((ioport("IN0")->read() & 0x0020) << 8) | 0;
148	148	}
149	149
r17788	r17789
167	167	{
168	168	case 0:   /* SPWR - 5220 write strobe */
169	169	/* data == 0 means high, 1 means low */
170		logerror("%06X:SPWR=%d\n", cpu_get_previouspc(&space.device()), data);
	170	logerror("%06X:SPWR=%d\n", space.device().safe_pcbase(), data);
171	171	break;
172	172
173	173	case 1:   /* SPRES - 5220 hard reset */
174	174	/* data == 0 means low, 1 means high */
175		logerror("%06X:SPRES=%d\n", cpu_get_previouspc(&space.device()), data);
	175	logerror("%06X:SPRES=%d\n", space.device().safe_pcbase(), data);
176	176	break;
177	177
178	178	case 2:   /* SPRATE */
179	179	/* data == 0 means 8kHz, 1 means 10kHz */
180		logerror("%06X:SPRATE=%d\n", cpu_get_previouspc(&space.device()), data);
	180	logerror("%06X:SPRATE=%d\n", space.device().safe_pcbase(), data);
181	181	break;
182	182
183	183	case 3:   /* CRAMEN */
r17788	r17789
186	186	break;
187	187
188	188	case 4:   /* RES320 */
189		logerror("%06X:RES320=%d\n", cpu_get_previouspc(&space.device()), data);
	189	logerror("%06X:RES320=%d\n", space.device().safe_pcbase(), data);
190	190	if (m_sounddsp != NULL)
191	191	device_set_input_line(m_sounddsp, INPUT_LINE_HALT, data ? CLEAR_LINE : ASSERT_LINE);
192	192	break;
r17788	r17789
199	199
200	200	WRITE16_MEMBER(harddriv_state::hdsnd68k_speech_w)
201	201	{
202		logerror("%06X:hdsnd68k_speech_w(%04X)=%04X\n", cpu_get_previouspc(&space.device()), offset, data);
	202	logerror("%06X:hdsnd68k_speech_w(%04X)=%04X\n", space.device().safe_pcbase(), offset, data);
203	203	}
204	204
205	205
r17788	r17789
249	249	if (m_cramen)
250	250	return m_comram[offset & 0x1ff];
251	251
252		logerror("%06X:hdsnd68k_320com_r(%04X) -- not allowed\n", cpu_get_previouspc(&space.device()), offset);
	252	logerror("%06X:hdsnd68k_320com_r(%04X) -- not allowed\n", space.device().safe_pcbase(), offset);
253	253	return 0xffff;
254	254	}
255	255
r17788	r17789
260	260	if (m_cramen)
261	261	COMBINE_DATA(&m_comram[offset & 0x1ff]);
262	262	else
263		logerror("%06X:hdsnd68k_320com_w(%04X)=%04X -- not allowed\n", cpu_get_previouspc(&space.device()), offset, data);
	263	logerror("%06X:hdsnd68k_320com_w(%04X)=%04X -- not allowed\n", space.device().safe_pcbase(), offset, data);
264	264	}
265	265
266	266
r17788	r17789
308	308	WRITE16_MEMBER(harddriv_state::hdsnddsp_comport_w)
309	309	{
310	310	/* COM port TD0-7 */
311		logerror("%06X:hdsnddsp_comport_w=%d\n", cpu_get_previouspc(&space.device()), data);
	311	logerror("%06X:hdsnddsp_comport_w=%d\n", space.device().safe_pcbase(), data);
312	312	}
313	313
314	314
r17788	r17789
316	316	{
317	317	/* mute DAC audio, D0=1 */
318	318	/*  m_dacmute = data & 1;     -- NOT STUFFED */
319		logerror("%06X:mute DAC=%d\n", cpu_get_previouspc(&space.device()), data);
	319	logerror("%06X:mute DAC=%d\n", space.device().safe_pcbase(), data);
320	320	}
321	321
322	322
r17788	r17789
360	360
361	361	READ16_MEMBER(harddriv_state::hdsnddsp_compare_r)
362	362	{
363		logerror("%06X:hdsnddsp_compare_r(%04X)\n", cpu_get_previouspc(&space.device()), offset);
	363	logerror("%06X:hdsnddsp_compare_r(%04X)\n", space.device().safe_pcbase(), offset);
364	364	return 0;
365	365	}

trunk/src/mame/audio/beezer.c

r17788	r17789
499	499	return 0;
500	500	/* offset 1 reads the status register: bits 2 1 0 correspond to ints on channels 2,1,0, and bit 7 is an 'OR' of bits 2,1,0 */
501	501	case 1:
502		logerror("%04X:beezer_sh6840_r - unexpected read, status register is TODO!\n", cpu_get_pc(state->m_maincpu));
	502	logerror("%04X:beezer_sh6840_r - unexpected read, status register is TODO!\n", state->m_maincpu->safe_pc());
503	503	return 0;
504	504	/* offsets 2,4,6 read channel 0,1,2 MSBs and latch the LSB*/
505	505	case 2: case 4: case 6:

trunk/src/mame/audio/snes_snd.c

r17788	r17789
1124	1124	case 0x5:      /* Port 1 */
1125	1125	case 0x6:      /* Port 2 */
1126	1126	case 0x7:      /* Port 3 */
1127		// mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, cpu_get_pc(&space->device()));
	1127	// mame_printf_debug("SPC: rd %02x @ %d, PC=%x\n", spc700->port_in[offset - 4], offset - 4, space->device().safe_pc());
1128	1128	return spc700->port_in[offset - 4];
1129	1129	case 0x8: //normal RAM, can be read even if the ram disabled flag ($f0 bit 1) is active
1130	1130	case 0x9:
r17788	r17789
1193	1193	case 0x5:      /* Port 1 */
1194	1194	case 0x6:      /* Port 2 */
1195	1195	case 0x7:      /* Port 3 */
1196		// mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, cpu_get_pc(&space->device()));
	1196	// mame_printf_debug("SPC: %02x to APU @ %d (PC=%x)\n", data, offset & 3, space->device().safe_pc());
1197	1197	spc700->port_out[offset - 4] = data;
1198	1198	device->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
1199	1199	break;

trunk/src/mame/audio/mw8080bw.c

r17788	r17789
259	259	break;
260	260
261	261	default:
262		logerror("%04x:  Unknown sh port write %02x\n", cpu_get_pc(&space.device()), data);
	262	logerror("%04x:  Unknown sh port write %02x\n", space.device().safe_pc(), data);
263	263	break;
264	264	}
265	265	}

trunk/src/mame/machine/xevious.c

r17788	r17789
63	63
64	64	READ8_HANDLER( battles_customio0_r )
65	65	{
66		logerror("CPU0 %04x: custom I/O Read = %02x\n",cpu_get_pc(&space->device()),battles_customio_command);
	66	logerror("CPU0 %04x: custom I/O Read = %02x\n",space->device().safe_pc(),battles_customio_command);
67	67	return battles_customio_command;
68	68	}
69	69
r17788	r17789
71	71	{
72	72	int   return_data;
73	73
74		if( cpu_get_pc(&space->device()) == 0xAE ){
	74	if( space->device().safe_pc() == 0xAE ){
75	75	/* CPU4 0xAA - 0xB9 : waiting for MB8851 ? */
76	76	return_data =   ( (battles_customio_command & 0x10) << 3)
77	77	| 0x00
r17788	r17789
81	81	| 0x60
82	82	| (battles_customio_prev_command & 0x0f);
83	83	}
84		logerror("CPU3 %04x: custom I/O Read = %02x\n",cpu_get_pc(&space->device()),return_data);
	84	logerror("CPU3 %04x: custom I/O Read = %02x\n",space->device().safe_pc(),return_data);
85	85
86	86	return return_data;
87	87	}
r17788	r17789
91	91	{
92	92	timer_device *timer = space->machine().device<timer_device>("battles_nmi");
93	93
94		logerror("CPU0 %04x: custom I/O Write = %02x\n",cpu_get_pc(&space->device()),data);
	94	logerror("CPU0 %04x: custom I/O Write = %02x\n",space->device().safe_pc(),data);
95	95
96	96	battles_customio_command = data;
97	97	battles_customio_command_count = 0;
r17788	r17789
108	108
109	109	WRITE8_HANDLER( battles_customio3_w )
110	110	{
111		logerror("CPU3 %04x: custom I/O Write = %02x\n",cpu_get_pc(&space->device()),data);
	111	logerror("CPU3 %04x: custom I/O Write = %02x\n",space->device().safe_pc(),data);
112	112
113	113	battles_customio_command = data;
114	114	}
r17788	r17789
117	117
118	118	READ8_HANDLER( battles_customio_data0_r )
119	119	{
120		logerror("CPU0 %04x: custom I/O parameter %02x Read = %02x\n",cpu_get_pc(&space->device()),offset,battles_customio_data);
	120	logerror("CPU0 %04x: custom I/O parameter %02x Read = %02x\n",space->device().safe_pc(),offset,battles_customio_data);
121	121
122	122	return battles_customio_data;
123	123	}
124	124
125	125	READ8_HANDLER( battles_customio_data3_r )
126	126	{
127		logerror("CPU3 %04x: custom I/O parameter %02x Read = %02x\n",cpu_get_pc(&space->device()),offset,battles_customio_data);
	127	logerror("CPU3 %04x: custom I/O parameter %02x Read = %02x\n",space->device().safe_pc(),offset,battles_customio_data);
128	128	return battles_customio_data;
129	129	}
130	130
131	131
132	132	WRITE8_HANDLER( battles_customio_data0_w )
133	133	{
134		logerror("CPU0 %04x: custom I/O parameter %02x Write = %02x\n",cpu_get_pc(&space->device()),offset,data);
	134	logerror("CPU0 %04x: custom I/O parameter %02x Write = %02x\n",space->device().safe_pc(),offset,data);
135	135	battles_customio_data = data;
136	136	}
137	137
138	138	WRITE8_HANDLER( battles_customio_data3_w )
139	139	{
140		logerror("CPU3 %04x: custom I/O parameter %02x Write = %02x\n",cpu_get_pc(&space->device()),offset,data);
	140	logerror("CPU3 %04x: custom I/O parameter %02x Write = %02x\n",space->device().safe_pc(),offset,data);
141	141	battles_customio_data = data;
142	142	}
143	143
r17788	r17789
155	155
156	156	WRITE8_HANDLER( battles_noise_sound_w )
157	157	{
158		logerror("CPU3 %04x: 50%02x Write = %02x\n",cpu_get_pc(&space->device()),offset,data);
	158	logerror("CPU3 %04x: 50%02x Write = %02x\n",space->device().safe_pc(),offset,data);
159	159	if( (battles_sound_played == 0) && (data == 0xFF) ){
160	160	samples_device *samples = space->machine().device<samples_device>("samples");
161	161	if( customio[0] == 0x40 ){

trunk/src/mame/machine/taitoio.c

r17788	r17789
113	113	return tc0220ioc->read_7(0);
114	114
115	115	default:
116		//logerror("PC %06x: warning - read TC0220IOC address %02x\n",cpu_get_pc(&space->device()),offset);
	116	//logerror("PC %06x: warning - read TC0220IOC address %02x\n",space->device().safe_pc(),offset);
117	117	return 0xff;
118	118	}
119	119	}
r17788	r17789
138	138	coin_counter_w(device->machine(), 1, data & 0x08);
139	139
140	140	//if (data & 0xf0)
141		//logerror("PC %06x: warning - write %02x to TC0220IOC address %02x\n",cpu_get_pc(&space->device()),data,offset);
	141	//logerror("PC %06x: warning - write %02x to TC0220IOC address %02x\n",space->device().safe_pc(),data,offset);
142	142
143	143	break;
144	144
145	145	default:
146		//logerror("PC %06x: warning - write %02x to TC0220IOC address %02x\n",cpu_get_pc(&space->device()),data,offset);
	146	//logerror("PC %06x: warning - write %02x to TC0220IOC address %02x\n",space->device().safe_pc(),data,offset);
147	147	break;
148	148	}
149	149	}
r17788	r17789
270	270	return tc0510nio->read_7(0);
271	271
272	272	default:
273		//logerror("PC %06x: warning - read TC0510NIO address %02x\n",cpu_get_pc(&space->device()),offset);
	273	//logerror("PC %06x: warning - read TC0510NIO address %02x\n",space->device().safe_pc(),offset);
274	274	return 0xff;
275	275	}
276	276	}
r17788	r17789
295	295	break;
296	296
297	297	default:
298		//logerror("PC %06x: warning - write %02x to TC0510NIO address %02x\n",cpu_get_pc(&space->device()),data,offset);
	298	//logerror("PC %06x: warning - write %02x to TC0510NIO address %02x\n",space->device().safe_pc(),data,offset);
299	299	break;
300	300	}
301	301	}
r17788	r17789
312	312	else
313	313	{
314	314	/* driftout writes the coin counters here - bug? */
315		//logerror("CPU #0 PC %06x: warning - write to MSB of TC0510NIO address %02x\n",cpu_get_pc(&space->device()),offset);
	315	//logerror("CPU #0 PC %06x: warning - write to MSB of TC0510NIO address %02x\n",space->device().safe_pc(),offset);
316	316	tc0510nio_w(device, offset, (data >> 8) & 0xff);
317	317	}
318	318	}
r17788	r17789
421	421	return tc0640fio->read_7(0);
422	422
423	423	default:
424		//logerror("PC %06x: warning - read TC0640FIO address %02x\n",cpu_get_pc(&space->device()),offset);
	424	//logerror("PC %06x: warning - read TC0640FIO address %02x\n",space->device().safe_pc(),offset);
425	425	return 0xff;
426	426	}
427	427	}
r17788	r17789
446	446	break;
447	447
448	448	default:
449		//logerror("PC %06x: warning - write %02x to TC0640FIO address %02x\n",cpu_get_pc(&space->device()),data,offset);
	449	//logerror("PC %06x: warning - write %02x to TC0640FIO address %02x\n",space->device().safe_pc(),data,offset);
450	450	break;
451	451	}
452	452	}
r17788	r17789
463	463	else
464	464	{
465	465	tc0640fio_w(device, offset, (data >> 8) & 0xff);
466		//logerror("CPU #0 PC %06x: warning - write to MSB of TC0640FIO address %02x\n",cpu_get_pc(&space->device()),offset);
	466	//logerror("CPU #0 PC %06x: warning - write to MSB of TC0640FIO address %02x\n",space->device().safe_pc(),offset);
467	467	}
468	468	}
469	469
r17788	r17789
479	479	else
480	480	{
481	481	tc0640fio_w(device, offset, data & 0xff);
482		//logerror("CPU #0 PC %06x: warning - write to LSB of TC0640FIO address %02x\n",cpu_get_pc(&space->device()),offset);
	482	//logerror("CPU #0 PC %06x: warning - write to LSB of TC0640FIO address %02x\n",space->device().safe_pc(),offset);
483	483	}
484	484	}
485	485

trunk/src/mame/machine/nmk004.c

r17788	r17789
1062	1062	{
1063	1063	if (ACCESSING_BITS_0_7)
1064	1064	{
1065		//logerror("%06x: NMK004_w %02x\n",cpu_get_pc(&space->device()),data);
	1065	//logerror("%06x: NMK004_w %02x\n",space->device().safe_pc(),data);
1066	1066	NMK004_state.from_main = data & 0xff;
1067	1067	}
1068	1068	}
r17788	r17789
1072	1072	//static int last;
1073	1073	int res = NMK004_state.to_main;
1074	1074
1075		//if (res != last) logerror("%06x: NMK004_r %02x\n",cpu_get_pc(&space->device()),res);
	1075	//if (res != last) logerror("%06x: NMK004_r %02x\n",space->device().safe_pc(),res);
1076	1076	//last = res;
1077	1077
1078	1078	return res;

trunk/src/mame/machine/stvprot.c

r17788	r17789
120	120	{
121	121	if(offset == 3)
122	122	{
123		logerror("A-Bus control protection read at %06x with data = %08x\n",cpu_get_pc(&space->device()),a_bus[3]);
	123	logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
124	124	#ifdef MAME_DEBUG
125		popmessage("Prot read at %06x with data = %08x",cpu_get_pc(&space->device()),a_bus[3]);
	125	popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
126	126	#endif
127	127	switch(a_bus[3])
128	128	{
r17788	r17789
141	141	static WRITE32_HANDLER ( twcup98_prot_w )
142	142	{
143	143	COMBINE_DATA(&a_bus[offset]);
144		logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",cpu_get_pc(&space->device()),offset,data);
	144	logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
145	145	if(offset == 3)
146	146	{
147	147	logerror("MAIN : %08x  DATA : %08x\n",a_bus[3],a_bus[2]);
r17788	r17789
179	179	{
180	180	if(offset == 3)
181	181	{
182		logerror("A-Bus control protection read at %06x with data = %08x\n",cpu_get_pc(&space->device()),a_bus[3]);
	182	logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
183	183	#ifdef MAME_DEBUG
184		popmessage("Prot read at %06x with data = %08x",cpu_get_pc(&space->device()),a_bus[3]);
	184	popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
185	185	#endif
186	186	switch(a_bus[3])
187	187	{
r17788	r17789
208	208	static WRITE32_HANDLER ( sss_prot_w )
209	209	{
210	210	COMBINE_DATA(&a_bus[offset]);
211		logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",cpu_get_pc(&space->device()),offset,data);
	211	logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
212	212	if(offset == 3)
213	213	{
214	214	//logerror("MAIN : %08x  DATA : %08x\n",a_bus[3],a_bus[2]);
r17788	r17789
244	244	{
245	245	if(offset == 3)
246	246	{
247		logerror("A-Bus control protection read at %06x with data = %08x\n",cpu_get_pc(&space->device()),a_bus[3]);
	247	logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
248	248	#ifdef MAME_DEBUG
249		popmessage("Prot read at %06x with data = %08x",cpu_get_pc(&space->device()),a_bus[3]);
	249	popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
250	250	#endif
251	251	switch(a_bus[3])
252	252	{
r17788	r17789
278	278	static WRITE32_HANDLER ( rsgun_prot_w )
279	279	{
280	280	COMBINE_DATA(&a_bus[offset]);
281		logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",cpu_get_pc(&space->device()),offset,data);
	281	logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
282	282	if(offset == 3)
283	283	{
284	284	//logerror("MAIN : %08x  DATA : %08x\n",a_bus[3],a_bus[2]);
r17788	r17789
319	319	{
320	320	if(offset == 3)
321	321	{
322		logerror("A-Bus control protection read at %06x with data = %08x\n",cpu_get_pc(&space->device()),a_bus[3]);
	322	logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
323	323	#ifdef MAME_DEBUG
324		popmessage("Prot read at %06x with data = %08x",cpu_get_pc(&space->device()),a_bus[3]);
	324	popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
325	325	#endif
326	326	switch(a_bus[3])
327	327	{
r17788	r17789
349	349	static WRITE32_HANDLER ( elandore_prot_w )
350	350	{
351	351	COMBINE_DATA(&a_bus[offset]);
352		logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",cpu_get_pc(&space->device()),offset,data);
	352	logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
353	353	if(offset == 3)
354	354	{
355	355	/* a bus value 2 seed is used too here. */
r17788	r17789
426	426	{
427	427	if(offset == 3)
428	428	{
429		logerror("A-Bus control protection read at %06x with data = %08x\n",cpu_get_pc(&space->device()),a_bus[3]);
	429	logerror("A-Bus control protection read at %06x with data = %08x\n",space->device().safe_pc(),a_bus[3]);
430	430	#ifdef MAME_DEBUG
431		popmessage("Prot read at %06x with data = %08x",cpu_get_pc(&space->device()),a_bus[3]);
	431	popmessage("Prot read at %06x with data = %08x",space->device().safe_pc(),a_bus[3]);
432	432	#endif
433	433	switch(a_bus[3])
434	434	{
r17788	r17789
455	455	static WRITE32_HANDLER ( ffreveng_prot_w )
456	456	{
457	457	COMBINE_DATA(&a_bus[offset]);
458		logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",cpu_get_pc(&space->device()),offset,data);
	458	logerror("A-Bus control protection write at %06x: [%02x] <- %08x\n",space->device().safe_pc(),offset,data);
459	459	if(offset == 3)
460	460	{
461	461	//logerror("MAIN : %08x  DATA : %08x\n",a_bus[3],a_bus[2]);
r17788	r17789
554	554	}
555	555	else
556	556	{
557		logerror("%06x Decathlete prot R offset %04x mask %08x regs %08x, %08x, %08x, %08x\n",cpu_get_pc(&space->device()), offset, mem_mask, decathlt_protregs[0], decathlt_protregs[1], decathlt_protregs[2], decathlt_protregs[3]);
	557	logerror("%06x Decathlete prot R offset %04x mask %08x regs %08x, %08x, %08x, %08x\n",space->device().safe_pc(), offset, mem_mask, decathlt_protregs[0], decathlt_protregs[1], decathlt_protregs[2], decathlt_protregs[3]);
558	558	}
559	559
560	560	return decathlt_protregs[offset];

trunk/src/mame/machine/bublbobl.c

r17788	r17789
184	184	READ8_MEMBER(bublbobl_state::bublbobl_mcu_port1_r)
185	185	{
186	186
187		//logerror("%04x: 6801U4 port 1 read\n", cpu_get_pc(&space.device()));
	187	//logerror("%04x: 6801U4 port 1 read\n", space.device().safe_pc());
188	188	m_port1_in = ioport("IN0")->read();
189	189	return (m_port1_out & m_ddr1) | (m_port1_in & ~m_ddr1);
190	190	}
191	191
192	192	WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port1_w)
193	193	{
194		//logerror("%04x: 6801U4 port 1 write %02x\n", cpu_get_pc(&space.device()), data);
	194	//logerror("%04x: 6801U4 port 1 write %02x\n", space.device().safe_pc(), data);
195	195
196	196	// bit 4: coin lockout
197	197	coin_lockout_global_w(machine(), ~data & 0x10);
r17788	r17789
215	215	READ8_MEMBER(bublbobl_state::bublbobl_mcu_port2_r)
216	216	{
217	217
218		//logerror("%04x: 6801U4 port 2 read\n", cpu_get_pc(&space.device()));
	218	//logerror("%04x: 6801U4 port 2 read\n", space.device().safe_pc());
219	219	return (m_port2_out & m_ddr2) | (m_port2_in & ~m_ddr2);
220	220	}
221	221
222	222	WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port2_w)
223	223	{
224		//logerror("%04x: 6801U4 port 2 write %02x\n", cpu_get_pc(&space.device()), data);
	224	//logerror("%04x: 6801U4 port 2 write %02x\n", space.device().safe_pc(), data);
225	225	static const char *const portnames[] = { "DSW0", "DSW1", "IN1", "IN2" };
226	226
227	227	// bits 0-3: bits 8-11 of shared RAM address
r17788	r17789
255	255
256	256	READ8_MEMBER(bublbobl_state::bublbobl_mcu_port3_r)
257	257	{
258		//logerror("%04x: 6801U4 port 3 read\n", cpu_get_pc(&space.device()));
	258	//logerror("%04x: 6801U4 port 3 read\n", space.device().safe_pc());
259	259	return (m_port3_out & m_ddr3) | (m_port3_in & ~m_ddr3);
260	260	}
261	261
262	262	WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port3_w)
263	263	{
264		//logerror("%04x: 6801U4 port 3 write %02x\n", cpu_get_pc(&space.device()), data);
	264	//logerror("%04x: 6801U4 port 3 write %02x\n", space.device().safe_pc(), data);
265	265	m_port3_out = data;
266	266	}
267	267
268	268	READ8_MEMBER(bublbobl_state::bublbobl_mcu_port4_r)
269	269	{
270		//logerror("%04x: 6801U4 port 4 read\n", cpu_get_pc(&space.device()));
	270	//logerror("%04x: 6801U4 port 4 read\n", space.device().safe_pc());
271	271	return (m_port4_out & m_ddr4) | (m_port4_in & ~m_ddr4);
272	272	}
273	273
274	274	WRITE8_MEMBER(bublbobl_state::bublbobl_mcu_port4_w)
275	275	{
276		//logerror("%04x: 6801U4 port 4 write %02x\n", cpu_get_pc(&space.device()), data);
	276	//logerror("%04x: 6801U4 port 4 write %02x\n", space.device().safe_pc(), data);
277	277
278	278	// bits 0-7 of shared RAM address
279	279
r17788	r17789
292	292	READ8_MEMBER(bublbobl_state::boblbobl_ic43_a_r)
293	293	{
294	294	// if (offset >= 2)
295		//     logerror("%04x: ic43_a_r (offs %d) res = %02x\n", cpu_get_pc(&space.device()), offset, res);
	295	//     logerror("%04x: ic43_a_r (offs %d) res = %02x\n", space.device().safe_pc(), offset, res);
296	296
297	297	if (offset == 0)
298	298	return m_ic43_a << 4;
r17788	r17789
342	342	{
343	343	static const int xorval[4] = { 4, 1, 8, 2 };
344	344
345		//  logerror("%04x: ic43_b_w (offs %d) %02x\n", cpu_get_pc(&space.device()), offset, data);
	345	//  logerror("%04x: ic43_b_w (offs %d) %02x\n", space.device().safe_pc(), offset, data);
346	346	m_ic43_b = (data >> 4) ^ xorval[offset];
347	347	}
348	348
349	349	READ8_MEMBER(bublbobl_state::boblbobl_ic43_b_r)
350	350	{
351		//  logerror("%04x: ic43_b_r (offs %d)\n", cpu_get_pc(&space.device()), offset);
	351	//  logerror("%04x: ic43_b_r (offs %d)\n", space.device().safe_pc(), offset);
352	352	if (offset == 0)
353	353	return m_ic43_b << 4;
354	354	else
r17788	r17789
382	382
383	383	READ8_MEMBER(bublbobl_state::bublbobl_68705_port_a_r)
384	384	{
385		//logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(&space.device()), m_port_a_in);
	385	//logerror("%04x: 68705 port A read %02x\n", space.device().safe_pc(), m_port_a_in);
386	386	return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
387	387	}
388	388
389	389	WRITE8_MEMBER(bublbobl_state::bublbobl_68705_port_a_w)
390	390	{
391		//logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(&space.device()), data);
	391	//logerror("%04x: 68705 port A write %02x\n", space.device().safe_pc(), data);
392	392	m_port_a_out = data;
393	393	}
394	394
r17788	r17789
425	425
426	426	WRITE8_MEMBER(bublbobl_state::bublbobl_68705_port_b_w)
427	427	{
428		//logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(&space.device()), data);
	428	//logerror("%04x: 68705 port B write %02x\n", space.device().safe_pc(), data);
429	429	static const char *const portnames[] = { "DSW0", "DSW1", "IN1", "IN2" };
430	430
431	431	if ((m_ddr_b & 0x01) && (~data & 0x01) && (m_port_b_out & 0x01))
r17788	r17789
435	435	if ((m_ddr_b & 0x02) && (data & 0x02) && (~m_port_b_out & 0x02)) /* positive edge trigger */
436	436	{
437	437	m_address = (m_address & 0xff00) | m_port_a_out;
438		//logerror("%04x: 68705 address %02x\n", cpu_get_pc(&space.device()), m_port_a_out);
	438	//logerror("%04x: 68705 address %02x\n", space.device().safe_pc(), m_port_a_out);
439	439	}
440	440	if ((m_ddr_b & 0x04) && (data & 0x04) && (~m_port_b_out & 0x04)) /* positive edge trigger */
441	441	{
r17788	r17789
447	447	{
448	448	if ((m_address & 0x0800) == 0x0000)
449	449	{
450		//logerror("%04x: 68705 read input port %02x\n", cpu_get_pc(&space.device()), m_address);
	450	//logerror("%04x: 68705 read input port %02x\n", space.device().safe_pc(), m_address);
451	451	m_latch = ioport(portnames[m_address & 3])->read();
452	452	}
453	453	else if ((m_address & 0x0c00) == 0x0c00)
454	454	{
455		//logerror("%04x: 68705 read %02x from address %04x\n", cpu_get_pc(&space.device()), m_mcu_sharedram[m_address], m_address);
	455	//logerror("%04x: 68705 read %02x from address %04x\n", space.device().safe_pc(), m_mcu_sharedram[m_address], m_address);
456	456	m_latch = m_mcu_sharedram[m_address & 0x03ff];
457	457	}
458	458	else
459		logerror("%04x: 68705 unknown read address %04x\n", cpu_get_pc(&space.device()), m_address);
	459	logerror("%04x: 68705 unknown read address %04x\n", space.device().safe_pc(), m_address);
460	460	}
461	461	else   /* write */
462	462	{
463	463	if ((m_address & 0x0c00) == 0x0c00)
464	464	{
465		//logerror("%04x: 68705 write %02x to address %04x\n", cpu_get_pc(&space.device()), m_port_a_out, m_address);
	465	//logerror("%04x: 68705 write %02x to address %04x\n", space.device().safe_pc(), m_port_a_out, m_address);
466	466	m_mcu_sharedram[m_address & 0x03ff] = m_port_a_out;
467	467	}
468	468	else
469		logerror("%04x: 68705 unknown write to address %04x\n", cpu_get_pc(&space.device()), m_address);
	469	logerror("%04x: 68705 unknown write to address %04x\n", space.device().safe_pc(), m_address);
470	470	}
471	471	}
472	472	if ((m_ddr_b & 0x20) && (~data & 0x20) && (m_port_b_out & 0x20))
r17788	r17789
479	479	}
480	480	if ((m_ddr_b & 0x40) && (~data & 0x40) && (m_port_b_out & 0x40))
481	481	{
482		logerror("%04x: 68705 unknown port B bit %02x\n", cpu_get_pc(&space.device()), data);
	482	logerror("%04x: 68705 unknown port B bit %02x\n", space.device().safe_pc(), data);
483	483	}
484	484	if ((m_ddr_b & 0x80) && (~data & 0x80) && (m_port_b_out & 0x80))
485	485	{
486		logerror("%04x: 68705 unknown port B bit %02x\n", cpu_get_pc(&space.device()), data);
	486	logerror("%04x: 68705 unknown port B bit %02x\n", space.device().safe_pc(), data);
487	487	}
488	488
489	489	m_port_b_out = data;

trunk/src/mame/machine/3do.c

r17788	r17789
62	62
63	63
64	64	READ32_MEMBER(_3do_state::_3do_nvarea_r){
65		logerror( "%08X: NVRAM read offset = %08X\n", cpu_get_pc(machine().device("maincpu")), offset );
	65	logerror( "%08X: NVRAM read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset );
66	66	return 0;
67	67	}
68	68
69	69	WRITE32_MEMBER(_3do_state::_3do_nvarea_w){
70		logerror( "%08X: NVRAM write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(machine().device("maincpu")), offset, data, mem_mask );
	70	logerror( "%08X: NVRAM write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset, data, mem_mask );
71	71	}
72	72
73	73
r17788	r17789
100	100	READ32_MEMBER(_3do_state::_3do_slow2_r){
101	101	UINT32 data = 0;
102	102
103		logerror( "%08X: UNK_318 read offset = %08X\n", cpu_get_pc(machine().device("maincpu")), offset );
	103	logerror( "%08X: UNK_318 read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset );
104	104
105	105	switch( offset ) {
106	106	case 0:      /* Boot ROM checks here and expects to read 1, 0, 1, 0 in the lowest bit */
r17788	r17789
114	114
115	115	WRITE32_MEMBER(_3do_state::_3do_slow2_w)
116	116	{
117		logerror( "%08X: UNK_318 write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(machine().device("maincpu")), offset, data, mem_mask );
	117	logerror( "%08X: UNK_318 write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset, data, mem_mask );
118	118
119	119	switch( offset )
120	120	{
r17788	r17789
146	146	UINT32 addr = ( offset & ( 0x07fc / 4 ) ) << 9;
147	147	UINT32 *p = m_vram + addr;
148	148
149		logerror( "%08X: SVF read offset = %08X\n", cpu_get_pc(machine().device("maincpu")), offset*4 );
	149	logerror( "%08X: SVF read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset*4 );
150	150
151	151	switch( offset & ( 0xE000 / 4 ) )
152	152	{
r17788	r17789
171	171	UINT32 addr = ( offset & ( 0x07fc / 4 ) ) << 9;
172	172	UINT32 *p = m_vram + addr;
173	173
174		logerror( "%08X: SVF write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(machine().device("maincpu")), offset*4, data, mem_mask );
	174	logerror( "%08X: SVF write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset*4, data, mem_mask );
175	175
176	176	switch( offset & ( 0xe000 / 4 ) )
177	177	{
r17788	r17789
207	207
208	208
209	209	READ32_MEMBER(_3do_state::_3do_madam_r){
210		logerror( "%08X: MADAM read offset = %08X\n", cpu_get_pc(machine().device("maincpu")), offset*4 );
	210	logerror( "%08X: MADAM read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset*4 );
211	211
212	212	switch( offset ) {
213	213	case 0x0000/4:      /* 03300000 - Revision */
r17788	r17789
358	358	case 0x07f8/4:
359	359	return m_madam.mult_status;
360	360	default:
361		logerror( "%08X: unhandled MADAM read offset = %08X\n", cpu_get_pc(machine().device("maincpu")), offset*4 );
	361	logerror( "%08X: unhandled MADAM read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset*4 );
362	362	break;
363	363	}
364	364	return 0;
r17788	r17789
366	366
367	367
368	368	WRITE32_MEMBER(_3do_state::_3do_madam_w){
369		logerror( "%08X: MADAM write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(machine().device("maincpu")), offset*4, data, mem_mask );
	369	logerror( "%08X: MADAM write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset*4, data, mem_mask );
370	370
371	371	switch( offset ) {
372	372	case 0x0000/4:
r17788	r17789
537	537	break;
538	538
539	539	default:
540		logerror( "%08X: unhandled MADAM write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(machine().device("maincpu")), offset*4, data, mem_mask );
	540	logerror( "%08X: unhandled MADAM write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset*4, data, mem_mask );
541	541	break;
542	542	}
543	543	}
r17788	r17789
554	554
555	555	READ32_MEMBER(_3do_state::_3do_clio_r)
556	556	{
557		logerror( "%08X: CLIO read offset = %08X\n", cpu_get_pc(machine().device("maincpu")), offset * 4 );
	557	logerror( "%08X: CLIO read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset * 4 );
558	558
559	559	switch( offset )
560	560	{
r17788	r17789
693	693	return m_clio.uncle_rom;
694	694
695	695	default:
696		logerror( "%08X: unhandled CLIO read offset = %08X\n", cpu_get_pc(machine().device("maincpu")), offset * 4 );
	696	logerror( "%08X: unhandled CLIO read offset = %08X\n", machine().device("maincpu")->safe_pc(), offset * 4 );
697	697	break;
698	698	}
699	699	return 0;
r17788	r17789
701	701
702	702	WRITE32_MEMBER(_3do_state::_3do_clio_w)
703	703	{
704		logerror( "%08X: CLIO write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(machine().device("maincpu")), offset*4, data, mem_mask );
	704	logerror( "%08X: CLIO write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset*4, data, mem_mask );
705	705
706	706	switch( offset )
707	707	{
r17788	r17789
945	945	break;
946	946
947	947	default:
948		logerror( "%08X: unhandled CLIO write offset = %08X, data = %08X, mask = %08X\n", cpu_get_pc(machine().device("maincpu")), offset*4, data, mem_mask );
	948	logerror( "%08X: unhandled CLIO write offset = %08X, data = %08X, mask = %08X\n", machine().device("maincpu")->safe_pc(), offset*4, data, mem_mask );
949	949	break;
950	950	}
951	951	}

trunk/src/mame/machine/asic65.c

r17788	r17789
211	211	else
212	212	{
213	213	int command = (data < MAX_COMMANDS) ? command_map[asic65.type][data] : OP_UNKNOWN;
214		if (asic65.log) fprintf(asic65.log, "\n(%06X)%c%04X:", cpu_get_previouspc(&space->device()), (command == OP_UNKNOWN) ? '*' : ' ', data);
	214	if (asic65.log) fprintf(asic65.log, "\n(%06X)%c%04X:", space->device().safe_pcbase(), (command == OP_UNKNOWN) ? '*' : ' ', data);
215	215
216	216	/* set the command number and reset the parameter/result indices */
217	217	asic65.command = data;

trunk/src/mame/machine/tnzs.c

r17788	r17789
50	50	data = upi41_master_r(m_mcu, offset & 1);
51	51	device_yield(&space.device());
52	52
53		//  logerror("PC %04x: read %02x from mcu $c00%01x\n", cpu_get_previouspc(&space.device()), data, offset);
	53	//  logerror("PC %04x: read %02x from mcu $c00%01x\n", space.device().safe_pcbase(), data, offset);
54	54
55	55	return data;
56	56	}
57	57
58	58	WRITE8_MEMBER(tnzs_state::mcu_tnzs_w)
59	59	{
60		//  logerror("PC %04x: write %02x to mcu $c00%01x\n", cpu_get_previouspc(&space.device()), data, offset);
	60	//  logerror("PC %04x: write %02x to mcu $c00%01x\n", space.device().safe_pcbase(), data, offset);
61	61
62	62	upi41_master_w(m_mcu, offset & 1, data);
63	63	}
r17788	r17789
75	75	default:   data = 0xff; break;
76	76	}
77	77
78		//  logerror("I8742:%04x  Read %02x from port 1\n", cpu_get_previouspc(&space.device()), data);
	78	//  logerror("I8742:%04x  Read %02x from port 1\n", space.device().safe_pcbase(), data);
79	79
80	80	return data;
81	81	}
r17788	r17789
84	84	{
85	85	int data = ioport("IN2")->read();
86	86
87		//  logerror("I8742:%04x  Read %02x from port 2\n", cpu_get_previouspc(&space.device()), data);
	87	//  logerror("I8742:%04x  Read %02x from port 2\n", space.device().safe_pcbase(), data);
88	88
89	89	return data;
90	90	}
91	91
92	92	WRITE8_MEMBER(tnzs_state::tnzs_port2_w)
93	93	{
94		//  logerror("I8742:%04x  Write %02x to port 2\n", cpu_get_previouspc(&space.device()), data);
	94	//  logerror("I8742:%04x  Write %02x to port 2\n", space.device().safe_pcbase(), data);
95	95
96	96	coin_lockout_w(machine(), 0, (data & 0x40));
97	97	coin_lockout_w(machine(), 1, (data & 0x80));
r17788	r17789
107	107	{
108	108	int val;
109	109
110		//  logerror("PC %04x: read input %04x\n", cpu_get_pc(&space.device()), 0xf000 + offset);
	110	//  logerror("PC %04x: read input %04x\n", space.device().safe_pc(), 0xf000 + offset);
111	111
112	112	val = ioport((offset / 2) ? "AN2" : "AN1")->read_safe(0);
113	113	if (offset & 1)
r17788	r17789
212	212	{
213	213	static const char mcu_startup[] = "\x55\xaa\x5a";
214	214
215		//  logerror("PC %04x: read mcu %04x\n", cpu_get_pc(&space.device()), 0xc000 + offset);
	215	//  logerror("PC %04x: read mcu %04x\n", space.device().safe_pc(), 0xc000 + offset);
216	216
217	217	if (offset == 0)
218	218	{
r17788	r17789
273	273	{
274	274	if (offset == 0)
275	275	{
276		//      logerror("PC %04x: write %02x to mcu %04x\n", cpu_get_pc(&space.device()), data, 0xc000 + offset);
	276	//      logerror("PC %04x: write %02x to mcu %04x\n", space.device().safe_pc(), data, 0xc000 + offset);
277	277	if (m_mcu_command == 0x41)
278	278	{
279	279	m_mcu_credits = (m_mcu_credits + data) & 0xff;
r17788	r17789
290	290	0x80: release coin lockout (issued only in test mode)
291	291	during initialization, a sequence of 4 bytes sets coin/credit settings
292	292	*/
293		//      logerror("PC %04x: write %02x to mcu %04x\n", cpu_get_pc(&space.device()), data, 0xc000 + offset);
	293	//      logerror("PC %04x: write %02x to mcu %04x\n", space.device().safe_pc(), data, 0xc000 + offset);
294	294
295	295	if (m_mcu_initializing)
296	296	{
r17788	r17789
318	318	{
319	319	static const char mcu_startup[] = "\x5a\xa5\x55";
320	320
321		//  logerror("PC %04x: read mcu %04x\n", cpu_get_pc(&space.device()), 0xc000 + offset);
	321	//  logerror("PC %04x: read mcu %04x\n", space.device().safe_pc(), 0xc000 + offset);
322	322
323	323	if (offset == 0)
324	324	{
r17788	r17789
402	402	{
403	403	if (offset == 0)
404	404	{
405		//      logerror("PC %04x: write %02x to mcu %04x\n", cpu_get_pc(&space.device()), data, 0xc000 + offset);
	405	//      logerror("PC %04x: write %02x to mcu %04x\n", space.device().safe_pc(), data, 0xc000 + offset);
406	406	if (m_mcu_command == 0x41)
407	407	{
408	408	m_mcu_credits = (m_mcu_credits + data) & 0xff;
r17788	r17789
424	424	during initialization, a sequence of 4 bytes sets coin/credit settings
425	425	*/
426	426
427		//      logerror("PC %04x: write %02x to mcu %04x\n", cpu_get_pc(&space.device()), data, 0xc000 + offset);
	427	//      logerror("PC %04x: write %02x to mcu %04x\n", space.device().safe_pc(), data, 0xc000 + offset);
428	428
429	429	if (m_mcu_initializing)
430	430	{
r17788	r17789
729	729	WRITE8_MEMBER(tnzs_state::tnzs_ramrom_bankswitch_w)
730	730	{
731	731
732		//  logerror("PC %04x: writing %02x to bankswitch\n", cpu_get_pc(&space.device()),data);
	732	//  logerror("PC %04x: writing %02x to bankswitch\n", space.device().safe_pc(),data);
733	733
734	734	/* bit 4 resets the second CPU */
735	735	if (data & 0x10)
r17788	r17789
743	743
744	744	WRITE8_MEMBER(tnzs_state::tnzs_bankswitch1_w)
745	745	{
746		//  logerror("PC %04x: writing %02x to bankswitch 1\n", cpu_get_pc(&space.device()),data);
	746	//  logerror("PC %04x: writing %02x to bankswitch 1\n", space.device().safe_pc(),data);
747	747
748	748	switch (m_mcu_type)
749	749	{

trunk/src/mame/machine/midyunit.c

r17788	r17789
27	27
28	28	WRITE16_MEMBER(midyunit_state::midyunit_cmos_w)
29	29	{
30		logerror("%08x:CMOS Write @ %05X\n", cpu_get_pc(&space.device()), offset);
	30	logerror("%08x:CMOS Write @ %05X\n", space.device().safe_pc(), offset);
31	31	COMBINE_DATA(&m_cmos_ram[offset + m_cmos_page]);
32	32	}
33	33
r17788	r17789
49	49	{
50	50	m_cmos_w_enable = (~data >> 9) & 1;
51	51
52		logerror("%08x:Protection write = %04X\n", cpu_get_pc(&space.device()), data);
	52	logerror("%08x:Protection write = %04X\n", space.device().safe_pc(), data);
53	53
54	54	/* only go down this path if we have a data structure */
55	55	if (m_prot_data)
r17788	r17789
98	98	READ16_MEMBER(midyunit_state::midyunit_protection_r)
99	99	{
100	100	/* return the most recently clocked value */
101		logerror("%08X:Protection read = %04X\n", cpu_get_pc(&space.device()), m_prot_result);
	101	logerror("%08X:Protection read = %04X\n", space.device().safe_pc(), m_prot_result);
102	102	return m_prot_result;
103	103	}
104	104
r17788	r17789
185	185
186	186	WRITE16_MEMBER(midyunit_state::term2_hack_w)
187	187	{
188		if (offset == 1 && cpu_get_pc(&space.device()) == 0xffce6520)
	188	if (offset == 1 && space.device().safe_pc() == 0xffce6520)
189	189	{
190	190	m_t2_hack_mem[offset] = 0;
191	191	return;
r17788	r17789
195	195
196	196	WRITE16_MEMBER(midyunit_state::term2la3_hack_w)
197	197	{
198		if (offset == 0 && cpu_get_pc(&space.device()) == 0xffce5230)
	198	if (offset == 0 && space.device().safe_pc() == 0xffce5230)
199	199	{
200	200	m_t2_hack_mem[offset] = 0;
201	201	return;
r17788	r17789
205	205
206	206	WRITE16_MEMBER(midyunit_state::term2la2_hack_w)
207	207	{
208		if (offset == 0 && cpu_get_pc(&space.device()) == 0xffce4b80)
	208	if (offset == 0 && space.device().safe_pc() == 0xffce4b80)
209	209	{
210	210	m_t2_hack_mem[offset] = 0;
211	211	return;
r17788	r17789
215	215
216	216	WRITE16_MEMBER(midyunit_state::term2la1_hack_w)
217	217	{
218		if (offset == 0 && cpu_get_pc(&space.device()) == 0xffce33f0)
	218	if (offset == 0 && space.device().safe_pc() == 0xffce33f0)
219	219	{
220	220	m_t2_hack_mem[offset] = 0;
221	221	return;
r17788	r17789
580	580	/* check for out-of-bounds accesses */
581	581	if (offset)
582	582	{
583		logerror("%08X:Unexpected write to sound (hi) = %04X\n", cpu_get_pc(&space.device()), data);
	583	logerror("%08X:Unexpected write to sound (hi) = %04X\n", space.device().safe_pc(), data);
584	584	return;
585	585	}
586	586

trunk/src/mame/machine/naomi.c

r17788	r17789
28	28
29	29	static READ64_HANDLER( naomi_biose_idle_skip_r )
30	30	{
31		if (cpu_get_pc(&space->device())==0xc04173c)
	31	if (space->device().safe_pc()==0xc04173c)
32	32	device_spin_until_time(&space->device(), attotime::from_usec(500));
33	33	//device_spin_until_interrupt(&space->device());
34	34	//  else
35		//      printf("%08x\n", cpu_get_pc(&space->device()));
	35	//      printf("%08x\n", space->device().safe_pc());
36	36
37	37	return naomi_ram64[0x2ad238/8];
38	38	}
39	39
40	40	static READ64_HANDLER( naomi_biosh_idle_skip_r )
41	41	{
42		if (cpu_get_pc(&space->device())==0xc045ffc)
	42	if (space->device().safe_pc()==0xc045ffc)
43	43	device_spin_until_time(&space->device(), attotime::from_usec(500));
44	44
45		//   printf("%08x\n", cpu_get_pc(&space->device()));
	45	//   printf("%08x\n", space->device().safe_pc());
46	46
47	47	return naomi_ram64[0x2b0600/8];
48	48	}
49	49
50	50	static READ64_HANDLER( naomi2_biose_idle_skip_r )
51	51	{
52		if (cpu_get_pc(&space->device())==0xc04637c)
	52	if (space->device().safe_pc()==0xc04637c)
53	53	device_spin_until_time(&space->device(), attotime::from_usec(500));
54	54	//device_spin_until_interrupt(&space->device());
55	55	//  else
56		//      printf("%08x\n", cpu_get_pc(&space->device()));
	56	//      printf("%08x\n", space->device().safe_pc());
57	57
58	58	return naomi_ram64[0x2b0600/8];
59	59	}
r17788	r17789
243	243
244	244	static READ64_HANDLER( naomigd_ggxxsla_idle_skip_r )
245	245	{
246		if (cpu_get_pc(&space->device())==0x0c0c9adc)
	246	if (space->device().safe_pc()==0x0c0c9adc)
247	247	device_spin_until_time(&space->device(), attotime::from_usec(500));
248	248
249	249	return naomi_ram64[0x1aae18/8];
r17788	r17789
257	257
258	258	static READ64_HANDLER( naomigd_ggxx_idle_skip_r )
259	259	{
260		if (cpu_get_pc(&space->device())==0xc0b5c3c) // or 0xc0bab0c
	260	if (space->device().safe_pc()==0xc0b5c3c) // or 0xc0bab0c
261	261	device_spin_until_time(&space->device(), attotime::from_usec(500));
262	262
263	263	return naomi_ram64[0x1837b8/8];
r17788	r17789
272	272
273	273	static READ64_HANDLER( naomigd_ggxxrl_idle_skip_r )
274	274	{
275		if (cpu_get_pc(&space->device())==0xc0b84bc) // or 0xc0bab0c
	275	if (space->device().safe_pc()==0xc0b84bc) // or 0xc0bab0c
276	276	device_spin_until_time(&space->device(), attotime::from_usec(500));
277	277
278		//printf("%08x\n", cpu_get_pc(&space->device()));
	278	//printf("%08x\n", space->device().safe_pc());
279	279
280	280	return naomi_ram64[0x18d6c8/8];
281	281	}
r17788	r17789
289	289	/* at least speeds up the annoying copyright screens ;-) */
290	290	static READ64_HANDLER( naomigd_sfz3ugd_idle_skip_r )
291	291	{
292		if (cpu_get_pc(&space->device())==0xc36a2dc)
	292	if (space->device().safe_pc()==0xc36a2dc)
293	293	device_spin_until_time(&space->device(), attotime::from_usec(500));
294	294
295	295	return naomi_ram64[0x5dc900/8];
r17788	r17789
334	334
335	335	static READ64_HANDLER( hotd2_idle_skip_r )
336	336	{
337		if (cpu_get_pc(&space->device())==0xc0cfcbc)
	337	if (space->device().safe_pc()==0xc0cfcbc)
338	338	device_spin_until_time(&space->device(), attotime::from_usec(500));
339	339	//device_spin_until_interrupt(&space->device());
340	340	//  else
341		//  printf("%08x\n", cpu_get_pc(&space->device()));
	341	//  printf("%08x\n", space->device().safe_pc());
342	342
343	343	return naomi_ram64[0xa25fb8/8];
344	344	}

trunk/src/mame/machine/kaneko_hit.c

r17788	r17789
194	194	return (machine().rand() & 0xffff);
195	195
196	196	default:
197		logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x\n",cpu_get_pc(&space.device()),offset<<1);
	197	logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x\n",space.device().safe_pc(),offset<<1);
198	198	}
199	199
200	200	return 0;
r17788	r17789
219	219	case 0x12/2: hit.mult_b = data; break;
220	220
221	221	default:
222		logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x\n",cpu_get_pc(&space.device()),offset<<1);
	222	logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x\n",space.device().safe_pc(),offset<<1);
223	223	}
224	224	}
225	225
r17788	r17789
286	286	case 0x32/2: return hit.y2s;
287	287
288	288	default:
289		logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x\n",cpu_get_pc(&space.device()),offset<<1);
	289	logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x\n",space.device().safe_pc(),offset<<1);
290	290	}
291	291
292	292	return 0;
r17788	r17789
314	314	case 0x38/2: break;
315	315
316	316	default:
317		logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x\n",cpu_get_pc(&space.device()),offset<<1);
	317	logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x\n",space.device().safe_pc(),offset<<1);
318	318	}
319	319	}
320	320
r17788	r17789
422	422	hit3.mode=data;break;
423	423
424	424	default:
425		logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x [ %06x] = %06x\n",cpu_get_pc(&space.device()),offset<<1, idx, data);
	425	logerror("CPU #0 PC %06x: warning - write unmapped hit address %06x [ %06x] = %06x\n",space.device().safe_pc(),offset<<1, idx, data);
426	426	}
427	427
428	428	type2_recalc_collisions(hit3);
r17788	r17789
474	474	case 0x88: return hit3.z1toz2;
475	475
476	476	default:
477		logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x [ %06x]\n",cpu_get_pc(&space.device()),offset<<1, idx);
	477	logerror("CPU #0 PC %06x: warning - read unmapped calc address %06x [ %06x]\n",space.device().safe_pc(),offset<<1, idx);
478	478	}
479	479
480	480	return 0;

trunk/src/mame/machine/m68kfmly.c

r17788	r17789
148	148
149	149	READ16_HANDLER( tmp68301_address_decoder_r )
150	150	{
151		LOG(("PC %08X: TMP68301_address_decoder_r (%08X)\n", cpu_get_pc(&space->device()), (0xfffc00 + (offset * 2))));
	151	LOG(("PC %08X: TMP68301_address_decoder_r (%08X)\n", space->device().safe_pc(), (0xfffc00 + (offset * 2))));
152	152
153	153	return tmp68301_address_decoder[offset];
154	154	}
155	155
156	156	WRITE16_HANDLER( tmp68301_address_decoder_w )
157	157	{
158		LOG(("PC %08X: TMP68301_address_decoder_w (%08X = %04X)\n", cpu_get_pc(&space->device()), (0xfffc00 + (offset * 2)), data));
	158	LOG(("PC %08X: TMP68301_address_decoder_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffc00 + (offset * 2)), data));
159	159
160	160	tmp68301_address_decoder[offset] = data;
161	161	}
162	162
163	163	READ16_HANDLER( tmp68301_interrupt_controller_r )
164	164	{
165		LOG(("PC %08X: TMP68301_interrupt_controller_r (%08X)\n", cpu_get_pc(&space->device()), (0xfffc80 + (offset * 2))));
	165	LOG(("PC %08X: TMP68301_interrupt_controller_r (%08X)\n", space->device().safe_pc(), (0xfffc80 + (offset * 2))));
166	166
167	167	return tmp68301_interrupt_controller[offset];
168	168	}
169	169
170	170	WRITE16_HANDLER( tmp68301_interrupt_controller_w )
171	171	{
172		LOG(("PC %08X: TMP68301_interrupt_controller_w (%08X = %04X)\n", cpu_get_pc(&space->device()), (0xfffc80 + (offset * 2)), data));
	172	LOG(("PC %08X: TMP68301_interrupt_controller_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffc80 + (offset * 2)), data));
173	173
174	174	tmp68301_interrupt_controller[offset] = data;
175	175	}
176	176
177	177	READ16_HANDLER( tmp68301_parallel_interface_r )
178	178	{
179		LOG(("PC %08X: TMP68301_parallel_interface_r (%08X)\n", cpu_get_pc(&space->device()), (0xfffd00 + (offset * 2))));
	179	LOG(("PC %08X: TMP68301_parallel_interface_r (%08X)\n", space->device().safe_pc(), (0xfffd00 + (offset * 2))));
180	180
181	181	return tmp68301_parallel_interface[offset];
182	182	}
183	183
184	184	WRITE16_HANDLER( tmp68301_parallel_interface_w )
185	185	{
186		LOG(("PC %08X: TMP68301_parallel_interface_w (%08X = %04X)\n", cpu_get_pc(&space->device()), (0xfffd00 + (offset * 2)), data));
	186	LOG(("PC %08X: TMP68301_parallel_interface_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffd00 + (offset * 2)), data));
187	187
188	188	tmp68301_parallel_interface[offset] = data;
189	189	}
190	190
191	191	READ16_HANDLER( tmp68301_serial_interface_r )
192	192	{
193		LOG(("PC %08X: TMP68301_serial_interface_r (%08X)\n", cpu_get_pc(&space->device()), (0xfffd80 + (offset * 2))));
	193	LOG(("PC %08X: TMP68301_serial_interface_r (%08X)\n", space->device().safe_pc(), (0xfffd80 + (offset * 2))));
194	194
195	195	return tmp68301_serial_interface[offset];
196	196	}
197	197
198	198	WRITE16_HANDLER( tmp68301_serial_interface_w )
199	199	{
200		LOG(("PC %08X: TMP68301_serial_interface_w (%08X = %04X)\n", cpu_get_pc(&space->device()), (0xfffd80 + (offset * 2)), data));
	200	LOG(("PC %08X: TMP68301_serial_interface_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffd80 + (offset * 2)), data));
201	201
202	202	tmp68301_serial_interface[offset] = data;
203	203	}
204	204
205	205	READ16_HANDLER( tmp68301_timer_r )
206	206	{
207		LOG(("PC %08X: TMP68301_timer_r (%08X)\n", cpu_get_pc(&space->device()), (0xfffe00 + (offset * 2))));
	207	LOG(("PC %08X: TMP68301_timer_r (%08X)\n", space->device().safe_pc(), (0xfffe00 + (offset * 2))));
208	208
209	209	return tmp68301_timer[offset];
210	210	}
211	211
212	212	WRITE16_HANDLER( tmp68301_timer_w )
213	213	{
214		LOG(("PC %08X: TMP68301_timer_w (%08X = %04X)\n", cpu_get_pc(&space->device()), (0xfffe00 + (offset * 2)), data));
	214	LOG(("PC %08X: TMP68301_timer_w (%08X = %04X)\n", space->device().safe_pc(), (0xfffe00 + (offset * 2)), data));
215	215
216	216	tmp68301_timer[offset] = data;
217	217	}

trunk/src/mame/machine/twincobr.c

r17788	r17789
46	46	m_main_ram_seg = ((data & 0xe000) << 3);
47	47	m_dsp_addr_w   = ((data & 0x1fff) << 1);
48	48
49		LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",cpu_get_previouspc(&space.device()),data,m_main_ram_seg + m_dsp_addr_w));
	49	LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",space.device().safe_pcbase(),data,m_main_ram_seg + m_dsp_addr_w));
50	50	}
51	51
52	52	READ16_MEMBER(twincobr_state::twincobr_dsp_r)
r17788	r17789
61	61	case 0x50000:   mainspace = machine().device("maincpu")->memory().space(AS_PROGRAM);
62	62	input_data = mainspace->read_word(m_main_ram_seg + m_dsp_addr_w);
63	63	break;
64		default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(&space.device()),m_main_ram_seg + m_dsp_addr_w); break;
	64	default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",space.device().safe_pcbase(),m_main_ram_seg + m_dsp_addr_w); break;
65	65	}
66		LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",cpu_get_previouspc(&space.device()),input_data,m_main_ram_seg + m_dsp_addr_w));
	66	LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",space.device().safe_pcbase(),input_data,m_main_ram_seg + m_dsp_addr_w));
67	67	return input_data;
68	68	}
69	69
r17788	r17789
79	79	case 0x50000:   mainspace = machine().device("maincpu")->memory().space(AS_PROGRAM);
80	80	mainspace->write_word(m_main_ram_seg + m_dsp_addr_w, data);
81	81	break;
82		default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(&space.device()),m_main_ram_seg + m_dsp_addr_w); break;
	82	default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",space.device().safe_pcbase(),m_main_ram_seg + m_dsp_addr_w); break;
83	83	}
84		LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",cpu_get_previouspc(&space.device()),data,m_main_ram_seg + m_dsp_addr_w));
	84	LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",space.device().safe_pcbase(),data,m_main_ram_seg + m_dsp_addr_w));
85	85	}
86	86
87	87	WRITE16_MEMBER(twincobr_state::wardner_dsp_addrsel_w)
r17788	r17789
96	96
97	97	if (m_main_ram_seg == 0x6000) m_main_ram_seg = 0x7000;
98	98
99		LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",cpu_get_previouspc(&space.device()),data,m_main_ram_seg + m_dsp_addr_w));
	99	LOG(("DSP PC:%04x IO write %04x (%08x) at port 0\n",space.device().safe_pcbase(),data,m_main_ram_seg + m_dsp_addr_w));
100	100	}
101	101
102	102	READ16_MEMBER(twincobr_state::wardner_dsp_r)
r17788	r17789
112	112	input_data =  mainspace->read_byte(m_main_ram_seg + (m_dsp_addr_w + 0))
113	113	| (mainspace->read_byte(m_main_ram_seg + (m_dsp_addr_w + 1)) << 8);
114	114	break;
115		default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",cpu_get_previouspc(&space.device()),m_main_ram_seg + m_dsp_addr_w); break;
	115	default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n",space.device().safe_pcbase(),m_main_ram_seg + m_dsp_addr_w); break;
116	116	}
117		LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",cpu_get_previouspc(&space.device()),input_data,m_main_ram_seg + m_dsp_addr_w));
	117	LOG(("DSP PC:%04x IO read %04x at %08x (port 1)\n",space.device().safe_pcbase(),input_data,m_main_ram_seg + m_dsp_addr_w));
118	118	return input_data;
119	119	}
120	120
r17788	r17789
131	131	mainspace->write_byte(m_main_ram_seg + (m_dsp_addr_w + 0), (data & 0xff));
132	132	mainspace->write_byte(m_main_ram_seg + (m_dsp_addr_w + 1), ((data >> 8) & 0xff));
133	133	break;
134		default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",cpu_get_previouspc(&space.device()),m_main_ram_seg + m_dsp_addr_w); break;
	134	default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n",space.device().safe_pcbase(),m_main_ram_seg + m_dsp_addr_w); break;
135	135	}
136		LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",cpu_get_previouspc(&space.device()),data,m_main_ram_seg + m_dsp_addr_w));
	136	LOG(("DSP PC:%04x IO write %04x at %08x (port 1)\n",space.device().safe_pcbase(),data,m_main_ram_seg + m_dsp_addr_w));
137	137	}
138	138
139	139	WRITE16_MEMBER(twincobr_state::twincobr_dsp_bio_w)
r17788	r17789
143	143	/*              Actually only DSP data bit 15 controls this */
144	144	/* data 0x0000  means set DSP BIO line active and disable */
145	145	/*              communication to main processor*/
146		LOG(("DSP PC:%04x IO write %04x at port 3\n",cpu_get_previouspc(&space.device()),data));
	146	LOG(("DSP PC:%04x IO write %04x at port 3\n",space.device().safe_pcbase(),data));
147	147	if (data & 0x8000) {
148	148	m_dsp_BIO = CLEAR_LINE;
149	149	}
r17788	r17789
164	164	/* Port is read three times during startup. First and last data */
165	165	/*   read must equal, but second data read must be different */
166	166	m_fsharkbt_8741 += 1;
167		LOG(("DSP PC:%04x IO read %04x from 8741 MCU (port 2)\n",cpu_get_previouspc(&space.device()),(m_fsharkbt_8741 & 0x08)));
	167	LOG(("DSP PC:%04x IO read %04x from 8741 MCU (port 2)\n",space.device().safe_pcbase(),(m_fsharkbt_8741 & 0x08)));
168	168	return (m_fsharkbt_8741 & 1);
169	169	}
170	170
r17788	r17789
172	172	{
173	173	/* Flying Shark bootleg DSP writes data to an extra MCU (8741) at IO port 2 */
174	174	#if 0
175		logerror("DSP PC:%04x IO write from DSP RAM:%04x to 8741 MCU (port 2)\n",cpu_get_previouspc(&space.device()),m_fsharkbt_8741);
	175	logerror("DSP PC:%04x IO write from DSP RAM:%04x to 8741 MCU (port 2)\n",space.device().safe_pcbase(),m_fsharkbt_8741);
176	176	#endif
177	177	}
178	178

trunk/src/mame/machine/neoboot.c

r17788	r17789
702	702
703	703	static READ16_HANDLER( mslug5_prot_r )
704	704	{
705		logerror("PC %06x: access protected\n",cpu_get_pc(&space->device()));
	705	logerror("PC %06x: access protected\n",space->device().safe_pc());
706	706	return 0xa0;
707	707	}
708	708
709	709	static WRITE16_HANDLER ( ms5plus_bankswitch_w )
710	710	{
711	711	int bankaddress;
712		logerror("offset: %06x PC %06x: set banking %04x\n",offset,cpu_get_pc(&space->device()),data);
	712	logerror("offset: %06x PC %06x: set banking %04x\n",offset,space->device().safe_pc(),data);
713	713	if ((offset == 0)&&(data == 0xa0))
714	714	{
715	715	bankaddress=0xa0;
716	716	neogeo_set_main_cpu_bank_address(space, bankaddress);
717		logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,cpu_get_pc(&space->device()),bankaddress);
	717	logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space->device().safe_pc(),bankaddress);
718	718	}
719	719	else if(offset == 2)
720	720	{
r17788	r17789
722	722	//data=data&7;
723	723	bankaddress=data*0x100000;
724	724	neogeo_set_main_cpu_bank_address(space, bankaddress);
725		logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,cpu_get_pc(&space->device()),bankaddress);
	725	logerror("offset: %06x PC %06x: set banking %04x\n\n",offset,space->device().safe_pc(),bankaddress);
726	726	}
727	727	}
728	728

trunk/src/mame/machine/mega32x.c

r17788	r17789
446	446	printf("Fifo block a isn't filled!\n");
447	447
448	448	if (current_fifo_readblock == fifo_block_b && !fifo_block_b_full)
449		printf("%08x Fifo block b isn't filled!\n",cpu_get_pc(&space.device()));
	449	printf("%08x Fifo block b isn't filled!\n",space.device().safe_pc());
450	450
451	451
452	452	if (current_fifo_read_pos==4)

trunk/src/mame/machine/cdicdic.c

r17788	r17789
40	40	va_start( v, s_fmt );
41	41	vsprintf( buf, s_fmt, v );
42	42	va_end( v );
43		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	43	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
44	44	}
45	45	}
46	46	#else

trunk/src/mame/machine/namcoio.c

r17788	r17789
462	462	namcoio_state *namcoio = get_safe_token(device);
463	463	offset &= 0x3f;
464	464
465		//  LOG(("%04x: I/O read: mode %d, offset %d = %02x\n", cpu_get_pc(&space->device()), offset / 16, namcoio_ram[(offset & 0x30) + 8], offset & 0x0f, namcoio_ram[offset]&0x0f));
	465	//  LOG(("%04x: I/O read: mode %d, offset %d = %02x\n", space->device().safe_pc(), offset / 16, namcoio_ram[(offset & 0x30) + 8], offset & 0x0f, namcoio_ram[offset]&0x0f));
466	466
467	467	return 0xf0 | namcoio->ram[offset];
468	468	}
r17788	r17789
473	473	offset &= 0x3f;
474	474	data &= 0x0f;   // RAM is 4-bit wide
475	475
476		//  LOG(("%04x: I/O write %d: offset %d = %02x\n", cpu_get_pc(&space->device()), offset / 16, offset & 0x0f, data));
	476	//  LOG(("%04x: I/O write %d: offset %d = %02x\n", space->device().safe_pc(), offset / 16, offset & 0x0f, data));
477	477
478	478	namcoio->ram[offset] = data;
479	479	}

trunk/src/mame/machine/midtunit.c

r17788	r17789
82	82	}
83	83	else
84	84	{
85		logerror("%08X:Unexpected CMOS W @ %05X\n", cpu_get_pc(&space.device()), offset);
	85	logerror("%08X:Unexpected CMOS W @ %05X\n", space.device().safe_pc(), offset);
86	86	popmessage("Bad CMOS write");
87	87	}
88	88	}
r17788	r17789
130	130
131	131	READ16_MEMBER(midtunit_state::mk_prot_r)
132	132	{
133		logerror("%08X:Protection R @ %05X = %04X\n", cpu_get_pc(&space.device()), offset, mk_prot_values[mk_prot_index] << 9);
	133	logerror("%08X:Protection R @ %05X = %04X\n", space.device().safe_pc(), offset, mk_prot_values[mk_prot_index] << 9);
134	134
135	135	/* just in case */
136	136	if (mk_prot_index >= sizeof(mk_prot_values))
137	137	{
138		logerror("%08X:Unexpected protection R @ %05X\n", cpu_get_pc(&space.device()), offset);
	138	logerror("%08X:Unexpected protection R @ %05X\n", space.device().safe_pc(), offset);
139	139	mk_prot_index = 0;
140	140	}
141	141
r17788	r17789
160	160	/* just in case */
161	161	if (i == sizeof(mk_prot_values))
162	162	{
163		logerror("%08X:Unhandled protection W @ %05X = %04X\n", cpu_get_pc(&space.device()), offset, data);
	163	logerror("%08X:Unhandled protection W @ %05X = %04X\n", space.device().safe_pc(), offset, data);
164	164	mk_prot_index = 0;
165	165	}
166	166
167		logerror("%08X:Protection W @ %05X = %04X\n", cpu_get_pc(&space.device()), offset, data);
	167	logerror("%08X:Protection W @ %05X = %04X\n", space.device().safe_pc(), offset, data);
168	168	}
169	169	}
170	170
r17788	r17789
332	332
333	333	WRITE16_MEMBER(midtunit_state::jdredd_prot_w)
334	334	{
335		logerror("%08X:jdredd_prot_w(%04X,%04X)\n", cpu_get_previouspc(&space.device()), offset*16, data);
	335	logerror("%08X:jdredd_prot_w(%04X,%04X)\n", space.device().safe_pcbase(), offset*16, data);
336	336
337	337	switch (offset)
338	338	{
r17788	r17789
380	380	if (jdredd_prot_table && jdredd_prot_index < jdredd_prot_max)
381	381	result = jdredd_prot_table[jdredd_prot_index++] << 9;
382	382
383		logerror("%08X:jdredd_prot_r(%04X) = %04X\n", cpu_get_previouspc(&space.device()), offset*16, result);
	383	logerror("%08X:jdredd_prot_r(%04X) = %04X\n", space.device().safe_pcbase(), offset*16, result);
384	384	return result;
385	385	}
386	386
r17788	r17789
389	389	static UINT16 *jdredd_hack;
390	390	READ16_MEMBER(midtunit_state::jdredd_hack_r)
391	391	{
392		if (cpu_get_pc(&space.device()) == 0xFFBA7EB0)
	392	if (space.device().safe_pc() == 0xFFBA7EB0)
393	393	{
394	394	fprintf(stderr, "jdredd_hack_r\n");
395	395	return 0;
r17788	r17789
580	580
581	581	READ16_MEMBER(midtunit_state::midtunit_sound_state_r)
582	582	{
583		/*  logerror("%08X:Sound status read\n", cpu_get_pc(&space.device()));*/
	583	/*  logerror("%08X:Sound status read\n", space.device().safe_pc());*/
584	584
585	585	if (chip_type == SOUND_DCS)
586	586	return dcs_control_r(machine()) >> 4;
r17788	r17789
595	595
596	596	READ16_MEMBER(midtunit_state::midtunit_sound_r)
597	597	{
598		logerror("%08X:Sound data read\n", cpu_get_pc(&space.device()));
	598	logerror("%08X:Sound data read\n", space.device().safe_pc());
599	599
600	600	if (chip_type == SOUND_DCS)
601	601	return dcs_data_r(machine()) & 0xff;
r17788	r17789
608	608	/* check for out-of-bounds accesses */
609	609	if (!offset)
610	610	{
611		logerror("%08X:Unexpected write to sound (lo) = %04X\n", cpu_get_pc(&space.device()), data);
	611	logerror("%08X:Unexpected write to sound (lo) = %04X\n", space.device().safe_pc(), data);
612	612	return;
613	613	}
614	614
r17788	r17789
627	627	break;
628	628
629	629	case SOUND_DCS:
630		logerror("%08X:Sound write = %04X\n", cpu_get_pc(&space.device()), data);
	630	logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data);
631	631	dcs_reset_w(machine(), ~data & 0x100);
632	632	dcs_data_w(machine(), data & 0xff);
633	633	/* the games seem to check for $82 loops, so this should be just barely enough */

trunk/src/mame/machine/namcos1.c

r17788	r17789
88	88
89	89	static READ8_HANDLER( no_key_r )
90	90	{
91		popmessage("CPU %s PC %08x: keychip read %04x\n", space->device().tag(), cpu_get_pc(&space->device()), offset);
	91	popmessage("CPU %s PC %08x: keychip read %04x\n", space->device().tag(), space->device().safe_pc(), offset);
92	92	return 0;
93	93	}
94	94
95	95	static WRITE8_HANDLER( no_key_w )
96	96	{
97		popmessage("CPU %s PC %08x: keychip write %04x=%02x\n", space->device().tag(), cpu_get_pc(&space->device()), offset, data);
	97	popmessage("CPU %s PC %08x: keychip write %04x=%02x\n", space->device().tag(), space->device().safe_pc(), offset, data);
98	98	}
99	99
100	100
r17788	r17789
200	200	static READ8_HANDLER( key_type1_r )
201	201	{
202	202	namcos1_state *state = space->machine().driver_data<namcos1_state>();
203		//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), cpu_get_pc(&space->device()), offset);
	203	//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), space->device().safe_pc(), offset);
204	204
205	205	if (offset < 3)
206	206	{
r17788	r17789
232	232	static WRITE8_HANDLER( key_type1_w )
233	233	{
234	234	namcos1_state *state = space->machine().driver_data<namcos1_state>();
235		//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), cpu_get_pc(&space->device()), offset, data);
	235	//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), space->device().safe_pc(), offset, data);
236	236
237	237	if (offset < 4)
238	238	state->m_key[offset] = data;
r17788	r17789
385	385	static READ8_HANDLER( key_type2_r )
386	386	{
387	387	namcos1_state *state = space->machine().driver_data<namcos1_state>();
388		//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), cpu_get_pc(&space->device()), offset);
	388	//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), space->device().safe_pc(), offset);
389	389
390	390	state->m_key_numerator_high_word = 0;
391	391
r17788	r17789
405	405	static WRITE8_HANDLER( key_type2_w )
406	406	{
407	407	namcos1_state *state = space->machine().driver_data<namcos1_state>();
408		//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), cpu_get_pc(&space->device()), offset, data);
	408	//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), space->device().safe_pc(), offset, data);
409	409
410	410	if (offset < 5)
411	411	{
r17788	r17789
515	515	namcos1_state *state = space->machine().driver_data<namcos1_state>();
516	516	int op;
517	517
518		//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), cpu_get_pc(&space->device()), offset);
	518	//  logerror("CPU %s PC %04x: keychip read %04x\n", space->device().tag(), space->device().safe_pc(), offset);
519	519
520	520	/* I need to handle blastoff's read from 0858. The game previously writes to 0858,
521	521	using it as temporary storage, so maybe it expects to act as RAM, however
r17788	r17789
531	531	if (op == state->m_key_bottom4)   return (offset << 4) | (state->m_key[state->m_key_swap4_arg] & 0x0f);
532	532	if (op == state->m_key_top4)      return (offset << 4) | (state->m_key[state->m_key_swap4_arg] >> 4);
533	533
534		popmessage("CPU %s PC %08x: keychip read %04x", space->device().tag(), cpu_get_pc(&space->device()), offset);
	534	popmessage("CPU %s PC %08x: keychip read %04x", space->device().tag(), space->device().safe_pc(), offset);
535	535
536	536	return 0;
537	537	}
r17788	r17789
539	539	static WRITE8_HANDLER( key_type3_w )
540	540	{
541	541	namcos1_state *state = space->machine().driver_data<namcos1_state>();
542		//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), cpu_get_pc(&space->device()), offset, data);
	542	//  logerror("CPU %s PC %04x: keychip write %04x=%02x\n", space->device().tag(), space->device().safe_pc(), offset, data);
543	543
544	544	state->m_key[(offset & 0x70) >> 4] = data;
545	545	}
r17788	r17789
571	571
572	572	WRITE8_MEMBER(namcos1_state::namcos1_cpu_control_w)
573	573	{
574		//  logerror("reset control pc=%04x %02x\n",cpu_get_pc(&space.device()),data);
	574	//  logerror("reset control pc=%04x %02x\n",space.device().safe_pc(),data);
575	575	if ((data & 1) ^ m_reset)
576	576	{
577	577	m_mcu_patch_data = 0;
r17788	r17789
646	646
647	647	static WRITE8_HANDLER( rom_w )
648	648	{
649		logerror("CPU %s PC %04x: warning - write %02x to rom address %04x\n", space->device().tag(), cpu_get_pc(&space->device()), data, offset);
	649	logerror("CPU %s PC %04x: warning - write %02x to rom address %04x\n", space->device().tag(), space->device().safe_pc(), data, offset);
650	650	}
651	651
652	652	/* error handlers */
653	653	static READ8_HANDLER( unknown_r )
654	654	{
655		logerror("CPU %s PC %04x: warning - read from unknown chip\n", space->device().tag(), cpu_get_pc(&space->device()) );
656		//  popmessage("CPU %s PC %04x: read from unknown chip", space->device().tag(), cpu_get_pc(&space->device()) );
	655	logerror("CPU %s PC %04x: warning - read from unknown chip\n", space->device().tag(), space->device().safe_pc() );
	656	//  popmessage("CPU %s PC %04x: read from unknown chip", space->device().tag(), space->device().safe_pc() );
657	657	return 0;
658	658	}
659	659
660	660	static WRITE8_HANDLER( unknown_w )
661	661	{
662		logerror("CPU %s PC %04x: warning - wrote to unknown chip\n", space->device().tag(), cpu_get_pc(&space->device()) );
663		//  popmessage("CPU %s PC %04x: wrote to unknown chip", space->device().tag(), cpu_get_pc(&space->device()) );
	662	logerror("CPU %s PC %04x: warning - wrote to unknown chip\n", space->device().tag(), space->device().safe_pc() );
	663	//  popmessage("CPU %s PC %04x: wrote to unknown chip", space->device().tag(), space->device().safe_pc() );
664	664	}
665	665
666	666	/* Main bankswitching routine */
r17788	r17789
939	939
940	940	WRITE8_MEMBER(namcos1_state::namcos1_mcu_patch_w)
941	941	{
942		//logerror("mcu C000 write pc=%04x data=%02x\n",cpu_get_pc(&space.device()),data);
	942	//logerror("mcu C000 write pc=%04x data=%02x\n",space.device().safe_pc(),data);
943	943	if (m_mcu_patch_data == 0xa6) return;
944	944	m_mcu_patch_data = data;
945	945	m_triram[0] = data;

trunk/src/mame/machine/pgmprot1.c

r17788	r17789
121	121	UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
122	122
123	123	if (PGMARM7LOGERROR)
124		logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, cpu_get_pc(&space->device()));
	124	logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, space->device().safe_pc());
125	125	return share16[BYTE_XOR_LE(offset << 1)];
126	126	}
127	127
r17788	r17789
131	131	UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
132	132
133	133	if (PGMARM7LOGERROR)
134		logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, cpu_get_pc(&space->device()));
	134	logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, space->device().safe_pc());
135	135	COMBINE_DATA(&share16[BYTE_XOR_LE(offset << 1)]);
136	136	}
137	137
r17788	r17789
154	154	pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
155	155
156	156	if (PGMARM7LOGERROR)
157		logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, cpu_get_pc(&space->device()));
	157	logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, space->device().safe_pc());
158	158	return state->m_arm7_shareram[offset];
159	159	}
160	160
r17788	r17789
163	163	pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
164	164
165	165	if (PGMARM7LOGERROR)
166		logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, cpu_get_pc(&space->device()));
	166	logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, space->device().safe_pc());
167	167	COMBINE_DATA(&state->m_arm7_shareram[offset]);
168	168	}
169	169
r17788	r17789
562	562	break;
563	563
564	564	case 0x67: // set high bits
565		//      printf("%06x command %02x | %04x\n", cpu_get_pc(&space->device()), state->m_ddp3lastcommand, state->m_value0);
	565	//      printf("%06x command %02x | %04x\n", space->device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
566	566	state->m_valueresponse = 0x880000;
567	567	state->m_curslots = (state->m_value0 & 0xff00)>>8;
568	568	state->m_slots[state->m_curslots] = (state->m_value0 & 0x00ff) << 16;
569	569	break;
570	570
571	571	case 0xe5: // set low bits for operation?
572		//  printf("%06x command %02x | %04x\n", cpu_get_pc(&space->device()), state->m_ddp3lastcommand, state->m_value0);
	572	//  printf("%06x command %02x | %04x\n", space->device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
573	573	state->m_valueresponse = 0x880000;
574	574	state->m_slots[state->m_curslots] |= (state->m_value0 & 0xffff);
575	575	break;
576	576
577	577
578	578	case 0x8e: // read back result of operations
579		//      printf("%06x command %02x | %04x\n", cpu_get_pc(&space->device()), state->m_ddp3lastcommand, state->m_value0);
	579	//      printf("%06x command %02x | %04x\n", space->device().safe_pc(), state->m_ddp3lastcommand, state->m_value0);
580	580	state->m_valueresponse = state->m_slots[state->m_value0&0xff];
581	581	break;
582	582
r17788	r17789
1351	1351	static WRITE16_HANDLER( pgm_arm7_type1_sim_w )
1352	1352	{
1353	1353	pgm_arm_type1_state *state = space->machine().driver_data<pgm_arm_type1_state>();
1354		int pc = cpu_get_pc(&space->device());
	1354	int pc = space->device().safe_pc();
1355	1355
1356	1356	if (offset == 0)
1357	1357	{

trunk/src/mame/machine/volfied.c

r17788	r17789
344	344	m_cchip_ram[(m_current_bank * 0x400) + offset] = data;
345	345
346	346	//  if (offset != 0x8)
347		//      logerror("%08x:  volfied c write %04x %04x\n", cpu_get_pc(&space.device()), offset, data);
	347	//      logerror("%08x:  volfied c write %04x %04x\n", space.device().safe_pc(), offset, data);
348	348
349	349	if (m_current_bank == 0)
350	350	{
r17788	r17789
444	444	}
445	445	}
446	446
447		//  if (cpu_get_pc(&space.device())!=0x15ca8 && cpu_get_pc(&space.device())!=0x15cd8 && cpu_get_pc(&space.device())!=0x15cde)
448		//      logerror("%08x:  volfied c read %04x (bank %04x)\n", cpu_get_pc(&space.device()), offset, current_bank);
	447	//  if (space.device().safe_pc()!=0x15ca8 && space.device().safe_pc()!=0x15cd8 && space.device().safe_pc()!=0x15cde)
	448	//      logerror("%08x:  volfied c read %04x (bank %04x)\n", space.device().safe_pc(), offset, current_bank);
449	449
450	450	/* Unknown */
451	451	if (m_current_bank == 2 && offset == 0x005)

trunk/src/mame/machine/balsente.c

r17788	r17789
1047	1047	"PULSE_WIDTH",
1048	1048	"WAVE_SELECT"
1049	1049	};
1050		logerror("s%04X:   CEM#%d:%s=%f\n", cpu_get_previouspc(&space.device()), i, names[m_dac_register], voltage);
	1050	logerror("s%04X:   CEM#%d:%s=%f\n", space.device().safe_pcbase(), i, names[m_dac_register], voltage);
1051	1051	}
1052	1052	#endif
1053	1053	}
r17788	r17789
1177	1177
1178	1178	READ8_MEMBER(balsente_state::grudge_steering_r)
1179	1179	{
1180		logerror("%04X:grudge_steering_r(@%d)\n", cpu_get_pc(&space.device()), machine().primary_screen->vpos());
	1180	logerror("%04X:grudge_steering_r(@%d)\n", space.device().safe_pc(), machine().primary_screen->vpos());
1181	1181	m_grudge_steering_result |= 0x80;
1182	1182	return m_grudge_steering_result;
1183	1183	}

trunk/src/mame/machine/megadriv.c

r17788	r17789
86	86
87	87	static WRITE16_HANDLER( megadriv_68k_z80_bank_write )
88	88	{
89		//logerror("%06x: 68k writing bit to bank register %01x\n", cpu_get_pc(&space->device()),data&0x01);
	89	//logerror("%06x: 68k writing bit to bank register %01x\n", space->device().safe_pc(),data&0x01);
90	90	megadriv_z80_bank_w(data&0x01);
91	91	}
92	92
93	93	static WRITE8_HANDLER(megadriv_z80_z80_bank_w)
94	94	{
95		//logerror("%04x: z80 writing bit to bank register %01x\n", cpu_get_pc(&space->device()),data&0x01);
	95	//logerror("%04x: z80 writing bit to bank register %01x\n", space->device().safe_pc(),data&0x01);
96	96	megadriv_z80_bank_w(data&0x01);
97	97	}
98	98
r17788	r17789
419	419	switch (offset)
420	420	{
421	421	case 0:
422		logerror("%06x read version register\n", cpu_get_pc(&space->device()));
	422	logerror("%06x read version register\n", space->device().safe_pc());
423	423	retdata = megadrive_region_export<<7 | // Export
424	424	megadrive_region_pal<<6 | // NTSC
425	425	(sega_cd_connected?0x00:0x20) | // 0x20 = no sega cd
r17788	r17789
603	603	}
604	604	else
605	605	{
606		logerror("%06x: 68000 attempting to access Z80 (read) address space without bus\n", cpu_get_pc(&space->device()));
	606	logerror("%06x: 68000 attempting to access Z80 (read) address space without bus\n", space->device().safe_pc());
607	607	return space->machine().rand();
608	608	}
609	609	}
r17788	r17789
630	630	}
631	631	else
632	632	{
633		logerror("%06x: 68000 attempting to access Z80 (write) address space without bus\n", cpu_get_pc(&space->device()));
	633	logerror("%06x: 68000 attempting to access Z80 (write) address space without bus\n", space->device().safe_pc());
634	634	}
635	635	}
636	636
r17788	r17789
655	655	if (genz80.z80_has_bus || genz80.z80_is_reset) retvalue = nextvalue | 0x0100;
656	656	else retvalue = (nextvalue & 0xfeff);
657	657
658		//logerror("%06x: 68000 check z80 Bus (byte MSB access) returning %04x mask %04x\n", cpu_get_pc(&space->device()),retvalue, mem_mask);
	658	//logerror("%06x: 68000 check z80 Bus (byte MSB access) returning %04x mask %04x\n", space->device().safe_pc(),retvalue, mem_mask);
659	659	return retvalue;
660	660
661	661	}
662	662	else if (!ACCESSING_BITS_8_15) // is this valid?
663	663	{
664		//logerror("%06x: 68000 check z80 Bus (byte LSB access) %04x\n", cpu_get_pc(&space->device()),mem_mask);
	664	//logerror("%06x: 68000 check z80 Bus (byte LSB access) %04x\n", space->device().safe_pc(),mem_mask);
665	665	if (genz80.z80_has_bus || genz80.z80_is_reset) retvalue = 0x0001;
666	666	else retvalue = 0x0000;
667	667
r17788	r17789
669	669	}
670	670	else
671	671	{
672		//logerror("%06x: 68000 check z80 Bus (word access) %04x\n", cpu_get_pc(&space->device()),mem_mask);
	672	//logerror("%06x: 68000 check z80 Bus (word access) %04x\n", space->device().safe_pc(),mem_mask);
673	673	if (genz80.z80_has_bus || genz80.z80_is_reset) retvalue = nextvalue | 0x0100;
674	674	else retvalue = (nextvalue & 0xfeff);
675	675
676		//  mame_printf_debug("%06x: 68000 check z80 Bus (word access) %04x %04x\n", cpu_get_pc(&space->device()),mem_mask, retvalue);
	676	//  mame_printf_debug("%06x: 68000 check z80 Bus (word access) %04x %04x\n", space->device().safe_pc(),mem_mask, retvalue);
677	677	return retvalue;
678	678	}
679	679	}
r17788	r17789
710	710	{
711	711	if (data & 0x0100)
712	712	{
713		//logerror("%06x: 68000 request z80 Bus (byte MSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	713	//logerror("%06x: 68000 request z80 Bus (byte MSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
714	714	genz80.z80_has_bus = 0;
715	715	}
716	716	else
717	717	{
718		//logerror("%06x: 68000 return z80 Bus (byte MSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	718	//logerror("%06x: 68000 return z80 Bus (byte MSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
719	719	genz80.z80_has_bus = 1;
720	720	}
721	721	}
r17788	r17789
723	723	{
724	724	if (data & 0x0001)
725	725	{
726		//logerror("%06x: 68000 request z80 Bus (byte LSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	726	//logerror("%06x: 68000 request z80 Bus (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
727	727	genz80.z80_has_bus = 0;
728	728	}
729	729	else
730	730	{
731		//logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	731	//logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
732	732	genz80.z80_has_bus = 1;
733	733	}
734	734	}
r17788	r17789
736	736	{
737	737	if (data & 0x0100)
738	738	{
739		//logerror("%06x: 68000 request z80 Bus (word access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	739	//logerror("%06x: 68000 request z80 Bus (word access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
740	740	genz80.z80_has_bus = 0;
741	741	}
742	742	else
743	743	{
744		//logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	744	//logerror("%06x: 68000 return z80 Bus (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
745	745	genz80.z80_has_bus = 1;
746	746	}
747	747	}
r17788	r17789
757	757	{
758	758	if (data & 0x0100)
759	759	{
760		//logerror("%06x: 68000 clear z80 reset (byte MSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	760	//logerror("%06x: 68000 clear z80 reset (byte MSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
761	761	genz80.z80_is_reset = 0;
762	762	}
763	763	else
764	764	{
765		//logerror("%06x: 68000 start z80 reset (byte MSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	765	//logerror("%06x: 68000 start z80 reset (byte MSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
766	766	genz80.z80_is_reset = 1;
767	767	}
768	768	}
r17788	r17789
770	770	{
771	771	if (data & 0x0001)
772	772	{
773		//logerror("%06x: 68000 clear z80 reset (byte LSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	773	//logerror("%06x: 68000 clear z80 reset (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
774	774	genz80.z80_is_reset = 0;
775	775	}
776	776	else
777	777	{
778		//logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	778	//logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
779	779	genz80.z80_is_reset = 1;
780	780	}
781	781	}
r17788	r17789
783	783	{
784	784	if (data & 0x0100)
785	785	{
786		//logerror("%06x: 68000 clear z80 reset (word access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	786	//logerror("%06x: 68000 clear z80 reset (word access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
787	787	genz80.z80_is_reset = 0;
788	788	}
789	789	else
790	790	{
791		//logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", cpu_get_pc(&space->device()),data,mem_mask);
	791	//logerror("%06x: 68000 start z80 reset (byte LSB access) %04x %04x\n", space->device().safe_pc(),data,mem_mask);
792	792	genz80.z80_is_reset = 1;
793	793	}
794	794	}

trunk/src/mame/machine/mexico86.c

r17788	r17789
227	227	READ8_MEMBER(mexico86_state::mexico86_68705_port_a_r)
228	228	{
229	229
230		//logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(&space.device()), m_port_a_in);
	230	//logerror("%04x: 68705 port A read %02x\n", space.device().safe_pc(), m_port_a_in);
231	231	return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
232	232	}
233	233
234	234	WRITE8_MEMBER(mexico86_state::mexico86_68705_port_a_w)
235	235	{
236	236
237		//logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(&space.device()), data);
	237	//logerror("%04x: 68705 port A write %02x\n", space.device().safe_pc(), data);
238	238	m_port_a_out = data;
239	239	}
240	240
r17788	r17789
268	268
269	269	WRITE8_MEMBER(mexico86_state::mexico86_68705_port_b_w)
270	270	{
271		//logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(&space.device()), data);
	271	//logerror("%04x: 68705 port B write %02x\n", space.device().safe_pc(), data);
272	272
273	273	if (BIT(m_ddr_b, 0) && BIT(~data, 0) && BIT(m_port_b_out, 0))
274	274	{
r17788	r17789
278	278	if (BIT(m_ddr_b, 1) && BIT(data, 1) && BIT(~m_port_b_out, 1)) /* positive edge trigger */
279	279	{
280	280	m_address = m_port_a_out;
281		//if (m_address >= 0x80) logerror("%04x: 68705 address %02x\n", cpu_get_pc(&space.device()), m_port_a_out);
	281	//if (m_address >= 0x80) logerror("%04x: 68705 address %02x\n", space.device().safe_pc(), m_port_a_out);
282	282	}
283	283
284	284	if (BIT(m_ddr_b, 3) && BIT(~data, 3) && BIT(m_port_b_out, 3))
r17788	r17789
287	287	{
288	288	if (data & 0x04)
289	289	{
290		//logerror("%04x: 68705 read %02x from address %04x\n", cpu_get_pc(&space.device()), m_protection_ram[m_address], m_address);
	290	//logerror("%04x: 68705 read %02x from address %04x\n", space.device().safe_pc(), m_protection_ram[m_address], m_address);
291	291	m_latch = m_protection_ram[m_address];
292	292	}
293	293	else
294	294	{
295		//logerror("%04x: 68705 read input port %04x\n", cpu_get_pc(&space.device()), m_address);
	295	//logerror("%04x: 68705 read input port %04x\n", space.device().safe_pc(), m_address);
296	296	m_latch = ioport((m_address & 1) ? "IN2" : "IN1")->read();
297	297	}
298	298	}
299	299	else    /* write */
300	300	{
301		//logerror("%04x: 68705 write %02x to address %04x\n",cpu_get_pc(&space.device()), port_a_out, m_address);
	301	//logerror("%04x: 68705 write %02x to address %04x\n",space.device().safe_pc(), port_a_out, m_address);
302	302	m_protection_ram[m_address] = m_port_a_out;
303	303	}
304	304	}
r17788	r17789
312	312
313	313	if (BIT(m_ddr_b, 6) && BIT(~data, 6) && BIT(m_port_b_out, 6))
314	314	{
315		logerror("%04x: 68705 unknown port B bit %02x\n", cpu_get_pc(&space.device()), data);
	315	logerror("%04x: 68705 unknown port B bit %02x\n", space.device().safe_pc(), data);
316	316	}
317	317
318	318	if (BIT(m_ddr_b, 7) && BIT(~data, 7) && BIT(m_port_b_out, 7))
319	319	{
320		logerror("%04x: 68705 unknown port B bit %02x\n", cpu_get_pc(&space.device()), data);
	320	logerror("%04x: 68705 unknown port B bit %02x\n", space.device().safe_pc(), data);
321	321	}
322	322
323	323	m_port_b_out = data;

trunk/src/mame/machine/chaknpop.c

r17788	r17789
67	67
68	68	READ8_MEMBER(chaknpop_state::chaknpop_mcu_port_a_r)
69	69	{
70		//logerror("%04x: MCU port_a read\n", cpu_get_pc(&space.device()));
	70	//logerror("%04x: MCU port_a read\n", space.device().safe_pc());
71	71	return m_mcu_result;
72	72	}
73	73
74	74
75	75	READ8_MEMBER(chaknpop_state::chaknpop_mcu_port_b_r)
76	76	{
77		//logerror("%04x: MCU port_b read\n", cpu_get_pc(&space.device()));
	77	//logerror("%04x: MCU port_b read\n", space.device().safe_pc());
78	78
79	79	return 0xff;
80	80	}
81	81
82	82	READ8_MEMBER(chaknpop_state::chaknpop_mcu_port_c_r)
83	83	{
84		//logerror("%04x: MCU port_c read\n", cpu_get_pc(&space.device()));
	84	//logerror("%04x: MCU port_c read\n", space.device().safe_pc());
85	85	return 0x00;
86	86	}
87	87
r17788	r17789
101	101
102	102	mcu_update_seed(machine(), m_mcu_result);
103	103
104		logerror("%04x: MCU command 0x%02x, result 0x%02x\n", cpu_get_pc(&space.device()), mcu_command, m_mcu_result);
	104	logerror("%04x: MCU command 0x%02x, result 0x%02x\n", space.device().safe_pc(), mcu_command, m_mcu_result);
105	105	}
106	106	else if (mcu_command >= 0x28 && mcu_command <= 0x2a)
107	107	{
r17788	r17789
112	112
113	113	mcu_update_seed(machine(), m_mcu_result);
114	114
115		logerror("%04x: MCU command 0x%02x, result 0x%02x\n", cpu_get_pc(&space.device()), mcu_command, m_mcu_result);
	115	logerror("%04x: MCU command 0x%02x, result 0x%02x\n", space.device().safe_pc(), mcu_command, m_mcu_result);
116	116	}
117	117	else if (mcu_command < 0x80)
118	118	{
r17788	r17789
122	122	{
123	123	m_mcu_select = mcu_command - 0x40;
124	124
125		logerror("%04x: MCU select 0x%02x\n", cpu_get_pc(&space.device()), m_mcu_select);
	125	logerror("%04x: MCU select 0x%02x\n", space.device().safe_pc(), m_mcu_select);
126	126	}
127	127	}
128	128	else if (mcu_command == 0x9c|| mcu_command == 0xde)
129	129	{
130	130	mcu_update_seed(machine(), data);
131	131
132		logerror("%04x: MCU command 0x%02x\n", cpu_get_pc(&space.device()), mcu_command);
	132	logerror("%04x: MCU command 0x%02x\n", space.device().safe_pc(), mcu_command);
133	133	}
134	134	}
135	135
136	136	WRITE8_MEMBER(chaknpop_state::chaknpop_mcu_port_b_w)
137	137	{
138		//logerror("%04x: MCU port_b write 0x%02x\n", cpu_get_pc(&space.device()), data);
	138	//logerror("%04x: MCU port_b write 0x%02x\n", space.device().safe_pc(), data);
139	139	}
140	140
141	141	WRITE8_MEMBER(chaknpop_state::chaknpop_mcu_port_c_w)
142	142	{
143		//logerror("%04x: MCU port_c write 0x%02x\n", cpu_get_pc(&space.device()), data);
	143	//logerror("%04x: MCU port_c write 0x%02x\n", space.device().safe_pc(), data);
144	144	}
145	145

trunk/src/mame/machine/taitosj.c

r17788	r17789
79	79	***************************************************************************/
80	80	READ8_MEMBER(taitosj_state::taitosj_fake_data_r)
81	81	{
82		LOG(("%04x: protection read\n",cpu_get_pc(&space.device())));
	82	LOG(("%04x: protection read\n",space.device().safe_pc()));
83	83	return 0;
84	84	}
85	85
86	86	WRITE8_MEMBER(taitosj_state::taitosj_fake_data_w)
87	87	{
88		LOG(("%04x: protection write %02x\n",cpu_get_pc(&space.device()),data));
	88	LOG(("%04x: protection write %02x\n",space.device().safe_pc(),data));
89	89	}
90	90
91	91	READ8_MEMBER(taitosj_state::taitosj_fake_status_r)
92	92	{
93		LOG(("%04x: protection status read\n",cpu_get_pc(&space.device())));
	93	LOG(("%04x: protection status read\n",space.device().safe_pc()));
94	94	return 0xff;
95	95	}
96	96
r17788	r17789
98	98	/* timer callback : */
99	99	READ8_MEMBER(taitosj_state::taitosj_mcu_data_r)
100	100	{
101		LOG(("%04x: protection read %02x\n",cpu_get_pc(&space.device()),m_toz80));
	101	LOG(("%04x: protection read %02x\n",space.device().safe_pc(),m_toz80));
102	102	m_zaccept = 1;
103	103	return m_toz80;
104	104	}
r17788	r17789
114	114
115	115	WRITE8_MEMBER(taitosj_state::taitosj_mcu_data_w)
116	116	{
117		LOG(("%04x: protection write %02x\n",cpu_get_pc(&space.device()),data));
	117	LOG(("%04x: protection write %02x\n",space.device().safe_pc(),data));
118	118	machine().scheduler().synchronize(FUNC(taitosj_mcu_real_data_w), data);
119	119	/* temporarily boost the interleave to sync things up */
120	120	machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(10));
r17788	r17789
132	132
133	133	READ8_MEMBER(taitosj_state::taitosj_68705_portA_r)
134	134	{
135		LOG(("%04x: 68705 port A read %02x\n",cpu_get_pc(&space.device()),m_portA_in));
	135	LOG(("%04x: 68705 port A read %02x\n",space.device().safe_pc(),m_portA_in));
136	136	return m_portA_in;
137	137	}
138	138
139	139	WRITE8_MEMBER(taitosj_state::taitosj_68705_portA_w)
140	140	{
141		LOG(("%04x: 68705 port A write %02x\n",cpu_get_pc(&space.device()),data));
	141	LOG(("%04x: 68705 port A write %02x\n",space.device().safe_pc(),data));
142	142	m_portA_out = data;
143	143	}
144	144
r17788	r17789
186	186
187	187	WRITE8_MEMBER(taitosj_state::taitosj_68705_portB_w)
188	188	{
189		LOG(("%04x: 68705 port B write %02x\n", cpu_get_pc(&space.device()), data));
	189	LOG(("%04x: 68705 port B write %02x\n", space.device().safe_pc(), data));
190	190
191	191	if (~data & 0x01)
192	192	{
193		LOG(("%04x: 68705  68INTRQ **NOT SUPPORTED**!\n", cpu_get_pc(&space.device())));
	193	LOG(("%04x: 68705  68INTRQ **NOT SUPPORTED**!\n", space.device().safe_pc()));
194	194	}
195	195	if (~data & 0x02)
196	196	{
r17788	r17789
198	198	machine().scheduler().synchronize(FUNC(taitosj_mcu_data_real_r));
199	199	cputag_set_input_line(machine(), "mcu", 0, CLEAR_LINE);
200	200	m_portA_in = m_fromz80;
201		LOG(("%04x: 68705 <- Z80 %02x\n", cpu_get_pc(&space.device()), m_portA_in));
	201	LOG(("%04x: 68705 <- Z80 %02x\n", space.device().safe_pc(), m_portA_in));
202	202	}
203	203	if (~data & 0x08)
204	204	m_busreq = 1;
r17788	r17789
206	206	m_busreq = 0;
207	207	if (~data & 0x04)
208	208	{
209		LOG(("%04x: 68705 -> Z80 %02x\n", cpu_get_pc(&space.device()), m_portA_out));
	209	LOG(("%04x: 68705 -> Z80 %02x\n", space.device().safe_pc(), m_portA_out));
210	210
211	211	/* 68705 is writing data for the Z80 */
212	212	machine().scheduler().synchronize(FUNC(taitosj_mcu_status_real_w), m_portA_out);
r17788	r17789
214	214	if (~data & 0x10)
215	215	{
216	216	address_space *cpu0space = machine().device("maincpu")->memory().space(AS_PROGRAM);
217		LOG(("%04x: 68705 write %02x to address %04x\n",cpu_get_pc(&space.device()), m_portA_out, m_address));
	217	LOG(("%04x: 68705 write %02x to address %04x\n",space.device().safe_pc(), m_portA_out, m_address));
218	218
219	219	cpu0space->write_byte(m_address, m_portA_out);
220	220
r17788	r17789
225	225	{
226	226	address_space *cpu0space = machine().device("maincpu")->memory().space(AS_PROGRAM);
227	227	m_portA_in = cpu0space->read_byte(m_address);
228		LOG(("%04x: 68705 read %02x from address %04x\n", cpu_get_pc(&space.device()), m_portA_in, m_address));
	228	LOG(("%04x: 68705 read %02x from address %04x\n", space.device().safe_pc(), m_portA_in, m_address));
229	229	}
230	230	if (~data & 0x40)
231	231	{
232		LOG(("%04x: 68705 address low %02x\n", cpu_get_pc(&space.device()), m_portA_out));
	232	LOG(("%04x: 68705 address low %02x\n", space.device().safe_pc(), m_portA_out));
233	233	m_address = (m_address & 0xff00) | m_portA_out;
234	234	}
235	235	if (~data & 0x80)
236	236	{
237		LOG(("%04x: 68705 address high %02x\n", cpu_get_pc(&space.device()), m_portA_out));
	237	LOG(("%04x: 68705 address high %02x\n", space.device().safe_pc(), m_portA_out));
238	238	m_address = (m_address & 0x00ff) | (m_portA_out << 8);
239	239	}
240	240	}
r17788	r17789
254	254	int res;
255	255
256	256	res = (m_zready << 0) | (m_zaccept << 1) | ((m_busreq^1) << 2);
257		LOG(("%04x: 68705 port C read %02x\n",cpu_get_pc(&space.device()),res));
	257	LOG(("%04x: 68705 port C read %02x\n",space.device().safe_pc(),res));
258	258	return res;
259	259	}
260	260
r17788	r17789
263	263
264	264	READ8_MEMBER(taitosj_state::spacecr_prot_r)
265	265	{
266		int pc = cpu_get_pc(&space.device());
	266	int pc = space.device().safe_pc();
267	267
268	268	if( pc != 0x368A && pc != 0x36A6 )
269	269	logerror("Read protection from an unknown location: %04X\n",pc);

trunk/src/mame/machine/amiga.c

r17788	r17789
263	263	amiga_state *state = device->machine().driver_data<amiga_state>();
264	264	address_space *space = device->memory().space(AS_PROGRAM);
265	265
266		logerror("Executed RESET at PC=%06x\n", cpu_get_pc(&space->device()));
	266	logerror("Executed RESET at PC=%06x\n", space->device().safe_pc());
267	267
268	268	/* Initialize the various chips */
269	269	devtag_reset(device->machine(), "cia_0");
r17788	r17789
1043	1043	data = mos6526_r(cia, offset >> 7);
1044	1044
1045	1045	if (LOG_CIA)
1046		logerror("%06x:cia_%c_read(%03x) = %04x & %04x\n", cpu_get_pc(&space->device()), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data << shift, mem_mask);
	1046	logerror("%06x:cia_%c_read(%03x) = %04x & %04x\n", space->device().safe_pc(), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data << shift, mem_mask);
1047	1047
1048	1048	return data << shift;
1049	1049	}
r17788	r17789
1061	1061	device_t *cia;
1062	1062
1063	1063	if (LOG_CIA)
1064		logerror("%06x:cia_%c_write(%03x) = %04x & %04x\n", cpu_get_pc(&space->device()), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data, mem_mask);
	1064	logerror("%06x:cia_%c_write(%03x) = %04x & %04x\n", space->device().safe_pc(), 'A' + ((~offset & 0x0800) >> 11), offset * 2, data, mem_mask);
1065	1065
1066	1066	/* offsets 0000-07ff reference CIA B, and are accessed via the MSB */
1067	1067	if ((offset & 0x0800) == 0)
r17788	r17789
1229	1229	}
1230	1230
1231	1231	if (LOG_CUSTOM)
1232		logerror("%06X:read from custom %s\n", cpu_get_pc(&space->device()), amiga_custom_names[offset & 0xff]);
	1232	logerror("%06X:read from custom %s\n", space->device().safe_pc(), amiga_custom_names[offset & 0xff]);
1233	1233
1234	1234	return 0xffff;
1235	1235	}
r17788	r17789
1263	1263	offset &= 0xff;
1264	1264
1265	1265	if (LOG_CUSTOM)
1266		logerror("%06X:write to custom %s = %04X\n", cpu_get_pc(&space->device()), amiga_custom_names[offset & 0xff], data);
	1266	logerror("%06X:write to custom %s = %04X\n", space->device().safe_pc(), amiga_custom_names[offset & 0xff], data);
1267	1267
1268	1268	switch (offset)
1269	1269	{

trunk/src/mame/machine/lkage.c

r17788	r17789
23	23	READ8_MEMBER(lkage_state::lkage_68705_port_a_r)
24	24	{
25	25
26		//logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(&space.device()), m_port_a_in);
	26	//logerror("%04x: 68705 port A read %02x\n", space.device().safe_pc(), m_port_a_in);
27	27	return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
28	28	}
29	29
30	30	WRITE8_MEMBER(lkage_state::lkage_68705_port_a_w)
31	31	{
32	32
33		//logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(&space.device()), data);
	33	//logerror("%04x: 68705 port A write %02x\n", space.device().safe_pc(), data);
34	34	m_port_a_out = data;
35	35	}
36	36
r17788	r17789
58	58	WRITE8_MEMBER(lkage_state::lkage_68705_port_b_w)
59	59	{
60	60
61		//logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(&space.device()), data);
	61	//logerror("%04x: 68705 port B write %02x\n", space.device().safe_pc(), data);
62	62
63	63	if ((m_ddr_b & 0x02) && (~data & 0x02) && (m_port_b_out & 0x02))
64	64	{
r17788	r17789
96	96	if (!m_mcu_sent)
97	97	m_port_c_in |= 0x02;
98	98
99		//logerror("%04x: 68705 port C read %02x\n", cpu_get_pc(&space.device()), m_port_c_in);
	99	//logerror("%04x: 68705 port C read %02x\n", space.device().safe_pc(), m_port_c_in);
100	100	return (m_port_c_out & m_ddr_c) | (m_port_c_in & ~m_ddr_c);
101	101	}
102	102
103	103	WRITE8_MEMBER(lkage_state::lkage_68705_port_c_w)
104	104	{
105	105
106		logerror("%04x: 68705 port C write %02x\n", cpu_get_pc(&space.device()), data);
	106	logerror("%04x: 68705 port C write %02x\n", space.device().safe_pc(), data);
107	107	m_port_c_out = data;
108	108	}
109	109
r17788	r17789
116	116	WRITE8_MEMBER(lkage_state::lkage_mcu_w)
117	117	{
118	118
119		logerror("%04x: mcu_w %02x\n", cpu_get_pc(&space.device()), data);
	119	logerror("%04x: mcu_w %02x\n", space.device().safe_pc(), data);
120	120	m_from_main = data;
121	121	m_main_sent = 1;
122	122	device_set_input_line(m_mcu, 0, ASSERT_LINE);
r17788	r17789
125	125	READ8_MEMBER(lkage_state::lkage_mcu_r)
126	126	{
127	127
128		logerror("%04x: mcu_r %02x\n", cpu_get_pc(&space.device()), m_from_mcu);
	128	logerror("%04x: mcu_r %02x\n", space.device().safe_pc(), m_from_mcu);
129	129	m_mcu_sent = 0;
130	130	return m_from_mcu;
131	131	}
r17788	r17789
136	136
137	137	/* bit 0 = when 1, mcu is ready to receive data from main cpu */
138	138	/* bit 1 = when 1, mcu has sent data to the main cpu */
139		//logerror("%04x: mcu_status_r\n", cpu_get_pc(&space.device()));
	139	//logerror("%04x: mcu_status_r\n", space.device().safe_pc());
140	140	if (!m_main_sent)
141	141	res |= 0x01;
142	142	if (m_mcu_sent)

trunk/src/mame/machine/neoprot.c

r17788	r17789
42	42	return ((res & 0xf0) >> 4) | ((res & 0x0f) << 4);
43	43
44	44	default:
45		logerror("unknown protection read at pc %06x, offset %08x\n", cpu_get_pc(&space->device()), offset << 1);
	45	logerror("unknown protection read at pc %06x, offset %08x\n", space->device().safe_pc(), offset << 1);
46	46	return 0;
47	47	}
48	48	}
r17788	r17789
89	89	break;
90	90
91	91	default:
92		logerror("unknown protection write at pc %06x, offset %08x, data %02x\n", cpu_get_pc(&space->device()), offset, data);
	92	logerror("unknown protection write at pc %06x, offset %08x, data %02x\n", space->device().safe_pc(), offset, data);
93	93	break;
94	94	}
95	95	}
r17788	r17789
124	124	switch (data)
125	125	{
126	126	case 0x0090:
127		logerror ("%06x kof98 - protection 0x0090 old %04x %04x\n", cpu_get_pc(&space->device()), mem16[0x100/2], mem16[0x102/2]);
	127	logerror ("%06x kof98 - protection 0x0090 old %04x %04x\n", space->device().safe_pc(), mem16[0x100/2], mem16[0x102/2]);
128	128	mem16[0x100/2] = 0x00c2;
129	129	mem16[0x102/2] = 0x00fd;
130	130	break;
131	131
132	132	case 0x00f0:
133		logerror ("%06x kof98 - protection 0x00f0 old %04x %04x\n", cpu_get_pc(&space->device()), mem16[0x100/2], mem16[0x102/2]);
	133	logerror ("%06x kof98 - protection 0x00f0 old %04x %04x\n", space->device().safe_pc(), mem16[0x100/2], mem16[0x102/2]);
134	134	mem16[0x100/2] = 0x4e45;
135	135	mem16[0x102/2] = 0x4f2d;
136	136	break;
137	137
138	138	default: // 00aa is written, but not needed?
139		logerror ("%06x kof98 - unknown protection write %04x\n", cpu_get_pc(&space->device()), data);
	139	logerror ("%06x kof98 - unknown protection write %04x\n", space->device().safe_pc(), data);
140	140	break;
141	141	}
142	142	}

trunk/src/mame/machine/cdislave.c

r17788	r17789
39	39	va_start( v, s_fmt );
40	40	vsprintf( buf, s_fmt, v );
41	41	va_end( v );
42		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	42	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
43	43	}
44	44	}
45	45	#else

trunk/src/mame/machine/midwunit.c

r17788	r17789
51	51	}
52	52	else
53	53	{
54		logerror("%08X:Unexpected CMOS W @ %05X\n", cpu_get_pc(&space.device()), offset);
	54	logerror("%08X:Unexpected CMOS W @ %05X\n", space.device().safe_pc(), offset);
55	55	popmessage("Bad CMOS write");
56	56	}
57	57	}
r17788	r17789
83	83	switch (offset)
84	84	{
85	85	case 1:
86		logerror("%08X:Control W @ %05X = %04X\n", cpu_get_pc(&space.device()), offset, data);
	86	logerror("%08X:Control W @ %05X = %04X\n", space.device().safe_pc(), offset, data);
87	87
88	88	/* bit 4 reset sound CPU */
89	89	dcs_reset_w(machine(), newword & 0x10);
r17788	r17789
99	99	break;
100	100
101	101	default:
102		logerror("%08X:Unknown I/O write to %d = %04X\n", cpu_get_pc(&space.device()), offset, data);
	102	logerror("%08X:Unknown I/O write to %d = %04X\n", space.device().safe_pc(), offset, data);
103	103	break;
104	104	}
105	105	m_iodata[offset] = newword;
r17788	r17789
132	132	return (midway_serial_pic_status_r() << 12) | midwunit_sound_state_r(space,0,0xffff);
133	133
134	134	default:
135		logerror("%08X:Unknown I/O read from %d\n", cpu_get_pc(&space.device()), offset);
	135	logerror("%08X:Unknown I/O read from %d\n", space.device().safe_pc(), offset);
136	136	break;
137	137	}
138	138	return ~0;
r17788	r17789
381	381
382	382	READ16_MEMBER(midwunit_state::midwunit_sound_r)
383	383	{
384		logerror("%08X:Sound read\n", cpu_get_pc(&space.device()));
	384	logerror("%08X:Sound read\n", space.device().safe_pc());
385	385
386	386	return dcs_data_r(machine()) & 0xff;
387	387	}
r17788	r17789
398	398	/* check for out-of-bounds accesses */
399	399	if (offset)
400	400	{
401		logerror("%08X:Unexpected write to sound (hi) = %04X\n", cpu_get_pc(&space.device()), data);
	401	logerror("%08X:Unexpected write to sound (hi) = %04X\n", space.device().safe_pc(), data);
402	402	return;
403	403	}
404	404
405	405	/* call through based on the sound type */
406	406	if (ACCESSING_BITS_0_7)
407	407	{
408		logerror("%08X:Sound write = %04X\n", cpu_get_pc(&space.device()), data);
	408	logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data);
409	409	dcs_data_w(machine(), data & 0xff);
410	410	}
411	411	}

trunk/src/mame/machine/namcos2.c

r17788	r17789
343	343	{
344	344	//  case 3: return 0x142;
345	345	case 4: return 0x142;
346		//  case 3: popmessage("blah %08x",cpu_get_pc(&space->device()));
	346	//  case 3: popmessage("blah %08x",space->device().safe_pc());
347	347	default: return space->machine().rand();
348	348	}
349	349	break;

trunk/src/mame/machine/pgmprot2.c

r17788	r17789
40	40	device_set_input_line(state->m_prot, ARM7_FIRQ_LINE, CLEAR_LINE ); // guess
41	41
42	42	if (PGMARM7LOGERROR)
43		logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_kov2_latchdata_68k_w, mem_mask, cpu_get_pc(&space->device()));
	43	logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_kov2_latchdata_68k_w, mem_mask, space->device().safe_pc());
44	44	return state->m_kov2_latchdata_68k_w;
45	45	}
46	46
r17788	r17789
49	49	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
50	50
51	51	if (PGMARM7LOGERROR)
52		logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, cpu_get_pc(&space->device()));
	52	logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, space->device().safe_pc());
53	53
54	54	COMBINE_DATA(&state->m_kov2_latchdata_arm_w);
55	55	}
r17788	r17789
59	59	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
60	60
61	61	if (PGMARM7LOGERROR)
62		logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, cpu_get_pc(&space->device()));
	62	logerror("ARM7: ARM7 Shared RAM Read: %04x = %08x (%08x) (%06x)\n", offset << 2, state->m_arm7_shareram[offset], mem_mask, space->device().safe_pc());
63	63	return state->m_arm7_shareram[offset];
64	64	}
65	65
r17788	r17789
68	68	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
69	69
70	70	if (PGMARM7LOGERROR)
71		logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, cpu_get_pc(&space->device()));
	71	logerror("ARM7: ARM7 Shared RAM Write: %04x = %08x (%08x) (%06x)\n", offset << 2, data, mem_mask, space->device().safe_pc());
72	72	COMBINE_DATA(&state->m_arm7_shareram[offset]);
73	73	}
74	74
r17788	r17789
77	77	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
78	78
79	79	if (PGMARM7LOGERROR)
80		logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
	80	logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_kov2_latchdata_arm_w & 0x0000ffff, mem_mask, space->device().safe_pc());
81	81	return state->m_kov2_latchdata_arm_w;
82	82	}
83	83
r17788	r17789
86	86	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
87	87
88	88	if (PGMARM7LOGERROR)
89		logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
	89	logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, space->device().safe_pc());
90	90	COMBINE_DATA(&state->m_kov2_latchdata_68k_w);
91	91
92	92	device_set_input_line(state->m_prot, ARM7_FIRQ_LINE, ASSERT_LINE ); // guess
r17788	r17789
98	98	UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
99	99
100	100	if (PGMARM7LOGERROR)
101		logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, cpu_get_pc(&space->device()));
	101	logerror("M68K: ARM7 Shared RAM Read: %04x = %04x (%08x) (%06x)\n", BYTE_XOR_LE(offset), share16[BYTE_XOR_LE(offset)], mem_mask, space->device().safe_pc());
102	102	return share16[BYTE_XOR_LE(offset)];
103	103	}
104	104
r17788	r17789
108	108	UINT16 *share16 = reinterpret_cast<UINT16 *>(state->m_arm7_shareram.target());
109	109
110	110	if (PGMARM7LOGERROR)
111		logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, cpu_get_pc(&space->device()));
	111	logerror("M68K: ARM7 Shared RAM Write: %04x = %04x (%04x) (%06x)\n", BYTE_XOR_LE(offset), data, mem_mask, space->device().safe_pc());
112	112	COMBINE_DATA(&share16[BYTE_XOR_LE(offset)]);
113	113	}
114	114
r17788	r17789
176	176	static WRITE32_HANDLER( kov2_arm_region_w )
177	177	{
178	178	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
179		int pc = cpu_get_pc(&space->device());
	179	int pc = space->device().safe_pc();
180	180	int regionhack = state->ioport("RegionHack")->read();
181	181	if (pc==0x190 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
182	182	COMBINE_DATA(&state->m_arm7_shareram[0x138/4]);
r17788	r17789
229	229	static WRITE32_HANDLER( martmast_arm_region_w )
230	230	{
231	231	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
232		int pc = cpu_get_pc(&space->device());
	232	int pc = space->device().safe_pc();
233	233	int regionhack = state->ioport("RegionHack")->read();
234	234	if (pc==0x170 && regionhack != 0xff) data = (data & 0xffff0000) | (regionhack << 0);
235	235	COMBINE_DATA(&state->m_arm7_shareram[0x138/4]);
r17788	r17789
250	250	static WRITE32_HANDLER( ddp2_arm_region_w )
251	251	{
252	252	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
253		int pc = cpu_get_pc(&space->device());
	253	int pc = space->device().safe_pc();
254	254	int regionhack = state->ioport("RegionHack")->read();
255	255	if (pc==0x0174 && regionhack != 0xff) data = (data & 0x0000ffff) | (regionhack << 16);
256	256	COMBINE_DATA(&state->m_arm7_shareram[0x0]);
r17788	r17789
259	259	static READ32_HANDLER( ddp2_speedup_r )
260	260	{
261	261	pgm_arm_type2_state *state = space->machine().driver_data<pgm_arm_type2_state>();
262		int pc = cpu_get_pc(&space->device());
	262	int pc = space->device().safe_pc();
263	263	UINT32 data = state->m_arm_ram[0x300c/4];
264	264
265	265	if (pc==0x080109b4)
r17788	r17789
282	282	{
283	283
284	284	UINT16 data = pgm_mainram[0x0ee54/2];
285		int pc = cpu_get_pc(&space->device());
	285	int pc = space->device().safe_pc();
286	286
287	287	if (pc == 0x149dce) device_spin_until_interrupt(&space->device());
288	288	if (pc == 0x149cfe) device_spin_until_interrupt(&space->device());

trunk/src/mame/machine/tx1.c

r17788	r17789
368	368	}
369	369
370	370	math.dbgaddr = math.promaddr;
371		math.dbgpc = cpu_get_previouspc(machine.device("math_cpu"));
	371	math.dbgpc = machine.device("math_cpu")->safe_pcbase();
372	372	}
373	373
374	374

trunk/src/mame/machine/decoprot.c

r17788	r17789
121	121	&& offset != (0x370 >> 1) && offset != (0x3c0 >> 1) && offset != (0x430 >> 1) && offset != (0x460 >> 1)
122	122	&& offset != (0x5a0 >> 1) && offset != (0x5b0 >> 1) && offset != (0x6e0 >> 1) && offset != (0x7d0 >> 1)
123	123	)
124		logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n", cpu_get_pc(&space->device()), offset << 1, data);
	124	logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n", space->device().safe_pc(), offset << 1, data);
125	125
126	126	COMBINE_DATA(&deco16_prot_ram[offset]);
127	127	}
r17788	r17789
220	220	return ((deco16_prot_ram[0x460/2]&0x0007)<<13) | ((deco16_prot_ram[0x460/2]&0x0008)<<9);
221	221	}
222	222
223		logerror("Deco Protection PC %06x: warning - read unmapped memory address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	223	logerror("Deco Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset<<1);
224	224	return 0;
225	225	}
226	226
r17788	r17789
249	249	&& offset!=0x40/2 && offset!=0x54/2 && offset!=0x56/2 && offset!=0x58/2 && offset!=0x6a/2 && offset!=0x2c/2
250	250	&& offset!=0 && offset!=0x34 && offset!=0x8a && offset!=0x8e && offset!=0x92 && offset!=0x96
251	251	)
252		logerror("Protection PC %06x: warning - write %04x to %04x\n",cpu_get_pc(&space->device()),data,offset<<1);
	252	logerror("Protection PC %06x: warning - write %04x to %04x\n",space->device().safe_pc(),data,offset<<1);
253	253
254	254	}
255	255
r17788	r17789
409	409	return ((deco16_prot_ram[0x32/2]&0x00f0)<<8) | ((deco16_prot_ram[0x32/2]&0x000e)<<7) | ((deco16_prot_ram[0x32/2]&0x0001)<<11);
410	410	}
411	411
412		logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",cpu_get_pc(&space->device()),offset*2);
	412	logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset*2);
413	413	return 0;
414	414	}
415	415
r17788	r17789
455	455	&& offset!=0xb6 && offset!=0xfa && offset!=0xe4 && offset!=0x3a && offset!=0x1e
456	456	&& offset!=0x38 && offset!=0x92 && offset!=0xa2 && offset!=0x308 && offset!=0x40e
457	457	)
458		logerror("Protection PC %06x: warning - write %04x to %04x\n",cpu_get_pc(&space->device()),data,offset);
	458	logerror("Protection PC %06x: warning - write %04x to %04x\n",space->device().safe_pc(),data,offset);
459	459	}
460	460
461	461	READ16_HANDLER( deco16_66_prot_r ) /* Mutant Fighter */
r17788	r17789
553	553	{
554	554	int ret=mutantf_port_0e_hack;
555	555	mutantf_port_0e_hack=0x800;
556		//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	556	//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
557	557	return ret;
558	558	}
559	559
r17788	r17789
561	561	{
562	562	int ret=mutantf_port_6a_hack;
563	563	mutantf_port_6a_hack=0x2866;
564		//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	564	//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
565	565	return ret;
566	566	}
567	567
r17788	r17789
569	569	{
570	570	int ret=mutantf_port_e8_hack;
571	571	mutantf_port_e8_hack=0x2401;
572		//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	572	//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
573	573	return ret;
574	574	}
575	575
576	576	case 0xaa: /* ??? */
577		//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	577	//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
578	578	return 0xc080;
579	579
580	580	case 0x42: /* Strange, but consistent */
581		//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	581	//logerror("Protection PC %06x: warning - read unknown memory address %04x\n",space->device().safe_pc(),offset<<1);
582	582	return deco16_prot_ram[0x2c/2]^0x5302;
583	583
584	584	case 0x48: /* Correct for test data, but I wonder if the 0x1800 is from an address, not a constant */
585		//logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	585	//logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset<<1);
586	586	return (0x1800) & (~deco16_prot_ram[0x36/2]);
587	587
588	588	case 0x52:
r17788	r17789
599	599	popmessage("Deco66:  Read unmapped port %04x\n",offset*2);
600	600	#endif
601	601
602		logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	602	logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset<<1);
603	603	return 0;
604	604	}
605	605
r17788	r17789
661	661	return space->machine().root_device().ioport("IN0")->read();
662	662	}
663	663
664		logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",cpu_get_pc(&space->device()),offset);
	664	logerror("Protection PC %06x: warning - read unmapped memory address %04x\n",space->device().safe_pc(),offset);
665	665	return 0;
666	666	}
667	667
r17788	r17789
757	757	return space->machine().root_device().ioport("DSW")->read();
758	758	}
759	759
760		if (cpu_get_pc(&space->device())!=0xc0ea)
761		logerror("CPU #0 PC %06x: warning - read unmapped control address %06x (ctrl %04x)\n", cpu_get_pc(&space->device()), offset<<1, space->machine().root_device().ioport("INPUTS")->read());
	760	if (space->device().safe_pc()!=0xc0ea)
	761	logerror("CPU #0 PC %06x: warning - read unmapped control address %06x (ctrl %04x)\n", space->device().safe_pc(), offset<<1, space->machine().root_device().ioport("INPUTS")->read());
762	762
763	763	return 0;
764	764	}
r17788	r17789
807	807
808	808	offset=offset*2;
809	809
810		//logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",cpu_get_pc(&space->device()),offset,data);
	810	//logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space->device().safe_pc(),offset,data);
811	811	if (offset==0xee || offset==0x42 || offset==0xa8)
812	812	return;
813	813
814		//  logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",cpu_get_pc(&space->device()),offset,data);
	814	//  logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space->device().safe_pc(),offset,data);
815	815
816	816	#if 1
817	817	// 66 7c 7e 28 58 4a 9e
r17788	r17789
828	828	return;
829	829
830	830	//  if (offset==0x3c)
831		//      logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",cpu_get_pc(&space->device()),offset,data);
	831	//      logerror("CONTROL PC %06x: warning - write protection memory address %04x %04x\n",space->device().safe_pc(),offset,data);
832	832	// Actually read:
833	833	//  22 24 26 2c 2e 30 32 3c 40 44 46 48 60 62 66 6a 6e 76 7e 80 82 84 86 88 8a 8c 90 94 96 98 9a 9c a0 c0 c4 c6 c8 cc ce d6 dc de
834	834
r17788	r17789
856	856	return;
857	857	#endif
858	858
859		logerror("CONTROL PC %06x: warning - write unmapped protection memory address %04x %04x\n",cpu_get_pc(&space->device()),offset,data);
	859	logerror("CONTROL PC %06x: warning - write unmapped protection memory address %04x %04x\n",space->device().safe_pc(),offset,data);
860	860	}
861	861
862	862	READ16_HANDLER( deco16_104_rohga_prot_r )
r17788	r17789
864	864	const UINT16* prot_ram=decoprot_buffer_ram_selected ? decoprot_buffer_ram : deco16_prot_ram;
865	865
866	866	//  if (offset!=0x88/2 && offset!=0x44c/2 && offset!=0x36c/2 && offset!=0x292/2)
867		//      logerror("Protection PC %06x: warning - read prot address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	867	//      logerror("Protection PC %06x: warning - read prot address %04x\n",space->device().safe_pc(),offset<<1);
868	868
869	869	switch (offset) {
870	870	case 0x88/2: /* Player 1 & 2 input ports */
r17788	r17789
1209	1209	return DECO_PORT(0x58);
1210	1210	}
1211	1211
1212		logerror("Protection PC %06x: warning - read unmapped protection address %04x\n",cpu_get_pc(&space->device()),offset<<1);
	1212	logerror("Protection PC %06x: warning - read unmapped protection address %04x\n",space->device().safe_pc(),offset<<1);
1213	1213
1214	1214	return 0;
1215	1215	}
r17788	r17789
1241	1241	COMBINE_DATA(&decoprot_buffer_ram[offset>>1]);
1242	1242
1243	1243	//  if (offset!=0x5e0 && offset!=0x340 && offset!=0 && offset!=0x3d0 && offset!=0x280)
1244		//      logerror("%08x:  Write protection port %04x, data %04x (%08x)\n", cpu_get_pc(&space->device()), offset, data, mem_mask);
	1244	//      logerror("%08x:  Write protection port %04x, data %04x (%08x)\n", space->device().safe_pc(), offset, data, mem_mask);
1245	1245	}
1246	1246
1247	1247	static READ16_HANDLER( deco16_146_core_prot_r )
r17788	r17789
1639	1639	return val & (~deco16_mask);
1640	1640	}
1641	1641
1642		//logerror("Protection PC %06x: warning - read fully unmapped protection address %04x\n", cpu_get_pc(&space->device()), offset);
	1642	//logerror("Protection PC %06x: warning - read fully unmapped protection address %04x\n", space->device().safe_pc(), offset);
1643	1643
1644	1644	return 0;
1645	1645	}
r17788	r17789
1691	1691	&& addr!=0x1ae && addr!=0x1d6 && addr!=0x4f8 && addr!=0x614 // cnofirmed
1692	1692	&& addr!=0x5ae && addr!=0x50a && addr!=0x476 && addr!=0x328 && addr!=0x3e && addr!=0x558 // dbl check these later
1693	1693	&& addr!=0x444 && addr!=0x46a // confirmed
1694		&& cpu_get_pc(&space->device())!=0x16448 // hmm
	1694	&& space->device().safe_pc()!=0x16448 // hmm
1695	1695	&& addr!=0x67a
1696	1696	&& addr!=0x6c2 && addr!=0xac && addr!=0x416 && addr!=0x2c2 // confirmed
1697	1697	&& addr!=0x3d8
r17788	r17789
1714	1714	&& addr!=0x440 && addr!=0x460
1715	1715	)
1716	1716	{
1717		logerror("Protection PC %06x: warning - read unmapped protection address %04x (ret %04x)\n", cpu_get_pc(&space->device()), addr, val);
	1717	logerror("Protection PC %06x: warning - read unmapped protection address %04x (ret %04x)\n", space->device().safe_pc(), addr, val);
1718	1718	popmessage("Read protection port %04x", addr);
1719	1719	}
1720		//  logerror("Protection PC %06x: warning - read unmapped protection address %04x (ret %04x)\n", cpu_get_pc(&space->device()), addr, val);
	1720	//  logerror("Protection PC %06x: warning - read unmapped protection address %04x (ret %04x)\n", space->device().safe_pc(), addr, val);
1721	1721
1722	1722	return (val<<16)|0xffff;
1723	1723	}
r17788	r17789
1745	1745	case 0x506: return space->machine().root_device().ioport("DSW")->read();
1746	1746	}
1747	1747
1748		logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", cpu_get_pc(&space->device()), offset<<1);
	1748	logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space->device().safe_pc(), offset<<1);
1749	1749
1750	1750	return 0;
1751	1751	}
r17788	r17789
1759	1759	cputag_set_input_line(space->machine(), "audiocpu", 0, HOLD_LINE);
1760	1760	return;
1761	1761	}
1762		logerror("Protection PC %06x: warning - write unmapped memory address %04x %04x\n", cpu_get_pc(&space->device()), offset << 1, data);
	1762	logerror("Protection PC %06x: warning - write unmapped memory address %04x %04x\n", space->device().safe_pc(), offset << 1, data);
1763	1763	}
1764	1764
1765	1765	/**********************************************************************************/
r17788	r17789
1777	1777	case 0x51a: return DECO_PORT(2);
1778	1778	}
1779	1779
1780		logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", cpu_get_pc(&space->device()), offset<<1);
	1780	logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space->device().safe_pc(), offset<<1);
1781	1781
1782	1782	return 0;
1783	1783	}
r17788	r17789
1785	1785	WRITE16_HANDLER( deco16_104_pktgaldx_prot_w )
1786	1786	{
1787	1787	COMBINE_DATA(&deco16_prot_ram[offset]);
1788		//  logerror("Protection PC %06x: warning - write unmapped memory address %04x %04x\n",cpu_get_pc(&space->device()),offset<<1,data);
	1788	//  logerror("Protection PC %06x: warning - write unmapped memory address %04x %04x\n",space->device().safe_pc(),offset<<1,data);
1789	1789	}
1790	1790
1791	1791	/**********************************************************************************/

trunk/src/mame/machine/tatsumi.c

r17788	r17789
76	76	else if ((m_control_word & 0xe0) == 0x80)
77	77	offset += 0x00000; // main ram
78	78	else
79		logerror("%08x: unmapped read z80 rom %08x\n", cpu_get_pc(&space.device()), offset);
	79	logerror("%08x: unmapped read z80 rom %08x\n", space.device().safe_pc(), offset);
80	80	return 0xff00 | targetspace->read_byte(offset);
81	81	}
82	82
r17788	r17789
85	85	address_space *targetspace = machine().device("audiocpu")->memory().space(AS_PROGRAM);
86	86
87	87	if ((m_control_word & 0xe0) != 0x80)
88		logerror("%08x: write unmapped v30 rom %08x\n", cpu_get_pc(&space.device()), offset);
	88	logerror("%08x: write unmapped v30 rom %08x\n", space.device().safe_pc(), offset);
89	89
90	90	/* Only 8 bits of the V30 data bus are connected - ignore writes to the other half */
91	91	if (ACCESSING_BITS_0_7)
r17788	r17789
181	181	cputag_set_input_line(machine(), "audiocpu", INPUT_LINE_HALT, CLEAR_LINE);
182	182
183	183	//  if (offset == 1 && (tatsumi_control_w & 0xfeff) != (last_bank & 0xfeff))
184		//      logerror("%08x:  Changed bank to %04x (%d)\n", cpu_get_pc(&space.device()), tatsumi_control_w,offset);
	184	//      logerror("%08x:  Changed bank to %04x (%d)\n", space.device().safe_pc(), tatsumi_control_w,offset);
185	185
186	186	//todo - watchdog
187	187
r17788	r17789
227	227	WRITE16_MEMBER(tatsumi_state::roundup5_d0000_w)
228	228	{
229	229	COMBINE_DATA(&m_roundup5_d0000_ram[offset]);
230		//  logerror("d_68k_d0000_w %06x %04x\n", cpu_get_pc(&space.device()), data);
	230	//  logerror("d_68k_d0000_w %06x %04x\n", space.device().safe_pc(), data);
231	231	}
232	232
233	233	WRITE16_MEMBER(tatsumi_state::roundup5_e0000_w)
r17788	r17789
239	239	COMBINE_DATA(&m_roundup5_e0000_ram[offset]);
240	240	cputag_set_input_line(machine(), "sub", INPUT_LINE_IRQ4, CLEAR_LINE); // guess, probably wrong
241	241
242		//  logerror("d_68k_e0000_w %06x %04x\n", cpu_get_pc(&space.device()), data);
	242	//  logerror("d_68k_e0000_w %06x %04x\n", space.device().safe_pc(), data);
243	243	}
244	244
245	245	/******************************************************************************/
246	246
247	247	READ16_MEMBER(tatsumi_state::cyclwarr_control_r)
248	248	{
249		//  logerror("%08x:  control_r\n", cpu_get_pc(&space.device()));
	249	//  logerror("%08x:  control_r\n", space.device().safe_pc());
250	250	return m_control_word;
251	251	}
252	252
r17788	r17789
255	255	COMBINE_DATA(&m_control_word);
256	256
257	257	//  if ((m_control_word&0xfe) != (m_last_control&0xfe))
258		//      logerror("%08x:  control_w %04x\n", cpu_get_pc(&space.device()), data);
	258	//      logerror("%08x:  control_w %04x\n", space.device().safe_pc(), data);
259	259
260	260	/*
261	261
r17788	r17789
280	280
281	281
282	282	// hack
283		if (cpu_get_pc(&space.device()) == 0x2c3c34)
	283	if (space.device().safe_pc() == 0x2c3c34)
284	284	{
285	285	//      cpu_set_reset_line(1, CLEAR_LINE);
286	286	//      logerror("hack 68k2 on\n");
r17788	r17789
295	295	{
296	296	const UINT16* rom=(UINT16*)machine().root_device().memregion("sub")->base();
297	297
298		logerror("%05X:68000_r(%04X),cw=%04X\n", cpu_get_pc(&space.device()), offset*2, m_control_word);
	298	logerror("%05X:68000_r(%04X),cw=%04X\n", space.device().safe_pc(), offset*2, m_control_word);
299	299	/* Read from 68k RAM */
300	300	if ((m_control_word&0x1f)==0x18)
301	301	{
302	302	// hack to make roundup 5 boot
303		if (cpu_get_pc(&space.device())==0xec575)
	303	if (space.device().safe_pc()==0xec575)
304	304	{
305	305	UINT8 *dst = memregion("maincpu")->base();
306	306	dst[BYTE_XOR_LE(0xec57a)]=0x46;
r17788	r17789
340	340	address_space *space = device->machine().device("audiocpu")->memory().space(AS_PROGRAM);
341	341	int r=ym2151_status_port_r(device,0);
342	342
343		if (cpu_get_pc(&space->device())==0x2aca || cpu_get_pc(&space->device())==0x29fe
344		|| cpu_get_pc(&space->device())==0xf9721
345		|| cpu_get_pc(&space->device())==0x1b96 || cpu_get_pc(&space->device())==0x1c65) // BigFight
	343	if (space->device().safe_pc()==0x2aca || space->device().safe_pc()==0x29fe
	344	|| space->device().safe_pc()==0xf9721
	345	|| space->device().safe_pc()==0x1b96 || space->device().safe_pc()==0x1c65) // BigFight
346	346	return 0x80;
347	347	return r;
348	348	}
r17788	r17789
354	354	address_space *space = device->machine().device("audiocpu")->memory().space(AS_PROGRAM);
355	355	int r=downcast<okim6295_device *>(device)->read(*space,0);
356	356
357		if (cpu_get_pc(&space->device())==0x2b70 || cpu_get_pc(&space->device())==0x2bb5
358		|| cpu_get_pc(&space->device())==0x2acc
359		|| cpu_get_pc(&space->device())==0x1c79 // BigFight
360		|| cpu_get_pc(&space->device())==0x1cbe // BigFight
361		|| cpu_get_pc(&space->device())==0xf9881)
	357	if (space->device().safe_pc()==0x2b70 || space->device().safe_pc()==0x2bb5
	358	|| space->device().safe_pc()==0x2acc
	359	|| space->device().safe_pc()==0x1c79 // BigFight
	360	|| space->device().safe_pc()==0x1cbe // BigFight
	361	|| space->device().safe_pc()==0xf9881)
362	362	return 0xf;
363		if (cpu_get_pc(&space->device())==0x2ba3 || cpu_get_pc(&space->device())==0x2a9b || cpu_get_pc(&space->device())==0x2adc
364		|| cpu_get_pc(&space->device())==0x1cac) // BigFight
	363	if (space->device().safe_pc()==0x2ba3 || space->device().safe_pc()==0x2a9b || space->device().safe_pc()==0x2adc
	364	|| space->device().safe_pc()==0x1cac) // BigFight
365	365	return 0;
366	366	return r;
367	367	}

trunk/src/mame/machine/retofinv.c

r17788	r17789
12	12
13	13	READ8_MEMBER(retofinv_state::retofinv_68705_portA_r)
14	14	{
15		//logerror("%04x: 68705 port A read %02x\n",cpu_get_pc(&space.device()),m_portA_in);
	15	//logerror("%04x: 68705 port A read %02x\n",space.device().safe_pc(),m_portA_in);
16	16	return (m_portA_out & m_ddrA) | (m_portA_in & ~m_ddrA);
17	17	}
18	18
19	19	WRITE8_MEMBER(retofinv_state::retofinv_68705_portA_w)
20	20	{
21		//logerror("%04x: 68705 port A write %02x\n",cpu_get_pc(&space.device()),data);
	21	//logerror("%04x: 68705 port A write %02x\n",space.device().safe_pc(),data);
22	22	m_portA_out = data;
23	23	}
24	24
r17788	r17789
46	46
47	47	WRITE8_MEMBER(retofinv_state::retofinv_68705_portB_w)
48	48	{
49		//logerror("%04x: 68705 port B write %02x\n",cpu_get_pc(&space.device()),data);
	49	//logerror("%04x: 68705 port B write %02x\n",space.device().safe_pc(),data);
50	50
51	51	if ((m_ddrB & 0x02) && (~data & 0x02) && (m_portB_out & 0x02))
52	52	{
r17788	r17789
86	86	m_portC_in = 0;
87	87	if (m_main_sent) m_portC_in |= 0x01;
88	88	if (!m_mcu_sent) m_portC_in |= 0x02;
89		//logerror("%04x: 68705 port C read %02x\n",cpu_get_pc(&space.device()),m_portC_in);
	89	//logerror("%04x: 68705 port C read %02x\n",space.device().safe_pc(),m_portC_in);
90	90	return (m_portC_out & m_ddrC) | (m_portC_in & ~m_ddrC);
91	91	}
92	92
93	93	WRITE8_MEMBER(retofinv_state::retofinv_68705_portC_w)
94	94	{
95		logerror("%04x: 68705 port C write %02x\n",cpu_get_pc(&space.device()),data);
	95	logerror("%04x: 68705 port C write %02x\n",space.device().safe_pc(),data);
96	96	m_portC_out = data;
97	97	}
98	98
r17788	r17789
104	104
105	105	WRITE8_MEMBER(retofinv_state::retofinv_mcu_w)
106	106	{
107		logerror("%04x: mcu_w %02x\n",cpu_get_pc(&space.device()),data);
	107	logerror("%04x: mcu_w %02x\n",space.device().safe_pc(),data);
108	108	m_from_main = data;
109	109	m_main_sent = 1;
110	110	cputag_set_input_line(machine(), "68705", 0, ASSERT_LINE);
r17788	r17789
112	112
113	113	READ8_MEMBER(retofinv_state::retofinv_mcu_r)
114	114	{
115		logerror("%04x: mcu_r %02x\n",cpu_get_pc(&space.device()),m_from_mcu);
	115	logerror("%04x: mcu_r %02x\n",space.device().safe_pc(),m_from_mcu);
116	116	m_mcu_sent = 0;
117	117	return m_from_mcu;
118	118	}
r17788	r17789
123	123
124	124	/* bit 4 = when 1, mcu is ready to receive data from main cpu */
125	125	/* bit 5 = when 1, mcu has sent data to the main cpu */
126		//logerror("%04x: mcu_status_r\n",cpu_get_pc(&space.device()));
	126	//logerror("%04x: mcu_status_r\n",space.device().safe_pc());
127	127	if (!m_main_sent) res |= 0x10;
128	128	if (m_mcu_sent) res |= 0x20;
129	129

trunk/src/mame/machine/maniach.c

r17788	r17789
23	23	{
24	24	matmania_state *state = space->machine().driver_data<matmania_state>();
25	25
26		//logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(&space->device()), state->m_port_a_in);
	26	//logerror("%04x: 68705 port A read %02x\n", space->device().safe_pc(), state->m_port_a_in);
27	27	return (state->m_port_a_out & state->m_ddr_a) | (state->m_port_a_in & ~state->m_ddr_a);
28	28	}
29	29
r17788	r17789
31	31	{
32	32	matmania_state *state = space->machine().driver_data<matmania_state>();
33	33
34		//logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(&space->device()), data);
	34	//logerror("%04x: 68705 port A write %02x\n", space->device().safe_pc(), data);
35	35	state->m_port_a_out = data;
36	36	}
37	37
r17788	r17789
62	62	{
63	63	matmania_state *state = space->machine().driver_data<matmania_state>();
64	64
65		//logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(&space->device()), data);
	65	//logerror("%04x: 68705 port B write %02x\n", space->device().safe_pc(), data);
66	66
67	67	if (BIT(state->m_ddr_b, 1) && BIT(~data, 1) && BIT(state->m_port_b_out, 1))
68	68	{
r17788	r17789
99	99	if (!state->m_mcu_sent)
100	100	state->m_port_c_in |= 0x02;
101	101
102		//logerror("%04x: 68705 port C read %02x\n",state->m_cpu_get_pc(&space->device()), state->m_port_c_in);
	102	//logerror("%04x: 68705 port C read %02x\n",state->m_space->device().safe_pc(), state->m_port_c_in);
103	103
104	104	return (state->m_port_c_out & state->m_ddr_c) | (state->m_port_c_in & ~state->m_ddr_c);
105	105	}
r17788	r17789
108	108	{
109	109	matmania_state *state = space->machine().driver_data<matmania_state>();
110	110
111		//logerror("%04x: 68705 port C write %02x\n", cpu_get_pc(&space->device()), data);
	111	//logerror("%04x: 68705 port C write %02x\n", space->device().safe_pc(), data);
112	112	state->m_port_c_out = data;
113	113	}
114	114
r17788	r17789
123	123	{
124	124	matmania_state *state = space->machine().driver_data<matmania_state>();
125	125
126		//logerror("%04x: 3040_w %02x\n", cpu_get_pc(&space->device()), data);
	126	//logerror("%04x: 3040_w %02x\n", space->device().safe_pc(), data);
127	127	state->m_from_main = data;
128	128	state->m_main_sent = 1;
129	129	}
r17788	r17789
132	132	{
133	133	matmania_state *state = space->machine().driver_data<matmania_state>();
134	134
135		//logerror("%04x: 3040_r %02x\n", cpu_get_pc(&space->device()), state->m_from_mcu);
	135	//logerror("%04x: 3040_r %02x\n", space->device().safe_pc(), state->m_from_mcu);
136	136	state->m_mcu_sent = 0;
137	137	return state->m_from_mcu;
138	138	}
r17788	r17789
144	144
145	145	/* bit 0 = when 0, mcu has sent data to the main cpu */
146	146	/* bit 1 = when 1, mcu is ready to receive data from main cpu */
147		//logerror("%04x: 3041_r\n", cpu_get_pc(&space->device()));
	147	//logerror("%04x: 3041_r\n", space->device().safe_pc());
148	148	if (!state->m_mcu_sent)
149	149	res |= 0x01;
150	150	if (!state->m_main_sent)

trunk/src/mame/machine/harddriv.c

r17788	r17789
597	597	/* any write to $1FFF is taken to be a trigger; synchronize the CPUs */
598	598	if (offset == 0x1fff)
599	599	{
600		logerror("%06X:ADSP sync address written (%04X)\n", cpu_get_previouspc(&space->device()), data);
	600	logerror("%06X:ADSP sync address written (%04X)\n", space->device().safe_pcbase(), data);
601	601	space->machine().scheduler().synchronize();
602	602	device_triggerint(state->m_adsp);
603	603	}
604	604	else
605		logerror("%06X:ADSP W@%04X (%04X)\n", cpu_get_previouspc(&space->device()), offset, data);
	605	logerror("%06X:ADSP W@%04X (%04X)\n", space->device().safe_pcbase(), offset, data);
606	606	}
607	607
608	608
r17788	r17789
758	758	WRITE16_HANDLER( hd68k_adsp_irq_clear_w )
759	759	{
760	760	harddriv_state *state = space->machine().driver_data<harddriv_state>();
761		logerror("%06X:68k clears ADSP interrupt\n", cpu_get_previouspc(&space->device()));
	761	logerror("%06X:68k clears ADSP interrupt\n", space->device().safe_pcbase());
762	762	state->m_adsp_irq_state = 0;
763	763	atarigen_update_interrupts(space->machine());
764	764	}
r17788	r17789
770	770	int result = 0xfffd;
771	771	if (state->m_adsp_xflag) result ^= 2;
772	772	if (state->m_adsp_irq_state) result ^= 1;
773		logerror("%06X:68k reads ADSP interrupt state = %04x\n", cpu_get_previouspc(&space->device()), result);
	773	logerror("%06X:68k reads ADSP interrupt state = %04x\n", space->device().safe_pcbase(), result);
774	774	return result;
775	775	}
776	776
r17788	r17789
803	803	break;
804	804
805	805	default:
806		logerror("%04X:hdadsp_special_r(%04X)\n", cpu_get_previouspc(&space->device()), offset);
	806	logerror("%04X:hdadsp_special_r(%04X)\n", space->device().safe_pcbase(), offset);
807	807	break;
808	808	}
809	809	return 0;
r17788	r17789
832	832	break;
833	833
834	834	case 6:   /* /GINT */
835		logerror("%04X:ADSP signals interrupt\n", cpu_get_previouspc(&space->device()));
	835	logerror("%04X:ADSP signals interrupt\n", space->device().safe_pcbase());
836	836	state->m_adsp_irq_state = 1;
837	837	atarigen_update_interrupts(space->machine());
838	838	break;
r17788	r17789
842	842	break;
843	843
844	844	default:
845		logerror("%04X:hdadsp_special_w(%04X)=%04X\n", cpu_get_previouspc(&space->device()), offset, data);
	845	logerror("%04X:hdadsp_special_w(%04X)=%04X\n", space->device().safe_pcbase(), offset, data);
846	846	break;
847	847	}
848	848	}
r17788	r17789
950	950	READ16_HANDLER( hd68k_ds3_gdata_r )
951	951	{
952	952	harddriv_state *state = space->machine().driver_data<harddriv_state>();
953		offs_t pc = cpu_get_pc(&space->device());
	953	offs_t pc = space->device().safe_pc();
954	954
955	955	state->m_ds3_gflag = 0;
956	956	update_ds3_irq(state);
957	957
958		logerror("%06X:hd68k_ds3_gdata_r(%04X)\n", cpu_get_previouspc(&space->device()), state->m_ds3_gdata);
	958	logerror("%06X:hd68k_ds3_gdata_r(%04X)\n", space->device().safe_pcbase(), state->m_ds3_gdata);
959	959
960	960	/* attempt to optimize the transfer if conditions are right */
961	961	if (&space->device() == state->m_maincpu && pc == state->m_ds3_transfer_pc &&
r17788	r17789
999	999	{
1000	1000	harddriv_state *state = space->machine().driver_data<harddriv_state>();
1001	1001
1002		logerror("%06X:hd68k_ds3_gdata_w(%04X)\n", cpu_get_previouspc(&space->device()), state->m_ds3_gdata);
	1002	logerror("%06X:hd68k_ds3_gdata_w(%04X)\n", space->device().safe_pcbase(), state->m_ds3_gdata);
1003	1003
1004	1004	COMBINE_DATA(&state->m_ds3_g68data);
1005	1005	state->m_ds3_g68flag = 1;
r17788	r17789
1079	1079	switch (offset & 7)
1080	1080	{
1081	1081	case 0:
1082		logerror("%04X:ADSP sets gdata to %04X\n", cpu_get_previouspc(&space->device()), data);
	1082	logerror("%04X:ADSP sets gdata to %04X\n", space->device().safe_pcbase(), data);
1083	1083	state->m_ds3_gdata = data;
1084	1084	state->m_ds3_gflag = 1;
1085	1085	update_ds3_irq(state);
r17788	r17789
1089	1089	break;
1090	1090
1091	1091	case 1:
1092		logerror("%04X:ADSP sets interrupt = %d\n", cpu_get_previouspc(&space->device()), (data >> 1) & 1);
	1092	logerror("%04X:ADSP sets interrupt = %d\n", space->device().safe_pcbase(), (data >> 1) & 1);
1093	1093	state->m_adsp_irq_state = (data >> 1) & 1;
1094	1094	hd68k_update_interrupts(space->machine());
1095	1095	break;
r17788	r17789
1546	1546	/* if both this address and the other important address are not $ffff */
1547	1547	/* then we can spin until something gets written */
1548	1548	if (result != 0xffff && state->m_gsp_speedup_addr[1][0] != 0xffff &&
1549		&space->device() == state->m_gsp && cpu_get_pc(&space->device()) == state->m_gsp_speedup_pc)
	1549	&space->device() == state->m_gsp && space->device().safe_pc() == state->m_gsp_speedup_pc)
1550	1550	{
1551	1551	state->m_gsp_speedup_count[0]++;
1552	1552	device_spin_until_interrupt(&space->device());
r17788	r17789
1595	1595	int result = state->m_gsp_speedup_addr[0][offset];
1596	1596
1597	1597	/* if this address is equal to $f000, spin until something gets written */
1598		if (&space->device() == state->m_gsp && cpu_get_pc(&space->device()) == state->m_gsp_speedup_pc &&
	1598	if (&space->device() == state->m_gsp && space->device().safe_pc() == state->m_gsp_speedup_pc &&
1599	1599	(result & 0xff) < cpu_get_reg(&space->device(), TMS34010_A1))
1600	1600	{
1601	1601	state->m_gsp_speedup_count[0]++;
r17788	r17789
1632	1632	harddriv_state *state = space->machine().driver_data<harddriv_state>();
1633	1633	int data = state->m_msp_speedup_addr[offset];
1634	1634
1635		if (data == 0 && &space->device() == state->m_msp && cpu_get_pc(&space->device()) == state->m_msp_speedup_pc)
	1635	if (data == 0 && &space->device() == state->m_msp && space->device().safe_pc() == state->m_msp_speedup_pc)
1636	1636	{
1637	1637	state->m_msp_speedup_count[0]++;
1638	1638	device_spin_until_interrupt(&space->device());
r17788	r17789
1667	1667	harddriv_state *state = space->machine().driver_data<harddriv_state>();
1668	1668	int data = state->m_adsp_data_memory[0x1fff];
1669	1669
1670		if (data == 0xffff && &space->device() == state->m_adsp && cpu_get_pc(&space->device()) <= 0x3b)
	1670	if (data == 0xffff && &space->device() == state->m_adsp && space->device().safe_pc() <= 0x3b)
1671	1671	{
1672	1672	state->m_adsp_speedup_count[0]++;
1673	1673	device_spin_until_interrupt(&space->device());
r17788	r17789
1682	1682	harddriv_state *state = space->machine().driver_data<harddriv_state>();
1683	1683	int data = *state->m_ds3_speedup_addr;
1684	1684
1685		if (data != 0 && &space->device() == state->m_adsp && cpu_get_pc(&space->device()) == state->m_ds3_speedup_pc)
	1685	if (data != 0 && &space->device() == state->m_adsp && space->device().safe_pc() == state->m_ds3_speedup_pc)
1686	1686	{
1687	1687	state->m_adsp_speedup_count[2]++;
1688	1688	device_spin_until_interrupt(&space->device());

trunk/src/mame/machine/mcr68.c

r17788	r17789
539	539	if (diffs & 0x02)
540	540	reload_count(counter);
541	541
542		LOG(("%06X:Counter %d control = %02X\n", cpu_get_previouspc(&space.device()), counter, data));
	542	LOG(("%06X:Counter %d control = %02X\n", space.device().safe_pcbase(), counter, data));
543	543	}
544	544
545	545	/* offsets 2, 4, and 6 are MSB buffer registers */
546	546	else if ((offset & 1) == 0)
547	547	{
548		LOG(("%06X:MSB = %02X\n", cpu_get_previouspc(&space.device()), data));
	548	LOG(("%06X:MSB = %02X\n", space.device().safe_pcbase(), data));
549	549	m_m6840_msb_buffer = data;
550	550	}
551	551
r17788	r17789
564	564	if (!(m6840->control & 0x10))
565	565	reload_count(counter);
566	566
567		LOG(("%06X:Counter %d latch = %04X\n", cpu_get_previouspc(&space.device()), counter, m6840->latch));
	567	LOG(("%06X:Counter %d latch = %04X\n", space.device().safe_pcbase(), counter, m6840->latch));
568	568	}
569	569	}
570	570
r17788	r17789
578	578	/* offset 1 is the status register */
579	579	else if (offset == 1)
580	580	{
581		LOG(("%06X:Status read = %04X\n", cpu_get_previouspc(&space.device()), m_m6840_status));
	581	LOG(("%06X:Status read = %04X\n", space.device().safe_pcbase(), m_m6840_status));
582	582	m_m6840_status_read_since_int |= m_m6840_status & 0x07;
583	583	return m_m6840_status;
584	584	}
r17788	r17789
596	596
597	597	m_m6840_lsb_buffer = result & 0xff;
598	598
599		LOG(("%06X:Counter %d read = %04X\n", cpu_get_previouspc(&space.device()), counter, result));
	599	LOG(("%06X:Counter %d read = %04X\n", space.device().safe_pcbase(), counter, result));
600	600	return result >> 8;
601	601	}
602	602

trunk/src/mame/machine/pgmprot3.c

r17788	r17789
94	94	{
95	95	pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
96	96	if (PGMARM7LOGERROR)
97		logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
	97	logerror("M68K: Latch write: %04x (%04x) (%06x)\n", data & 0x0000ffff, mem_mask, space->device().safe_pc());
98	98	COMBINE_DATA(&state->m_svg_latchdata_68k_w);
99	99	}
100	100
r17788	r17789
104	104	pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
105	105
106	106	if (PGMARM7LOGERROR)
107		logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, cpu_get_pc(&space->device()));
	107	logerror("M68K: Latch read: %04x (%04x) (%06x)\n", state->m_svg_latchdata_arm_w & 0x0000ffff, mem_mask, space->device().safe_pc());
108	108	return state->m_svg_latchdata_arm_w;
109	109	}
110	110
r17788	r17789
115	115	pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
116	116
117	117	if (PGMARM7LOGERROR)
118		logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_svg_latchdata_68k_w, mem_mask, cpu_get_pc(&space->device()));
	118	logerror("ARM7: Latch read: %08x (%08x) (%06x)\n", state->m_svg_latchdata_68k_w, mem_mask, space->device().safe_pc());
119	119	return state->m_svg_latchdata_68k_w;
120	120	}
121	121
r17788	r17789
124	124	pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
125	125
126	126	if (PGMARM7LOGERROR)
127		logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, cpu_get_pc(&space->device()));
	127	logerror("ARM7: Latch write: %08x (%08x) (%06x)\n", data, mem_mask, space->device().safe_pc());
128	128
129	129	COMBINE_DATA(&state->m_svg_latchdata_arm_w);
130	130	}
r17788	r17789
269	269	static READ32_HANDLER( dmnfrnt_speedup_r )
270	270	{
271	271	pgm_arm_type3_state *state = space->machine().driver_data<pgm_arm_type3_state>();
272		int pc = cpu_get_pc(&space->device());
	272	int pc = space->device().safe_pc();
273	273	if (pc == 0x8000fea) device_eat_cycles(&space->device(), 500);
274	274	//  else printf("dmn_speedup_r %08x\n", pc);
275	275	return state->m_arm_ram[0x000444/4];
r17788	r17789
278	278	static READ16_HANDLER( dmnfrnt_main_speedup_r )
279	279	{
280	280	UINT16 data = pgm_mainram[0xa03c/2];
281		int pc = cpu_get_pc(&space->device());
	281	int pc = space->device().safe_pc();
282	282	if (pc == 0x10193a) device_spin_until_interrupt(&space->device());
283	283	else if (pc == 0x1019a4) device_spin_until_interrupt(&space->device());
284	284	return data;

trunk/src/mame/machine/model1.c

r17788	r17789
16	16	model1_state *state = space->machine().driver_data<model1_state>();
17	17	UINT32 v;
18	18	if(state->m_fifoout_wpos == state->m_fifoout_rpos) {
19		fatalerror("TGP FIFOOUT underflow (%x)\n", cpu_get_pc(&space->device()));
	19	fatalerror("TGP FIFOOUT underflow (%x)\n", space->device().safe_pc());
20	20	}
21	21	v = state->m_fifoout_data[state->m_fifoout_rpos++];
22	22	if(state->m_fifoout_rpos == FIFO_SIZE)
r17788	r17789
60	60	static void fifoin_push(address_space *space, UINT32 data)
61	61	{
62	62	model1_state *state = space->machine().driver_data<model1_state>();
63		//  logerror("TGP FIFOIN write %08x (%x)\n", data, cpu_get_pc(&space->device()));
	63	//  logerror("TGP FIFOIN write %08x (%x)\n", data, space->device().safe_pc());
64	64	state->m_fifoin_data[state->m_fifoin_wpos++] = data;
65	65	if(state->m_fifoin_wpos == FIFO_SIZE)
66	66	state->m_fifoin_wpos = 0;
r17788	r17789
1948	1948	{
1949	1949	if(offset) {
1950	1950	m_copro_w = (m_copro_w & 0x0000ffff) | (data << 16);
1951		m_pushpc = cpu_get_pc(&space.device());
	1951	m_pushpc = space.device().safe_pc();
1952	1952	fifoin_push(&space, m_copro_w);
1953	1953	} else
1954	1954	m_copro_w = (m_copro_w & 0xffff0000) | data;
r17788	r17789
1967	1967	READ16_MEMBER(model1_state::model1_tgp_copro_ram_r)
1968	1968	{
1969	1969	if(!offset) {
1970		logerror("TGP f0 ram read %04x, %08x (%f) (%x)\n", m_ram_adr, m_ram_data[m_ram_adr], u2f(m_ram_data[m_ram_adr]), cpu_get_pc(&space.device()));
	1970	logerror("TGP f0 ram read %04x, %08x (%f) (%x)\n", m_ram_adr, m_ram_data[m_ram_adr], u2f(m_ram_data[m_ram_adr]), space.device().safe_pc());
1971	1971	return m_ram_data[m_ram_adr];
1972	1972	} else
1973	1973	return m_ram_data[m_ram_adr++] >> 16;
r17788	r17789
1978	1978	COMBINE_DATA(m_ram_latch+offset);
1979	1979	if(offset) {
1980	1980	UINT32 v = m_ram_latch[0]|(m_ram_latch[1]<<16);
1981		logerror("TGP f0 ram write %04x, %08x (%f) (%x)\n", m_ram_adr, v, u2f(v), cpu_get_pc(&space.device()));
	1981	logerror("TGP f0 ram write %04x, %08x (%f) (%x)\n", m_ram_adr, v, u2f(v), space.device().safe_pc());
1982	1982	m_ram_data[m_ram_adr] = v;
1983	1983	m_ram_adr++;
1984	1984	}
r17788	r17789
2077	2077	model1_state *state = space->machine().driver_data<model1_state>();
2078	2078	if (state->m_copro_fifoin_num == FIFO_SIZE)
2079	2079	{
2080		fatalerror("Copro FIFOIN overflow (at %08X)\n", cpu_get_pc(&space->device()));
	2080	fatalerror("Copro FIFOIN overflow (at %08X)\n", space->device().safe_pc());
2081	2081	return;
2082	2082	}
2083	2083
r17788	r17789
2123	2123	model1_state *state = device->machine().driver_data<model1_state>();
2124	2124	if (state->m_copro_fifoout_num == FIFO_SIZE)
2125	2125	{
2126		fatalerror("Copro FIFOOUT overflow (at %08X)\n", cpu_get_pc(device));
	2126	fatalerror("Copro FIFOOUT overflow (at %08X)\n", device->safe_pc());
2127	2127	return;
2128	2128	}
2129	2129

trunk/src/mame/machine/megavdp.c

r17788	r17789
1266	1266	//  if ((!ACCESSING_BITS_8_15) || (!ACCESSING_BITS_0_7)) mame_printf_debug("8-bit VDP read control port access, offset %04x mem_mask %04x\n",offset,mem_mask);
1267	1267	retvalue = megadriv_vdp_ctrl_port_r(space.machine());
1268	1268	//  retvalue = space->machine().rand();
1269		//  mame_printf_debug("%06x: Read Control Port at scanline %d hpos %d (return %04x)\n",cpu_get_pc(&space->device()),genesis_get_scanline_counter(machine), get_hposition(space.machine()),retvalue);
	1269	//  mame_printf_debug("%06x: Read Control Port at scanline %d hpos %d (return %04x)\n",space->device().safe_pc(),genesis_get_scanline_counter(machine), get_hposition(space.machine()),retvalue);
1270	1270	break;
1271	1271
1272	1272	case 0x08:
r17788	r17789
1276	1276	//  if ((!ACCESSING_BITS_8_15) || (!ACCESSING_BITS_0_7)) mame_printf_debug("8-bit VDP read HV counter port access, offset %04x mem_mask %04x\n",offset,mem_mask);
1277	1277	retvalue = megadriv_read_hv_counters(space.machine());
1278	1278	//  retvalue = space->machine().rand();
1279		//  mame_printf_debug("%06x: Read HV counters at scanline %d hpos %d (return %04x)\n",cpu_get_pc(&space->device()),genesis_get_scanline_counter(machine), get_hposition(space.machine()),retvalue);
	1279	//  mame_printf_debug("%06x: Read HV counters at scanline %d hpos %d (return %04x)\n",space->device().safe_pc(),genesis_get_scanline_counter(machine), get_hposition(space.machine()),retvalue);
1280	1280	break;
1281	1281
1282	1282	case 0x10:

trunk/src/mame/machine/cd32.c

r17788	r17789
779	779
780	780	if ( LOG_AKIKO && offset < (0x30/4) )
781	781	{
782		logerror( "Reading AKIKO reg %0x [%s] at PC=%06x\n", offset, get_akiko_reg_name(offset), cpu_get_pc(&space->device()) );
	782	logerror( "Reading AKIKO reg %0x [%s] at PC=%06x\n", offset, get_akiko_reg_name(offset), space->device().safe_pc() );
783	783	}
784	784
785	785	switch( offset )
r17788	r17789
842	842
843	843	if ( LOG_AKIKO && offset < (0x30/4) )
844	844	{
845		logerror( "Writing AKIKO reg %0x [%s] with %08x at PC=%06x\n", offset, get_akiko_reg_name(offset), data, cpu_get_pc(&space->device()) );
	845	logerror( "Writing AKIKO reg %0x [%s] with %08x at PC=%06x\n", offset, get_akiko_reg_name(offset), data, space->device().safe_pc() );
846	846	}
847	847
848	848	switch( offset )

trunk/src/mame/machine/btime.c

r17788	r17789
16	16	else if (offset >= 0x0d00 && offset <= 0x0d02)
17	17	ret = RAM[BASE + offset];  /* addition result */
18	18	else
19		logerror("Unknown protection read.  PC=%04X  Offset=%04X\n", cpu_get_pc(&space.device()), offset);
	19	logerror("Unknown protection read.  PC=%04X  Offset=%04X\n", space.device().safe_pc(), offset);
20	20
21	21	return ret;
22	22	}
r17788	r17789
71	71	break;
72	72
73	73	default:
74		logerror("Unemulated protection command=%02X.  PC=%04X\n", m_protection_command, cpu_get_pc(&space.device()));
	74	logerror("Unemulated protection command=%02X.  PC=%04X\n", m_protection_command, space.device().safe_pc());
75	75	break;
76	76	}
77	77
r17788	r17789
87	87	else if (offset >= 0x0d00 && offset <= 0x0d05)
88	88	RAM[BASE + offset] = data;   /* source table */
89	89	else
90		logerror("Unknown protection write=%02X.  PC=%04X  Offset=%04X\n", data, cpu_get_pc(&space.device()), offset);
	90	logerror("Unknown protection write=%02X.  PC=%04X  Offset=%04X\n", data, space.device().safe_pc(), offset);
91	91	}
92	92

trunk/src/mame/machine/md_cart.c

r17788	r17789
418	418	}
419	419	else
420	420	{
421		logerror("%06x chifi3, bankw? %04x %04x\n", cpu_get_pc(&space->device()), offset, data);
	421	logerror("%06x chifi3, bankw? %04x %04x\n", space->device().safe_pc(), offset, data);
422	422	}
423	423
424	424	}
r17788	r17789
435	435	04cefa chifi3, prot_r? 65262
436	436	*/
437	437
438		if (cpu_get_pc(&space->device()) == 0x01782) // makes 'VS' screen appear
	438	if (space->device().safe_pc() == 0x01782) // makes 'VS' screen appear
439	439	{
440	440	retdat = cpu_get_reg(&space->device(), M68K_D3) & 0xff;
441	441	retdat <<= 8;
442	442	return retdat;
443	443	}
444		else if (cpu_get_pc(&space->device()) == 0x1c24) // background gfx etc.
	444	else if (space->device().safe_pc() == 0x1c24) // background gfx etc.
445	445	{
446	446	retdat = cpu_get_reg(&space->device(), M68K_D3) & 0xff;
447	447	retdat <<= 8;
448	448	return retdat;
449	449	}
450		else if (cpu_get_pc(&space->device()) == 0x10c4a) // unknown
	450	else if (space->device().safe_pc() == 0x10c4a) // unknown
451	451	{
452	452	return space->machine().rand();
453	453	}
454		else if (cpu_get_pc(&space->device()) == 0x10c50) // unknown
	454	else if (space->device().safe_pc() == 0x10c50) // unknown
455	455	{
456	456	return space->machine().rand();
457	457	}
458		else if (cpu_get_pc(&space->device()) == 0x10c52) // relates to the game speed..
	458	else if (space->device().safe_pc() == 0x10c52) // relates to the game speed..
459	459	{
460	460	retdat = cpu_get_reg(&space->device(), M68K_D4) & 0xff;
461	461	retdat <<= 8;
462	462	return retdat;
463	463	}
464		else if (cpu_get_pc(&space->device()) == 0x061ae)
	464	else if (space->device().safe_pc() == 0x061ae)
465	465	{
466	466	retdat = cpu_get_reg(&space->device(), M68K_D3) & 0xff;
467	467	retdat <<= 8;
468	468	return retdat;
469	469	}
470		else if (cpu_get_pc(&space->device()) == 0x061b0)
	470	else if (space->device().safe_pc() == 0x061b0)
471	471	{
472	472	retdat = cpu_get_reg(&space->device(), M68K_D3) & 0xff;
473	473	retdat <<= 8;
r17788	r17789
475	475	}
476	476	else
477	477	{
478		logerror("%06x chifi3, prot_r? %04x\n", cpu_get_pc(&space->device()), offset);
	478	logerror("%06x chifi3, prot_r? %04x\n", space->device().safe_pc(), offset);
479	479	}
480	480
481	481	return 0;
r17788	r17789
504	504	*************************************/
505	505	static READ16_HANDLER( soulb_400006_r )
506	506	{
507		//  printf("%06x soulb_400006_r\n",cpu_get_pc(&space->device()));
	507	//  printf("%06x soulb_400006_r\n",space->device().safe_pc());
508	508	return 0xf000;
509	509	}
510	510
511	511	static READ16_HANDLER( soulb_400002_r )
512	512	{
513		//  printf("%06x soulb_400002_r\n",cpu_get_pc(&space->device()));
	513	//  printf("%06x soulb_400002_r\n",space->device().safe_pc());
514	514	return 0x9800;
515	515	}
516	516
517	517	static READ16_HANDLER( soulb_400004_r )
518	518	{
519	519	//  return 0x9800;
520		//  printf("%06x soulb_400004_r\n",cpu_get_pc(&space->device()));
	520	//  printf("%06x soulb_400004_r\n",space->device().safe_pc());
521	521	//
522	522	return 0xc900;
523	523	//aa
r17788	r17789
742	742	cpu #0 (PC=001771A2): unmapped program memory word read from 006BD294 & 00FF
743	743	*/
744	744
745		if (cpu_get_pc(&space->device())==0x1771a2) return 0x50;
	745	if (space->device().safe_pc()==0x1771a2) return 0x50;
746	746	else
747	747	{
748	748	x++;
749		logerror("%06x topfig_6BD294_r %04x\n",cpu_get_pc(&space->device()), x);
	749	logerror("%06x topfig_6BD294_r %04x\n",space->device().safe_pc(), x);
750	750	return x;
751	751	}
752	752	}
r17788	r17789
755	755	{
756	756	static int x = -1;
757	757
758		if (cpu_get_pc(&space->device())==0x4C94E)
	758	if (space->device().safe_pc()==0x4C94E)
759	759	{
760	760	return cpu_get_reg(space->machine().device("maincpu"), (M68K_D0)) & 0xff;
761	761	}
762	762	else
763	763	{
764	764	x++;
765		logerror("%06x topfig_6F5344_r %04x\n",cpu_get_pc(&space->device()), x);
	765	logerror("%06x topfig_6F5344_r %04x\n",space->device().safe_pc(), x);
766	766	return x;
767	767	}
768	768	}
r17788	r17789
773	773	if (data == 0x002a)
774	774	{
775	775	memcpy(ROM + 0x060000, ROM + 0x570000, 0x8000); // == 0x2e*0x8000?!
776		//  printf("%06x offset %06x, data %04x\n",cpu_get_pc(&space->device()), offset, data);
	776	//  printf("%06x offset %06x, data %04x\n",space->device().safe_pc(), offset, data);
777	777
778	778	}
779	779	else if (data==0x0035) // characters ingame
r17788	r17789
789	789	memcpy(ROM + 0x060000, ROM + 0x460000, 0x8000);
790	790	memcpy(ROM + 0x020000, ROM + 0x420000, 0x8000);
791	791	memcpy(ROM + 0x058000, ROM + 0x458000, 0x8000);
792		//  printf("%06x offset %06x, data %04x\n",cpu_get_pc(&space->device()), offset, data);
	792	//  printf("%06x offset %06x, data %04x\n",space->device().safe_pc(), offset, data);
793	793	}
794	794	else
795	795	{
796		logerror("%06x offset %06x, data %04x\n", cpu_get_pc(&space->device()), offset, data);
	796	logerror("%06x offset %06x, data %04x\n", space->device().safe_pc(), offset, data);
797	797	}
798	798
799	799	}

trunk/src/mame/machine/flstory.c

r17788	r17789
23	23	READ8_MEMBER(flstory_state::flstory_68705_port_a_r)
24	24	{
25	25
26		//logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(&space.device()), m_port_a_in);
	26	//logerror("%04x: 68705 port A read %02x\n", space.device().safe_pc(), m_port_a_in);
27	27	return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
28	28	}
29	29
30	30	WRITE8_MEMBER(flstory_state::flstory_68705_port_a_w)
31	31	{
32	32
33		//logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(&space.device()), data);
	33	//logerror("%04x: 68705 port A write %02x\n", space.device().safe_pc(), data);
34	34	m_port_a_out = data;
35	35	}
36	36
r17788	r17789
57	57
58	58	WRITE8_MEMBER(flstory_state::flstory_68705_port_b_w)
59	59	{
60		//logerror("%04x: 68705 port B write %02x\n",cpu_get_pc(&space.device()),data);
	60	//logerror("%04x: 68705 port B write %02x\n",space.device().safe_pc(),data);
61	61
62	62	if ((m_ddr_b & 0x02) && (~data & 0x02) && (m_port_b_out & 0x02))
63	63	{
r17788	r17789
93	93	if (!m_mcu_sent)
94	94	m_port_c_in |= 0x02;
95	95
96		//logerror("%04x: 68705 port C read %02x\n", cpu_get_pc(&space.device()), port_c_in);
	96	//logerror("%04x: 68705 port C read %02x\n", space.device().safe_pc(), port_c_in);
97	97	return (m_port_c_out & m_ddr_c) | (m_port_c_in & ~m_ddr_c);
98	98	}
99	99
100	100	WRITE8_MEMBER(flstory_state::flstory_68705_port_c_w)
101	101	{
102		logerror("%04x: 68705 port C write %02x\n", cpu_get_pc(&space.device()), data);
	102	logerror("%04x: 68705 port C write %02x\n", space.device().safe_pc(), data);
103	103	m_port_c_out = data;
104	104	}
105	105
r17788	r17789
111	111	WRITE8_MEMBER(flstory_state::flstory_mcu_w)
112	112	{
113	113
114		logerror("%04x: mcu_w %02x\n", cpu_get_pc(&space.device()), data);
	114	logerror("%04x: mcu_w %02x\n", space.device().safe_pc(), data);
115	115	m_from_main = data;
116	116	m_main_sent = 1;
117	117	device_set_input_line(m_mcu, 0, ASSERT_LINE);
r17788	r17789
120	120	READ8_MEMBER(flstory_state::flstory_mcu_r)
121	121	{
122	122
123		logerror("%04x: mcu_r %02x\n",cpu_get_pc(&space.device()), m_from_mcu);
	123	logerror("%04x: mcu_r %02x\n",space.device().safe_pc(), m_from_mcu);
124	124	m_mcu_sent = 0;
125	125	return m_from_mcu;
126	126	}
r17788	r17789
131	131
132	132	/* bit 0 = when 1, mcu is ready to receive data from main cpu */
133	133	/* bit 1 = when 1, mcu has sent data to the main cpu */
134		//logerror("%04x: mcu_status_r\n", cpu_get_pc(&space.device()));
	134	//logerror("%04x: mcu_status_r\n", space.device().safe_pc());
135	135	if (!m_main_sent)
136	136	res |= 0x01;
137	137	if (m_mcu_sent)
r17788	r17789
258	258
259	259	READ8_MEMBER(flstory_state::victnine_mcu_r)
260	260	{
261		//logerror("%04x: mcu read (0x%02x)\n", cpu_get_previouspc(&space.device()), m_from_mcu);
	261	//logerror("%04x: mcu read (0x%02x)\n", space.device().safe_pcbase(), m_from_mcu);
262	262
263	263	return m_from_mcu - VICTNINE_MCU_SEED;
264	264	}

trunk/src/mame/machine/smpc.c

r17788	r17789
716	716	smpc_nmi_set(space->machine(),data & 1);
717	717	break;
718	718	default:
719		printf ("cpu '%s' (PC=%08X) SMPC: undocumented Command %02x\n", space->device().tag(), cpu_get_pc(&space->device()), data);
	719	printf ("cpu '%s' (PC=%08X) SMPC: undocumented Command %02x\n", space->device().tag(), space->device().safe_pc(), data);
720	720	}
721	721	}
722	722
r17788	r17789
883	883	}
884	884	}
885	885
886		if (LOG_SMPC) logerror ("cpu %s (PC=%08X) SMPC: Read from Byte Offset %02x (%d) Returns %02x\n", space->device().tag(), cpu_get_pc(&space->device()), offset, offset>>1, return_data);
	886	if (LOG_SMPC) logerror ("cpu %s (PC=%08X) SMPC: Read from Byte Offset %02x (%d) Returns %02x\n", space->device().tag(), space->device().safe_pc(), offset, offset>>1, return_data);
887	887
888	888
889	889	return return_data;

trunk/src/mame/machine/segas32.c

r17788	r17789
224	224	WRITE16_MEMBER(segas32_state::darkedge_protection_w)
225	225	{
226	226	logerror("%06x:darkedge_prot_w(%06X) = %04X & %04X\n",
227		cpu_get_pc(&space.device()), 0xa00000 + 2*offset, data, mem_mask);
	227	space.device().safe_pc(), 0xa00000 + 2*offset, data, mem_mask);
228	228	}
229	229
230	230
231	231	READ16_MEMBER(segas32_state::darkedge_protection_r)
232	232	{
233	233	logerror("%06x:darkedge_prot_r(%06X) & %04X\n",
234		cpu_get_pc(&space.device()), 0xa00000 + 2*offset, mem_mask);
	234	space.device().safe_pc(), 0xa00000 + 2*offset, mem_mask);
235	235	return 0xffff;
236	236	}
237	237
r17788	r17789
284	284	// protection ram is 8-bits wide and only occupies every other address
285	285	READ16_MEMBER(segas32_state::arabfgt_protection_r)
286	286	{
287		int PC = cpu_get_pc(&space.device());
	287	int PC = space.device().safe_pc();
288	288	int cmpVal;
289	289
290	290	if (PC == 0xfe0325 || PC == 0xfe01e5 || PC == 0xfe035e || PC == 0xfe03cc)

trunk/src/mame/machine/slapfght.c

r17788	r17789
266	266	getstar_val = 0x76;
267	267	break;
268	268	default:
269		logerror("%04x: getstar_e803_r - cmd = %02x\n",cpu_get_pc(&space.device()),m_getstar_cmd);
	269	logerror("%04x: getstar_e803_r - cmd = %02x\n",space.device().safe_pc(),m_getstar_cmd);
270	270	break;
271	271	}
272	272	break;
273	273	case GTSTARB1:
274	274	/* value isn't computed by the bootleg but we want to please the "test mode" */
275		if (cpu_get_pc(&space.device()) == 0x6b04) return (lives_lookup_table[m_gs_a]);
	275	if (space.device().safe_pc() == 0x6b04) return (lives_lookup_table[m_gs_a]);
276	276	break;
277	277	case GTSTARB2:
278	278	/*
r17788	r17789
285	285	0576: BE            cp   (hl)
286	286	0577: C2 6E 05      jp   nz,$056E
287	287	*/
288		if (cpu_get_pc(&space.device()) == 0x056e) return (getstar_val);
289		if (cpu_get_pc(&space.device()) == 0x0570) return (getstar_val+1);
290		if (cpu_get_pc(&space.device()) == 0x0577) return ((getstar_val+0x05) ^ 0x56);
	288	if (space.device().safe_pc() == 0x056e) return (getstar_val);
	289	if (space.device().safe_pc() == 0x0570) return (getstar_val+1);
	290	if (space.device().safe_pc() == 0x0577) return ((getstar_val+0x05) ^ 0x56);
291	291	/* value isn't computed by the bootleg but we want to please the "test mode" */
292		if (cpu_get_pc(&space.device()) == 0x6b04) return (lgsb2_lookup_table[m_gs_a]);
	292	if (space.device().safe_pc() == 0x6b04) return (lgsb2_lookup_table[m_gs_a]);
293	293	break;
294	294	default:
295		logerror("%04x: getstar_e803_r - cmd = %02x - unknown set !\n",cpu_get_pc(&space.device()),m_getstar_cmd);
	295	logerror("%04x: getstar_e803_r - cmd = %02x - unknown set !\n",space.device().safe_pc(),m_getstar_cmd);
296	296	break;
297	297	}
298	298	return getstar_val;
r17788	r17789
304	304	{
305	305	case GETSTAR:
306	306	/* unknown effect - not read back */
307		if (cpu_get_pc(&space.device()) == 0x00bf)
	307	if (space.device().safe_pc() == 0x00bf)
308	308	{
309	309	m_getstar_cmd = 0x00;
310	310	GS_RESET_REGS
311	311	}
312	312	/* players inputs */
313		if (cpu_get_pc(&space.device()) == 0x0560)
	313	if (space.device().safe_pc() == 0x0560)
314	314	{
315	315	m_getstar_cmd = 0x25;
316	316	GS_RESET_REGS
317	317	}
318		if (cpu_get_pc(&space.device()) == 0x056d)
	318	if (space.device().safe_pc() == 0x056d)
319	319	{
320	320	m_getstar_cmd = 0x25;
321	321	GS_SAVE_REGS
322	322	}
323	323	/* lose life */
324		if (cpu_get_pc(&space.device()) == 0x0a0a)
	324	if (space.device().safe_pc() == 0x0a0a)
325	325	{
326	326	m_getstar_cmd = 0x21;
327	327	GS_RESET_REGS
328	328	}
329		if (cpu_get_pc(&space.device()) == 0x0a17)
	329	if (space.device().safe_pc() == 0x0a17)
330	330	{
331	331	m_getstar_cmd = 0x21;
332	332	GS_SAVE_REGS
333	333	}
334	334	/* unknown effect */
335		if (cpu_get_pc(&space.device()) == 0x0a51)
	335	if (space.device().safe_pc() == 0x0a51)
336	336	{
337	337	m_getstar_cmd = 0x29;
338	338	GS_RESET_REGS
339	339	}
340		if (cpu_get_pc(&space.device()) == 0x0a6e)
	340	if (space.device().safe_pc() == 0x0a6e)
341	341	{
342	342	m_getstar_cmd = 0x29;
343	343	GS_SAVE_REGS
344	344	}
345	345	/* continue play */
346		if (cpu_get_pc(&space.device()) == 0x0ae3)
	346	if (space.device().safe_pc() == 0x0ae3)
347	347	{
348	348	m_getstar_cmd = 0x20;
349	349	GS_RESET_REGS
350	350	}
351		if (cpu_get_pc(&space.device()) == 0x0af0)
	351	if (space.device().safe_pc() == 0x0af0)
352	352	{
353	353	m_getstar_cmd = 0x20;
354	354	GS_SAVE_REGS
355	355	}
356	356	/* unknown effect - not read back */
357		if (cpu_get_pc(&space.device()) == 0x0b62)
	357	if (space.device().safe_pc() == 0x0b62)
358	358	{
359	359	m_getstar_cmd = 0x00;     /* 0x1f */
360	360	GS_RESET_REGS
361	361	}
362	362	/* change player (if 2 players game) */
363		if (cpu_get_pc(&space.device()) == 0x0bab)
	363	if (space.device().safe_pc() == 0x0bab)
364	364	{
365	365	m_getstar_cmd = 0x2a;
366	366	GS_RESET_REGS
367	367	}
368		if (cpu_get_pc(&space.device()) == 0x0bb8)
	368	if (space.device().safe_pc() == 0x0bb8)
369	369	{
370	370	m_getstar_cmd = 0x2a;
371	371	GS_SAVE_REGS
372	372	}
373	373	/* game phase */
374		if (cpu_get_pc(&space.device()) == 0x0d37)
	374	if (space.device().safe_pc() == 0x0d37)
375	375	{
376	376	m_getstar_cmd = 0x24;
377	377	GS_RESET_REGS
378	378	}
379		if (cpu_get_pc(&space.device()) == 0x0d44)
	379	if (space.device().safe_pc() == 0x0d44)
380	380	{
381	381	m_getstar_cmd = 0x24;
382	382	GS_SAVE_REGS
383	383	}
384	384	/* starting lives */
385		if (cpu_get_pc(&space.device()) == 0x0d79)
	385	if (space.device().safe_pc() == 0x0d79)
386	386	{
387	387	m_getstar_cmd = 0x23;
388	388	GS_RESET_REGS
389	389	}
390		if (cpu_get_pc(&space.device()) == 0x0d8a)
	390	if (space.device().safe_pc() == 0x0d8a)
391	391	{
392	392	m_getstar_cmd = 0x23;
393	393	GS_SAVE_REGS
394	394	}
395	395	/* starting difficulty */
396		if (cpu_get_pc(&space.device()) == 0x0dc1)
	396	if (space.device().safe_pc() == 0x0dc1)
397	397	{
398	398	m_getstar_cmd = 0x22;
399	399	GS_RESET_REGS
400	400	}
401		if (cpu_get_pc(&space.device()) == 0x0dd0)
	401	if (space.device().safe_pc() == 0x0dd0)
402	402	{
403	403	m_getstar_cmd = 0x22;
404	404	GS_SAVE_REGS
405	405	}
406	406	/* starting lives (again) */
407		if (cpu_get_pc(&space.device()) == 0x1011)
	407	if (space.device().safe_pc() == 0x1011)
408	408	{
409	409	m_getstar_cmd = 0x23;
410	410	GS_RESET_REGS
411	411	}
412		if (cpu_get_pc(&space.device()) == 0x101e)
	412	if (space.device().safe_pc() == 0x101e)
413	413	{
414	414	m_getstar_cmd = 0x23;
415	415	GS_SAVE_REGS
416	416	}
417	417	/* hardware test */
418		if (cpu_get_pc(&space.device()) == 0x107a)
	418	if (space.device().safe_pc() == 0x107a)
419	419	{
420	420	m_getstar_cmd = 0x73;
421	421	GS_RESET_REGS
422	422	}
423	423	/* game phase (again) */
424		if (cpu_get_pc(&space.device()) == 0x10c6)
	424	if (space.device().safe_pc() == 0x10c6)
425	425	{
426	426	m_getstar_cmd = 0x24;
427	427	GS_RESET_REGS
428	428	}
429		if (cpu_get_pc(&space.device()) == 0x10d3)
	429	if (space.device().safe_pc() == 0x10d3)
430	430	{
431	431	m_getstar_cmd = 0x24;
432	432	GS_SAVE_REGS
433	433	}
434	434	/* background */
435		if (cpu_get_pc(&space.device()) == 0x1910)
	435	if (space.device().safe_pc() == 0x1910)
436	436	{
437	437	m_getstar_cmd = 0x26;
438	438	GS_RESET_REGS
439	439	}
440		if (cpu_get_pc(&space.device()) == 0x191d)
	440	if (space.device().safe_pc() == 0x191d)
441	441	{
442	442	m_getstar_cmd = 0x26;
443	443	GS_SAVE_REGS
444	444	}
445	445	/* foreground */
446		if (cpu_get_pc(&space.device()) == 0x19d5)
	446	if (space.device().safe_pc() == 0x19d5)
447	447	{
448	448	m_getstar_cmd = 0x37;
449	449	GS_RESET_REGS
450	450	}
451		if (cpu_get_pc(&space.device()) == 0x19e4)
	451	if (space.device().safe_pc() == 0x19e4)
452	452	{
453	453	m_getstar_cmd = 0x37;
454	454	GS_SAVE_REGS
455	455	}
456		if (cpu_get_pc(&space.device()) == 0x19f1)
	456	if (space.device().safe_pc() == 0x19f1)
457	457	{
458	458	m_getstar_cmd = 0x37;
459	459	/* do NOT update the registers because there are 2 writes before 2 reads ! */
460	460	}
461	461	/* laser position */
462		if (cpu_get_pc(&space.device()) == 0x26af)
	462	if (space.device().safe_pc() == 0x26af)
463	463	{
464	464	m_getstar_cmd = 0x38;
465	465	GS_RESET_REGS
466	466	}
467		if (cpu_get_pc(&space.device()) == 0x26be)
	467	if (space.device().safe_pc() == 0x26be)
468	468	{
469	469	m_getstar_cmd = 0x38;
470	470	GS_SAVE_REGS
471	471	}
472		if (cpu_get_pc(&space.device()) == 0x26cb)
	472	if (space.device().safe_pc() == 0x26cb)
473	473	{
474	474	m_getstar_cmd = 0x38;
475	475	/* do NOT update the registers because there are 2 writes before 2 reads ! */
476	476	}
477	477	/* starting lives (for "test mode") */
478		if (cpu_get_pc(&space.device()) == 0x6a27)
	478	if (space.device().safe_pc() == 0x6a27)
479	479	{
480	480	m_getstar_cmd = 0x23;
481	481	GS_RESET_REGS
482	482	}
483		if (cpu_get_pc(&space.device()) == 0x6a38)
	483	if (space.device().safe_pc() == 0x6a38)
484	484	{
485	485	m_getstar_cmd = 0x23;
486	486	GS_SAVE_REGS
r17788	r17789
488	488	break;
489	489	case GETSTARJ:
490	490	/* unknown effect - not read back */
491		if (cpu_get_pc(&space.device()) == 0x00bf)
	491	if (space.device().safe_pc() == 0x00bf)
492	492	{
493	493	m_getstar_cmd = 0x00;
494	494	GS_RESET_REGS
495	495	}
496	496	/* players inputs */
497		if (cpu_get_pc(&space.device()) == 0x0560)
	497	if (space.device().safe_pc() == 0x0560)
498	498	{
499	499	m_getstar_cmd = 0x25;
500	500	GS_RESET_REGS
501	501	}
502		if (cpu_get_pc(&space.device()) == 0x056d)
	502	if (space.device().safe_pc() == 0x056d)
503	503	{
504	504	m_getstar_cmd = 0x25;
505	505	GS_SAVE_REGS
506	506	}
507	507	/* lose life */
508		if (cpu_get_pc(&space.device()) == 0x0ad5)
	508	if (space.device().safe_pc() == 0x0ad5)
509	509	{
510	510	m_getstar_cmd = 0x21;
511	511	GS_RESET_REGS
512	512	}
513		if (cpu_get_pc(&space.device()) == 0x0ae2)
	513	if (space.device().safe_pc() == 0x0ae2)
514	514	{
515	515	m_getstar_cmd = 0x21;
516	516	GS_SAVE_REGS
517	517	}
518	518	/* unknown effect */
519		if (cpu_get_pc(&space.device()) == 0x0b1c)
	519	if (space.device().safe_pc() == 0x0b1c)
520	520	{
521	521	m_getstar_cmd = 0x29;
522	522	GS_RESET_REGS
523	523	}
524		if (cpu_get_pc(&space.device()) == 0x0b29)
	524	if (space.device().safe_pc() == 0x0b29)
525	525	{
526	526	m_getstar_cmd = 0x29;
527	527	GS_SAVE_REGS
528	528	}
529	529	/* continue play */
530		if (cpu_get_pc(&space.device()) == 0x0bae)
	530	if (space.device().safe_pc() == 0x0bae)
531	531	{
532	532	m_getstar_cmd = 0x20;
533	533	GS_RESET_REGS
534	534	}
535		if (cpu_get_pc(&space.device()) == 0x0bbb)
	535	if (space.device().safe_pc() == 0x0bbb)
536	536	{
537	537	m_getstar_cmd = 0x20;
538	538	GS_SAVE_REGS
539	539	}
540	540	/* unknown effect - not read back */
541		if (cpu_get_pc(&space.device()) == 0x0c2d)
	541	if (space.device().safe_pc() == 0x0c2d)
542	542	{
543	543	m_getstar_cmd = 0x00;     /* 0x1f */
544	544	GS_RESET_REGS
545	545	}
546	546	/* change player (if 2 players game) */
547		if (cpu_get_pc(&space.device()) == 0x0c76)
	547	if (space.device().safe_pc() == 0x0c76)
548	548	{
549	549	m_getstar_cmd = 0x2a;
550	550	GS_RESET_REGS
551	551	}
552		if (cpu_get_pc(&space.device()) == 0x0c83)
	552	if (space.device().safe_pc() == 0x0c83)
553	553	{
554	554	m_getstar_cmd = 0x2a;
555	555	GS_SAVE_REGS
556	556	}
557	557	/* game phase */
558		if (cpu_get_pc(&space.device()) == 0x0e02)
	558	if (space.device().safe_pc() == 0x0e02)
559	559	{
560	560	m_getstar_cmd = 0x24;
561	561	GS_RESET_REGS
562	562	}
563		if (cpu_get_pc(&space.device()) == 0x0e0f)
	563	if (space.device().safe_pc() == 0x0e0f)
564	564	{
565	565	m_getstar_cmd = 0x24;
566	566	GS_SAVE_REGS
567	567	}
568	568	/* starting lives */
569		if (cpu_get_pc(&space.device()) == 0x0e44)
	569	if (space.device().safe_pc() == 0x0e44)
570	570	{
571	571	m_getstar_cmd = 0x23;
572	572	GS_RESET_REGS
573	573	}
574		if (cpu_get_pc(&space.device()) == 0x0e55)
	574	if (space.device().safe_pc() == 0x0e55)
575	575	{
576	576	m_getstar_cmd = 0x23;
577	577	GS_SAVE_REGS
578	578	}
579	579	/* starting difficulty */
580		if (cpu_get_pc(&space.device()) == 0x0e8c)
	580	if (space.device().safe_pc() == 0x0e8c)
581	581	{
582	582	m_getstar_cmd = 0x22;
583	583	GS_RESET_REGS
584	584	}
585		if (cpu_get_pc(&space.device()) == 0x0e9b)
	585	if (space.device().safe_pc() == 0x0e9b)
586	586	{
587	587	m_getstar_cmd = 0x22;
588	588	GS_SAVE_REGS
589	589	}
590	590	/* starting lives (again) */
591		if (cpu_get_pc(&space.device()) == 0x10d6)
	591	if (space.device().safe_pc() == 0x10d6)
592	592	{
593	593	m_getstar_cmd = 0x23;
594	594	GS_RESET_REGS
595	595	}
596		if (cpu_get_pc(&space.device()) == 0x10e3)
	596	if (space.device().safe_pc() == 0x10e3)
597	597	{
598	598	m_getstar_cmd = 0x23;
599	599	GS_SAVE_REGS
600	600	}
601	601	/* hardware test */
602		if (cpu_get_pc(&space.device()) == 0x113f)
	602	if (space.device().safe_pc() == 0x113f)
603	603	{
604	604	m_getstar_cmd = 0x73;
605	605	GS_RESET_REGS
606	606	}
607	607	/* game phase (again) */
608		if (cpu_get_pc(&space.device()) == 0x118b)
	608	if (space.device().safe_pc() == 0x118b)
609	609	{
610	610	m_getstar_cmd = 0x24;
611	611	GS_RESET_REGS
612	612	}
613		if (cpu_get_pc(&space.device()) == 0x1198)
	613	if (space.device().safe_pc() == 0x1198)
614	614	{
615	615	m_getstar_cmd = 0x24;
616	616	GS_SAVE_REGS
617	617	}
618	618	/* background */
619		if (cpu_get_pc(&space.device()) == 0x19f8)
	619	if (space.device().safe_pc() == 0x19f8)
620	620	{
621	621	m_getstar_cmd = 0x26;
622	622	GS_RESET_REGS
623	623	}
624		if (cpu_get_pc(&space.device()) == 0x1a05)
	624	if (space.device().safe_pc() == 0x1a05)
625	625	{
626	626	m_getstar_cmd = 0x26;
627	627	GS_SAVE_REGS
628	628	}
629	629	/* foreground */
630		if (cpu_get_pc(&space.device()) == 0x1abd)
	630	if (space.device().safe_pc() == 0x1abd)
631	631	{
632	632	m_getstar_cmd = 0x37;
633	633	GS_RESET_REGS
634	634	}
635		if (cpu_get_pc(&space.device()) == 0x1acc)
	635	if (space.device().safe_pc() == 0x1acc)
636	636	{
637	637	m_getstar_cmd = 0x37;
638	638	GS_SAVE_REGS
639	639	}
640		if (cpu_get_pc(&space.device()) == 0x1ad9)
	640	if (space.device().safe_pc() == 0x1ad9)
641	641	{
642	642	m_getstar_cmd = 0x37;
643	643	/* do NOT update the registers because there are 2 writes before 2 reads ! */
644	644	}
645	645	/* laser position */
646		if (cpu_get_pc(&space.device()) == 0x2792)
	646	if (space.device().safe_pc() == 0x2792)
647	647	{
648	648	m_getstar_cmd = 0x38;
649	649	GS_RESET_REGS
650	650	}
651		if (cpu_get_pc(&space.device()) == 0x27a1)
	651	if (space.device().safe_pc() == 0x27a1)
652	652	{
653	653	m_getstar_cmd = 0x38;
654	654	GS_SAVE_REGS
655	655	}
656		if (cpu_get_pc(&space.device()) == 0x27ae)
	656	if (space.device().safe_pc() == 0x27ae)
657	657	{
658	658	m_getstar_cmd = 0x38;
659	659	/* do NOT update the registers because there are 2 writes before 2 reads ! */
660	660	}
661	661	/* starting lives (for "test mode") */
662		if (cpu_get_pc(&space.device()) == 0x6ae2)
	662	if (space.device().safe_pc() == 0x6ae2)
663	663	{
664	664	m_getstar_cmd = 0x23;
665	665	GS_RESET_REGS
666	666	}
667		if (cpu_get_pc(&space.device()) == 0x6af3)
	667	if (space.device().safe_pc() == 0x6af3)
668	668	{
669	669	m_getstar_cmd = 0x23;
670	670	GS_SAVE_REGS
r17788	r17789
696	696	6B01: 3A 03 E8      ld   a,($E803)
697	697	We save the regs though to hack it in 'getstar_e803_r' read handler.
698	698	*/
699		if (cpu_get_pc(&space.device()) == 0x6ae2)
	699	if (space.device().safe_pc() == 0x6ae2)
700	700	{
701	701	m_getstar_cmd = 0x00;
702	702	GS_RESET_REGS
703	703	}
704		if (cpu_get_pc(&space.device()) == 0x6af3)
	704	if (space.device().safe_pc() == 0x6af3)
705	705	{
706	706	m_getstar_cmd = 0x00;
707	707	GS_SAVE_REGS
r17788	r17789
735	735	6B01: 3A 03 E8      ld   a,($E803)
736	736	We save the regs though to hack it in 'getstar_e803_r' read handler.
737	737	*/
738		if (cpu_get_pc(&space.device()) == 0x6ae2)
	738	if (space.device().safe_pc() == 0x6ae2)
739	739	{
740	740	m_getstar_cmd = 0x00;
741	741	GS_RESET_REGS
742	742	}
743		if (cpu_get_pc(&space.device()) == 0x6af3)
	743	if (space.device().safe_pc() == 0x6af3)
744	744	{
745	745	m_getstar_cmd = 0x00;
746	746	GS_SAVE_REGS
747	747	}
748	748	break;
749	749	default:
750		logerror("%04x: getstar_e803_w - data = %02x - unknown set !\n",cpu_get_pc(&space.device()),data);
	750	logerror("%04x: getstar_e803_w - data = %02x - unknown set !\n",space.device().safe_pc(),data);
751	751	break;
752	752	}
753	753	}
r17788	r17789
756	756	WRITE8_MEMBER(slapfght_state::getstar_sh_intenable_w)
757	757	{
758	758	m_getstar_sh_intenabled = 1;
759		logerror("cpu #1 PC=%d: %d written to a0e0\n",cpu_get_pc(&space.device()),data);
	759	logerror("cpu #1 PC=%d: %d written to a0e0\n",space.device().safe_pc(),data);
760	760	}
761	761
762	762
r17788	r17789
879	879	tigerhb_val = 0x83;
880	880	break;
881	881	default:
882		logerror("%04x: tigerhb_e803_r - cmd = %02x\n",cpu_get_pc(&space.device()),m_getstar_cmd);
	882	logerror("%04x: tigerhb_e803_r - cmd = %02x\n",space.device().safe_pc(),m_getstar_cmd);
883	883	break;
884	884	}
885	885	return tigerhb_val;
r17788	r17789
894	894	m_tigerhb_cmd = 0x73;
895	895	break;
896	896	default:
897		logerror("%04x: tigerhb_e803_w - data = %02x\n",cpu_get_pc(&space.device()),data);
	897	logerror("%04x: tigerhb_e803_w - data = %02x\n",space.device().safe_pc(),data);
898	898	m_tigerhb_cmd = 0x00;
899	899	break;
900	900	}

trunk/src/mame/machine/kaneko_toybox.c

r17788	r17789
179	179	*/
180	180	READ16_MEMBER(kaneko_toybox_device::toybox_mcu_status_r)
181	181	{
182		logerror("CPU %s (PC=%06X) : read MCU status\n", space.device().tag(), cpu_get_previouspc(&space.device()));
	182	logerror("CPU %s (PC=%06X) : read MCU status\n", space.device().tag(), space.device().safe_pcbase());
183	183	return 0; // most games test bit 0 for failure
184	184	}
185	185

trunk/src/mame/machine/pgmprot4.c

r17788	r17789
286	286	state->m_kb_cmd = data;
287	287	else //offset==2
288	288	{
289		logerror("%06X: ASIC25 W CMD %X  VAL %X\n", cpu_get_pc(&space->device()), state->m_kb_cmd, data);
	289	logerror("%06X: ASIC25 W CMD %X  VAL %X\n", space->device().safe_pc(), state->m_kb_cmd, data);
290	290	if (state->m_kb_cmd == 0)
291	291	state->m_kb_reg = data;
292	292	else if (state->m_kb_cmd == 2)
r17788	r17789
342	342
343	343	}
344	344	}
345		logerror("%06X: ASIC25 R CMD %X  VAL %X\n", cpu_get_pc(&space->device()), state->m_kb_cmd, res);
	345	logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space->device().safe_pc(), state->m_kb_cmd, res);
346	346	return res;
347	347	}
348	348
r17788	r17789
461	461	state->m_kb_cmd=data;
462	462	else //offset==2
463	463	{
464		printf("%06X: ASIC25 W CMD %X  VAL %X\n",cpu_get_pc(&space->device()),state->m_kb_cmd,data);
	464	printf("%06X: ASIC25 W CMD %X  VAL %X\n",space->device().safe_pc(),state->m_kb_cmd,data);
465	465	if(state->m_kb_cmd==0)
466	466	reg=data;
467	467	else if(state->m_kb_cmd==3)   //??????????
r17788	r17789
518	518
519	519	}
520	520	}
521		logerror("%06X: ASIC25 R CMD %X  VAL %X\n",cpu_get_pc(&space->device()),state->m_kb_cmd,res);
	521	logerror("%06X: ASIC25 R CMD %X  VAL %X\n",space->device().safe_pc(),state->m_kb_cmd,res);
522	522	return res;
523	523	}
524	524

trunk/src/mame/machine/decocass.c

r17788	r17789
210	210	WRITE8_HANDLER( decocass_reset_w )
211	211	{
212	212	decocass_state *state = space->machine().driver_data<decocass_state>();
213		LOG(1,("%10s 6502-PC: %04x decocass_reset_w(%02x): $%02x\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	213	LOG(1,("%10s 6502-PC: %04x decocass_reset_w(%02x): $%02x\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
214	214	state->m_decocass_reset = data;
215	215
216	216	/* CPU #1 active high reset */
r17788	r17789
289	289
290	290	data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
291	291	LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_3_inv_2_r(%02x): $%02x <- (%s %s)\n",
292		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data,
	292	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
293	293	(data & 1) ? "OBF" : "-",
294	294	(data & 2) ? "IBF" : "-"));
295	295	}
r17788	r17789
337	337	(((prom[promaddr] >> 4) & 1)            << MAP7(state->m_type1_outmap));
338	338
339	339	LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_3_inv_2_r(%02x): $%02x\n",
340		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	340	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
341	341
342	342	state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
343	343	}
r17788	r17789
369	369
370	370	data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
371	371	LOG(4,("%10s 6502-PC: %04x decocass_type1_pass_136_r(%02x): $%02x <- (%s %s)\n",
372		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data,
	372	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
373	373	(data & 1) ? "OBF" : "-",
374	374	(data & 2) ? "IBF" : "-"));
375	375	}
r17788	r17789
417	417	(((prom[promaddr] >> 4) & 1)            << MAP7(state->m_type1_outmap));
418	418
419	419	LOG(3,("%10s 6502-PC: %04x decocass_type1_pass_136_r(%02x): $%02x\n",
420		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	420	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
421	421
422	422	state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
423	423	}
r17788	r17789
449	449
450	450	data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
451	451	LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_27_pass_3_inv_2_r(%02x): $%02x <- (%s %s)\n",
452		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data,
	452	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
453	453	(data & 1) ? "OBF" : "-",
454	454	(data & 2) ? "IBF" : "-"));
455	455	}
r17788	r17789
497	497	(((state->m_latch1 >> MAP7(state->m_type1_inmap)) & 1)      << MAP7(state->m_type1_outmap));
498	498
499	499	LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_27_pass_3_inv_2_r(%02x): $%02x\n",
500		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	500	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
501	501
502	502	state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
503	503	}
r17788	r17789
529	529
530	530	data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
531	531	LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_5_inv_2_r(%02x): $%02x <- (%s %s)\n",
532		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data,
	532	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
533	533	(data & 1) ? "OBF" : "-",
534	534	(data & 2) ? "IBF" : "-"));
535	535	}
r17788	r17789
577	577	(((prom[promaddr] >> 4) & 1)            << MAP7(state->m_type1_outmap));
578	578
579	579	LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_26_pass_5_inv_2_r(%02x): $%02x\n",
580		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	580	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
581	581
582	582	state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
583	583	}
r17788	r17789
611	611
612	612	data = (BIT(data, 0) << 0) | (BIT(data, 1) << 1) | 0x7c;
613	613	LOG(4,("%10s 6502-PC: %04x decocass_type1_latch_16_pass_3_inv_1_r(%02x): $%02x <- (%s %s)\n",
614		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data,
	614	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data,
615	615	(data & 1) ? "OBF" : "-",
616	616	(data & 2) ? "IBF" : "-"));
617	617	}
r17788	r17789
659	659	(((prom[promaddr] >> 4) & 1)            << MAP7(state->m_type1_outmap));
660	660
661	661	LOG(3,("%10s 6502-PC: %04x decocass_type1_latch_16_pass_3_inv_1_r(%02x): $%02x\n",
662		space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	662	space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
663	663
664	664	state->m_latch1 = save;      /* latch the data for the next A0 == 0 read */
665	665	}
r17788	r17789
689	689	{
690	690	UINT8 *prom = state->memregion("dongle")->base();
691	691	data = prom[256 * state->m_type2_d2_latch + state->m_type2_promaddr];
692		LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, 256 * state->m_type2_d2_latch + state->m_type2_promaddr));
	692	LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- prom[%03x]\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, 256 * state->m_type2_d2_latch + state->m_type2_promaddr));
693	693	}
694	694	else
695	695	{
r17788	r17789
703	703	else
704	704	data = offset & 0xff;
705	705
706		LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- 8041-%s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, offset & 1 ? "STATUS" : "DATA"));
	706	LOG(3,("%10s 6502-PC: %04x decocass_type2_r(%02x): $%02x <- 8041-%s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "STATUS" : "DATA"));
707	707	}
708	708	return data;
709	709	}
r17788	r17789
715	715	{
716	716	if (1 == (offset & 1))
717	717	{
718		LOG(4,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM+D2 latch", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	718	LOG(4,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM+D2 latch", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
719	719	}
720	720	else
721	721	{
722	722	state->m_type2_promaddr = data;
723		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM addr $%02x\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, state->m_type2_promaddr));
	723	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> set PROM addr $%02x\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, state->m_type2_promaddr));
724	724	return;
725	725	}
726	726	}
727	727	else
728	728	{
729		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA"));
	729	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s ", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041 DATA"));
730	730	}
731	731	if (1 == (offset & 1))
732	732	{
r17788	r17789
773	773	{
774	774	UINT8 *prom = state->memregion("dongle")->base();
775	775	data = prom[state->m_type3_ctrs];
776		LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, state->m_type3_ctrs));
	776	LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- prom[$%03x]\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, state->m_type3_ctrs));
777	777	if (++state->m_type3_ctrs == 4096)
778	778	state->m_type3_ctrs = 0;
779	779	}
r17788	r17789
782	782	if (0 == (offset & E5XX_MASK))
783	783	{
784	784	data = upi41_master_r(state->m_mcu, 1);
785		LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	785	LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
786	786	}
787	787	else
788	788	{
789	789	data = 0xff;   /* open data bus? */
790		LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	790	LOG(4,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
791	791	}
792	792	}
793	793	}
r17788	r17789
796	796	if (1 == state->m_type3_pal_19)
797	797	{
798	798	save = data = 0xff;    /* open data bus? */
799		LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	799	LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x <- open bus", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
800	800	}
801	801	else
802	802	{
r17788	r17789
938	938	(BIT(save, 7) << 7);
939	939	}
940	940	state->m_type3_d0_latch = save & 1;
941		LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, (data >= 32) ? data : '.'));
	941	LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- 8041-DATA\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
942	942	}
943	943	else
944	944	{
r17788	r17789
952	952	(BIT(save, 5) << 5) |
953	953	(BIT(save, 6) << 7) |
954	954	(BIT(save, 7) << 6);
955		LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, (data >= 32) ? data : '.'));
	955	LOG(3,("%10s 6502-PC: %04x decocass_type3_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
956	956	state->m_type3_d0_latch = save & 1;
957	957	}
958	958	}
r17788	r17789
969	969	if (1 == state->m_type3_pal_19)
970	970	{
971	971	state->m_type3_ctrs = data << 4;
972		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, "LDCTRS"));
	972	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, "LDCTRS"));
973	973	return;
974	974	}
975	975	else
r17788	r17789
981	981	if (1 == state->m_type3_pal_19)
982	982	{
983	983	/* write nowhere?? */
984		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, "nowhere?"));
	984	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, "nowhere?"));
985	985	return;
986	986	}
987	987	}
988		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
	988	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
989	989	upi41_master_w(state->m_mcu, offset, data);
990	990	}
991	991
r17788	r17789
1012	1012	if (0 == (offset & E5XX_MASK))
1013	1013	{
1014	1014	data = upi41_master_r(state->m_mcu, 1);
1015		LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1015	LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1016	1016	}
1017	1017	else
1018	1018	{
1019	1019	data = 0xff;   /* open data bus? */
1020		LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1020	LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1021	1021	}
1022	1022	}
1023	1023	else
r17788	r17789
1027	1027	UINT8 *prom = space->machine().root_device().memregion("dongle")->base();
1028	1028
1029	1029	data = prom[state->m_type4_ctrs];
1030		LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, (data >= 32) ? data : '.', state->m_type4_ctrs));
	1030	LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- PROM[%04x]\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.', state->m_type4_ctrs));
1031	1031	state->m_type4_ctrs = (state->m_type4_ctrs + 1) & 0x7fff;
1032	1032	}
1033	1033	else
r17788	r17789
1035	1035	if (0 == (offset & E5XX_MASK))
1036	1036	{
1037	1037	data = upi41_master_r(state->m_mcu, 0);
1038		LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, (data >= 32) ? data : '.'));
	1038	LOG(3,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
1039	1039	}
1040	1040	else
1041	1041	{
1042	1042	data = 0xff;   /* open data bus? */
1043		LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1043	LOG(4,("%10s 6502-PC: %04x decocass_type4_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1044	1044	}
1045	1045	}
1046	1046	}
r17788	r17789
1056	1056	if (1 == state->m_type4_latch)
1057	1057	{
1058	1058	state->m_type4_ctrs = (state->m_type4_ctrs & 0x00ff) | ((data & 0x7f) << 8);
1059		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, state->m_type4_ctrs));
	1059	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS MSB (%04x)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, state->m_type4_ctrs));
1060	1060	return;
1061	1061	}
1062	1062	else
r17788	r17789
1070	1070	if (state->m_type4_latch)
1071	1071	{
1072	1072	state->m_type4_ctrs = (state->m_type4_ctrs & 0xff00) | data;
1073		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, state->m_type4_ctrs));
	1073	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> CTRS LSB (%04x)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, state->m_type4_ctrs));
1074	1074	return;
1075	1075	}
1076	1076	}
1077		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
	1077	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1078	1078	upi41_master_w(state->m_mcu, offset, data);
1079	1079	}
1080	1080
r17788	r17789
1097	1097	if (0 == (offset & E5XX_MASK))
1098	1098	{
1099	1099	data = upi41_master_r(state->m_mcu, 1);
1100		LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1100	LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1101	1101	}
1102	1102	else
1103	1103	{
1104	1104	data = 0xff;   /* open data bus? */
1105		LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1105	LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1106	1106	}
1107	1107	}
1108	1108	else
r17788	r17789
1110	1110	if (state->m_type5_latch)
1111	1111	{
1112	1112	data = 0x55;   /* Only a fixed value? It looks like this is all we need to do */
1113		LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- fixed value???\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, (data >= 32) ? data : '.'));
	1113	LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- fixed value???\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
1114	1114	}
1115	1115	else
1116	1116	{
1117	1117	if (0 == (offset & E5XX_MASK))
1118	1118	{
1119	1119	data = upi41_master_r(state->m_mcu, 0);
1120		LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, (data >= 32) ? data : '.'));
	1120	LOG(3,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
1121	1121	}
1122	1122	else
1123	1123	{
1124	1124	data = 0xff;   /* open data bus? */
1125		LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1125	LOG(4,("%10s 6502-PC: %04x decocass_type5_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1126	1126	}
1127	1127	}
1128	1128	}
r17788	r17789
1137	1137	{
1138	1138	if (1 == state->m_type5_latch)
1139	1139	{
1140		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, "latch #2??"));
	1140	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, "latch #2??"));
1141	1141	return;
1142	1142	}
1143	1143	else
r17788	r17789
1149	1149	if (state->m_type5_latch)
1150	1150	{
1151	1151	/* write nowhere?? */
1152		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, "nowhere?"));
	1152	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, "nowhere?"));
1153	1153	return;
1154	1154	}
1155	1155	}
1156		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
	1156	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1157	1157	upi41_master_w(state->m_mcu, offset, data);
1158	1158	}
1159	1159
r17788	r17789
1175	1175	if (0 == (offset & E5XX_MASK))
1176	1176	{
1177	1177	data = upi41_master_r(state->m_mcu, 1);
1178		LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1178	LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- 8041 STATUS\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1179	1179	}
1180	1180	else
1181	1181	{
1182	1182	data = 0xff;   /* open data bus? */
1183		LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1183	LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1184	1184	}
1185	1185	}
1186	1186	else
r17788	r17789
1188	1188	if (0 == (offset & E5XX_MASK))
1189	1189	{
1190	1190	data = upi41_master_r(state->m_mcu, 0);
1191		LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, (data >= 32) ? data : '.'));
	1191	LOG(3,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x '%c' <- open bus (D0 replaced with latch)\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, (data >= 32) ? data : '.'));
1192	1192	}
1193	1193	else
1194	1194	{
1195	1195	data = 0xff;   /* open data bus? */
1196		LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1196	LOG(4,("%10s 6502-PC: %04x decocass_nodong_r(%02x): $%02x <- open bus\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1197	1197	}
1198	1198	}
1199	1199
r17788	r17789
1228	1228
1229	1229	LOG(4,("%10s 6502-PC: %04x decocass_e5xx_r(%02x): $%02x <- STATUS (%s%s%s%s%s%s%s%s)\n",
1230	1230	space->machine().time().as_string(6),
1231		cpu_get_previouspc(&space->device()),
	1231	space->device().safe_pcbase(),
1232	1232	offset, data,
1233	1233	data & 0x01 ? "" : "REQ/",
1234	1234	data & 0x02 ? "" : " FNO/",
r17788	r17789
1260	1260
1261	1261	if (0 == (offset & E5XX_MASK))
1262	1262	{
1263		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
	1263	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> %s\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data, offset & 1 ? "8041-CMND" : "8041-DATA"));
1264	1264	upi41_master_w(state->m_mcu, offset & 1, data);
1265	1265	#ifdef MAME_DEBUG
1266	1266	decocass_fno(space->machine(), offset, data);
r17788	r17789
1268	1268	}
1269	1269	else
1270	1270	{
1271		LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> dongle\n", space->machine().time().as_string(6), cpu_get_previouspc(&space->device()), offset, data));
	1271	LOG(3,("%10s 6502-PC: %04x decocass_e5xx_w(%02x): $%02x -> dongle\n", space->machine().time().as_string(6), space->device().safe_pcbase(), offset, data));
1272	1272	}
1273	1273	}
1274	1274
r17788	r17789
1758	1758	{
1759	1759	LOG(4,("%10s 8041-PC: %03x i8041_p1_w: $%02x (%s%s%s%s%s%s%s%s)\n",
1760	1760	space->machine().time().as_string(6),
1761		cpu_get_previouspc(&space->device()),
	1761	space->device().safe_pcbase(),
1762	1762	data,
1763	1763	data & 0x01 ? "" : "DATA-WRT",
1764	1764	data & 0x02 ? "" : " DATA-CLK",
r17788	r17789
1795	1795	{
1796	1796	LOG(4,("%10s 8041-PC: %03x i8041_p1_r: $%02x (%s%s%s%s%s%s%s%s)\n",
1797	1797	space->machine().time().as_string(6),
1798		cpu_get_previouspc(&space->device()),
	1798	space->device().safe_pcbase(),
1799	1799	data,
1800	1800	data & 0x01 ? "" : "DATA-WRT",
1801	1801	data & 0x02 ? "" : " DATA-CLK",
r17788	r17789
1817	1817	{
1818	1818	LOG(4,("%10s 8041-PC: %03x i8041_p2_w: $%02x (%s%s%s%s%s%s%s%s)\n",
1819	1819	space->machine().time().as_string(6),
1820		cpu_get_previouspc(&space->device()),
	1820	space->device().safe_pcbase(),
1821	1821	data,
1822	1822	data & 0x01 ? "" : "FNO/",
1823	1823	data & 0x02 ? "" : " EOT/",
r17788	r17789
1843	1843	{
1844	1844	LOG(4,("%10s 8041-PC: %03x i8041_p2_r: $%02x (%s%s%s%s%s%s%s%s)\n",
1845	1845	space->machine().time().as_string(6),
1846		cpu_get_previouspc(&space->device()),
	1846	space->device().safe_pcbase(),
1847	1847	data,
1848	1848	data & 0x01 ? "" : "FNO/",
1849	1849	data & 0x02 ? "" : " EOT/",

trunk/src/mame/machine/konppc.c

r17788	r17789
129	129	{
130	130	if (cgboard_id < MAX_CG_BOARDS)
131	131	{
132		//      mame_printf_debug("dsp_cmd_r: (board %d) %08X, %08X at %08X\n", cgboard_id, offset, mem_mask, cpu_get_pc(&space->device()));
	132	//      mame_printf_debug("dsp_cmd_r: (board %d) %08X, %08X at %08X\n", cgboard_id, offset, mem_mask, space->device().safe_pc());
133	133	return dsp_comm_sharc[cgboard_id][offset] | (dsp_state[cgboard_id] << 16);
134	134	}
135	135	else
r17788	r17789
144	144	const char *pcitag = (cgboard_id == 0) ? "k033906_1" : "k033906_2";
145	145	device_t *dsp = space->machine().device(dsptag);
146	146	device_t *k033906 = space->machine().device(pcitag);
147		//  mame_printf_debug("dsp_cmd_w: (board %d) %08X, %08X, %08X at %08X\n", cgboard_id, data, offset, mem_mask, cpu_get_pc(&space->device()));
	147	//  mame_printf_debug("dsp_cmd_w: (board %d) %08X, %08X, %08X at %08X\n", cgboard_id, data, offset, mem_mask, space->device().safe_pc());
148	148
149	149	if (cgboard_id < MAX_CG_BOARDS)
150	150	{

trunk/src/mame/machine/leland.c

r17788	r17789
109	109	{
110	110	/* catch the case where they clear this memory location at PC $1827 and change */
111	111	/* the value written to be a 1 */
112		if (cpu_get_previouspc(&space.device()) == 0x1827)
	112	if (space.device().safe_pcbase() == 0x1827)
113	113	*m_alleymas_kludge_mem = 1;
114	114	else
115	115	*m_alleymas_kludge_mem = data;
r17788	r17789
469	469	/* update any bankswitching */
470	470	if (LOG_BANKSWITCHING_M)
471	471	if ((m_alternate_bank ^ data) & 0x0f)
472		logerror("%04X:alternate_bank = %02X\n", cpu_get_pc(&space.device()), data & 0x0f);
	472	logerror("%04X:alternate_bank = %02X\n", space.device().safe_pc(), data & 0x0f);
473	473	m_alternate_bank = data & 15;
474	474	(*m_update_master_bank)(machine());
475	475
r17788	r17789
852	852	{
853	853	if (m_battery_ram_enable)
854	854	{
855		if (LOG_BATTERY_RAM) logerror("%04X:BatteryW@%04X=%02X\n", cpu_get_pc(&space.device()), offset, data);
	855	if (LOG_BATTERY_RAM) logerror("%04X:BatteryW@%04X=%02X\n", space.device().safe_pc(), offset, data);
856	856	m_battery_ram[offset] = data;
857	857	}
858	858	else
859		logerror("%04X:BatteryW@%04X (invalid!)\n", cpu_get_pc(&space.device()), offset);
	859	logerror("%04X:BatteryW@%04X (invalid!)\n", space.device().safe_pc(), offset);
860	860	}
861	861
862	862
r17788	r17789
864	864	{
865	865	if (m_battery_ram_enable)
866	866	{
867		if (LOG_BATTERY_RAM) logerror("%04X:BatteryW@%04X=%02X\n", cpu_get_pc(&space.device()), offset, data);
	867	if (LOG_BATTERY_RAM) logerror("%04X:BatteryW@%04X=%02X\n", space.device().safe_pc(), offset, data);
868	868	m_battery_ram[offset] = data;
869	869	}
870	870	else if ((m_master_bank & 0x30) == 0x20)
871	871	m_ataxx_qram[((m_master_bank & 0xc0) << 8) + offset] = data;
872	872	else
873		logerror("%04X:BatteryW@%04X (invalid!)\n", cpu_get_pc(&space.device()), offset);
	873	logerror("%04X:BatteryW@%04X (invalid!)\n", space.device().safe_pc(), offset);
874	874	}
875	875
876	876
r17788	r17789
1065	1065	/* update top board banking for some games */
1066	1066	if (LOG_BANKSWITCHING_M)
1067	1067	if ((m_top_board_bank ^ data) & 0xc0)
1068		logerror("%04X:top_board_bank = %02X\n", cpu_get_pc(&space.device()), data & 0xc0);
	1068	logerror("%04X:top_board_bank = %02X\n", space.device().safe_pc(), data & 0xc0);
1069	1069	m_top_board_bank = data & 0xc0;
1070	1070	(*m_update_master_bank)(machine());
1071	1071	break;
r17788	r17789
1116	1116
1117	1117	case 0x11:   /* /GIN1 */
1118	1118	result = ioport("IN3")->read();
1119		if (LOG_EEPROM) logerror("%04X:EE read\n", cpu_get_pc(&space.device()));
	1119	if (LOG_EEPROM) logerror("%04X:EE read\n", space.device().safe_pc());
1120	1120	break;
1121	1121
1122	1122	default:
r17788	r17789
1140	1140	cputag_set_input_line(machine(), "slave", 0, (data & 0x08) ? CLEAR_LINE : ASSERT_LINE);
1141	1141
1142	1142	eeprom = machine().device<eeprom_device>("eeprom");
1143		if (LOG_EEPROM) logerror("%04X:EE write %d%d%d\n", cpu_get_pc(&space.device()),
	1143	if (LOG_EEPROM) logerror("%04X:EE write %d%d%d\n", space.device().safe_pc(),
1144	1144	(data >> 6) & 1, (data >> 5) & 1, (data >> 4) & 1);
1145	1145	eeprom->write_bit     ((data & 0x10) >> 4);
1146	1146	eeprom->set_clock_line((data & 0x20) ? ASSERT_LINE : CLEAR_LINE);
r17788	r17789
1204	1204	case 0x04:   /* /MBNK */
1205	1205	if (LOG_BANKSWITCHING_M)
1206	1206	if ((m_master_bank ^ data) & 0xff)
1207		logerror("%04X:master_bank = %02X\n", cpu_get_pc(&space.device()), data & 0xff);
	1207	logerror("%04X:master_bank = %02X\n", space.device().safe_pc(), data & 0xff);
1208	1208	m_master_bank = data;
1209	1209	ataxx_bankswitch(machine());
1210	1210	break;
r17788	r17789
1257	1257	else if (offset == 0x7fc)
1258	1258	{
1259	1259	m_xrom1_addr = (m_xrom1_addr & 0xff00) | (data & 0x00ff);
1260		if (LOG_XROM) logerror("%04X:XROM1 address low write = %02X (addr=%04X)\n", cpu_get_pc(&space.device()), data, m_xrom1_addr);
	1260	if (LOG_XROM) logerror("%04X:XROM1 address low write = %02X (addr=%04X)\n", space.device().safe_pc(), data, m_xrom1_addr);
1261	1261	}
1262	1262	else if (offset == 0x7fd)
1263	1263	{
1264	1264	m_xrom1_addr = (m_xrom1_addr & 0x00ff) | ((data << 8) & 0xff00);
1265		if (LOG_XROM) logerror("%04X:XROM1 address high write = %02X (addr=%04X)\n", cpu_get_pc(&space.device()), data, m_xrom1_addr);
	1265	if (LOG_XROM) logerror("%04X:XROM1 address high write = %02X (addr=%04X)\n", space.device().safe_pc(), data, m_xrom1_addr);
1266	1266	}
1267	1267	else if (offset == 0x7fe)
1268	1268	{
1269	1269	m_xrom2_addr = (m_xrom2_addr & 0xff00) | (data & 0x00ff);
1270		if (LOG_XROM) logerror("%04X:XROM2 address low write = %02X (addr=%04X)\n", cpu_get_pc(&space.device()), data, m_xrom2_addr);
	1270	if (LOG_XROM) logerror("%04X:XROM2 address low write = %02X (addr=%04X)\n", space.device().safe_pc(), data, m_xrom2_addr);
1271	1271	}
1272	1272	else if (offset == 0x7ff)
1273	1273	{
1274	1274	m_xrom2_addr = (m_xrom2_addr & 0x00ff) | ((data << 8) & 0xff00);
1275		if (LOG_XROM) logerror("%04X:XROM2 address high write = %02X (addr=%04X)\n", cpu_get_pc(&space.device()), data, m_xrom2_addr);
	1275	if (LOG_XROM) logerror("%04X:XROM2 address high write = %02X (addr=%04X)\n", space.device().safe_pc(), data, m_xrom2_addr);
1276	1276	}
1277	1277	else
1278	1278	m_extra_tram[offset] = data;
r17788	r17789
1286	1286	else if (offset == 0x7fc || offset == 0x7fd)
1287	1287	{
1288	1288	int result = m_xrom_base[0x00000 | m_xrom1_addr | ((offset & 1) << 16)];
1289		if (LOG_XROM) logerror("%04X:XROM1 read(%d) = %02X (addr=%04X)\n", cpu_get_pc(&space.device()), offset - 0x7fc, result, m_xrom1_addr);
	1289	if (LOG_XROM) logerror("%04X:XROM1 read(%d) = %02X (addr=%04X)\n", space.device().safe_pc(), offset - 0x7fc, result, m_xrom1_addr);
1290	1290	return result;
1291	1291	}
1292	1292	else if (offset == 0x7fe || offset == 0x7ff)
1293	1293	{
1294	1294	int result = m_xrom_base[0x20000 | m_xrom2_addr | ((offset & 1) << 16)];
1295		if (LOG_XROM) logerror("%04X:XROM2 read(%d) = %02X (addr=%04X)\n", cpu_get_pc(&space.device()), offset - 0x7fc, result, m_xrom2_addr);
	1295	if (LOG_XROM) logerror("%04X:XROM2 read(%d) = %02X (addr=%04X)\n", space.device().safe_pc(), offset - 0x7fc, result, m_xrom2_addr);
1296	1296	return result;
1297	1297	}
1298	1298	else
r17788	r17789
1346	1346
1347	1347	if (bankaddress >= m_slave_length)
1348	1348	{
1349		logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(&space.device()), data & 1);
	1349	logerror("%04X:Slave bank %02X out of range!", space.device().safe_pc(), data & 1);
1350	1350	bankaddress = 0x10000;
1351	1351	}
1352	1352	membank("bank3")->set_base(&m_slave_base[bankaddress]);
1353	1353
1354		if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(&space.device()), data & 1, bankaddress);
	1354	if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", space.device().safe_pc(), data & 1, bankaddress);
1355	1355	}
1356	1356
1357	1357
r17788	r17789
1361	1361
1362	1362	if (bankaddress >= m_slave_length)
1363	1363	{
1364		logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(&space.device()), data & 15);
	1364	logerror("%04X:Slave bank %02X out of range!", space.device().safe_pc(), data & 15);
1365	1365	bankaddress = 0x10000;
1366	1366	}
1367	1367	membank("bank3")->set_base(&m_slave_base[bankaddress]);
1368	1368
1369		if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(&space.device()), data & 15, bankaddress);
	1369	if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", space.device().safe_pc(), data & 15, bankaddress);
1370	1370	}
1371	1371
1372	1372
r17788	r17789
1385	1385
1386	1386	if (bankaddress >= m_slave_length)
1387	1387	{
1388		logerror("%04X:Slave bank %02X out of range!", cpu_get_pc(&space.device()), data & 0x3f);
	1388	logerror("%04X:Slave bank %02X out of range!", space.device().safe_pc(), data & 0x3f);
1389	1389	bankaddress = 0x2000;
1390	1390	}
1391	1391	membank("bank3")->set_base(&m_slave_base[bankaddress]);
1392	1392
1393		if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", cpu_get_pc(&space.device()), data, bankaddress);
	1393	if (LOG_BANKSWITCHING_S) logerror("%04X:Slave bank = %02X (%05X)\n", space.device().safe_pc(), data, bankaddress);
1394	1394	}
1395	1395
1396	1396

trunk/src/mame/machine/midwayic.c

r17788	r17789
744	744	/* main CPU is handling the I/O ASIC interrupt */
745	745	if (ioasic.fifo_bytes == 0 && ioasic.has_dcs)
746	746	{
747		ioasic.fifo_force_buffer_empty_pc = cpu_get_pc(ioasic.dcs_cpu);
	747	ioasic.fifo_force_buffer_empty_pc = ioasic.dcs_cpu->safe_pc();
748	748	if (LOG_FIFO)
749	749	logerror("fifo_r(%04X): FIFO empty, PC = %04X\n", result, ioasic.fifo_force_buffer_empty_pc);
750	750	}
r17788	r17789
774	774	/* sure the FIFO clear bit is set */
775	775	if (ioasic.fifo_force_buffer_empty_pc && device == ioasic.dcs_cpu)
776	776	{
777		offs_t currpc = cpu_get_pc(ioasic.dcs_cpu);
	777	offs_t currpc = ioasic.dcs_cpu->safe_pc();
778	778	if (currpc >= ioasic.fifo_force_buffer_empty_pc && currpc < ioasic.fifo_force_buffer_empty_pc + 0x10)
779	779	{
780	780	ioasic.fifo_force_buffer_empty_pc = 0;
r17788	r17789
932	932	}
933	933
934	934	if (LOG_IOASIC && offset != IOASIC_SOUNDSTAT && offset != IOASIC_SOUNDIN)
935		logerror("%06X:ioasic_r(%d) = %08X\n", cpu_get_pc(&space->device()), offset, result);
	935	logerror("%06X:ioasic_r(%d) = %08X\n", space->device().safe_pc(), offset, result);
936	936
937	937	return result;
938	938	}
r17788	r17789
957	957	newreg = ioasic.reg[offset];
958	958
959	959	if (LOG_IOASIC && offset != IOASIC_SOUNDOUT)
960		logerror("%06X:ioasic_w(%d) = %08X\n", cpu_get_pc(&space->device()), offset, data);
	960	logerror("%06X:ioasic_w(%d) = %08X\n", space->device().safe_pc(), offset, data);
961	961
962	962	switch (offset)
963	963	{

trunk/src/mame/machine/bonzeadv.c

r17788	r17789
384	384	{
385	385	asuka_state *state = space->machine().driver_data<asuka_state>();
386	386
387		//  if (cpu_get_pc(&space->device())!=0xa028)
388		//  logerror("%08x:  write %04x %04x cchip\n", cpu_get_pc(&space->device()), offset, data);
	387	//  if (space->device().safe_pc()!=0xa028)
	388	//  logerror("%08x:  write %04x %04x cchip\n", space->device().safe_pc(), offset, data);
389	389
390	390	if (state->m_current_bank == 0)
391	391	{
r17788	r17789
440	440	{
441	441	asuka_state *state = space->machine().driver_data<asuka_state>();
442	442
443		//  logerror("%08x:  read %04x cchip\n", cpu_get_pc(&space->device()), offset);
	443	//  logerror("%08x:  read %04x cchip\n", space->device().safe_pc(), offset);
444	444
445	445	if (state->m_current_bank == 0)
446	446	{

trunk/src/mame/machine/konamigx.c

r17788	r17789
143	143	break;
144	144
145	145	default:
146		//              logerror("%06x: unknown K055550 command %02x\n", cpu_get_pc(&space.device()), data);
	146	//              logerror("%06x: unknown K055550 command %02x\n", space.device().safe_pc(), data);
147	147	break;
148	148	}
149	149	}

trunk/src/mame/machine/toaplan1.c

r17788	r17789
69	69
70	70	m_main_ram_seg = ((data & 0xe000) << 9);
71	71	m_dsp_addr_w   = ((data & 0x1fff) << 1);
72		logerror("DSP PC:%04x IO write %04x (%08x) at port 0\n", cpu_get_previouspc(&space.device()), data, m_main_ram_seg + m_dsp_addr_w);
	72	logerror("DSP PC:%04x IO write %04x (%08x) at port 0\n", space.device().safe_pcbase(), data, m_main_ram_seg + m_dsp_addr_w);
73	73	}
74	74
75	75	READ16_MEMBER(toaplan1_state::demonwld_dsp_r)
r17788	r17789
83	83	case 0xc00000:   mainspace = machine().device("maincpu")->memory().space(AS_PROGRAM);
84	84	input_data = mainspace->read_word(m_main_ram_seg + m_dsp_addr_w);
85	85	break;
86		default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n", cpu_get_previouspc(&space.device()), m_main_ram_seg + m_dsp_addr_w);
	86	default:      logerror("DSP PC:%04x Warning !!! IO reading from %08x (port 1)\n", space.device().safe_pcbase(), m_main_ram_seg + m_dsp_addr_w);
87	87	}
88		logerror("DSP PC:%04x IO read %04x at %08x (port 1)\n", cpu_get_previouspc(&space.device()), input_data, m_main_ram_seg + m_dsp_addr_w);
	88	logerror("DSP PC:%04x IO read %04x at %08x (port 1)\n", space.device().safe_pcbase(), input_data, m_main_ram_seg + m_dsp_addr_w);
89	89	return input_data;
90	90	}
91	91
r17788	r17789
100	100	mainspace = machine().device("maincpu")->memory().space(AS_PROGRAM);
101	101	mainspace->write_word(m_main_ram_seg + m_dsp_addr_w, data);
102	102	break;
103		default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n", cpu_get_previouspc(&space.device()), m_main_ram_seg + m_dsp_addr_w);
	103	default:      logerror("DSP PC:%04x Warning !!! IO writing to %08x (port 1)\n", space.device().safe_pcbase(), m_main_ram_seg + m_dsp_addr_w);
104	104	}
105		logerror("DSP PC:%04x IO write %04x at %08x (port 1)\n", cpu_get_previouspc(&space.device()), data, m_main_ram_seg + m_dsp_addr_w);
	105	logerror("DSP PC:%04x IO write %04x at %08x (port 1)\n", space.device().safe_pcbase(), data, m_main_ram_seg + m_dsp_addr_w);
106	106	}
107	107
108	108	WRITE16_MEMBER(toaplan1_state::demonwld_dsp_bio_w)
r17788	r17789
114	114	/*              communication to main processor*/
115	115
116	116
117		logerror("DSP PC:%04x IO write %04x at port 3\n", cpu_get_previouspc(&space.device()), data);
	117	logerror("DSP PC:%04x IO write %04x at port 3\n", space.device().safe_pcbase(), data);
118	118	if (data & 0x8000) {
119	119	m_dsp_BIO = CLEAR_LINE;
120	120	}
r17788	r17789
164	164	WRITE16_MEMBER(toaplan1_state::demonwld_dsp_ctrl_w)
165	165	{
166	166	#if 0
167		logerror("68000:%08x  Writing %08x to %08x.\n",cpu_get_pc(&space.device()) ,data ,0xe0000a + offset);
	167	logerror("68000:%08x  Writing %08x to %08x.\n",space.device().safe_pc() ,data ,0xe0000a + offset);
168	168	#endif
169	169
170	170	if (ACCESSING_BITS_0_7)
r17788	r17789
173	173	{
174	174	case 0x00:   demonwld_dsp(machine(), 1); break;   /* Enable the INT line to the DSP */
175	175	case 0x01:   demonwld_dsp(machine(), 0); break;   /* Inhibit the INT line to the DSP */
176		default:   logerror("68000:%04x  Writing unknown command %08x to %08x\n",cpu_get_previouspc(&space.device()) ,data ,0xe0000a + offset); break;
	176	default:   logerror("68000:%04x  Writing unknown command %08x to %08x\n",space.device().safe_pcbase() ,data ,0xe0000a + offset); break;
177	177	}
178	178	}
179	179	else
180	180	{
181		logerror("68000:%04x  Writing unknown command %08x to %08x\n",cpu_get_previouspc(&space.device()) ,data ,0xe0000a + offset);
	181	logerror("68000:%04x  Writing unknown command %08x to %08x\n",space.device().safe_pcbase() ,data ,0xe0000a + offset);
182	182	}
183	183	}
184	184
r17788	r17789
186	186	READ16_MEMBER(toaplan1_state::samesame_port_6_word_r)
187	187	{
188	188	/* Bit 0x80 is secondary CPU (HD647180) ready signal */
189		logerror("PC:%04x Warning !!! IO reading from $14000a\n",cpu_get_previouspc(&space.device()));
	189	logerror("PC:%04x Warning !!! IO reading from $14000a\n",space.device().safe_pcbase());
190	190	return (0x80 | ioport("TJUMP")->read()) & 0xff;
191	191	}
192	192
r17788	r17789
313	313
314	314	if (ACCESSING_BITS_0_7 && (data == 0))
315	315	{
316		logerror("PC:%04x  Resetting Sound CPU and Sound chip (%08x)\n", cpu_get_previouspc(&space.device()), data);
	316	logerror("PC:%04x  Resetting Sound CPU and Sound chip (%08x)\n", space.device().safe_pcbase(), data);
317	317	devtag_reset(machine(), "ymsnd");
318	318	device_t *audiocpu = machine().device("audiocpu");
319	319	if (audiocpu != NULL && audiocpu->type() == Z80)
r17788	r17789
334	334	case 0x0d: coin_lockout_w(machine(), 0, 0); coin_lockout_w(machine(), 2, 0); break;
335	335	case 0x0e: coin_lockout_w(machine(), 1, 1); coin_lockout_w(machine(), 3, 1); break;
336	336	case 0x0f: coin_lockout_w(machine(), 1, 0); coin_lockout_w(machine(), 3, 0); m_coin_count=1; break;
337		default:   logerror("PC:%04x  Writing unknown data (%04x) to coin count/lockout port\n",cpu_get_previouspc(&space.device()),data); break;
	337	default:   logerror("PC:%04x  Writing unknown data (%04x) to coin count/lockout port\n",space.device().safe_pcbase(),data); break;
338	338	}
339	339	}
340	340
r17788	r17789
364	364	case 0x02: coin_lockout_w(machine(), 1,1); break;   /* Lock coin slot B */
365	365	case 0x01: coin_lockout_w(machine(), 0,1); break;   /* Lock coin slot A */
366	366	case 0x00: coin_lockout_global_w(machine(), 1); break;   /* Lock all coin slots */
367		default:   logerror("PC:%04x  Writing unknown data (%04x) to coin count/lockout port\n",cpu_get_previouspc(&space.device()),data); break;
	367	default:   logerror("PC:%04x  Writing unknown data (%04x) to coin count/lockout port\n",space.device().safe_pcbase(),data); break;
368	368	}
369	369	}
370	370
r17788	r17789
376	376	}
377	377	if (ACCESSING_BITS_8_15 && (data&0xff00))
378	378	{
379		logerror("PC:%04x  Writing unknown MSB data (%04x) to coin count/lockout port\n",cpu_get_previouspc(&space.device()),data);
	379	logerror("PC:%04x  Writing unknown MSB data (%04x) to coin count/lockout port\n",space.device().safe_pcbase(),data);
380	380	}
381	381	}
382	382

trunk/src/mame/machine/dc.c

r17788	r17789
353	353	#if DEBUG_SYSCTRL
354	354	if ((reg != 0x40) && (reg != 0x41) && (reg != 0x42) && (reg != 0x23) && (reg > 2))   // filter out IRQ status reads
355	355	{
356		mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %" I64FMT "x (PC=%x)\n", 0x5f6800+reg*4, state->dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, cpu_get_pc(&space->device()));
	356	mame_printf_verbose("SYSCTRL: [%08x] read %x @ %x (reg %x: %s), mask %" I64FMT "x (PC=%x)\n", 0x5f6800+reg*4, state->dc_sysctrl_regs[reg], offset, reg, sysctrl_names[reg], mem_mask, space->device().safe_pc());
357	357	}
358	358	#endif
359	359
r17788	r17789
615	615	reg = decode_reg_64(offset, mem_mask, &shift);
616	616
617	617	#if DEBUG_PVRCTRL
618		mame_printf_verbose("PVRCTRL: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f7c00+reg*4, state->pvrctrl_regs[reg], offset, reg, mem_mask, cpu_get_pc(&space->device()));
	618	mame_printf_verbose("PVRCTRL: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f7c00+reg*4, state->pvrctrl_regs[reg], offset, reg, mem_mask, space->device().safe_pc());
619	619	#endif
620	620
621	621	return (UINT64)state->pvrctrl_regs[reg] << shift;

trunk/src/mame/machine/scramble.c

r17788	r17789
58	58
59	59	READ8_DEVICE_HANDLER( scramble_protection_r )
60	60	{
61		switch (cpu_get_pc(device->machine().device("maincpu")))
	61	switch (device->machine().device("maincpu")->safe_pc())
62	62	{
63	63	case 0x00a8: return 0xf0;
64	64	case 0x00be: return 0xb0;
r17788	r17789
88	88
89	89	READ8_HANDLER( triplep_pip_r )
90	90	{
91		logerror("PC %04x: triplep read port 2\n",cpu_get_pc(&space->device()));
92		if (cpu_get_pc(&space->device()) == 0x015a) return 0xff;
93		else if (cpu_get_pc(&space->device()) == 0x0886) return 0x05;
	91	logerror("PC %04x: triplep read port 2\n",space->device().safe_pc());
	92	if (space->device().safe_pc() == 0x015a) return 0xff;
	93	else if (space->device().safe_pc() == 0x0886) return 0x05;
94	94	else return 0;
95	95	}
96	96
97	97	READ8_HANDLER( triplep_pap_r )
98	98	{
99		logerror("PC %04x: triplep read port 3\n",cpu_get_pc(&space->device()));
100		if (cpu_get_pc(&space->device()) == 0x015d) return 0x04;
	99	logerror("PC %04x: triplep read port 3\n",space->device().safe_pc());
	100	if (space->device().safe_pc() == 0x015d) return 0x04;
101	101	else return 0;
102	102	}
103	103

trunk/src/mame/machine/fddebug.c

r17788	r17789
919	919
920	920	/* support 0 or 1 parameters */
921	921	if (params != 1 || !debug_command_parameter_number(machine, param[0], &offset))
922		offset = cpu_get_pc(cpu);
	922	offset = cpu->safe_pc();
923	923	keyaddr = addr_to_keyaddr(offset / 2);
924	924
925	925	/* toggle the ignore PC status */
r17788	r17789
961	961	return;
962	962	}
963	963	if (params != 1 || !debug_command_parameter_number(machine, param[0], &offset))
964		offset = cpu_get_pc(cpu);
	964	offset = cpu->safe_pc();
965	965	offset /= 2;
966	966
967	967	/* toggle the ignore PC status */
r17788	r17789
1060	1060
1061	1061	/* support 0 or 1 parameters */
1062	1062	if (!debug_command_parameter_number(machine, param[0], &newpc))
1063		newpc = cpu_get_pc(cpu);
	1063	newpc = cpu->safe_pc();
1064	1064
1065	1065	/* set the new PC */
1066	1066	cpu_set_reg(cpu, STATE_GENPC, newpc);
r17788	r17789
1078	1078	static void execute_fdsearch(running_machine &machine, int ref, int params, const char **param)
1079	1079	{
1080	1080	address_space *space = debug_cpu_get_visible_cpu(machine)->memory().space(AS_PROGRAM);
1081		int pc = cpu_get_pc(&space->device());
	1081	int pc = space->device().safe_pc();
1082	1082	int length, first = TRUE;
1083	1083	UINT8 instrdata[2];
1084	1084	UINT16 decoded;

trunk/src/mame/machine/midxunit.c

r17788	r17789
87	87	output_set_value("Player2_Gun_LED", (~data & 0x20) >> 5 );
88	88	output_set_value("Player3_Gun_LED", (~data & 0x40) >> 6 );
89	89
90		logerror("%08X:I/O write to %d = %04X\n", cpu_get_pc(&space.device()), offset, data);
91		//          logerror("%08X:Unknown I/O write to %d = %04X\n", cpu_get_pc(&space.device()), offset, data);
	90	logerror("%08X:I/O write to %d = %04X\n", space.device().safe_pc(), offset, data);
	91	//          logerror("%08X:Unknown I/O write to %d = %04X\n", space.device().safe_pc(), offset, data);
92	92	break;
93	93	}
94	94	m_iodata[offset] = newword;
r17788	r17789
103	103	dcs_reset_w(machine(), data & 2);
104	104
105	105	if (ACCESSING_BITS_0_7 && offset % 0x40000 == 0)
106		logerror("%08X:midxunit_unknown_w @ %d = %02X\n", cpu_get_pc(&space.device()), offs, data & 0xff);
	106	logerror("%08X:midxunit_unknown_w @ %d = %02X\n", space.device().safe_pc(), offs, data & 0xff);
107	107	}
108	108
109	109
r17788	r17789
129	129	return ioport(portnames[offset])->read();
130	130
131	131	default:
132		logerror("%08X:Unknown I/O read from %d\n", cpu_get_pc(&space.device()), offset);
	132	logerror("%08X:Unknown I/O read from %d\n", space.device().safe_pc(), offset);
133	133	break;
134	134	}
135	135	return ~0;
r17788	r17789
238	238	break;
239	239	}
240	240
241		/*  logerror("%08X:UART R @ %X = %02X\n", cpu_get_pc(&space.device()), offset, result);*/
	241	/*  logerror("%08X:UART R @ %X = %02X\n", space.device().safe_pc(), offset, result);*/
242	242	return result;
243	243	}
244	244
r17788	r17789
274	274	break;
275	275	}
276	276
277		/*  logerror("%08X:UART W @ %X = %02X\n", cpu_get_pc(&space.device()), offset, data);*/
	277	/*  logerror("%08X:UART W @ %X = %02X\n", space.device().safe_pc(), offset, data);*/
278	278	}
279	279
280	280
r17788	r17789
361	361
362	362	READ16_MEMBER(midxunit_state::midxunit_sound_r)
363	363	{
364		logerror("%08X:Sound read\n", cpu_get_pc(&space.device()));
	364	logerror("%08X:Sound read\n", space.device().safe_pc());
365	365
366	366	return dcs_data_r(machine()) & 0xff;
367	367	}
r17788	r17789
378	378	/* check for out-of-bounds accesses */
379	379	if (offset)
380	380	{
381		logerror("%08X:Unexpected write to sound (hi) = %04X\n", cpu_get_pc(&space.device()), data);
	381	logerror("%08X:Unexpected write to sound (hi) = %04X\n", space.device().safe_pc(), data);
382	382	return;
383	383	}
384	384
385	385	/* call through based on the sound type */
386	386	if (ACCESSING_BITS_0_7)
387	387	{
388		logerror("%08X:Sound write = %04X\n", cpu_get_pc(&space.device()), data);
	388	logerror("%08X:Sound write = %04X\n", space.device().safe_pc(), data);
389	389	dcs_data_w(machine(), data & 0xff);
390	390	}
391	391	}

trunk/src/mame/machine/segaic16.c

r17788	r17789
102	102
103	103	// read original encrypted memory at that address
104	104	m_open_bus_recurse = true;
105		UINT16 result = space.read_word(cpu_get_pc(&space.device()));
	105	UINT16 result = space.read_word(space.device().safe_pc());
106	106	m_open_bus_recurse = false;
107	107	return result;
108	108	}

trunk/src/mame/machine/buggychl.c

r17788	r17789
41	41	static READ8_DEVICE_HANDLER( buggychl_68705_port_a_r )
42	42	{
43	43	buggychl_mcu_state *state = get_safe_token(device);
44		//logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(state->m_mcu), state->m_port_a_in);
	44	//logerror("%04x: 68705 port A read %02x\n", state->m_mcu->safe_pc(), state->m_port_a_in);
45	45	return (state->m_port_a_out & state->m_ddr_a) | (state->m_port_a_in & ~state->m_ddr_a);
46	46	}
47	47
48	48	static WRITE8_DEVICE_HANDLER( buggychl_68705_port_a_w )
49	49	{
50	50	buggychl_mcu_state *state = get_safe_token(device);
51		//logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(state->m_mcu), data);
	51	//logerror("%04x: 68705 port A write %02x\n", state->m_mcu->safe_pc(), data);
52	52	state->m_port_a_out = data;
53	53	}
54	54
r17788	r17789
88	88	static WRITE8_DEVICE_HANDLER( buggychl_68705_port_b_w )
89	89	{
90	90	buggychl_mcu_state *state = get_safe_token(device);
91		logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(state->m_mcu), data);
	91	logerror("%04x: 68705 port B write %02x\n", state->m_mcu->safe_pc(), data);
92	92
93	93	if ((state->m_ddr_b & 0x02) && (~data & 0x02) && (state->m_port_b_out & 0x02))
94	94	{
r17788	r17789
132	132	state->m_port_c_in |= 0x01;
133	133	if (!state->m_mcu_sent)
134	134	state->m_port_c_in |= 0x02;
135		logerror("%04x: 68705 port C read %02x\n", cpu_get_pc(state->m_mcu), state->m_port_c_in);
	135	logerror("%04x: 68705 port C read %02x\n", state->m_mcu->safe_pc(), state->m_port_c_in);
136	136	return (state->m_port_c_out & state->m_ddr_c) | (state->m_port_c_in & ~state->m_ddr_c);
137	137	}
138	138
139	139	static WRITE8_DEVICE_HANDLER( buggychl_68705_port_c_w )
140	140	{
141	141	buggychl_mcu_state *state = get_safe_token(device);
142		logerror("%04x: 68705 port C write %02x\n", cpu_get_pc(state->m_mcu), data);
	142	logerror("%04x: 68705 port C write %02x\n", state->m_mcu->safe_pc(), data);
143	143	state->m_port_c_out = data;
144	144	}
145	145
r17788	r17789
153	153	WRITE8_DEVICE_HANDLER( buggychl_mcu_w )
154	154	{
155	155	buggychl_mcu_state *state = get_safe_token(device);
156		logerror("%04x: mcu_w %02x\n", cpu_get_pc(state->m_mcu), data);
	156	logerror("%04x: mcu_w %02x\n", state->m_mcu->safe_pc(), data);
157	157	state->m_from_main = data;
158	158	state->m_main_sent = 1;
159	159	device_set_input_line(state->m_mcu, 0, ASSERT_LINE);
r17788	r17789
162	162	READ8_DEVICE_HANDLER( buggychl_mcu_r )
163	163	{
164	164	buggychl_mcu_state *state = get_safe_token(device);
165		logerror("%04x: mcu_r %02x\n", cpu_get_pc(state->m_mcu), state->m_from_mcu);
	165	logerror("%04x: mcu_r %02x\n", state->m_mcu->safe_pc(), state->m_from_mcu);
166	166	state->m_mcu_sent = 0;
167	167	return state->m_from_mcu;
168	168	}
r17788	r17789
174	174
175	175	/* bit 0 = when 1, mcu is ready to receive data from main cpu */
176	176	/* bit 1 = when 1, mcu has sent data to the main cpu */
177		//logerror("%04x: mcu_status_r\n",cpu_get_pc(state->m_mcu));
	177	//logerror("%04x: mcu_status_r\n",state->m_mcu->safe_pc());
178	178	if (!state->m_main_sent)
179	179	res |= 0x01;
180	180	if (state->m_mcu_sent)

trunk/src/mame/machine/n64.c

r17788	r17789
263	263	break;
264	264
265	265	default:
266		logerror("mi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&mem_map->device()));
	266	logerror("mi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, mem_map->device().safe_pc());
267	267	break;
268	268	}
269	269
r17788	r17789
350	350	}
351	351
352	352	default:
353		logerror("mi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(maincpu));
	353	logerror("mi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
354	354	break;
355	355	}
356	356	}
r17788	r17789
469	469	//printf("rdram_reg_r %08x = %08x\n", offset * 4, rdram_regs[offset]); fflush(stdout);
470	470	if(offset > 0x24/4)
471	471	{
472		logerror("rdram_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(maincpu));
	472	logerror("rdram_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
473	473	return 0;
474	474	}
475	475	return rdram_regs[offset];
r17788	r17789
480	480	//printf("rdram_reg_w %08x %08x %08x\n", offset * 4, data, mem_mask); fflush(stdout);
481	481	if(offset > 0x24/4)
482	482	{
483		logerror("rdram_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(maincpu));
	483	logerror("rdram_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
484	484	return;
485	485	}
486	486	COMBINE_DATA(&rdram_regs[offset]);
r17788	r17789
673	673	break;
674	674
675	675	default:
676		logerror("sp_reg_r: %08X at %08X\n", offset, cpu_get_pc(maincpu));
	676	logerror("sp_reg_r: %08X at %08X\n", offset, maincpu->safe_pc());
677	677	break;
678	678	}
679	679
r17788	r17789
868	868	break;
869	869
870	870	default:
871		logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(maincpu));
	871	logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
872	872	break;
873	873	}
874	874	}
r17788	r17789
888	888	break;
889	889
890	890	default:
891		logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(maincpu));
	891	logerror("sp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
892	892	break;
893	893	}
894	894	}
r17788	r17789
940	940	}
941	941
942	942	default:
943		logerror("dp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(device));
	943	logerror("dp_reg_r: %08X, %08X at %08X\n", offset, mem_mask, device->safe_pc());
944	944	break;
945	945	}
946	946
r17788	r17789
984	984	}
985	985
986	986	default:
987		logerror("dp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(device));
	987	logerror("dp_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, device->safe_pc());
988	988	break;
989	989	}
990	990	}
r17788	r17789
1115	1115	break;
1116	1116
1117	1117	default:
1118		logerror("vi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(maincpu));
	1118	logerror("vi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
1119	1119	break;
1120	1120	}
1121	1121
r17788	r17789
1205	1205	*/
1206	1206
1207	1207	default:
1208		logerror("vi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(maincpu));
	1208	logerror("vi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
1209	1209	break;
1210	1210	}
1211	1211	}
r17788	r17789
1354	1354	break;
1355	1355
1356	1356	default:
1357		logerror("ai_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(maincpu));
	1357	logerror("ai_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
1358	1358	break;
1359	1359	}
1360	1360
r17788	r17789
1396	1396	break;
1397	1397
1398	1398	default:
1399		logerror("ai_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(maincpu));
	1399	logerror("ai_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
1400	1400	break;
1401	1401	}
1402	1402	}
r17788	r17789
1532	1532	break;
1533	1533
1534	1534	default:
1535		logerror("pi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(maincpu));
	1535	logerror("pi_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
1536	1536	break;
1537	1537	}
1538	1538
r17788	r17789
1635	1635	break;
1636	1636
1637	1637	default:
1638		logerror("pi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(maincpu));
	1638	logerror("pi_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
1639	1639	break;
1640	1640	}
1641	1641	}
r17788	r17789
1647	1647	//printf("ri_reg_r %08x = %08x\n", offset * 4, ri_regs[offset]);
1648	1648	if(offset > 0x1c/4)
1649	1649	{
1650		logerror("ri_reg_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(maincpu));
	1650	logerror("ri_reg_r: %08X, %08X at %08X\n", offset, mem_mask, maincpu->safe_pc());
1651	1651	return 0;
1652	1652	}
1653	1653	return ri_regs[offset];
r17788	r17789
1658	1658	//printf("ri_reg_w %08x %08x %08x\n", offset * 4, data, mem_mask);
1659	1659	if(offset > 0x1c/4)
1660	1660	{
1661		logerror("ri_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(maincpu));
	1661	logerror("ri_reg_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, maincpu->safe_pc());
1662	1662	return;
1663	1663	}
1664	1664	COMBINE_DATA(&ri_regs[offset]);

trunk/src/mame/machine/snes.c

r17788	r17789
308	308	return 0xff;
309	309
310	310	recurse = 1;
311		result = space->read_byte(cpu_get_pc(&space->device()) - 1); //LAST opcode that's fetched on the bus
	311	result = space->read_byte(space->device().safe_pc() - 1); //LAST opcode that's fetched on the bus
312	312	recurse = 0;
313	313	return result;
314	314	}
r17788	r17789
572	572	//      case 0x4101: //PC: a104 - a10e - a12a   //only nss_actr (DSW actually reads in word units ...)
573	573
574	574	default:
575		//          mame_printf_debug("snes_r: offset = %x pc = %x\n",offset,cpu_get_pc(&space->device()));
	575	//          mame_printf_debug("snes_r: offset = %x pc = %x\n",offset,space->device().safe_pc());
576	576	// Added break; after commenting above line.  If uncommenting, drop the break;
577	577	break;
578	578	}
r17788	r17789
604	604	// APU is mirrored from 2140 to 217f
605	605	if (offset >= APU00 && offset < WMDATA)
606	606	{
607		//      printf("816: %02x to APU @ %d (PC=%06x)\n", data, offset & 3,cpu_get_pc(&space->device()));
	607	//      printf("816: %02x to APU @ %d (PC=%06x)\n", data, offset & 3,space->device().safe_pc());
608	608	spc_port_in(state->m_spc700, offset & 0x3, data);
609	609	space->machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(20));
610	610	return;
r17788	r17789
875	875	}
876	876	else
877	877	{
878		logerror("(PC=%06x) snes_r_bank1: Unmapped external chip read: %04x\n",cpu_get_pc(&space->device()),address);
	878	logerror("(PC=%06x) snes_r_bank1: Unmapped external chip read: %04x\n",space->device().safe_pc(),address);
879	879	value = snes_open_bus_r(space, 0);                        /* Reserved */
880	880	}
881	881	}
r17788	r17789
934	934	}
935	935	else
936	936	{
937		logerror( "(PC=%06x) snes_r_bank2: Unmapped external chip read: %04x\n",cpu_get_pc(&space->device()),address );
	937	logerror( "(PC=%06x) snes_r_bank2: Unmapped external chip read: %04x\n",space->device().safe_pc(),address );
938	938	value = snes_open_bus_r(space, 0);
939	939	}
940	940	}
r17788	r17789
1025	1025	value = (address >= 0x4000) ? dsp_get_sr() : dsp_get_dr();
1026	1026	else
1027	1027	{
1028		logerror("(PC=%06x) snes_r_bank4: Unmapped external chip read: %04x\n",cpu_get_pc(&space->device()),address);
	1028	logerror("(PC=%06x) snes_r_bank4: Unmapped external chip read: %04x\n",space->device().safe_pc(),address);
1029	1029	value = snes_open_bus_r(space, 0);                     /* Reserved */
1030	1030	}
1031	1031	}
r17788	r17789
1058	1058	}
1059	1059	else
1060	1060	{
1061		logerror("(PC=%06x) snes_r_bank5: Unmapped external chip read: %04x\n",cpu_get_pc(&space->device()),address);
	1061	logerror("(PC=%06x) snes_r_bank5: Unmapped external chip read: %04x\n",space->device().safe_pc(),address);
1062	1062	value = snes_open_bus_r(space, 0);                        /* Reserved */
1063	1063	}
1064	1064	}
r17788	r17789
1094	1094	}
1095	1095	else                  /* Area 0x6000-0x8000 with offset < 0x300000 is reserved */
1096	1096	{
1097		logerror("(PC=%06x) snes_r_bank6: Unmapped external chip read: %04x\n",cpu_get_pc(&space->device()),address);
	1097	logerror("(PC=%06x) snes_r_bank6: Unmapped external chip read: %04x\n",space->device().safe_pc(),address);
1098	1098	value = snes_open_bus_r(space, 0);
1099	1099	}
1100	1100	}
r17788	r17789
1221	1221	else
1222	1222	dsp_set_sr(data);
1223	1223	else
1224		logerror( "(PC=%06x) Attempt to write to ROM address: %X\n",cpu_get_pc(&space->device()),offset );
	1224	logerror( "(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset );
1225	1225	}
1226	1226
1227	1227	/* 0x300000 - 0x3fffff */
r17788	r17789
1278	1278	else
1279	1279	dsp_set_sr(data);
1280	1280	else
1281		logerror("(PC=%06x) Attempt to write to ROM address: %X\n",cpu_get_pc(&space->device()),offset + 0x300000);
	1281	logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x300000);
1282	1282	}
1283	1283
1284	1284	/* 0x600000 - 0x6fffff */
r17788	r17789
1307	1307	else if (state->m_cart[0].mode & 5)               /* Mode 20 & 22 */
1308	1308	{
1309	1309	if (address >= 0x8000)
1310		logerror("(PC=%06x) Attempt to write to ROM address: %X\n",cpu_get_pc(&space->device()),offset + 0x600000);
	1310	logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x600000);
1311	1311	else if (state->m_has_addon_chip == HAS_DSP1)
1312	1312	dsp_set_dr(data);
1313	1313	else
1314	1314	logerror("snes_w_bank4: Attempt to write to reserved address: %X = %02x\n", offset + 0x600000, data);
1315	1315	}
1316	1316	else if (state->m_cart[0].mode & 0x0a)
1317		logerror("(PC=%06x) Attempt to write to ROM address: %X\n",cpu_get_pc(&space->device()),offset + 0x600000);
	1317	logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x600000);
1318	1318	}
1319	1319
1320	1320	/* 0x700000 - 0x7dffff */
r17788	r17789
1336	1336	logerror("snes_w_bank5: Attempt to write to reserved address: %X = %02x\n", offset + 0x700000, data);
1337	1337	}
1338	1338	else if (state->m_cart[0].mode & 0x0a)
1339		logerror("(PC=%06x) Attempt to write to ROM address: %X\n",cpu_get_pc(&space->device()),offset + 0x700000);
	1339	logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x700000);
1340	1340	}
1341	1341
1342	1342
r17788	r17789
1387	1387	else
1388	1388	dsp_set_sr(data);
1389	1389	else
1390		logerror("(PC=%06x) Attempt to write to ROM address: %X\n",cpu_get_pc(&space->device()),offset + 0x800000);
	1390	logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0x800000);
1391	1391	}
1392	1392
1393	1393
r17788	r17789
1405	1405	snes_ram[0xe00000 + offset] = data;      // SFX RAM
1406	1406	}
1407	1407	else
1408		logerror("(PC=%06x) Attempt to write to ROM address: %X\n",cpu_get_pc(&space->device()),offset + 0xc00000);
	1408	logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0xc00000);
1409	1409	}
1410	1410	else if (state->m_has_addon_chip == HAS_ST010 || state->m_has_addon_chip == HAS_ST011)
1411	1411	{
r17788	r17789
1434	1434	snes_w_bank4(space, offset - 0x200000, data);
1435	1435	}
1436	1436	else
1437		logerror("(PC=%06x) snes_w_bank7: Attempt to write to ROM address: %X = %02x\n",cpu_get_pc(&space->device()),offset + 0xc00000, data);
	1437	logerror("(PC=%06x) snes_w_bank7: Attempt to write to ROM address: %X = %02x\n",space->device().safe_pc(),offset + 0xc00000, data);
1438	1438	}
1439	1439	else if (state->m_cart[0].mode & 0x0a)
1440		logerror("(PC=%06x) Attempt to write to ROM address: %X\n",cpu_get_pc(&space->device()),offset + 0xc00000);
	1440	logerror("(PC=%06x) Attempt to write to ROM address: %X\n",space->device().safe_pc(),offset + 0xc00000);
1441	1441	}
1442	1442
1443	1443

trunk/src/mame/machine/atarigen.c

r17788	r17789
463	463	address &= ~m_slapstic_mirror;
464	464	if (address >= m_slapstic_base && address < m_slapstic_base + 0x8000)
465	465	{
466		offs_t pc = cpu_get_previouspc(&direct.space().device());
	466	offs_t pc = direct.space().device().safe_pcbase();
467	467	if (pc != m_slapstic_last_pc || address != m_slapstic_last_address)
468	468	{
469	469	m_slapstic_last_pc = pc;

trunk/src/mame/machine/gaelco2.c

r17788	r17789
236	236	}
237	237	}
238	238	else
239		logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	239	logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
240	240	}
241	241
242	242
r17788	r17789
252	252	}
253	253	}
254	254	else
255		logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	255	logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
256	256	}
257	257
258	258	/***************************************************************************
r17788	r17789
300	300
301	301	READ16_MEMBER(gaelco2_state::snowboar_protection_r)
302	302	{
303		logerror("%06x: protection read from %04x\n", cpu_get_pc(&space.device()), offset*2);
	303	logerror("%06x: protection read from %04x\n", space.device().safe_pc(), offset*2);
304	304	return 0x0000;
305	305	}
306	306
307	307	WRITE16_MEMBER(gaelco2_state::snowboar_protection_w)
308	308	{
309	309	COMBINE_DATA(&m_snowboar_protection[offset]);
310		logerror("%06x: protection write %04x to %04x\n", cpu_get_pc(&space.device()), data, offset*2);
	310	logerror("%06x: protection write %04x to %04x\n", space.device().safe_pc(), data, offset*2);
311	311
312	312	}

trunk/src/mame/machine/pgmprot6.c

r17788	r17789
125	125
126	126	}
127	127	}
128		logerror("%06X: ASIC25 R CMD %X  VAL %X\n", cpu_get_pc(&space->device()), state->m_kb_cmd, res);
	128	logerror("%06X: ASIC25 R CMD %X  VAL %X\n", space->device().safe_pc(), state->m_kb_cmd, res);
129	129	return res;
130	130	}
131	131
r17788	r17789
136	136	state->m_kb_cmd = data;
137	137	else //offset==2
138	138	{
139		logerror("%06X: ASIC25 W CMD %X  VAL %X\n",cpu_get_pc(&space->device()), state->m_kb_cmd, data);
	139	logerror("%06X: ASIC25 W CMD %X  VAL %X\n",space->device().safe_pc(), state->m_kb_cmd, data);
140	140	if (state->m_kb_cmd == 0)
141	141	state->m_kb_reg = data;
142	142	else if(state->m_kb_cmd == 2)   //a bitswap=
r17788	r17789
185	185
186	186	static READ16_HANDLER( olds_prot_swap_r )
187	187	{
188		if (cpu_get_pc(&space->device()) < 0x100000)      //bios
	188	if (space->device().safe_pc() < 0x100000)      //bios
189	189	return pgm_mainram[0x178f4 / 2];
190	190	else                  //game
191	191	return pgm_mainram[0x178d8 / 2];

trunk/src/mame/machine/mcr.c

r17788	r17789
246	246	/* bit 1 enables (1) LD left channel audio */
247	247	/* bit 0 enables (1) LD video if PIX SW == 1 */
248	248	if (data != 0)
249		logerror("%04X:mcr_ipu_laserdisk_w(%d) = %02X\n", cpu_get_pc(&space.device()), offset, data);
	249	logerror("%04X:mcr_ipu_laserdisk_w(%d) = %02X\n", space.device().safe_pc(), offset, data);
250	250	}
251	251
252	252

trunk/src/mame/machine/arkanoid.c

r17788	r17789
173	173	*/
174	174
175	175
176		#define LOG_F000_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_f000_r - cmd = %02x - val = %02x\n", cpu_get_pc(&space.device()), m_bootleg_cmd, arkanoid_bootleg_val);
177		#define LOG_F002_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_f002_r - cmd = %02x - val = %02x\n", cpu_get_pc(&space.device()), m_bootleg_cmd, arkanoid_bootleg_val);
178		#define LOG_D018_W if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_d018_w - data = %02x - cmd = %02x\n", cpu_get_pc(&space.device()), data, m_bootleg_cmd);
179		#define LOG_D008_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_d008_r - val = %02x\n", cpu_get_pc(&space.device()), arkanoid_bootleg_d008_val);
	176	#define LOG_F000_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_f000_r - cmd = %02x - val = %02x\n", space.device().safe_pc(), m_bootleg_cmd, arkanoid_bootleg_val);
	177	#define LOG_F002_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_f002_r - cmd = %02x - val = %02x\n", space.device().safe_pc(), m_bootleg_cmd, arkanoid_bootleg_val);
	178	#define LOG_D018_W if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_d018_w - data = %02x - cmd = %02x\n", space.device().safe_pc(), data, m_bootleg_cmd);
	179	#define LOG_D008_R if (ARKANOID_BOOTLEG_VERBOSE) logerror("%04x: arkanoid_bootleg_d008_r - val = %02x\n", space.device().safe_pc(), arkanoid_bootleg_d008_val);
180	180
181	181
182	182	/* Kludge for some bootlegs that read this address */
r17788	r17789
214	214	LOG_F000_R
215	215	break;
216	216	default:
217		logerror("%04x: arkanoid_bootleg_f000_r - cmd = %02x - unknown bootleg !\n", cpu_get_pc(&space.device()), m_bootleg_cmd);
	217	logerror("%04x: arkanoid_bootleg_f000_r - cmd = %02x - unknown bootleg !\n", space.device().safe_pc(), m_bootleg_cmd);
218	218	break;
219	219	}
220	220
r17788	r17789
301	301	LOG_F002_R
302	302	break;
303	303	default:
304		logerror("%04x: arkanoid_bootleg_f002_r - cmd = %02x - unknown bootleg !\n", cpu_get_pc(&space.device()), m_bootleg_cmd);
	304	logerror("%04x: arkanoid_bootleg_f002_r - cmd = %02x - unknown bootleg !\n", space.device().safe_pc(), m_bootleg_cmd);
305	305	break;
306	306	}
307	307
r17788	r17789
320	320	switch (data)
321	321	{
322	322	case 0x36:  /* unneeded value : no call 0x2050, unused A and overwritten HL (0x0313 -> 0x0340) */
323		if (cpu_get_pc(&space.device()) == 0x7c47)
	323	if (space.device().safe_pc() == 0x7c47)
324	324	m_bootleg_cmd = 0x00;
325	325	break;
326	326	case 0x38:  /* unneeded value : no call 0x2050, unused A and fixed HL (0x7bd5) */
327		if (cpu_get_pc(&space.device()) == 0x7b87)
	327	if (space.device().safe_pc() == 0x7b87)
328	328	m_bootleg_cmd = 0x00;
329	329	break;
330	330	case 0x8a:  /* unneeded value : no call 0x2050, unused A and overwritten HL (0x7b77 -> 0x7c1c) */
331		if (cpu_get_pc(&space.device()) == 0x9661)
	331	if (space.device().safe_pc() == 0x9661)
332	332	m_bootleg_cmd = 0x00;
333	333	break;
334	334	case 0xe3:  /* unneeded value : call 0x2050 but fixed A (0x00) and fixed HL (0xed83) */
335		if (cpu_get_pc(&space.device()) == 0x67e3)
	335	if (space.device().safe_pc() == 0x67e3)
336	336	m_bootleg_cmd = 0x00;
337	337	break;
338	338	case 0xf7:  /* unneeded value : 3 * 'NOP' at 0x034f + 2 * 'NOP' at 0x35b */
339		if (cpu_get_pc(&space.device()) == 0x0349)
	339	if (space.device().safe_pc() == 0x0349)
340	340	m_bootleg_cmd = 0x00;
341	341	break;
342	342	case 0xff:  /* unneeded value : no call 0x2050, unused A and overwritten HL (0x7c4f -> 0x7d31) */
343		if (cpu_get_pc(&space.device()) == 0x9670)
	343	if (space.device().safe_pc() == 0x9670)
344	344	m_bootleg_cmd = 0x00;
345	345	break;
346	346	default:
r17788	r17789
353	353	switch (data)
354	354	{
355	355	case 0x36:  /* unneeded value : call 0x2050 but fixed A (0x2d) */
356		if (cpu_get_pc(&space.device()) == 0x7c4c)
	356	if (space.device().safe_pc() == 0x7c4c)
357	357	m_bootleg_cmd = 0x00;
358	358	break;
359	359	case 0x38:  /* unneeded value : call 0x2050 but fixed A (0xf3) */
360		if (cpu_get_pc(&space.device()) == 0x7b87)
	360	if (space.device().safe_pc() == 0x7b87)
361	361	m_bootleg_cmd = 0x00;
362	362	break;
363	363	case 0x88:  /* unneeded value : no read back */
364		if (cpu_get_pc(&space.device()) == 0x67e3)
	364	if (space.device().safe_pc() == 0x67e3)
365	365	m_bootleg_cmd = 0x00;
366		if (cpu_get_pc(&space.device()) == 0x7c47)
	366	if (space.device().safe_pc() == 0x7c47)
367	367	m_bootleg_cmd = 0x00;
368	368	break;
369	369	case 0x89:  /* unneeded value : no read back */
370		if (cpu_get_pc(&space.device()) == 0x67e5)
	370	if (space.device().safe_pc() == 0x67e5)
371	371	m_bootleg_cmd = 0x00;
372	372	break;
373	373	case 0x8a:  /* unneeded value : call 0x2050 but fixed A (0xa5) */
374		if (cpu_get_pc(&space.device()) == 0x9661)
	374	if (space.device().safe_pc() == 0x9661)
375	375	m_bootleg_cmd = 0x00;
376	376	break;
377	377	case 0xc0:  /* unneeded value : no read back */
378		if (cpu_get_pc(&space.device()) == 0x67e7)
	378	if (space.device().safe_pc() == 0x67e7)
379	379	m_bootleg_cmd = 0x00;
380	380	break;
381	381	case 0xe3:  /* unneeded value : call 0x2050 but fixed A (0x61) */
382		if (cpu_get_pc(&space.device()) == 0x67e9)
	382	if (space.device().safe_pc() == 0x67e9)
383	383	m_bootleg_cmd = 0x00;
384	384	break;
385	385	case 0xff:  /* unneeded value : call 0x2050 but fixed A (0xe2) */
386		if (cpu_get_pc(&space.device()) == 0x9670)
	386	if (space.device().safe_pc() == 0x9670)
387	387	m_bootleg_cmd = 0x00;
388	388	break;
389	389	default:
r17788	r17789
396	396	switch (data)
397	397	{
398	398	case 0x05:  /* Check 1 */
399		if (cpu_get_pc(&space.device()) == 0x0363)
	399	if (space.device().safe_pc() == 0x0363)
400	400	m_bootleg_cmd = 0x05;
401	401	break;
402	402	case 0x0a:  /* Check 2 */
403		if (cpu_get_pc(&space.device()) == 0x0372)
	403	if (space.device().safe_pc() == 0x0372)
404	404	m_bootleg_cmd = 0x0a;
405	405	break;
406	406	default:
r17788	r17789
413	413	switch (data)
414	414	{
415	415	case 0x36:  /* unneeded value : call 0x2050 but fixed A (0x2d) */
416		if (cpu_get_pc(&space.device()) == 0x7c4c)
	416	if (space.device().safe_pc() == 0x7c4c)
417	417	m_bootleg_cmd = 0x00;
418	418	break;
419	419	case 0x38:  /* unneeded value : call 0x2050 but fixed A (0xf3) */
420		if (cpu_get_pc(&space.device()) == 0x7b87)
	420	if (space.device().safe_pc() == 0x7b87)
421	421	m_bootleg_cmd = 0x00;
422	422	break;
423	423	case 0x88:  /* unneeded value : no read back */
424		if (cpu_get_pc(&space.device()) == 0x67e3)
	424	if (space.device().safe_pc() == 0x67e3)
425	425	m_bootleg_cmd = 0x00;
426		if (cpu_get_pc(&space.device()) == 0x7c47)
	426	if (space.device().safe_pc() == 0x7c47)
427	427	m_bootleg_cmd = 0x00;
428	428	break;
429	429	case 0x89:  /* unneeded value : no read back */
430		if (cpu_get_pc(&space.device()) == 0x67e5)
	430	if (space.device().safe_pc() == 0x67e5)
431	431	m_bootleg_cmd = 0x00;
432	432	break;
433	433	case 0x8a:  /* unneeded value : call 0x2050 but unused HL and fixed DE (0x7c1c) */
434		if (cpu_get_pc(&space.device()) == 0x9661)
	434	if (space.device().safe_pc() == 0x9661)
435	435	m_bootleg_cmd = 0x00;
436	436	break;
437	437	case 0xc0:  /* unneeded value : no read back */
438		if (cpu_get_pc(&space.device()) == 0x67e7)
	438	if (space.device().safe_pc() == 0x67e7)
439	439	m_bootleg_cmd = 0x00;
440	440	break;
441	441	case 0xe3:  /* unneeded value : call 0x2050 but fixed A (0x61) */
442		if (cpu_get_pc(&space.device()) == 0x67e9)
	442	if (space.device().safe_pc() == 0x67e9)
443	443	m_bootleg_cmd = 0x00;
444	444	break;
445	445	case 0xf7:  /* unneeded value : call 0x2050 but never called (check code at 0x0340) */
446		if (cpu_get_pc(&space.device()) == 0x0349)
	446	if (space.device().safe_pc() == 0x0349)
447	447	m_bootleg_cmd = 0x00;
448	448	break;
449	449	case 0xff:  /* unneeded value : no call 0x2050, unused A and fixed HL (0x7d31) */
450		if (cpu_get_pc(&space.device()) == 0x9670)
	450	if (space.device().safe_pc() == 0x9670)
451	451	m_bootleg_cmd = 0x00;
452	452	break;
453	453	default:
r17788	r17789
460	460	switch (data)
461	461	{
462	462	case 0x36:  /* unneeded value : call 0x2050 but fixed A (0x2d) */
463		if (cpu_get_pc(&space.device()) == 0x7c4c)
	463	if (space.device().safe_pc() == 0x7c4c)
464	464	m_bootleg_cmd = 0x00;
465	465	break;
466	466	case 0x38:  /* unneeded value : call 0x2050 but fixed A (0xf3) */
467		if (cpu_get_pc(&space.device()) == 0x7b87)
	467	if (space.device().safe_pc() == 0x7b87)
468	468	m_bootleg_cmd = 0x00;
469	469	break;
470	470	case 0x88:  /* unneeded value : no read back */
471		if (cpu_get_pc(&space.device()) == 0x67e3)
	471	if (space.device().safe_pc() == 0x67e3)
472	472	m_bootleg_cmd = 0x00;
473		if (cpu_get_pc(&space.device()) == 0x7c47)
	473	if (space.device().safe_pc() == 0x7c47)
474	474	m_bootleg_cmd = 0x00;
475	475	case 0x89:  /* unneeded value : no read back */
476		if (cpu_get_pc(&space.device()) == 0x67e5)
	476	if (space.device().safe_pc() == 0x67e5)
477	477	m_bootleg_cmd = 0x00;
478	478	break;
479	479	case 0x8a:  /* call 0x2050 with A read from 0xf002 and wrong HL */
480		if (cpu_get_pc(&space.device()) == 0x9661)
	480	if (space.device().safe_pc() == 0x9661)
481	481	m_bootleg_cmd = data;
482	482	break;
483	483	case 0xc0:  /* unneeded value : no read back */
484		if (cpu_get_pc(&space.device()) == 0x67e7)
	484	if (space.device().safe_pc() == 0x67e7)
485	485	m_bootleg_cmd = 0x00;
486	486	break;
487	487	case 0xe3:  /* unneeded value : call 0x2050 but fixed A (0x61) */
488		if (cpu_get_pc(&space.device()) == 0x67e9)
	488	if (space.device().safe_pc() == 0x67e9)
489	489	m_bootleg_cmd = 0x00;
490	490	break;
491	491	case 0xf7:  /* unneeded value : 3 * 'NOP' at 0x034f + 'JR NZ,$035D' at 0x35b */
492		if (cpu_get_pc(&space.device()) == 0x0349)
	492	if (space.device().safe_pc() == 0x0349)
493	493	m_bootleg_cmd = 0x00;
494	494	break;
495	495	case 0xff:  /* call 0x2050 with A read from 0xf002 and wrong HL */
496		if (cpu_get_pc(&space.device()) == 0x9670)
	496	if (space.device().safe_pc() == 0x9670)
497	497	m_bootleg_cmd = data;
498	498	break;
499	499	default:
r17788	r17789
506	506	switch (data)
507	507	{
508	508	case 0x24:  /* A read from 0xf002 (expected to be 0x9b) */
509		if (cpu_get_pc(&space.device()) == 0xbd7a)
	509	if (space.device().safe_pc() == 0xbd7a)
510	510	m_bootleg_cmd = data;
511	511	break;
512	512	case 0x36:  /* call 0x2050 with A read from 0xf002 and wrong HL */
513		if (cpu_get_pc(&space.device()) == 0x7c4c)
	513	if (space.device().safe_pc() == 0x7c4c)
514	514	m_bootleg_cmd = data;
515	515	break;
516	516	case 0x38:  /* call 0x2050 with A read from 0xf002 and wrong HL */
517		if (cpu_get_pc(&space.device()) == 0x7b87)
	517	if (space.device().safe_pc() == 0x7b87)
518	518	m_bootleg_cmd = data;
519	519	break;
520	520	case 0x88:  /* unneeded value : no read back */
521		if (cpu_get_pc(&space.device()) == 0x67e3)
	521	if (space.device().safe_pc() == 0x67e3)
522	522	m_bootleg_cmd = 0x00;
523		if (cpu_get_pc(&space.device()) == 0x7c47)
	523	if (space.device().safe_pc() == 0x7c47)
524	524	m_bootleg_cmd = 0x00;
525	525	case 0x89:  /* unneeded value : no read back */
526		if (cpu_get_pc(&space.device()) == 0x67e5)
	526	if (space.device().safe_pc() == 0x67e5)
527	527	m_bootleg_cmd = 0x00;
528	528	break;
529	529	case 0x8a:  /* call 0x2050 with A read from 0xf002 and wrong HL */
530		if (cpu_get_pc(&space.device()) == 0x9661)
	530	if (space.device().safe_pc() == 0x9661)
531	531	m_bootleg_cmd = data;
532	532	break;
533	533	case 0xc0:  /* unneeded value : no read back */
534		if (cpu_get_pc(&space.device()) == 0x67e7)
	534	if (space.device().safe_pc() == 0x67e7)
535	535	m_bootleg_cmd = 0x00;
536	536	break;
537	537	case 0xc3:  /* A read from 0xf002 (expected to be 0x1d) */
538		if (cpu_get_pc(&space.device()) == 0xbd8a)
	538	if (space.device().safe_pc() == 0xbd8a)
539	539	m_bootleg_cmd = data;
540	540	break;
541	541	case 0xe3:  /* call 0x2050 with A read from 0xf002 and wrong HL */
542		if (cpu_get_pc(&space.device()) == 0x67e9)
	542	if (space.device().safe_pc() == 0x67e9)
543	543	m_bootleg_cmd = data;
544	544	break;
545	545	case 0xf7:  /* call 0x2050 with A read from 0xf002 and wrong HL */
546		if (cpu_get_pc(&space.device()) == 0x0349)
	546	if (space.device().safe_pc() == 0x0349)
547	547	m_bootleg_cmd = data;
548	548	break;
549	549	case 0xff:  /* call 0x2050 with A read from 0xf002 and wrong HL */
550		if (cpu_get_pc(&space.device()) == 0x9670)
	550	if (space.device().safe_pc() == 0x9670)
551	551	m_bootleg_cmd = data;
552	552	break;
553	553	default:
r17788	r17789
558	558	break;
559	559
560	560	default:
561		logerror("%04x: arkanoid_bootleg_d018_w - data = %02x - unknown bootleg !\n", cpu_get_pc(&space.device()), data);
	561	logerror("%04x: arkanoid_bootleg_d018_w - data = %02x - unknown bootleg !\n", space.device().safe_pc(), data);
562	562	break;
563	563	}
564	564	}
r17788	r17789
625	625	arkanoid_bootleg_d008_bit[2] = 0;  /* untested bit */
626	626	arkanoid_bootleg_d008_bit[3] = 0;  /* untested bit */
627	627	arkanoid_bootleg_d008_bit[5] = 0;  /* untested bit */
628		logerror("%04x: arkanoid_bootleg_d008_r - unknown bootleg !\n",cpu_get_pc(&space.device()));
	628	logerror("%04x: arkanoid_bootleg_d008_r - unknown bootleg !\n",space.device().safe_pc());
629	629	break;
630	630	}
631	631

trunk/src/mame/machine/archimds.c

r17788	r17789
473	473	static READ32_HANDLER( ioc_ctrl_r )
474	474	{
475	475	if(IOC_LOG)
476		logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], cpu_get_pc( &space->device() ),offset & 0x1f);
	476	logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], space->device() .safe_pc( ),offset & 0x1f);
477	477
478	478	switch (offset & 0x1f)
479	479	{
r17788	r17789
535	535	case T3_LATCH_HI: return (ioc_timerout[3]>>8)&0xff;
536	536	default:
537	537	if(!IOC_LOG)
538		logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], cpu_get_pc( &space->device() ),offset & 0x1f);
	538	logerror("IOC: R %s = %02x (PC=%x) %02x\n", ioc_regnames[offset&0x1f], ioc_regs[offset&0x1f], space->device() .safe_pc( ),offset & 0x1f);
539	539	break;
540	540	}
541	541
r17788	r17789
546	546	static WRITE32_HANDLER( ioc_ctrl_w )
547	547	{
548	548	if(IOC_LOG)
549		logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], cpu_get_pc( &space->device() ));
	549	logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], space->device() .safe_pc( ));
550	550
551	551	switch (offset&0x1f)
552	552	{
r17788	r17789
654	654
655	655	default:
656	656	if(!IOC_LOG)
657		logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], cpu_get_pc( &space->device() ));
	657	logerror("IOC: W %02x @ reg %s (PC=%x)\n", data&0xff, ioc_regnames[offset&0x1f], space->device() .safe_pc( ));
658	658
659	659	ioc_regs[offset&0x1f] = data & 0xff;
660	660	break;
r17788	r17789
778	778	}
779	779
780	780
781		logerror("(PC=%08x) I/O: W %x @ %x (mask %08x)\n", cpu_get_pc(&space->device()), data, (offset*4)+0x3000000, mem_mask);
	781	logerror("(PC=%08x) I/O: W %x @ %x (mask %08x)\n", space->device().safe_pc(), data, (offset*4)+0x3000000, mem_mask);
782	782	}
783	783
784	784	READ32_HANDLER(archimedes_vidc_r)
r17788	r17789
865	865	r = (val & 0x000f) >> 0;
866	866
867	867	if(reg == 0x40 && val & 0xfff)
868		logerror("WARNING: border color write here (PC=%08x)!\n",cpu_get_pc(&space->device()));
	868	logerror("WARNING: border color write here (PC=%08x)!\n",space->device().safe_pc());
869	869
870	870	palette_set_color_rgb(space->machine(), reg >> 2, pal4bit(r), pal4bit(g), pal4bit(b) );
871	871
r17788	r17789
982	982	case 7:   /* Control */
983	983	memc_pagesize = ((data>>2) & 3);
984	984
985		logerror("(PC = %08x) MEMC: %x to Control (page size %d, %s, %s)\n", cpu_get_pc(&space->device()), data & 0x1ffc, page_sizes[memc_pagesize], ((data>>10)&1) ? "Video DMA on" : "Video DMA off", ((data>>11)&1) ? "Sound DMA on" : "Sound DMA off");
	985	logerror("(PC = %08x) MEMC: %x to Control (page size %d, %s, %s)\n", space->device().safe_pc(), data & 0x1ffc, page_sizes[memc_pagesize], ((data>>10)&1) ? "Video DMA on" : "Video DMA off", ((data>>11)&1) ? "Sound DMA on" : "Sound DMA off");
986	986
987	987	video_dma_on = ((data>>10)&1);
988	988	audio_dma_on = ((data>>11)&1);
r17788	r17789
1087	1087	// now go ahead and set the mapping in the page table
1088	1088	memc_pages[log] = phys + (memc*0x80);
1089	1089
1090		//  printf("PC=%08x = MEMC_PAGE(%d): W %08x: log %x to phys %x, MEMC %d, perms %d\n", cpu_get_pc(&space->device()),memc_pagesize, data, log, phys, memc, perms);
	1090	//  printf("PC=%08x = MEMC_PAGE(%d): W %08x: log %x to phys %x, MEMC %d, perms %d\n", space->device().safe_pc(),memc_pagesize, data, log, phys, memc, perms);
1091	1091	}
1092	1092

trunk/src/mame/machine/galaxold.c

r17788	r17789
132	132	#ifdef UNUSED_FUNCTION
133	133	READ8_MEMBER(galaxold_state::checkmaj_protection_r)
134	134	{
135		switch (cpu_get_pc(&space.device()))
	135	switch (space.device().safe_pc())
136	136	{
137	137	case 0x0f15:  return 0xf5;
138	138	case 0x0f8f:  return 0x7c;
r17788	r17789
141	141	case 0x10f1:  return 0xaa;
142	142	case 0x1402:  return 0xaa;
143	143	default:
144		logerror("Unknown protection read. PC=%04X\n",cpu_get_pc(&space.device()));
	144	logerror("Unknown protection read. PC=%04X\n",space.device().safe_pc());
145	145	}
146	146
147	147	return 0;
r17788	r17789
225	225
226	226	READ8_MEMBER(galaxold_state::scramblb_protection_1_r)
227	227	{
228		switch (cpu_get_pc(&space.device()))
	228	switch (space.device().safe_pc())
229	229	{
230	230	case 0x01da: return 0x80;
231	231	case 0x01e4: return 0x00;
232	232	default:
233		logerror("%04x: read protection 1\n",cpu_get_pc(&space.device()));
	233	logerror("%04x: read protection 1\n",space.device().safe_pc());
234	234	return 0;
235	235	}
236	236	}
237	237
238	238	READ8_MEMBER(galaxold_state::scramblb_protection_2_r)
239	239	{
240		switch (cpu_get_pc(&space.device()))
	240	switch (space.device().safe_pc())
241	241	{
242	242	case 0x01ca: return 0x90;
243	243	default:
244		logerror("%04x: read protection 2\n",cpu_get_pc(&space.device()));
	244	logerror("%04x: read protection 2\n",space.device().safe_pc());
245	245	return 0;
246	246	}
247	247	}

trunk/src/mame/machine/gaelcrpt.c

r17788	r17789
124	124	{
125	125	static int lastpc, lastoffset, lastencword, lastdecword;
126	126
127		int thispc = cpu_get_pc(&space->device());
	127	int thispc = space->device().safe_pc();
128	128	//  int savedata = data;
129	129
130	130	/* check if 2nd half of 32 bit */

trunk/src/mame/machine/dec0.c

r17788	r17789
28	28	return ioport("DSW")->read();
29	29
30	30	case 8: /* Intel 8751 mc, Bad Dudes & Heavy Barrel only */
31		//logerror("CPU #0 PC %06x: warning - read i8751 %06x - %04x\n", cpu_get_pc(&space.device()), 0x30c000+offset, m_i8751_return);
	31	//logerror("CPU #0 PC %06x: warning - read i8751 %06x - %04x\n", space.device().safe_pc(), 0x30c000+offset, m_i8751_return);
32	32	return m_i8751_return;
33	33	}
34	34
35		logerror("CPU #0 PC %06x: warning - read unmapped memory address %06x\n", cpu_get_pc(&space.device()), 0x30c000+offset);
	35	logerror("CPU #0 PC %06x: warning - read unmapped memory address %06x\n", space.device().safe_pc(), 0x30c000+offset);
36	36	return ~0;
37	37	}
38	38
r17788	r17789
80	80	return 0;   /* ?? watchdog ?? */
81	81	}
82	82
83		logerror("PC %06x unknown control read at %02x\n", cpu_get_pc(&space.device()), 0x180000+offset);
	83	logerror("PC %06x unknown control read at %02x\n", space.device().safe_pc(), 0x180000+offset);
84	84	return ~0;
85	85	}
86	86
r17788	r17789
331	331
332	332	READ16_MEMBER(dec0_state::robocop_68000_share_r)
333	333	{
334		//logerror("%08x: Share read %04x\n",cpu_get_pc(&space.device()),offset);
	334	//logerror("%08x: Share read %04x\n",space.device().safe_pc(),offset);
335	335
336	336	return m_robocop_shared_ram[offset];
337	337	}
338	338
339	339	WRITE16_MEMBER(dec0_state::robocop_68000_share_w)
340	340	{
341		//  logerror("%08x: Share write %04x %04x\n",cpu_get_pc(&space.device()),offset,data);
	341	//  logerror("%08x: Share write %04x %04x\n",space.device().safe_pc(),offset,data);
342	342
343	343	m_robocop_shared_ram[offset]=data&0xff;
344	344

trunk/src/mame/machine/lsasquad.c

r17788	r17789
39	39	m_sound_pending |= 0x01;
40	40	m_sound_cmd = data;
41	41
42		//logerror("%04x: sound cmd %02x\n", cpu_get_pc(&space.device()), data);
	42	//logerror("%04x: sound cmd %02x\n", space.device().safe_pc(), data);
43	43	machine().scheduler().synchronize(FUNC(nmi_callback), data);
44	44	}
45	45
46	46	READ8_MEMBER(lsasquad_state::lsasquad_sh_sound_command_r)
47	47	{
48	48	m_sound_pending &= ~0x01;
49		//logerror("%04x: read sound cmd %02x\n", cpu_get_pc(&space.device()), m_sound_cmd);
	49	//logerror("%04x: read sound cmd %02x\n", space.device().safe_pc(), m_sound_cmd);
50	50	return m_sound_cmd;
51	51	}
52	52
53	53	WRITE8_MEMBER(lsasquad_state::lsasquad_sh_result_w)
54	54	{
55	55	m_sound_pending |= 0x02;
56		//logerror("%04x: sound res %02x\n", cpu_get_pc(&space.device()), data);
	56	//logerror("%04x: sound res %02x\n", space.device().safe_pc(), data);
57	57	m_sound_result = data;
58	58	}
59	59
60	60	READ8_MEMBER(lsasquad_state::lsasquad_sound_result_r)
61	61	{
62	62	m_sound_pending &= ~0x02;
63		//logerror("%04x: read sound res %02x\n", cpu_get_pc(&space.device()), m_sound_result);
	63	//logerror("%04x: read sound res %02x\n", space.device().safe_pc(), m_sound_result);
64	64	return m_sound_result;
65	65	}
66	66
r17788	r17789
77	77	{
78	78	m_sound_pending &= ~0x01;
79	79	m_sound_pending |= 0x02;
80		//logerror("%04x: read sound cmd %02x\n", cpu_get_pc(&space.device()), m_sound_cmd);
	80	//logerror("%04x: read sound cmd %02x\n", space.device().safe_pc(), m_sound_cmd);
81	81	return m_sound_cmd;
82	82	}
83	83
r17788	r17789
101	101	READ8_MEMBER(lsasquad_state::lsasquad_68705_port_a_r)
102	102	{
103	103
104		//logerror("%04x: 68705 port A read %02x\n", cpu_get_pc(&space.device()), m_port_a_in);
	104	//logerror("%04x: 68705 port A read %02x\n", space.device().safe_pc(), m_port_a_in);
105	105	return (m_port_a_out & m_ddr_a) | (m_port_a_in & ~m_ddr_a);
106	106	}
107	107
108	108	WRITE8_MEMBER(lsasquad_state::lsasquad_68705_port_a_w)
109	109	{
110	110
111		//logerror("%04x: 68705 port A write %02x\n", cpu_get_pc(&space.device()), data);
	111	//logerror("%04x: 68705 port A write %02x\n", space.device().safe_pc(), data);
112	112	m_port_a_out = data;
113	113	}
114	114
r17788	r17789
136	136	WRITE8_MEMBER(lsasquad_state::lsasquad_68705_port_b_w)
137	137	{
138	138
139		//logerror("%04x: 68705 port B write %02x\n", cpu_get_pc(&space.device()), data);
	139	//logerror("%04x: 68705 port B write %02x\n", space.device().safe_pc(), data);
140	140
141	141	if ((m_ddr_b & 0x02) && (~data & 0x02) && (m_port_b_out & 0x02))
142	142	{
r17788	r17789
165	165	WRITE8_MEMBER(lsasquad_state::lsasquad_mcu_w)
166	166	{
167	167
168		//logerror("%04x: mcu_w %02x\n", cpu_get_pc(&space.device()), data);
	168	//logerror("%04x: mcu_w %02x\n", space.device().safe_pc(), data);
169	169	m_from_main = data;
170	170	m_main_sent = 1;
171	171	device_set_input_line(m_mcu, 0, ASSERT_LINE);
r17788	r17789
174	174	READ8_MEMBER(lsasquad_state::lsasquad_mcu_r)
175	175	{
176	176
177		//logerror("%04x: mcu_r %02x\n", cpu_get_pc(&space.device()), m_from_mcu);
	177	//logerror("%04x: mcu_r %02x\n", space.device().safe_pc(), m_from_mcu);
178	178	m_mcu_sent = 0;
179	179	return m_from_mcu;
180	180	}
r17788	r17789
185	185
186	186	/* bit 0 = when 1, mcu is ready to receive data from main cpu */
187	187	/* bit 1 = when 0, mcu has sent data to the main cpu */
188		//logerror("%04x: mcu_status_r\n",cpu_get_pc(&space.device()));
	188	//logerror("%04x: mcu_status_r\n",space.device().safe_pc());
189	189	if (!m_main_sent)
190	190	res |= 0x01;
191	191	if (!m_mcu_sent)
r17788	r17789
200	200
201	201	/* bit 0 = when 1, mcu is ready to receive data from main cpu */
202	202	/* bit 1 = when 0, mcu has sent data to the main cpu */
203		//logerror("%04x: mcu_status_r\n",cpu_get_pc(&space.device()));
	203	//logerror("%04x: mcu_status_r\n",space.device().safe_pc());
204	204	if (!m_main_sent)
205	205	res |= 0x01;
206	206	if (!m_mcu_sent)

trunk/src/mame/machine/cchip.c

r17788	r17789
90	90	}
91	91	else
92	92	{
93		logerror("cchip1_w pc: %06x bank %02x offset %04x: %02x\n",cpu_get_pc(&space->device()),current_bank,offset,data);
	93	logerror("cchip1_w pc: %06x bank %02x offset %04x: %02x\n",space->device().safe_pc(),current_bank,offset,data);
94	94	}
95	95	}
96	96

trunk/src/mame/machine/namcond1.c

r17788	r17789
72	72
73	73	default :
74	74	logerror( "offset $%X accessed from $%X\n",
75		offset<<1, cpu_get_pc(&space.device()) );
	75	offset<<1, space.device().safe_pc() );
76	76	return( 0 );
77	77	}
78	78	}

trunk/src/mame/machine/opwolf.c

r17788	r17789
411	411	m_cchip_ram[(m_current_bank * 0x400) + offset] = data & 0xff;
412	412
413	413	//  if (offset != 0x64 && offset != 0x65 && offset != 0x66 && offset != 0x67 && offset != 0x68 && offset != 0x69)
414		//      logerror("%08x:  opwolf c write %04x %04x\n", cpu_get_pc(&space.device()), offset, data);
	414	//      logerror("%08x:  opwolf c write %04x %04x\n", space.device().safe_pc(), offset, data);
415	415
416	416	if (m_current_bank == 0)
417	417	{
r17788	r17789
512	512	READ16_MEMBER(opwolf_state::opwolf_cchip_data_r)
513	513	{
514	514
515		//  if (offset!=0x7f && offset!=0x1c && offset!=0x1d && offset!=0x1e && offset!=0x1f && offset!=0x20 && cpu_get_pc(&space.device())!=0xc18 && cpu_get_pc(&space.device())!=0xc2e && cpu_get_pc(&space.device())!=0xc9e && offset!=0x50 && offset!=0x51 && offset!=0x52 && offset!=0x53 && offset!=0x5 && offset!=0x13 && offset!=0x79 && offset!=0x12 && offset!=0x34)
516		//      logerror("%08x:  opwolf c read %04x (bank %04x)\n", cpu_get_pc(&space.device()), offset, m_current_bank);
	515	//  if (offset!=0x7f && offset!=0x1c && offset!=0x1d && offset!=0x1e && offset!=0x1f && offset!=0x20 && space.device().safe_pc()!=0xc18 && space.device().safe_pc()!=0xc2e && space.device().safe_pc()!=0xc9e && offset!=0x50 && offset!=0x51 && offset!=0x52 && offset!=0x53 && offset!=0x5 && offset!=0x13 && offset!=0x79 && offset!=0x12 && offset!=0x34)
	516	//      logerror("%08x:  opwolf c read %04x (bank %04x)\n", space.device().safe_pc(), offset, m_current_bank);
517	517
518	518	return m_cchip_ram[(m_current_bank * 0x400) + offset];
519	519	}

trunk/src/mame/machine/seicop.c

r17788	r17789
1672	1672	{
1673	1673	default:
1674	1674	{
1675		logerror("%06x: COPX unhandled read returning %04x from offset %04x\n", cpu_get_pc(&space->device()), retvalue, offset*2);
	1675	logerror("%06x: COPX unhandled read returning %04x from offset %04x\n", space->device().safe_pc(), retvalue, offset*2);
1676	1676	return retvalue;
1677	1677	}
1678	1678
r17788	r17789
1698	1698	{
1699	1699	default:
1700	1700	{
1701		logerror("%06x: COPX unhandled write data %04x at offset %04x\n", cpu_get_pc(&space->device()), data, offset*2);
	1701	logerror("%06x: COPX unhandled write data %04x at offset %04x\n", space->device().safe_pc(), data, offset*2);
1702	1702	break;
1703	1703	}
1704	1704
r17788	r17789
1852	1852	return cop_angle;
1853	1853
1854	1854	default:
1855		seibu_cop_log("%06x: COPX unhandled read returning %04x from offset %04x\n", cpu_get_pc(&space->device()), retvalue, offset*2);
	1855	seibu_cop_log("%06x: COPX unhandled read returning %04x from offset %04x\n", space->device().safe_pc(), retvalue, offset*2);
1856	1856	return retvalue;
1857	1857	}
1858	1858	}
r17788	r17789
1870	1870	switch (offset)
1871	1871	{
1872	1872	default:
1873		seibu_cop_log("%06x: COPX unhandled write data %04x at offset %04x\n", cpu_get_pc(&space->device()), data, offset*2);
	1873	seibu_cop_log("%06x: COPX unhandled write data %04x at offset %04x\n", space->device().safe_pc(), data, offset*2);
1874	1874	break;
1875	1875
1876	1876	/* Sprite DMA */
r17788	r17789
1977	1977	case (0x078/2): /* DMA source address */
1978	1978	{
1979	1979	cop_dma_src[cop_dma_trigger] = data; // << 6 to get actual address
1980		//seibu_cop_log("%06x: COPX set layer clear address to %04x (actual %08x)\n", cpu_get_pc(&space->device()), data, data<<6);
	1980	//seibu_cop_log("%06x: COPX set layer clear address to %04x (actual %08x)\n", space->device().safe_pc(), data, data<<6);
1981	1981	break;
1982	1982	}
1983	1983
1984	1984	case (0x07a/2): /* DMA length */
1985	1985	{
1986	1986	cop_dma_size[cop_dma_trigger] = data;
1987		//seibu_cop_log("%06x: COPX set layer clear length to %04x (actual %08x)\n", cpu_get_pc(&space->device()), data, data<<5);
	1987	//seibu_cop_log("%06x: COPX set layer clear length to %04x (actual %08x)\n", space->device().safe_pc(), data, data<<5);
1988	1988	break;
1989	1989	}
1990	1990
1991	1991	case (0x07c/2): /* DMA destination */
1992	1992	{
1993	1993	cop_dma_dst[cop_dma_trigger] = data;
1994		//seibu_cop_log("%06x: COPX set layer clear value to %04x (actual %08x)\n", cpu_get_pc(&space->device()), data, data<<6);
	1994	//seibu_cop_log("%06x: COPX set layer clear value to %04x (actual %08x)\n", space->device().safe_pc(), data, data<<6);
1995	1995	break;
1996	1996	}
1997	1997
1998	1998	case (0x07e/2): /* DMA parameter */
1999	1999	{
2000	2000	cop_dma_trigger = data;
2001		//seibu_cop_log("%06x: COPX set layer clear trigger? to %04x\n", cpu_get_pc(&space->device()), data);
	2001	//seibu_cop_log("%06x: COPX set layer clear trigger? to %04x\n", space->device().safe_pc(), data);
2002	2002	if (data>=0x1ff)
2003	2003	{
2004	2004	seibu_cop_log("invalid DMA trigger!, >0x1ff\n");
r17788	r17789
2051	2051	int command;
2052	2052
2053	2053	#if LOG_CMDS
2054		seibu_cop_log("%06x: COPX execute table macro command %04x %04x | regs %08x %08x %08x %08x %08x\n", cpu_get_pc(&space->device()), data, cop_mcu_ram[offset], cop_register[0], cop_register[1], cop_register[2], cop_register[3], cop_register[4]);
	2054	seibu_cop_log("%06x: COPX execute table macro command %04x %04x | regs %08x %08x %08x %08x %08x\n", space->device().safe_pc(), data, cop_mcu_ram[offset], cop_register[0], cop_register[1], cop_register[2], cop_register[3], cop_register[4]);
2055	2055	#endif
2056	2056
2057	2057	command = -1;
r17788	r17789
2298	2298	//(heatbrl)  | 9 | ffff | b080 | b40 bc0 bc2
2299	2299	if(COP_CMD(0xb40,0xbc0,0xbc2,0x000,0x000,0x000,0x000,0x000,u1,u2))
2300	2300	{
2301		UINT8 start_x,start_y,end_x,end_y;
	2301	UINT8 start_x,/*start_y,*/end_x,end_y;
2302	2302	cop_collision_info[0].hitbox = space->read_word(cop_register[2]);
2303	2303	cop_collision_info[0].hitbox_y = space->read_word((cop_register[2]&0xffff0000)|(cop_collision_info[0].hitbox));
2304	2304	cop_collision_info[0].hitbox_x = space->read_word(((cop_register[2]&0xffff0000)|(cop_collision_info[0].hitbox))+2);
r17788	r17789
2335	2335	//(heatbrl)  | 6 | ffff | b880 | b60 be0 be2
2336	2336	if(COP_CMD(0xb60,0xbe0,0xbe2,0x000,0x000,0x000,0x000,0x000,u1,u2))
2337	2337	{
2338		UINT8 start_x,start_y, end_x,end_y;
	2338	UINT8 start_x,/*start_y,*/end_x,end_y;
2339	2339
2340	2340	/* Take hitbox param, TODO */
2341	2341	cop_collision_info[1].hitbox = space->read_word(cop_register[3]);
r17788	r17789
2498	2498	/* DMA go register */
2499	2499	case (0x2fc/2):
2500	2500	{
2501		//seibu_cop_log("%06x: COPX execute current layer clear??? %04x\n", cpu_get_pc(&space->device()), data);
	2501	//seibu_cop_log("%06x: COPX execute current layer clear??? %04x\n", space->device().safe_pc(), data);
2502	2502
2503	2503	if (cop_dma_trigger >= 0x80 && cop_dma_trigger <= 0x87)
2504	2504	{

trunk/src/mame/machine/slapstic.c

r17788	r17789
876	876	if (access_68k)
877	877	{
878	878	/* first verify that the prefetched PC matches the first alternate */
879		if (MATCHES_MASK_VALUE(cpu_get_pc(&space->device()) >> 1, slapstic.alt1))
	879	if (MATCHES_MASK_VALUE(space->device().safe_pc() >> 1, slapstic.alt1))
880	880	{
881	881	/* now look for a move.w (An),(An) or cmpm.w (An)+,(An)+ */
882		UINT16 opcode = space->direct().read_decrypted_word(cpu_get_previouspc(&space->device()) & 0xffffff);
	882	UINT16 opcode = space->direct().read_decrypted_word(space->device().safe_pcbase() & 0xffffff);
883	883	if ((opcode & 0xf1f8) == 0x3090 || (opcode & 0xf1f8) == 0xb148)
884	884	{
885	885	/* fetch the value of the register for the second operand, and see */

trunk/src/mame/machine/ajax.c

r17788	r17789
126	126	break;
127	127
128	128	default:
129		logerror("%04x: (ls138_f10) read from an unknown address %02x\n",cpu_get_pc(&space.device()), offset);
	129	logerror("%04x: (ls138_f10) read from an unknown address %02x\n",space.device().safe_pc(), offset);
130	130	}
131	131
132	132	return data;
r17788	r17789
159	159	break;
160	160
161	161	default:
162		logerror("%04x: (ls138_f10) write %02x to an unknown address %02x\n", cpu_get_pc(&space.device()), data, offset);
	162	logerror("%04x: (ls138_f10) write %02x to an unknown address %02x\n", space.device().safe_pc(), data, offset);
163	163	}
164	164	}
165	165

trunk/src/mame/machine/cdi070.c

r17788	r17789
34	34	va_start( v, s_fmt );
35	35	vsprintf( buf, s_fmt, v );
36	36	va_end( v );
37		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	37	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
38	38	}
39	39	}
40	40	#else

trunk/src/mame/includes/megadriv.h

r17788	r17789
135	135	// jzth protection
136	136	DECLARE_WRITE16_MEMBER( bl_710000_w )
137	137	{
138		int pc = cpu_get_pc(&space.device());
	138	int pc = space.device().safe_pc();
139	139
140	140	logerror("%06x writing to bl_710000_w %04x %04x\n", pc, data, mem_mask);
141	141
r17788	r17789
191	191	DECLARE_READ16_MEMBER( bl_710000_r )
192	192	{
193	193	UINT16 ret;
194		int pc = cpu_get_pc(&space.device());
	194	int pc = space.device().safe_pc();
195	195	logerror("%06x reading from bl_710000_r\n", pc);
196	196
197	197	if (m_protcount==6) { ret = 0xe; }

trunk/src/mame/video/mitchell.c

r17788	r17789
139	139	WRITE8_MEMBER(mitchell_state::pang_gfxctrl_w)
140	140	{
141	141
142		logerror("PC %04x: pang_gfxctrl_w %02x\n",cpu_get_pc(&space.device()),data);
	142	logerror("PC %04x: pang_gfxctrl_w %02x\n",space.device().safe_pc(),data);
143	143	{
144	144	#if 0
145	145	char baf[40];
r17788	r17789
178	178	WRITE8_MEMBER(mitchell_state::pangbl_gfxctrl_w)
179	179	{
180	180
181		logerror("PC %04x: pang_gfxctrl_w %02x\n",cpu_get_pc(&space.device()),data);
	181	logerror("PC %04x: pang_gfxctrl_w %02x\n",space.device().safe_pc(),data);
182	182	{
183	183	#if 0
184	184	char baf[40];
r17788	r17789
215	215	WRITE8_MEMBER(mitchell_state::mstworld_gfxctrl_w)
216	216	{
217	217
218		logerror("PC %04x: pang_gfxctrl_w %02x\n",cpu_get_pc(&space.device()),data);
	218	logerror("PC %04x: pang_gfxctrl_w %02x\n",space.device().safe_pc(),data);
219	219	{
220	220	char baf[40];
221	221	sprintf(baf,"%02x",data);

trunk/src/mame/video/mcd212.c

r17788	r17789
34	34	va_start( v, s_fmt );
35	35	vsprintf( buf, s_fmt, v );
36	36	va_end( v );
37		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	37	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
38	38	}
39	39	}
40	40	#else

trunk/src/mame/video/stvvdp1.c

r17788	r17789
168	168	{
169	169	saturn_state *state = space->machine().driver_data<saturn_state>();
170	170
171		//logerror ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space->device().tag(), cpu_get_pc(&space->device()), offset);
	171	//logerror ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space->device().tag(), space->device().safe_pc(), offset);
172	172
173	173	switch(offset)
174	174	{
r17788	r17789
194	194
195	195	return modr;
196	196	default:
197		printf ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space->device().tag(), cpu_get_pc(&space->device()), offset*2);
	197	printf ("cpu %s (PC=%08X) VDP1: Read from Registers, Offset %04x\n", space->device().tag(), space->device().safe_pc(), offset*2);
198	198	break;
199	199	}
200	200
r17788	r17789
346	346
347	347	//  if (((offset * 4) > 0xdf) && ((offset * 4) < 0x140))
348	348	//  {
349		//      logerror("cpu %s (PC=%08X): VRAM dword write to %08X = %08X & %08X\n", space->device().tag(), cpu_get_pc(&space->device()), offset*4, data, mem_mask);
	349	//      logerror("cpu %s (PC=%08X): VRAM dword write to %08X = %08X & %08X\n", space->device().tag(), space->device().safe_pc(), offset*4, data, mem_mask);
350	350	//  }
351	351
352	352	data = state->m_vdp1_vram[offset];

trunk/src/mame/video/hexion.c

r17788	r17789
82	82	if (data & 0x30)
83	83	popmessage("bankswitch %02x",data&0xf0);
84	84
85		//logerror("%04x: bankswitch_w %02x\n",cpu_get_pc(&space.device()),data);
	85	//logerror("%04x: bankswitch_w %02x\n",space.device().safe_pc(),data);
86	86	}
87	87
88	88	READ8_MEMBER(hexion_state::hexion_bankedram_r)
r17788	r17789
101	101	}
102	102	else
103	103	{
104		//logerror("%04x: bankedram_r offset %04x, bankctrl = %02x\n",cpu_get_pc(&space.device()),offset,m_bankctrl);
	104	//logerror("%04x: bankedram_r offset %04x, bankctrl = %02x\n",space.device().safe_pc(),offset,m_bankctrl);
105	105	return 0;
106	106	}
107	107	}
r17788	r17789
110	110	{
111	111	if (m_bankctrl == 3 && offset == 0 && (data & 0xfe) == 0)
112	112	{
113		//logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(&space.device()),offset,data,m_bankctrl);
	113	//logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",space.device().safe_pc(),offset,data,m_bankctrl);
114	114	m_rambank = data & 1;
115	115	}
116	116	else if (m_bankctrl == 0)
117	117	{
118	118	if (m_pmcbank)
119	119	{
120		//logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(&space.device()),offset,data,m_bankctrl);
	120	//logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",space.device().safe_pc(),offset,data,m_bankctrl);
121	121	m_vram[m_rambank][offset] = data;
122	122	m_bg_tilemap[m_rambank]->mark_tile_dirty(offset/4);
123	123	}
124	124	else
125		logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(&space.device()),offset,data);
	125	logerror("%04x pmc internal ram %04x = %02x\n",space.device().safe_pc(),offset,data);
126	126	}
127	127	else if (m_bankctrl == 2 && offset < 0x800)
128	128	{
129	129	if (m_pmcbank)
130	130	{
131		//logerror("%04x: unkram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(&space.device()),offset,data,m_bankctrl);
	131	//logerror("%04x: unkram_w offset %04x, data %02x, bankctrl = %02x\n",space.device().safe_pc(),offset,data,m_bankctrl);
132	132	m_unkram[offset] = data;
133	133	}
134	134	else
135		logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(&space.device()),offset,data);
	135	logerror("%04x pmc internal ram %04x = %02x\n",space.device().safe_pc(),offset,data);
136	136	}
137	137	else
138		logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",cpu_get_pc(&space.device()),offset,data,m_bankctrl);
	138	logerror("%04x: bankedram_w offset %04x, data %02x, bankctrl = %02x\n",space.device().safe_pc(),offset,data,m_bankctrl);
139	139	}
140	140
141	141	WRITE8_MEMBER(hexion_state::hexion_bankctrl_w)
142	142	{
143		//logerror("%04x: bankctrl_w %02x\n",cpu_get_pc(&space.device()),data);
	143	//logerror("%04x: bankctrl_w %02x\n",space.device().safe_pc(),data);
144	144	m_bankctrl = data;
145	145	}
146	146
147	147	WRITE8_MEMBER(hexion_state::hexion_gfxrom_select_w)
148	148	{
149		//logerror("%04x: gfxrom_select_w %02x\n",cpu_get_pc(&space.device()),data);
	149	//logerror("%04x: gfxrom_select_w %02x\n",space.device().safe_pc(),data);
150	150	m_gfxrom_select = data;
151	151	}
152	152

trunk/src/mame/video/galpani2.c

r17788	r17789
32	32	{
33	33	case 0x16:   return space->machine().rand() & 1;
34	34	default:
35		logerror("CPU #0 PC %06X : Warning, bg8 #%d screen reg %04X read\n",cpu_get_pc(space->cpu),_n_,offset*2);
	35	logerror("CPU #0 PC %06X : Warning, bg8 #%d screen reg %04X read\n",space->cpu->safe_pc(),_n_,offset*2);
36	36	}
37	37	return state->m_bg8_regs[_n_][offset];
38	38	}

trunk/src/mame/video/policetr.c

r17788	r17789
143	143	{
144	144	/* we assume 4-byte accesses */
145	145	if (mem_mask)
146		logerror("%08X: policetr_video_w access with mask %08X\n", cpu_get_previouspc(&space.device()), mem_mask);
	146	logerror("%08X: policetr_video_w access with mask %08X\n", space.device().safe_pcbase(), mem_mask);
147	147
148	148	/* 4 offsets */
149	149	switch (offset)
r17788	r17789
193	193
194	194	/* log anything else */
195	195	default:
196		logerror("%08X: policetr_video_w(2) = %08X & %08X with latch %02X\n", cpu_get_previouspc(&space.device()), data, mem_mask, m_video_latch);
	196	logerror("%08X: policetr_video_w(2) = %08X & %08X with latch %02X\n", space.device().safe_pcbase(), data, mem_mask, m_video_latch);
197	197	break;
198	198	}
199	199	break;
r17788	r17789
207	207	/* latch 0x00 is unknown; 0, 1, and 2 get written into the upper 12 bits before rendering */
208	208	case 0x00:
209	209	if (data != (0 << 20) && data != (1 << 20) && data != (2 << 20))
210		logerror("%08X: policetr_video_w(3) = %08X & %08X with latch %02X\n", cpu_get_previouspc(&space.device()), data, mem_mask, m_video_latch);
	210	logerror("%08X: policetr_video_w(3) = %08X & %08X with latch %02X\n", space.device().safe_pcbase(), data, mem_mask, m_video_latch);
211	211	break;
212	212
213	213	/* latch 0x10 specifies destination bitmap X and Y offsets */
r17788	r17789
219	219	/* latch 0x20 is unknown; either 0xef or 0x100 is written every IRQ4 */
220	220	case 0x20:
221	221	if (data != (0x100 << 12) && data != (0xef << 12))
222		logerror("%08X: policetr_video_w(3) = %08X & %08X with latch %02X\n", cpu_get_previouspc(&space.device()), data, mem_mask, m_video_latch);
	222	logerror("%08X: policetr_video_w(3) = %08X & %08X with latch %02X\n", space.device().safe_pcbase(), data, mem_mask, m_video_latch);
223	223	break;
224	224
225	225	/* latch 0x40 is unknown; a 0 is written every IRQ4 */
226	226	case 0x40:
227	227	if (data != 0)
228		logerror("%08X: policetr_video_w(3) = %08X & %08X with latch %02X\n", cpu_get_previouspc(&space.device()), data, mem_mask, m_video_latch);
	228	logerror("%08X: policetr_video_w(3) = %08X & %08X with latch %02X\n", space.device().safe_pcbase(), data, mem_mask, m_video_latch);
229	229	break;
230	230
231	231	/* latch 0x50 clears IRQ4 */
r17788	r17789
240	240
241	241	/* log anything else */
242	242	default:
243		logerror("%08X: policetr_video_w(3) = %08X & %08X with latch %02X\n", cpu_get_previouspc(&space.device()), data, mem_mask, m_video_latch);
	243	logerror("%08X: policetr_video_w(3) = %08X & %08X with latch %02X\n", space.device().safe_pcbase(), data, mem_mask, m_video_latch);
244	244	break;
245	245	}
246	246	break;
r17788	r17789
300	300	}
301	301
302	302	/* log anything else */
303		logerror("%08X: policetr_video_r with latch %02X\n", cpu_get_previouspc(&space.device()), m_video_latch);
	303	logerror("%08X: policetr_video_r with latch %02X\n", space.device().safe_pcbase(), m_video_latch);
304	304	return 0;
305	305	}
306	306

trunk/src/mame/video/st0020.c

r17788	r17789
115	115	return 0;
116	116	}
117	117
118		logerror("CPU #0 PC: %06X - Blit reg read: %02X\n",cpu_get_pc(&space.device()),offset*2);
	118	logerror("CPU #0 PC: %06X - Blit reg read: %02X\n",space.device().safe_pc(),offset*2);
119	119	return 0;
120	120	}
121	121
r17788	r17789
137	137	case 0x8a/2:
138	138	{
139	139	if (data & ~0x43)
140		logerror("CPU #0 PC: %06X - Unknown st0020_gfxram_bank bit written %04X\n",cpu_get_pc(&space.device()),data);
	140	logerror("CPU #0 PC: %06X - Unknown st0020_gfxram_bank bit written %04X\n",space.device().safe_pc(),data);
141	141
142	142	if (ACCESSING_BITS_0_7)
143	143	m_st0020_gfxram_bank = data & 3;
r17788	r17789
162	162
163	163	if (!rom)
164	164	{
165		logerror("CPU #0 PC: %06X - Blit out of range: src %x, dst %x, len %x\n",cpu_get_pc(&space.device()),src,dst,len);
	165	logerror("CPU #0 PC: %06X - Blit out of range: src %x, dst %x, len %x\n",space.device().safe_pc(),src,dst,len);
166	166	return;
167	167	}
168	168
r17788	r17789
184	184	}
185	185	else
186	186	{
187		logerror("CPU #0 PC: %06X - Blit out of range: src %x, dst %x, len %x\n",cpu_get_pc(&space.device()),src,dst,len);
	187	logerror("CPU #0 PC: %06X - Blit out of range: src %x, dst %x, len %x\n",space.device().safe_pc(),src,dst,len);
188	188	}
189	189	}
190	190	break;
191	191
192	192	default:
193		logerror("CPU #0 PC: %06X - Blit reg written: %02X <- %04X\n",cpu_get_pc(&space.device()),offset*2,data);
	193	logerror("CPU #0 PC: %06X - Blit reg written: %02X <- %04X\n",space.device().safe_pc(),offset*2,data);
194	194	}
195	195	}
196	196

trunk/src/mame/video/scn2674.c

r17788	r17789
519	519	*/
520	520
521	521	case 0:
522		LOG2674(("Read Irq Register %02x %06x\n",m_scn2674_irq_register,cpu_get_pc(&space.device())));
	522	LOG2674(("Read Irq Register %02x %06x\n",m_scn2674_irq_register,space.device().safe_pc()));
523	523	return m_scn2674_irq_register;
524	524
525	525	case 1:
526		LOG2674(("Read Status Register %02X %06x\n",m_scn2674_status_register,cpu_get_pc(&space.device())));
	526	LOG2674(("Read Status Register %02X %06x\n",m_scn2674_status_register,space.device().safe_pc()));
527	527	return m_scn2674_status_register;
528	528
529		case 2: LOG2674(("Read Screen1_l Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_screen1_l;
530		case 3: LOG2674(("Read Screen1_h Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_screen1_h;
531		case 4: LOG2674(("Read Cursor_l Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_cursor_l;
532		case 5: LOG2674(("Read Cursor_h Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_cursor_h;
533		case 6:   LOG2674(("Read Screen2_l Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_screen2_l;
534		case 7: LOG2674(("Read Screen2_h Register %06x\n",cpu_get_pc(&space.device())));return m_scn2674_screen2_h;
	529	case 2: LOG2674(("Read Screen1_l Register %06x\n",space.device().safe_pc()));return m_scn2674_screen1_l;
	530	case 3: LOG2674(("Read Screen1_h Register %06x\n",space.device().safe_pc()));return m_scn2674_screen1_h;
	531	case 4: LOG2674(("Read Cursor_l Register %06x\n",space.device().safe_pc()));return m_scn2674_cursor_l;
	532	case 5: LOG2674(("Read Cursor_h Register %06x\n",space.device().safe_pc()));return m_scn2674_cursor_h;
	533	case 6:   LOG2674(("Read Screen2_l Register %06x\n",space.device().safe_pc()));return m_scn2674_screen2_l;
	534	case 7: LOG2674(("Read Screen2_h Register %06x\n",space.device().safe_pc()));return m_scn2674_screen2_h;
535	535	}
536	536
537	537	return 0xffff;

trunk/src/mame/video/seta2.c

r17788	r17789
128	128
129	129	COMBINE_DATA(&m_vregs[offset]);
130	130	if ( m_vregs[offset] != olddata )
131		logerror("CPU #0 PC %06X: Video Reg %02X <- %04X\n",cpu_get_pc(&space.device()),offset*2,data);
	131	logerror("CPU #0 PC %06X: Video Reg %02X <- %04X\n",space.device().safe_pc(),offset*2,data);
132	132
133	133	switch( offset*2 )
134	134	{
135	135	case 0x1c:   // FLIP SCREEN (myangel)    <- this is actually zoom
136	136	flip_screen_set(data & 1 );
137		if (data & ~1)   logerror("CPU #0 PC %06X: flip screen unknown bits %04X\n",cpu_get_pc(&space.device()),data);
	137	if (data & ~1)   logerror("CPU #0 PC %06X: flip screen unknown bits %04X\n",space.device().safe_pc(),data);
138	138	break;
139	139	case 0x2a:   // FLIP X (pzlbowl)
140	140	flip_screen_x_set(data & 1 );
141		if (data & ~1)   logerror("CPU #0 PC %06X: flipx unknown bits %04X\n",cpu_get_pc(&space.device()),data);
	141	if (data & ~1)   logerror("CPU #0 PC %06X: flipx unknown bits %04X\n",space.device().safe_pc(),data);
142	142	break;
143	143	case 0x2c:   // FLIP Y (pzlbowl)
144	144	flip_screen_y_set(data & 1 );
145		if (data & ~1)   logerror("CPU #0 PC %06X: flipy unknown bits %04X\n",cpu_get_pc(&space.device()),data);
	145	if (data & ~1)   logerror("CPU #0 PC %06X: flipy unknown bits %04X\n",space.device().safe_pc(),data);
146	146	break;
147	147
148	148	case 0x30:   // BLANK SCREEN (pzlbowl, myangel)
149		if (data & ~1)   logerror("CPU #0 PC %06X: blank unknown bits %04X\n",cpu_get_pc(&space.device()),data);
	149	if (data & ~1)   logerror("CPU #0 PC %06X: blank unknown bits %04X\n",space.device().safe_pc(),data);
150	150	break;
151	151	}
152	152	}

trunk/src/mame/video/dynax.c

r17788	r17789
238	238	{
239	239	m_flipscreen = data & 1;
240	240	if (data & ~1)
241		logerror("CPU#0 PC %06X: Warning, flip screen <- %02X\n", cpu_get_pc(&space.device()), data);
	241	logerror("CPU#0 PC %06X: Warning, flip screen <- %02X\n", space.device().safe_pc(), data);
242	242	LOG(("F=%02X ", data));
243	243	}
244	244

trunk/src/mame/video/midzeus.c

r17788	r17789
428	428	if (logit)
429	429	{
430	430	if (offset & 1)
431		logerror("%06X:zeus32_r(%02X) = %08X -- unexpected in 32-bit mode\n", cpu_get_pc(&space.device()), offset, result);
	431	logerror("%06X:zeus32_r(%02X) = %08X -- unexpected in 32-bit mode\n", space.device().safe_pc(), offset, result);
432	432	else if (offset != 0xe0)
433		logerror("%06X:zeus32_r(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, result);
	433	logerror("%06X:zeus32_r(%02X) = %08X\n", space.device().safe_pc(), offset, result);
434	434	else
435		logerror("%06X:zeus32_r(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, result);
	435	logerror("%06X:zeus32_r(%02X) = %08X\n", space.device().safe_pc(), offset, result);
436	436	}
437	437	}
438	438
r17788	r17789
444	444	else
445	445	result &= 0xffff;
446	446	if (logit)
447		logerror("%06X:zeus16_r(%02X) = %04X\n", cpu_get_pc(&space.device()), offset, result);
	447	logerror("%06X:zeus16_r(%02X) = %04X\n", space.device().safe_pc(), offset, result);
448	448	}
449	449	return result;
450	450	}
r17788	r17789
462	462	int logit = zeus_enable_logging || ((offset < 0xb0 || offset > 0xb7) && (offset < 0xe0 || offset > 0xe1));
463	463
464	464	if (logit)
465		logerror("%06X:zeus_w", cpu_get_pc(&space.device()));
	465	logerror("%06X:zeus_w", space.device().safe_pc());
466	466
467	467	/* 32-bit mode */
468	468	if (zeusbase[0x80] & 0x00020000)

trunk/src/mame/video/gticlub.c

r17788	r17789
390	390	}
391	391
392	392	default:
393		mame_printf_debug("K001005_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&space->device()));
	393	mame_printf_debug("K001005_r: %08X, %08X at %08X\n", offset, mem_mask, space->device().safe_pc());
394	394	break;
395	395	}
396	396	return 0;
r17788	r17789
421	421	sharc_set_flag_input(space->machine().device("dsp"), 1, ASSERT_LINE);
422	422	}
423	423
424		//  mame_printf_debug("K001005 FIFO write: %08X at %08X\n", data, cpu_get_pc(&space->device()));
	424	//  mame_printf_debug("K001005 FIFO write: %08X at %08X\n", data, space->device().safe_pc());
425	425	K001005_fifo[K001005_fifo_write_ptr] = data;
426	426	K001005_fifo_write_ptr++;
427	427	K001005_fifo_write_ptr &= 0x7ff;
r17788	r17789
446	446	#endif
447	447
448	448	// !!! HACK to get past the FIFO B test (GTI Club & Thunder Hurricane) !!!
449		if (cpu_get_pc(&space->device()) == 0x201ee)
	449	if (space->device().safe_pc() == 0x201ee)
450	450	{
451	451	// This is used to make the SHARC timeout
452	452	device_spin_until_trigger(&space->device(), 10000);
453	453	}
454	454	// !!! HACK to get past the FIFO B test (Winding Heat & Midnight Run) !!!
455		if (cpu_get_pc(&space->device()) == 0x201e6)
	455	if (space->device().safe_pc() == 0x201e6)
456	456	{
457	457	// This is used to make the SHARC timeout
458	458	device_spin_until_trigger(&space->device(), 10000);
r17788	r17789
545	545	break;
546	546
547	547	default:
548		//mame_printf_debug("K001005_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space->device()));
	548	//mame_printf_debug("K001005_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space->device().safe_pc());
549	549	break;
550	550	}
551	551

trunk/src/mame/video/taitoic.c

r17788	r17789
4848	4848	return tc0110pcr->ram[tc0110pcr->addr];
4849	4849
4850	4850	default:
4851		//logerror("PC %06x: warning - read TC0110PCR address %02x\n",cpu_get_pc(&space->device()),offset);
	4851	//logerror("PC %06x: warning - read TC0110PCR address %02x\n",space->device().safe_pc(),offset);
4852	4852	return 0xff;
4853	4853	}
4854	4854	}
r17788	r17789
4872	4872	break;
4873	4873
4874	4874	default:
4875		//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",cpu_get_pc(&space->device()),data,offset);
	4875	//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space->device().safe_pc(),data,offset);
4876	4876	break;
4877	4877	}
4878	4878	}
r17788	r17789
4895	4895	break;
4896	4896
4897	4897	default:
4898		//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",cpu_get_pc(&space->device()),data,offset);
	4898	//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space->device().safe_pc(),data,offset);
4899	4899	break;
4900	4900	}
4901	4901	}
r17788	r17789
4920	4920	break;
4921	4921
4922	4922	default:
4923		//logerror("PC %06x: warning - write %04x to TC0110PCR offset %02x\n",cpu_get_pc(&space->device()),data,offset);
	4923	//logerror("PC %06x: warning - write %04x to TC0110PCR offset %02x\n",space->device().safe_pc(),data,offset);
4924	4924	break;
4925	4925	}
4926	4926	}
r17788	r17789
4945	4945	break;
4946	4946
4947	4947	default:
4948		//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",cpu_get_pc(&space->device()),data,offset);
	4948	//logerror("PC %06x: warning - write %04x to TC0110PCR address %02x\n",space->device().safe_pc(),data,offset);
4949	4949	break;
4950	4950	}
4951	4951	}

trunk/src/mame/video/lethalj.c

r17788	r17789
63	63	result = m_guny + 4;
64	64	break;
65	65	}
66		/*  logerror("%08X:lethalj_gun_r(%d) = %04X\n", cpu_get_pc(&space.device()), offset, result); */
	66	/*  logerror("%08X:lethalj_gun_r(%d) = %04X\n", space.device().safe_pc(), offset, result); */
67	67	return result;
68	68	}
69	69

trunk/src/mame/video/itech8.c

r17788	r17789
203	203	WRITE8_MEMBER(itech8_state::itech8_page_w)
204	204	{
205	205	machine().primary_screen->update_partial(machine().primary_screen->vpos());
206		logerror("%04x:display_page = %02X (%d)\n", cpu_get_pc(&space.device()), data, machine().primary_screen->vpos());
	206	logerror("%04x:display_page = %02X (%d)\n", space.device().safe_pc(), data, machine().primary_screen->vpos());
207	207	m_page_select = data;
208	208	}
209	209
r17788	r17789
444	444	static const char *const portnames[] = { "AN_C", "AN_D", "AN_E", "AN_F" };
445	445
446	446	/* debugging */
447		if (FULL_LOGGING) logerror("%04x:blitter_r(%02x)\n", cpu_get_previouspc(&space.device()), offset / 2);
	447	if (FULL_LOGGING) logerror("%04x:blitter_r(%02x)\n", space.device().safe_pcbase(), offset / 2);
448	448
449	449	/* low bit seems to be ignored */
450	450	offset /= 2;
r17788	r17789
507	507	}
508	508
509	509	/* debugging */
510		if (FULL_LOGGING) logerror("%04x:blitter_w(%02x)=%02x\n", cpu_get_previouspc(&space.device()), offset, data);
	510	if (FULL_LOGGING) logerror("%04x:blitter_w(%02x)=%02x\n", space.device().safe_pcbase(), offset, data);
511	511	}
512	512
513	513

trunk/src/mame/video/othldrby.c

r17788	r17789
120	120	if (m_vreg_addr < OTHLDRBY_VREG_SIZE)
121	121	m_vreg[m_vreg_addr++] = data;
122	122	else
123		popmessage("%06x: VREG OUT OF BOUNDS %04x", cpu_get_pc(&space.device()), m_vreg_addr);
	123	popmessage("%06x: VREG OUT OF BOUNDS %04x", space.device().safe_pc(), m_vreg_addr);
124	124	}
125	125
126	126

trunk/src/mame/video/flstory.c

r17788	r17789
128	128
129	129	flip_screen_set(m_flipscreen);
130	130
131		//popmessage("%04x: gfxctrl = %02x\n", cpu_get_pc(&space.device()), data);
	131	//popmessage("%04x: gfxctrl = %02x\n", space.device().safe_pc(), data);
132	132
133	133	}
134	134
r17788	r17789
151	151	flip_screen_set(m_flipscreen);
152	152	}
153	153
154		//popmessage("%04x: gfxctrl = %02x\n", cpu_get_pc(&space.device()), data);
	154	//popmessage("%04x: gfxctrl = %02x\n", space.device().safe_pc(), data);
155	155
156	156	}
157	157

trunk/src/mame/video/segag80r.c

r17788	r17789
283	283	{
284	284	if (offset == 0)
285	285	{
286		logerror("%04X:segag80r_video_port_r(%d)\n", cpu_get_pc(&space.device()), offset);
	286	logerror("%04X:segag80r_video_port_r(%d)\n", space.device().safe_pc(), offset);
287	287	return 0xff;
288	288	}
289	289	else
r17788	r17789
303	303	{
304	304	if (offset == 0)
305	305	{
306		logerror("%04X:segag80r_video_port_w(%d) = %02X\n", cpu_get_pc(&space.device()), offset, data);
	306	logerror("%04X:segag80r_video_port_w(%d) = %02X\n", space.device().safe_pc(), offset, data);
307	307	}
308	308	else
309	309	{

trunk/src/mame/video/dc.c

r17788	r17789
1014	1014
1015	1015	#if DEBUG_PVRTA_REGS
1016	1016	if (reg != 0x43)
1017		mame_printf_verbose("PVRTA: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f8000+reg*4, state->pvrta_regs[reg], offset, reg, mem_mask, cpu_get_pc(&space->device()));
	1017	mame_printf_verbose("PVRTA: [%08x] read %x @ %x (reg %x), mask %" I64FMT "x (PC=%x)\n", 0x5f8000+reg*4, state->pvrta_regs[reg], offset, reg, mem_mask, space->device().safe_pc());
1018	1018	#endif
1019	1019	return (UINT64)state->pvrta_regs[reg] << shift;
1020	1020	}
r17788	r17789
2739	2739	case 0x78/4: // IRQ MASK
2740	2740	return 0;
2741	2741	default:
2742		printf("%08x %08x\n",cpu_get_pc(&space->device()),offset*4);
	2742	printf("%08x %08x\n",space->device().safe_pc(),offset*4);
2743	2743	break;
2744	2744	}
2745	2745
r17788	r17789
2751	2751	switch(offset)
2752	2752	{
2753	2753	default:
2754		printf("%08x %08x %08x W\n",cpu_get_pc(&space->device()),offset*4,data);
	2754	printf("%08x %08x %08x W\n",space->device().safe_pc(),offset*4,data);
2755	2755	break;
2756	2756	}
2757	2757	}

trunk/src/mame/video/midzeus2.c

r17788	r17789
426	426	#endif
427	427
428	428	if (logit)
429		logerror("%06X:zeus2_r(%02X)\n", cpu_get_pc(&space->device()), offset);
	429	logerror("%06X:zeus2_r(%02X)\n", space->device().safe_pc(), offset);
430	430
431	431	switch (offset)
432	432	{
r17788	r17789
472	472	offset != 0x40 && offset != 0x41 && offset != 0x48 && offset != 0x49 && offset != 0x4e &&
473	473	offset != 0x50 && offset != 0x51 && offset != 0x57 && offset != 0x58 && offset != 0x59 && offset != 0x5a && offset != 0x5e);
474	474	if (logit)
475		logerror("%06X:zeus2_w", cpu_get_pc(&space->device()));
	475	logerror("%06X:zeus2_w", space->device().safe_pc());
476	476	zeus_register32_w(space->machine(), offset, data, logit);
477	477	}
478	478

trunk/src/mame/video/capbowl.c

r17788	r17789
107	107	break;
108	108
109	109	default:
110		logerror("PC=%04X Write to unsupported blitter address %02X Data=%02X\n", cpu_get_pc(&space.device()), offset, data);
	110	logerror("PC=%04X Write to unsupported blitter address %02X Data=%02X\n", space.device().safe_pc(), offset, data);
111	111	break;
112	112	}
113	113	}
r17788	r17789
138	138	break;
139	139
140	140	default:
141		logerror("PC=%04X Read from unsupported blitter address %02X\n", cpu_get_pc(&space.device()), offset);
	141	logerror("PC=%04X Read from unsupported blitter address %02X\n", space.device().safe_pc(), offset);
142	142	break;
143	143	}
144	144

trunk/src/mame/video/st0016.c

r17788	r17789
205	205	{
206	206	/* samples ? sound dma ? */
207	207	// speaglsht:  unknown DMA copy : src - 2B6740, dst - 4400, len - 1E400
208		logerror("unknown DMA copy : src - %X, dst - %X, len - %X, PC - %X\n",srcadr,dstadr,length,cpu_get_previouspc(&space.device()));
	208	logerror("unknown DMA copy : src - %X, dst - %X, len - %X, PC - %X\n",srcadr,dstadr,length,space.device().safe_pcbase());
209	209	break;
210	210	}
211	211	}

trunk/src/mame/video/beathead.c

r17788	r17789
153	153	{
154	154	/* offset 0 is probably write-only */
155	155	if (offset == 0)
156		logerror("%08X:Unexpected HSYNC RAM read at offset 0\n", cpu_get_previouspc(&space.device()));
	156	logerror("%08X:Unexpected HSYNC RAM read at offset 0\n", space.device().safe_pcbase());
157	157
158	158	/* offset 1 reads the data */
159	159	else

trunk/src/mame/video/mjkjidai.c

r17788	r17789
50	50	{
51	51	UINT8 *rom = memregion("maincpu")->base();
52	52
53		//  logerror("%04x: port c0 = %02x\n",cpu_get_pc(&space.device()),data);
	53	//  logerror("%04x: port c0 = %02x\n",space.device().safe_pc(),data);
54	54
55	55	/* bit 0 = NMI enable */
56	56	m_nmi_mask = data & 1;

trunk/src/mame/video/cischeat.c

r17788	r17789
60	60	#define SHOW_READ_ERROR(_format_,_offset_)\
61	61	{\
62	62	popmessage(_format_,_offset_);\
63		logerror("CPU #0 PC %06X : Warning, ",cpu_get_pc(&space.device())); \
	63	logerror("CPU #0 PC %06X : Warning, ",space.device().safe_pc()); \
64	64	logerror(_format_ "\n",_offset_);\
65	65	}
66	66	#define SHOW_WRITE_ERROR(_format_,_offset_,_data_)\
67	67	{\
68	68	popmessage(_format_,_offset_,_data_);\
69		logerror("CPU #0 PC %06X : Warning, ",cpu_get_pc(&space.device())); \
	69	logerror("CPU #0 PC %06X : Warning, ",space.device().safe_pc()); \
70	70	logerror(_format_ "\n",_offset_,_data_); \
71	71	}
72	72
r17788	r17789
74	74
75	75	#define SHOW_READ_ERROR(_format_,_offset_)\
76	76	{\
77		logerror("CPU #0 PC %06X : Warning, ",cpu_get_pc(&space.device())); \
	77	logerror("CPU #0 PC %06X : Warning, ",space.device().safe_pc()); \
78	78	logerror(_format_ "\n",_offset_);\
79	79	}
80	80	#define SHOW_WRITE_ERROR(_format_,_offset_,_data_)\
81	81	{\
82		logerror("CPU #0 PC %06X : Warning, ",cpu_get_pc(&space.device())); \
	82	logerror("CPU #0 PC %06X : Warning, ",space.device().safe_pc()); \
83	83	logerror(_format_ "\n",_offset_,_data_); \
84	84	}
85	85

trunk/src/mame/video/midvunit.c

r17788	r17789
349	349	WRITE32_MEMBER(midvunit_state::midvunit_dma_queue_w)
350	350	{
351	351	if (LOG_DMA && machine().input().code_pressed(KEYCODE_L))
352		logerror("%06X:queue(%X) = %08X\n", cpu_get_pc(&space.device()), m_dma_data_index, data);
	352	logerror("%06X:queue(%X) = %08X\n", space.device().safe_pc(), m_dma_data_index, data);
353	353	if (m_dma_data_index < 16)
354	354	m_dma_data[m_dma_data_index++] = data;
355	355	}
r17788	r17789
367	367	if (offset)
368	368	{
369	369	if (LOG_DMA && machine().input().code_pressed(KEYCODE_L))
370		logerror("%06X:trigger\n", cpu_get_pc(&space.device()));
	370	logerror("%06X:trigger\n", space.device().safe_pc());
371	371	m_poly->process_dma_queue();
372	372	m_dma_data_index = 0;
373	373	}

trunk/src/mame/video/kaneko_grap2.c

r17788	r17789
81	81	}
82	82
83	83	default:
84		logerror("cpu '%s' (PC=%06X): galpani3_regs1_r %02x %04x\n", space.device().tag(), cpu_get_previouspc(&space.device()), offset, mem_mask);
	84	logerror("cpu '%s' (PC=%06X): galpani3_regs1_r %02x %04x\n", space.device().tag(), space.device().safe_pcbase(), offset, mem_mask);
85	85	break;
86	86
87	87	}

trunk/src/mame/video/suna16.c

r17788	r17789
67	67	flip_screen_set(data & 1 );
68	68	m_color_bank = ( data & 4 ) >> 2;
69	69	}
70		if (data & ~(1|4))   logerror("CPU#0 PC %06X - Flip screen unknown bits: %04X\n", cpu_get_pc(&space.device()), data);
	70	if (data & ~(1|4))   logerror("CPU#0 PC %06X - Flip screen unknown bits: %04X\n", space.device().safe_pc(), data);
71	71	}
72	72
73	73	WRITE16_MEMBER(suna16_state::bestbest_flipscreen_w)
r17788	r17789
77	77	flip_screen_set(data & 0x10 );
78	78	//m_color_bank = ( data & 0x07 );
79	79	}
80		if (data & ~(0x10))   logerror("CPU#0 PC %06X - Flip screen unknown bits: %04X\n", cpu_get_pc(&space.device()), data);
	80	if (data & ~(0x10))   logerror("CPU#0 PC %06X - Flip screen unknown bits: %04X\n", space.device().safe_pc(), data);
81	81	}
82	82
83	83

trunk/src/mame/video/jaguar.c

r17788	r17789
539	539	return m_blitter_status & 3;
540	540
541	541	default:
542		logerror("%08X:Blitter read register @ F022%02X\n", cpu_get_previouspc(&space.device()), offset * 4);
	542	logerror("%08X:Blitter read register @ F022%02X\n", space.device().safe_pcbase(), offset * 4);
543	543	return 0;
544	544	}
545	545	}
r17788	r17789
556	556	}
557	557
558	558	if (LOG_BLITTER_WRITE)
559		logerror("%08X:Blitter write register @ F022%02X = %08X\n", cpu_get_previouspc(&space.device()), offset * 4, data);
	559	logerror("%08X:Blitter write register @ F022%02X = %08X\n", space.device().safe_pcbase(), offset * 4, data);
560	560	}
561	561
562	562
r17788	r17789
570	570	READ16_MEMBER( jaguar_state::tom_regs_r )
571	571	{
572	572	if (offset != INT1 && offset != INT2 && offset != HC && offset != VC)
573		logerror("%08X:TOM read register @ F00%03X\n", cpu_get_previouspc(&space.device()), offset * 2);
	573	logerror("%08X:TOM read register @ F00%03X\n", space.device().safe_pcbase(), offset * 2);
574	574
575	575	switch (offset)
576	576	{
r17788	r17789
669	669	}
670	670
671	671	if (offset != INT2 && offset != VI && offset != INT1)
672		logerror("%08X:TOM write register @ F00%03X = %04X\n", cpu_get_previouspc(&space.device()), offset * 2, data);
	672	logerror("%08X:TOM write register @ F00%03X = %04X\n", space.device().safe_pcbase(), offset * 2, data);
673	673	}
674	674
675	675

trunk/src/mame/video/cvs.c

r17788	r17789
86	86	{
87	87
88	88	if (data & 0xce)
89		logerror("%4x : CVS: Unimplemented CVS video fx = %2x\n",cpu_get_pc(&space.device()), data & 0xce);
	89	logerror("%4x : CVS: Unimplemented CVS video fx = %2x\n",space.device().safe_pc(), data & 0xce);
90	90
91	91	m_stars_on = data & 0x01;
92	92

trunk/src/mame/video/seta.c

r17788	r17789
306	306	if ( (samples_len > 0x100000) && ((addr+0x40000) <= samples_len) )
307	307	memcpy(&rom[0xc0000],&rom[addr],0x40000);
308	308	else
309		logerror("PC %06X - Invalid samples bank %02X !\n", cpu_get_pc(&space.device()), new_bank);
	309	logerror("PC %06X - Invalid samples bank %02X !\n", space.device().safe_pc(), new_bank);
310	310	}
311	311	else if (samples_len == 0x480000)   /* zombraid */
312	312	{

trunk/src/mame/video/battlera.c

r17788	r17789
159	159	case 16:
160	160	case 17:
161	161	case 18:
162		logerror("%04x: dma 2 %02x\n",cpu_get_pc(&space.device()),data);
	162	logerror("%04x: dma 2 %02x\n",space.device().safe_pc(),data);
163	163	break;
164	164
165	165	case 19: /* SATB */
r17788	r17789
221	221	case 16:
222	222	case 17:
223	223	case 18:
224		logerror("%04x: dma 2 %02x\n",cpu_get_pc(&space.device()),data);
	224	logerror("%04x: dma 2 %02x\n",space.device().safe_pc(),data);
225	225	break;
226	226
227	227	case 19: /* SATB - Sprites */
r17788	r17789
230	230	}
231	231	break;
232	232	}
233		logerror("%04x: unknown write to  VDC_register %02x (%02x) at %02x\n",cpu_get_pc(&space.device()),m_VDC_register,data,offset);
	233	logerror("%04x: unknown write to  VDC_register %02x (%02x) at %02x\n",space.device().safe_pc(),m_VDC_register,data,offset);
234	234	}
235	235
236	236	/******************************************************************************/

trunk/src/mame/video/ginganin.c

r17788	r17789
178	178	device_set_input_line(m_audiocpu, INPUT_LINE_NMI, PULSE_LINE);
179	179	break;
180	180	default:
181		logerror("CPU #0 PC %06X : Warning, videoreg %04X <- %04X\n", cpu_get_pc(&space.device()), offset, data);
	181	logerror("CPU #0 PC %06X : Warning, videoreg %04X <- %04X\n", space.device().safe_pc(), offset, data);
182	182	}
183	183	}
184	184

trunk/src/mame/video/victory.c

r17788	r17789
132	132	{
133	133	case 0x00:   /* 5XFIQ */
134	134	result = m_fgcollx;
135		if (LOG_COLLISION) logerror("%04X:5XFIQ read = %02X\n", cpu_get_previouspc(&space.device()), result);
	135	if (LOG_COLLISION) logerror("%04X:5XFIQ read = %02X\n", space.device().safe_pcbase(), result);
136	136	return result;
137	137
138	138	case 0x01:   /* 5CLFIQ */
r17788	r17789
142	142	m_fgcoll = 0;
143	143	victory_update_irq(machine());
144	144	}
145		if (LOG_COLLISION) logerror("%04X:5CLFIQ read = %02X\n", cpu_get_previouspc(&space.device()), result);
	145	if (LOG_COLLISION) logerror("%04X:5CLFIQ read = %02X\n", space.device().safe_pcbase(), result);
146	146	return result;
147	147
148	148	case 0x02:   /* 5BACKX */
149	149	result = m_bgcollx & 0xfc;
150		if (LOG_COLLISION) logerror("%04X:5BACKX read = %02X\n", cpu_get_previouspc(&space.device()), result);
	150	if (LOG_COLLISION) logerror("%04X:5BACKX read = %02X\n", space.device().safe_pcbase(), result);
151	151	return result;
152	152
153	153	case 0x03:   /* 5BACKY */
r17788	r17789
157	157	m_bgcoll = 0;
158	158	victory_update_irq(machine());
159	159	}
160		if (LOG_COLLISION) logerror("%04X:5BACKY read = %02X\n", cpu_get_previouspc(&space.device()), result);
	160	if (LOG_COLLISION) logerror("%04X:5BACKY read = %02X\n", space.device().safe_pcbase(), result);
161	161	return result;
162	162
163	163	case 0x04:   /* 5STAT */
r17788	r17789
172	172	result |= (~m_vblank_irq & 1) << 5;
173	173	result |= (~m_bgcoll & 1) << 4;
174	174	result |= (machine().primary_screen->vpos() & 0x100) >> 5;
175		if (LOG_COLLISION) logerror("%04X:5STAT read = %02X\n", cpu_get_previouspc(&space.device()), result);
	175	if (LOG_COLLISION) logerror("%04X:5STAT read = %02X\n", space.device().safe_pcbase(), result);
176	176	return result;
177	177
178	178	default:
179		logerror("%04X:victory_video_control_r(%02X)\n", cpu_get_previouspc(&space.device()), offset);
	179	logerror("%04X:victory_video_control_r(%02X)\n", space.device().safe_pcbase(), offset);
180	180	break;
181	181	}
182	182	return 0;
r17788	r17789
196	196	switch (offset)
197	197	{
198	198	case 0x00:   /* LOAD IL */
199		if (LOG_MICROCODE) logerror("%04X:IL=%02X\n", cpu_get_previouspc(&space.device()), data);
	199	if (LOG_MICROCODE) logerror("%04X:IL=%02X\n", space.device().safe_pcbase(), data);
200	200	micro.i = (micro.i & 0xff00) | (data & 0x00ff);
201	201	break;
202	202
203	203	case 0x01:   /* LOAD IH */
204		if (LOG_MICROCODE) logerror("%04X:IH=%02X\n", cpu_get_previouspc(&space.device()), data);
	204	if (LOG_MICROCODE) logerror("%04X:IH=%02X\n", space.device().safe_pcbase(), data);
205	205	micro.i = (micro.i & 0x00ff) | ((data << 8) & 0xff00);
206	206	if (micro.cmdlo == 5)
207	207	{
r17788	r17789
211	211	break;
212	212
213	213	case 0x02:   /* LOAD CMD */
214		if (LOG_MICROCODE) logerror("%04X:CMD=%02X\n", cpu_get_previouspc(&space.device()), data);
	214	if (LOG_MICROCODE) logerror("%04X:CMD=%02X\n", space.device().safe_pcbase(), data);
215	215	micro.cmd = data;
216	216	micro.cmdlo = data & 7;
217	217	if (micro.cmdlo == 0)
r17788	r17789
226	226	break;
227	227
228	228	case 0x03:   /* LOAD G */
229		if (LOG_MICROCODE) logerror("%04X:G=%02X\n", cpu_get_previouspc(&space.device()), data);
	229	if (LOG_MICROCODE) logerror("%04X:G=%02X\n", space.device().safe_pcbase(), data);
230	230	micro.g = data;
231	231	break;
232	232
233	233	case 0x04:   /* LOAD X */
234		if (LOG_MICROCODE) logerror("%04X:X=%02X\n", cpu_get_previouspc(&space.device()), data);
	234	if (LOG_MICROCODE) logerror("%04X:X=%02X\n", space.device().safe_pcbase(), data);
235	235	micro.xp = data;
236	236	if (micro.cmdlo == 3)
237	237	{
r17788	r17789
241	241	break;
242	242
243	243	case 0x05:   /* LOAD Y */
244		if (LOG_MICROCODE) logerror("%04X:Y=%02X\n", cpu_get_previouspc(&space.device()), data);
	244	if (LOG_MICROCODE) logerror("%04X:Y=%02X\n", space.device().safe_pcbase(), data);
245	245	micro.yp = data;
246	246	if (micro.cmdlo == 4)
247	247	{
r17788	r17789
251	251	break;
252	252
253	253	case 0x06:   /* LOAD R */
254		if (LOG_MICROCODE) logerror("%04X:R=%02X\n", cpu_get_previouspc(&space.device()), data);
	254	if (LOG_MICROCODE) logerror("%04X:R=%02X\n", space.device().safe_pcbase(), data);
255	255	micro.r = data;
256	256	break;
257	257
258	258	case 0x07:   /* LOAD B */
259		if (LOG_MICROCODE) logerror("%04X:B=%02X\n", cpu_get_previouspc(&space.device()), data);
	259	if (LOG_MICROCODE) logerror("%04X:B=%02X\n", space.device().safe_pcbase(), data);
260	260	micro.b = data;
261	261	if (micro.cmdlo == 2)
262	262	{
r17788	r17789
271	271	break;
272	272
273	273	case 0x08:   /* SCROLLX */
274		if (LOG_MICROCODE) logerror("%04X:SCROLLX write = %02X\n", cpu_get_previouspc(&space.device()), data);
	274	if (LOG_MICROCODE) logerror("%04X:SCROLLX write = %02X\n", space.device().safe_pcbase(), data);
275	275	m_scrollx = data;
276	276	break;
277	277
278	278	case 0x09:   /* SCROLLY */
279		if (LOG_MICROCODE) logerror("%04X:SCROLLY write = %02X\n", cpu_get_previouspc(&space.device()), data);
	279	if (LOG_MICROCODE) logerror("%04X:SCROLLY write = %02X\n", space.device().safe_pcbase(), data);
280	280	m_scrolly = data;
281	281	break;
282	282
r17788	r17789
288	288	// D3 = SINVERT
289	289	// D2 = BIR12
290	290	// D1 = SELOVER
291		if (LOG_MICROCODE) logerror("%04X:CONTROL write = %02X\n", cpu_get_previouspc(&space.device()), data);
	291	if (LOG_MICROCODE) logerror("%04X:CONTROL write = %02X\n", space.device().safe_pcbase(), data);
292	292	m_video_control = data;
293	293	break;
294	294
295	295	case 0x0b:   /* CLRVIRQ */
296		if (LOG_MICROCODE) logerror("%04X:CLRVIRQ write = %02X\n", cpu_get_previouspc(&space.device()), data);
	296	if (LOG_MICROCODE) logerror("%04X:CLRVIRQ write = %02X\n", space.device().safe_pcbase(), data);
297	297	m_vblank_irq = 0;
298	298	victory_update_irq(machine());
299	299	break;
300	300
301	301	default:
302		if (LOG_MICROCODE) logerror("%04X:victory_video_control_w(%02X) = %02X\n", cpu_get_previouspc(&space.device()), offset, data);
	302	if (LOG_MICROCODE) logerror("%04X:victory_video_control_w(%02X) = %02X\n", space.device().safe_pcbase(), offset, data);
303	303	break;
304	304	}
305	305	}

trunk/src/mame/video/dogfgt.c

r17788	r17789
167	167	flip_screen_set(data & 0x80);
168	168
169	169	/* other bits unused? */
170		logerror("PC %04x: 1800 = %02x\n", cpu_get_pc(&space.device()), data);
	170	logerror("PC %04x: 1800 = %02x\n", space.device().safe_pc(), data);
171	171	}
172	172
173	173

trunk/src/mame/video/galivan.c

r17788	r17789
229	229	/* bit 7 selects one of two ROM banks for c000-dfff */
230	230	membank("bank1")->set_entry((data & 0x80) >> 7);
231	231
232		/*  logerror("Address: %04X - port 40 = %02x\n", cpu_get_pc(&space.device()), data); */
	232	/*  logerror("Address: %04X - port 40 = %02x\n", space.device().safe_pc(), data); */
233	233	}
234	234
235	235	WRITE8_MEMBER(galivan_state::ninjemak_gfxbank_w)

trunk/src/mame/video/tatsumi.c

r17788	r17789
10	10
11	11	/* 0xe0 is bank switch, others unknown */
12	12	//  if ((offset==0xe0 && data&0xefff) || offset!=0xe0)
13		//      logerror("%08x:  Tatsumi TZB215 sprite control %04x %08x\n", cpu_get_pc(&space.device()), offset, data);
	13	//      logerror("%08x:  Tatsumi TZB215 sprite control %04x %08x\n", space.device().safe_pc(), offset, data);
14	14	}
15	15
16	16	/******************************************************************************/
r17788	r17789
153	153	if (offset==1 && ACCESSING_BITS_0_7) {
154	154	m_roundupt_crt_reg[m_roundupt_crt_selected_reg]=data;
155	155	//      if (m_roundupt_crt_selected_reg!=0xa && m_roundupt_crt_selected_reg!=0xb && m_roundupt_crt_selected_reg!=29)
156		//      logerror("%08x:  Crt write %02x %02x\n",cpu_get_pc(&space.device()),m_roundupt_crt_selected_reg,data);
	156	//      logerror("%08x:  Crt write %02x %02x\n",space.device().safe_pc(),m_roundupt_crt_selected_reg,data);
157	157	}
158	158	}
159	159

trunk/src/mame/video/konamiic.c

r17788	r17789
1463	1463	case 7:
1464	1464	return ROM[romofs+2];
1465	1465	default:
1466		LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, cpu_get_pc(&space->device())));
	1466	LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, space->device().safe_pc()));
1467	1467	break;
1468	1468	}
1469	1469
r17788	r17789
1666	1666
1667	1667	static WRITE8_HANDLER( K054000_w )
1668	1668	{
1669		//logerror("%04x: write %02x to 054000 address %02x\n",cpu_get_pc(&space->device()),data,offset);
	1669	//logerror("%04x: write %02x to 054000 address %02x\n",space->device().safe_pc(),data,offset);
1670	1670
1671	1671	K054000_ram[offset] = data;
1672	1672	}
r17788	r17789
1676	1676	int Acx,Acy,Aax,Aay;
1677	1677	int Bcx,Bcy,Bax,Bay;
1678	1678
1679		//logerror("%04x: read 054000 address %02x\n",cpu_get_pc(&space->device()),offset);
	1679	//logerror("%04x: read 054000 address %02x\n",space->device().safe_pc(),offset);
1680	1680
1681	1681	if (offset != 0x18) return 0;
1682	1682
r17788	r17789
2265	2265	}
2266	2266	else
2267	2267	{
2268		LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", cpu_get_pc(&space->device()), mem_mask));
	2268	LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
2269	2269	}
2270	2270	return 0;
2271	2271	}
r17788	r17789
2290	2290	}
2291	2291	else
2292	2292	{
2293		LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", cpu_get_pc(&space->device()), mem_mask));
	2293	LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
2294	2294	}
2295	2295	return 0;
2296	2296	}

trunk/src/mame/video/konicdev.c

r17788	r17789
2299	2299	else if (offset >= 0x3a00 && offset < 0x3c00)
2300	2300	{   /* B x scroll */   }
2301	2301	//          else
2302		//logerror("%04x: read from unknown 052109 address %04x\n",cpu_get_pc(&space->device()),offset);
	2302	//logerror("%04x: read from unknown 052109 address %04x\n",space->device().safe_pc(),offset);
2303	2303	}
2304	2304
2305	2305	return k052109->ram[offset];
r17788	r17789
2323	2323	addr = (code << 5) + (offset & 0x1f);
2324	2324	addr &= device->machine().root_device().memregion(k052109->memory_region)->bytes() - 1;
2325	2325
2326		//      logerror("%04x: off = %04x sub = %02x (bnk = %x) adr = %06x\n", cpu_get_pc(&space->device()), offset, k052109->romsubbank, bank, addr);
	2326	//      logerror("%04x: off = %04x sub = %02x (bnk = %x) adr = %06x\n", space->device().safe_pc(), offset, k052109->romsubbank, bank, addr);
2327	2327
2328	2328	return device->machine().root_device().memregion(k052109->memory_region)->base()[addr];
2329	2329	}
r17788	r17789
2354	2354	if (k052109->scrollctrl != data)
2355	2355	{
2356	2356	//popmessage("scrollcontrol = %02x", data);
2357		//logerror("%04x: rowscrollcontrol = %02x\n", cpu_get_pc(&space->device()), data);
	2357	//logerror("%04x: rowscrollcontrol = %02x\n", space->device().safe_pc(), data);
2358	2358	k052109->scrollctrl = data;
2359	2359	}
2360	2360	}
2361	2361	else if (offset == 0x1d00)
2362	2362	{
2363		//logerror("%04x: 052109 register 1d00 = %02x\n", cpu_get_pc(&space->device()), data);
	2363	//logerror("%04x: 052109 register 1d00 = %02x\n", space->device().safe_pc(), data);
2364	2364	/* bit 2 = irq enable */
2365	2365	/* the custom chip can also generate NMI and FIRQ, for use with a 6809 */
2366	2366	k052109->irq_enabled = data & 0x04;
r17788	r17789
2393	2393	}
2394	2394	else if (offset == 0x1e00 || offset == 0x3e00) // Surprise Attack uses offset 0x3e00
2395	2395	{
2396		//logerror("%04x: 052109 register 1e00 = %02x\n",cpu_get_pc(&space->device()),data);
	2396	//logerror("%04x: 052109 register 1e00 = %02x\n",space->device().safe_pc(),data);
2397	2397	k052109->romsubbank = data;
2398	2398	}
2399	2399	else if (offset == 0x1e80)
2400	2400	{
2401		//if ((data & 0xfe)) logerror("%04x: 052109 register 1e80 = %02x\n",cpu_get_pc(&space->device()),data);
	2401	//if ((data & 0xfe)) logerror("%04x: 052109 register 1e80 = %02x\n",space->device().safe_pc(),data);
2402	2402	k052109->tilemap[0]->set_flip((data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
2403	2403	k052109->tilemap[1]->set_flip((data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
2404	2404	k052109->tilemap[2]->set_flip((data & 1) ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0);
r17788	r17789
2453	2453	k052109->charrombank_2[3] = (data >> 4) & 0x0f;
2454	2454	}
2455	2455	//      else
2456		//          logerror("%04x: write %02x to unknown 052109 address %04x\n",cpu_get_pc(&space->device()),data,offset);
	2456	//          logerror("%04x: write %02x to unknown 052109 address %04x\n",space->device().safe_pc(),data,offset);
2457	2457	}
2458	2458	}
2459	2459
r17788	r17789
3009	3009	/* some games need bit 0 to pulse */
3010	3010	return (k051960->k051937_counter++) & 1;
3011	3011	}
3012		//logerror("%04x: read unknown 051937 address %x\n", cpu_get_pc(device->cpu), offset);
	3012	//logerror("%04x: read unknown 051937 address %x\n", device->cpu->safe_pc(), offset);
3013	3013	return 0;
3014	3014	}
3015	3015
r17788	r17789
3040	3040
3041	3041	/* bit 5 = enable gfx ROM reading */
3042	3042	k051960->readroms = data & 0x20;
3043		//logerror("%04x: write %02x to 051937 address %x\n", cpu_get_pc(machine.cpu), data, offset);
	3043	//logerror("%04x: write %02x to 051937 address %x\n", machine.cpu->safe_pc(), data, offset);
3044	3044	}
3045	3045	else if (offset == 1)
3046	3046	{
3047		//  popmessage("%04x: write %02x to 051937 address %x", cpu_get_pc(machine.cpu), data, offset);
3048		//logerror("%04x: write %02x to unknown 051937 address %x\n", cpu_get_pc(machine.cpu), data, offset);
	3047	//  popmessage("%04x: write %02x to 051937 address %x", machine.cpu->safe_pc(), data, offset);
	3048	//logerror("%04x: write %02x to unknown 051937 address %x\n", machine.cpu->safe_pc(), data, offset);
3049	3049	}
3050	3050	else if (offset >= 2 && offset < 5)
3051	3051	{
r17788	r17789
3053	3053	}
3054	3054	else
3055	3055	{
3056		//  popmessage("%04x: write %02x to 051937 address %x", cpu_get_pc(machine.cpu), data, offset);
3057		//logerror("%04x: write %02x to unknown 051937 address %x\n", cpu_get_pc(machine.cpu), data, offset);
	3056	//  popmessage("%04x: write %02x to 051937 address %x", machine.cpu->safe_pc(), data, offset);
	3057	//logerror("%04x: write %02x to unknown 051937 address %x\n", machine.cpu->safe_pc(), data, offset);
3058	3058	}
3059	3059	}
3060	3060
r17788	r17789
4542	4542	case 7:
4543	4543	return ROM[romofs + 2];
4544	4544	default:
4545		//          LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, cpu_get_pc(&space->device())));
	4545	//          LOG(("55673_rom_word_r: Unknown read offset %x (PC=%x)\n", offset, space->device().safe_pc()));
4546	4546	break;
4547	4547	}
4548	4548
r17788	r17789
4559	4559	addr = (k053246->kx46_regs[6] << 17) | (k053246->kx46_regs[7] << 9) | (k053246->kx46_regs[4] << 1) | ((offset & 1) ^ 1);
4560	4560	addr &= device->machine().root_device().memregion(k053246->memory_region)->bytes() - 1;
4561	4561	//      if (VERBOSE)
4562		//          popmessage("%04x: offset %02x addr %06x", cpu_get_pc(&space->device()), offset, addr);
	4562	//          popmessage("%04x: offset %02x addr %06x", space->device().safe_pc(), offset, addr);
4563	4563	return device->machine().root_device().memregion(k053246->memory_region)->base()[addr];
4564	4564	}
4565	4565	else
4566	4566	{
4567		//      LOG(("%04x: read from unknown 053246 address %x\n", cpu_get_pc(&space->device()), offset));
	4567	//      LOG(("%04x: read from unknown 053246 address %x\n", space->device().safe_pc(), offset));
4568	4568	return 0;
4569	4569	}
4570	4570	}
r17788	r17789
6175	6175	{
6176	6176	k054000_state *k054000 = k054000_get_safe_token(device);
6177	6177
6178		//logerror("%04x: write %02x to 054000 address %02x\n",cpu_get_pc(&space->device()),data,offset);
	6178	//logerror("%04x: write %02x to 054000 address %02x\n",space->device().safe_pc(),data,offset);
6179	6179	k054000->regs[offset] = data;
6180	6180	}
6181	6181
r17788	r17789
6185	6185	int Acx, Acy, Aax, Aay;
6186	6186	int Bcx, Bcy, Bax, Bay;
6187	6187
6188		//logerror("%04x: read 054000 address %02x\n", cpu_get_pc(&space->device()), offset);
	6188	//logerror("%04x: read 054000 address %02x\n", space->device().safe_pc(), offset);
6189	6189
6190	6190	if (offset != 0x18)
6191	6191	return 0;
r17788	r17789
6322	6322	WRITE8_DEVICE_HANDLER( k051733_w )
6323	6323	{
6324	6324	k051733_state *k051733= k051733_get_safe_token(device);
6325		//logerror("%04x: write %02x to 051733 address %02x\n", cpu_get_pc(&space->device()), data, offset);
	6325	//logerror("%04x: write %02x to 051733 address %02x\n", space->device().safe_pc(), data, offset);
6326	6326
6327	6327	k051733->ram[offset] = data;
6328	6328	}
r17788	r17789
6853	6853	return k056832_rom_read_b(device, offset * 2 + 1, 4, 5, 0)<<16;
6854	6854	else
6855	6855	{
6856		//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", cpu_get_pc(&space->device()), mem_mask));
	6856	//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
6857	6857	}
6858	6858	return 0;
6859	6859	}
r17788	r17789
6870	6870	return k056832_rom_read_b(device, offset * 4 + 3, 4, 5, 1);
6871	6871	else
6872	6872	{
6873		//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", cpu_get_pc(&space->device()), mem_mask));
	6873	//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
6874	6874	}
6875	6875	return 0;
6876	6876	}
r17788	r17789
6887	6887	return k056832_rom_read_b(device, offset * 4 + 3, 4, 6, 0);
6888	6888	else
6889	6889	{
6890		//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", cpu_get_pc(&space->device()), mem_mask));
	6890	//LOG(("Non-byte read of tilemap ROM, PC=%x (mask=%x)\n", space->device().safe_pc(), mem_mask));
6891	6891	}
6892	6892	return 0;
6893	6893	}
r17788	r17789
9383	9383	}
9384	9384
9385	9385	default:
9386		//mame_printf_debug("k001005->r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&space->device()));
	9386	//mame_printf_debug("k001005->r: %08X, %08X at %08X\n", offset, mem_mask, space->device().safe_pc());
9387	9387	break;
9388	9388	}
9389	9389	return 0;
r17788	r17789
9416	9416	sharc_set_flag_input(k001005->dsp, 1, ASSERT_LINE);
9417	9417	}
9418	9418
9419		//  mame_printf_debug("K001005 FIFO write: %08X at %08X\n", data, cpu_get_pc(&space->device()));
	9419	//  mame_printf_debug("K001005 FIFO write: %08X at %08X\n", data, space->device().safe_pc());
9420	9420	k001005->fifo[k001005->fifo_write_ptr] = data;
9421	9421	k001005->fifo_write_ptr++;
9422	9422	k001005->fifo_write_ptr &= 0x7ff;
r17788	r17789
9424	9424	k001005->_3d_fifo[k001005->_3d_fifo_ptr++] = data;
9425	9425
9426	9426	// !!! HACK to get past the FIFO B test (GTI Club & Thunder Hurricane) !!!
9427		if (cpu_get_pc(k001005->cpu) == 0x201ee)
	9427	if (k001005->cpu->safe_pc() == 0x201ee)
9428	9428	{
9429	9429	// This is used to make the SHARC timeout
9430	9430	device_spin_until_trigger(k001005->cpu, 10000);
9431	9431	}
9432	9432	// !!! HACK to get past the FIFO B test (Winding Heat & Midnight Run) !!!
9433		if (cpu_get_pc(k001005->cpu) == 0x201e6)
	9433	if (k001005->cpu->safe_pc() == 0x201e6)
9434	9434	{
9435	9435	// This is used to make the SHARC timeout
9436	9436	device_spin_until_trigger(k001005->cpu, 10000);
r17788	r17789
9480	9480	break;
9481	9481
9482	9482	default:
9483		//mame_printf_debug("k001005->w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space->device()));
	9483	//mame_printf_debug("k001005->w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space->device().safe_pc());
9484	9484	break;
9485	9485	}
9486	9486
r17788	r17789
10494	10494
10495	10495	if (offset != 0x08 && offset != 0x09 && offset != 0x0a /*&& offset != 0x17 && offset != 0x18*/)
10496	10496	{
10497		//printf("K001604_reg_w (%d), %02X, %08X, %08X at %08X\n", chip, offset, data, mem_mask, cpu_get_pc(&space->device()));
	10497	//printf("K001604_reg_w (%d), %02X, %08X, %08X at %08X\n", chip, offset, data, mem_mask, space->device().safe_pc());
10498	10498	}
10499	10499	}
10500	10500

trunk/src/mame/video/homedata.c

r17788	r17789
714	714
715	715	WRITE8_MEMBER(homedata_state::reikaids_gfx_bank_w)
716	716	{
717		//logerror( "%04x: [setbank %02x]\n",cpu_get_pc(&space.device()),data);
	717	//logerror( "%04x: [setbank %02x]\n",space.device().safe_pc(),data);
718	718
719	719	if (m_gfx_bank[m_reikaids_which] != data)
720	720	{
r17788	r17789
727	727
728	728	WRITE8_MEMBER(homedata_state::pteacher_gfx_bank_w)
729	729	{
730		//  logerror("%04x: gfxbank:=%02x\n", cpu_get_pc(&space.device()), data);
	730	//  logerror("%04x: gfxbank:=%02x\n", space.device().safe_pc(), data);
731	731	if (m_gfx_bank[0] != data)
732	732	{
733	733	m_gfx_bank[0] = data;
r17788	r17789
737	737
738	738	WRITE8_MEMBER(homedata_state::homedata_blitter_param_w)
739	739	{
740		//logerror("%04x: blitter_param_w %02x\n", cpu_get_pc(&space.device()), data);
	740	//logerror("%04x: blitter_param_w %02x\n", space.device().safe_pc(), data);
741	741	m_blitter_param[m_blitter_param_count] = data;
742	742	m_blitter_param_count++;
743	743	m_blitter_param_count &= 3;

trunk/src/mame/video/taito_l.c

r17788	r17789
103	103	if (m_bankc[offset] != data)
104	104	{
105	105	m_bankc[offset] = data;
106		//      logerror("Bankc %d, %02x (%04x)\n", offset, data, cpu_get_pc(&space.device()));
	106	//      logerror("Bankc %d, %02x (%04x)\n", offset, data, space.device().safe_pc());
107	107
108	108	m_bg18_tilemap->mark_all_dirty();
109	109	m_bg19_tilemap->mark_all_dirty();
r17788	r17789
119	119	WRITE8_MEMBER(taitol_state::taitol_control_w)
120	120	{
121	121
122		//  logerror("Control Write %02x (%04x)\n", data, cpu_get_pc(&space.device()));
	122	//  logerror("Control Write %02x (%04x)\n", data, space.device().safe_pc());
123	123
124	124	m_cur_ctrl = data;
125	125	//popmessage("%02x",data);
r17788	r17789
140	140	READ8_MEMBER(taitol_state::taitol_control_r)
141	141	{
142	142
143		//  logerror("Control Read %02x (%04x)\n", cur_ctrl, cpu_get_pc(&space.device()));
	143	//  logerror("Control Read %02x (%04x)\n", cur_ctrl, space.device().safe_pc());
144	144	return m_cur_ctrl;
145	145	}
146	146

trunk/src/mame/video/m92.c

r17788	r17789
84	84	spriteram to the buffer.  It seems safe to assume 1 word can be copied per clock. */
85	85	machine().scheduler().timer_set(attotime::from_hz(XTAL_26_66666MHz) * 0x400, FUNC(spritebuffer_callback));
86	86	}
87		//  logerror("%04x: m92_spritecontrol_w %08x %08x\n",cpu_get_pc(&space.device()),offset,data);
	87	//  logerror("%04x: m92_spritecontrol_w %08x %08x\n",space.device().safe_pc(),offset,data);
88	88	}
89	89
90	90	WRITE16_MEMBER(m92_state::m92_videocontrol_w)
r17788	r17789
121	121	/* Access to upper palette bank */
122	122	m_palette_bank = (m_videocontrol >> 1) & 1;
123	123
124		//  logerror("%04x: m92_videocontrol_w %d = %02x\n",cpu_get_pc(&space.device()),offset,data);
	124	//  logerror("%04x: m92_videocontrol_w %d = %02x\n",space.device().safe_pc(),offset,data);
125	125	}
126	126
127	127	READ16_MEMBER(m92_state::m92_paletteram_r)

trunk/src/mame/video/m107.c

r17788	r17789
372	372	/*
373	373	TODO: this register looks a lot more complex than how the game uses it. All of them seems to test various bit combinations during POST.
374	374	*/
375		//      logerror("%04x: buffered spriteram\n",cpu_get_pc(&space.device()));
	375	//      logerror("%04x: buffered spriteram\n",space.device().safe_pc());
376	376	m_sprite_display   = (!(data & 0x1000));
377	377
378	378	memcpy(m_buffered_spriteram, m_spriteram, 0x1000);

trunk/src/mame/video/megasys1.c

r17788	r17789
202	202	#define SHOW_WRITE_ERROR(_format_,_offset_,_data_)\
203	203	{ \
204	204	popmessage(_format_,_offset_,_data_);\
205		logerror("CPU #0 PC %06X : Warning, ",cpu_get_pc(&space.device())); \
	205	logerror("CPU #0 PC %06X : Warning, ",space.device().safe_pc()); \
206	206	logerror(_format_,_offset_,_data_);\
207	207	logerror("\n");\
208	208	}
r17788	r17789
211	211
212	212	#define SHOW_WRITE_ERROR(_format_,_offset_,_data_)\
213	213	{\
214		logerror("CPU #0 PC %06X : Warning, ",cpu_get_pc(&space.device())); \
	214	logerror("CPU #0 PC %06X : Warning, ",space.device().safe_pc()); \
215	215	logerror(_format_,_offset_,_data_); \
216	216	logerror("\n");\
217	217	}

trunk/src/mame/video/airbustr.c

r17788	r17789
80	80	case 0x06:   m_bg_scrollx = data;   break;
81	81	case 0x08:   m_highbits   = ~data;   break;   // complemented high bits
82	82
83		default:   logerror("CPU #2 - port %02X written with %02X - PC = %04X\n", offset, data, cpu_get_pc(&space.device()));
	83	default:   logerror("CPU #2 - port %02X written with %02X - PC = %04X\n", offset, data, space.device().safe_pc());
84	84	}
85	85
86	86	m_bg_tilemap->set_scrolly(0, ((m_highbits << 5) & 0x100) + m_bg_scrolly);

trunk/src/mame/video/dcheese.c

r17788	r17789
290	290	break;
291	291
292	292	default:
293		logerror("%06X:write to %06X = %04X & %04x\n", cpu_get_pc(&space.device()), 0x2a0000 + 2 * offset, data, mem_mask);
	293	logerror("%06X:write to %06X = %04X & %04x\n", space.device().safe_pc(), 0x2a0000 + 2 * offset, data, mem_mask);
294	294	break;
295	295	}
296	296	}
r17788	r17789
299	299	WRITE16_MEMBER(dcheese_state::madmax_blitter_unknown_w)
300	300	{
301	301	/* written to just before the blitter command register is written */
302		logerror("%06X:write to %06X = %04X & %04X\n", cpu_get_pc(&space.device()), 0x300000 + 2 * offset, data, mem_mask);
	302	logerror("%06X:write to %06X = %04X & %04X\n", space.device().safe_pc(), 0x300000 + 2 * offset, data, mem_mask);
303	303	}
304	304
305	305
r17788	r17789
316	316	return 0xffff ^ (1 << 5);
317	317
318	318	/* log everything else */
319		logerror("%06X:read from %06X\n", cpu_get_pc(&space.device()), 0x2a0000 + 2 * offset);
	319	logerror("%06X:read from %06X\n", space.device().safe_pc(), 0x2a0000 + 2 * offset);
320	320	return 0xffff;
321	321	}

trunk/src/mame/video/bwing.c

r17788	r17789
119	119	m_srbank = data >> 6;
120	120
121	121	#if BW_DEBUG
122		logerror("(%s)%04x: w=%02x a=%04x f=%d\n", device().tag, cpu_get_pc(&space.device()), data, 0x1b00 + offset, machine().primary_screen->frame_number());
	122	logerror("(%s)%04x: w=%02x a=%04x f=%d\n", device().tag, space.device().safe_pc(), data, 0x1b00 + offset, machine().primary_screen->frame_number());
123	123	#endif
124	124	break;
125	125	}

trunk/src/mame/video/dooyong.c

r17788	r17789
149	149
150	150	/* bit 5 used but unknown */
151	151
152		//  logerror("%04x: bankswitch = %02x\n",cpu_get_pc(&space.device()),data&0xe0);
	152	//  logerror("%04x: bankswitch = %02x\n",space.device().safe_pc(),data&0xe0);
153	153	}
154	154
155	155	WRITE8_MEMBER(dooyong_state::paletteram_flytiger_w)

trunk/src/mame/video/williams.c

r17788	r17789
543	543
544	544	/* Log blits */
545	545	logerror("%04X:Blit @ %3d : %02X%02X -> %02X%02X, %3dx%3d, mask=%02X, flags=%02X, icount=%d, win=%d\n",
546		cpu_get_pc(&space.device()), machine().primary_screen->vpos(),
	546	space.device().safe_pc(), machine().primary_screen->vpos(),
547	547	m_blitterram[2], m_blitterram[3],
548	548	m_blitterram[4], m_blitterram[5],
549	549	m_blitterram[6], m_blitterram[7],

trunk/src/mame/video/kaneko_spr.c

r17788	r17789
535	535	break;
536	536	}
537	537
538		//  logerror("CPU #0 PC %06X : Warning, sprites reg %04X <- %04X\n",cpu_get_pc(&space.device()),offset*2,data);
	538	//  logerror("CPU #0 PC %06X : Warning, sprites reg %04X <- %04X\n",space.device().safe_pc(),offset*2,data);
539	539	}
540	540
541	541

trunk/src/mame/drivers/bfcobra.c

r17788	r17789
779	779	}
780	780	default:
781	781	{
782		mame_printf_debug("Unhandled RAMDAC read (PC:%.4x)\n", cpu_get_previouspc(&space.device()));
	782	mame_printf_debug("Unhandled RAMDAC read (PC:%.4x)\n", space.device().safe_pcbase());
783	783	}
784	784	}
785	785
r17788	r17789
930	930	}
931	931	default:
932	932	{
933		mame_printf_debug("Flare One unknown read: 0x%.2x (PC:0x%.4x)\n", offset, cpu_get_previouspc(&space.device()));
	933	mame_printf_debug("Flare One unknown read: 0x%.2x (PC:0x%.4x)\n", offset, space.device().safe_pcbase());
934	934	}
935	935	}
936	936
r17788	r17789
946	946	case 0x03:
947	947	{
948	948	if (data > 0x3f)
949		popmessage("%x: Unusual bank access (%x)\n", cpu_get_previouspc(&space.device()), data);
	949	popmessage("%x: Unusual bank access (%x)\n", space.device().safe_pcbase(), data);
950	950
951	951	data &= 0x3f;
952	952	m_bank_data[offset] = data;
r17788	r17789
1020	1020	}
1021	1021	default:
1022	1022	{
1023		mame_printf_debug("Flare One unknown write: 0x%.2x with 0x%.2x (PC:0x%.4x)\n", offset, data, cpu_get_previouspc(&space.device()));
	1023	mame_printf_debug("Flare One unknown write: 0x%.2x with 0x%.2x (PC:0x%.4x)\n", offset, data, space.device().safe_pcbase());
1024	1024	}
1025	1025	}
1026	1026	}

trunk/src/mame/drivers/mitchell.c

r17788	r17789
280	280	{
281	281	case 0:
282	282	default:
283		logerror("PC %04x: write %02x to port 01\n", cpu_get_pc(&space.device()), data);
	283	logerror("PC %04x: write %02x to port 01\n", space.device().safe_pc(), data);
284	284	break;
285	285	case 1:
286	286	mahjong_input_select_w(space, offset, data);

trunk/src/mame/drivers/deco_mlc.c

r17788	r17789
111	111	{
112	112	//  if (offset==0)
113	113	//      return ioport("IN0")->read(); //0xffffffff;
114		//   logerror("%08x:  Test2_r %d\n",cpu_get_pc(&space.device()),offset);
	114	//   logerror("%08x:  Test2_r %d\n",space.device().safe_pc(),offset);
115	115	return machine().rand(); //0xffffffff;
116	116	}
117	117
r17788	r17789
123	123	*/
124	124	//if (offset==0)
125	125	//  return machine().rand()|(machine().rand()<<16);
126		//  logerror("%08x:  Test3_r %d\n",cpu_get_pc(&space.device()),offset);
	126	//  logerror("%08x:  Test3_r %d\n",space.device().safe_pc(),offset);
127	127	return 0xffffffff;
128	128	}
129	129
r17788	r17789
156	156	READ32_MEMBER(deco_mlc_state::decomlc_vbl_r)
157	157	{
158	158	m_vbl_i ^=0xffffffff;
159		//logerror("vbl r %08x\n", cpu_get_pc(&space.device()));
	159	//logerror("vbl r %08x\n", space.device().safe_pc());
160	160	// Todo: Vblank probably in $10
161	161	return m_vbl_i;
162	162	}
r17788	r17789
241	241	*/
242	242	offset<<=1;
243	243
244		logerror("%08x:  Read prot %04x\n", cpu_get_pc(&space.device()), offset);
	244	logerror("%08x:  Read prot %04x\n", space.device().safe_pc(), offset);
245	245
246	246	if (offset==0x5c4)
247	247	return 0xaa55 << 16;
r17788	r17789
722	722	READ32_MEMBER(deco_mlc_state::avengrgs_speedup_r)
723	723	{
724	724	UINT32 a=m_mlc_ram[0x89a0/4];
725		UINT32 p=cpu_get_pc(&space.device());
	725	UINT32 p=space.device().safe_pc();
726	726
727	727	if ((p==0x3234 || p==0x32dc) && (a&1)) device_spin_until_interrupt(&space.device());
728	728

trunk/src/mame/drivers/pasha2.c

r17788	r17789
476	476	READ16_MEMBER(pasha2_state::pasha2_speedup_r)
477	477	{
478	478
479		if(cpu_get_pc(&space.device()) == 0x8302)
	479	if(space.device().safe_pc() == 0x8302)
480	480	device_spin_until_interrupt(&space.device());
481	481
482	482	return m_wram[(0x95744 / 2) + offset];

trunk/src/mame/drivers/cntsteer.c

r17788	r17789
472	472	WRITE8_MEMBER(cntsteer_state::zerotrgt_ctrl_w)
473	473	{
474	474	/*TODO: check this.*/
475		logerror("CTRL: %04x: %04x: %04x\n", cpu_get_pc(&space.device()), offset, data);
	475	logerror("CTRL: %04x: %04x: %04x\n", space.device().safe_pc(), offset, data);
476	476	//  if (offset == 0) device_set_input_line(m_subcpu, INPUT_LINE_RESET, ASSERT_LINE);
477	477
478	478	// Wrong - bits 0 & 1 used on this

trunk/src/mame/drivers/bking.c

r17788	r17789
196	196	int port_c_in = 0;
197	197	if (main_sent) port_c_in |= 0x01;
198	198	if (!mcu_sent) port_c_in |= 0x02;
199		//logerror("%04x: 68705 port C read %02x\n",cpu_get_pc(&space.device()),port_c_in);
	199	//logerror("%04x: 68705 port C read %02x\n",space.device().safe_pc(),port_c_in);
200	200	return port_c_in;
201	201	}
202	202	#endif

trunk/src/mame/drivers/dblewing.c

r17788	r17789
172	172	case 0x532: return m_580_data;
173	173	}
174	174
175		//  printf("dblewing prot r %08x, %04x, %04x\n", cpu_get_pc(&space.device()), offset * 2, mem_mask);
	175	//  printf("dblewing prot r %08x, %04x, %04x\n", space.device().safe_pc(), offset * 2, mem_mask);
176	176
177	177	if ((offset*2) == 0x0f8) return 0; // m_080_data;
178	178	if ((offset*2) == 0x104) return 0;
r17788	r17789
184	184	if ((offset*2) == 0x54a) return 0; // 3rd player 2nd boss
185	185	if ((offset*2) == 0x786) return 0;
186	186
187		mame_printf_debug("dblewing prot r %08x, %04x, %04x\n", cpu_get_pc(&space.device()), offset * 2, mem_mask);
	187	mame_printf_debug("dblewing prot r %08x, %04x, %04x\n", space.device().safe_pc(), offset * 2, mem_mask);
188	188
189	189	return 0;//machine().rand();
190	190	}
r17788	r17789
193	193	{
194	194
195	195	//  if (offset * 2 != 0x380)
196		//  printf("dblewing prot w %08x, %04x, %04x %04x\n", cpu_get_pc(&space.device()), offset * 2, mem_mask, data);
	196	//  printf("dblewing prot w %08x, %04x, %04x %04x\n", space.device().safe_pc(), offset * 2, mem_mask, data);
197	197
198	198	switch (offset * 2)
199	199	{
r17788	r17789
295	295	return;  // p2 inputs select screen  OK
296	296	}
297	297
298		//  printf("dblewing prot w %08x, %04x, %04x %04x\n", cpu_get_pc(&space.device()), offset * 2, mem_mask, data);
	298	//  printf("dblewing prot w %08x, %04x, %04x %04x\n", space.device().safe_pc(), offset * 2, mem_mask, data);
299	299
300	300	if ((offset * 2) == 0x008) { m_008_data = data; return; }
301	301	if ((offset * 2) == 0x080) { m_080_data = data; return; } // p3 3rd boss?

trunk/src/mame/drivers/taito_o.c

r17788	r17789
55	55	{
56	56	case 0: retval = ioport("IN0")->read() & (clear_hack ? 0xf7ff : 0xffff); break;
57	57	case 1: retval = ioport("IN1")->read() & (clear_hack ? 0xfff7 : 0xffff); break;
58		default: logerror("IO R %x %x = %x @ %x\n", offset, mem_mask, retval, cpu_get_pc(&space.device()));
	58	default: logerror("IO R %x %x = %x @ %x\n", offset, mem_mask, retval, space.device().safe_pc());
59	59	}
60	60	return retval;
61	61	}

trunk/src/mame/drivers/ddragon3.c

r17788	r17789
196	196	break;
197	197
198	198	default:
199		logerror("OUTPUT 1400[%02x] %08x, pc=%06x \n", offset, (unsigned)data, cpu_get_pc(&space.device()) );
	199	logerror("OUTPUT 1400[%02x] %08x, pc=%06x \n", offset, (unsigned)data, space.device().safe_pc() );
200	200	break;
201	201	}
202	202	}

trunk/src/mame/drivers/mediagx.c

r17788	r17789
596	596	{
597	597	UINT8 nibble = m_parallel_latched;//(ioport(m_portnames[m_parallel_pointer / 3])->read_safe(0) >> (4 * (m_parallel_pointer % 3))) & 15;
598	598	r |= ((~nibble & 0x08) << 12) | ((nibble & 0x07) << 11);
599		logerror("%08X:parallel_port_r()\n", cpu_get_pc(&space.device()));
	599	logerror("%08X:parallel_port_r()\n", space.device().safe_pc());
600	600	#if 0
601	601	if (m_controls_data == 0x18)
602	602	{
r17788	r17789
645	645	7x..ff = advance pointer
646	646	*/
647	647
648		logerror("%08X:", cpu_get_pc(&space.device()));
	648	logerror("%08X:", space.device().safe_pc());
649	649
650	650	m_parallel_latched = (ioport(portnames[m_parallel_pointer / 3])->read_safe(0) >> (4 * (m_parallel_pointer % 3))) & 15;
651	651	//parallel_pointer++;
r17788	r17789
1266	1266	{
1267	1267	mediagx_state *state = space->machine().driver_data<mediagx_state>();
1268	1268
1269		if (cpu_get_pc(&space->device()) == state->m_speedup_table[idx].pc)
	1269	if (space->device().safe_pc() == state->m_speedup_table[idx].pc)
1270	1270	{
1271	1271	state->m_speedup_hits[idx]++;
1272	1272	device_spin_until_interrupt(&space->device());

trunk/src/mame/drivers/policetr.c

r17788	r17789
152	152
153	153	/* log any unknown bits */
154	154	if (data & 0x4f1fffff)
155		logerror("%08X: control_w = %08X & %08X\n", cpu_get_previouspc(&space.device()), data, mem_mask);
	155	logerror("%08X: control_w = %08X & %08X\n", space.device().safe_pcbase(), data, mem_mask);
156	156	}
157	157
158	158
r17788	r17789
203	203	COMBINE_DATA(m_speedup_data);
204	204
205	205	/* see if the PC matches */
206		if ((cpu_get_previouspc(&space.device()) & 0x1fffffff) == m_speedup_pc)
	206	if ((space.device().safe_pcbase() & 0x1fffffff) == m_speedup_pc)
207	207	{
208	208	UINT64 curr_cycles = machine().firstcpu->total_cycles();
209	209

trunk/src/mame/drivers/megadrvb.c

r17788	r17789
273	273	- aladmdb_w : 1b2d18 - data = aa00 (only once on reset)
274	274	- aladmdb_w : 1b2d42 - data = 0000 (only once on reset)
275	275	*/
276		logerror("aladmdb_w : %06x - data = %04x\n",cpu_get_pc(&space->device()),data);
	276	logerror("aladmdb_w : %06x - data = %04x\n",space->device().safe_pc(),data);
277	277	}
278	278
279	279	static READ16_HANDLER( aladmdb_r )
280	280	{
281	281	md_boot_state *state = space->machine().driver_data<md_boot_state>();
282		if (cpu_get_pc(&space->device())==0x1b2a56)
	282	if (space->device().safe_pc()==0x1b2a56)
283	283	{
284	284	state->m_aladmdb_mcu_port = state->ioport("MCU")->read();
285	285
r17788	r17789
288	288	else
289	289	return (0x100); //MCU status, needed if you fall into a pitfall
290	290	}
291		if (cpu_get_pc(&space->device())==0x1b2a72) return 0x0000;
292		if (cpu_get_pc(&space->device())==0x1b2d24) return (space->machine().root_device().ioport("MCU")->read() & 0x00f0) | 0x1200;    // difficulty
293		if (cpu_get_pc(&space->device())==0x1b2d4e) return 0x0000;
	291	if (space->device().safe_pc()==0x1b2a72) return 0x0000;
	292	if (space->device().safe_pc()==0x1b2d24) return (space->machine().root_device().ioport("MCU")->read() & 0x00f0) | 0x1200;    // difficulty
	293	if (space->device().safe_pc()==0x1b2d4e) return 0x0000;
294	294
295		logerror("aladbl_r : %06x\n",cpu_get_pc(&space->device()));
	295	logerror("aladbl_r : %06x\n",space->device().safe_pc());
296	296
297	297	return 0x0000;
298	298	}

trunk/src/mame/drivers/gaplus.c

r17788	r17789
206	206	device_t *io56xx = machine().device("56xx");
207	207	int bit = !BIT(offset, 11);
208	208
209		logerror("%04x: freset %d\n",cpu_get_pc(&space.device()), bit);
	209	logerror("%04x: freset %d\n",space.device().safe_pc(), bit);
210	210
211	211	namcoio_set_reset_line(io58xx, bit ? CLEAR_LINE : ASSERT_LINE);
212	212	namcoio_set_reset_line(io56xx, bit ? CLEAR_LINE : ASSERT_LINE);

trunk/src/mame/drivers/seta2.c

r17788	r17789
124	124	int banks = (machine().root_device().memregion( "x1snd" )->bytes() - 0x100000) / 0x20000;
125	125	if (data >= banks)
126	126	{
127		logerror("CPU #0 PC %06X: invalid sound bank %04X\n",cpu_get_pc(&space.device()),data);
	127	logerror("CPU #0 PC %06X: invalid sound bank %04X\n",space.device().safe_pc(),data);
128	128	data %= banks;
129	129	}
130	130	memcpy(ROM + offset * 0x20000, ROM + 0x100000 + data * 0x20000, 0x20000);

trunk/src/mame/drivers/zn.c

r17788	r17789
1806	1806	else if (ACCESSING_BITS_16_31)
1807	1807	{
1808	1808	m_bam2_mcu_command = data>>16;
1809		logerror("MCU command: %04x (PC %08x)\n", m_bam2_mcu_command, cpu_get_pc(&space.device()));
	1809	logerror("MCU command: %04x (PC %08x)\n", m_bam2_mcu_command, space.device().safe_pc());
1810	1810	}
1811	1811	}
1812	1812	}
r17788	r17789
1816	1816	switch (offset)
1817	1817	{
1818	1818	case 0:
1819		logerror("MCU port 0 read @ PC %08x mask %08x\n", cpu_get_pc(&space.device()), mem_mask);
	1819	logerror("MCU port 0 read @ PC %08x mask %08x\n", space.device().safe_pc(), mem_mask);
1820	1820	break;
1821	1821
1822	1822	case 1:
1823		logerror("MCU status read @ PC %08x mask %08x\n", cpu_get_pc(&space.device()), mem_mask);
	1823	logerror("MCU status read @ PC %08x mask %08x\n", space.device().safe_pc(), mem_mask);
1824	1824
1825	1825	switch (m_bam2_mcu_command)
1826	1826	{

trunk/src/mame/drivers/paradise.c

r17788	r17789
99	99
100	100	if (bank >= bank_n)
101	101	{
102		logerror("PC %04X - invalid rom bank %x\n", cpu_get_pc(&space.device()), bank);
	102	logerror("PC %04X - invalid rom bank %x\n", space.device().safe_pc(), bank);
103	103	bank %= bank_n;
104	104	}
105	105

trunk/src/mame/drivers/fitfight.c

r17788	r17789
220	220
221	221	READ8_MEMBER(fitfight_state::snd_porta_r)
222	222	{
223		//mame_printf_debug("PA R @%x\n",cpu_get_pc(&space.device()));
	223	//mame_printf_debug("PA R @%x\n",space.device().safe_pc());
224	224	return machine().rand();
225	225	}
226	226
227	227	READ8_MEMBER(fitfight_state::snd_portb_r)
228	228	{
229		//mame_printf_debug("PB R @%x\n",cpu_get_pc(&space.device()));
	229	//mame_printf_debug("PB R @%x\n",space.device().safe_pc());
230	230	return machine().rand();
231	231	}
232	232
233	233	READ8_MEMBER(fitfight_state::snd_portc_r)
234	234	{
235		//mame_printf_debug("PC R @%x\n",cpu_get_pc(&space.device()));
	235	//mame_printf_debug("PC R @%x\n",space.device().safe_pc());
236	236	return machine().rand();
237	237	}
238	238
239	239	WRITE8_MEMBER(fitfight_state::snd_porta_w)
240	240	{
241		//mame_printf_debug("PA W %x @%x\n",data,cpu_get_pc(&space.device()));
	241	//mame_printf_debug("PA W %x @%x\n",data,space.device().safe_pc());
242	242	}
243	243
244	244	WRITE8_MEMBER(fitfight_state::snd_portb_w)
245	245	{
246		//mame_printf_debug("PB W %x @%x\n",data,cpu_get_pc(&space.device()));
	246	//mame_printf_debug("PB W %x @%x\n",data,space.device().safe_pc());
247	247	}
248	248
249	249	WRITE8_MEMBER(fitfight_state::snd_portc_w)
250	250	{
251		//mame_printf_debug("PC W %x @%x\n",data,cpu_get_pc(&space.device()));
	251	//mame_printf_debug("PC W %x @%x\n",data,space.device().safe_pc());
252	252	}
253	253
254	254	static ADDRESS_MAP_START( snd_io, AS_IO, 8, fitfight_state )

trunk/src/mame/drivers/deco32.c

r17788	r17789
314	314	//      return 0xffffff80 | vblank | (0x40); //test for lock load guns
315	315	}
316	316
317		logerror("%08x: Unmapped IRQ read %08x (%08x)\n",cpu_get_pc(&space.device()),offset,mem_mask);
	317	logerror("%08x: Unmapped IRQ read %08x (%08x)\n",space.device().safe_pc(),offset,mem_mask);
318	318	return 0xffffffff;
319	319	}
320	320
r17788	r17789
324	324
325	325	switch (offset) {
326	326	case 0: /* IRQ enable - probably an irq mask, but only values used are 0xc8 and 0xca */
327		//      logerror("%08x:  IRQ write %d %08x\n",cpu_get_pc(&space.device()),offset,data);
	327	//      logerror("%08x:  IRQ write %d %08x\n",space.device().safe_pc(),offset,data);
328	328	m_raster_enable=(data&0xff)==0xc8; /* 0xca seems to be off */
329	329	break;
330	330
r17788	r17789
364	364	case 0xed4: return ioport("IN2")->read(); /* Misc */
365	365	}
366	366
367		logerror("%08x: Unmapped protection read %04x\n",cpu_get_pc(&space.device()),offset<<2);
	367	logerror("%08x: Unmapped protection read %04x\n",space.device().safe_pc(),offset<<2);
368	368	return 0xffffffff;
369	369	}
370	370
r17788	r17789
405	405
406	406	READ32_MEMBER(deco32_state::dragngun_service_r)
407	407	{
408		//  logerror("%08x:Read service\n",cpu_get_pc(&space.device()));
	408	//  logerror("%08x:Read service\n",space.device().safe_pc());
409	409	return ioport("IN2")->read();
410	410	}
411	411
412	412	READ32_MEMBER(deco32_state::lockload_gun_mirror_r)
413	413	{
414		//logerror("%08x:Read gun %d\n",cpu_get_pc(&space.device()),offset);
	414	//logerror("%08x:Read gun %d\n",space.device().safe_pc(),offset);
415	415	//return ((machine().rand()%0xffff)<<16) | machine().rand()%0xffff;
416	416	if (offset) /* Mirror of player 1 and player 2 fire buttons */
417	417	return ioport("IN4")->read() | ((machine().rand()%0xff)<<16);
r17788	r17789
420	420
421	421	READ32_MEMBER(deco32_state::dragngun_prot_r)
422	422	{
423		//  logerror("%08x:Read prot %08x (%08x)\n",cpu_get_pc(&space.device()),offset<<1,mem_mask);
	423	//  logerror("%08x:Read prot %08x (%08x)\n",space.device().safe_pc(),offset<<1,mem_mask);
424	424
425	425	if (!m_strobe) m_strobe=8;
426	426	else m_strobe=0;
r17788	r17789
487	487	case 0x35a: return m_tattass_eprom_bit << 16;
488	488	}
489	489
490		logerror("%08x:Read prot %08x (%08x)\n",cpu_get_pc(&space.device()),offset<<1,mem_mask);
	490	logerror("%08x:Read prot %08x (%08x)\n",space.device().safe_pc(),offset<<1,mem_mask);
491	491
492	492	return 0xffffffff;
493	493	}
r17788	r17789
645	645	case 0x35a: return (machine().device<eeprom_device>("eeprom")->read_bit()<< 16) | 0xffff; // Debug switch in low word??
646	646	}
647	647
648		//logerror("%08x: Read unmapped prot %08x (%08x)\n",cpu_get_pc(&space.device()),offset<<1,mem_mask);
	648	//logerror("%08x: Read unmapped prot %08x (%08x)\n",space.device().safe_pc(),offset<<1,mem_mask);
649	649
650	650	return 0xffffffff;
651	651	}
r17788	r17789
666	666
667	667	WRITE32_MEMBER(deco32_state::nslasher_prot_w)
668	668	{
669		//logerror("%08x:write prot %08x (%08x) %08x\n",cpu_get_pc(&space.device()),offset<<1,mem_mask,data);
	669	//logerror("%08x:write prot %08x (%08x) %08x\n",space.device().safe_pc(),offset<<1,mem_mask,data);
670	670
671	671	/* Only sound port of chip is used - no protection */
672	672	if (offset==0x700/4) {

trunk/src/mame/drivers/malzak.c

r17788	r17789
152	152	//  Bits 1-3 are all set high upon death, until the game continues
153	153	//  Bit 6 is used only in Malzak II, and is set high after checking
154	154	//        the selected version
155		//  logerror("S2650 [0x%04x]: port 0x40 write: 0x%02x\n", cpu_get_pc(machine().device("maincpu")), data);
	155	//  logerror("S2650 [0x%04x]: port 0x40 write: 0x%02x\n", machine().device("maincpu")->safe_pc(), data);
156	156	membank("bank1")->set_entry((data & 0x40) >> 6);
157	157	}
158	158

trunk/src/mame/drivers/midzeus.c

r17788	r17789
134	134	if (bitlatch[2] && !cmos_protected)
135	135	COMBINE_DATA(&m_nvram[offset]);
136	136	else
137		logerror("%06X:timekeeper_w with bitlatch[2] = %d, cmos_protected = %d\n", cpu_get_pc(&space.device()), bitlatch[2], cmos_protected);
	137	logerror("%06X:timekeeper_w with bitlatch[2] = %d, cmos_protected = %d\n", space.device().safe_pc(), bitlatch[2], cmos_protected);
138	138	cmos_protected = TRUE;
139	139	}
140	140
r17788	r17789
188	188	if (bitlatch[2])
189	189	COMBINE_DATA(&m_nvram[offset]);
190	190	else
191		logerror("%06X:zpram_w with bitlatch[2] = %d\n", cpu_get_pc(&space.device()), bitlatch[2]);
	191	logerror("%06X:zpram_w with bitlatch[2] = %d\n", space.device().safe_pc(), bitlatch[2]);
192	192	}
193	193
194	194
r17788	r17789
229	229
230	230	/* unknown purpose */
231	231	default:
232		logerror("%06X:bitlatches_r(%X)\n", cpu_get_pc(&space.device()), offset);
	232	logerror("%06X:bitlatches_r(%X)\n", space.device().safe_pc(), offset);
233	233	break;
234	234	}
235	235	return ~0;
r17788	r17789
246	246	/* unknown purpose */
247	247	default:
248	248	if (oldval ^ data)
249		logerror("%06X:bitlatches_w(%X) = %X\n", cpu_get_pc(&space.device()), offset, data);
	249	logerror("%06X:bitlatches_w(%X) = %X\n", space.device().safe_pc(), offset, data);
250	250	break;
251	251
252	252	/* unknown purpose; crusnexo toggles this between 0 and 1 every 20 frames; thegrid writes 1 */
253	253	case 0:
254	254	if (data != 0 && data != 1)
255		logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
	255	logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
256	256	break;
257	257
258	258	/* unknown purpose; mk4/invasn write 1 here at initialization; crusnexo/thegrid write 3 */
259	259	case 1:
260	260	if (data != 1 && data != 3)
261		logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
	261	logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
262	262	break;
263	263
264	264	/* CMOS/ZPRAM extra enable latch; only low bit is used */
r17788	r17789
268	268	/* unknown purpose; invasn writes 2 here at startup */
269	269	case 4:
270	270	if (data != 2)
271		logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
	271	logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
272	272	break;
273	273
274	274	/* ROM bank selection on Zeus 2 */
r17788	r17789
279	279	/* unknown purpose; crusnexo/thegrid write 1 at startup */
280	280	case 7:
281	281	if (data != 1)
282		logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
	282	logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
283	283	break;
284	284
285	285	/* unknown purpose; crusnexo writes 4 at startup; thegrid writes 6 */
286	286	case 8:
287	287	if (data != 4 && data != 6)
288		logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
	288	logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
289	289	break;
290	290
291	291	/* unknown purpose; thegrid writes 1 at startup */
292	292	case 9:
293	293	if (data != 1)
294		logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", cpu_get_pc(&space.device()), offset, data);
	294	logerror("%06X:bitlatches_w(%X) = %X (unexpected)\n", space.device().safe_pc(), offset, data);
295	295	break;
296	296	}
297	297	}
r17788	r17789
357	357
358	358	READ32_MEMBER(midzeus_state::linkram_r)
359	359	{
360		logerror("%06X:unknown_8a000_r(%02X)\n", cpu_get_pc(&space.device()), offset);
	360	logerror("%06X:unknown_8a000_r(%02X)\n", space.device().safe_pc(), offset);
361	361	if (offset == 0)
362	362	return 0x30313042;
363	363	else if (offset == 0x3c)
r17788	r17789
367	367
368	368	WRITE32_MEMBER(midzeus_state::linkram_w)
369	369	{
370		logerror("%06X:unknown_8a000_w(%02X) = %08X\n", cpu_get_pc(&space.device()),  offset, data);
	370	logerror("%06X:unknown_8a000_w(%02X) = %08X\n", space.device().safe_pc(),  offset, data);
371	371	COMBINE_DATA(&linkram[offset]);
372	372	}
373	373
r17788	r17789
392	392
393	393	/* log anything else except the memory control register */
394	394	if (offset != 0x64)
395		logerror("%06X:tms32031_control_r(%02X)\n", cpu_get_pc(&space.device()), offset);
	395	logerror("%06X:tms32031_control_r(%02X)\n", space.device().safe_pc(), offset);
396	396
397	397	return tms32031_control[offset];
398	398	}
r17788	r17789
414	414	timer[which]->adjust(attotime::never);
415	415	}
416	416	else
417		logerror("%06X:tms32031_control_w(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, data);
	417	logerror("%06X:tms32031_control_w(%02X) = %08X\n", space.device().safe_pc(), offset, data);
418	418	}
419	419
420	420
r17788	r17789
465	465	{
466	466	static const char * const tags[] = { "ANALOG0", "ANALOG1", "ANALOG2", "ANALOG3" };
467	467	if (offset < 8 || offset > 11)
468		logerror("%06X:analog_r(%X)\n", cpu_get_pc(&space.device()), offset);
	468	logerror("%06X:analog_r(%X)\n", space.device().safe_pc(), offset);
469	469	return ioport(tags[offset & 3])->read();
470	470	}
471	471

trunk/src/mame/drivers/tomcat.c

r17788	r17789
223	223
224	224	READ16_MEMBER(tomcat_state::dsp_BIO_r)
225	225	{
226		if ( cpu_get_pc(&space.device()) == 0x0001 )
	226	if ( space.device().safe_pc() == 0x0001 )
227	227	{
228	228	if ( m_dsp_idle == 0 )
229	229	{
r17788	r17789
232	232	}
233	233	return !m_dsp_BIO;
234	234	}
235		else if ( cpu_get_pc(&space.device()) == 0x0003 )
	235	else if ( space.device().safe_pc() == 0x0003 )
236	236	{
237	237	if ( m_dsp_BIO == 1 )
238	238	{

trunk/src/mame/drivers/fastfred.c

r17788	r17789
21	21	// to change if a different ROM set ever surfaces.
22	22	READ8_MEMBER(fastfred_state::fastfred_custom_io_r)
23	23	{
24		switch (cpu_get_pc(&space.device()))
	24	switch (space.device().safe_pc())
25	25	{
26	26	case 0x03c0: return 0x9d;
27	27	case 0x03e6: return 0x9f;
r17788	r17789
47	47	case 0x7b58: return 0x20;
48	48	}
49	49
50		logerror("Uncaught custom I/O read %04X at %04X\n", 0xc800+offset, cpu_get_pc(&space.device()));
	50	logerror("Uncaught custom I/O read %04X at %04X\n", 0xc800+offset, space.device().safe_pc());
51	51	return 0x00;
52	52	}
53	53
54	54	READ8_MEMBER(fastfred_state::flyboy_custom1_io_r)
55	55	{
56	56
57		switch (cpu_get_pc(&space.device()))
	57	switch (space.device().safe_pc())
58	58	{
59	59	case 0x049d: return 0xad;   /* compare */
60	60	case 0x04b9:         /* compare with 0x9e ??? When ??? */
r17788	r17789
75	75	return 0x00;
76	76	}
77	77
78		logerror("Uncaught custom I/O read %04X at %04X\n", 0xc085+offset, cpu_get_pc(&space.device()));
	78	logerror("Uncaught custom I/O read %04X at %04X\n", 0xc085+offset, space.device().safe_pc());
79	79	return 0x00;
80	80	}
81	81
82	82	READ8_MEMBER(fastfred_state::flyboy_custom2_io_r)
83	83	{
84	84
85		switch (cpu_get_pc(&space.device()))
	85	switch (space.device().safe_pc())
86	86	{
87	87	case 0x0395: return 0xf7;   /* $C900 compare         */
88	88	case 0x03f5:         /* $c8fd                 */
r17788	r17789
100	100	return 0x00;
101	101	}
102	102
103		logerror("Uncaught custom I/O read %04X at %04X\n", 0xc8fb+offset, cpu_get_pc(&space.device()));
	103	logerror("Uncaught custom I/O read %04X at %04X\n", 0xc8fb+offset, space.device().safe_pc());
104	104	return 0x00;
105	105	}
106	106

trunk/src/mame/drivers/lwings.c

r17788	r17789
106	106
107	107	WRITE8_MEMBER(lwings_state::avengers_protection_w)
108	108	{
109		int pc = cpu_get_pc(&space.device());
	109	int pc = space.device().safe_pc();
110	110
111	111	if (pc == 0x2eeb)
112	112	{
r17788	r17789
238	238	int x, y;
239	239	int dx, dy, dist, dir;
240	240
241		if (cpu_get_pc(&space.device()) == 0x7c7)
	241	if (space.device().safe_pc() == 0x7c7)
242	242	{
243	243	/* palette data */
244	244	return avengers_fetch_paldata(machine());

trunk/src/mame/drivers/xtheball.c

r17788	r17789
127	127	{
128	128	if (bitvals[offset] != (data & 1))
129	129	{
130		logerror("%08x:bit_controls_w(%x,%d)\n", cpu_get_pc(&space.device()), offset, data & 1);
	130	logerror("%08x:bit_controls_w(%x,%d)\n", space.device().safe_pc(), offset, data & 1);
131	131
132	132	switch (offset)
133	133	{

trunk/src/mame/drivers/punchout.c

r17788	r17789
154	154
155	155	READ8_MEMBER(punchout_state::spunchout_rp5c01_r)
156	156	{
157		logerror("%04x: prot_r %x\n", cpu_get_previouspc(&space.device()), offset);
	157	logerror("%04x: prot_r %x\n", space.device().safe_pcbase(), offset);
158	158
159	159	if (offset <= 0x0c)
160	160	{
r17788	r17789
266	266	{
267	267	data &= 0x0f;
268	268
269		logerror("%04x: prot_w %x = %02x\n",cpu_get_previouspc(&space.device()),offset,data);
	269	logerror("%04x: prot_w %x = %02x\n",space.device().safe_pcbase(),offset,data);
270	270
271	271	if (offset <= 0x0c)
272	272	{
r17788	r17789
301	301	/* PC = 0x0313 */
302	302	/* (ret or 0x10) -> (D7DF),(D7A0) - (D7DF),(D7A0) = 0d0h(ret nc) */
303	303
304		if (cpu_get_previouspc(&space.device()) == 0x0313)
	304	if (space.device().safe_pcbase() == 0x0313)
305	305	ret |= 0xc0;
306	306
307	307	return ret;

trunk/src/mame/drivers/88games.c

r17788	r17789
269	269	UINT8 *RAM = state->memregion("maincpu")->base();
270	270	int offs;
271	271
272		logerror("%04x: bank select %02x\n", cpu_get_pc(device), lines);
	272	logerror("%04x: bank select %02x\n", device->safe_pc(), lines);
273	273
274	274	/* bits 0-2 select ROM bank for 0000-1fff */
275	275	/* bit 3: when 1, palette RAM at 1000-1fff */

trunk/src/mame/drivers/ddenlovr.c

r17788	r17789
824	824	;
825	825	#ifdef MAME_DEBUG
826	826	popmessage("unknown blitter command %02x", data);
827		logerror("%06x: unknown blitter command %02x\n", cpu_get_pc(&space->device()), data);
	827	logerror("%06x: unknown blitter command %02x\n", space->device().safe_pc(), data);
828	828	#endif
829	829	}
830	830
r17788	r17789
843	843	break;
844	844
845	845	default:
846		logerror("%06x: Blitter %d reg %02x = %02x\n", cpu_get_pc(&space->device()), blitter, state->m_ddenlovr_blit_regs[blitter], data);
	846	logerror("%06x: Blitter %d reg %02x = %02x\n", space->device().safe_pc(), blitter, state->m_ddenlovr_blit_regs[blitter], data);
847	847	break;
848	848	}
849	849	}
r17788	r17789
1190	1190	;
1191	1191	#ifdef MAME_DEBUG
1192	1192	popmessage("unknown blitter command %02x", data);
1193		logerror("%06x: unknown blitter command %02x\n", cpu_get_pc(&space.device()), data);
	1193	logerror("%06x: unknown blitter command %02x\n", space.device().safe_pc(), data);
1194	1194	#endif
1195	1195	}
1196	1196
r17788	r17789
1199	1199	break;
1200	1200
1201	1201	default:
1202		logerror("%06x: Blitter 0 reg %02x = %02x\n", cpu_get_pc(&space.device()), m_ddenlovr_blit_latch, data);
	1202	logerror("%06x: Blitter 0 reg %02x = %02x\n", space.device().safe_pc(), m_ddenlovr_blit_latch, data);
1203	1203	break;
1204	1204	}
1205	1205
r17788	r17789
1244	1244
1245	1245	if (address >= size)
1246	1246	{
1247		logerror("CPU#0 PC %06X: Error, Blitter address %06X out of range\n", cpu_get_pc(&space.device()), address);
	1247	logerror("CPU#0 PC %06X: Error, Blitter address %06X out of range\n", space.device().safe_pc(), address);
1248	1248	address %= size;
1249	1249	}
1250	1250
r17788	r17789
1589	1589
1590	1590	READ8_MEMBER(dynax_state::rongrong_input2_r)
1591	1591	{
1592		//  logerror("%04x: input2_r offset %d select %x\n", cpu_get_pc(&space.device()), offset, m_input_sel);
	1592	//  logerror("%04x: input2_r offset %d select %x\n", space.device().safe_pc(), offset, m_input_sel);
1593	1593	/* 0 and 1 are read from offset 1, 2 from offset 0... */
1594	1594	switch (m_input_sel)
1595	1595	{
r17788	r17789
1615	1615
1616	1616	READ16_MEMBER(dynax_state::quiz365_input2_r)
1617	1617	{
1618		//  logerror("%04x: input2_r offset %d select %x\n",cpu_get_pc(&space.device()), offset, m_input_sel);
	1618	//  logerror("%04x: input2_r offset %d select %x\n",space.device().safe_pc(), offset, m_input_sel);
1619	1619	/* 0 and 1 are read from offset 1, 2 from offset 0... */
1620	1620	switch (m_input_sel)
1621	1621	{
r17788	r17789
1632	1632	m_rongrong_blitter_busy_select = data;
1633	1633
1634	1634	if (data != 0x18)
1635		logerror("%04x: rongrong_blitter_busy_w data = %02x\n", cpu_get_pc(&space.device()), data);
	1635	logerror("%04x: rongrong_blitter_busy_w data = %02x\n", space.device().safe_pc(), data);
1636	1636	}
1637	1637
1638	1638	READ8_MEMBER(dynax_state::rongrong_blitter_busy_r)
r17788	r17789
1642	1642	case 0x18:   return 0;   // bit 5 = blitter busy
1643	1643
1644	1644	default:
1645		logerror("%04x: rongrong_blitter_busy_r with select = %02x\n", cpu_get_pc(&space.device()), m_rongrong_blitter_busy_select);
	1645	logerror("%04x: rongrong_blitter_busy_r with select = %02x\n", space.device().safe_pc(), m_rongrong_blitter_busy_select);
1646	1646	}
1647	1647	return 0xff;
1648	1648	}
r17788	r17789
1969	1969
1970	1970	WRITE8_MEMBER(dynax_state::rongrong_select_w)
1971	1971	{
1972		//logerror("%04x: rongrong_select_w %02x\n",cpu_get_pc(&space.device()),data);
	1972	//logerror("%04x: rongrong_select_w %02x\n",space.device().safe_pc(),data);
1973	1973
1974	1974	/* bits 0-4 = **both** ROM bank **AND** input select */
1975	1975	membank("bank1")->set_entry(data & 0x1f);
r17788	r17789
2238	2238	if (!BIT(m_dsw_sel, 0))  return ioport("DSW1")->read();
2239	2239	if (!BIT(m_dsw_sel, 1))  return ioport("DSW2")->read();
2240	2240	if (!BIT(m_dsw_sel, 2))  return ioport("DSW3")->read();
2241		logerror("%06x: warning, unknown bits read, ddenlovr_select = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel);
	2241	logerror("%06x: warning, unknown bits read, ddenlovr_select = %02x\n", space.device().safe_pc(), m_dsw_sel);
2242	2242	return 0xff;
2243	2243	}
2244	2244
r17788	r17789
2249	2249	case 0x22:   return ioport("IN2")->read();
2250	2250	case 0x23:   return m_funkyfig_lockout;
2251	2251	}
2252		logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	2252	logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", space.device().safe_pc(), m_input_sel);
2253	2253	return 0xff;
2254	2254	}
2255	2255
r17788	r17789
2260	2260	case 0x20:   return ioport("IN0")->read();
2261	2261	case 0x21:   return ioport("IN1")->read();
2262	2262	}
2263		logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	2263	logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", space.device().safe_pc(), m_input_sel);
2264	2264	return 0xff;
2265	2265	}
2266	2266
r17788	r17789
2273	2273	coin_counter_w(machine(), 0,   data  & 0x01);
2274	2274	coin_lockout_w(machine(), 0, (~data) & 0x02);
2275	2275	if (data & ~0x03)
2276		logerror("%06x: warning, unknown bits written, lockout = %02x\n", cpu_get_pc(&space.device()), data);
	2276	logerror("%06x: warning, unknown bits written, lockout = %02x\n", space.device().safe_pc(), data);
2277	2277	break;
2278	2278
2279	2279	//      case 0xef:  16 bytes on startup
2280	2280
2281	2281	default:
2282		logerror("%06x: warning, unknown bits written, ddenlovr_select2 = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_input_sel, data);
	2282	logerror("%06x: warning, unknown bits written, ddenlovr_select2 = %02x, data = %02x\n", space.device().safe_pc(), m_input_sel, data);
2283	2283	}
2284	2284	}
2285	2285
r17788	r17789
2391	2391
2392	2392	if (address >= size)
2393	2393	{
2394		logerror("CPU#0 PC %06X: Error, Blitter address %06X out of range\n", cpu_get_pc(&space.device()), address);
	2394	logerror("CPU#0 PC %06X: Error, Blitter address %06X out of range\n", space.device().safe_pc(), address);
2395	2395	address %= size;
2396	2396	}
2397	2397
r17788	r17789
2422	2422	coin_counter_w(machine(), 1, data & 2);
2423	2423
2424	2424	if (data & 0xf0)
2425		logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
	2425	logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
2426	2426
2427	2427	#ifdef MAME_DEBUG
2428	2428	//      popmessage("93 = %02x", data);
r17788	r17789
2620	2620	coin_lockout_w(machine(), 0, (~data) & 0x08);
2621	2621
2622	2622	if (data & 0x74)
2623		logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
	2623	logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
2624	2624
2625	2625	#ifdef MAME_DEBUG
2626	2626	//    popmessage("40 = %02x",data);
r17788	r17789
2678	2678	WRITE8_MEMBER(dynax_state::mjmyster_rambank_w)
2679	2679	{
2680	2680	membank("bank2")->set_entry(data & 0x07);
2681		//logerror("%04x: rambank = %02x\n", cpu_get_pc(&space.device()), data);
	2681	//logerror("%04x: rambank = %02x\n", space.device().safe_pc(), data);
2682	2682	}
2683	2683
2684	2684	WRITE8_MEMBER(dynax_state::mjmyster_select2_w)
r17788	r17789
2699	2699	case 0x03:   return 0xff;
2700	2700	}
2701	2701
2702		logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	2702	logerror("%06x: warning, unknown bits read, ddenlovr_select2 = %02x\n", space.device().safe_pc(), m_input_sel);
2703	2703
2704	2704	return 0xff;
2705	2705	}
r17788	r17789
2713	2713	else if (BIT(m_keyb, 2))   ret = ioport("KEY2")->read();
2714	2714	else if (BIT(m_keyb, 3))   ret = ioport("KEY3")->read();
2715	2715	else if (BIT(m_keyb, 4))   ret = ioport("KEY4")->read();
2716		else   logerror("%06x: warning, unknown bits read, keyb = %02x\n", cpu_get_pc(&space.device()), m_keyb);
	2716	else   logerror("%06x: warning, unknown bits read, keyb = %02x\n", space.device().safe_pc(), m_keyb);
2717	2717
2718	2718	m_keyb <<= 1;
2719	2719
r17788	r17789
2727	2727	if (!BIT(m_dsw_sel, 2))   return ioport("DSW2")->read();
2728	2728	if (!BIT(m_dsw_sel, 3))   return ioport("DSW1")->read();
2729	2729	if (!BIT(m_dsw_sel, 4))   return ioport("DSW5")->read();
2730		logerror("%06x: warning, unknown bits read, ddenlovr_select = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel);
	2730	logerror("%06x: warning, unknown bits read, ddenlovr_select = %02x\n", space.device().safe_pc(), m_dsw_sel);
2731	2731	return 0xff;
2732	2732	}
2733	2733
r17788	r17789
2745	2745	break;
2746	2746
2747	2747	default:
2748		logerror("%06x: warning, unknown bits written, ddenlovr_select2 = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_input_sel, data);
	2748	logerror("%06x: warning, unknown bits written, ddenlovr_select2 = %02x, data = %02x\n", space.device().safe_pc(), m_input_sel, data);
2749	2749	}
2750	2750	}
2751	2751
r17788	r17789
2841	2841	case 0x22:   return 0x7f;   // bit 7 = blitter busy, bit 6 = hopper
2842	2842	case 0x23:   return m_coins;
2843	2843	}
2844		logerror("%04x: coins_r with select = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	2844	logerror("%04x: coins_r with select = %02x\n", space.device().safe_pc(), m_input_sel);
2845	2845	return 0xff;
2846	2846	}
2847	2847
r17788	r17789
2870	2870	m_coins = data;
2871	2871	break;
2872	2872	default:
2873		logerror("%04x: coins_w with select = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_input_sel, data);
	2873	logerror("%04x: coins_w with select = %02x, data = %02x\n", space.device().safe_pc(), m_input_sel, data);
2874	2874	}
2875	2875	}
2876	2876
r17788	r17789
2892	2892	case 0xa2:
2893	2893	return ioport(keynames1[m_keyb++])->read();
2894	2894	}
2895		logerror("%04x: input_r with select = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	2895	logerror("%04x: input_r with select = %02x\n", space.device().safe_pc(), m_input_sel);
2896	2896	return 0xff;
2897	2897	}
2898	2898
r17788	r17789
2985	2985	case 0x22:   return hgokou_player_r(&space, 0);
2986	2986	case 0x23:   return m_coins;
2987	2987	}
2988		logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel);
	2988	logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", space.device().safe_pc(), m_dsw_sel);
2989	2989	return 0xff;
2990	2990	}
2991	2991
r17788	r17789
3012	3012	case 0x2f:   break;   // ? written with 2f (hgokou)
3013	3013
3014	3014	default:
3015		logerror("%04x: input_w with select = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel, data);
	3015	logerror("%04x: input_w with select = %02x, data = %02x\n", space.device().safe_pc(), m_dsw_sel, data);
3016	3016	}
3017	3017	}
3018	3018
r17788	r17789
3088	3088	m_input_sel |= 1;
3089	3089	return ret;
3090	3090	}
3091		logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", cpu_get_pc(&space.device()), m_dsw_sel);
	3091	logerror("%06x: warning, unknown bits read, dsw_sel = %02x\n", space.device().safe_pc(), m_dsw_sel);
3092	3092	return 0xff;
3093	3093	}
3094	3094
r17788	r17789
3148	3148	case 0x80:   return ioport(keynames0[m_keyb++])->read();   // P1 (Keys)
3149	3149	case 0x81:   return ioport(keynames1[m_keyb++])->read();   // P2 (Keys)
3150	3150	}
3151		logerror("%06x: warning, unknown bits read, input_sel = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	3151	logerror("%06x: warning, unknown bits read, input_sel = %02x\n", space.device().safe_pc(), m_input_sel);
3152	3152	return 0xff;
3153	3153	}
3154	3154
r17788	r17789
3169	3169	case 0x0c:   coin_counter_w(machine(), 0, data & 1);   break;
3170	3170	case 0x0d:   break;
3171	3171	default:
3172		logerror("%04x: coins_w with select = %02x, data = %02x\n",cpu_get_pc(&space.device()), m_input_sel, data);
	3172	logerror("%04x: coins_w with select = %02x, data = %02x\n",space.device().safe_pc(), m_input_sel, data);
3173	3173	}
3174	3174	}
3175	3175
r17788	r17789
3220	3220	case 0x83:   return 0x00;
3221	3221	}
3222	3222
3223		logerror("%06x: warning, unknown bits read, input_sel = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	3223	logerror("%06x: warning, unknown bits read, input_sel = %02x\n", space.device().safe_pc(), m_input_sel);
3224	3224
3225	3225	return 0xff;
3226	3226	}
r17788	r17789
3400	3400
3401	3401	if (data & 0xfe)
3402	3402	{
3403		logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
	3403	logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
3404	3404	//      popmessage("COIN = %02x", data);
3405	3405	}
3406	3406	}
r17788	r17789
3517	3517	m_hopper = data & 0x04;
3518	3518
3519	3519	if (data & 0x68)
3520		logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
	3520	logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
3521	3521
3522	3522	#ifdef MAME_DEBUG
3523	3523	//  popmessage("COIN = %02x", data);
r17788	r17789
3527	3527	WRITE8_MEMBER(dynax_state::sryudens_rambank_w)
3528	3528	{
3529	3529	membank("bank2")->set_entry(data & 0x0f);
3530		//logerror("%04x: rambank = %02x\n", cpu_get_pc(&space.device()), data);
	3530	//logerror("%04x: rambank = %02x\n", space.device().safe_pc(), data);
3531	3531	}
3532	3532
3533	3533	static ADDRESS_MAP_START( sryudens_portmap, AS_IO, 8, dynax_state )
r17788	r17789
3577	3577	coin_counter_w(machine(), 1, data & 2);
3578	3578
3579	3579	if (data & ~0x8b)
3580		logerror("%04x: warning, coin counter = %02x\n", cpu_get_pc(&space.device()), data);
	3580	logerror("%04x: warning, coin counter = %02x\n", space.device().safe_pc(), data);
3581	3581
3582	3582	#ifdef MAME_DEBUG
3583	3583	//  popmessage("COIN = %02x", data);

trunk/src/mame/drivers/kaneko16.c

r17788	r17789
337	337	{
338	338	okim6295_device *oki = downcast<okim6295_device *>(device);
339	339	oki->set_bank_base(0x40000 * (data & 0xf) );
340		//      logerror("CPU #0 PC %06X : OKI0  bank %08X\n",cpu_get_pc(&space->device()),data);
	340	//      logerror("CPU #0 PC %06X : OKI0  bank %08X\n",space->device().safe_pc(),data);
341	341	}
342	342	}
343	343
r17788	r17789
348	348	{
349	349	okim6295_device *oki = downcast<okim6295_device *>(device);
350	350	oki->set_bank_base(0x40000 * data );
351		//      logerror("CPU #0 PC %06X : OKI1  bank %08X\n",cpu_get_pc(&space->device()),data);
	351	//      logerror("CPU #0 PC %06X : OKI1  bank %08X\n",space->device().safe_pc(),data);
352	352	}
353	353	}
354	354
r17788	r17789
478	478	{
479	479	okim6295_device *oki = downcast<okim6295_device *>(device);
480	480	oki->set_bank_base( 0x40000 * (data & 0xF) );
481		//      logerror("CPU #0 PC %06X : OKI0 bank %08X\n",cpu_get_pc(&space->device()),data);
	481	//      logerror("CPU #0 PC %06X : OKI0 bank %08X\n",space->device().safe_pc(),data);
482	482	}
483	483	}
484	484
r17788	r17789
489	489	{
490	490	okim6295_device *oki = downcast<okim6295_device *>(device);
491	491	oki->set_bank_base( 0x40000 * (data & 0x1) );
492		//      logerror("CPU #0 PC %06X : OKI1 bank %08X\n",cpu_get_pc(&space->device()),data);
	492	//      logerror("CPU #0 PC %06X : OKI1 bank %08X\n",space->device().safe_pc(),data);
493	493	}
494	494	}
495	495
r17788	r17789
552	552	case 0x0800:   // 360' Wheel
553	553	return   (ioport("WHEEL2")->read() << 8);
554	554	default:
555		logerror("gtmr2_wheel_r : read at %06x with joystick\n", cpu_get_pc(&space.device()));
	555	logerror("gtmr2_wheel_r : read at %06x with joystick\n", space.device().safe_pc());
556	556	return   (~0);
557	557	}
558	558	}

trunk/src/mame/drivers/namcos10.c

r17788	r17789
421	421
422	422	WRITE32_MEMBER(namcos10_state::nand_address1_w )
423	423	{
424		logerror("nand_a1_w %08x (%08x)\n", data, cpu_get_pc(&space.device()));
	424	logerror("nand_a1_w %08x (%08x)\n", data, space.device().safe_pc());
425	425	nand_address = ( nand_address & 0x00ffffff ) | ( ( data & 0xff ) << 24 );
426	426	}
427	427
428	428	WRITE32_MEMBER(namcos10_state::nand_address2_w )
429	429	{
430		logerror("nand_a2_w %08x (%08x)\n", data, cpu_get_pc(&space.device()));
	430	logerror("nand_a2_w %08x (%08x)\n", data, space.device().safe_pc());
431	431	nand_address = ( nand_address & 0xff00ffff ) | ( ( data & 0xff ) << 16 );
432	432	}
433	433
434	434	WRITE32_MEMBER(namcos10_state::nand_address3_w )
435	435	{
436		logerror("nand_a3_w %08x (%08x)\n", data, cpu_get_pc(&space.device()));
	436	logerror("nand_a3_w %08x (%08x)\n", data, space.device().safe_pc());
437	437	nand_address = ( nand_address & 0xffff00ff ) | ( ( data & 0xff ) << 8 );
438	438	}
439	439
440	440	WRITE32_MEMBER(namcos10_state::nand_address4_w )
441	441	{
442		logerror("nand_a4_w %08x (%08x)\n", data, cpu_get_pc(&space.device()));
	442	logerror("nand_a4_w %08x (%08x)\n", data, space.device().safe_pc());
443	443	nand_address = ( nand_address & 0xffffff00 ) | ( ( data & 0xff ) << 0 );
444	444	}
445	445

trunk/src/mame/drivers/mcr3.c

r17788	r17789
460	460	/* Unfortunately, the game refuses to start if any bad ROM is   */
461	461	/* found; to work around this, we catch the checksum byte read  */
462	462	/* and modify it to what we know we will be getting.            */
463		if (cpu_get_previouspc(&space.device()) == 0xb29)
	463	if (space.device().safe_pcbase() == 0xb29)
464	464	return 0x82;
465	465	else
466	466	return 0x92;

trunk/src/mame/drivers/stadhero.c

r17788	r17789
34	34	return ioport("DSW")->read();
35	35	}
36	36
37		logerror("CPU #0 PC %06x: warning - read unmapped memory address %06x\n",cpu_get_pc(&space.device()),0x30c000+offset);
	37	logerror("CPU #0 PC %06x: warning - read unmapped memory address %06x\n",space.device().safe_pc(),0x30c000+offset);
38	38	return ~0;
39	39	}
40	40
r17788	r17789
49	49	cputag_set_input_line(machine(), "audiocpu", INPUT_LINE_NMI, PULSE_LINE);
50	50	break;
51	51	default:
52		logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+offset);
	52	logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+offset);
53	53	break;
54	54	}
55	55	}

trunk/src/mame/drivers/viper.c

r17788	r17789
683	683	const char *regname = epic_get_register_name(reg);
684	684	if (regname)
685	685	{
686		printf("EPIC: read %08X (%s) at %08X\n", reg, regname, cpu_get_pc(&space.device()));
	686	printf("EPIC: read %08X (%s) at %08X\n", reg, regname, space.device().safe_pc());
687	687	}
688	688	else
689	689	{
690		printf("EPIC: read %08X at %08X\n", reg, cpu_get_pc(&space.device()));
	690	printf("EPIC: read %08X at %08X\n", reg, space.device().safe_pc());
691	691	}
692	692	}
693	693
r17788	r17789
868	868	const char *regname = epic_get_register_name(reg);
869	869	if (regname)
870	870	{
871		printf("EPIC: write %08X, %08X (%s) at %08X\n", data, reg, regname, cpu_get_pc(&space.device()));
	871	printf("EPIC: write %08X, %08X (%s) at %08X\n", data, reg, regname, space.device().safe_pc());
872	872	}
873	873	else
874	874	{
875		printf("EPIC: write %08X, %08X at %08X\n", data, reg, cpu_get_pc(&space.device()));
	875	printf("EPIC: write %08X, %08X at %08X\n", data, reg, space.device().safe_pc());
876	876	}
877	877	}
878	878
r17788	r17789
1448	1448	}
1449	1449
1450	1450	default:
1451		fatalerror("voodoo3_pci_r: %08X at %08X\n", reg, cpu_get_pc(device->machine().device("maincpu")));
	1451	fatalerror("voodoo3_pci_r: %08X at %08X\n", reg, device->machine().device("maincpu")->safe_pc());
1452	1452	}
1453	1453	return 0;
1454	1454	}
r17788	r17789
1518	1518	}
1519	1519
1520	1520	default:
1521		fatalerror("voodoo3_pci_w: %08X, %08X at %08X\n", data, reg, cpu_get_pc(device->machine().device("maincpu")));
	1521	fatalerror("voodoo3_pci_w: %08X, %08X at %08X\n", data, reg, device->machine().device("maincpu")->safe_pc());
1522	1522	}
1523	1523	}
1524	1524
r17788	r17789
1529	1529	}
1530	1530	WRITE64_MEMBER(viper_state::voodoo3_io_w)
1531	1531	{
1532		//  printf("voodoo3_io_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space.device()));
	1532	//  printf("voodoo3_io_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, space.device().safe_pc());
1533	1533
1534	1534	device_t *device = machine().device("voodoo");
1535	1535	write64be_with_32le_device_handler(banshee_io_w, device, offset, data, mem_mask);
r17788	r17789
1542	1542	}
1543	1543	WRITE64_MEMBER(viper_state::voodoo3_w)
1544	1544	{
1545		//  printf("voodoo3_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space.device()));
	1545	//  printf("voodoo3_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, space.device().safe_pc());
1546	1546
1547	1547	device_t *device = machine().device("voodoo");
1548	1548	write64be_with_32le_device_handler(banshee_w, device,  offset, data, mem_mask);
r17788	r17789
1555	1555	}
1556	1556	WRITE64_MEMBER(viper_state::voodoo3_lfb_w)
1557	1557	{
1558		//  printf("voodoo3_lfb_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, cpu_get_pc(&space.device()));
	1558	//  printf("voodoo3_lfb_w: %08X%08X, %08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data), offset, space.device().safe_pc());
1559	1559
1560	1560	device_t *device = machine().device("voodoo");
1561	1561	write64be_with_32le_device_handler(banshee_fb_w, device, offset, data, mem_mask);
r17788	r17789
1752	1752	ds2430_bit_timer->reset();
1753	1753	ds2430_bit_timer->start_time();
1754	1754
1755		//      printf("e70000_r: %08X (mask %08X%08X) at %08X\n", offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(cpu));
	1755	//      printf("e70000_r: %08X (mask %08X%08X) at %08X\n", offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu->safe_pc());
1756	1756	}
1757	1757
1758	1758	return 0;
r17788	r17789
1767	1767	ds2430_timer->adjust(attotime::from_usec(40), 1);   // presence pulse for 240 microsecs
1768	1768
1769	1769	unk1_bit = 1;
1770		//          printf("e70000_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(&space.device()));
	1770	//          printf("e70000_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, space.device().safe_pc());
1771	1771	}
1772	1772	else
1773	1773	{
r17788	r17789
1792	1792	{
1793	1793	if (ACCESSING_BITS_56_63)
1794	1794	{
1795		//  printf("unk1a_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(cpu));
	1795	//  printf("unk1a_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu->safe_pc());
1796	1796	}
1797	1797	}
1798	1798
r17788	r17789
1801	1801	if (ACCESSING_BITS_56_63)
1802	1802	{
1803	1803	unk1_bit = 0;
1804		//  printf("unk1b_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu_get_pc(cpu));
	1804	//  printf("unk1b_w: %08X%08X, %08X (mask %08X%08X) at %08X\n", (UINT32)(data >> 32), (UINT32)data, offset, (UINT32)(mem_mask >> 32), (UINT32)mem_mask, cpu->safe_pc());
1805	1805	}
1806	1806	}
1807	1807

trunk/src/mame/drivers/mw8080bw.c

r17788	r17789
2191	2191	m_spcenctr_trench_width = data;         /*  -  -  -  -  -  1  1  1 */
2192	2192
2193	2193	else
2194		logerror("%04x:  Unmapped I/O port write to %02x = %02x\n", cpu_get_pc(&space.device()), offset, data);
	2194	logerror("%04x:  Unmapped I/O port write to %02x = %02x\n", space.device().safe_pc(), offset, data);
2195	2195	}
2196	2196
2197	2197

trunk/src/mame/drivers/suna8.c

r17788	r17789
491	491	case 2:   return ioport("DSW1")->read();
492	492	case 3:   return ioport("DSW2")->read();
493	493	default:
494		logerror("CPU #0 - PC %04X: Unknown IP read: %02X\n", cpu_get_pc(&space.device()), *m_hardhead_ip);
	494	logerror("CPU #0 - PC %04X: Unknown IP read: %02X\n", space.device().safe_pc(), *m_hardhead_ip);
495	495	return 0xff;
496	496	}
497	497	}
r17788	r17789
505	505	{
506	506	int bank = data & 0x0f;
507	507
508		if (data & ~0xef)   logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(&space.device()),data);
	508	if (data & ~0xef)   logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",space.device().safe_pc(),data);
509	509	membank("bank1")->set_entry(bank);
510	510	}
511	511
r17788	r17789
561	561	int bank = data & 0x07;
562	562	if ((~data & 0x10) && (bank >= 4))   bank += 4;
563	563
564		if (data & ~0xf7)   logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",cpu_get_pc(&space.device()),data);
	564	if (data & ~0xf7)   logerror("CPU #0 - PC %04X: unknown bank bits: %02X\n",space.device().safe_pc(),data);
565	565
566	566	membank("bank1")->set_entry(bank);
567	567
r17788	r17789
653	653	{
654	654	m_palettebank = data & 0x01;
655	655
656		logerror("CPU #0 - PC %04X: palettebank = %02X\n",cpu_get_pc(&space.device()),data);
657		if (data & ~0x01)   logerror("CPU #0 - PC %04X: unknown palettebank bits: %02X\n",cpu_get_pc(&space.device()),data);
	656	logerror("CPU #0 - PC %04X: palettebank = %02X\n",space.device().safe_pc(),data);
	657	if (data & ~0x01)   logerror("CPU #0 - PC %04X: unknown palettebank bits: %02X\n",space.device().safe_pc(),data);
658	658	}
659	659	else if ((m_protection_val & 0xfc) == 0x90)
660	660	{
661	661	soundlatch_byte_w(space, 0, data);
662	662
663		logerror("CPU #0 - PC %04X: soundlatch = %02X\n",cpu_get_pc(&space.device()),data);
	663	logerror("CPU #0 - PC %04X: soundlatch = %02X\n",space.device().safe_pc(),data);
664	664	}
665	665	else if ((m_protection_val & 0xfc) == 0x04)
666	666	{
r17788	r17789
668	668	set_led_status(machine(), 1, data & 0x02);
669	669	coin_counter_w(machine(), 0, data & 0x04);
670	670
671		logerror("CPU #0 - PC %04X: leds = %02X\n",cpu_get_pc(&space.device()),data);
672		if (data & ~0x07)   logerror("CPU #0 - PC %04X: unknown leds bits: %02X\n",cpu_get_pc(&space.device()),data);
	671	logerror("CPU #0 - PC %04X: leds = %02X\n",space.device().safe_pc(),data);
	672	if (data & ~0x07)   logerror("CPU #0 - PC %04X: unknown leds bits: %02X\n",space.device().safe_pc(),data);
673	673	}
674	674	else if ((m_protection_val & 0xfc) == 0x9c)
675	675	{
r17788	r17789
678	678
679	679	// To be done: run-time opcode decryption change. Done in driver_init for now.
680	680
681		logerror("CPU #0 - PC %04X: op-decrypt = %02X\n",cpu_get_pc(&space.device()),data);
	681	logerror("CPU #0 - PC %04X: op-decrypt = %02X\n",space.device().safe_pc(),data);
682	682	}
683	683	else if ((m_protection_val & 0xfc) == 0x80)
684	684	{
685	685	// disables rom banking?
686	686	// see code at 11b1:
687	687
688		logerror("CPU #0 - PC %04X: rombank_disable = %02X\n",cpu_get_pc(&space.device()),data);
	688	logerror("CPU #0 - PC %04X: rombank_disable = %02X\n",space.device().safe_pc(),data);
689	689	}
690	690	else
691	691	{
692		logerror("CPU #0 - PC %04X: ignore = %02X\n",cpu_get_pc(&space.device()),data);
	692	logerror("CPU #0 - PC %04X: ignore = %02X\n",space.device().safe_pc(),data);
693	693	}
694	694	}
695	695
r17788	r17789
705	705	flip_screen_set(data & 0x01);
706	706	m_spritebank = (data >> 1) & 1;
707	707
708		logerror("CPU #0 - PC %04X: protection_val = %02X\n",cpu_get_pc(&space.device()),data);
709		//   if (data & ~0x03)   logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(&space.device()),data);
	708	logerror("CPU #0 - PC %04X: protection_val = %02X\n",space.device().safe_pc(),data);
	709	//   if (data & ~0x03)   logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",space.device().safe_pc(),data);
710	710	}
711	711
712	712	/*
r17788	r17789
726	726	m_prot2_prev = m_prot2;
727	727	m_prot2 = data;
728	728
729		logerror("CPU #0 - PC %04X: unknown = %02X\n",cpu_get_pc(&space.device()),data);
	729	logerror("CPU #0 - PC %04X: unknown = %02X\n",space.device().safe_pc(),data);
730	730	}
731	731
732	732	/*
r17788	r17789
737	737	{
738	738	int bank = data & 0x0f;
739	739
740		if (data & ~0x0f)   logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(&space.device()),data);
	740	if (data & ~0x0f)   logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",space.device().safe_pc(),data);
741	741
742	742	membank("bank1")->set_entry(bank + (membank("bank1")->entry() & 0x10));
743	743
r17788	r17789
796	796	WRITE8_MEMBER(suna8_state::hardhea2_nmi_w)
797	797	{
798	798	m_nmi_enable = data & 0x01;
799		//  if (data & ~0x01)   logerror("CPU #0 - PC %04X: unknown nmi bits: %02X\n",cpu_get_pc(&space.device()),data);
	799	//  if (data & ~0x01)   logerror("CPU #0 - PC %04X: unknown nmi bits: %02X\n",space.device().safe_pc(),data);
800	800	}
801	801
802	802	/*
r17788	r17789
806	806	WRITE8_MEMBER(suna8_state::hardhea2_flipscreen_w)
807	807	{
808	808	flip_screen_set(data & 0x01);
809		if (data & ~0x01)   logerror("CPU #0 - PC %04X: unknown flipscreen bits: %02X\n",cpu_get_pc(&space.device()),data);
	809	if (data & ~0x01)   logerror("CPU #0 - PC %04X: unknown flipscreen bits: %02X\n",space.device().safe_pc(),data);
810	810	}
811	811
812	812	WRITE8_MEMBER(suna8_state::hardhea2_leds_w)
r17788	r17789
814	814	set_led_status(machine(), 0, data & 0x01);
815	815	set_led_status(machine(), 1, data & 0x02);
816	816	coin_counter_w(machine(), 0, data & 0x04);
817		if (data & ~0x07)   logerror("CPU#0  - PC %06X: unknown leds bits: %02X\n",cpu_get_pc(&space.device()),data);
	817	if (data & ~0x07)   logerror("CPU#0  - PC %06X: unknown leds bits: %02X\n",space.device().safe_pc(),data);
818	818	}
819	819
820	820	/*
r17788	r17789
825	825	WRITE8_MEMBER(suna8_state::hardhea2_spritebank_w)
826	826	{
827	827	m_spritebank = (data >> 1) & 1;
828		if (data & ~0x02)   logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(&space.device()),data);
	828	if (data & ~0x02)   logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",space.device().safe_pc(),data);
829	829	}
830	830
831	831	/*
r17788	r17789
836	836	{
837	837	int bank = data & 0x0f;
838	838
839		if (data & ~0x0f)   logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(&space.device()),data);
	839	if (data & ~0x0f)   logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",space.device().safe_pc(),data);
840	840
841	841	membank("bank1")->set_entry(bank);
842	842
r17788	r17789
911	911	WRITE8_MEMBER(suna8_state::starfigh_spritebank_latch_w)
912	912	{
913	913	m_spritebank_latch = (data >> 2) & 1;
914		if (data & ~0x04)   logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(&space.device()),data);
	914	if (data & ~0x04)   logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",space.device().safe_pc(),data);
915	915	}
916	916
917	917	WRITE8_MEMBER(suna8_state::starfigh_spritebank_w)
r17788	r17789
973	973	case 0x81: m_trash_prot = 1; break;
974	974	case 0x99: m_trash_prot = 1; break;
975	975	case 0x54: m_spritebank = 1; break;
976		default: logerror("CPU #0 - PC %04X: unknown protection command: %02X\n",cpu_get_pc(&space.device()),data);
	976	default: logerror("CPU #0 - PC %04X: unknown protection command: %02X\n",space.device().safe_pc(),data);
977	977	}
978	978	}
979	979
r17788	r17789
990	990	WRITE8_MEMBER(suna8_state::sparkman_flipscreen_w)
991	991	{
992	992	flip_screen_set(data & 0x01);
993		//if (data & ~0x01)     logerror("CPU #0 - PC %04X: unknown flipscreen bits: %02X\n",cpu_get_pc(&space.device()),data);
	993	//if (data & ~0x01)     logerror("CPU #0 - PC %04X: unknown flipscreen bits: %02X\n",space.device().safe_pc(),data);
994	994	}
995	995
996	996	WRITE8_MEMBER(suna8_state::sparkman_leds_w)
997	997	{
998	998	set_led_status(machine(), 0, data & 0x01);
999	999	set_led_status(machine(), 1, data & 0x02);
1000		//if (data & ~0x03) logerror("CPU#0  - PC %06X: unknown leds bits: %02X\n",cpu_get_pc(&space.device()),data);
	1000	//if (data & ~0x03) logerror("CPU#0  - PC %06X: unknown leds bits: %02X\n",space.device().safe_pc(),data);
1001	1001	}
1002	1002
1003	1003	WRITE8_MEMBER(suna8_state::sparkman_coin_counter_w)
r17788	r17789
1016	1016	m_spritebank = 0;
1017	1017	else
1018	1018	m_spritebank = (data) & 1;
1019		//if (data & ~0x02)     logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",cpu_get_pc(&space.device()),data);
	1019	//if (data & ~0x02)     logerror("CPU #0 - PC %04X: unknown spritebank bits: %02X\n",space.device().safe_pc(),data);
1020	1020	}
1021	1021
1022	1022	/*
r17788	r17789
1027	1027	{
1028	1028	int bank = data & 0x0f;
1029	1029
1030		//if (data & ~0x0f)     logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",cpu_get_pc(&space.device()),data);
	1030	//if (data & ~0x0f)     logerror("CPU #0 - PC %04X: unknown rom bank bits: %02X\n",space.device().safe_pc(),data);
1031	1031
1032	1032	membank("bank1")->set_entry(bank);
1033	1033	m_rombank = data;

trunk/src/mame/drivers/btime.c

r17788	r17789
211	211	/* xxxx xxx1 xxxx x1xx are encrypted. */
212	212
213	213	/* get the address of the next opcode */
214		addr = cpu_get_pc(&space->device());
	214	addr = space->device().safe_pc();
215	215
216	216	/* however if the previous instruction was JSR (which caused a write to */
217	217	/* the stack), fetch the address of the next instruction. */
218		addr1 = cpu_get_previouspc(&space->device());
	218	addr1 = space->device().safe_pcbase();
219	219	src1 = (addr1 < 0x9000) ? state->m_rambase : state->memregion("maincpu")->base();
220	220	if (decrypted[addr1] == 0x20)   /* JSR $xxxx */
221	221	addr = src1[addr1 + 1] + 256 * src1[addr1 + 2];
r17788	r17789
240	240	else if (offset == 0x9000)                     { return; }  /* AM_NOP */
241	241	else if (offset == 0x9002)                     { audio_command_w(space, 0, data); return; }
242	242	else if (offset >= 0xb000 && offset <= 0xb1ff)   ;
243		else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
	243	else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
244	244
245	245	m_rambase[offset] = data;
246	246
r17788	r17789
258	258	else if (offset == 0x9000)                     { return; }  /* AM_NOP */
259	259	else if (offset == 0x9002)                     { audio_command_w(space, 0, data); return; }
260	260	else if (offset >= 0xb000 && offset <= 0xbfff) { mmonkey_protection_w(space, offset - 0xb000, data); return; }
261		else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
	261	else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
262	262
263	263	m_rambase[offset] = data;
264	264
r17788	r17789
276	276	else if (offset == 0x4002)                     btime_video_control_w(space, 0, data);
277	277	else if (offset == 0x4003)                     audio_command_w(space, 0, data);
278	278	else if (offset == 0x4004)                     bnj_scroll1_w(space, 0, data);
279		else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
	279	else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
280	280
281	281	m_rambase[offset] = data;
282	282
r17788	r17789
295	295	else if (offset == 0x4004)                     bnj_scroll1_w(space, 0, data);
296	296	else if (offset == 0x4005)              bnj_scroll2_w(space, 0, data);
297	297	//  else if (offset == 0x8000)                     btime_video_control_w(space,0,data);
298		else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
	298	else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
299	299
300	300	m_rambase[offset] = data;
301	301
r17788	r17789
313	313	else if (offset == 0x9804)                     bnj_scroll2_w(space, 0, data);
314	314	else if (offset == 0x9805)                     bnj_scroll1_w(space, 0, data);
315	315	else if (offset == 0x9806)                     audio_command_w(space, 0, data);
316		else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
	316	else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
317	317
318	318	m_rambase[offset] = data;
319	319
r17788	r17789
327	327	else if (offset >= 0x8000 && offset <= 0x881f) ;
328	328	else if (offset == 0x9a00)                     audio_command_w(space, 0, data);
329	329	else if (offset == 0x9c00)                     disco_video_control_w(space, 0, data);
330		else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), cpu_get_pc(&space.device()), data, offset);
	330	else logerror("CPU '%s' PC %04x: warning - write %02x to unmapped memory address %04x\n", space.device().tag(), space.device().safe_pc(), data, offset);
331	331
332	332	m_rambase[offset] = data;
333	333

trunk/src/mame/drivers/gaelco3d.c

r17788	r17789
273	273	else if (ACCESSING_BITS_0_7)
274	274	gaelco_serial_tr_w(machine().device("serial"), 0, data & 0x01);
275	275	else
276		logerror("%06X:irq_ack_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	276	logerror("%06X:irq_ack_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
277	277	}
278	278
279	279
r17788	r17789
313	313	{
314	314	UINT8 data = gaelco_serial_data_r(machine().device("serial"),0);
315	315	if (LOG)
316		logerror("%06X:read(%02X) = %08X & %08X\n", cpu_get_pc(machine().device("maincpu")), offset, data, mem_mask);
	316	logerror("%06X:read(%02X) = %08X & %08X\n", machine().device("maincpu")->safe_pc(), offset, data, mem_mask);
317	317	return  data | 0xffffff00;
318	318	}
319	319	else
320		logerror("%06X:read(%02X) = mask %08X\n", cpu_get_pc(machine().device("maincpu")), offset, mem_mask);
	320	logerror("%06X:read(%02X) = mask %08X\n", machine().device("maincpu")->safe_pc(), offset, mem_mask);
321	321
322	322	return 0xffffffff;
323	323	}
r17788	r17789
378	378	WRITE16_MEMBER(gaelco3d_state::sound_data_w)
379	379	{
380	380	if (LOG)
381		logerror("%06X:sound_data_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	381	logerror("%06X:sound_data_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
382	382	if (ACCESSING_BITS_0_7)
383	383	machine().scheduler().synchronize(FUNC(delayed_sound_w), data & 0xff);
384	384	}
r17788	r17789
396	396	READ16_MEMBER(gaelco3d_state::sound_status_r)
397	397	{
398	398	if (LOG)
399		logerror("%06X:sound_status_r(%02X) = %02X\n", cpu_get_pc(&space.device()), offset, m_sound_status);
	399	logerror("%06X:sound_status_r(%02X) = %02X\n", space.device().safe_pc(), offset, m_sound_status);
400	400	if (ACCESSING_BITS_0_7)
401	401	return m_sound_status;
402	402	return 0xffff;
r17788	r17789
441	441	else
442	442	{
443	443	if (LOG)
444		logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	444	logerror("%06X:analog_port_clock_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
445	445	}
446	446	}
447	447
r17788	r17789
462	462	else
463	463	{
464	464	if (LOG)
465		logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	465	logerror("%06X:analog_port_latch_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
466	466	}
467	467
468	468	}
r17788	r17789
477	477
478	478	READ32_MEMBER(gaelco3d_state::tms_m68k_ram_r)
479	479	{
480		//  logerror("%06X:tms_m68k_ram_r(%04X) = %08X\n", cpu_get_pc(&space.device()), offset, !(offset & 1) ? ((INT32)m_m68k_ram_base[offset/2] >> 16) : (int)(INT16)m_m68k_ram_base[offset/2]);
	480	//  logerror("%06X:tms_m68k_ram_r(%04X) = %08X\n", space.device().safe_pc(), offset, !(offset & 1) ? ((INT32)m_m68k_ram_base[offset/2] >> 16) : (int)(INT16)m_m68k_ram_base[offset/2]);
481	481	return (INT32)(INT16)m_m68k_ram_base[offset ^ m_tms_offset_xor];
482	482	}
483	483
r17788	r17789
508	508	/* this is set to 0 while data is uploaded, then set to $ffff after it is done */
509	509	/* it does not ever appear to be touched after that */
510	510	if (LOG)
511		logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	511	logerror("%06X:tms_reset_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
512	512	cputag_set_input_line(machine(), "tms", INPUT_LINE_RESET, (data == 0xffff) ? CLEAR_LINE : ASSERT_LINE);
513	513	}
514	514
r17788	r17789
518	518	/* this is written twice, 0,1, in quick succession */
519	519	/* done after uploading, and after modifying the comm area */
520	520	if (LOG)
521		logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	521	logerror("%06X:tms_irq_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
522	522	if (ACCESSING_BITS_0_7)
523	523	cputag_set_input_line(machine(), "tms", 0, (data & 0x01) ? CLEAR_LINE : ASSERT_LINE);
524	524	}
r17788	r17789
527	527	WRITE16_MEMBER(gaelco3d_state::tms_control3_w)
528	528	{
529	529	if (LOG)
530		logerror("%06X:tms_control3_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	530	logerror("%06X:tms_control3_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
531	531	}
532	532
533	533
r17788	r17789
535	535	{
536	536	COMBINE_DATA(&m_tms_comm_base[offset ^ m_tms_offset_xor]);
537	537	if (LOG)
538		logerror("%06X:tms_comm_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset*2, data, mem_mask);
	538	logerror("%06X:tms_comm_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset*2, data, mem_mask);
539	539	}
540	540
541	541
r17788	r17789
739	739	{
740	740	/* arbitrary data written */
741	741	if (ACCESSING_BITS_0_7)
742		logerror("%06X:unknown_127_w = %02X\n", cpu_get_pc(&space.device()), data & 0xff);
	742	logerror("%06X:unknown_127_w = %02X\n", space.device().safe_pc(), data & 0xff);
743	743	else
744		logerror("%06X:unknown_127_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	744	logerror("%06X:unknown_127_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
745	745	}
746	746
747	747	WRITE32_MEMBER(gaelco3d_state::unknown_137_w)
748	748	{
749	749	/* only written $00 or $ff */
750	750	if (ACCESSING_BITS_0_7)
751		logerror("%06X:unknown_137_w = %02X\n", cpu_get_pc(&space.device()), data & 0xff);
	751	logerror("%06X:unknown_137_w = %02X\n", space.device().safe_pc(), data & 0xff);
752	752	else
753		logerror("%06X:unknown_137_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	753	logerror("%06X:unknown_137_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
754	754	}
755	755
756	756	WRITE32_MEMBER(gaelco3d_state::unknown_13a_w)
757	757	{
758	758	/* only written $0000 or $0001 */
759	759	if (ACCESSING_BITS_0_15)
760		logerror("%06X:unknown_13a_w = %04X\n", cpu_get_pc(&space.device()), data & 0xffff);
	760	logerror("%06X:unknown_13a_w = %04X\n", space.device().safe_pc(), data & 0xffff);
761	761	else
762		logerror("%06X:unknown_13a_w(%02X) = %08X & %08X\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	762	logerror("%06X:unknown_13a_w(%02X) = %08X & %08X\n", space.device().safe_pc(), offset, data, mem_mask);
763	763	}
764	764
765	765

trunk/src/mame/drivers/namconb1.c

r17788	r17789
741	741	break; /* no protection? */
742	742	}
743	743
744		logerror( "custom_key_r(%d); pc=%08x\n", offset, cpu_get_pc(&space.device()) );
	744	logerror( "custom_key_r(%d); pc=%08x\n", offset, space.device().safe_pc() );
745	745	return 0;
746	746	} /* custom_key_r */
747	747

trunk/src/mame/drivers/strnskil.c

r17788	r17789
38	38	{
39	39	int res;
40	40
41		switch (cpu_get_pc(&space.device()))
	41	switch (space.device().safe_pc())
42	42	{
43	43	case 0x6066:   res = 0xa5;   break;
44	44	case 0x60dc:   res = 0x20;   break;   /* bits 0-3 unknown */
r17788	r17789
49	49	default:      res = 0xff; break;
50	50	}
51	51
52		logerror("%04x: protection_r -> %02x\n",cpu_get_pc(&space.device()),res);
	52	logerror("%04x: protection_r -> %02x\n",space.device().safe_pc(),res);
53	53	return res;
54	54	}
55	55
r17788	r17789
57	57	{
58	58	int res;
59	59
60		switch (cpu_get_pc(&space.device()))
	60	switch (space.device().safe_pc())
61	61	{
62	62	case 0x6094:   res = 0xa5;   break;
63	63	case 0x6118:   res = 0x20;   break;   /* bits 0-3 unknown */
r17788	r17789
68	68	default:      res = 0xff; break;
69	69	}
70	70
71		logerror("%04x: protection_r -> %02x\n",cpu_get_pc(&space.device()),res);
	71	logerror("%04x: protection_r -> %02x\n",space.device().safe_pc(),res);
72	72	return res;
73	73	}
74	74
75	75	WRITE8_MEMBER(strnskil_state::protection_w)
76	76	{
77		logerror("%04x: protection_w %02x\n",cpu_get_pc(&space.device()),data);
	77	logerror("%04x: protection_w %02x\n",space.device().safe_pc(),data);
78	78	}
79	79
80	80	/****************************************************************************/

trunk/src/mame/drivers/model2.c

r17788	r17789
119	119	if (state->m_dsp_type == DSP_TYPE_TGP)
120	120	return 0;
121	121
122		fatalerror("Copro FIFOIN underflow (at %08X)\n", cpu_get_pc(device));
	122	fatalerror("Copro FIFOIN underflow (at %08X)\n", device->safe_pc());
123	123	return 0;
124	124	}
125	125
r17788	r17789
153	153	model2_state *state = device->machine().driver_data<model2_state>();
154	154	if (state->m_copro_fifoin_num == COPRO_FIFOIN_SIZE)
155	155	{
156		fatalerror("Copro FIFOIN overflow (at %08X)\n", cpu_get_pc(device));
	156	fatalerror("Copro FIFOIN overflow (at %08X)\n", device->safe_pc());
157	157	return;
158	158	}
159	159
160		//mame_printf_debug("COPRO FIFOIN at %08X, %08X, %f\n", cpu_get_pc(device), data, *(float*)&data);
	160	//mame_printf_debug("COPRO FIFOIN at %08X, %08X, %f\n", device->safe_pc(), data, *(float*)&data);
161	161
162	162	state->m_copro_fifoin_data[state->m_copro_fifoin_wpos++] = data;
163	163	if (state->m_copro_fifoin_wpos == COPRO_FIFOIN_SIZE)
r17788	r17789
225	225	//if (state->m_copro_fifoout_wpos == state->m_copro_fifoout_rpos)
226	226	if (state->m_copro_fifoout_num == COPRO_FIFOOUT_SIZE)
227	227	{
228		fatalerror("Copro FIFOOUT overflow (at %08X)\n", cpu_get_pc(device));
	228	fatalerror("Copro FIFOOUT overflow (at %08X)\n", device->safe_pc());
229	229	return;
230	230	}
231	231
r17788	r17789
666	666	}
667	667	else
668	668	{
669		//mame_printf_debug("copro_fifo_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	669	//mame_printf_debug("copro_fifo_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
670	670	if (m_dsp_type == DSP_TYPE_SHARC)
671	671	copro_fifoin_push(machine().device("dsp"), data);
672	672	else
r17788	r17789
777	777	}
778	778	else
779	779	{
780		//mame_printf_debug("copro_fifo_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	780	//mame_printf_debug("copro_fifo_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
781	781	}
782	782	}
783	783
r17788	r17789
843	843	}
844	844
845	845	//  fatalerror("geo_r: %08X, %08X\n", address, mem_mask);
846		mame_printf_debug("geo_r: PC:%08x - %08X\n", cpu_get_pc(&space.device()), address);
	846	mame_printf_debug("geo_r: PC:%08x - %08X\n", space.device().safe_pc(), address);
847	847
848	848	return 0;
849	849	}
r17788	r17789
1074	1074	else
1075	1075	return 0xfff0;
1076	1076	}
1077		else logerror("Unhandled Protection READ @ %x mask %x (PC=%x)\n", offset, mem_mask, cpu_get_pc(&space.device()));
	1077	else logerror("Unhandled Protection READ @ %x mask %x (PC=%x)\n", offset, mem_mask, space.device().safe_pc());
1078	1078
1079	1079	return retval;
1080	1080	}
r17788	r17789
1144	1144	strcpy((char *)m_protram, "  TECMO LTD.  DEAD OR ALIVE  1996.10.22  VER. 1.00");
1145	1145	}
1146	1146	}
1147		else logerror("Unhandled Protection WRITE %x @ %x mask %x (PC=%x)\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	1147	else logerror("Unhandled Protection WRITE %x @ %x mask %x (PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
1148	1148
1149	1149	}
1150	1150
r17788	r17789
1905	1905	READ32_MEMBER(model2_state::copro_sharc_input_fifo_r)
1906	1906	{
1907	1907	UINT32 result = 0;
1908		//mame_printf_debug("SHARC FIFOIN pop at %08X\n", cpu_get_pc(&space.device()));
	1908	//mame_printf_debug("SHARC FIFOIN pop at %08X\n", space.device().safe_pc());
1909	1909
1910	1910	copro_fifoin_pop(machine().device("dsp"), &result);
1911	1911	return result;
r17788	r17789
1924	1924
1925	1925	WRITE32_MEMBER(model2_state::copro_sharc_buffer_w)
1926	1926	{
1927		//mame_printf_debug("sharc_buffer_w: %08X at %08X, %08X, %f\n", offset, cpu_get_pc(&space.device()), data, *(float*)&data);
	1927	//mame_printf_debug("sharc_buffer_w: %08X at %08X, %08X, %f\n", offset, space.device().safe_pc(), data, *(float*)&data);
1928	1928	m_bufferram[offset & 0x7fff] = data;
1929	1929	}
1930	1930

trunk/src/mame/drivers/sshangha.c

r17788	r17789
64	64	{
65	65	COMBINE_DATA(&m_prot_data[offset]);
66	66
67		logerror("CPU #0 PC %06x: warning - write unmapped control address %06x %04x\n",cpu_get_pc(&space.device()),offset<<1,data);
	67	logerror("CPU #0 PC %06x: warning - write unmapped control address %06x %04x\n",space.device().safe_pc(),offset<<1,data);
68	68	}
69	69
70	70	/* Protection/IO chip 146 */
r17788	r17789
82	82	// Protection TODO
83	83	}
84	84
85		logerror("CPU #0 PC %06x: warning - read unmapped control address %06x\n",cpu_get_pc(&space.device()),offset<<1);
	85	logerror("CPU #0 PC %06x: warning - read unmapped control address %06x\n",space.device().safe_pc(),offset<<1);
86	86	return m_prot_data[offset];
87	87	}
88	88

trunk/src/mame/drivers/monzagp.c

r17788	r17789
179	179
180	180	WRITE8_MEMBER(monzagp_state::port0_w)
181	181	{
182		//  printf("P0 %x = %x\n",cpu_get_pc(&space.device()),data);
	182	//  printf("P0 %x = %x\n",space.device().safe_pc(),data);
183	183	}
184	184
185	185	WRITE8_MEMBER(monzagp_state::port1_w)
186	186	{
187		//  printf("P1 %x = %x\n",cpu_get_pc(&space.device()),data);
	187	//  printf("P1 %x = %x\n",space.device().safe_pc(),data);
188	188	}
189	189
190	190	WRITE8_MEMBER(monzagp_state::port2_w)
191	191	{
192		//  printf("P2 %x = %x\n",cpu_get_pc(&space.device()),data);
	192	//  printf("P2 %x = %x\n",space.device().safe_pc(),data);
193	193	m_coordy=data;
194	194	}
195	195

trunk/src/mame/drivers/scramble.c

r17788	r17789
322	322
323	323	READ8_MEMBER(scramble_state::hncholms_prot_r)
324	324	{
325		if(cpu_get_pc(&space.device()) == 0x2b || cpu_get_pc(&space.device()) == 0xa27)
	325	if(space.device().safe_pc() == 0x2b || space.device().safe_pc() == 0xa27)
326	326	return 1;
327	327	else
328	328	return 0;

trunk/src/mame/drivers/mole.c

r17788	r17789
165	165	{
166	166	case 0x08: return 0xb0; /* random mole placement */
167	167	case 0x26:
168		if (cpu_get_pc(&space.device()) == 0x53d7)
	168	if (space.device().safe_pc() == 0x53d7)
169	169	{
170	170	return 0x06; /* bonus round */
171	171	}

trunk/src/mame/drivers/tehkanwc.c

r17788	r17789
155	155
156	156	/* in Gridiron, the sound CPU goes in a tight loop after the self test, */
157	157	/* probably waiting to be reset by a watchdog */
158		if (cpu_get_pc(&space.device()) == 0x08bc) machine().scheduler().timer_set(attotime::from_seconds(1), FUNC(reset_callback));
	158	if (space.device().safe_pc() == 0x08bc) machine().scheduler().timer_set(attotime::from_seconds(1), FUNC(reset_callback));
159	159	}
160	160
161	161

trunk/src/mame/drivers/bionicc.c

r17788	r17789
73	73	WRITE16_MEMBER(bionicc_state::hacked_controls_w)
74	74	{
75	75
76		logerror("%06x: hacked_controls_w %04x %02x\n", cpu_get_pc(&space.device()), offset, data);
	76	logerror("%06x: hacked_controls_w %04x %02x\n", space.device().safe_pc(), offset, data);
77	77	COMBINE_DATA(&m_inp[offset]);
78	78	}
79	79
80	80	READ16_MEMBER(bionicc_state::hacked_controls_r)
81	81	{
82	82
83		logerror("%06x: hacked_controls_r %04x %04x\n", cpu_get_pc(&space.device()), offset, m_inp[offset]);
	83	logerror("%06x: hacked_controls_r %04x %04x\n", space.device().safe_pc(), offset, m_inp[offset]);
84	84	return m_inp[offset];
85	85	}
86	86

trunk/src/mame/drivers/playmark.c

r17788	r17789
135	135	if ((m_oki_control & 0x38) == 0x30)
136	136	{
137	137	data = m_snd_command;
138		// logerror("PC$%03x PortB reading %02x from the 68K\n", cpu_get_previouspc(&space.device()), data);
	138	// logerror("PC$%03x PortB reading %02x from the 68K\n", space.device().safe_pcbase(), data);
139	139	}
140	140	else if ((m_oki_control & 0x38) == 0x28)
141	141	{
142	142	data = (m_oki->read(space, 0) & 0x0f);
143		// logerror("PC$%03x PortB reading %02x from the OKI status port\n", cpu_get_previouspc(&space.device()), data);
	143	// logerror("PC$%03x PortB reading %02x from the OKI status port\n", space.device().safe_pcbase(), data);
144	144	}
145	145
146	146	return data;
r17788	r17789
200	200
201	201	if ((data & 0x38) == 0x18)
202	202	{
203		// logerror("PC$%03x Writing %02x to OKI1, PortC=%02x, Code=%02x\n",cpu_get_previouspc(&space.device()),playmark_oki_command,playmark_oki_control,playmark_snd_command);
	203	// logerror("PC$%03x Writing %02x to OKI1, PortC=%02x, Code=%02x\n",space.device().safe_pcbase(),playmark_oki_command,playmark_oki_control,playmark_snd_command);
204	204	okim6295_device *oki = machine().device<okim6295_device>("oki");
205	205	oki->write(space, 0, m_oki_command);
206	206	}

trunk/src/mame/drivers/pgm.c

r17788	r17789
224	224
225	225	WRITE16_MEMBER(pgm_state::z80_ram_w)
226	226	{
227		int pc = cpu_get_pc(&space.device());
	227	int pc = space.device().safe_pc();
228	228
229	229	if (ACCESSING_BITS_8_15)
230	230	m_z80_mainram[offset * 2] = data >> 8;
r17788	r17789
233	233
234	234	if (pc != 0xf12 && pc != 0xde2 && pc != 0x100c50 && pc != 0x100b20)
235	235	if (PGMLOGERROR)
236		logerror("Z80: write %04x, %04x @ %04x (%06x)\n", offset * 2, data, mem_mask, cpu_get_pc(&space.device()));
	236	logerror("Z80: write %04x, %04x @ %04x (%06x)\n", offset * 2, data, mem_mask, space.device().safe_pc());
237	237	}
238	238
239	239	WRITE16_MEMBER(pgm_state::z80_reset_w)
240	240	{
241	241
242	242	if (PGMLOGERROR)
243		logerror("Z80: reset %04x @ %04x (%06x)\n", data, mem_mask, cpu_get_pc(&space.device()));
	243	logerror("Z80: reset %04x @ %04x (%06x)\n", data, mem_mask, space.device().safe_pc());
244	244
245	245	if (data == 0x5050)
246	246	{
r17788	r17789
266	266	WRITE16_MEMBER(pgm_state::z80_ctrl_w)
267	267	{
268	268	if (PGMLOGERROR)
269		logerror("Z80: ctrl %04x @ %04x (%06x)\n", data, mem_mask, cpu_get_pc(&space.device()));
	269	logerror("Z80: ctrl %04x @ %04x (%06x)\n", data, mem_mask, space.device().safe_pc());
270	270	}
271	271
272	272	WRITE16_MEMBER(pgm_state::m68k_l1_w)
r17788	r17789
275	275	if(ACCESSING_BITS_0_7)
276	276	{
277	277	if (PGMLOGERROR)
278		logerror("SL 1 m68.w %02x (%06x) IRQ\n", data & 0xff, cpu_get_pc(&space.device()));
	278	logerror("SL 1 m68.w %02x (%06x) IRQ\n", data & 0xff, space.device().safe_pc());
279	279	soundlatch_byte_w(space, 0, data);
280	280	device_set_input_line(m_soundcpu, INPUT_LINE_NMI, PULSE_LINE );
281	281	}
r17788	r17789
284	284	WRITE8_MEMBER(pgm_state::z80_l3_w)
285	285	{
286	286	if (PGMLOGERROR)
287		logerror("SL 3 z80.w %02x (%04x)\n", data, cpu_get_pc(&space.device()));
	287	logerror("SL 3 z80.w %02x (%04x)\n", data, space.device().safe_pc());
288	288	soundlatch3_byte_w(space, 0, data);
289	289	}
290	290

trunk/src/mame/drivers/namcos21.c

r17788	r17789
342	342	UINT16 result = 0;
343	343	if( m_gametype == NAMCOS21_SOLVALOU )
344	344	{
345		switch( cpu_get_pc(&space.device()) )
	345	switch( space.device().safe_pc() )
346	346	{
347	347	case 0x805e: result = 0x0000; break;
348	348	case 0x805f: result = 0xfeba; break;
349	349	case 0x8067: result = 0xffff; break;
350	350	case 0x806e: result = 0x0145; break;
351	351	default:
352		logerror( "unk cuskey_r; pc=0x%x\n", cpu_get_pc(&space.device()) );
	352	logerror( "unk cuskey_r; pc=0x%x\n", space.device().safe_pc() );
353	353	break;
354	354	}
355	355	}
356	356	else if( m_gametype == NAMCOS21_CYBERSLED )
357	357	{
358		switch( cpu_get_pc(&space.device()) )
	358	switch( space.device().safe_pc() )
359	359	{
360	360	case 0x8061: result = 0xfe95; break;
361	361	case 0x8069: result = 0xffff; break;
r17788	r17789
366	366	}
367	367	else if( m_gametype == NAMCOS21_AIRCOMBAT )
368	368	{
369		switch( cpu_get_pc(&space.device()) )
	369	switch( space.device().safe_pc() )
370	370	{
371	371	case 0x8062: result = 0xfeb9; break;
372	372	case 0x806a: result = 0xffff; break;
r17788	r17789
880	880
881	881	WRITE16_MEMBER(namcos21_state::slave_XF_output_w)
882	882	{
883		if (ENABLE_LOGGING) logerror( "0x%x:slaveXF(%d)\n", cpu_get_pc(&space.device()), data );
	883	if (ENABLE_LOGGING) logerror( "0x%x:slaveXF(%d)\n", space.device().safe_pc(), data );
884	884	} /* slave_XF_output_w */
885	885
886	886	READ16_MEMBER(namcos21_state::slave_portf_r)
r17788	r17789
935	935	#if 0
936	936	logerror( "dsp_control_w:'%s':%x[%x]:=%04x ",
937	937	cpu->tag,
938		cpu_get_pc(cpu),
	938	cpu->safe_pc(),
939	939	offset,
940	940	m_pointram_control );
941	941
r17788	r17789
1120	1120
1121	1121	READ16_MEMBER(namcos21_state::winrun_cuskey_r)
1122	1122	{
1123		int pc = cpu_get_pc(&space.device());
	1123	int pc = space.device().safe_pc();
1124	1124	switch( pc )
1125	1125	{
1126	1126	case 0x0064: /* winrun91 */

trunk/src/mame/drivers/darius.c

r17788	r17789
158	158
159	159	parse_control(machine());
160	160
161		logerror("CPU #0 PC %06x: write %04x to cpu control\n", cpu_get_pc(&space.device()), data);
	161	logerror("CPU #0 PC %06x: write %04x to cpu control\n", space.device().safe_pc(), data);
162	162	}
163	163
164	164	WRITE16_MEMBER(darius_state::darius_watchdog_w)
r17788	r17789
195	195	return ioport("DSW")->read();
196	196	}
197	197
198		logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",cpu_get_pc(&space.device()),offset);
	198	logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",space.device().safe_pc(),offset);
199	199
200	200	return 0xff;
201	201	}
r17788	r17789
231	231	return;
232	232	}
233	233
234		logerror("CPU #0 PC %06x: warning - write unmapped ioc offset %06x with %04x\n",cpu_get_pc(&space.device()),offset,data);
	234	logerror("CPU #0 PC %06x: warning - write unmapped ioc offset %06x with %04x\n",space.device().safe_pc(),offset,data);
235	235	}
236	236
237	237
r17788	r17789
516	516	READ8_MEMBER(darius_state::adpcm_command_read)
517	517	{
518	518
519		/* logerror("read port 0: %02x  PC=%4x\n",adpcm_command, cpu_get_pc(&space.device()) ); */
	519	/* logerror("read port 0: %02x  PC=%4x\n",adpcm_command, space.device().safe_pc() ); */
520	520	return m_adpcm_command;
521	521	}
522	522
r17788	r17789
534	534	{
535	535
536	536	m_nmi_enable = 0;
537		/* logerror("write port 0: NMI DISABLE  PC=%4x\n", data, cpu_get_pc(&space.device()) ); */
	537	/* logerror("write port 0: NMI DISABLE  PC=%4x\n", data, space.device().safe_pc() ); */
538	538	}
539	539
540	540	WRITE8_MEMBER(darius_state::adpcm_nmi_enable)
541	541	{
542	542	m_nmi_enable = 1;
543		/* logerror("write port 1: NMI ENABLE   PC=%4x\n", cpu_get_pc(&space.device()) ); */
	543	/* logerror("write port 1: NMI ENABLE   PC=%4x\n", space.device().safe_pc() ); */
544	544	}
545	545
546	546	WRITE8_MEMBER(darius_state::adpcm_data_w)

trunk/src/mame/drivers/kinst.c

r17788	r17789
362	362
363	363	case 4:      /* $a0 */
364	364	result = ioport(portnames[offset])->read();
365		if (cpu_get_pc(&space.device()) == 0x802d428)
	365	if (space.device().safe_pc() == 0x802d428)
366	366	device_spin_until_interrupt(&space.device());
367	367	break;
368	368	}

trunk/src/mame/drivers/cbasebal.c

r17788	r17789
31	31	{
32	32
33	33	/* bits 0-4 select ROM bank */
34		//logerror("%04x: bankswitch %02x\n", cpu_get_pc(&space.device()), data);
	34	//logerror("%04x: bankswitch %02x\n", space.device().safe_pc(), data);
35	35	membank("bank1")->set_entry(data & 0x1f);
36	36
37	37	/* bit 5 used but unknown */

trunk/src/mame/drivers/beathead.c

r17788	r17789
498	498	READ32_MEMBER( beathead_state::speedup_r )
499	499	{
500	500	int result = *m_speedup_data;
501		if ((cpu_get_previouspc(&space.device()) & 0xfffff) == 0x006f0 && result == cpu_get_reg(&space.device(), ASAP_R3))
	501	if ((space.device().safe_pcbase() & 0xfffff) == 0x006f0 && result == cpu_get_reg(&space.device(), ASAP_R3))
502	502	device_spin_until_interrupt(&space.device());
503	503	return result;
504	504	}
r17788	r17789
507	507	READ32_MEMBER( beathead_state::movie_speedup_r )
508	508	{
509	509	int result = *m_movie_speedup_data;
510		if ((cpu_get_previouspc(&space.device()) & 0xfffff) == 0x00a88 && (cpu_get_reg(&space.device(), ASAP_R28) & 0xfffff) == 0x397c0 &&
	510	if ((space.device().safe_pcbase() & 0xfffff) == 0x00a88 && (cpu_get_reg(&space.device(), ASAP_R28) & 0xfffff) == 0x397c0 &&
511	511	m_movie_speedup_data[4] == cpu_get_reg(&space.device(), ASAP_R1))
512	512	{
513	513	UINT32 temp = (INT16)result + m_movie_speedup_data[4] * 262;

trunk/src/mame/drivers/suprgolf.c

r17788	r17789
269	269
270	270	//popmessage("%08x %02x",((data & 0x3f) * 0x4000),data);
271	271
272		//  mame_printf_debug("ROM_BANK 0x8000 - %X @%X\n",data,cpu_get_previouspc(&space->device()));
	272	//  mame_printf_debug("ROM_BANK 0x8000 - %X @%X\n",data,space->device().safe_pcbase());
273	273	membank("bank2")->set_base(region_base + (data&0x3f ) * 0x4000);
274	274
275	275	m_msm_nmi_mask = data & 0x40;
r17788	r17789
279	279	WRITE8_MEMBER(suprgolf_state::rom2_bank_select_w)
280	280	{
281	281	UINT8 *region_base = memregion("user2")->base();
282		//  mame_printf_debug("ROM_BANK 0x4000 - %X @%X\n",data,cpu_get_previouspc(&space.device()));
	282	//  mame_printf_debug("ROM_BANK 0x4000 - %X @%X\n",data,space.device().safe_pcbase());
283	283
284	284	membank("bank1")->set_base(region_base + (data&0x0f) * 0x4000);
285	285

trunk/src/mame/drivers/snesb.c

r17788	r17789
206	206	case 0xfb7:   return 0x47;
207	207	}
208	208
209		logerror("Unknown protection read read %x @ %x\n",offset, cpu_get_pc(&space.device()));
	209	logerror("Unknown protection read read %x @ %x\n",offset, space.device().safe_pc());
210	210
211	211	return 0;
212	212	}

trunk/src/mame/drivers/pcxt.c

r17788	r17789
166	166
167	167	READ8_MEMBER(pcxt_state::disk_iobank_r)
168	168	{
169		//printf("Read Prototyping card [%02x] @ PC=%05x\n",offset,cpu_get_pc(&space.device()));
	169	//printf("Read Prototyping card [%02x] @ PC=%05x\n",offset,space.device().safe_pc());
170	170	//if(offset == 0) return ioport("DSW")->read();
171	171	if(offset == 1) return ioport("IN1")->read();
172	172
r17788	r17789
386	386	READ8_MEMBER(pcxt_state::fdc765_status_r)
387	387	{
388	388	UINT8 tmp;
389		//  popmessage("Read FDC status @ PC=%05x",cpu_get_pc(&space.device()));
	389	//  popmessage("Read FDC status @ PC=%05x",space.device().safe_pc());
390	390	tmp = m_status | 0x80;
391	391	m_clr_status++;
392	392	if(m_clr_status == 0x10)

trunk/src/mame/drivers/toaplan2.c

r17788	r17789
637	637	{
638	638
639	639	m_mcu_data = data & 0xff;
640		logerror("PC:%08x Writing command (%04x) to secondary CPU shared port\n", cpu_get_previouspc(&space.device()), m_mcu_data);
	640	logerror("PC:%08x Writing command (%04x) to secondary CPU shared port\n", space.device().safe_pcbase(), m_mcu_data);
641	641	}
642	642	}
643	643
r17788	r17789
699	699	}
700	700	else
701	701	{
702		logerror("PC:%08x Writing %08x to HD647180 cpu shared ram status port\n", cpu_get_previouspc(&space.device()), m_mcu_data);
	702	logerror("PC:%08x Writing %08x to HD647180 cpu shared ram status port\n", space.device().safe_pcbase(), m_mcu_data);
703	703	}
704	704	toaplan2_shared_ram16[0x56 / 2] = 0x004e;   // Return a RTS instruction
705	705	toaplan2_shared_ram16[0x58 / 2] = 0x0075;
r17788	r17789
1012	1012	{
1013	1013
1014	1014	if (data & ~0x001f)
1015		logerror("CPU #0 PC:%06X - Unknown EEPROM data being written %04X\n",cpu_get_pc(&space.device()),data);
	1015	logerror("CPU #0 PC:%06X - Unknown EEPROM data being written %04X\n",space.device().safe_pc(),data);
1016	1016
1017	1017	if ( ACCESSING_BITS_0_7 )
1018	1018	ioport("EEPROMOUT")->write(data, 0xff);

trunk/src/mame/drivers/mjkjidai.c

r17788	r17789
164	164	int res = 0x3f,i;
165	165	static const char *const keynames[] = { "PL2_1", "PL2_2", "PL2_3", "PL2_4", "PL2_5", "PL2_6", "PL1_1", "PL1_2", "PL1_3", "PL1_4", "PL1_5", "PL1_6" };
166	166
167		//  logerror("%04x: keyboard_r\n", cpu_get_pc(&space.device()));
	167	//  logerror("%04x: keyboard_r\n", space.device().safe_pc());
168	168
169	169	for (i = 0; i < 12; i++)
170	170	{
r17788	r17789
189	189	WRITE8_MEMBER(mjkjidai_state::keyboard_select_w)
190	190	{
191	191
192		//  logerror("%04x: keyboard_select %d = %02x\n",cpu_get_pc(&space.device()),offset,data);
	192	//  logerror("%04x: keyboard_select %d = %02x\n",space.device().safe_pc(),offset,data);
193	193
194	194	switch (offset)
195	195	{

trunk/src/mame/drivers/wecleman.c

r17788	r17789
329	329	{
330	330	if (ACCESSING_BITS_0_7)
331	331	{
332		// logerror("CPU #0 - PC = %06X - $140005 <- %02X (old value: %02X)\n",cpu_get_pc(&space.device()), data&0xFF, old_data&0xFF);
	332	// logerror("CPU #0 - PC = %06X - $140005 <- %02X (old value: %02X)\n",space.device().safe_pc(), data&0xFF, old_data&0xFF);
333	333
334	334	// Bit 0 : SUBINT
335	335	if ( (m_irqctrl & 1) && (!(data & 1)) )   // 1->0 transition

trunk/src/mame/drivers/crbaloon.c

r17788	r17789
61	61	{
62	62	m_pc3092_data[offset] = data & 0x0f;
63	63
64		if (LOG_PC3092) logerror("%04X:  write PC3092 #%d = 0x%02x\n", cpu_get_pc(&space.device()), offset, m_pc3092_data[offset]);
	64	if (LOG_PC3092) logerror("%04X:  write PC3092 #%d = 0x%02x\n", space.device().safe_pc(), offset, m_pc3092_data[offset]);
65	65
66	66	pc3092_update(machine());
67	67	}
r17788	r17789
141	141	break;
142	142	}
143	143
144		if (LOG_PC3259) logerror("%04X:  read PC3259 #%d = 0x%02x\n", cpu_get_pc(&space.device()), reg, ret);
	144	if (LOG_PC3259) logerror("%04X:  read PC3259 #%d = 0x%02x\n", space.device().safe_pc(), reg, ret);
145	145
146	146	return ret | (ioport("DSW1")->read() & 0xf0);
147	147	}

trunk/src/mame/drivers/voyager.c

r17788	r17789
249	249	#if 0
250	250	if ((state->m_mxtc_config_reg[0x63] & 0x50) | ( state->m_mxtc_config_reg[0x63] & 0xA0)) // Only DO if comes a change to disable ROM.
251	251	{
252		if ( cpu_get_pc(busdevice->machine().device("maincpu"))==0xff74e) cpu_set_reg(busdevice->machine().device("maincpu"), STATE_GENPC, 0xff74d);
	252	if ( busdevice->machine(->safe_pc().device("maincpu"))==0xff74e) cpu_set_reg(busdevice->machine().device("maincpu"), STATE_GENPC, 0xff74d);
253	253	}
254	254	#endif
255	255

trunk/src/mame/drivers/roul.c

r17788	r17789
120	120	bit 6 -> ??? (after unknown blitter command : [80][80][08][02])
121	121	*/
122	122	//  return 0x80; // blitter ready
123		//  logerror("Read unknown port $f5 at %04x\n",cpu_get_pc(&space.device()));
	123	//  logerror("Read unknown port $f5 at %04x\n",space.device().safe_pc());
124	124	return machine().rand() & 0x00c0;
125	125	}
126	126

trunk/src/mame/drivers/centiped.c

r17788	r17789
612	612
613	613	READ8_MEMBER(centiped_state::bullsdrt_data_port_r)
614	614	{
615		switch (cpu_get_pc(&space.device()))
	615	switch (space.device().safe_pc())
616	616	{
617	617	case 0x0033:
618	618	case 0x6b19:

trunk/src/mame/drivers/wgp.c

r17788	r17789
433	433
434	434	parse_control(machine());
435	435
436		logerror("CPU #0 PC %06x: write %04x to cpu control\n",cpu_get_pc(&space.device()),data);
	436	logerror("CPU #0 PC %06x: write %04x to cpu control\n",space.device().safe_pc(),data);
437	437	}
438	438
439	439
r17788	r17789
485	485
486	486	READ16_MEMBER(wgp_state::lan_status_r)
487	487	{
488		logerror("CPU #2 PC %06x: warning - read lan status\n",cpu_get_pc(&space.device()));
	488	logerror("CPU #2 PC %06x: warning - read lan status\n",space.device().safe_pc());
489	489
490	490	return  (0x4 << 8);   /* CPUB expects this in code at $104d0 (Wgp) */
491	491	}
r17788	r17789
512	512	{
513	513	case 0x00:
514	514	{
515		//logerror("CPU #0 PC %06x: warning - port %04x write %04x\n",cpu_get_pc(&space.device()),port_sel,data);
	515	//logerror("CPU #0 PC %06x: warning - port %04x write %04x\n",space.device().safe_pc(),port_sel,data);
516	516
517	517	m_rotate_ctrl[m_port_sel] = data;
518	518	return;
r17788	r17789
586	586	return ioport(UNKNOWN_PORT_TAG)->read_safe(0x00);   /* unknown */
587	587	}
588	588
589		logerror("CPU #0 PC %06x: warning - read unmapped a/d input offset %06x\n",cpu_get_pc(&space.device()),offset);
	589	logerror("CPU #0 PC %06x: warning - read unmapped a/d input offset %06x\n",space.device().safe_pc(),offset);
590	590
591	591	return 0xff;
592	592	}

trunk/src/mame/drivers/taitoair.c

r17788	r17789
240	240
241	241	device_set_input_line(m_dsp, INPUT_LINE_RESET, (data & 1) ? CLEAR_LINE : ASSERT_LINE);
242	242
243		logerror("68K:%06x writing %04x to TMS32025.  %s HOLD , %s RESET\n", cpu_get_previouspc(&space.device()), data, ((data & 4) ? "Clear" : "Assert"), ((data & 1) ? "Clear" : "Assert"));
	243	logerror("68K:%06x writing %04x to TMS32025.  %s HOLD , %s RESET\n", space.device().safe_pcbase(), data, ((data & 4) ? "Clear" : "Assert"), ((data & 1) ? "Clear" : "Assert"));
244	244	}
245	245
246	246	READ16_MEMBER(taitoair_state::lineram_r)
r17788	r17789
274	274	{
275	275
276	276	/* HOLD signal is active low */
277		//  logerror("TMS32025:%04x Reading %01x level from HOLD signal\n", cpu_get_previouspc(&space.device()), m_dsp_hold_signal);
	277	//  logerror("TMS32025:%04x Reading %01x level from HOLD signal\n", space.device().safe_pcbase(), m_dsp_hold_signal);
278	278
279	279	return m_dsp_hold_signal;
280	280	}
r17788	r17789
282	282	WRITE16_MEMBER(taitoair_state::dsp_HOLDA_signal_w)
283	283	{
284	284	if (offset)
285		logerror("TMS32025:%04x Writing %01x level to HOLD-Acknowledge signal\n", cpu_get_previouspc(&space.device()), data);
	285	logerror("TMS32025:%04x Writing %01x level to HOLD-Acknowledge signal\n", space.device().safe_pcbase(), data);
286	286	}
287	287
288	288

trunk/src/mame/drivers/metro.c

r17788	r17789
174	174
175	175	WRITE16_MEMBER(metro_state::metro_irq_cause_w)
176	176	{
177		//if (data & ~0x15) logerror("CPU #0 PC %06X : unknown bits of irqcause written: %04X\n", cpu_get_pc(&space.device()), data);
	177	//if (data & ~0x15) logerror("CPU #0 PC %06X : unknown bits of irqcause written: %04X\n", space.device().safe_pc(), data);
178	178
179	179	if (ACCESSING_BITS_0_7)
180	180	{
r17788	r17789
477	477	//      coin_lockout_w(machine(), 0, data & 1);
478	478	//      coin_lockout_w(machine(), 1, data & 2);
479	479	}
480		if (data & ~3)   logerror("CPU #0 PC %06X : unknown bits of coin lockout written: %04X\n", cpu_get_pc(&space.device()), data);
	480	if (data & ~3)   logerror("CPU #0 PC %06X : unknown bits of coin lockout written: %04X\n", space.device().safe_pc(), data);
481	481	}
482	482
483	483
484	484	WRITE16_MEMBER(metro_state::metro_coin_lockout_4words_w)
485	485	{
486	486	//  coin_lockout_w(machine(), (offset >> 1) & 1, offset & 1);
487		if (data & ~1)   logerror("CPU #0 PC %06X : unknown bits of coin lockout written: %04X\n", cpu_get_pc(&space.device()), data);
	487	if (data & ~1)   logerror("CPU #0 PC %06X : unknown bits of coin lockout written: %04X\n", space.device().safe_pc(), data);
488	488	}
489	489
490	490
r17788	r17789
608	608	int shift   = (dst_offs & 0x80) ? 0 : 8;
609	609	UINT16 mask = (dst_offs & 0x80) ? 0x00ff : 0xff00;
610	610
611		//      logerror("CPU #0 PC %06X : Blitter regs %08X, %08X, %08X\n", cpu_get_pc(&space.device()), tmap, src_offs, dst_offs);
	611	//      logerror("CPU #0 PC %06X : Blitter regs %08X, %08X, %08X\n", space.device().safe_pc(), tmap, src_offs, dst_offs);
612	612
613	613	dst_offs >>= 7 + 1;
614	614	switch (tmap)
r17788	r17789
618	618	case 3:
619	619	break;
620	620	default:
621		logerror("CPU #0 PC %06X : Blitter unknown destination: %08X\n", cpu_get_pc(&space.device()), tmap);
	621	logerror("CPU #0 PC %06X : Blitter unknown destination: %08X\n", space.device().safe_pc(), tmap);
622	622	return;
623	623	}
624	624
r17788	r17789
628	628
629	629	src_offs %= src_len;
630	630	b1 = blt_read(src, src_offs);
631		//          logerror("CPU #0 PC %06X : Blitter opcode %02X at %06X\n", cpu_get_pc(&space.device()), b1, src_offs);
	631	//          logerror("CPU #0 PC %06X : Blitter opcode %02X at %06X\n", space.device().safe_pc(), b1, src_offs);
632	632	src_offs++;
633	633
634	634	count = ((~b1) & 0x3f) + 1;
r17788	r17789
704	704	break;
705	705
706	706	default:
707		logerror("CPU #0 PC %06X : Blitter unknown opcode %02X at %06X\n",cpu_get_pc(&space.device()),b1,src_offs-1);
	707	logerror("CPU #0 PC %06X : Blitter unknown opcode %02X at %06X\n",space.device().safe_pc(),b1,src_offs-1);
708	708	return;
709	709	}
710	710
r17788	r17789
781	781	case 0x17FFE:   return BIT(dsw2, 6) ? 0x40 : 0;
782	782	case 0x0FFFE:   return BIT(dsw2, 7) ? 0x40 : 0;
783	783	}
784		logerror("CPU #0 PC %06X : unknown dsw address read: %04X\n", cpu_get_pc(&space.device()), offset);
	784	logerror("CPU #0 PC %06X : unknown dsw address read: %04X\n", space.device().safe_pc(), offset);
785	785	return 0xffff;
786	786	}
787	787

trunk/src/mame/drivers/surpratk.c

r17788	r17789
60	60	WRITE8_MEMBER(surpratk_state::surpratk_videobank_w)
61	61	{
62	62
63		logerror("%04x: videobank = %02x\n",cpu_get_pc(&space.device()),data);
	63	logerror("%04x: videobank = %02x\n",space.device().safe_pc(),data);
64	64	/* bit 0 = select 053245 at 0000-07ff */
65	65	/* bit 1 = select palette at 0000-07ff */
66	66	/* bit 2 = select palette bank 0 or 1 */
r17788	r17789
71	71	{
72	72
73	73	if ((data & 0xf4) != 0x10)
74		logerror("%04x: 3fc0 = %02x\n",cpu_get_pc(&space.device()),data);
	74	logerror("%04x: 3fc0 = %02x\n",space.device().safe_pc(),data);
75	75
76	76	/* bit 0/1 = coin counters */
77	77	coin_counter_w(machine(), 0, data & 0x01);
r17788	r17789
322	322
323	323	static KONAMI_SETLINES_CALLBACK( surpratk_banking )
324	324	{
325		logerror("%04x: setlines %02x\n",cpu_get_pc(device), lines);
	325	logerror("%04x: setlines %02x\n",device->safe_pc(), lines);
326	326	device->machine().root_device().membank("bank1")->set_entry(lines & 0x1f);
327	327	}
328	328

trunk/src/mame/drivers/littlerb.c

r17788	r17789
345	345
346	346	READ16_MEMBER(littlerb_state::littlerb_vdp_r)
347	347	{
348		logerror("%06x littlerb_vdp_r offs %04x mask %04x (address %08x)\n", cpu_get_pc(&space.device()), offset, mem_mask, m_write_address);
	348	logerror("%06x littlerb_vdp_r offs %04x mask %04x (address %08x)\n", space.device().safe_pc(), offset, mem_mask, m_write_address);
349	349	UINT16 res = 0;
350	350
351	351	switch (offset & 3)
r17788	r17789
378	378	m_type2_writes = 0;
379	379	}
380	380
381		if (LOG_VDP) logerror("%06x littlerb_vdp_w offs %04x data %04x mask %04x\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	381	if (LOG_VDP) logerror("%06x littlerb_vdp_w offs %04x data %04x mask %04x\n", space.device().safe_pc(), offset, data, mem_mask);
382	382	}
383	383	else
384	384	{
r17788	r17789
386	386	{
387	387	if (m_type2_writes==0)
388	388	{
389		if (LOG_VDP) logerror("data write started %06x %04x data %04x mask %04x\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	389	if (LOG_VDP) logerror("data write started %06x %04x data %04x mask %04x\n", space.device().safe_pc(), offset, data, mem_mask);
390	390	}
391	391	if (m_type2_writes==0) m_write_address_laststart = m_write_address;
392	392	m_write_address_lastend = m_write_address;
393	393	m_type2_writes++;
394		m_lasttype2pc = cpu_get_pc(&space.device());
	394	m_lasttype2pc = space.device().safe_pc();
395	395	}
396	396	else
397	397	{
398		if (LOG_VDP) logerror("xxx %06x littlerb_vdp_w offs %04x data %04x mask %04x\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	398	if (LOG_VDP) logerror("xxx %06x littlerb_vdp_w offs %04x data %04x mask %04x\n", space.device().safe_pc(), offset, data, mem_mask);
399	399	}
400	400	}
401	401

trunk/src/mame/drivers/namcos23.c

r17788	r17789
1518	1518	case 0: return 0x8e | (machine().primary_screen->vblank() ? 0x0000 : 0x8000);
1519	1519	case 1: return c417.adr;
1520	1520	case 4:
1521		//      logerror("c417_r %04x = %04x (%08x, %08x)\n", c417.adr, c417.ram[c417.adr], cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1521	//      logerror("c417_r %04x = %04x (%08x, %08x)\n", c417.adr, c417.ram[c417.adr], space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1522	1522	return c417.ram[c417.adr];
1523	1523	case 5:
1524	1524	if(c417.pointrom_adr >= m_ptrom_limit)
r17788	r17789
1531	1531
1532	1532	}
1533	1533
1534		logerror("c417_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1534	logerror("c417_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1535	1535	return 0;
1536	1536	}
1537	1537
r17788	r17789
1553	1553	c417.pointrom_adr = 0;
1554	1554	break;
1555	1555	case 4:
1556		//        logerror("c417_w %04x = %04x (%08x, %08x)\n", c417.adr, data, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1556	//        logerror("c417_w %04x = %04x (%08x, %08x)\n", c417.adr, data, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1557	1557	COMBINE_DATA(c417.ram + c417.adr);
1558	1558	break;
1559	1559	case 7:
r17788	r17789
1561	1561	cputag_set_input_line(machine(), "maincpu", MIPS3_IRQ2, CLEAR_LINE);
1562	1562	break;
1563	1563	default:
1564		logerror("c417_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1564	logerror("c417_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1565	1565	break;
1566	1566	}
1567	1567	}
r17788	r17789
1570	1570	{
1571	1571	c412_t &c412 = m_c412;
1572	1572
1573		//  logerror("c412_ram_r %06x (%08x, %08x)\n", offset, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1573	//  logerror("c412_ram_r %06x (%08x, %08x)\n", offset, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1574	1574	if(offset < 0x100000)
1575	1575	return c412.sdram_a[offset & 0xfffff];
1576	1576	else if(offset < 0x200000)
r17788	r17789
1587	1587	{
1588	1588	c412_t &c412 = m_c412;
1589	1589
1590		//  logerror("c412_ram_w %06x = %04x (%08x, %08x)\n", offset, data, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1590	//  logerror("c412_ram_w %06x = %04x (%08x, %08x)\n", offset, data, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1591	1591	if(offset < 0x100000)
1592	1592	COMBINE_DATA(c412.sdram_a + (offset & 0xfffff));
1593	1593	else if(offset < 0x200000)
r17788	r17789
1611	1611	case 10: return s23_c412_ram_r(space, c412.adr, mem_mask);
1612	1612	}
1613	1613
1614		logerror("c412_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1614	logerror("c412_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1615	1615	return 0;
1616	1616	}
1617	1617
r17788	r17789
1624	1624	case 9: c412.adr = ((data & mem_mask) << 16) | (c412.adr & (0xffffffff ^ (mem_mask << 16))); break;
1625	1625	case 10: s23_c412_ram_w(space, c412.adr, data, mem_mask); c412.adr += 2; break;
1626	1626	default:
1627		logerror("c412_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1627	logerror("c412_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1628	1628	break;
1629	1629	}
1630	1630	}
r17788	r17789
1633	1633	{
1634	1634	c421_t &c421 = m_c421;
1635	1635
1636		//  logerror("c421_ram_r %06x (%08x, %08x)\n", offset, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1636	//  logerror("c421_ram_r %06x (%08x, %08x)\n", offset, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1637	1637	if(offset < 0x40000)
1638	1638	return c421.dram_a[offset & 0x3ffff];
1639	1639	else if(offset < 0x80000)
r17788	r17789
1648	1648	{
1649	1649	c421_t &c421 = m_c421;
1650	1650
1651		//  logerror("c421_ram_w %06x = %04x (%08x, %08x)\n", offset, data, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1651	//  logerror("c421_ram_w %06x = %04x (%08x, %08x)\n", offset, data, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1652	1652	if(offset < 0x40000)
1653	1653	COMBINE_DATA(c421.dram_a + (offset & 0x3ffff));
1654	1654	else if(offset < 0x80000)
r17788	r17789
1667	1667	case 3: return c421.adr;
1668	1668	}
1669	1669
1670		logerror("c421_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1670	logerror("c421_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1671	1671	return 0;
1672	1672	}
1673	1673
r17788	r17789
1680	1680	case 2: c421.adr = ((data & mem_mask) << 16) | (c421.adr & (0xffffffff ^ (mem_mask << 16))); break;
1681	1681	case 3: c421.adr = (data & mem_mask) | (c421.adr & (0xffffffff ^ mem_mask)); break;
1682	1682	default:
1683		logerror("c421_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1683	logerror("c421_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1684	1684	break;
1685	1685	}
1686	1686	}
r17788	r17789
1717	1717
1718	1718	case 6:   // gmen wars spams this heavily with 0 prior to starting the GMEN board test
1719	1719	if (data != 0)
1720		logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1720	logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1721	1721	break;
1722	1722
1723	1723	default:
1724		logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1724	logerror("ctl_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1725	1725	}
1726	1726	}
1727	1727
r17788	r17789
1736	1736	return res;
1737	1737	}
1738	1738	}
1739		logerror("ctl_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1739	logerror("ctl_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1740	1740	return 0xffff;
1741	1741	}
1742	1742
r17788	r17789
1780	1780	break;
1781	1781
1782	1782	default:
1783		logerror("c361_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1783	logerror("c361_w %x, %04x @ %04x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1784	1784	}
1785	1785	}
1786	1786
r17788	r17789
1790	1790	case 5: return machine().primary_screen->vpos()*2 | (machine().primary_screen->vblank() ? 1 : 0);
1791	1791	case 6: return machine().primary_screen->vblank();
1792	1792	}
1793		logerror("c361_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	1793	logerror("c361_r %x @ %04x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
1794	1794	return 0xffff;
1795	1795	}
1796	1796
r17788	r17789
2185	2185	case 0xa: return 1; // Busy flag
2186	2186	}
2187	2187
2188		logerror("p3d_r %02x @ %08x (%08x, %08x)\n", offset, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	2188	logerror("p3d_r %02x @ %08x (%08x, %08x)\n", offset, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
2189	2189	return 0;
2190	2190	}
2191	2191
r17788	r17789
2203	2203	m_c361.timer->adjust(attotime::never);
2204	2204	return;
2205	2205	}
2206		logerror("p3d_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
	2206	logerror("p3d_w %02x, %08x @ %08x (%08x, %08x)\n", offset, data, mem_mask, space.device().safe_pc(), (unsigned int)cpu_get_reg(&space.device(), MIPS3_R31));
2207	2207	}
2208	2208
2209	2209	static void render_apply_transform(INT32 xi, INT32 yi, INT32 zi, const namcos23_render_entry *re, poly_vertex &pv)

trunk/src/mame/drivers/mjsister.c

r17788	r17789
218	218	case 0xf: m_vrambank = 1 ; break;
219	219
220	220	default:
221		logerror("%04x p30_w:%02x\n", cpu_get_pc(&space.device()), data);
	221	logerror("%04x p30_w:%02x\n", space.device().safe_pc(), data);
222	222	}
223	223
224	224	if (tmp != m_colorbank)
r17788	r17789
239	239	case 0xd: m_rombank1 = 1; break;
240	240
241	241	default:
242		logerror("%04x p31_w:%02x\n", cpu_get_pc(&space.device()), data);
	242	logerror("%04x p31_w:%02x\n", space.device().safe_pc(), data);
243	243	}
244	244
245	245	membank("bank1")->set_entry(m_rombank0 * 2 + m_rombank1);

trunk/src/mame/drivers/yunsung8.c

r17788	r17789
52	52	membank("bank1")->set_entry(data & 0x07);
53	53
54	54	if (data & ~0x37)
55		logerror("CPU #0 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
	55	logerror("CPU #0 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
56	56	}
57	57
58	58	/*

trunk/src/mame/drivers/wheelfir.c

r17788	r17789
503	503	{
504	504	vpage=LAYER_BG;
505	505	/*
506		printf("bg -> %d %d   %d %d  %d %d @ %x\n",dst_x0,dst_y0, dst_x1,dst_y1, dst_x1-dst_x0, dst_y1-dst_y0,cpu_get_pc(&space.device()));
	506	printf("bg -> %d %d   %d %d  %d %d @ %x\n",dst_x0,dst_y0, dst_x1,dst_y1, dst_x1-dst_x0, dst_y1-dst_y0,space.device().safe_pc());
507	507
508	508	for(int i=0;i<16;++i)
509	509	{

trunk/src/mame/drivers/jaguar.c

r17788	r17789
558	558
559	559	WRITE32_MEMBER(jaguar_state::misc_control_w)
560	560	{
561		logerror("%08X:misc_control_w(%02X)\n", cpu_get_previouspc(&space.device()), data);
	561	logerror("%08X:misc_control_w(%02X)\n", space.device().safe_pcbase(), data);
562	562
563	563	/*  D7    = board reset (low)
564	564	D6    = audio must & reset (high)
r17788	r17789
751	751
752	752	WRITE32_MEMBER(jaguar_state::latch_w)
753	753	{
754		logerror("%08X:latch_w(%X)\n", cpu_get_previouspc(&space.device()), data);
	754	logerror("%08X:latch_w(%X)\n", space.device().safe_pcbase(), data);
755	755
756	756	/* adjust banking */
757	757	if (memregion("romboard")->base())
r17788	r17789
795	795	m_nvram[offset] = data & 0xff000000;
796	796	}
797	797	//  else
798		//      logerror("%08X:error writing to disabled EEPROM\n", cpu_get_previouspc(&space.device()));
	798	//      logerror("%08X:error writing to disabled EEPROM\n", space.device().safe_pcbase());
799	799	m_eeprom_enable = false;
800	800	}
801	801
r17788	r17789
833	833	{
834	834	/* update the data in memory */
835	835	COMBINE_DATA(m_gpu_jump_address);
836		logerror("%08X:GPU jump address = %08X\n", cpu_get_previouspc(&space.device()), *m_gpu_jump_address);
	836	logerror("%08X:GPU jump address = %08X\n", space.device().safe_pcbase(), *m_gpu_jump_address);
837	837
838	838	/* if the GPU is suspended, release it now */
839	839	gpu_resume();
r17788	r17789
848	848	{
849	849	/* if the current GPU command is just pointing back to the spin loop, and */
850	850	/* we're reading it from the spin loop, we can optimize */
851		if (*m_gpu_jump_address == m_gpu_spin_pc && cpu_get_previouspc(&space.device()) == m_gpu_spin_pc)
	851	if (*m_gpu_jump_address == m_gpu_spin_pc && space.device().safe_pcbase() == m_gpu_spin_pc)
852	852	{
853	853	#if ENABLE_SPEEDUP_HACKS
854	854	/* spin if we're allowed */

trunk/src/mame/drivers/liberate.c

r17788	r17789
42	42	return m_spriteram[offset - 0x800];
43	43	if (offset < 0x2200)
44	44	{
45		logerror("%04x: Unmapped bank read %04x\n", cpu_get_pc(&space.device()), offset);
	45	logerror("%04x: Unmapped bank read %04x\n", space.device().safe_pc(), offset);
46	46	return 0;
47	47	}
48	48	if (offset < 0x2800)
49	49	return m_scratchram[offset - 0x2200];
50	50
51		logerror("%04x: Unmapped bank read %04x\n", cpu_get_pc(&space.device()), offset);
	51	logerror("%04x: Unmapped bank read %04x\n", space.device().safe_pc(), offset);
52	52	return 0;
53	53	}
54	54
r17788	r17789
60	60	if (offset == 3) return ioport("DSW1")->read(); /* Dip 1 */
61	61	if (offset == 4) return ioport("DSW2")->read(); /* Dip 2 */
62	62
63		logerror("%04x:  Read input %d\n", cpu_get_pc(&space.device()), offset);
	63	logerror("%04x:  Read input %d\n", space.device().safe_pc(), offset);
64	64	return 0xff;
65	65	}
66	66
r17788	r17789
93	93	return m_spriteram[offset - 0xc00];
94	94	if (offset < 0x2200)
95	95	{
96		logerror("%04x: Unmapped bank read %04x\n", cpu_get_pc(&space.device()), offset);
	96	logerror("%04x: Unmapped bank read %04x\n", space.device().safe_pc(), offset);
97	97	return 0;
98	98	}
99	99	if (offset < 0x2800)
100	100	return m_scratchram[offset - 0x2200];
101	101
102		logerror("%04x: Unmapped bank read %04x\n", cpu_get_pc(&space.device()), offset);
	102	logerror("%04x: Unmapped bank read %04x\n", space.device().safe_pc(), offset);
103	103	return 0;
104	104	}
105	105

trunk/src/mame/drivers/seta.c

r17788	r17789
1392	1392	} else {
1393	1393	uPD71054->timer[no]->adjust( attotime::never, no);
1394	1394	logerror( "CPU #0 PC %06X: uPD71054 error, timer %d duration is 0\n",
1395		(cpu != NULL) ? cpu_get_pc(cpu) : -1, no );
	1395	(cpu != NULL) ? cpu->safe_pc() : -1, no );
1396	1396	}
1397	1397	}
1398	1398
r17788	r17789
1698	1698	case 0x16/2:   return (dir2 >> 8);         // upper 4 bits of p2 rotation
1699	1699	case 0x18/2:   return 0xffff;            // ? (value's read but not used)
1700	1700	default:
1701		logerror("PC %06X - Read input %02X !\n", cpu_get_pc(&space.device()), offset*2);
	1701	logerror("PC %06X - Read input %02X !\n", space.device().safe_pc(), offset*2);
1702	1702	return 0;
1703	1703	}
1704	1704	}
r17788	r17789
2510	2510	case 0xc/2:   return dir2y & 0xff;
2511	2511	case 0xe/2:   return dir2y >> 8;
2512	2512	default:
2513		logerror("PC %06X - Read input %02X !\n", cpu_get_pc(&space.device()), offset*2);
	2513	logerror("PC %06X - Read input %02X !\n", space.device().safe_pc(), offset*2);
2514	2514	return 0;
2515	2515	}
2516	2516	}
r17788	r17789
2675	2675	case 0x08/2:   return 0xffff;
2676	2676
2677	2677	default:
2678		logerror("PC %06X - Read input %02X !\n", cpu_get_pc(&space.device()), offset*2);
	2678	logerror("PC %06X - Read input %02X !\n", space.device().safe_pc(), offset*2);
2679	2679	return 0x0000;
2680	2680	}
2681	2681	}
r17788	r17789
2701	2701
2702	2702	READ16_MEMBER(seta_state::thunderl_protection_r)
2703	2703	{
2704		//  logerror("PC %06X - Protection Read\n", cpu_get_pc(&space.device()));
	2704	//  logerror("PC %06X - Protection Read\n", space.device().safe_pc());
2705	2705	return 0x00dd;
2706	2706	}
2707	2707	WRITE16_MEMBER(seta_state::thunderl_protection_w)
2708	2708	{
2709		//  logerror("PC %06X - Protection Written: %04X <- %04X\n", cpu_get_pc(&space.device()), offset*2, data);
	2709	//  logerror("PC %06X - Protection Written: %04X <- %04X\n", space.device().safe_pc(), offset*2, data);
2710	2710	}
2711	2711
2712	2712	/* Similar to downtown etc. */
r17788	r17789
2872	2872	int retdata;
2873	2873
2874	2874	retdata = m_pairslove_protram[offset];
2875		//mame_printf_debug("pairs love protection? read %06x %04x %04x\n",cpu_get_pc(&space.device()), offset,retdata);
	2875	//mame_printf_debug("pairs love protection? read %06x %04x %04x\n",space.device().safe_pc(), offset,retdata);
2876	2876	m_pairslove_protram[offset] = m_pairslove_protram_old[offset];
2877	2877	return retdata;
2878	2878	}
2879	2879
2880	2880	WRITE16_MEMBER(seta_state::pairlove_prot_w)
2881	2881	{
2882		//mame_printf_debug("pairs love protection? write %06x %04x %04x\n",cpu_get_pc(&space.device()), offset,data);
	2882	//mame_printf_debug("pairs love protection? write %06x %04x %04x\n",space.device().safe_pc(), offset,data);
2883	2883	m_pairslove_protram_old[offset] = m_pairslove_protram[offset];
2884	2884	m_pairslove_protram[offset] = data;
2885	2885	}
r17788	r17789
2956	2956	case 0x80:   return ioport("BET4")->read();
2957	2957	}
2958	2958
2959		logerror("%06X: unknown read, select = %04x\n",cpu_get_pc(&space.device()), *m_inttoote_key_select);
	2959	logerror("%06X: unknown read, select = %04x\n",space.device().safe_pc(), *m_inttoote_key_select);
2960	2960	return 0xffff;
2961	2961	}
2962	2962
r17788	r17789
10708	10708	{
10709	10709
10710	10710	// protection check at boot
10711		logerror("%04x: twineagl_200100_r %d\n",cpu_get_pc(&space.device()),offset);
	10711	logerror("%04x: twineagl_200100_r %d\n",space.device().safe_pc(),offset);
10712	10712	return m_twineagl_xram[offset];
10713	10713	}
10714	10714	WRITE16_MEMBER(seta_state::twineagl_200100_w)
10715	10715	{
10716		logerror("%04x: twineagl_200100_w %d = %02x\n",cpu_get_pc(&space.device()),offset,data);
	10716	logerror("%04x: twineagl_200100_w %d = %02x\n",space.device().safe_pc(),offset,data);
10717	10717
10718	10718	if (ACCESSING_BITS_0_7)
10719	10719	{

trunk/src/mame/drivers/vball.c

r17788	r17789
191	191	m_vb_scrollx_hi = (data & 0x02) << 7;
192	192	vb_bgprombank_w(machine(), (data >> 2) & 0x07);
193	193	vb_spprombank_w(machine(), (data >> 5) & 0x07);
194		//logerror("%04x: vb_scrollx_hi = %d\n", cpu_get_previouspc(&space.device()), m_vb_scrollx_hi);
	194	//logerror("%04x: vb_scrollx_hi = %d\n", space.device().safe_pcbase(), m_vb_scrollx_hi);
195	195	}
196	196
197	197	WRITE8_MEMBER(vball_state::vb_scrollx_lo_w)
198	198	{
199	199	m_vb_scrollx_lo = data;
200		//logerror("%04x: vb_scrollx_lo =%d\n", cpu_get_previouspc(&space.device()), m_vb_scrollx_lo);
	200	//logerror("%04x: vb_scrollx_lo =%d\n", space.device().safe_pcbase(), m_vb_scrollx_lo);
201	201	}
202	202
203	203

trunk/src/mame/drivers/stv.c

r17788	r17789
367	367	READ32_MEMBER(saturn_state::magzun_hef_hack_r)
368	368	{
369	369
370		if(cpu_get_pc(&space.device())==0x604bf20) return 0x00000001; //HWEF
	370	if(space.device().safe_pc()==0x604bf20) return 0x00000001; //HWEF
371	371
372		if(cpu_get_pc(&space.device())==0x604bfbe) return 0x00000002; //HREF
	372	if(space.device().safe_pc()==0x604bfbe) return 0x00000002; //HREF
373	373
374	374	return m_workram_h[0x08e830/4];
375	375	}
r17788	r17789
377	377	READ32_MEMBER(saturn_state::magzun_rx_hack_r)
378	378	{
379	379
380		if(cpu_get_pc(&space.device())==0x604c006) return 0x40;
	380	if(space.device().safe_pc()==0x604c006) return 0x40;
381	381
382	382	return m_workram_h[0x0ff3b4/4];
383	383	}
r17788	r17789
653	653	READ32_MEMBER(saturn_state::astrass_hack_r)
654	654	{
655	655
656		if(cpu_get_pc(&space.device()) == 0x60011ba) return 0x00000000;
	656	if(space.device().safe_pc() == 0x60011ba) return 0x00000000;
657	657
658	658	return m_workram_h[0x000770/4];
659	659	}

trunk/src/mame/drivers/vamphalf.c

r17788	r17789
2218	2218
2219	2219	READ16_MEMBER(vamphalf_state::vamphalf_speedup_r)
2220	2220	{
2221		if(cpu_get_pc(&space.device()) == 0x82de)
	2221	if(space.device().safe_pc() == 0x82de)
2222	2222	{
2223	2223	if(irq_active(&space))
2224	2224	device_spin_until_interrupt(&space.device());
r17788	r17789
2231	2231
2232	2232	READ16_MEMBER(vamphalf_state::vamphafk_speedup_r)
2233	2233	{
2234		if(cpu_get_pc(&space.device()) == 0x82de)
	2234	if(space.device().safe_pc() == 0x82de)
2235	2235	{
2236	2236	if(irq_active(&space))
2237	2237	device_spin_until_interrupt(&space.device());
r17788	r17789
2244	2244
2245	2245	READ16_MEMBER(vamphalf_state::misncrft_speedup_r)
2246	2246	{
2247		if(cpu_get_pc(&space.device()) == 0xecc8)
	2247	if(space.device().safe_pc() == 0xecc8)
2248	2248	{
2249	2249	if(irq_active(&space))
2250	2250	device_spin_until_interrupt(&space.device());
r17788	r17789
2257	2257
2258	2258	READ16_MEMBER(vamphalf_state::coolmini_speedup_r)
2259	2259	{
2260		if(cpu_get_pc(&space.device()) == 0x75f7a)
	2260	if(space.device().safe_pc() == 0x75f7a)
2261	2261	{
2262	2262	if(irq_active(&space))
2263	2263	device_spin_until_interrupt(&space.device());
r17788	r17789
2270	2270
2271	2271	READ16_MEMBER(vamphalf_state::suplup_speedup_r)
2272	2272	{
2273		if(cpu_get_pc(&space.device()) == 0xaf18a )
	2273	if(space.device().safe_pc() == 0xaf18a )
2274	2274	{
2275	2275	if(irq_active(&space))
2276	2276	device_spin_until_interrupt(&space.device());
r17788	r17789
2283	2283
2284	2284	READ16_MEMBER(vamphalf_state::luplup_speedup_r)
2285	2285	{
2286		if(cpu_get_pc(&space.device()) == 0xaefac )
	2286	if(space.device().safe_pc() == 0xaefac )
2287	2287	{
2288	2288	if(irq_active(&space))
2289	2289	device_spin_until_interrupt(&space.device());
r17788	r17789
2296	2296
2297	2297	READ16_MEMBER(vamphalf_state::luplup29_speedup_r)
2298	2298	{
2299		if(cpu_get_pc(&space.device()) == 0xae6c0 )
	2299	if(space.device().safe_pc() == 0xae6c0 )
2300	2300	{
2301	2301	if(irq_active(&space))
2302	2302	device_spin_until_interrupt(&space.device());
r17788	r17789
2309	2309
2310	2310	READ16_MEMBER(vamphalf_state::puzlbang_speedup_r)
2311	2311	{
2312		if(cpu_get_pc(&space.device()) == 0xae6d2 )
	2312	if(space.device().safe_pc() == 0xae6d2 )
2313	2313	{
2314	2314	if(irq_active(&space))
2315	2315	device_spin_until_interrupt(&space.device());
r17788	r17789
2322	2322
2323	2323	READ32_MEMBER(vamphalf_state::wyvernwg_speedup_r)
2324	2324	{
2325		int pc = cpu_get_pc(&space.device());
	2325	int pc = space.device().safe_pc();
2326	2326
2327	2327	if(pc == 0x10758)
2328	2328	{
r17788	r17789
2337	2337
2338	2338	READ32_MEMBER(vamphalf_state::wyvernwga_speedup_r)
2339	2339	{
2340		int pc = cpu_get_pc(&space.device());
	2340	int pc = space.device().safe_pc();
2341	2341
2342	2342	if(pc == 0x10758)
2343	2343	{
r17788	r17789
2354	2354
2355	2355	READ32_MEMBER(vamphalf_state::finalgdr_speedup_r)
2356	2356	{
2357		if(cpu_get_pc(&space.device()) == 0x1c212)
	2357	if(space.device().safe_pc() == 0x1c212)
2358	2358	{
2359	2359	if(irq_active(&space))
2360	2360	device_spin_until_interrupt(&space.device());
r17788	r17789
2367	2367
2368	2368	READ32_MEMBER(vamphalf_state::mrkicker_speedup_r)
2369	2369	{
2370		UINT32 pc = cpu_get_pc(&space.device());
	2370	UINT32 pc = space.device().safe_pc();
2371	2371	if(pc == 0x469de || pc == 0x46a36)
2372	2372	{
2373	2373	//      if(irq_active(&space))
r17788	r17789
2382	2382
2383	2383	READ16_MEMBER(vamphalf_state::dquizgo2_speedup_r)
2384	2384	{
2385		if(cpu_get_pc(&space.device()) == 0xaa622)
	2385	if(space.device().safe_pc() == 0xaa622)
2386	2386	{
2387	2387	if(irq_active(&space))
2388	2388	device_spin_until_interrupt(&space.device());
r17788	r17789
2395	2395
2396	2396	READ32_MEMBER(vamphalf_state::aoh_speedup_r)
2397	2397	{
2398		if(cpu_get_pc(&space.device()) == 0xb994 )
	2398	if(space.device().safe_pc() == 0xb994 )
2399	2399	{
2400	2400	device_eat_cycles(&space.device(), 500);
2401	2401	}
2402		else if (cpu_get_pc(&space.device()) == 0xba40 )
	2402	else if (space.device().safe_pc() == 0xba40 )
2403	2403	{
2404	2404	device_eat_cycles(&space.device(), 500);
2405	2405	}
r17788	r17789
2410	2410
2411	2411	READ16_MEMBER(vamphalf_state::jmpbreak_speedup_r)
2412	2412	{
2413		if(cpu_get_pc(&space.device()) == 0x983c)
	2413	if(space.device().safe_pc() == 0x983c)
2414	2414	{
2415	2415	if(irq_active(&space))
2416	2416	device_spin_until_interrupt(&space.device());
r17788	r17789
2423	2423
2424	2424	READ16_MEMBER(vamphalf_state::mrdig_speedup_r)
2425	2425	{
2426		if(cpu_get_pc(&space.device()) == 0x1710)
	2426	if(space.device().safe_pc() == 0x1710)
2427	2427	{
2428	2428	if(irq_active(&space))
2429	2429	device_spin_until_interrupt(&space.device());
r17788	r17789
2437	2437	READ16_MEMBER(vamphalf_state::dtfamily_speedup_r)
2438	2438	{
2439	2439
2440		int pc = cpu_get_pc(&space.device());
	2440	int pc = space.device().safe_pc();
2441	2441
2442	2442	if (pc == 0x12fa6)
2443	2443	device_spin_until_interrupt(&space.device());
r17788	r17789
2449	2449	READ16_MEMBER(vamphalf_state::toyland_speedup_r)
2450	2450	{
2451	2451
2452		if (cpu_get_pc(&space.device()) == 0x130c2)
	2452	if (space.device().safe_pc() == 0x130c2)
2453	2453	device_spin_until_interrupt(&space.device());
2454	2454
2455	2455	return m_wram[0x780d8 / 2];
r17788	r17789
2458	2458
2459	2459	READ16_MEMBER(vamphalf_state::boonggab_speedup_r)
2460	2460	{
2461		if(cpu_get_pc(&space.device()) == 0x13198)
	2461	if(space.device().safe_pc() == 0x13198)
2462	2462	{
2463	2463	if(irq_active(&space))
2464	2464	device_spin_until_interrupt(&space.device());

trunk/src/mame/drivers/raiden.c

r17788	r17789
555	555	#ifdef SYNC_HACK
556	556	READ16_MEMBER(raiden_state::sub_cpu_spin_r)
557	557	{
558		int pc=cpu_get_pc(&space.device());
	558	int pc=space.device().safe_pc();
559	559	int ret=m_shared_ram[0x4];
560	560
561	561	// main set

trunk/src/mame/drivers/fromanc2.c

r17788	r17789
63	63	case 0x04:   ret = ioport("KEY2")->read(); break;
64	64	case 0x08:   ret = ioport("KEY3")->read(); break;
65	65	default:   ret = 0xffff;
66		logerror("PC:%08X unknown %02X\n", cpu_get_pc(&space.device()), m_portselect);
	66	logerror("PC:%08X unknown %02X\n", space.device().safe_pc(), m_portselect);
67	67	break;
68	68	}
69	69

trunk/src/mame/drivers/realbrk.c

r17788	r17789
63	63	((ioport("SW3")->read() & 0x0300) << 4) |
64	64	((ioport("SW4")->read() & 0x0300) << 6) ;
65	65
66		logerror("CPU #0 PC %06X: read with unknown dsw_select = %02x\n",cpu_get_pc(&space.device()),m_dsw_select[0]);
	66	logerror("CPU #0 PC %06X: read with unknown dsw_select = %02x\n",space.device().safe_pc(),m_dsw_select[0]);
67	67	return 0xffff;
68	68	}
69	69
r17788	r17789
123	123	{
124	124	/*TODO: understand the format & cmds of the backup-ram,maybe it's an
125	125	unemulated tmp68301 feature?*/
126		if(cpu_get_previouspc(&space.device()) == 0x02c08e)
	126	if(space.device().safe_pcbase() == 0x02c08e)
127	127	return 0xffff;
128	128	else
129	129	return m_backup_ram[offset];
r17788	r17789
134	134	{
135	135	/*TODO: understand the format & cmds of the backup-ram,maybe it's an
136	136	unemulated tmp68301 feature?*/
137		if(cpu_get_previouspc(&space.device()) == 0x02f046)
	137	if(space.device().safe_pcbase() == 0x02f046)
138	138	return 0xffff;
139	139	else
140	140	return m_backup_ram[offset];

trunk/src/mame/drivers/superchs.c

r17788	r17789
437	437
438	438	READ32_MEMBER(superchs_state::main_cycle_r)
439	439	{
440		if (cpu_get_pc(&space.device())==0x702)
	440	if (space.device().safe_pc()==0x702)
441	441	device_spin_until_interrupt(&space.device());
442	442
443	443	return m_ram[0];
r17788	r17789
445	445
446	446	READ16_MEMBER(superchs_state::sub_cycle_r)
447	447	{
448		if (cpu_get_pc(&space.device())==0x454)
	448	if (space.device().safe_pc()==0x454)
449	449	device_spin_until_interrupt(&space.device());
450	450
451	451	return m_ram[2]&0xffff;

trunk/src/mame/drivers/mainevt.c

r17788	r17789
110	110	{
111	111	int bank_A, bank_B;
112	112
113		//logerror("CPU #1 PC: %04x bank switch = %02x\n",cpu_get_pc(&space.device()),data);
	113	//logerror("CPU #1 PC: %04x bank switch = %02x\n",space.device().safe_pc(),data);
114	114
115	115	/* bits 0-3 select the 007232 banks */
116	116	bank_A = (data & 0x3);
r17788	r17789
126	126	device_t *device = machine().device("k007232");
127	127	int bank_A, bank_B;
128	128
129		//logerror("CPU #1 PC: %04x bank switch = %02x\n",cpu_get_pc(&space->device()),data);
	129	//logerror("CPU #1 PC: %04x bank switch = %02x\n",space->device().safe_pc(),data);
130	130
131	131	/* bits 0-3 select the 007232 banks */
132	132	bank_A = (data & 0x3);

trunk/src/mame/drivers/hitpoker.c

r17788	r17789
216	216
217	217	if(offset == 0)
218	218	{
219		if(cpu_get_pc(&space.device()) == 0x3143 ||
220		cpu_get_pc(&space.device()) == 0x314e ||
221		cpu_get_pc(&space.device()) == 0x3164 ||
222		cpu_get_pc(&space.device()) == 0x3179)
	219	if(space.device().safe_pc() == 0x3143 ||
	220	space.device().safe_pc() == 0x314e ||
	221	space.device().safe_pc() == 0x3164 ||
	222	space.device().safe_pc() == 0x3179)
223	223	return m_pic_data;
224	224
225	225	return (m_pic_data & 0x7f) | (m_pic_data & 0x40 ? 0x80 : 0x00);

trunk/src/mame/drivers/meritm.c

r17788	r17789
472	472	WRITE8_MEMBER(meritm_state::meritm_psd_a15_w)
473	473	{
474	474	m_psd_a15 = data;
475		//logerror( "Writing PSD_A15 with %02x at PC=%04X\n", data, cpu_get_pc(&space.device()) );
	475	//logerror( "Writing PSD_A15 with %02x at PC=%04X\n", data, space.device().safe_pc() );
476	476	meritm_switch_banks(machine());
477	477	};
478	478

trunk/src/mame/drivers/koftball.c

r17788	r17789
137	137	case 0x8000: return 0x0f0f;
138	138	}
139	139
140		logerror("unk prot r %x %x\n",m_prot_data,   cpu_get_previouspc(&space.device()));
	140	logerror("unk prot r %x %x\n",m_prot_data,   space.device().safe_pcbase());
141	141	return machine().rand();
142	142	}
143	143

trunk/src/mame/drivers/vsnes.c

r17788	r17789
171	171	//"bnglngby" and "cluclu"
172	172	if( data & 0xfe )
173	173	{
174		logerror("vsnes_coin_counter_w: pc = 0x%04x - data = 0x%02x\n", cpu_get_pc(&space.device()), data);
	174	logerror("vsnes_coin_counter_w: pc = 0x%04x - data = 0x%02x\n", space.device().safe_pc(), data);
175	175	}
176	176	}
177	177
r17788	r17789
187	187	if( data & 0xfe ) //vsbball service mode
188	188	{
189	189	//do something?
190		logerror("vsnes_coin_counter_1_w: pc = 0x%04x - data = 0x%02x\n", cpu_get_pc(&space.device()), data);
	190	logerror("vsnes_coin_counter_1_w: pc = 0x%04x - data = 0x%02x\n", space.device().safe_pc(), data);
191	191	}
192	192
193	193	}

trunk/src/mame/drivers/cninja.c

r17788	r17789
91	91	return 0;
92	92	}
93	93
94		logerror("%08x:  Unmapped IRQ read %d\n", cpu_get_pc(&space.device()), offset);
	94	logerror("%08x:  Unmapped IRQ read %d\n", space.device().safe_pc(), offset);
95	95	return 0;
96	96	}
97	97
r17788	r17789
106	106	0xc8:   Raster IRQ turned on (68k IRQ level 4)
107	107	0xd8:   Raster IRQ turned on (68k IRQ level 3)
108	108	*/
109		logerror("%08x:  IRQ write %d %08x\n", cpu_get_pc(&space.device()), offset, data);
	109	logerror("%08x:  IRQ write %d %08x\n", space.device().safe_pc(), offset, data);
110	110	m_irq_mask = data & 0xff;
111	111	return;
112	112
r17788	r17789
123	123	return;
124	124	}
125	125
126		logerror("%08x:  Unmapped IRQ write %d %04x\n", cpu_get_pc(&space.device()), offset, data);
	126	logerror("%08x:  Unmapped IRQ write %d %04x\n", space.device().safe_pc(), offset, data);
127	127	}
128	128
129	129	READ16_MEMBER(cninja_state::robocop2_prot_r)
r17788	r17789
137	137	case 0x4e6: /* Dip switches */
138	138	return ioport("DSW")->read();
139	139	case 0x504: /* PC: 6b6.  b4, 2c, 36 written before read */
140		logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", cpu_get_pc(&space.device()), offset);
	140	logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space.device().safe_pc(), offset);
141	141	return 0x84;
142	142	}
143		logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", cpu_get_pc(&space.device()), offset);
	143	logerror("Protection PC %06x: warning - read unmapped memory address %04x\n", space.device().safe_pc(), offset);
144	144	return 0;
145	145	}
146	146

trunk/src/mame/drivers/missile.c

r17788	r17789
555	555	INLINE int get_madsel(address_space *space)
556	556	{
557	557	missile_state *state = space->machine().driver_data<missile_state>();
558		UINT16 pc = cpu_get_previouspc(&space->device());
	558	UINT16 pc = space->device().safe_pcbase();
559	559
560	560	/* if we're at a different instruction than last time, reset our delay counter */
561	561	if (pc != state->m_madsel_lastpc)
r17788	r17789
766	766
767	767	/* anything else */
768	768	else
769		logerror("%04X:Unknown write to %04X = %02X\n", cpu_get_pc(&space.device()), offset, data);
	769	logerror("%04X:Unknown write to %04X = %02X\n", space.device().safe_pc(), offset, data);
770	770	}
771	771
772	772
r17788	r17789
821	821
822	822	/* anything else */
823	823	else
824		logerror("%04X:Unknown read from %04X\n", cpu_get_pc(&space.device()), offset);
	824	logerror("%04X:Unknown read from %04X\n", space.device().safe_pc(), offset);
825	825	return result;
826	826	}
827	827

trunk/src/mame/drivers/igs_m027.c

r17788	r17789
80	80	{
81	81	COMBINE_DATA(&m_igs_cg_videoram[offset]);
82	82	//if(data!=0)
83		logerror("PC(%08X) CG @%x = %x!\n",cpu_get_pc(&space.device()),offset ,m_igs_cg_videoram[offset]);
	83	logerror("PC(%08X) CG @%x = %x!\n",space.device().safe_pc(),offset ,m_igs_cg_videoram[offset]);
84	84
85	85
86	86

trunk/src/mame/drivers/route16.c

r17788	r17789
941	941
942	942	READ8_MEMBER(route16_state::routex_prot_read)
943	943	{
944		if (cpu_get_pc(&space.device()) == 0x2f) return 0xfb;
	944	if (space.device().safe_pc() == 0x2f) return 0xfb;
945	945
946		logerror ("cpu '%s' (PC=%08X): unmapped prot read\n", space.device().tag(), cpu_get_pc(&space.device()));
	946	logerror ("cpu '%s' (PC=%08X): unmapped prot read\n", space.device().tag(), space.device().safe_pc());
947	947	return 0x00;
948	948
949	949	}

trunk/src/mame/drivers/tecmosys.c

r17788	r17789
239	239
240	240	case 0x22/2:
241	241	machine().watchdog_reset();
242		//logerror( "watchdog_w( %06x, %04x ) @ %06x\n", (offset * 2)+0x880000, data, cpu_get_pc(&space.device()) );
	242	//logerror( "watchdog_w( %06x, %04x ) @ %06x\n", (offset * 2)+0x880000, data, space.device().safe_pc() );
243	243	break;
244	244
245	245	default:
246		logerror( "unk880000_w( %06x, %04x ) @ %06x\n", (offset * 2)+0x880000, data, cpu_get_pc(&space.device()) );
	246	logerror( "unk880000_w( %06x, %04x ) @ %06x\n", (offset * 2)+0x880000, data, space.device().safe_pc() );
247	247	break;
248	248	}
249	249	}
r17788	r17789
252	252	{
253	253	//UINT16 ret = m_880000regs[offset];
254	254
255		logerror( "unk880000_r( %06x ) @ %06x = %04x\n", (offset * 2 ) +0x880000, cpu_get_pc(&space.device()), m_880000regs[offset] );
	255	logerror( "unk880000_r( %06x ) @ %06x = %04x\n", (offset * 2 ) +0x880000, space.device().safe_pc(), m_880000regs[offset] );
256	256
257	257	/* this code allows scroll regs to be updated, but tkdensho at least resets perodically */
258	258

trunk/src/mame/drivers/supbtime.c

r17788	r17789
46	46	return 0;
47	47	}
48	48
49		logerror("CPU #0 PC %06x: warning - read unmapped control address %06x\n", cpu_get_pc(&space.device()), offset);
	49	logerror("CPU #0 PC %06x: warning - read unmapped control address %06x\n", space.device().safe_pc(), offset);
50	50	return ~0;
51	51	}
52	52

trunk/src/mame/drivers/gbusters.c

r17788	r17789
56	56	/* other bits unused/unknown */
57	57	if (data & 0xfe)
58	58	{
59		//logerror("%04x: (1f98) write %02x\n",cpu_get_pc(&space.device()), data);
	59	//logerror("%04x: (1f98) write %02x\n",space.device().safe_pc(), data);
60	60	//popmessage("$1f98 = %02x", data);
61	61	}
62	62	}
r17788	r17789
84	84	sprintf(baf, "ccnt = %02x", data);
85	85	popmessage(baf);
86	86	#endif
87		logerror("%04x: (ccount) write %02x\n", cpu_get_pc(&space.device()), data);
	87	logerror("%04x: (ccount) write %02x\n", space.device().safe_pc(), data);
88	88	}
89	89	}
90	90
91	91	WRITE8_MEMBER(gbusters_state::gbusters_unknown_w)
92	92	{
93		logerror("%04x: write %02x to 0x1f9c\n",cpu_get_pc(&space.device()), data);
	93	logerror("%04x: write %02x to 0x1f9c\n",space.device().safe_pc(), data);
94	94
95	95	{
96	96	char baf[40];
r17788	r17789
430	430
431	431	if (lines & 0xf0)
432	432	{
433		//logerror("%04x: (lines) write %02x\n",cpu_get_pc(device), lines);
	433	//logerror("%04x: (lines) write %02x\n",device->safe_pc(), lines);
434	434	//popmessage("lines = %02x", lines);
435	435	}
436	436

trunk/src/mame/drivers/megaplay.c

r17788	r17789
573	573	state->m_bios_mode = MP_GAME;
574	574	state->m_readpos = 1;
575	575	//      popmessage("Game bank selected: 0x%03x", state->m_game_banksel);
576		logerror("BIOS [0x%04x]: 68K address space bank selected: 0x%03x\n", cpu_get_previouspc(&space->device()), state->m_game_banksel);
	576	logerror("BIOS [0x%04x]: 68K address space bank selected: 0x%03x\n", space->device().safe_pcbase(), state->m_game_banksel);
577	577	}
578	578
579	579	state->m_mp_bios_bank_addr = ((state->m_mp_bios_bank_addr >> 1) | (data << 23)) & 0xff8000;

trunk/src/mame/drivers/r2dtank.c

r17788	r17789
117	117	{
118	118	UINT8 ret = soundlatch_byte_r(space, 0);
119	119
120		if (LOG_AUDIO_COMM) logerror("%08X  CPU#1  Audio Command Read: %x\n", cpu_get_pc(&space.device()), ret);
	120	if (LOG_AUDIO_COMM) logerror("%08X  CPU#1  Audio Command Read: %x\n", space.device().safe_pc(), ret);
121	121
122	122	return ret;
123	123	}
r17788	r17789
128	128	soundlatch_byte_w(space, 0, ~data);
129	129	cputag_set_input_line(machine(), "audiocpu", M6800_IRQ_LINE, HOLD_LINE);
130	130
131		if (LOG_AUDIO_COMM) logerror("%08X   CPU#0  Audio Command Write: %x\n", cpu_get_pc(&space.device()), data^0xff);
	131	if (LOG_AUDIO_COMM) logerror("%08X   CPU#0  Audio Command Write: %x\n", space.device().safe_pc(), data^0xff);
132	132	}
133	133
134	134
135	135	READ8_MEMBER(r2dtank_state::audio_answer_r)
136	136	{
137	137	UINT8 ret = soundlatch2_byte_r(space, 0);
138		if (LOG_AUDIO_COMM) logerror("%08X  CPU#0  Audio Answer Read: %x\n", cpu_get_pc(&space.device()), ret);
	138	if (LOG_AUDIO_COMM) logerror("%08X  CPU#0  Audio Answer Read: %x\n", space.device().safe_pc(), ret);
139	139
140	140	return ret;
141	141	}
r17788	r17789
144	144	WRITE8_MEMBER(r2dtank_state::audio_answer_w)
145	145	{
146	146	/* HACK - prevents lock-up, but causes game to end some in-between sreens prematurely */
147		if (cpu_get_pc(&space.device()) == 0xfb12)
	147	if (space.device().safe_pc() == 0xfb12)
148	148	data = 0x00;
149	149
150	150	soundlatch2_byte_w(space, 0, data);
151	151	cputag_set_input_line(machine(), "maincpu", M6809_IRQ_LINE, HOLD_LINE);
152	152
153		if (LOG_AUDIO_COMM) logerror("%08X  CPU#1  Audio Answer Write: %x\n", cpu_get_pc(&space.device()), data);
	153	if (LOG_AUDIO_COMM) logerror("%08X  CPU#1  Audio Answer Write: %x\n", space.device().safe_pc(), data);
154	154	}
155	155
156	156

trunk/src/mame/drivers/crgolf.c

r17788	r17789
138	138
139	139	WRITE8_MEMBER(crgolf_state::unknown_w)
140	140	{
141		logerror("%04X:unknown_w = %02X\n", cpu_get_pc(&space.device()), data);
	141	logerror("%04X:unknown_w = %02X\n", space.device().safe_pc(), data);
142	142	}
143	143
144	144

trunk/src/mame/drivers/rmhaihai.c

r17788	r17789
103	103	{
104	104	static const char *const keynames[] = { "KEY0", "KEY1" };
105	105
106		logerror("%04x: keyboard_r\n",cpu_get_pc(&space.device()));
107		switch(cpu_get_pc(&space.device()))
	106	logerror("%04x: keyboard_r\n",space.device().safe_pc());
	107	switch(space.device().safe_pc())
108	108	{
109	109	/* read keyboard */
110	110	case 0x0aba:   // rmhaihai, rmhaisei
r17788	r17789
151	151
152	152	WRITE8_MEMBER(rmhaihai_state::keyboard_w)
153	153	{
154		logerror("%04x: keyboard_w %02x\n",cpu_get_pc(&space.device()),data);
	154	logerror("%04x: keyboard_w %02x\n",space.device().safe_pc(),data);
155	155	m_keyboard_cmd = data;
156	156	}
157	157

trunk/src/mame/drivers/topspeed.c

r17788	r17789
312	312
313	313	parse_control(machine());
314	314
315		logerror("CPU #0 PC %06x: write %04x to cpu control\n", cpu_get_pc(&space.device()), data);
	315	logerror("CPU #0 PC %06x: write %04x to cpu control\n", space.device().safe_pc(), data);
316	316	}
317	317
318	318
r17788	r17789
393	393	return 0x55;   /* motor cpu status ? */
394	394
395	395	default:
396		logerror("CPU #0 PC %06x: warning - read from motor cpu %03x\n", cpu_get_pc(&space.device()), offset);
	396	logerror("CPU #0 PC %06x: warning - read from motor cpu %03x\n", space.device().safe_pc(), offset);
397	397	return 0;
398	398	}
399	399	}
r17788	r17789
401	401	WRITE16_MEMBER(topspeed_state::topspeed_motor_w)
402	402	{
403	403	/* Writes $900000-25 and $900200-219 */
404		logerror("CPU #0 PC %06x: warning - write %04x to motor cpu %03x\n", cpu_get_pc(&space.device()), data, offset);
	404	logerror("CPU #0 PC %06x: warning - write %04x to motor cpu %03x\n", space.device().safe_pc(), data, offset);
405	405	}
406	406
407	407

trunk/src/mame/drivers/fantland.c

r17788	r17789
64	64	m_nmi_enable = data;
65	65
66	66	if ((m_nmi_enable != 0) && (m_nmi_enable != 8))
67		logerror("CPU #0 PC = %04X: nmi_enable = %02x\n", cpu_get_pc(&space.device()), data);
	67	logerror("CPU #0 PC = %04X: nmi_enable = %02x\n", space.device().safe_pc(), data);
68	68	}
69	69
70	70	WRITE16_MEMBER(fantland_state::fantland_nmi_enable_16_w)
r17788	r17789
169	169	// data & 0x31 changes when lightgun fires
170	170
171	171	if ((m_nmi_enable != 0) && (m_nmi_enable != 8))
172		logerror("CPU #0 PC = %04X: nmi_enable = %02x\n", cpu_get_pc(&space.device()), data);
	172	logerror("CPU #0 PC = %04X: nmi_enable = %02x\n", space.device().safe_pc(), data);
173	173
174	174	//  popmessage("%02X", data);
175	175	}
r17788	r17789
345	345	{
346	346	case 0x00:      borntofi_adpcm_stop(msm, voice); break;
347	347	case 0x03:      borntofi_adpcm_start(msm, voice); break;
348		default:      logerror("CPU #0 PC = %04X: adpcm reg %d <- %02x\n", cpu_get_pc(&space.device()), reg, data);
	348	default:      logerror("CPU #0 PC = %04X: adpcm reg %d <- %02x\n", space.device().safe_pc(), reg, data);
349	349	}
350	350	}
351	351	else

trunk/src/mame/drivers/thunderx.c

r17788	r17789
62	62	{
63	63	if (m_pmcbank)
64	64	{
65		//          logerror("%04x read pmcram %04x\n",cpu_get_pc(&space.device()),offset);
	65	//          logerror("%04x read pmcram %04x\n",space.device().safe_pc(),offset);
66	66	return m_pmcram[offset];
67	67	}
68	68	else
69	69	{
70		logerror("%04x read pmc internal ram %04x\n",cpu_get_pc(&space.device()),offset);
	70	logerror("%04x read pmc internal ram %04x\n",space.device().safe_pc(),offset);
71	71	return 0;
72	72	}
73	73	}
r17788	r17789
84	84	{
85	85	if (m_pmcbank)
86	86	{
87		logerror("%04x pmcram %04x = %02x\n",cpu_get_pc(&space.device()),offset,data);
	87	logerror("%04x pmcram %04x = %02x\n",space.device().safe_pc(),offset,data);
88	88	m_pmcram[offset] = data;
89	89	}
90	90	else
91		logerror("%04x pmc internal ram %04x = %02x\n",cpu_get_pc(&space.device()),offset,data);
	91	logerror("%04x pmc internal ram %04x = %02x\n",space.device().safe_pc(),offset,data);
92	92	}
93	93	else
94	94	paletteram_xBBBBBGGGGGRRRRR_byte_be_w(space, offset, data);
r17788	r17789
293	293	WRITE8_MEMBER(thunderx_state::thunderx_1f98_w)
294	294	{
295	295
296		// logerror("%04x: 1f98_w %02x\n", cpu_get_pc(&space.device()),data);
	296	// logerror("%04x: 1f98_w %02x\n", space.device().safe_pc(),data);
297	297
298	298	/* bit 0 = enable char ROM reading through the video RAM */
299	299	k052109_set_rmrd_line(m_k052109, (data & 0x01) ? ASSERT_LINE : CLEAR_LINE);
r17788	r17789
318	318	UINT8 *RAM = memregion("maincpu")->base();
319	319	int offs;
320	320
321		//logerror("%04x: bank switch %02x\n",cpu_get_pc(&space.device()),data);
	321	//logerror("%04x: bank switch %02x\n",space.device().safe_pc(),data);
322	322
323	323	/* bits 0-3 ROM bank */
324	324	offs = 0x10000 + (data & 0x0f)*0x2000;
r17788	r17789
337	337
338	338	WRITE8_MEMBER(thunderx_state::thunderx_videobank_w)
339	339	{
340		//logerror("%04x: select video ram bank %02x\n",cpu_get_pc(&space.device()),data);
	340	//logerror("%04x: select video ram bank %02x\n",space.device().safe_pc(),data);
341	341	/* 0x01 = work RAM at 4000-5fff */
342	342	/* 0x00 = palette at 5800-5fff */
343	343	/* 0x10 = unknown RAM at 5800-5fff */
r17788	r17789
991	991
992	992	static KONAMI_SETLINES_CALLBACK( thunderx_banking )
993	993	{
994		//logerror("thunderx %04x: bank select %02x\n", cpu_get_pc(device->cpu), lines);
	994	//logerror("thunderx %04x: bank select %02x\n", device->cpu->safe_pc(), lines);
995	995	device->machine().root_device().membank("bank1")->set_entry(((lines & 0x0f) ^ 0x08));
996	996	}
997	997

trunk/src/mame/drivers/sothello.c

r17788	r17789
214	214	}
215	215	else
216	216	{
217		logerror("Sub cpu active! @%x\n",cpu_get_pc(&space->device()));
	217	logerror("Sub cpu active! @%x\n",space->device().safe_pc());
218	218	}
219	219	}
220	220

trunk/src/mame/drivers/tumbleb.c

r17788	r17789
3199	3199
3200	3200	READ16_MEMBER(tumbleb_state::bcstory_1a0_read)
3201	3201	{
3202		//mame_printf_debug("bcstory_io %06x\n",cpu_get_pc(&space.device()));
	3202	//mame_printf_debug("bcstory_io %06x\n",space.device().safe_pc());
3203	3203
3204		if (cpu_get_pc(&space.device())==0x0560) return 0x1a0;
	3204	if (space.device().safe_pc()==0x0560) return 0x1a0;
3205	3205	else return ioport("SYSTEM")->read();
3206	3206	}
3207	3207

trunk/src/mame/drivers/cd32.c

r17788	r17789
1236	1236	{
1237	1237	cd32_state *state = machine.driver_data<cd32_state>();
1238	1238
1239		if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
	1239	if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
1240	1240	{
1241	1241	//(*state->m_chip_ram_w)(0x051c02, 0x0000);
1242	1242
r17788	r17789
1255	1255	{
1256	1256	cd32_state *state = machine.driver_data<cd32_state>();
1257	1257
1258		if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
	1258	if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
1259	1259	{
1260	1260	//amiga_chip_ram_w8(state, 0x002907, 0x00);
1261	1261
r17788	r17789
1275	1275	{
1276	1276	cd32_state *state = machine.driver_data<cd32_state>();
1277	1277
1278		if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
	1278	if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
1279	1279	{
1280	1280	//amiga_chip_ram_w8(state, 0x001e1b, 0x00);
1281	1281
r17788	r17789
1296	1296	{
1297	1297	cd32_state *state = machine.driver_data<cd32_state>();
1298	1298
1299		if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
	1299	if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
1300	1300	{
1301	1301	//amiga_chip_ram_w8(state, 0x046107, 0x00);
1302	1302
r17788	r17789
1316	1316	{
1317	1317	cd32_state *state = machine.driver_data<cd32_state>();
1318	1318
1319		if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
	1319	if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
1320	1320	{
1321	1321	//amiga_chip_ram_w8(state, 0x00281c, 0x00);
1322	1322
r17788	r17789
1336	1336	{
1337	1337	cd32_state *state = machine.driver_data<cd32_state>();
1338	1338
1339		if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
	1339	if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
1340	1340	{
1341	1341	//(*state->m_chip_ram_w)(0x04bfa0, 0x0000);
1342	1342
r17788	r17789
1355	1355	{
1356	1356	cd32_state *state = machine.driver_data<cd32_state>();
1357	1357
1358		if (cpu_get_pc(machine.device("maincpu")) < state->m_chip_ram.bytes())
	1358	if (machine.device("maincpu")->safe_pc() < state->m_chip_ram.bytes())
1359	1359	{
1360	1360	//amiga_chip_ram_w8(state, 0x044f7e, 0x00);
1361	1361

trunk/src/mame/drivers/taitotz.c

r17788	r17789
1587	1587	case 0xb:
1588	1588	{
1589	1589	m_video_ram_ptr = m_video_reg & 0xfffffff;
1590		//logerror("video_chip_ram sel %08X at %08X\n", m_video_reg & 0x0fffffff, cpu_get_pc(&space.device()));
	1590	//logerror("video_chip_ram sel %08X at %08X\n", m_video_reg & 0x0fffffff, space.device().safe_pc());
1591	1591	break;
1592	1592	}
1593	1593	case 0x0:
r17788	r17789
1675	1675	{
1676	1676	if (m_video_fifo_ptr >= 8)
1677	1677	{
1678		logerror("FIFO packet w: %08X at %08X\n", (UINT32)(data >> 32), cpu_get_pc(&space.device()));
	1678	logerror("FIFO packet w: %08X at %08X\n", (UINT32)(data >> 32), space.device().safe_pc());
1679	1679	}
1680	1680	m_video_fifo_ptr++;
1681	1681	}
r17788	r17789
1683	1683	{
1684	1684	if (m_video_fifo_ptr >= 8)
1685	1685	{
1686		logerror("FIFO packet w: %08X at %08X\n", (UINT32)(data), cpu_get_pc(&space.device()));
	1686	logerror("FIFO packet w: %08X at %08X\n", (UINT32)(data), space.device().safe_pc());
1687	1687	}
1688	1688	m_video_fifo_ptr++;
1689	1689	}

trunk/src/mame/drivers/cabaret.c

r17788	r17789
140	140	{
141	141	if ((m_nmi_enable ^ data) & (~0xdd))
142	142	{
143		logerror("PC %06X: nmi_and_coins = %02x\n",cpu_get_pc(&space.device()),data);
	143	logerror("PC %06X: nmi_and_coins = %02x\n",space.device().safe_pc(),data);
144	144	//      popmessage("%02x",data);
145	145	}
146	146

trunk/src/mame/drivers/lastfght.c

r17788	r17789
210	210	{
211	211
212	212	if (ACCESSING_BITS_8_15)
213		logerror("%06x: 600000.b = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	213	logerror("%06x: 600000.b = %02x\n", space.device().safe_pc(), data >> 8);
214	214	if (ACCESSING_BITS_0_7)
215	215	{
216	216	m_hi = data << 8;
217		//logerror("%06x: lastfght_hi  = %02x\n", cpu_get_pc(&space.device()), data);
	217	//logerror("%06x: lastfght_hi  = %02x\n", space.device().safe_pc(), data);
218	218	}
219	219	}
220	220
r17788	r17789
223	223	{
224	224
225	225	if (ACCESSING_BITS_8_15)
226		logerror("%06x: 800008.b = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	226	logerror("%06x: 800008.b = %02x\n", space.device().safe_pc(), data >> 8);
227	227	if (ACCESSING_BITS_0_7)
228	228	{
229	229	m_x = m_hi | data;
230		//logerror("%06x: lastfght_x   = %02x\n", cpu_get_pc(&space.device()),data);
	230	//logerror("%06x: lastfght_x   = %02x\n", space.device().safe_pc(),data);
231	231	}
232	232	}
233	233
r17788	r17789
238	238	if (ACCESSING_BITS_8_15)
239	239	{
240	240	m_y = m_hi | (data >> 8);
241		//logerror("%06x: lastfght_y   = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	241	//logerror("%06x: lastfght_y   = %02x\n", space.device().safe_pc(), data >> 8);
242	242	}
243	243	if (ACCESSING_BITS_0_7)
244	244	{
245	245	m_w = m_hi | data;
246		//logerror("%06x: lastfght_w   = %02x\n", cpu_get_pc(&space.device()), data);
	246	//logerror("%06x: lastfght_w   = %02x\n", space.device().safe_pc(), data);
247	247	}
248	248	}
249	249
r17788	r17789
254	254	if (ACCESSING_BITS_8_15)
255	255	{
256	256	m_h = m_hi | (data >> 8);
257		//logerror("%06x: lastfght_h   = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	257	//logerror("%06x: lastfght_h   = %02x\n", space.device().safe_pc(), data >> 8);
258	258	}
259	259	if (ACCESSING_BITS_0_7)
260		logerror("%06x: 80000d.b = %02x\n", cpu_get_pc(&space.device()), data);
	260	logerror("%06x: 80000d.b = %02x\n", space.device().safe_pc(), data);
261	261	}
262	262
263	263	// source delta x << 6, source x << 6
r17788	r17789
267	267	if (ACCESSING_BITS_8_15)
268	268	{
269	269	m_dsx = m_hi | (data >> 8);
270		//logerror("%06x: lastfght_dsx = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	270	//logerror("%06x: lastfght_dsx = %02x\n", space.device().safe_pc(), data >> 8);
271	271	}
272	272	if (ACCESSING_BITS_0_7)
273	273	{
274	274	m_sx = m_hi | data;
275		//logerror("%06x: lastfght_sx  = %02x\n", cpu_get_pc(&space.device()), data);
	275	//logerror("%06x: lastfght_sx  = %02x\n", space.device().safe_pc(), data);
276	276	}
277	277	}
278	278
r17788	r17789
283	283	if (ACCESSING_BITS_8_15)
284	284	{
285	285	m_sy = m_hi | (data >> 8);
286		//logerror("%06x: lastfght_sy  = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	286	//logerror("%06x: lastfght_sy  = %02x\n", space.device().safe_pc(), data >> 8);
287	287	}
288	288	if (ACCESSING_BITS_0_7)
289	289	{
290	290	m_sy1 = m_hi | data;
291		//logerror("%06x: lastfght_sy1 = %02x\n", cpu_get_pc(&space.device()), data);
	291	//logerror("%06x: lastfght_sy1 = %02x\n", space.device().safe_pc(), data);
292	292	}
293	293	}
294	294
r17788	r17789
299	299	if (ACCESSING_BITS_8_15)
300	300	{
301	301	m_sp = (m_hi >> 8) >> 4;
302		//logerror("%06x: lastfght_sp  = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	302	//logerror("%06x: lastfght_sp  = %02x\n", space.device().safe_pc(), data >> 8);
303	303	}
304	304	if (ACCESSING_BITS_0_7)
305	305	{
306	306	m_sr = data;
307		//logerror("%06x: lastfght_sr  = %02x\n", cpu_get_pc(&space.device()), data);
	307	//logerror("%06x: lastfght_sr  = %02x\n", space.device().safe_pc(), data);
308	308	}
309	309	}
310	310
r17788	r17789
315	315	if (ACCESSING_BITS_8_15)
316	316	{
317	317	m_sx1 = m_hi | (data >> 8);
318		//logerror("%06x: lastfght_sx1 = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	318	//logerror("%06x: lastfght_sx1 = %02x\n", space.device().safe_pc(), data >> 8);
319	319	}
320	320	if (ACCESSING_BITS_0_7)
321	321	{
322	322	m_dsy = m_hi | data;
323		//logerror("%06x: lastfght_dsy = %02x\n", cpu_get_pc(&space.device()), data);
	323	//logerror("%06x: lastfght_dsy = %02x\n", space.device().safe_pc(), data);
324	324	}
325	325	}
326	326
r17788	r17789
335	335	bitmap_ind16 &dest = m_bitmap[m_dest];
336	336
337	337	#if 0
338		logerror("%06x: blit x %03x, y %03x, w %03x, h %03x, sx %03x.%02x, sx1 %03x.%02x, dsx %03x.%02x, sy %03x.%02x, sy1 %03x.%02x, dsy %03x.%02x, sp %02x, sr %02x, data %02x\n", cpu_get_pc(&space.device()),
	338	logerror("%06x: blit x %03x, y %03x, w %03x, h %03x, sx %03x.%02x, sx1 %03x.%02x, dsx %03x.%02x, sy %03x.%02x, sy1 %03x.%02x, dsy %03x.%02x, sp %02x, sr %02x, data %02x\n", space.device().safe_pc(),
339	339	m_x, m_y, m_w + 1, m_h + 1,
340	340	m_sx >> 6, m_sx & 0x3f, m_sx1 >> 6, m_dsx & 0x3f, m_sx1 >> 6, m_sx1 & 0x3f,
341	341	m_sy >> 6, m_sy & 0x3f, m_sy1 >> 6, m_dsy & 0x3f, m_sy1 >> 6, m_sy1 & 0x3f,
r17788	r17789
359	359	}
360	360	}
361	361	if (ACCESSING_BITS_0_7)
362		logerror("%06x: 600007.b = %02x\n", cpu_get_pc(&space.device()), data);
	362	logerror("%06x: 600007.b = %02x\n", space.device().safe_pc(), data);
363	363	}
364	364
365	365	// toggle framebuffer
r17788	r17789
415	415	WRITE16_MEMBER(lastfght_state::lastfght_sound_w)
416	416	{
417	417	if (ACCESSING_BITS_8_15)
418		logerror("%06x: sound_w msb = %02x\n", cpu_get_pc(&space.device()), data >> 8);
	418	logerror("%06x: sound_w msb = %02x\n", space.device().safe_pc(), data >> 8);
419	419	if (ACCESSING_BITS_0_7)
420		logerror("%06x: sound_w lsb = %02x\n", cpu_get_pc(&space.device()), data);
	420	logerror("%06x: sound_w lsb = %02x\n", space.device().safe_pc(), data);
421	421	}
422	422
423	423	/***************************************************************************

trunk/src/mame/drivers/superqix.c

r17788	r17789
172	172
173	173	READ8_MEMBER(superqix_state::in4_mcu_r)
174	174	{
175		//  logerror("%04x: in4_mcu_r\n",cpu_get_pc(&space->device()));
	175	//  logerror("%04x: in4_mcu_r\n",space->device().safe_pc());
176	176	return ioport("P2")->read() | (m_from_mcu_pending << 6) | (m_from_z80_pending << 7);
177	177	}
178	178
179	179	READ8_MEMBER(superqix_state::sqix_from_mcu_r)
180	180	{
181		//  logerror("%04x: read mcu answer (%02x)\n",cpu_get_pc(&space->device()),m_from_mcu);
	181	//  logerror("%04x: read mcu answer (%02x)\n",space->device().safe_pc(),m_from_mcu);
182	182	return m_from_mcu;
183	183	}
184	184
r17788	r17789
198	198
199	199	WRITE8_MEMBER(superqix_state::sqix_z80_mcu_w)
200	200	{
201		//  logerror("%04x: sqix_z80_mcu_w %02x\n",cpu_get_pc(&space->device()),data);
	201	//  logerror("%04x: sqix_z80_mcu_w %02x\n",space->device().safe_pc(),data);
202	202	m_portb = data;
203	203	}
204	204
r17788	r17789
234	234	case 7:
235	235	if ((data & 1) == 0)
236	236	{
237		//              logerror("%04x: MCU -> Z80 %02x\n",cpu_get_pc(&space.device()),m_port3);
	237	//              logerror("%04x: MCU -> Z80 %02x\n",space.device().safe_pc(),m_port3);
238	238	m_from_mcu = m_port3_latch;
239	239	m_from_mcu_pending = 1;
240	240	m_from_z80_pending = 0;   // ????
r17788	r17789
260	260	}
261	261	else if ((m_port1 & 0x40) == 0)
262	262	{
263		//      logerror("%04x: read Z80 command %02x\n",cpu_get_pc(&space.device()),m_from_z80);
	263	//      logerror("%04x: read Z80 command %02x\n",space.device().safe_pc(),m_from_z80);
264	264	m_from_z80_pending = 0;
265	265	return m_from_z80;
266	266	}
r17788	r17789
297	297	// bit 7 = clock latch from port 3 to Z80
298	298	if ((m_port2 & 0x80) != 0 && (data & 0x80) == 0)
299	299	{
300		//      logerror("%04x: MCU -> Z80 %02x\n",cpu_get_pc(&space.device()),m_port3);
	300	//      logerror("%04x: MCU -> Z80 %02x\n",space.device().safe_pc(),m_port3);
301	301	m_from_mcu = m_port3;
302	302	m_from_mcu_pending = 1;
303	303	m_from_z80_pending = 0;   // ????
r17788	r17789
308	308
309	309	READ8_MEMBER(superqix_state::sqixu_mcu_p3_r)
310	310	{
311		//  logerror("%04x: read Z80 command %02x\n",cpu_get_pc(&space.device()),m_from_z80);
	311	//  logerror("%04x: read Z80 command %02x\n",space.device().safe_pc(),m_from_z80);
312	312	m_from_z80_pending = 0;
313	313	return m_from_z80;
314	314	}
r17788	r17789
403	403
404	404	READ8_MEMBER(superqix_state::hotsmash_68705_portA_r)
405	405	{
406		//  logerror("%04x: 68705 reads port A = %02x\n",cpu_get_pc(&space.device()),m_portA_in);
	406	//  logerror("%04x: 68705 reads port A = %02x\n",space.device().safe_pc(),m_portA_in);
407	407	return m_portA_in;
408	408	}
409	409
r17788	r17789
438	438
439	439	case 0x3:   // command from Z80
440	440	m_portA_in = m_from_z80;
441		//              logerror("%04x: z80 reads command %02x\n",cpu_get_pc(&space.device()),m_from_z80);
	441	//              logerror("%04x: z80 reads command %02x\n",space.device().safe_pc(),m_from_z80);
442	442	break;
443	443
444	444	case 0x4:
r17788	r17789
466	466
467	467	READ8_MEMBER(superqix_state::hotsmash_from_mcu_r)
468	468	{
469		//  logerror("%04x: z80 reads answer %02x\n",cpu_get_pc(&space.device()),m_from_mcu);
	469	//  logerror("%04x: z80 reads answer %02x\n",space.device().safe_pc(),m_from_mcu);
470	470	m_from_mcu_pending = 0;
471	471	return m_from_mcu;
472	472	}
473	473
474	474	READ8_MEMBER(superqix_state::hotsmash_ay_port_a_r)
475	475	{
476		//  logerror("%04x: ay_port_a_r and mcu_pending is %d\n",cpu_get_pc(&space->device()),m_from_mcu_pending);
	476	//  logerror("%04x: ay_port_a_r and mcu_pending is %d\n",space->device().safe_pc(),m_from_mcu_pending);
477	477	return ioport("SYSTEM")->read() | 0x40 | ((m_from_mcu_pending^1) << 7);
478	478	}
479	479
r17788	r17789
509	509	case 0x81: m_curr_player = 1; return 0;
510	510	}
511	511
512		//  logerror("408[%x] r at %x\n",m_from_z80,cpu_get_pc(&space.device()));
	512	//  logerror("408[%x] r at %x\n",m_from_z80,space.device().safe_pc());
513	513	return 0;
514	514	}
515	515
516	516	READ8_MEMBER(superqix_state::pbillian_ay_port_a_r)
517	517	{
518		//  logerror("%04x: ay_port_a_r\n",cpu_get_pc(&space->device()));
	518	//  logerror("%04x: ay_port_a_r\n",space->device().safe_pc());
519	519	/* bits 76------  MCU status bits */
520	520	return (machine().rand() & 0xc0) | machine().root_device().ioport("BUTTONS")->read();
521	521	}

trunk/src/mame/drivers/bfm_sc4h.c

r17788	r17789
64	64
65	65	READ16_MEMBER(sc4_state::sc4_cs1_r)
66	66	{
67		int pc = cpu_get_pc(&space.device());
	67	int pc = space.device().safe_pc();
68	68
69	69	if (offset<0x100000/2)
70	70	{
r17788	r17789
113	113
114	114	READ16_MEMBER(sc4_state::sc4_mem_r)
115	115	{
116		int pc = cpu_get_pc(&space.device());
	116	int pc = space.device().safe_pc();
117	117	int cs = m68307_get_cs(m_maincpu, offset * 2);
118	118	int base = 0, end = 0, base2 = 0, end2 = 0;
119	119	//  if (!(debugger_access())) printf("cs is %d\n", cs);
r17788	r17789
269	269
270	270	WRITE16_MEMBER(sc4_state::sc4_mem_w)
271	271	{
272		int pc = cpu_get_pc(&space.device());
	272	int pc = space.device().safe_pc();
273	273	int cs = m68307_get_cs(m_maincpu, offset * 2);
274	274	int base = 0, end = 0, base2 = 0, end2 = 0;
275	275
r17788	r17789
395	395
396	396	READ32_MEMBER(sc4_adder4_state::adder4_mem_r)
397	397	{
398		int pc = cpu_get_pc(&space.device());
	398	int pc = space.device().safe_pc();
399	399	int cs = m68340_get_cs(m_adder4cpu, offset * 4);
400	400
401	401	switch ( cs )
r17788	r17789
417	417
418	418	WRITE32_MEMBER(sc4_adder4_state::adder4_mem_w)
419	419	{
420		int pc = cpu_get_pc(&space.device());
	420	int pc = space.device().safe_pc();
421	421	int cs = m68340_get_cs(m_adder4cpu, offset * 4);
422	422
423	423	switch ( cs )
r17788	r17789
554	554	{
555	555	//  if (dedicated == false)
556	556	{
557		int pc = cpu_get_pc(&space->device());
	557	int pc = space->device().safe_pc();
558	558	//m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
559	559	// serial output to the VFD at least..
560	560	logerror("%08x bfm_sc4_68307_portb_w %04x %04x\n", pc, data, line_mask);
r17788	r17789
567	567	}
568	568	UINT8 bfm_sc4_68307_porta_r(address_space *space, bool dedicated, UINT8 line_mask)
569	569	{
570		int pc = cpu_get_pc(&space->device());
	570	int pc = space->device().safe_pc();
571	571	logerror("%08x bfm_sc4_68307_porta_r\n", pc);
572	572	return space->machine().rand();
573	573	}

trunk/src/mame/drivers/tigeroad.c

r17788	r17789
84	84	tigeroad_state *state = space->machine().driver_data<tigeroad_state>();
85	85	int indx;
86	86	int value = 255;
87		int prevpc = cpu_get_previouspc(&space->device());
	87	int prevpc = space->device().safe_pcbase();
88	88
89	89	if (prevpc == 0x244c)
90	90	{
r17788	r17789
145	145
146	146	WRITE16_MEMBER(tigeroad_state::f1dream_control_w)
147	147	{
148		logerror("protection write, PC: %04x  FFE1 Value:%01x\n",cpu_get_pc(&space.device()), m_ram16[0x3fe0/2]);
	148	logerror("protection write, PC: %04x  FFE1 Value:%01x\n",space.device().safe_pc(), m_ram16[0x3fe0/2]);
149	149	f1dream_protection_w(&space);
150	150	}
151	151

trunk/src/mame/drivers/spaceg.c

r17788	r17789
255	255	break;
256	256
257	257	default:
258		logerror("mode = %02x pc = %04x\n", *m_io9401, cpu_get_pc(&space.device()));
259		popmessage("mode = %02x pc = %04x\n", *m_io9401, cpu_get_pc(&space.device()));
	258	logerror("mode = %02x pc = %04x\n", *m_io9401, space.device().safe_pc());
	259	popmessage("mode = %02x pc = %04x\n", *m_io9401, space.device().safe_pc());
260	260	return;
261	261	}
262	262

trunk/src/mame/drivers/gei.c

r17788	r17789
260	260
261	261	READ8_MEMBER(gei_state::catchall)
262	262	{
263		int pc = cpu_get_pc(&space.device());
	263	int pc = space.device().safe_pc();
264	264
265	265	if (pc != 0x3c74 && pc != 0x0364 && pc != 0x036d)   /* weed out spurious blit reads */
266	266	logerror("%04x: unmapped memory read from %04x\n",pc,offset);

trunk/src/mame/drivers/segas32.c

r17788	r17789
452	452	segas32_state *state = space->machine().driver_data<segas32_state>();
453	453	int duration;
454	454
455		//  logerror("%06X:int_control_w(%X) = %02X\n", cpu_get_pc(&space->device()), offset, data);
	455	//  logerror("%06X:int_control_w(%X) = %02X\n", space->device().safe_pc(), offset, data);
456	456	switch (offset)
457	457	{
458	458	case 0:
r17788	r17789
765	765	if (!m_custom_io_r[0].isnull())
766	766	return (m_custom_io_r[0])(space, offset, mem_mask);
767	767	else
768		logerror("%06X:io_expansion_r(%X)\n", cpu_get_pc(&space.device()), offset);
	768	logerror("%06X:io_expansion_r(%X)\n", space.device().safe_pc(), offset);
769	769	return 0xffff;
770	770	}
771	771
r17788	r17789
779	779	if (!m_custom_io_w[0].isnull())
780	780	(m_custom_io_w[0])(space, offset, data, mem_mask);
781	781	else
782		logerror("%06X:io_expansion_w(%X) = %02X\n", cpu_get_pc(&space.device()), offset, data & 0xff);
	782	logerror("%06X:io_expansion_w(%X) = %02X\n", space.device().safe_pc(), offset, data & 0xff);
783	783	}
784	784
785	785
r17788	r17789
789	789	return (m_custom_io_r[0])(space, offset*2+0, mem_mask) |
790	790	((m_custom_io_r[0])(space, offset*2+1, mem_mask >> 16) << 16);
791	791	else
792		logerror("%06X:io_expansion_r(%X)\n", cpu_get_pc(&space.device()), offset);
	792	logerror("%06X:io_expansion_r(%X)\n", space.device().safe_pc(), offset);
793	793	return 0xffffffff;
794	794	}
795	795
r17788	r17789
808	808	if (!m_custom_io_w[0].isnull())
809	809	(m_custom_io_w[0])(space, offset*2+0, data, mem_mask);
810	810	else
811		logerror("%06X:io_expansion_w(%X) = %02X\n", cpu_get_pc(&space.device()), offset, data & 0xff);
	811	logerror("%06X:io_expansion_w(%X) = %02X\n", space.device().safe_pc(), offset, data & 0xff);
812	812
813	813	}
814	814	if (ACCESSING_BITS_16_23)
r17788	r17789
816	816	if (!m_custom_io_w[0].isnull())
817	817	(m_custom_io_w[0])(space, offset*2+1, data >> 16, mem_mask >> 16);
818	818	else
819		logerror("%06X:io_expansion_w(%X) = %02X\n", cpu_get_pc(&space.device()), offset, data & 0xff);
	819	logerror("%06X:io_expansion_w(%X) = %02X\n", space.device().safe_pc(), offset, data & 0xff);
820	820	}
821	821	}
822	822
r17788	r17789
827	827	return (m_custom_io_r[1])(space, offset*2+0, mem_mask) |
828	828	((m_custom_io_r[1])(space, offset*2+1, mem_mask >> 16) << 16);
829	829	else
830		logerror("%06X:io_expansion_r(%X)\n", cpu_get_pc(&space.device()), offset);
	830	logerror("%06X:io_expansion_r(%X)\n", space.device().safe_pc(), offset);
831	831	return 0xffffffff;
832	832	}
833	833
r17788	r17789
840	840	if (!m_custom_io_w[1].isnull())
841	841	(m_custom_io_w[1])(space, offset*2+0, data, mem_mask);
842	842	else
843		logerror("%06X:io_expansion_w(%X) = %02X\n", cpu_get_pc(&space.device()), offset, data & 0xff);
	843	logerror("%06X:io_expansion_w(%X) = %02X\n", space.device().safe_pc(), offset, data & 0xff);
844	844	}
845	845	if (ACCESSING_BITS_16_23)
846	846	{
847	847	if (!m_custom_io_w[1].isnull())
848	848	(m_custom_io_w[1])(space, offset*2+1, data >> 16, mem_mask >> 16);
849	849	else
850		logerror("%06X:io_expansion_w(%X) = %02X\n", cpu_get_pc(&space.device()), offset, data & 0xff);
	850	logerror("%06X:io_expansion_w(%X) = %02X\n", space.device().safe_pc(), offset, data & 0xff);
851	851	}
852	852	}
853	853
r17788	r17789
872	872	m_analog_value[offset & 3] <<= 1;
873	873	return result;
874	874	}
875		logerror("%06X:unknown analog_custom_io_r(%X) & %04X\n", cpu_get_pc(&space.device()), offset*2, mem_mask);
	875	logerror("%06X:unknown analog_custom_io_r(%X) & %04X\n", space.device().safe_pc(), offset*2, mem_mask);
876	876	return 0xffff;
877	877	}
878	878
r17788	r17789
889	889	m_analog_value[offset & 3] = ioport(names[offset & 3])->read_safe(0);
890	890	return;
891	891	}
892		logerror("%06X:unknown analog_custom_io_w(%X) = %04X & %04X\n", cpu_get_pc(&space.device()), offset*2, data, mem_mask);
	892	logerror("%06X:unknown analog_custom_io_w(%X) = %04X & %04X\n", space.device().safe_pc(), offset*2, data, mem_mask);
893	893	}
894	894
895	895
r17788	r17789
905	905	return ioport(names[offset & 3])->read_safe(0xffff);
906	906	}
907	907
908		logerror("%06X:unknown extra_custom_io_r(%X) & %04X\n", cpu_get_pc(&space.device()), offset*2, mem_mask);
	908	logerror("%06X:unknown extra_custom_io_r(%X) & %04X\n", space.device().safe_pc(), offset*2, mem_mask);
909	909	return 0xffff;
910	910	}
911	911
r17788	r17789
926	926	m_analog_bank = data & 1;
927	927	return;
928	928	}
929		logerror("%06X:unknown orunners_custom_io_w(%X) = %04X & %04X\n", cpu_get_pc(&space.device()), offset*2, data, mem_mask);
	929	logerror("%06X:unknown orunners_custom_io_w(%X) = %04X & %04X\n", space.device().safe_pc(), offset*2, data, mem_mask);
930	930	}
931	931
932	932
r17788	r17789
945	945	return (UINT8)(ioport(names[offset/2])->read() - m_sonic_last[offset/2]);
946	946	}
947	947
948		logerror("%06X:unknown sonic_custom_io_r(%X) & %04X\n", cpu_get_pc(&space.device()), offset*2, mem_mask);
	948	logerror("%06X:unknown sonic_custom_io_r(%X) & %04X\n", space.device().safe_pc(), offset*2, mem_mask);
949	949	return 0xffff;
950	950	}
951	951
r17788	r17789
964	964	return;
965	965	}
966	966
967		logerror("%06X:unknown sonic_custom_io_w(%X) = %04X & %04X\n", cpu_get_pc(&space.device()), offset*2, data, mem_mask);
	967	logerror("%06X:unknown sonic_custom_io_w(%X) = %04X & %04X\n", space.device().safe_pc(), offset*2, data, mem_mask);
968	968	}
969	969
970	970
r17788	r17789
977	977
978	978	WRITE16_MEMBER(segas32_state::random_number_16_w)
979	979	{
980		//  mame_printf_debug("%06X:random_seed_w(%04X) = %04X & %04X\n", cpu_get_pc(&space.device()), offset*2, data, mem_mask);
	980	//  mame_printf_debug("%06X:random_seed_w(%04X) = %04X & %04X\n", space.device().safe_pc(), offset*2, data, mem_mask);
981	981	}
982	982
983	983	READ16_MEMBER(segas32_state::random_number_16_r)
r17788	r17789
987	987
988	988	WRITE32_MEMBER(segas32_state::random_number_32_w)
989	989	{
990		//  mame_printf_debug("%06X:random_seed_w(%04X) = %04X & %04X\n", cpu_get_pc(&space.device()), offset*2, data, mem_mask);
	990	//  mame_printf_debug("%06X:random_seed_w(%04X) = %04X & %04X\n", space.device().safe_pc(), offset*2, data, mem_mask);
991	991	}
992	992
993	993	READ32_MEMBER(segas32_state::random_number_32_r)

trunk/src/mame/drivers/looping.c

r17788	r17789
444	444	WRITE8_MEMBER(looping_state::out_0_w){ mame_printf_debug("out0 = %02X\n", data); }
445	445	WRITE8_MEMBER(looping_state::out_2_w){ mame_printf_debug("out2 = %02X\n", data); }
446	446
447		READ8_MEMBER(looping_state::adc_r){ mame_printf_debug("%04X:ADC read\n", cpu_get_pc(&space.device())); return 0xff; }
448		WRITE8_MEMBER(looping_state::adc_w){ mame_printf_debug("%04X:ADC write = %02X\n", cpu_get_pc(&space.device()), data); }
	447	READ8_MEMBER(looping_state::adc_r){ mame_printf_debug("%04X:ADC read\n", space.device().safe_pc()); return 0xff; }
	448	WRITE8_MEMBER(looping_state::adc_w){ mame_printf_debug("%04X:ADC write = %02X\n", space.device().safe_pc(), data); }
449	449
450	450	WRITE8_MEMBER(looping_state::plr2_w)
451	451	{

trunk/src/mame/drivers/slapfght.c

r17788	r17789
1770	1770	6D38: 20 F8         jr   nz,$6D32
1771	1771	6D3A: 10 E0         djnz $6D1C
1772	1772	*/
1773		if (cpu_get_pc(&space.device()) == 0x6d1e) return 0;
1774		if (cpu_get_pc(&space.device()) == 0x6d24) return 6;
1775		if (cpu_get_pc(&space.device()) == 0x6d2c) return 2;
1776		if (cpu_get_pc(&space.device()) == 0x6d34) return 4;
	1773	if (space.device().safe_pc() == 0x6d1e) return 0;
	1774	if (space.device().safe_pc() == 0x6d24) return 6;
	1775	if (space.device().safe_pc() == 0x6d2c) return 2;
	1776	if (space.device().safe_pc() == 0x6d34) return 4;
1777	1777
1778	1778	/* The bootleg hangs in the "test mode" before diplaying (wrong) lives settings :
1779	1779	6AD4: DB 00         in   a,($00)
r17788	r17789
1794	1794	6AF7: 20 FA         jr   nz,$6AF3
1795	1795	This seems to be what used to be the MCU status.
1796	1796	*/
1797		if (cpu_get_pc(&space.device()) == 0x6ad6) return 2; /* bit 1 must be ON */
1798		if (cpu_get_pc(&space.device()) == 0x6ae4) return 2; /* bit 1 must be ON */
1799		if (cpu_get_pc(&space.device()) == 0x6af5) return 0; /* bit 2 must be OFF */
	1797	if (space.device().safe_pc() == 0x6ad6) return 2; /* bit 1 must be ON */
	1798	if (space.device().safe_pc() == 0x6ae4) return 2; /* bit 1 must be ON */
	1799	if (space.device().safe_pc() == 0x6af5) return 0; /* bit 2 must be OFF */
1800	1800
1801		logerror("Port Read PC=%04x\n",cpu_get_pc(&space.device()));
	1801	logerror("Port Read PC=%04x\n",space.device().safe_pc());
1802	1802
1803	1803	return 0;
1804	1804	}

trunk/src/mame/drivers/offtwall.c

r17788	r17789
163	163	{
164	164
165	165	/* this is the banked ROM read */
166		logerror("%06X: %04X\n", cpu_get_previouspc(&space.device()), offset);
	166	logerror("%06X: %04X\n", space.device().safe_pcbase(), offset);
167	167
168	168	/* if the values are $3e000 or $3e002 are being read by code just below the
169	169	ROM bank area, we need to return the correct value to give the proper checksum */
170		if ((offset == 0x3000 || offset == 0x3001) && cpu_get_previouspc(&space.device()) > 0x37000)
	170	if ((offset == 0x3000 || offset == 0x3001) && space.device().safe_pcbase() > 0x37000)
171	171	{
172	172	UINT32 checksum = (space.read_word(0x3fd210) << 16) | space.read_word(0x3fd212);
173	173	UINT32 us = 0xaaaa5555 - checksum;
r17788	r17789
202	202
203	203	READ16_MEMBER(offtwall_state::spritecache_count_r)
204	204	{
205		int prevpc = cpu_get_previouspc(&space.device());
	205	int prevpc = space.device().safe_pcbase();
206	206
207	207	/* if this read is coming from $99f8 or $9992, it's in the sprite copy loop */
208	208	if (prevpc == 0x99f8 || prevpc == 0x9992)
r17788	r17789
256	256
257	257	READ16_MEMBER(offtwall_state::unknown_verify_r)
258	258	{
259		int prevpc = cpu_get_previouspc(&space.device());
	259	int prevpc = space.device().safe_pcbase();
260	260	if (prevpc < 0x5c5e || prevpc > 0xc432)
261	261	return m_unknown_verify_base[offset];
262	262	else

trunk/src/mame/drivers/eolithsp.c

r17788	r17789
21	21	void eolith_speedup_read(address_space *space)
22	22	{
23	23	/* for debug */
24		//if ((cpu_get_pc(&space->device())!=eolith_speedup_address) && (eolith_vblank!=1) )
	24	//if ((space->device().safe_pc()!=eolith_speedup_address) && (eolith_vblank!=1) )
25	25	//    printf("%s:eolith speedup_read data %02x\n",space->machine().describe_context(), eolith_vblank);
26	26
27	27	if (eolith_vblank==0 && eolith_scanline < eolith_speedup_resume_scanline)
28	28	{
29		int pc = cpu_get_pc(&space->device());
	29	int pc = space->device().safe_pc();
30	30
31	31	if ((pc==eolith_speedup_address) || (pc==eolith_speedup_address2))
32	32	{
r17788	r17789
117	117	// StealSee doesn't use interrupts, just the vblank
118	118	CUSTOM_INPUT_MEMBER(eolith_state::stealsee_speedup_getvblank)
119	119	{
120		int pc = cpu_get_pc(m_maincpu);
	120	int pc = m_maincpu->safe_pc();
121	121
122	122	if (pc==0x400081ec)
123	123	if(!eolith_vblank)

trunk/src/mame/drivers/halleys.c

r17788	r17789
1019	1019
1020	1020	READ8_MEMBER(halleys_state::blitter_status_r)
1021	1021	{
1022		if (m_game_id==GAME_HALLEYS && cpu_get_pc(&space.device())==0x8017) return(0x55); // HACK: trick SRAM test on startup
	1022	if (m_game_id==GAME_HALLEYS && space.device().safe_pc()==0x8017) return(0x55); // HACK: trick SRAM test on startup
1023	1023
1024	1024	return(0);
1025	1025	}
r17788	r17789
1090	1090	UPDATE: re-implemented pixel collision to accompany the hack method.
1091	1091	*/
1092	1092
1093		if (m_game_id==GAME_HALLEYS && cpu_get_pc(&space.device())==m_collision_detection) // HACK: collision detection bypass
	1093	if (m_game_id==GAME_HALLEYS && space.device().safe_pc()==m_collision_detection) // HACK: collision detection bypass
1094	1094	{
1095	1095	if (m_collision_count) { m_collision_count--; return(m_collision_list[m_collision_count]); }
1096	1096

trunk/src/mame/drivers/djmain.c

r17788	r17789
375	375
376	376	WRITE32_MEMBER(djmain_state::unknown590000_w)
377	377	{
378		//logerror("%08X: unknown 590000 write %08X: %08X & %08X\n", cpu_get_previouspc(&space.device()), offset, data, mem_mask);
	378	//logerror("%08X: unknown 590000 write %08X: %08X & %08X\n", space.device().safe_pcbase(), offset, data, mem_mask);
379	379	}
380	380
381	381	WRITE32_MEMBER(djmain_state::unknown802000_w)
382	382	{
383		//logerror("%08X: unknown 802000 write %08X: %08X & %08X\n", cpu_get_previouspc(&space.device()), offset, data, mem_mask);
	383	//logerror("%08X: unknown 802000 write %08X: %08X & %08X\n", space.device().safe_pcbase(), offset, data, mem_mask);
384	384	}
385	385
386	386	WRITE32_MEMBER(djmain_state::unknownc02000_w)
387	387	{
388		//logerror("%08X: unknown c02000 write %08X: %08X & %08X\n", cpu_get_previouspc(&space.device()), offset, data, mem_mask);
	388	//logerror("%08X: unknown c02000 write %08X: %08X & %08X\n", space.device().safe_pcbase(), offset, data, mem_mask);
389	389	}
390	390
391	391

trunk/src/mame/drivers/neogeo.c

r17788	r17789
224	224
225	225	state->m_display_counter = (state->m_display_counter & 0x0000ffff) | ((UINT32)data << 16);
226	226
227		if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", cpu_get_pc(&space->device()), state->m_display_counter);
	227	if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", space->device().safe_pc(), state->m_display_counter);
228	228	}
229	229
230	230
r17788	r17789
234	234
235	235	state->m_display_counter = (state->m_display_counter & 0xffff0000) | data;
236	236
237		if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", cpu_get_pc(&space->device()), state->m_display_counter);
	237	if (LOG_VIDEO_SYSTEM) logerror("PC %06x: set_display_counter %08x\n", space->device().safe_pc(), state->m_display_counter);
238	238
239	239	if (state->m_display_position_interrupt_control & IRQ2CTRL_LOAD_RELATIVE)
240	240	{
r17788	r17789
434	434	//  case 0x33: break; // coui lockout
435	435
436	436	default:
437		logerror("PC: %x  Unmapped I/O control write.  Offset: %x  Data: %x\n", cpu_get_pc(&space.device()), offset, data);
	437	logerror("PC: %x  Unmapped I/O control write.  Offset: %x  Data: %x\n", space.device().safe_pc(), offset, data);
438	438	break;
439	439	}
440	440	}
r17788	r17789
460	460	else
461	461	{
462	462	m_recurse = 1;
463		ret = space.read_word(cpu_get_pc(&space.device()));
	463	ret = space.read_word(space.device().safe_pc());
464	464	m_recurse = 0;
465	465	}
466	466
r17788	r17789
583	583	/* boost the interleave to let the audio CPU read the command */
584	584	machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(50));
585	585
586		if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_command_w %04x - %04x\n", cpu_get_pc(&space.device()), data, mem_mask);
	586	if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_command_w %04x - %04x\n", space.device().safe_pc(), data, mem_mask);
587	587	}
588	588	}
589	589
r17788	r17789
592	592	{
593	593	UINT8 ret = soundlatch_byte_r(space, 0);
594	594
595		if (LOG_CPU_COMM) logerror(" AUD CPU PC   %04x: audio_command_r %02x\n", cpu_get_pc(&space.device()), ret);
	595	if (LOG_CPU_COMM) logerror(" AUD CPU PC   %04x: audio_command_r %02x\n", space.device().safe_pc(), ret);
596	596
597	597	/* this is a guess */
598	598	audio_cpu_clear_nmi_w(space, 0, 0);
r17788	r17789
604	604	WRITE8_MEMBER(neogeo_state::audio_result_w)
605	605	{
606	606
607		if (LOG_CPU_COMM && (m_audio_result != data)) logerror(" AUD CPU PC   %04x: audio_result_w %02x\n", cpu_get_pc(&space.device()), data);
	607	if (LOG_CPU_COMM && (m_audio_result != data)) logerror(" AUD CPU PC   %04x: audio_result_w %02x\n", space.device().safe_pc(), data);
608	608
609	609	m_audio_result = data;
610	610	}
r17788	r17789
614	614	{
615	615	UINT32 ret = m_audio_result;
616	616
617		//  if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_result_r %02x\n", cpu_get_pc(machine().device("maincpu")), ret);
	617	//  if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_result_r %02x\n", machine().device("maincpu")->safe_pc(), ret);
618	618
619	619	return ret;
620	620	}
r17788	r17789
654	654	{
655	655	neogeo_state *state = space->machine().driver_data<neogeo_state>();
656	656
657		if (LOG_MAIN_CPU_BANKING) logerror("MAIN CPU PC %06x: neogeo_set_main_cpu_bank_address %06x\n", cpu_get_pc(&space->device()), bank_address);
	657	if (LOG_MAIN_CPU_BANKING) logerror("MAIN CPU PC %06x: neogeo_set_main_cpu_bank_address %06x\n", space->device().safe_pc(), bank_address);
658	658
659	659	state->m_main_cpu_bank_address = bank_address;
660	660
r17788	r17789
668	668	UINT32 len = memregion("maincpu")->bytes();
669	669
670	670	if ((len <= 0x100000) && (data & 0x07))
671		logerror("PC %06x: warning: bankswitch to %02x but no banks available\n", cpu_get_pc(&space.device()), data);
	671	logerror("PC %06x: warning: bankswitch to %02x but no banks available\n", space.device().safe_pc(), data);
672	672	else
673	673	{
674	674	bank_address = ((data & 0x07) + 1) * 0x100000;
675	675
676	676	if (bank_address >= len)
677	677	{
678		logerror("PC %06x: warning: bankswitch to empty bank %02x\n", cpu_get_pc(&space.device()), data);
	678	logerror("PC %06x: warning: bankswitch to empty bank %02x\n", space.device().safe_pc(), data);
679	679	bank_address = 0x100000;
680	680	}
681	681
r17788	r17789
721	721	{
722	722	neogeo_state *state = space->machine().driver_data<neogeo_state>();
723	723
724		if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", cpu_get_pc(&space->device()), region, bank);
	724	if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", space->device().safe_pc(), region, bank);
725	725
726	726	state->m_audio_cpu_banks[region] = bank;
727	727
r17788	r17789
777	777
778	778	cputag_set_input_line(space->machine(), "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
779	779
780		if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", cpu_get_pc(&space->device()), state->m_audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
	780	if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", space->device().safe_pc(), state->m_audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
781	781	}
782	782	}
783	783
r17788	r17789
858	858	case 0x02: /* unknown - HC32 middle pin 1 */
859	859	case 0x03: /* unknown - uPD4990 pin ? */
860	860	case 0x04: /* unknown - HC32 middle pin 10 */
861		logerror("PC: %x  Unmapped system control write.  Offset: %x  Data: %x\n", cpu_get_pc(&space.device()), offset & 0x07, bit);
	861	logerror("PC: %x  Unmapped system control write.  Offset: %x  Data: %x\n", space.device().safe_pc(), offset & 0x07, bit);
862	862	break;
863	863	}
864	864
865		if (LOG_VIDEO_SYSTEM && ((offset & 0x07) != 0x06)) logerror("PC: %x  System control write.  Offset: %x  Data: %x\n", cpu_get_pc(&space.device()), offset & 0x07, bit);
	865	if (LOG_VIDEO_SYSTEM && ((offset & 0x07) != 0x06)) logerror("PC: %x  System control write.  Offset: %x  Data: %x\n", space.device().safe_pc(), offset & 0x07, bit);
866	866	}
867	867	}
868	868

trunk/src/mame/drivers/d9final.c

r17788	r17789
102	102	/* game checks this after three attract cycles, otherwise coin inputs stop to work. */
103	103	READ8_MEMBER(d9final_state::prot_latch_r)
104	104	{
105		//  printf("PC=%06x\n",cpu_get_pc(&space.device()));
	105	//  printf("PC=%06x\n",space.device().safe_pc());
106	106
107	107	return 0x04;
108	108	}

trunk/src/mame/drivers/ladybug.c

r17788	r17789
119	119	m_sraider_0x38 = data&0x3f;
120	120	break;
121	121	default:
122		mame_printf_debug("(%04X) write to %02X\n", cpu_get_pc(&space.device()), offset);
	122	mame_printf_debug("(%04X) write to %02X\n", space.device().safe_pc(), offset);
123	123	break;
124	124	}
125	125	}

trunk/src/mame/drivers/taito_f2.c

r17788	r17789
348	348	//          return (coin_word & mem_mask);
349	349	}
350	350
351		logerror("CPU #0 PC %06x: warning - read unmapped input offset %06x\n", cpu_get_pc(&space.device()), offset);
	351	logerror("CPU #0 PC %06x: warning - read unmapped input offset %06x\n", space.device().safe_pc(), offset);
352	352
353	353	return 0xff;
354	354	}
r17788	r17789
372	372	return res;
373	373	}
374	374
375		logerror("CPU #0 PC %06x: warning - read unmapped paddle offset %06x\n", cpu_get_pc(&space.device()), offset);
	375	logerror("CPU #0 PC %06x: warning - read unmapped paddle offset %06x\n", space.device().safe_pc(), offset);
376	376
377	377	return 0;
378	378	}
r17788	r17789
392	392	}
393	393	}
394	394
395		logerror("CPU #0 PC %06x: warning - read unmapped dsw_r offset %06x\n", cpu_get_pc(&space.device()), offset);
	395	logerror("CPU #0 PC %06x: warning - read unmapped dsw_r offset %06x\n", space.device().safe_pc(), offset);
396	396
397	397	return 0xff;
398	398	}
r17788	r17789
418	418
419	419	}
420	420
421		logerror("CPU #0 mjnquest_input %06x: warning - read unknown input %06x\n", cpu_get_pc(&space.device()), m_mjnquest_input);
	421	logerror("CPU #0 mjnquest_input %06x: warning - read unknown input %06x\n", space.device().safe_pc(), m_mjnquest_input);
422	422
423	423	return 0xff;
424	424	}
r17788	r17789
663	663	WRITE16_MEMBER(taitof2_state::cchip2_word_w)
664	664	{
665	665
666		logerror("cchip2_w pc: %06x offset %04x: %02x\n", cpu_get_pc(&space.device()), offset, data);
	666	logerror("cchip2_w pc: %06x offset %04x: %02x\n", space.device().safe_pc(), offset, data);
667	667
668	668	COMBINE_DATA(&m_cchip2_ram[offset]);
669	669	}

trunk/src/mame/drivers/pandoras.c

r17788	r17789
82	82	case 0x07:   device_set_input_line(m_subcpu, INPUT_LINE_NMI, PULSE_LINE);
83	83	break;
84	84
85		default:   logerror("%04x: (irq_ctrl) write %02x to %02x\n",cpu_get_pc(&space.device()), data, offset);
	85	default:   logerror("%04x: (irq_ctrl) write %02x to %02x\n",space.device().safe_pc(), data, offset);
86	86	break;
87	87	}
88	88	}

trunk/src/mame/drivers/ddragon.c

r17788	r17789
223	223
224	224	READ8_MEMBER(ddragon_state::darktowr_mcu_bank_r)
225	225	{
226		// logerror("BankRead %05x %08x\n",cpu_get_pc(&space.device()),offset);
	226	// logerror("BankRead %05x %08x\n",space.device().safe_pc(),offset);
227	227
228	228	/* Horrible hack - the alternate TStrike set is mismatched against the MCU,
229	229	so just hack around the protection here.  (The hacks are 'right' as I have
r17788	r17789
232	232	if (!strcmp(machine().system().name, "tstrike"))
233	233	{
234	234	/* Static protection checks at boot-up */
235		if (cpu_get_pc(&space.device()) == 0x9ace)
	235	if (space.device().safe_pc() == 0x9ace)
236	236	return 0;
237		if (cpu_get_pc(&space.device()) == 0x9ae4)
	237	if (space.device().safe_pc() == 0x9ae4)
238	238	return 0x63;
239	239
240	240	/* Just return whatever the code is expecting */
r17788	r17789
251	251
252	252	WRITE8_MEMBER(ddragon_state::darktowr_mcu_bank_w)
253	253	{
254		logerror("BankWrite %05x %08x %08x\n", cpu_get_pc(&space.device()), offset, data);
	254	logerror("BankWrite %05x %08x %08x\n", space.device().safe_pc(), offset, data);
255	255
256	256	if (offset == 0x1400 || offset == 0)
257	257	{
r17788	r17789
355	355
356	356	WRITE8_MEMBER(ddragon_state::darktowr_mcu_w)
357	357	{
358		logerror("McuWrite %05x %08x %08x\n",cpu_get_pc(&space.device()), offset, data);
	358	logerror("McuWrite %05x %08x %08x\n",space.device().safe_pc(), offset, data);
359	359	m_darktowr_mcu_ports[offset] = data;
360	360	}
361	361
362	362
363	363	READ8_MEMBER(ddragon_state::ddragon_hd63701_internal_registers_r)
364	364	{
365		logerror("%04x: read %d\n", cpu_get_pc(&space.device()), offset);
	365	logerror("%04x: read %d\n", space.device().safe_pc(), offset);
366	366	return 0;
367	367	}
368	368
r17788	r17789
396	396	{
397	397
398	398	/* Double Dragon crash fix - see notes above */
399		if (offset == 0x49 && cpu_get_pc(&space.device()) == 0x6261 && m_spriteram[offset] == 0x1f)
	399	if (offset == 0x49 && space.device().safe_pc() == 0x6261 && m_spriteram[offset] == 0x1f)
400	400	return 0x1;
401	401
402	402	return m_spriteram[offset];

trunk/src/mame/drivers/acommand.c

r17788	r17789
305	305
306	306	READ16_MEMBER(acommand_state::ac_devices_r)
307	307	{
308		logerror("(PC=%06x) read at %04x\n",cpu_get_pc(&space.device()),offset*2);
	308	logerror("(PC=%06x) read at %04x\n",space.device().safe_pc(),offset*2);
309	309
310	310	switch(offset)
311	311	{

trunk/src/mame/drivers/ppmast93.c

r17788	r17789
218	218	case 0:
219	219	case 1: ym2413_w(machine().device("ymsnd"),offset,data); break;
220	220	case 2: machine().device<dac_device>("dac")->write_unsigned8(data);break;
221		default: logerror("%x %x - %x\n",offset,data,cpu_get_previouspc(&space.device()));
	221	default: logerror("%x %x - %x\n",offset,data,space.device().safe_pcbase());
222	222	}
223	223	}
224	224

trunk/src/mame/drivers/taito_l.c

r17788	r17789
375	375	logerror("New rom size : %x\n", (m_high + 1) * 0x2000);
376	376	}
377	377
378		//logerror("robs %d, %02x (%04x)\n", offset, data, cpu_get_pc(&space.device()));
	378	//logerror("robs %d, %02x (%04x)\n", offset, data, space.device().safe_pc());
379	379	m_cur_rombank = data;
380	380	membank("bank1")->set_base(machine().root_device().memregion("maincpu")->base() + 0x2000 * m_cur_rombank);
381	381	}
r17788	r17789
394	394	logerror("New rom2 size : %x\n", (m_high2 + 1) * 0x4000);
395	395	}
396	396
397		//logerror("robs2 %02x (%04x)\n", data, cpu_get_pc(&space.device()));
	397	//logerror("robs2 %02x (%04x)\n", data, space.device().safe_pc());
398	398
399	399	m_cur_rombank2 = data;
400	400	membank("bank6")->set_base(machine().root_device().memregion("slave")->base() + 0x4000 * m_cur_rombank2);
r17788	r17789
417	417	if (m_cur_rambank[offset] != data)
418	418	{
419	419	m_cur_rambank[offset] = data;
420		//logerror("rabs %d, %02x (%04x)\n", offset, data, cpu_get_pc(&space.device()));
	420	//logerror("rabs %d, %02x (%04x)\n", offset, data, space.device().safe_pc());
421	421	if (data >= 0x14 && data <= 0x1f)
422	422	{
423	423	data -= 0x14;
r17788	r17789
431	431	}
432	432	else
433	433	{
434		logerror("unknown rambankswitch %d, %02x (%04x)\n", offset, data, cpu_get_pc(&space.device()));
	434	logerror("unknown rambankswitch %d, %02x (%04x)\n", offset, data, space.device().safe_pc());
435	435	m_current_notifier[offset] = 0;
436	436	m_current_base[offset] = m_empty_ram;
437	437	}
r17788	r17789
504	504	WRITE8_MEMBER(taitol_state::mcu_data_w)
505	505	{
506	506	m_last_data = data;
507		m_last_data_adr = cpu_get_pc(&space.device());
508		//  logerror("mcu write %02x (%04x)\n", data, cpu_get_pc(&space.device()));
	507	m_last_data_adr = space.device().safe_pc();
	508	//  logerror("mcu write %02x (%04x)\n", data, space.device().safe_pc());
509	509	switch (data)
510	510	{
511	511	case 0x43:
r17788	r17789
517	517
518	518	WRITE8_MEMBER(taitol_state::mcu_control_w)
519	519	{
520		//  logerror("mcu control %02x (%04x)\n", data, cpu_get_pc(&space.device()));
	520	//  logerror("mcu control %02x (%04x)\n", data, space.device().safe_pc());
521	521	}
522	522
523	523	READ8_MEMBER(taitol_state::mcu_data_r)
524	524	{
525	525
526		//  logerror("mcu read (%04x) [%02x, %04x]\n", cpu_get_pc(&space.device()), last_data, last_data_adr);
	526	//  logerror("mcu read (%04x) [%02x, %04x]\n", space.device().safe_pc(), last_data, last_data_adr);
527	527	if (m_mcu_pos == m_mcu_reply_len)
528	528	return 0;
529	529
r17788	r17789
532	532
533	533	READ8_MEMBER(taitol_state::mcu_control_r)
534	534	{
535		//  logerror("mcu control read (%04x)\n", cpu_get_pc(&space.device()));
	535	//  logerror("mcu control read (%04x)\n", space.device().safe_pc());
536	536	return 0x1;
537	537	}
538	538
539	539	#if 0
540	540	WRITE8_MEMBER(taitol_state::sound_w)
541	541	{
542		logerror("Sound_w %02x (%04x)\n", data, cpu_get_pc(&space.device()));
	542	logerror("Sound_w %02x (%04x)\n", data, space.device().safe_pc());
543	543	}
544	544	#endif
545	545
r17788	r17789
559	559	case 7:
560	560	return ioport("IN2")->read();
561	561	default:
562		logerror("Mux read from unknown port %d (%04x)\n", m_mux_ctrl, cpu_get_pc(&space.device()));
	562	logerror("Mux read from unknown port %d (%04x)\n", m_mux_ctrl, space.device().safe_pc());
563	563	return 0xff;
564	564	}
565	565	}
r17788	r17789
573	573	control2_w(space, 0, data);
574	574	break;
575	575	default:
576		logerror("Mux write to unknown port %d, %02x (%04x)\n", m_mux_ctrl, data, cpu_get_pc(&space.device()));
	576	logerror("Mux write to unknown port %d, %02x (%04x)\n", m_mux_ctrl, data, space.device().safe_pc());
577	577	}
578	578	}
579	579
r17788	r17789
1788	1788	m_cur_bank = data & 0x03;
1789	1789	bankaddress = m_cur_bank * 0x4000;
1790	1790	membank("bank7")->set_base(&RAM[bankaddress]);
1791		//logerror ("YM2203 bank change val=%02x  pc=%04x\n", m_cur_bank, cpu_get_pc(&space->device()) );
	1791	//logerror ("YM2203 bank change val=%02x  pc=%04x\n", m_cur_bank, space->device().safe_pc() );
1792	1792	}
1793	1793	}
1794	1794

trunk/src/mame/drivers/segald.c

r17788	r17789
125	125	if (m_nmi_enable)
126	126	m_ldv1000_input_latch = m_laserdisc->status_r();
127	127
128		logerror("DISC read   (0x%04x) @ 0x%04x [0x%x]\n", m_ldv1000_input_latch, offset, cpu_get_pc(&space.device()));
	128	logerror("DISC read   (0x%04x) @ 0x%04x [0x%x]\n", m_ldv1000_input_latch, offset, space.device().safe_pc());
129	129
130	130	return m_ldv1000_input_latch;
131	131	}
r17788	r17789
133	133	READ8_MEMBER(segald_state::astron_OUT_read)
134	134	{
135	135
136		logerror("OUT read   (0x%04x) @ 0x%04x [0x%x]\n", m_out_ram[offset], offset, cpu_get_pc(&space.device()));
	136	logerror("OUT read   (0x%04x) @ 0x%04x [0x%x]\n", m_out_ram[offset], offset, space.device().safe_pc());
137	137	return m_out_ram[offset];
138	138	}
139	139
140	140	READ8_MEMBER(segald_state::astron_OBJ_read)
141	141	{
142	142
143		logerror("OBJ read   (0x%04x) @ 0x%04x [0x%x]\n", m_obj_ram[offset], offset, cpu_get_pc(&space.device()));
	143	logerror("OBJ read   (0x%04x) @ 0x%04x [0x%x]\n", m_obj_ram[offset], offset, space.device().safe_pc());
144	144	return m_obj_ram[offset];
145	145	}
146	146
147	147	READ8_MEMBER(segald_state::astron_COLOR_read)
148	148	{
149	149
150		logerror("COLOR read   (0x%04x) @ 0x%04x [0x%x]\n", m_color_ram[offset], offset, cpu_get_pc(&space.device()));
	150	logerror("COLOR read   (0x%04x) @ 0x%04x [0x%x]\n", m_color_ram[offset], offset, space.device().safe_pc());
151	151	return m_color_ram[offset];
152	152	}
153	153
r17788	r17789
156	156	WRITE8_MEMBER(segald_state::astron_DISC_write)
157	157	{
158	158
159		logerror("DISC write : 0x%04x @  0x%04x [0x%x]\n", data, offset, cpu_get_pc(&space.device()));
	159	logerror("DISC write : 0x%04x @  0x%04x [0x%x]\n", data, offset, space.device().safe_pc());
160	160
161	161	m_ldv1000_output_latch = data;
162	162
r17788	r17789
167	167	WRITE8_MEMBER(segald_state::astron_OUT_write)
168	168	{
169	169
170		logerror("OUT write : 0x%04x @  0x%04x [0x%x]\n", data, offset, cpu_get_pc(&space.device()));
	170	logerror("OUT write : 0x%04x @  0x%04x [0x%x]\n", data, offset, space.device().safe_pc());
171	171
172	172	switch(offset)
173	173	{
r17788	r17789
205	205	{
206	206
207	207	m_obj_ram[offset] = data;
208		logerror("OBJ write : 0x%04x @ 0x%04x [0x%x]\n", data, offset, cpu_get_pc(&space.device()));
	208	logerror("OBJ write : 0x%04x @ 0x%04x [0x%x]\n", data, offset, space.device().safe_pc());
209	209	}
210	210
211	211	WRITE8_MEMBER(segald_state::astron_COLOR_write)
r17788	r17789
228	228	a = (highBits & 0x80) ? 0 : 255;
229	229
230	230	palette_set_color(machine(), palIndex, MAKE_ARGB(a, r, g, b));
231		logerror("COLOR write : 0x%04x @   0x%04x [0x%x]\n", data, offset, cpu_get_pc(&space.device()));
	231	logerror("COLOR write : 0x%04x @   0x%04x [0x%x]\n", data, offset, space.device().safe_pc());
232	232	}
233	233
234	234	WRITE8_MEMBER(segald_state::astron_FIX_write)
235	235	{
236	236
237	237	m_fix_ram[offset] = data;
238		/* logerror("FIX write : 0x%04x @ 0x%04x [0x%x]\n", data, offset, cpu_get_pc(&space.device())); */
	238	/* logerror("FIX write : 0x%04x @ 0x%04x [0x%x]\n", data, offset, space.device().safe_pc()); */
239	239	}
240	240
241	241	WRITE8_MEMBER(segald_state::astron_io_bankswitch_w)

trunk/src/mame/drivers/tickee.c

r17788	r17789
293	293	}
294	294
295	295	if (olddata != m_control[offset])
296		logerror("%08X:tickee_control_w(%d) = %04X (was %04X)\n", cpu_get_pc(&space.device()), offset, m_control[offset], olddata);
	296	logerror("%08X:tickee_control_w(%d) = %04X (was %04X)\n", space.device().safe_pc(), offset, m_control[offset], olddata);
297	297	}
298	298
299	299

trunk/src/mame/drivers/m92.c

r17788	r17789
253	253	READ16_MEMBER(m92_state::m92_eeprom_r)
254	254	{
255	255	UINT8 *RAM = memregion("eeprom")->base();
256		//  logerror("%05x: EEPROM RE %04x\n",cpu_get_pc(&space.device()),offset);
	256	//  logerror("%05x: EEPROM RE %04x\n",space.device().safe_pc(),offset);
257	257	return RAM[offset] | 0xff00;
258	258	}
259	259
260	260	WRITE16_MEMBER(m92_state::m92_eeprom_w)
261	261	{
262	262	UINT8 *RAM = memregion("eeprom")->base();
263		//  logerror("%05x: EEPROM WR %04x\n",cpu_get_pc(&space.device()),offset);
	263	//  logerror("%05x: EEPROM WR %04x\n",space.device().safe_pc(),offset);
264	264	if (ACCESSING_BITS_0_7)
265	265	RAM[offset] = data;
266	266	}
r17788	r17789
283	283	{
284	284	membank("bank1")->set_entry((data & 0x06) >> 1);
285	285	if (data & 0xf9)
286		logerror("%05x: bankswitch %04x\n", cpu_get_pc(&space.device()), data);
	286	logerror("%05x: bankswitch %04x\n", space.device().safe_pc(), data);
287	287	}
288	288	}
289	289
r17788	r17789
304	304
305	305	READ16_MEMBER(m92_state::m92_sound_status_r)
306	306	{
307		//logerror("%06x: read sound status\n",cpu_get_pc(&space.device()));
	307	//logerror("%06x: read sound status\n",space.device().safe_pc());
308	308	return m_sound_status;
309	309	}
310	310

trunk/src/mame/drivers/fuukifg2.c

r17788	r17789
117	117	if (data <= 2)
118	118	membank("bank1")->set_entry(data);
119	119	else
120		logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n", cpu_get_pc(&space.device()), data);
	120	logerror("CPU #1 - PC %04X: unknown bank bits: %02X\n", space.device().safe_pc(), data);
121	121	}
122	122
123	123	WRITE8_MEMBER(fuuki16_state::fuuki16_oki_banking_w)

trunk/src/mame/drivers/sderby.c

r17788	r17789
82	82	return 0xffff;         // to avoid game to reset (needs more work)
83	83	}
84	84
85		logerror("sderby_input_r : offset = %x - PC = %06x\n",offset*2,cpu_get_pc(&space.device()));
	85	logerror("sderby_input_r : offset = %x - PC = %06x\n",offset*2,space.device().safe_pc());
86	86
87	87	return 0xffff;
88	88	}
r17788	r17789
126	126
127	127	READ16_MEMBER(sderby_state::rprot_r)
128	128	{
129		logerror("rprot_r : offset = %02x\n",cpu_get_pc(&space.device()));
	129	logerror("rprot_r : offset = %02x\n",space.device().safe_pc());
130	130
131	131	/* This is the only mask I found that allow a normal play.
132	132	Using other values, the game hangs waiting for response,

trunk/src/mame/drivers/shangha3.c

r17788	r17789
46	46	{
47	47	static const int result[] = { 0x0,0x1,0x3,0x7,0xf,0xe,0xc,0x8,0x0};
48	48
49		logerror("PC %04x: read 20004e\n",cpu_get_pc(&space.device()));
	49	logerror("PC %04x: read 20004e\n",space.device().safe_pc());
50	50
51	51	return result[m_prot_count++ % 9];
52	52	}
53	53	WRITE16_MEMBER(shangha3_state::shangha3_prot_w)
54	54	{
55		logerror("PC %04x: write %02x to 20004e\n",cpu_get_pc(&space.device()),data);
	55	logerror("PC %04x: write %02x to 20004e\n",space.device().safe_pc(),data);
56	56	}
57	57
58	58

trunk/src/mame/drivers/39in1.c

r17788	r17789
1370	1370	READ32_MEMBER(_39in1_state::cpld_r)
1371	1371	{
1372	1372
1373		//if (cpu_get_pc(&space.device()) != 0xe3af4) printf("CPLD read @ %x (PC %x state %d)\n", offset, cpu_get_pc(&space.device()), state);
	1373	//if (space.device().safe_pc() != 0xe3af4) printf("CPLD read @ %x (PC %x state %d)\n", offset, space.device().safe_pc(), state);
1374	1374
1375		if (cpu_get_pc(&space.device()) == 0x3f04)
	1375	if (space.device().safe_pc() == 0x3f04)
1376	1376	{
1377	1377	return 0xf0;     // any non-zero value works here
1378	1378	}
1379		else if (cpu_get_pc(&space.device()) == 0xe3af4)
	1379	else if (space.device().safe_pc() == 0xe3af4)
1380	1380	{
1381	1381	return ioport("MCUIPT")->read();
1382	1382	}
r17788	r17789
1431	1431	m_seed = data<<16;
1432	1432	}
1433	1433
1434		if (cpu_get_pc(&space.device()) == 0x280c)
	1434	if (space.device().safe_pc() == 0x280c)
1435	1435	{
1436	1436	m_state = 1;
1437	1437	}
1438		if (cpu_get_pc(&space.device()) == 0x2874)
	1438	if (space.device().safe_pc() == 0x2874)
1439	1439	{
1440	1440	m_state = 2;
1441	1441	m_magic = space.read_byte(0xa02d4ff0);
r17788	r17789
1446	1446	#if 0
1447	1447	else
1448	1448	{
1449		printf("%08x: CPLD_W: %08x = %08x & %08x\n", cpu_get_pc(&space.device()), offset, data, mem_mask);
	1449	printf("%08x: CPLD_W: %08x = %08x & %08x\n", space.device().safe_pc(), offset, data, mem_mask);
1450	1450	}
1451	1451	#endif
1452	1452	}

trunk/src/mame/drivers/cyclemb.c

r17788	r17789
419	419	{
420	420	if(offset == 1) //status port
421	421	{
422		//printf("STATUS PC=%04x\n",cpu_get_pc(m_maincpu));
	422	//printf("STATUS PC=%04x\n",m_maincpu->safe_pc());
423	423
424	424	return 1;
425	425	}
r17788	r17789
427	427	{
428	428	UINT8 i,pt;
429	429
430		//printf("%04x\n",cpu_get_pc(m_maincpu));
	430	//printf("%04x\n",m_maincpu->safe_pc());
431	431
432	432	/* TODO: internal state of this */
433		if(cpu_get_pc(m_maincpu) == m_dsw_pc_hack)
	433	if(m_maincpu->safe_pc() == m_dsw_pc_hack)
434	434	m_mcu[0].rxd = (ioport("DSW1")->read() & 0x1f) << 2;
435	435	else if(m_mcu[0].rst)
436	436	{
437		//printf("READ PC=%04x\n",cpu_get_pc(m_maincpu));
	437	//printf("READ PC=%04x\n",m_maincpu->safe_pc());
438	438	{
439	439
440	440	switch(m_mcu[0].state)
r17788	r17789
500	500	{
501	501	if(offset == 1) //command port
502	502	{
503		//printf("%02x CMD PC=%04x\n",data,cpu_get_pc(m_maincpu));
	503	//printf("%02x CMD PC=%04x\n",data,m_maincpu->safe_pc());
504	504	switch(data)
505	505	{
506	506	case 0:
r17788	r17789
535	535	}
536	536	else
537	537	{
538		//printf("%02x DATA PC=%04x\n",data,cpu_get_pc(m_maincpu));
	538	//printf("%02x DATA PC=%04x\n",data,m_maincpu->safe_pc());
539	539
540	540	m_mcu[0].txd = data;
541	541

trunk/src/mame/drivers/mcr.c

r17788	r17789
569	569	nflfoot_serial_in_active = FALSE;
570	570	}
571	571
572		if (cpu_get_pc(&space.device()) != 0x107)
573		logerror("%04X:ip2_r = %02X\n", cpu_get_pc(&space.device()), val);
	572	if (space.device().safe_pc() != 0x107)
	573	logerror("%04X:ip2_r = %02X\n", space.device().safe_pc(), val);
574	574	return val;
575	575	}
576	576
r17788	r17789
580	580	z80sio_device *sio = machine().device<z80sio_device>("ipu_sio");
581	581
582	582	/* bit 7 = J3-7 on IPU board = /RXDA on SIO */
583		logerror("%04X:op4_w(%d%d%d)\n", cpu_get_pc(&space.device()), (data >> 7) & 1, (data >> 6) & 1, (data >> 5) & 1);
	583	logerror("%04X:op4_w(%d%d%d)\n", space.device().safe_pc(), (data >> 7) & 1, (data >> 6) & 1, (data >> 5) & 1);
584	584
585	585	/* look for a non-zero start bit to go active */
586	586	if (!nflfoot_serial_out_active && (data & 0x80))

trunk/src/mame/drivers/mpu4vid.c

r17788	r17789
1600	1600	mpu4_state *state = space->machine().driver_data<mpu4_state>();
1601	1601	int x;
1602	1602	int call=data;
1603		LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X", cpu_get_previouspc(&space->device()),offset,data));
	1603	LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X", space->device().safe_pcbase(),offset,data));
1604	1604
1605	1605	if (!state->m_current_chr_table)
1606	1606	{
1607		logerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space->device()));
	1607	logerror("No Characteriser Table @ %04x\n", space->device().safe_pcbase());
1608	1608	return;
1609	1609	}
1610	1610
r17788	r17789
1630	1630	static READ16_HANDLER( characteriser16_r )
1631	1631	{
1632	1632	mpu4_state *state = space->machine().driver_data<mpu4_state>();
1633		LOG_CHR_FULL(("%04x Characteriser read offset %02X,data %02X", cpu_get_previouspc(&space->device()),offset,state->m_current_chr_table[state->m_prot_col].response));
	1633	LOG_CHR_FULL(("%04x Characteriser read offset %02X,data %02X", space->device().safe_pcbase(),offset,state->m_current_chr_table[state->m_prot_col].response));
1634	1634	LOG_CHR(("Characteriser read offset %02X \n",offset));
1635	1635	LOG_CHR(("Characteriser read data %02X \n",state->m_current_chr_table[state->m_prot_col].response));
1636	1636
1637	1637	if (!state->m_current_chr_table)
1638	1638	{
1639		logerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space->device()));
	1639	logerror("No Characteriser Table @ %04x\n", space->device().safe_pcbase());
1640	1640	return 0x00;
1641	1641	}
1642	1642
1643	1643
1644	1644	/* hack for 'invalid questions' error on time machine.. I guess it wants them to decode properly for startup check? */
1645		if (cpu_get_previouspc(&space->device())==0x283a)
	1645	if (space->device().safe_pcbase()==0x283a)
1646	1646	{
1647	1647	return 0x00;
1648	1648	}
r17788	r17789
1672	1672	mpu4_state *state = space->machine().driver_data<mpu4_state>();
1673	1673	int x;
1674	1674	int call=data &0xff;
1675		LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X \n", cpu_get_previouspc(&space->device()),offset,data));
	1675	LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X \n", space->device().safe_pcbase(),offset,data));
1676	1676	if (!state->m_current_chr_table)
1677	1677	{
1678		logerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space->device()));
	1678	logerror("No Characteriser Table @ %04x\n", space->device().safe_pcbase());
1679	1679	return;
1680	1680	}
1681	1681

trunk/src/mame/drivers/bfm_swp.c

r17788	r17789
146	146
147	147	READ32_MEMBER(bfm_swp_state::bfm_swp_mem_r)
148	148	{
149		int pc = cpu_get_pc(&space.device());
	149	int pc = space.device().safe_pc();
150	150	int cs = m68340_get_cs(m_maincpu, offset * 4);
151	151
152	152	switch ( cs )
r17788	r17789
168	168
169	169	WRITE32_MEMBER(bfm_swp_state::bfm_swp_mem_w)
170	170	{
171		int pc = cpu_get_pc(&space.device());
	171	int pc = space.device().safe_pc();
172	172	int cs = m68340_get_cs(m_maincpu, offset * 4);
173	173
174	174	switch ( cs )

trunk/src/mame/drivers/dcheese.c

r17788	r17789
183	183	if ((diff & 0x40) && (data & 0x40))
184	184	m_bsmt->reset();
185	185	if (data != 0x40 && data != 0x60)
186		logerror("%04X:sound_control_w = %02X\n", cpu_get_pc(&space.device()), data);
	186	logerror("%04X:sound_control_w = %02X\n", space.device().safe_pc(), data);
187	187	}
188	188
189	189

trunk/src/mame/drivers/trvmadns.c

r17788	r17789
200	200	{
201	201	if(offset==0)
202	202	{
203		if(cpu_get_previouspc(&space.device())==0x29e9)// || cpu_get_previouspc(&space.device())==0x1b3f) //29f5
	203	if(space.device().safe_pcbase()==0x29e9)// || space.device().safe_pcbase()==0x1b3f) //29f5
204	204	{
205	205	cputag_set_input_line(machine(), "maincpu", 0, HOLD_LINE);
206	206	}
207	207	//      else
208		//          logerror("%x \n", cpu_get_previouspc(&space.device()));
	208	//          logerror("%x \n", space.device().safe_pcbase());
209	209
210	210	}
211	211

trunk/src/mame/drivers/albazg.c

r17788	r17789
134	134	/*Custom RAM (Thrash Protection)*/
135	135	READ8_MEMBER(albazg_state::custom_ram_r)
136	136	{
137		//  logerror("Custom RAM read at %02x PC = %x\n", offset + 0xaf80, cpu_get_pc(&space.device()));
	137	//  logerror("Custom RAM read at %02x PC = %x\n", offset + 0xaf80, space.device().safe_pc());
138	138	return m_cus_ram[offset];// ^ 0x55;
139	139	}
140	140
141	141	WRITE8_MEMBER(albazg_state::custom_ram_w)
142	142	{
143		//  logerror("Custom RAM write at %02x : %02x PC = %x\n", offset + 0xaf80, data, cpu_get_pc(&space.device()));
	143	//  logerror("Custom RAM write at %02x : %02x PC = %x\n", offset + 0xaf80, data, space.device().safe_pc());
144	144	if(m_prot_lock)
145	145	m_cus_ram[offset] = data;
146	146	}
r17788	r17789
148	148	/*this might be used as NVRAM commands btw*/
149	149	WRITE8_MEMBER(albazg_state::prot_lock_w)
150	150	{
151		//  logerror("PC %04x Prot lock value written %02x\n", cpu_get_pc(&space.device()), data);
	151	//  logerror("PC %04x Prot lock value written %02x\n", space.device().safe_pc(), data);
152	152	m_prot_lock = data;
153	153	}
154	154

trunk/src/mame/drivers/backfire.c

r17788	r17789
189	189	READ32_MEMBER(backfire_state::backfire_control2_r)
190	190	{
191	191
192		//  logerror("%08x:Read eprom %08x (%08x)\n", cpu_get_pc(&space.device()), offset << 1, mem_mask);
	192	//  logerror("%08x:Read eprom %08x (%08x)\n", space.device().safe_pc(), offset << 1, mem_mask);
193	193	return (m_eeprom->read_bit() << 24) | ioport("IN1")->read() | (ioport("IN1")->read() << 16);
194	194	}
195	195
r17788	r17789
197	197	READ32_MEMBER(backfire_state::backfire_control3_r)
198	198	{
199	199
200		//  logerror("%08x:Read eprom %08x (%08x)\n", cpu_get_pc(&space.device()), offset << 1, mem_mask);
	200	//  logerror("%08x:Read eprom %08x (%08x)\n", space.device().safe_pc(), offset << 1, mem_mask);
201	201	return (m_eeprom->read_bit() << 24) | ioport("IN2")->read() | (ioport("IN2")->read() << 16);
202	202	}
203	203	#endif
r17788	r17789
699	699	READ32_MEMBER(backfire_state::backfire_speedup_r)
700	700	{
701	701
702		//mame_printf_debug( "%08x\n",cpu_get_pc(&space.device()));
	702	//mame_printf_debug( "%08x\n",space.device().safe_pc());
703	703
704		if (cpu_get_pc(&space.device() )== 0xce44)  device_spin_until_time(&space.device(), attotime::from_usec(400)); // backfire
705		if (cpu_get_pc(&space.device()) == 0xcee4)  device_spin_until_time(&space.device(), attotime::from_usec(400)); // backfirea
	704	if (space.device() .safe_pc()== 0xce44)  device_spin_until_time(&space.device(), attotime::from_usec(400)); // backfire
	705	if (space.device().safe_pc() == 0xcee4)  device_spin_until_time(&space.device(), attotime::from_usec(400)); // backfirea
706	706
707	707	return m_mainram[0x18/4];
708	708	}

trunk/src/mame/drivers/starwars.c

r17788	r17789
125	125	/* if we are in the slapstic region, process it */
126	126	if ((address & 0xe000) == 0x8000)
127	127	{
128		offs_t pc = cpu_get_pc(&direct.space().device());
	128	offs_t pc = direct.space().device().safe_pc();
129	129
130	130	/* filter out duplicates; we get these because the handler gets called for
131	131	multiple reasons:

trunk/src/mame/drivers/exerion.c

r17788	r17789
172	172
173	173	READ8_MEMBER(exerion_state::exerion_protection_r)
174	174	{
175		if (cpu_get_pc(&space.device()) == 0x4143)
	175	if (space.device().safe_pc() == 0x4143)
176	176	return memregion("maincpu")->base()[0x33c0 + (m_main_ram[0xd] << 2) + offset];
177	177	else
178	178	return m_main_ram[0x8 + offset];

trunk/src/mame/drivers/segas18.c

r17788	r17789
341	341	}
342	342	if (!m_custom_io_r.isnull())
343	343	return m_custom_io_r(space, offset, mem_mask);
344		logerror("%06X:misc_io_r - unknown read access to address %04X\n", cpu_get_pc(&space.device()), offset * 2);
	344	logerror("%06X:misc_io_r - unknown read access to address %04X\n", space.device().safe_pc(), offset * 2);
345	345	return open_bus_r(space, 0, mem_mask);
346	346	}
347	347
r17788	r17789
375	375	m_custom_io_w(space, offset, data, mem_mask);
376	376	return;
377	377	}
378		logerror("%06X:misc_io_w - unknown write access to address %04X = %04X & %04X\n", cpu_get_pc(&space.device()), offset * 2, data, mem_mask);
	378	logerror("%06X:misc_io_w - unknown write access to address %04X = %04X & %04X\n", space.device().safe_pc(), offset * 2, data, mem_mask);
379	379	}
380	380
381	381

trunk/src/mame/drivers/mosaic.c

r17788	r17789
41	41	{
42	42	int res = (m_prot_val >> 8) & 0xff;
43	43
44		logerror("%06x: protection_r %02x\n", cpu_get_pc(&space.device()), res);
	44	logerror("%06x: protection_r %02x\n", space.device().safe_pc(), res);
45	45
46	46	m_prot_val <<= 8;
47	47
r17788	r17789
51	51	WRITE8_MEMBER(mosaic_state::gfire2_protection_w)
52	52	{
53	53
54		logerror("%06x: protection_w %02x\n", cpu_get_pc(&space.device()), data);
	54	logerror("%06x: protection_w %02x\n", space.device().safe_pc(), data);
55	55
56	56	switch(data)
57	57	{

trunk/src/mame/drivers/astrocorp.c

r17788	r17789
192	192	{
193	193	okim6295_device *oki = downcast<okim6295_device *>(device);
194	194	oki->set_bank_base(0x40000 * ((data >> 8) & 1));
195		//      logerror("CPU #0 PC %06X: OKI bank %08X\n", cpu_get_pc(&space->device()), data);
	195	//      logerror("CPU #0 PC %06X: OKI bank %08X\n", space->device().safe_pc(), data);
196	196	}
197	197	}
198	198
r17788	r17789
203	203	{
204	204	okim6295_device *oki = downcast<okim6295_device *>(device);
205	205	oki->set_bank_base(0x40000 * (data & 1));
206		//      logerror("CPU #0 PC %06X: OKI bank %08X\n", cpu_get_pc(&space->device()), data);
	206	//      logerror("CPU #0 PC %06X: OKI bank %08X\n", space->device().safe_pc(), data);
207	207	}
208	208	}
209	209
r17788	r17789
274	274	COMBINE_DATA(&m_screen_enable);
275	275	//  popmessage("%04X",data);
276	276	if (m_screen_enable & (~1))
277		logerror("CPU #0 PC %06X: screen enable = %04X\n", cpu_get_pc(&space.device()), m_screen_enable);
	277	logerror("CPU #0 PC %06X: screen enable = %04X\n", space.device().safe_pc(), m_screen_enable);
278	278	}
279	279
280	280	READ16_MEMBER(astrocorp_state::astrocorp_unk_r)

trunk/src/mame/drivers/mpu4hw.c

r17788	r17789
2075	2075	{
2076	2076	int x;
2077	2077	int call=data;
2078		LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X", cpu_get_previouspc(&space.device()),offset,data));
	2078	LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X", space.device().safe_pcbase(),offset,data));
2079	2079	if (!m_current_chr_table)
2080	2080	{
2081		logerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space.device()));
	2081	logerror("No Characteriser Table @ %04x\n", space.device().safe_pcbase());
2082	2082	return;
2083	2083	}
2084	2084
r17788	r17789
2145	2145	{
2146	2146	if (!m_current_chr_table)
2147	2147	{
2148		logerror("No Characteriser Table @ %04x", cpu_get_previouspc(&space.device()));
	2148	logerror("No Characteriser Table @ %04x", space.device().safe_pcbase());
2149	2149
2150	2150	/* a cheat ... many early games use a standard check */
2151	2151	int addr = cpu_get_reg(&space.device(), M6809_X);
r17788	r17789
2215	2215	{
2216	2216	int x;
2217	2217	int call=data;
2218		LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X \n", cpu_get_previouspc(&space.device()),offset,data));
	2218	LOG_CHR_FULL(("%04x Characteriser write offset %02X data %02X \n", space.device().safe_pcbase(),offset,data));
2219	2219	if (!m_current_chr_table)
2220		fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space.device()));
	2220	fatalerror("No Characteriser Table @ %04x\n", space.device().safe_pcbase());
2221	2221
2222	2222	if ((offset & 0x3f)== 0)//initialisation is always at 0x800
2223	2223	{

trunk/src/mame/drivers/cobra.c

r17788	r17789
1052	1052	if (cpu != NULL)
1053	1053	{
1054	1054	// cpu has a name and a PC
1055		sprintf(accessor_location, "(%s) %08X", cpu->tag(), cpu_get_pc((device_t *)cpu));
	1055	sprintf(accessor_location, "(%s) %08X", cpu->tag(), const_cast<device_t *>(cpu)->safe_pc());
1056	1056	}
1057	1057	else
1058	1058	{
r17788	r17789
1072	1072	if (cpu != NULL)
1073	1073	{
1074	1074	// cpu has a name and a PC
1075		sprintf(accessor_location, "(%s) %08X", cpu->tag(), cpu_get_pc((device_t *)cpu));
	1075	sprintf(accessor_location, "(%s) %08X", cpu->tag(), const_cast<device_t *>(cpu)->safe_pc());
1076	1076	}
1077	1077	else
1078	1078	{
r17788	r17789
1129	1129	if (cpu != NULL)
1130	1130	{
1131	1131	// cpu has a name and a PC
1132		sprintf(accessor_location, "(%s) %08X", cpu->tag(), cpu_get_pc((device_t *)cpu));
	1132	sprintf(accessor_location, "(%s) %08X", cpu->tag(), const_cast<device_t *>(cpu)->safe_pc());
1133	1133	}
1134	1134	else
1135	1135	{
r17788	r17789
1150	1150	if (cpu != NULL)
1151	1151	{
1152	1152	// cpu has a name and a PC
1153		sprintf(accessor_location, "(%s) %08X", cpu->tag(), cpu_get_pc((device_t *)cpu));
	1153	sprintf(accessor_location, "(%s) %08X", cpu->tag(), const_cast<device_t *>(cpu)->safe_pc());
1154	1154	}
1155	1155	else
1156	1156	{

trunk/src/mame/drivers/twinkle.c

r17788	r17789
601	601	if (mem_mask == 0xff)
602	602	{
603	603	m_spu_shared[offset*2] = data;
604		//      printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, offset*2, mem_mask, cpu_get_pc(&space.device()));
	604	//      printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, offset*2, mem_mask, space.device().safe_pc());
605	605	}
606	606	else if (mem_mask == 0xff0000)
607	607	{
608	608	m_spu_shared[(offset*2)+1] = data;
609		//      printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, (offset*2)+1, mem_mask, cpu_get_pc(&space.device()));
	609	//      printf("shared_psx_w: %x to %x (%x), mask %x (PC=%x)\n", data, offset, (offset*2)+1, mem_mask, space.device().safe_pc());
610	610	}
611	611	else
612	612	{
r17788	r17789
621	621
622	622	result = m_spu_shared[offset*2] | m_spu_shared[(offset*2)+1]<<16;
623	623
624		//  printf("shared_psx_r: @ %x (%x %x), mask %x = %x (PC=%x)\n", offset, offset*2, (offset*2)+1, mem_mask, result, cpu_get_pc(&space.device()));
	624	//  printf("shared_psx_r: @ %x (%x %x), mask %x = %x (PC=%x)\n", offset, offset*2, (offset*2)+1, mem_mask, result, space.device().safe_pc());
625	625
626	626	result = 0;   // HACK to prevent the games from freezing while we sort out the rest of the 68k's boot sequence
627	627

trunk/src/mame/drivers/simpl156.c

r17788	r17789
1054	1054	/* Everything seems more stable if we run the CPU speed x4 and use Idle skips.. maybe it has an internal multipler? */
1055	1055	READ32_MEMBER(simpl156_state::joemacr_speedup_r)
1056	1056	{
1057		if (cpu_get_pc(&space.device()) == 0x284)
	1057	if (space.device().safe_pc() == 0x284)
1058	1058	device_spin_until_time(&space.device(), attotime::from_usec(400));
1059	1059	return m_systemram[0x18/4];
1060	1060	}
r17788	r17789
1068	1068
1069	1069	READ32_MEMBER(simpl156_state::chainrec_speedup_r)
1070	1070	{
1071		if (cpu_get_pc(&space.device()) == 0x2d4)
	1071	if (space.device().safe_pc() == 0x2d4)
1072	1072	device_spin_until_time(&space.device(), attotime::from_usec(400));
1073	1073	return m_systemram[0x18/4];
1074	1074	}
r17788	r17789
1081	1081
1082	1082	READ32_MEMBER(simpl156_state::prtytime_speedup_r)
1083	1083	{
1084		if (cpu_get_pc(&space.device()) == 0x4f0)
	1084	if (space.device().safe_pc() == 0x4f0)
1085	1085	device_spin_until_time(&space.device(), attotime::from_usec(400));
1086	1086	return m_systemram[0xae0/4];
1087	1087	}
r17788	r17789
1095	1095
1096	1096	READ32_MEMBER(simpl156_state::charlien_speedup_r)
1097	1097	{
1098		if (cpu_get_pc(&space.device()) == 0xc8c8)
	1098	if (space.device().safe_pc() == 0xc8c8)
1099	1099	device_spin_until_time(&space.device(), attotime::from_usec(400));
1100	1100	return m_systemram[0x10/4];
1101	1101	}
r17788	r17789
1108	1108
1109	1109	READ32_MEMBER(simpl156_state::osman_speedup_r)
1110	1110	{
1111		if (cpu_get_pc(&space.device()) == 0x5974)
	1111	if (space.device().safe_pc() == 0x5974)
1112	1112	device_spin_until_time(&space.device(), attotime::from_usec(400));
1113	1113	return m_systemram[0x10/4];
1114	1114	}

trunk/src/mame/drivers/artmagic.c

r17788	r17789
124	124	oki->set_bank_base((((data >> 4) & 1) * 0x40000) % oki->region()->bytes());
125	125	}
126	126
127		logerror("%06X:control_w(%d) = %04X\n", cpu_get_pc(&space.device()), offset, data);
	127	logerror("%06X:control_w(%d) = %04X\n", space.device().safe_pc(), offset, data);
128	128	}
129	129
130	130
r17788	r17789
145	145	READ16_MEMBER(artmagic_state::ultennis_hack_r)
146	146	{
147	147	/* IRQ5 points to: jsr (a5); rte */
148		UINT32 pc = cpu_get_pc(&space.device());
	148	UINT32 pc = space.device().safe_pc();
149	149	if (pc == 0x18c2 || pc == 0x18e4)
150	150	{
151	151	m_hack_irq = 1;

trunk/src/mame/drivers/hexion.c

r17788	r17789
89	89
90	90	WRITE8_MEMBER(hexion_state::coincntr_w)
91	91	{
92		//logerror("%04x: coincntr_w %02x\n",cpu_get_pc(&space.device()),data);
	92	//logerror("%04x: coincntr_w %02x\n",space.device().safe_pc(),data);
93	93
94	94	/* bits 0/1 = coin counters */
95	95	coin_counter_w(machine(), 0,data & 0x01);

trunk/src/mame/drivers/midqslvr.c

r17788	r17789
273	273	return (((class_code_val[function]) >> (reg & 3)*8) & 0xff);
274	274	}
275	275
276		printf("%08x PIIX4: read %d, %02X\n", cpu_get_pc(&space->device()), function, reg);
	276	printf("%08x PIIX4: read %d, %02X\n", space->device().safe_pc(), function, reg);
277	277
278	278	return state->m_piix4_config_reg[function][reg];
279	279	}

trunk/src/mame/drivers/seibuspi.c

r17788	r17789
747	747	UINT8 r;
748	748	if (state->m_fifoout_wpos == state->m_fifoout_rpos)
749	749	{
750		logerror("Sound FIFOOUT underflow at %08X\n", cpu_get_pc(&space->device()));
	750	logerror("Sound FIFOOUT underflow at %08X\n", space->device().safe_pc());
751	751	}
752	752	r = state->m_fifoout_data[state->m_fifoout_rpos++];
753	753	if(state->m_fifoout_rpos == FIFO_SIZE)
r17788	r17789
773	773	}
774	774	if(state->m_fifoout_wpos == state->m_fifoout_rpos)
775	775	{
776		fatalerror("Sound FIFOOUT overflow at %08X\n", cpu_get_pc(&space->device()));
	776	fatalerror("Sound FIFOOUT overflow at %08X\n", space->device().safe_pc());
777	777	}
778	778
779	779	state->m_fifoout_read_request = 1;
r17788	r17789
785	785	UINT8 r;
786	786	if (state->m_fifoin_wpos == state->m_fifoin_rpos)
787	787	{
788		fatalerror("Sound FIFOIN underflow at %08X\n", cpu_get_pc(&space->device()));
	788	fatalerror("Sound FIFOIN underflow at %08X\n", space->device().safe_pc());
789	789	}
790	790	r = state->m_fifoin_data[state->m_fifoin_rpos++];
791	791	if(state->m_fifoin_rpos == FIFO_SIZE)
r17788	r17789
811	811	}
812	812	if(state->m_fifoin_wpos == state->m_fifoin_rpos)
813	813	{
814		fatalerror("Sound FIFOIN overflow at %08X\n", cpu_get_pc(&space->device()));
	814	fatalerror("Sound FIFOIN overflow at %08X\n", space->device().safe_pc());
815	815	}
816	816
817	817	state->m_fifoin_read_request = 1;
r17788	r17789
1945	1945
1946	1946	READ32_MEMBER(seibuspi_state::senkyu_speedup_r)
1947	1947	{
1948		if (cpu_get_pc(&space.device())==0x00305bb2) device_spin_until_interrupt(&space.device()); // idle
	1948	if (space.device().safe_pc()==0x00305bb2) device_spin_until_interrupt(&space.device()); // idle
1949	1949	return m_spimainram[(0x0018cb4-0x800)/4];
1950	1950	}
1951	1951
1952	1952	READ32_MEMBER(seibuspi_state::senkyua_speedup_r)
1953	1953	{
1954		if (cpu_get_pc(&space.device())== 0x30582e) device_spin_until_interrupt(&space.device()); // idle
	1954	if (space.device().safe_pc()== 0x30582e) device_spin_until_interrupt(&space.device()); // idle
1955	1955	return m_spimainram[(0x0018c9c-0x800)/4];
1956	1956	}
1957	1957
1958	1958	READ32_MEMBER(seibuspi_state::batlball_speedup_r)
1959	1959	{
1960		//  printf("cpu_get_pc(&space.device()) %06x\n", cpu_get_pc(&space.device()));
	1960	//  printf("space.device().safe_pc() %06x\n", space.device().safe_pc());
1961	1961
1962	1962	/* batlbalu */
1963		if (cpu_get_pc(&space.device())==0x00305996) device_spin_until_interrupt(&space.device()); // idle
	1963	if (space.device().safe_pc()==0x00305996) device_spin_until_interrupt(&space.device()); // idle
1964	1964
1965	1965	/* batlball */
1966		if (cpu_get_pc(&space.device())==0x003058aa) device_spin_until_interrupt(&space.device()); // idle
	1966	if (space.device().safe_pc()==0x003058aa) device_spin_until_interrupt(&space.device()); // idle
1967	1967
1968	1968	return m_spimainram[(0x0018db4-0x800)/4];
1969	1969	}
r17788	r17789
1971	1971	READ32_MEMBER(seibuspi_state::rdft_speedup_r)
1972	1972	{
1973	1973	/* rdft */
1974		if (cpu_get_pc(&space.device())==0x0203f0a) device_spin_until_interrupt(&space.device()); // idle
	1974	if (space.device().safe_pc()==0x0203f0a) device_spin_until_interrupt(&space.device()); // idle
1975	1975
1976	1976	/* rdftau */
1977		if (cpu_get_pc(&space.device())==0x0203f16) device_spin_until_interrupt(&space.device()); // idle
	1977	if (space.device().safe_pc()==0x0203f16) device_spin_until_interrupt(&space.device()); // idle
1978	1978
1979	1979	/* rdftj */
1980		if (cpu_get_pc(&space.device())==0x0203f22) device_spin_until_interrupt(&space.device()); // idle
	1980	if (space.device().safe_pc()==0x0203f22) device_spin_until_interrupt(&space.device()); // idle
1981	1981
1982	1982	/* rdftdi */
1983		if (cpu_get_pc(&space.device())==0x0203f46) device_spin_until_interrupt(&space.device()); // idle
	1983	if (space.device().safe_pc()==0x0203f46) device_spin_until_interrupt(&space.device()); // idle
1984	1984
1985	1985	/* rdftu */
1986		if (cpu_get_pc(&space.device())==0x0203f3a) device_spin_until_interrupt(&space.device()); // idle
	1986	if (space.device().safe_pc()==0x0203f3a) device_spin_until_interrupt(&space.device()); // idle
1987	1987
1988		//  mame_printf_debug("%08x\n",cpu_get_pc(&space.device()));
	1988	//  mame_printf_debug("%08x\n",space.device().safe_pc());
1989	1989
1990	1990	return m_spimainram[(0x00298d0-0x800)/4];
1991	1991	}
r17788	r17789
1993	1993	READ32_MEMBER(seibuspi_state::viprp1_speedup_r)
1994	1994	{
1995	1995	/* viprp1 */
1996		if (cpu_get_pc(&space.device())==0x0202769) device_spin_until_interrupt(&space.device()); // idle
	1996	if (space.device().safe_pc()==0x0202769) device_spin_until_interrupt(&space.device()); // idle
1997	1997
1998	1998	/* viprp1s */
1999		if (cpu_get_pc(&space.device())==0x02027e9) device_spin_until_interrupt(&space.device()); // idle
	1999	if (space.device().safe_pc()==0x02027e9) device_spin_until_interrupt(&space.device()); // idle
2000	2000
2001	2001	/* viprp1ot */
2002		if (cpu_get_pc(&space.device())==0x02026bd) device_spin_until_interrupt(&space.device()); // idle
	2002	if (space.device().safe_pc()==0x02026bd) device_spin_until_interrupt(&space.device()); // idle
2003	2003
2004		//  mame_printf_debug("%08x\n",cpu_get_pc(&space.device()));
	2004	//  mame_printf_debug("%08x\n",space.device().safe_pc());
2005	2005
2006	2006	return m_spimainram[(0x001e2e0-0x800)/4];
2007	2007	}
r17788	r17789
2009	2009	READ32_MEMBER(seibuspi_state::viprp1o_speedup_r)
2010	2010	{
2011	2011	/* viperp1o */
2012		if (cpu_get_pc(&space.device())==0x0201f99) device_spin_until_interrupt(&space.device()); // idle
2013		//  mame_printf_debug("%08x\n",cpu_get_pc(&space.device()));
	2012	if (space.device().safe_pc()==0x0201f99) device_spin_until_interrupt(&space.device()); // idle
	2013	//  mame_printf_debug("%08x\n",space.device().safe_pc());
2014	2014	return m_spimainram[(0x001d49c-0x800)/4];
2015	2015	}
2016	2016
r17788	r17789
2018	2018	// causes input problems?
2019	2019	READ32_MEMBER(seibuspi_state::ejanhs_speedup_r)
2020	2020	{
2021		// mame_printf_debug("%08x\n",cpu_get_pc(&space.device()));
2022		if (cpu_get_pc(&space.device())==0x03032c7) device_spin_until_interrupt(&space.device()); // idle
	2021	// mame_printf_debug("%08x\n",space.device().safe_pc());
	2022	if (space.device().safe_pc()==0x03032c7) device_spin_until_interrupt(&space.device()); // idle
2023	2023	return m_spimainram[(0x002d224-0x800)/4];
2024	2024	}
2025	2025	#endif
r17788	r17789
2028	2028	{
2029	2029
2030	2030	/* rdft22kc */
2031		if (cpu_get_pc(&space.device())==0x0203926) device_spin_until_interrupt(&space.device()); // idle
	2031	if (space.device().safe_pc()==0x0203926) device_spin_until_interrupt(&space.device()); // idle
2032	2032
2033	2033	/* rdft2, rdft2j */
2034		if (cpu_get_pc(&space.device())==0x0204372) device_spin_until_interrupt(&space.device()); // idle
	2034	if (space.device().safe_pc()==0x0204372) device_spin_until_interrupt(&space.device()); // idle
2035	2035
2036	2036	/* rdft2us */
2037		if (cpu_get_pc(&space.device())==0x020420e) device_spin_until_interrupt(&space.device()); // idle
	2037	if (space.device().safe_pc()==0x020420e) device_spin_until_interrupt(&space.device()); // idle
2038	2038
2039	2039	/* rdft2a */
2040		if (cpu_get_pc(&space.device())==0x0204366) device_spin_until_interrupt(&space.device()); // idle
	2040	if (space.device().safe_pc()==0x0204366) device_spin_until_interrupt(&space.device()); // idle
2041	2041
2042		//  mame_printf_debug("%08x\n",cpu_get_pc(&space.device()));
	2042	//  mame_printf_debug("%08x\n",space.device().safe_pc());
2043	2043
2044	2044	return m_spimainram[(0x0282AC-0x800)/4];
2045	2045	}
r17788	r17789
2047	2047	READ32_MEMBER(seibuspi_state::rfjet_speedup_r)
2048	2048	{
2049	2049	/* rfjet, rfjetu, rfjeta */
2050		if (cpu_get_pc(&space.device())==0x0206082) device_spin_until_interrupt(&space.device()); // idle
	2050	if (space.device().safe_pc()==0x0206082) device_spin_until_interrupt(&space.device()); // idle
2051	2051
2052	2052	/* rfjetus */
2053		if (cpu_get_pc(&space.device())==0x0205b39)
	2053	if (space.device().safe_pc()==0x0205b39)
2054	2054	{
2055	2055	UINT32 r;
2056	2056	device_spin_until_interrupt(&space.device()); // idle
r17788	r17789
2060	2060	}
2061	2061
2062	2062	/* rfjetj */
2063		if (cpu_get_pc(&space.device())==0x0205f2e) device_spin_until_interrupt(&space.device()); // idle
	2063	if (space.device().safe_pc()==0x0205f2e) device_spin_until_interrupt(&space.device()); // idle
2064	2064
2065		//  mame_printf_debug("%08x\n",cpu_get_pc(&space.device()));
	2065	//  mame_printf_debug("%08x\n",space.device().safe_pc());
2066	2066
2067	2067
2068	2068	return m_spimainram[(0x002894c-0x800)/4];

trunk/src/mame/drivers/coolpool.c

r17788	r17789
218	218
219	219	WRITE16_MEMBER(coolpool_state::amerdart_misc_w)
220	220	{
221		logerror("%08x:IOP_system_w %04x\n",cpu_get_pc(&space.device()),data);
	221	logerror("%08x:IOP_system_w %04x\n",space.device().safe_pc(),data);
222	222
223	223	coin_counter_w(machine(), 0, ~data & 0x0001);
224	224	coin_counter_w(machine(), 1, ~data & 0x0002);
r17788	r17789
250	250	READ16_MEMBER(coolpool_state::amerdart_iop_r)
251	251	{
252	252
253		//  logerror("%08x:IOP read %04x\n",cpu_get_pc(&space.device()),m_iop_answer);
	253	//  logerror("%08x:IOP read %04x\n",space.device().safe_pc(),m_iop_answer);
254	254	cputag_set_input_line(machine(), "maincpu", 1, CLEAR_LINE);
255	255
256	256	return m_iop_answer;
r17788	r17789
259	259	WRITE16_MEMBER(coolpool_state::amerdart_iop_w)
260	260	{
261	261
262		//  logerror("%08x:IOP write %04x\n", cpu_get_pc(&space.device()), data);
	262	//  logerror("%08x:IOP write %04x\n", space.device().safe_pc(), data);
263	263	COMBINE_DATA(&m_iop_cmd);
264	264	m_cmd_pending = 1;
265	265	}
r17788	r17789
267	267	READ16_MEMBER(coolpool_state::amerdart_dsp_cmd_r)
268	268	{
269	269
270		//  logerror("%08x:DSP cmd_r %04x\n", cpu_get_pc(&space.device()), m_iop_cmd);
	270	//  logerror("%08x:DSP cmd_r %04x\n", space.device().safe_pc(), m_iop_cmd);
271	271	m_cmd_pending = 0;
272	272	return m_iop_cmd;
273	273	}
r17788	r17789
275	275	WRITE16_MEMBER(coolpool_state::amerdart_dsp_answer_w)
276	276	{
277	277
278		//  logerror("%08x:DSP answer %04x\n", cpu_get_pc(&space.device()), data);
	278	//  logerror("%08x:DSP answer %04x\n", space.device().safe_pc(), data);
279	279	m_iop_answer = data;
280	280	cputag_set_input_line(machine(), "maincpu", 1, ASSERT_LINE);
281	281	}
r17788	r17789
423	423	m_result = (m_result & 0x0fff) | (amerdart_trackball_direction(&space, 2, ((m_result >> 12) & 0xf)) << 12);
424	424
425	425
426		//  logerror("%08X:read port 6 (X=%02X Y=%02X oldX=%02X oldY=%02X oldRes=%04X Res=%04X)\n", cpu_get_pc(&space.device()), m_newx, m_newy, m_oldx, m_oldy, m_lastresult, m_result);
	426	//  logerror("%08X:read port 6 (X=%02X Y=%02X oldX=%02X oldY=%02X oldRes=%04X Res=%04X)\n", space.device().safe_pc(), m_newx, m_newy, m_oldx, m_oldy, m_lastresult, m_result);
427	427
428	428	m_lastresult = m_result;
429	429
r17788	r17789
439	439
440	440	WRITE16_MEMBER(coolpool_state::coolpool_misc_w)
441	441	{
442		logerror("%08x:IOP_system_w %04x\n",cpu_get_pc(&space.device()),data);
	442	logerror("%08x:IOP_system_w %04x\n",space.device().safe_pc(),data);
443	443
444	444	coin_counter_w(machine(), 0, ~data & 0x0001);
445	445	coin_counter_w(machine(), 1, ~data & 0x0002);
r17788	r17789
471	471
472	472	WRITE16_MEMBER(coolpool_state::coolpool_iop_w)
473	473	{
474		logerror("%08x:IOP write %04x\n", cpu_get_pc(&space.device()), data);
	474	logerror("%08x:IOP write %04x\n", space.device().safe_pc(), data);
475	475	machine().scheduler().synchronize(FUNC(deferred_iop_w), data);
476	476	}
477	477
r17788	r17789
479	479	READ16_MEMBER(coolpool_state::coolpool_iop_r)
480	480	{
481	481
482		logerror("%08x:IOP read %04x\n",cpu_get_pc(&space.device()),m_iop_answer);
	482	logerror("%08x:IOP read %04x\n",space.device().safe_pc(),m_iop_answer);
483	483	cputag_set_input_line(machine(), "maincpu", 1, CLEAR_LINE);
484	484
485	485	return m_iop_answer;
r17788	r17789
498	498	{
499	499
500	500	m_cmd_pending = 0;
501		logerror("%08x:IOP cmd_r %04x\n", cpu_get_pc(&space.device()), m_iop_cmd);
	501	logerror("%08x:IOP cmd_r %04x\n", space.device().safe_pc(), m_iop_cmd);
502	502	return m_iop_cmd;
503	503	}
504	504
r17788	r17789
506	506	WRITE16_MEMBER(coolpool_state::dsp_answer_w)
507	507	{
508	508
509		logerror("%08x:IOP answer %04x\n", cpu_get_pc(&space.device()), data);
	509	logerror("%08x:IOP answer %04x\n", space.device().safe_pc(), data);
510	510	m_iop_answer = data;
511	511	cputag_set_input_line(machine(), "maincpu", 1, ASSERT_LINE);
512	512	}
r17788	r17789
625	625	}
626	626	}
627	627
628		//  logerror("%08X:read port 7 (X=%02X Y=%02X oldX=%02X oldY=%02X res=%04X)\n", cpu_get_pc(&space.device()),
	628	//  logerror("%08X:read port 7 (X=%02X Y=%02X oldX=%02X oldY=%02X res=%04X)\n", space.device().safe_pc(),
629	629	//      m_newx[1], m_newy[1], m_oldx[1], m_oldy[1], m_result);
630	630	m_lastresult = m_result;
631	631	return m_result;

trunk/src/mame/drivers/astrafr.c

r17788	r17789
53	53
54	54	DECLARE_READ8_MEMBER( astra_fgpa_r )
55	55	{
56		int pc = cpu_get_pc(&space.device());
	56	int pc = space.device().safe_pc();
57	57
58	58	if (offset==fgpa_first_read_addr)
59	59	{
r17788	r17789
68	68
69	69	DECLARE_WRITE8_MEMBER( astra_fgpa_w )
70	70	{
71		int pc = cpu_get_pc(&space.device());
	71	int pc = space.device().safe_pc();
72	72
73	73	if (offset==fgpa_rom_write_addr)
74	74	{
r17788	r17789
84	84	/* 2nd copy for the 2nd board (assume same addresses for now */
85	85	DECLARE_READ8_MEMBER( astra_fgpa_slave_r )
86	86	{
87		int pc = cpu_get_pc(&space.device());
	87	int pc = space.device().safe_pc();
88	88
89	89	if (offset==fgpa_first_read_addr)
90	90	{
r17788	r17789
99	99
100	100	DECLARE_WRITE8_MEMBER( astra_fgpa_slave_w )
101	101	{
102		int pc = cpu_get_pc(&space.device());
	102	int pc = space.device().safe_pc();
103	103
104	104	if (offset==fgpa_rom_write_addr)
105	105	{
r17788	r17789
126	126
127	127	READ32_MEMBER(astrafr_state::astrafr_mem_r)
128	128	{
129		int pc = cpu_get_pc(&space.device());
	129	int pc = space.device().safe_pc();
130	130	int cs = m68340_get_cs(m_maincpu, offset * 4);
131	131
132	132	switch ( cs )
r17788	r17789
153	153
154	154	WRITE32_MEMBER(astrafr_state::astrafr_mem_w)
155	155	{
156		int pc = cpu_get_pc(&space.device());
	156	int pc = space.device().safe_pc();
157	157	int address = offset * 4;
158	158	int cs = m68340_get_cs(m_maincpu, address);
159	159
r17788	r17789
183	183
184	184	READ32_MEMBER(astrafr_state::astrafr_slave_mem_r)
185	185	{
186		int pc = cpu_get_pc(&space.device());
	186	int pc = space.device().safe_pc();
187	187	int cs = m68340_get_cs(m_slavecpu, offset * 4);
188	188
189	189	switch ( cs )
r17788	r17789
208	208
209	209	WRITE32_MEMBER(astrafr_state::astrafr_slave_mem_w)
210	210	{
211		int pc = cpu_get_pc(&space.device());
	211	int pc = space.device().safe_pc();
212	212	int address = offset * 4;
213	213	int cs = m68340_get_cs(m_slavecpu, address);
214	214

trunk/src/mame/drivers/system1.c

r17788	r17789
567	567
568	568	default:
569	569	logerror("%03X: MCU movx write mode %02X offset %04X = %02X\n",
570		cpu_get_pc(&space.device()), m_mcu_control, offset, data);
	570	space.device().safe_pc(), m_mcu_control, offset, data);
571	571	break;
572	572	}
573	573	}
r17788	r17789
588	588
589	589	default:
590	590	logerror("%03X: MCU movx read mode %02X offset %04X\n",
591		cpu_get_pc(&space.device()), m_mcu_control, offset);
	591	space.device().safe_pc(), m_mcu_control, offset);
592	592	return 0xff;
593	593	}
594	594	}
r17788	r17789
681	681
682	682	READ8_MEMBER(system1_state::nobb_inport1c_r)
683	683	{
684		//  logerror("IN  $1c : pc = %04x - data = 0x80\n",cpu_get_pc(&space.device()));
	684	//  logerror("IN  $1c : pc = %04x - data = 0x80\n",space.device().safe_pc());
685	685	return(0x80);   // infinite loop (at 0x0fb3) until bit 7 is set
686	686	}
687	687
688	688	READ8_MEMBER(system1_state::nobb_inport22_r)
689	689	{
690		//  logerror("IN  $22 : pc = %04x - data = %02x\n",cpu_get_pc(&space.device()),nobb_inport17_step);
	690	//  logerror("IN  $22 : pc = %04x - data = %02x\n",space.device().safe_pc(),nobb_inport17_step);
691	691	return(0);//nobb_inport17_step);
692	692	}
693	693
694	694	READ8_MEMBER(system1_state::nobb_inport23_r)
695	695	{
696		//  logerror("IN  $23 : pc = %04x - step = %02x\n",cpu_get_pc(&space.device()),m_nobb_inport23_step);
	696	//  logerror("IN  $23 : pc = %04x - step = %02x\n",space.device().safe_pc(),m_nobb_inport23_step);
697	697	return(m_nobb_inport23_step);
698	698	}
699	699
700	700	WRITE8_MEMBER(system1_state::nobb_outport24_w)
701	701	{
702		//  logerror("OUT $24 : pc = %04x - data = %02x\n",cpu_get_pc(&space.device()),data);
	702	//  logerror("OUT $24 : pc = %04x - data = %02x\n",space.device().safe_pc(),data);
703	703	m_nobb_inport23_step = data;
704	704	}
705	705
r17788	r17789
4705	4705	READ8_MEMBER(system1_state::nob_start_r)
4706	4706	{
4707	4707	/* in reality, it's likely some M1-dependent behavior */
4708		return (cpu_get_pc(&space.device()) <= 0x0003) ? 0x80 : memregion("maincpu")->base()[1];
	4708	return (space.device().safe_pc() <= 0x0003) ? 0x80 : memregion("maincpu")->base()[1];
4709	4709	}
4710	4710
4711	4711	DRIVER_INIT_MEMBER(system1_state,nob)

trunk/src/mame/drivers/quizo.c

r17788	r17789
126	126	{
127	127	if(data>9)
128	128	{
129		logerror("ROMBANK %x @ %x\n", data, cpu_get_pc(&space.device()));
	129	logerror("ROMBANK %x @ %x\n", data, space.device().safe_pc());
130	130	data=0;
131	131	}
132	132	m_port60=data;

trunk/src/mame/drivers/suprnova.c

r17788	r17789
642	642	cputag_set_input_line(machine(), "maincpu",0xf,CLEAR_LINE);*/
643	643
644	644	/* idle skip for vblokbrk/sarukani, i can't find a better place to put it :-( but i think it works ok unless its making the game too fast */
645		if (cpu_get_pc(&space.device())==0x04013B42)
	645	if (space.device().safe_pc()==0x04013B42)
646	646	{
647	647	if (!strcmp(machine().system().name,"vblokbrk") ||
648	648	!strcmp(machine().system().name,"sarukani"))
r17788	r17789
867	867	04022072: CMP/EQ  R2,R3
868	868	04022074: BT      $0402206C
869	869	*/
870		if (cpu_get_pc(&space.device())==0x402206e)
	870	if (space.device().safe_pc()==0x402206e)
871	871	{
872	872	if(m_main_ram[0x00078/4] == m_main_ram[0x0c780/4])
873	873	device_spin_until_interrupt(&space.device());
r17788	r17789
877	877
878	878	READ32_MEMBER(skns_state::cyvern_speedup_r)
879	879	{
880		if (cpu_get_pc(&space.device())==0x402ebd2) device_spin_until_interrupt(&space.device());
	880	if (space.device().safe_pc()==0x402ebd2) device_spin_until_interrupt(&space.device());
881	881	return m_main_ram[0x4d3c8/4];
882	882	}
883	883
884	884	READ32_MEMBER(skns_state::puzzloopj_speedup_r)
885	885	{
886		if (cpu_get_pc(&space.device())==0x401dca0) device_spin_until_interrupt(&space.device());
	886	if (space.device().safe_pc()==0x401dca0) device_spin_until_interrupt(&space.device());
887	887	return m_main_ram[0x86714/4];
888	888	}
889	889
890	890	READ32_MEMBER(skns_state::puzzloopa_speedup_r)
891	891	{
892		if (cpu_get_pc(&space.device())==0x401d9d4) device_spin_until_interrupt(&space.device());
	892	if (space.device().safe_pc()==0x401d9d4) device_spin_until_interrupt(&space.device());
893	893	return m_main_ram[0x85bcc/4];
894	894	}
895	895
896	896	READ32_MEMBER(skns_state::puzzloopu_speedup_r)
897	897	{
898		if (cpu_get_pc(&space.device())==0x401dab0) device_spin_until_interrupt(&space.device());
	898	if (space.device().safe_pc()==0x401dab0) device_spin_until_interrupt(&space.device());
899	899	return m_main_ram[0x85cec/4];
900	900	}
901	901
r17788	r17789
908	908	0401DA18: BF      $0401DA26
909	909	0401DA26: BRA     $0401DA12
910	910	*/
911		if (cpu_get_pc(&space.device())==0x401da14) device_spin_until_interrupt(&space.device());
	911	if (space.device().safe_pc()==0x401da14) device_spin_until_interrupt(&space.device());
912	912	return m_main_ram[0x81d38/4];
913	913	}
914	914
915	915	READ32_MEMBER(skns_state::senknow_speedup_r)
916	916	{
917		if (cpu_get_pc(&space.device())==0x4017dce) device_spin_until_interrupt(&space.device());
	917	if (space.device().safe_pc()==0x4017dce) device_spin_until_interrupt(&space.device());
918	918	return m_main_ram[0x0000dc/4];
919	919	}
920	920
921	921	READ32_MEMBER(skns_state::teljan_speedup_r)
922	922	{
923		if (cpu_get_pc(&space.device())==0x401ba32) device_spin_until_interrupt(&space.device());
	923	if (space.device().safe_pc()==0x401ba32) device_spin_until_interrupt(&space.device());
924	924	return m_main_ram[0x002fb4/4];
925	925	}
926	926
927	927	READ32_MEMBER(skns_state::jjparads_speedup_r)
928	928	{
929		if (cpu_get_pc(&space.device())==0x4015e84) device_spin_until_interrupt(&space.device());
	929	if (space.device().safe_pc()==0x4015e84) device_spin_until_interrupt(&space.device());
930	930	return m_main_ram[0x000994/4];
931	931	}
932	932
933	933	READ32_MEMBER(skns_state::jjparad2_speedup_r)
934	934	{
935		if (cpu_get_pc(&space.device())==0x401620a) device_spin_until_interrupt(&space.device());
	935	if (space.device().safe_pc()==0x401620a) device_spin_until_interrupt(&space.device());
936	936	return m_main_ram[0x000984/4];
937	937	}
938	938
939	939	READ32_MEMBER(skns_state::ryouran_speedup_r)
940	940	{
941		if (cpu_get_pc(&space.device())==0x40182ce) device_spin_until_interrupt(&space.device());
	941	if (space.device().safe_pc()==0x40182ce) device_spin_until_interrupt(&space.device());
942	942	return m_main_ram[0x000a14/4];
943	943	}
944	944
945	945	READ32_MEMBER(skns_state::galpans2_speedup_r)
946	946	{
947		if (cpu_get_pc(&space.device())==0x4049ae2) device_spin_until_interrupt(&space.device());
	947	if (space.device().safe_pc()==0x4049ae2) device_spin_until_interrupt(&space.device());
948	948	return m_main_ram[0x0fb6bc/4];
949	949	}
950	950
951	951	READ32_MEMBER(skns_state::panicstr_speedup_r)
952	952	{
953		if (cpu_get_pc(&space.device())==0x404e68a) device_spin_until_interrupt(&space.device());
	953	if (space.device().safe_pc()==0x404e68a) device_spin_until_interrupt(&space.device());
954	954	return m_main_ram[0x0f19e4/4];
955	955	}
956	956
957	957	READ32_MEMBER(skns_state::sengekis_speedup_r)// 60006ee  600308e
958	958	{
959		if (cpu_get_pc(&space.device())==0x60006ec) device_spin_until_interrupt(&space.device());
	959	if (space.device().safe_pc()==0x60006ec) device_spin_until_interrupt(&space.device());
960	960	return m_main_ram[0xb74bc/4];
961	961	}
962	962
963	963	READ32_MEMBER(skns_state::sengekij_speedup_r)// 60006ee  600308e
964	964	{
965		if (cpu_get_pc(&space.device())==0x60006ec) device_spin_until_interrupt(&space.device());
	965	if (space.device().safe_pc()==0x60006ec) device_spin_until_interrupt(&space.device());
966	966	return m_main_ram[0xb7380/4];
967	967	}
968	968

trunk/src/mame/drivers/witch.c

r17788	r17789
413	413	Otherwise later in game some I/O (controls) reads are skipped.
414	414	*/
415	415
416		switch(cpu_get_pc(&space.device()))
	416	switch(space.device().safe_pc())
417	417	{
418	418	case 0x23f:
419	419	case 0x246:

trunk/src/mame/drivers/dynax.c

r17788	r17789
279	279	{
280	280	int bank_n = (machine().root_device().memregion("maincpu")->bytes() - 0x10000) / 0x8000;
281	281
282		//logerror("%04x: rom bank = %02x\n", cpu_get_pc(&space.device()), data);
	282	//logerror("%04x: rom bank = %02x\n", space.device().safe_pc(), data);
283	283	if (data < bank_n)
284	284	membank("bank1")->set_entry(data);
285	285	else
r17788	r17789
751	751	{
752	752	int bank_n = (machine().root_device().memregion("maincpu")->bytes() - 0x10000) / 0x8000;
753	753
754		//logerror("%04x: rom bank = %02x\n", cpu_get_pc(&space.device()), data);
	754	//logerror("%04x: rom bank = %02x\n", space.device().safe_pc(), data);
755	755	if (data < bank_n)
756	756	membank("bank1")->set_entry(data);
757	757	else
r17788	r17789
779	779	case 0x81:   dynax_blit_romregion_w(space, 0, 3);   return;
780	780	case 0x82:   dynax_blit_romregion_w(space, 0, 4);   return;   // mjcomv1
781	781	}
782		logerror("%04x: unmapped romregion=%02X\n", cpu_get_pc(&space.device()), data);
	782	logerror("%04x: unmapped romregion=%02X\n", space.device().safe_pc(), data);
783	783	}
784	784
785	785	static ADDRESS_MAP_START( yarunara_io_map, AS_IO, 8, dynax_state )
r17788	r17789
1152	1152
1153	1153	case 0xff:   break;   // CRT controller?
1154	1154	default:
1155		logerror("%04x: coins_w with select = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_input_sel, data);
	1155	logerror("%04x: coins_w with select = %02x, data = %02x\n", space.device().safe_pc(), m_input_sel, data);
1156	1156	}
1157	1157	}
1158	1158
r17788	r17789
1167	1167	case 0x82:   return ioport(keynames0[m_keyb++])->read();
1168	1168	case 0x0d:   return 0xff;   // unused
1169	1169	}
1170		logerror("%04x: input_r with select = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	1170	logerror("%04x: input_r with select = %02x\n", space.device().safe_pc(), m_input_sel);
1171	1171	return 0xff;
1172	1172	}
1173	1173
r17788	r17789
1181	1181	case 0x02:   return 0xbf | ((m_hopper && !(machine().primary_screen->frame_number() % 10)) ? 0 : (1 << 6));   // bit 7 = blitter busy, bit 6 = hopper
1182	1182	case 0x03:   return m_coins;
1183	1183	}
1184		logerror("%04x: coin_r with select = %02x\n", cpu_get_pc(&space.device()), m_input_sel);
	1184	logerror("%04x: coin_r with select = %02x\n", space.device().safe_pc(), m_input_sel);
1185	1185	return 0xff;
1186	1186	}
1187	1187
r17788	r17789
1200	1200	case 0x81:   dynax_blit_romregion_w(space, 0, 1);   return;
1201	1201	case 0x00:   dynax_blit_romregion_w(space, 0, 2);   return;
1202	1202	}
1203		logerror("%04x: unmapped romregion=%02X\n", cpu_get_pc(&space.device()), data);
	1203	logerror("%04x: unmapped romregion=%02X\n", space.device().safe_pc(), data);
1204	1204	}
1205	1205
1206	1206	static ADDRESS_MAP_START( htengoku_io_map, AS_IO, 8, dynax_state )
r17788	r17789
1273	1273	break;
1274	1274	return;
1275	1275	}
1276		logerror("%04x: unmapped ip_sel=%02x written with %02x\n", cpu_get_pc(&space.device()), m_input_sel, data);
	1276	logerror("%04x: unmapped ip_sel=%02x written with %02x\n", space.device().safe_pc(), m_input_sel, data);
1277	1277	}
1278	1278
1279	1279	READ8_MEMBER(dynax_state::tenkai_ip_r)
r17788	r17789
1291	1291	return ioport("COINS")->read();   // coins
1292	1292
1293	1293	default:
1294		logerror("%04x: unmapped ip_sel=%02x read from offs %x\n", cpu_get_pc(&space.device()), m_input_sel, offset);
	1294	logerror("%04x: unmapped ip_sel=%02x read from offs %x\n", space.device().safe_pc(), m_input_sel, offset);
1295	1295	return 0xff;
1296	1296	}
1297	1297	}
r17788	r17789
1306	1306	// player 2
1307	1307	case 0x81:
1308	1308	if (m_keyb >= 5)
1309		logerror("%04x: unmapped keyb=%02x read\n", cpu_get_pc(&space.device()), m_keyb);
	1309	logerror("%04x: unmapped keyb=%02x read\n", space.device().safe_pc(), m_keyb);
1310	1310	return 0xff;//ioport(keynames1[m_keyb++])->read();
1311	1311
1312	1312	// player 1
1313	1313	case 0x82:
1314	1314	if (m_keyb >= 5)
1315		logerror("%04x: unmapped keyb=%02x read\n", cpu_get_pc(&space.device()), m_keyb);
	1315	logerror("%04x: unmapped keyb=%02x read\n", space.device().safe_pc(), m_keyb);
1316	1316	return ioport(keynames0[m_keyb++])->read();
1317	1317
1318	1318	default:
1319		logerror("%04x: unmapped ip_sel=%02x read from offs %x\n", cpu_get_pc(&space.device()), m_input_sel, offset);
	1319	logerror("%04x: unmapped ip_sel=%02x read from offs %x\n", space.device().safe_pc(), m_input_sel, offset);
1320	1320	return 0xff;
1321	1321	}
1322	1322	}
r17788	r17789
1432	1432	else if (m_rombank == 0x12)
1433	1433	return tenkai_palette_r(space, offset);
1434	1434
1435		logerror("%04x: unmapped offset %04X read with rombank=%02X\n", cpu_get_pc(&space.device()), offset, m_rombank);
	1435	logerror("%04x: unmapped offset %04X read with rombank=%02X\n", space.device().safe_pc(), offset, m_rombank);
1436	1436	return 0x00;
1437	1437	}
1438	1438
r17788	r17789
1452	1452	return;
1453	1453	}
1454	1454
1455		logerror("%04x: unmapped offset %04X=%02X written with rombank=%02X\n", cpu_get_pc(&space.device()), offset, data, m_rombank);
	1455	logerror("%04x: unmapped offset %04X=%02X written with rombank=%02X\n", space.device().safe_pc(), offset, data, m_rombank);
1456	1456	}
1457	1457
1458	1458	static void tenkai_show_6c( running_machine &machine )
r17788	r17789
1481	1481	case 0x83:   dynax_blit_romregion_w(space, 0, 1);   return;
1482	1482	case 0x80:   dynax_blit_romregion_w(space, 0, 2);   return;
1483	1483	}
1484		logerror("%04x: unmapped romregion=%02X\n", cpu_get_pc(&space.device()), data);
	1484	logerror("%04x: unmapped romregion=%02X\n", space.device().safe_pc(), data);
1485	1485	}
1486	1486
1487	1487	static ADDRESS_MAP_START( tenkai_map, AS_PROGRAM, 8, dynax_state )
r17788	r17789
1591	1591	case 0x8067:   return ioport("DSW2")->read();
1592	1592	}
1593	1593
1594		logerror("%04x: unmapped offset %04X read with rombank=%02X\n",cpu_get_pc(&space.device()), offset, m_rombank);
	1594	logerror("%04x: unmapped offset %04X read with rombank=%02X\n",space.device().safe_pc(), offset, m_rombank);
1595	1595	return 0x00;
1596	1596	}
1597	1597
r17788	r17789
1647	1647	//              break;
1648	1648	}
1649	1649	}
1650		logerror("%04x: unmapped offset %04X=%02X written with rombank=%02X\n", cpu_get_pc(&space.device()), offset, data, m_rombank);
	1650	logerror("%04x: unmapped offset %04X=%02X written with rombank=%02X\n", space.device().safe_pc(), offset, data, m_rombank);
1651	1651	}
1652	1652
1653	1653

trunk/src/mame/drivers/mpu5hw.c

r17788	r17789
64	64
65	65	READ32_MEMBER(mpu5_state::mpu5_mem_r)
66	66	{
67		int pc = cpu_get_pc(&space.device());
	67	int pc = space.device().safe_pc();
68	68	int cs = m68340_get_cs(m_maincpu, offset * 4);
69	69
70	70	switch ( cs )
r17788	r17789
86	86
87	87	WRITE32_MEMBER(mpu5_state::mpu5_mem_w)
88	88	{
89		int pc = cpu_get_pc(&space.device());
	89	int pc = space.device().safe_pc();
90	90	int cs = m68340_get_cs(m_maincpu, offset * 4);
91	91
92	92	switch ( cs )

trunk/src/mame/drivers/itech32.c

r17788	r17789
833	833
834	834	READ32_MEMBER(itech32_state::drivedge_tms1_speedup_r)
835	835	{
836		if (m_tms1_ram[0x382] == 0 && cpu_get_pc(&space.device()) == 0xee) START_TMS_SPINNING(0);
	836	if (m_tms1_ram[0x382] == 0 && space.device().safe_pc() == 0xee) START_TMS_SPINNING(0);
837	837	return m_tms1_ram[0x382];
838	838	}
839	839
840	840
841	841	READ32_MEMBER(itech32_state::drivedge_tms2_speedup_r)
842	842	{
843		if (m_tms2_ram[0x382] == 0 && cpu_get_pc(&space.device()) == 0x809808) START_TMS_SPINNING(1);
	843	if (m_tms2_ram[0x382] == 0 && space.device().safe_pc() == 0x809808) START_TMS_SPINNING(1);
844	844	return m_tms2_ram[0x382];
845	845	}
846	846
r17788	r17789
929	929
930	930	READ32_MEMBER(itech32_state::test1_r)
931	931	{
932		if (ACCESSING_BITS_24_31 && !m_written[0x100 + offset*4+0]) logerror("%06X:read from uninitialized memory %04X\n", cpu_get_pc(&space.device()), 0x100 + offset*4+0);
933		if (ACCESSING_BITS_16_23 && !m_written[0x100 + offset*4+1]) logerror("%06X:read from uninitialized memory %04X\n", cpu_get_pc(&space.device()), 0x100 + offset*4+1);
934		if (ACCESSING_BITS_8_15 && !m_written[0x100 + offset*4+2]) logerror("%06X:read from uninitialized memory %04X\n", cpu_get_pc(&space.device()), 0x100 + offset*4+2);
935		if (ACCESSING_BITS_0_7 && !m_written[0x100 + offset*4+3]) logerror("%06X:read from uninitialized memory %04X\n", cpu_get_pc(&space.device()), 0x100 + offset*4+3);
	932	if (ACCESSING_BITS_24_31 && !m_written[0x100 + offset*4+0]) logerror("%06X:read from uninitialized memory %04X\n", space.device().safe_pc(), 0x100 + offset*4+0);
	933	if (ACCESSING_BITS_16_23 && !m_written[0x100 + offset*4+1]) logerror("%06X:read from uninitialized memory %04X\n", space.device().safe_pc(), 0x100 + offset*4+1);
	934	if (ACCESSING_BITS_8_15 && !m_written[0x100 + offset*4+2]) logerror("%06X:read from uninitialized memory %04X\n", space.device().safe_pc(), 0x100 + offset*4+2);
	935	if (ACCESSING_BITS_0_7 && !m_written[0x100 + offset*4+3]) logerror("%06X:read from uninitialized memory %04X\n", space.device().safe_pc(), 0x100 + offset*4+3);
936	936	return ((UINT32 *)m_main_ram)[0x100/4 + offset];
937	937	}
938	938
r17788	r17789
947	947
948	948	READ32_MEMBER(itech32_state::test2_r)
949	949	{
950		if (ACCESSING_BITS_24_31 && !m_written[0xc00 + offset*4+0]) logerror("%06X:read from uninitialized memory %04X\n", cpu_get_pc(&space.device()), 0xc00 + offset*4+0);
951		if (ACCESSING_BITS_16_23 && !m_written[0xc00 + offset*4+1]) logerror("%06X:read from uninitialized memory %04X\n", cpu_get_pc(&space.device()), 0xc00 + offset*4+1);
952		if (ACCESSING_BITS_8_15 && !m_written[0xc00 + offset*4+2]) logerror("%06X:read from uninitialized memory %04X\n", cpu_get_pc(&space.device()), 0xc00 + offset*4+2);
953		if (ACCESSING_BITS_0_7 && !m_written[0xc00 + offset*4+3]) logerror("%06X:read from uninitialized memory %04X\n", cpu_get_pc(&space.device()), 0xc00 + offset*4+3);
	950	if (ACCESSING_BITS_24_31 && !m_written[0xc00 + offset*4+0]) logerror("%06X:read from uninitialized memory %04X\n", space.device().safe_pc(), 0xc00 + offset*4+0);
	951	if (ACCESSING_BITS_16_23 && !m_written[0xc00 + offset*4+1]) logerror("%06X:read from uninitialized memory %04X\n", space.device().safe_pc(), 0xc00 + offset*4+1);
	952	if (ACCESSING_BITS_8_15 && !m_written[0xc00 + offset*4+2]) logerror("%06X:read from uninitialized memory %04X\n", space.device().safe_pc(), 0xc00 + offset*4+2);
	953	if (ACCESSING_BITS_0_7 && !m_written[0xc00 + offset*4+3]) logerror("%06X:read from uninitialized memory %04X\n", space.device().safe_pc(), 0xc00 + offset*4+3);
954	954	return ((UINT32 *)m_main_ram)[0xc00/4 + offset];
955	955	}
956	956

trunk/src/mame/drivers/chaknpop.c

r17788	r17789
130	130
131	131	WRITE8_MEMBER(chaknpop_state::coinlock_w)
132	132	{
133		logerror("%04x: coin lock %sable\n", cpu_get_pc(&space.device()), data ? "dis" : "en");
	133	logerror("%04x: coin lock %sable\n", space.device().safe_pc(), data ? "dis" : "en");
134	134	}
135	135
136	136

trunk/src/mame/drivers/calchase.c

r17788	r17789
356	356	#if 0
357	357	if ((state->m_mxtc_config_reg[0x63] & 0x50) | ( state->m_mxtc_config_reg[0x63] & 0xA0)) // Only DO if comes a change to disable ROM.
358	358	{
359		if ( cpu_get_pc(busdevice->machine().device("maincpu"))==0xff74e) cpu_set_reg(busdevice->machine().device("maincpu"), STATE_GENPC, 0xff74d);
	359	if ( busdevice->machine(->safe_pc().device("maincpu"))==0xff74e) cpu_set_reg(busdevice->machine().device("maincpu"), STATE_GENPC, 0xff74d);
360	360	}
361	361	#endif
362	362
r17788	r17789
961	961	READ32_MEMBER(calchase_state::calchase_idle_skip_r)
962	962	{
963	963
964		if(cpu_get_pc(&space.device())==0x1406f48)
	964	if(space.device().safe_pc()==0x1406f48)
965	965	device_spin_until_interrupt(m_maincpu);
966	966
967	967	return m_idle_skip_ram;

trunk/src/mame/drivers/undrfire.c

r17788	r17789
393	393	}
394	394	}
395	395
396		logerror("CPU #0 PC %06x: warning - read unmapped lightgun offset %06x\n",cpu_get_pc(&space.device()),offset);
	396	logerror("CPU #0 PC %06x: warning - read unmapped lightgun offset %06x\n",space.device().safe_pc(),offset);
397	397
398	398	return 0x0;
399	399	}

trunk/src/mame/drivers/mpu3.c

r17788	r17789
811	811	int x;
812	812	int call=data;
813	813	if (!m_current_chr_table)
814		fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space.device()));
	814	fatalerror("No Characteriser Table @ %04x\n", space.device().safe_pcbase());
815	815
816	816	if (offset == 0)
817	817	{
r17788	r17789
839	839	READ8_MEMBER(mpu3_state::characteriser_r)
840	840	{
841	841	if (!m_current_chr_table)
842		fatalerror("No Characteriser Table @ %04x\n", cpu_get_previouspc(&space.device()));
	842	fatalerror("No Characteriser Table @ %04x\n", space.device().safe_pcbase());
843	843
844	844	if (offset == 0)
845	845	{

trunk/src/mame/drivers/gaiden.c

r17788	r17789
176	176
177	177	data >>= 8;
178	178
179		//      logerror("PC %06x: prot = %02x\n",cpu_get_pc(&space.device()),data);
	179	//      logerror("PC %06x: prot = %02x\n",space.device().safe_pc(),data);
180	180
181	181	switch (data & 0xf0)
182	182	{
r17788	r17789
214	214
215	215	READ16_MEMBER(gaiden_state::wildfang_protection_r)
216	216	{
217		//  logerror("PC %06x: read prot %02x\n", cpu_get_pc(&space.device()), m_prot);
	217	//  logerror("PC %06x: read prot %02x\n", space.device().safe_pc(), m_prot);
218	218	return m_prot;
219	219	}
220	220
r17788	r17789
337	337	{
338	338	data >>= 8;
339	339
340		//      logerror("PC %06x: prot = %02x\n", cpu_get_pc(&space.device()), data);
	340	//      logerror("PC %06x: prot = %02x\n", space.device().safe_pc(), data);
341	341
342	342	switch (data & 0xf0)
343	343	{
r17788	r17789
383	383
384	384	READ16_MEMBER(gaiden_state::raiga_protection_r)
385	385	{
386		//  logerror("PC %06x: read prot %02x\n", cpu_get_pc(&space.device()), m_prot);
	386	//  logerror("PC %06x: read prot %02x\n", space.device().safe_pc(), m_prot);
387	387	return m_prot;
388	388	}
389	389

trunk/src/mame/drivers/aleck64.c

r17788	r17789
188	188	break;
189	189
190	190	default:
191		logerror("Unknown aleck_dips_w(0x%08x, 0x%08x, %08x) @ 0x%08x PC=%08x\n", offset, data, mem_mask, 0xc0800000 + offset*4, cpu_get_pc(&space->device()));
	191	logerror("Unknown aleck_dips_w(0x%08x, 0x%08x, %08x) @ 0x%08x PC=%08x\n", offset, data, mem_mask, 0xc0800000 + offset*4, space->device().safe_pc());
192	192	}
193	193	}
194	194
r17788	r17789
227	227	}
228	228	default:
229	229	{
230		logerror("Unknown aleck_dips_r(0x%08x, 0x%08x) @ 0x%08x PC=%08x\n", offset, 0xc0800000 + offset*4, mem_mask, cpu_get_pc(&space->device()));
	230	logerror("Unknown aleck_dips_r(0x%08x, 0x%08x) @ 0x%08x PC=%08x\n", offset, 0xc0800000 + offset*4, mem_mask, space->device().safe_pc());
231	231	return 0;
232	232	}
233	233	}

trunk/src/mame/drivers/vegas.c

r17788	r17789
631	631	state->m_cmos_unlocked = 0;
632	632	}
633	633	else
634		logerror("%08X:timekeeper_w(%04X,%08X & %08X) without CMOS unlocked\n", cpu_get_pc(&space->device()), offset, data, mem_mask);
	634	logerror("%08X:timekeeper_w(%04X,%08X & %08X) without CMOS unlocked\n", space->device().safe_pc(), offset, data, mem_mask);
635	635	}
636	636
637	637
r17788	r17789
677	677	}
678	678
679	679	if (LOG_PCI)
680		logerror("%06X:PCI bridge read: reg %d = %08X\n", cpu_get_pc(&space->device()), offset, result);
	680	logerror("%06X:PCI bridge read: reg %d = %08X\n", space->device().safe_pc(), offset, result);
681	681	return result;
682	682	}
683	683
r17788	r17789
687	687	vegas_state *state = space->machine().driver_data<vegas_state>();
688	688	state->m_pci_bridge_regs[offset] = data;
689	689	if (LOG_PCI)
690		logerror("%06X:PCI bridge write: reg %d = %08X\n", cpu_get_pc(&space->device()), offset, data);
	690	logerror("%06X:PCI bridge write: reg %d = %08X\n", space->device().safe_pc(), offset, data);
691	691	}
692	692
693	693
r17788	r17789
717	717	}
718	718
719	719	if (LOG_PCI)
720		logerror("%06X:PCI IDE read: reg %d = %08X\n", cpu_get_pc(&space->device()), offset, result);
	720	logerror("%06X:PCI IDE read: reg %d = %08X\n", space->device().safe_pc(), offset, result);
721	721	return result;
722	722	}
723	723
r17788	r17789
750	750	break;
751	751	}
752	752	if (LOG_PCI)
753		logerror("%06X:PCI IDE write: reg %d = %08X\n", cpu_get_pc(&space->device()), offset, data);
	753	logerror("%06X:PCI IDE write: reg %d = %08X\n", space->device().safe_pc(), offset, data);
754	754	}
755	755
756	756
r17788	r17789
790	790	}
791	791
792	792	if (LOG_PCI)
793		logerror("%06X:PCI 3dfx read: reg %d = %08X\n", cpu_get_pc(&space->device()), offset, result);
	793	logerror("%06X:PCI 3dfx read: reg %d = %08X\n", space->device().safe_pc(), offset, result);
794	794	return result;
795	795	}
796	796
r17788	r17789
842	842
843	843	}
844	844	if (LOG_PCI)
845		logerror("%06X:PCI 3dfx write: reg %d = %08X\n", cpu_get_pc(&space->device()), offset, data);
	845	logerror("%06X:PCI 3dfx write: reg %d = %08X\n", space->device().safe_pc(), offset, data);
846	846	}
847	847
848	848
r17788	r17789
961	961	{
962	962	case NREG_CPUSTAT+0:   /* CPU status */
963	963	case NREG_CPUSTAT+1:   /* CPU status */
964		if (LOG_NILE) logerror("%08X:NILE READ: CPU status(%03X) = %08X\n", cpu_get_pc(&space->device()), offset*4, result);
	964	if (LOG_NILE) logerror("%08X:NILE READ: CPU status(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
965	965	logit = 0;
966	966	break;
967	967
968	968	case NREG_INTCTRL+0:   /* Interrupt control */
969	969	case NREG_INTCTRL+1:   /* Interrupt control */
970		if (LOG_NILE) logerror("%08X:NILE READ: interrupt control(%03X) = %08X\n", cpu_get_pc(&space->device()), offset*4, result);
	970	if (LOG_NILE) logerror("%08X:NILE READ: interrupt control(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
971	971	logit = 0;
972	972	break;
973	973
974	974	case NREG_INTSTAT0+0:   /* Interrupt status 0 */
975	975	case NREG_INTSTAT0+1:   /* Interrupt status 0 */
976		if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 0(%03X) = %08X\n", cpu_get_pc(&space->device()), offset*4, result);
	976	if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 0(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
977	977	logit = 0;
978	978	break;
979	979
980	980	case NREG_INTSTAT1+0:   /* Interrupt status 1 */
981	981	case NREG_INTSTAT1+1:   /* Interrupt status 1 */
982		if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 1/enable(%03X) = %08X\n", cpu_get_pc(&space->device()), offset*4, result);
	982	if (LOG_NILE) logerror("%08X:NILE READ: interrupt status 1/enable(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
983	983	logit = 0;
984	984	break;
985	985
986	986	case NREG_INTCLR+0:      /* Interrupt clear */
987	987	case NREG_INTCLR+1:      /* Interrupt clear */
988		if (LOG_NILE) logerror("%08X:NILE READ: interrupt clear(%03X) = %08X\n", cpu_get_pc(&space->device()), offset*4, result);
	988	if (LOG_NILE) logerror("%08X:NILE READ: interrupt clear(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
989	989	logit = 0;
990	990	break;
991	991
992	992	case NREG_INTPPES+0:   /* PCI Interrupt control */
993	993	case NREG_INTPPES+1:   /* PCI Interrupt control */
994		if (LOG_NILE) logerror("%08X:NILE READ: PCI interrupt control(%03X) = %08X\n", cpu_get_pc(&space->device()), offset*4, result);
	994	if (LOG_NILE) logerror("%08X:NILE READ: PCI interrupt control(%03X) = %08X\n", space->device().safe_pc(), offset*4, result);
995	995	logit = 0;
996	996	break;
997	997
r17788	r17789
1018	1018	result = state->m_nile_regs[offset + 1] = state->m_timer[which]->remaining().as_double() * (double)SYSTEM_CLOCK;
1019	1019	}
1020	1020
1021		if (LOG_TIMERS) logerror("%08X:NILE READ: timer %d counter(%03X) = %08X\n", cpu_get_pc(&space->device()), which, offset*4, result);
	1021	if (LOG_TIMERS) logerror("%08X:NILE READ: timer %d counter(%03X) = %08X\n", space->device().safe_pc(), which, offset*4, result);
1022	1022	logit = 0;
1023	1023	break;
1024	1024
r17788	r17789
1059	1059	}
1060	1060
1061	1061	if (LOG_NILE && logit)
1062		logerror("%06X:nile read from offset %03X = %08X\n", cpu_get_pc(&space->device()), offset*4, result);
	1062	logerror("%06X:nile read from offset %03X = %08X\n", space->device().safe_pc(), offset*4, result);
1063	1063	return result;
1064	1064	}
1065	1065
r17788	r17789
1076	1076	{
1077	1077	case NREG_CPUSTAT+0:   /* CPU status */
1078	1078	case NREG_CPUSTAT+1:   /* CPU status */
1079		if (LOG_NILE) logerror("%08X:NILE WRITE: CPU status(%03X) = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask);
	1079	if (LOG_NILE) logerror("%08X:NILE WRITE: CPU status(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1080	1080	logit = 0;
1081	1081	break;
1082	1082
1083	1083	case NREG_INTCTRL+0:   /* Interrupt control */
1084	1084	case NREG_INTCTRL+1:   /* Interrupt control */
1085		if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt control(%03X) = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask);
	1085	if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt control(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1086	1086	logit = 0;
1087	1087	update_nile_irqs(space->machine());
1088	1088	break;
1089	1089
1090	1090	case NREG_INTSTAT0+0:   /* Interrupt status 0 */
1091	1091	case NREG_INTSTAT0+1:   /* Interrupt status 0 */
1092		if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 0(%03X) = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask);
	1092	if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 0(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1093	1093	logit = 0;
1094	1094	update_nile_irqs(space->machine());
1095	1095	break;
1096	1096
1097	1097	case NREG_INTSTAT1+0:   /* Interrupt status 1 */
1098	1098	case NREG_INTSTAT1+1:   /* Interrupt status 1 */
1099		if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 1/enable(%03X) = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask);
	1099	if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt status 1/enable(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1100	1100	logit = 0;
1101	1101	update_nile_irqs(space->machine());
1102	1102	break;
1103	1103
1104	1104	case NREG_INTCLR+0:      /* Interrupt clear */
1105	1105	case NREG_INTCLR+1:      /* Interrupt clear */
1106		if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt clear(%03X) = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask);
	1106	if (LOG_NILE) logerror("%08X:NILE WRITE: interrupt clear(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1107	1107	logit = 0;
1108	1108	state->m_nile_irq_state &= ~(state->m_nile_regs[offset] & ~0xf00);
1109	1109	update_nile_irqs(space->machine());
r17788	r17789
1111	1111
1112	1112	case NREG_INTPPES+0:   /* PCI Interrupt control */
1113	1113	case NREG_INTPPES+1:   /* PCI Interrupt control */
1114		if (LOG_NILE) logerror("%08X:NILE WRITE: PCI interrupt control(%03X) = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask);
	1114	if (LOG_NILE) logerror("%08X:NILE WRITE: PCI interrupt control(%03X) = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1115	1115	logit = 0;
1116	1116	break;
1117	1117
r17788	r17789
1136	1136	case NREG_T2CTRL+1:      /* general purpose timer control (control bits) */
1137	1137	case NREG_T3CTRL+1:      /* watchdog timer control (control bits) */
1138	1138	which = (offset - NREG_T0CTRL) / 4;
1139		if (LOG_NILE) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", cpu_get_pc(&space->device()), which, offset*4, data, mem_mask);
	1139	if (LOG_NILE) logerror("%08X:NILE WRITE: timer %d control(%03X) = %08X & %08X\n", space->device().safe_pc(), which, offset*4, data, mem_mask);
1140	1140	logit = 0;
1141	1141
1142	1142	/* timer just enabled? */
r17788	r17789
1165	1165	case NREG_T2CNTR:      /* general purpose timer control (counter) */
1166	1166	case NREG_T3CNTR:      /* watchdog timer control (counter) */
1167	1167	which = (offset - NREG_T0CTRL) / 4;
1168		if (LOG_TIMERS) logerror("%08X:NILE WRITE: timer %d counter(%03X) = %08X & %08X\n", cpu_get_pc(&space->device()), which, offset*4, data, mem_mask);
	1168	if (LOG_TIMERS) logerror("%08X:NILE WRITE: timer %d counter(%03X) = %08X & %08X\n", space->device().safe_pc(), which, offset*4, data, mem_mask);
1169	1169	logit = 0;
1170	1170
1171	1171	if (state->m_nile_regs[offset - 1] & 1)
r17788	r17789
1220	1220	}
1221	1221
1222	1222	if (LOG_NILE && logit)
1223		logerror("%06X:nile write to offset %03X = %08X & %08X\n", cpu_get_pc(&space->device()), offset*4, data, mem_mask);
	1223	logerror("%06X:nile write to offset %03X = %08X & %08X\n", space->device().safe_pc(), offset*4, data, mem_mask);
1224	1224	}
1225	1225
1226	1226
r17788	r17789
1394	1394	if (ACCESSING_BITS_16_23) offset += 2;
1395	1395	if (ACCESSING_BITS_24_31) offset += 3;
1396	1396	if (LOG_SIO && offset != 0)
1397		logerror("%08X:sio write to offset %X = %02X\n", cpu_get_pc(&space->device()), offset, data >> (offset*8));
	1397	logerror("%08X:sio write to offset %X = %02X\n", space->device().safe_pc(), offset, data >> (offset*8));
1398	1398	if (offset < 4)
1399	1399	state->m_sio_data[offset] = data >> (offset*8);
1400	1400	if (offset == 1)
r17788	r17789
1413	1413	if (offset < 4)
1414	1414	result = state->m_sio_data[0] | (state->m_sio_data[1] << 8) | (state->m_sio_data[2] << 16) | (state->m_sio_data[3] << 24);
1415	1415	if (LOG_SIO && offset != 2)
1416		logerror("%08X:sio read from offset %X = %02X\n", cpu_get_pc(&space->device()), offset, result >> (offset*8));
	1416	logerror("%08X:sio read from offset %X = %02X\n", space->device().safe_pc(), offset, result >> (offset*8));
1417	1417	return result;
1418	1418	}
1419	1419
r17788	r17789
1438	1438	static const char *const portnames[] = { "AN0", "AN1", "AN2", "AN3", "AN4", "AN5", "AN6", "AN7" };
1439	1439
1440	1440	if (data < 8 || data > 15)
1441		logerror("%08X:Unexpected analog port select = %08X\n", cpu_get_pc(&space->device()), data);
	1441	logerror("%08X:Unexpected analog port select = %08X\n", space->device().safe_pc(), data);
1442	1442	state->m_pending_analog_read = state->ioport(portnames[data & 7])->read_safe(0);
1443	1443	}
1444	1444

trunk/src/mame/drivers/enigma2.c

r17788	r17789
359	359	{
360	360	UINT8 ret = 0x00;
361	361
362		if (LOG_PROT) logerror("DIP SW Read: %x at %x (prot data %x)\n", offset, cpu_get_pc(&space.device()), m_protection_data);
	362	if (LOG_PROT) logerror("DIP SW Read: %x at %x (prot data %x)\n", offset, space.device().safe_pc(), m_protection_data);
363	363	switch (offset)
364	364	{
365	365	case 0x01:
r17788	r17789
372	372	break;
373	373
374	374	case 0x02:
375		if (cpu_get_pc(&space.device()) == 0x07e5)
	375	if (space.device().safe_pc() == 0x07e5)
376	376	ret = 0xaa;
377	377	else
378	378	ret = 0xf4;

trunk/src/mame/drivers/igspoker.c

r17788	r17789
242	242
243	243	m_nmi_enable = data & 0x80;     // nmi enable?
244	244	#ifdef VERBOSE
245		logerror("PC %06X: NMI change %02x\n",cpu_get_pc(&space.device()),m_nmi_enable);
	245	logerror("PC %06X: NMI change %02x\n",space.device().safe_pc(),m_nmi_enable);
246	246	#endif
247	247
248	248	m_out[0] = data;
r17788	r17789
294	294	READ8_MEMBER(igspoker_state::custom_io_r)
295	295	{
296	296	#ifdef VERBOSE
297		logerror("PC %06X: Protection read %02x\n",cpu_get_pc(&space.device()), (int) m_protection_res);
	297	logerror("PC %06X: Protection read %02x\n",space.device().safe_pc(), (int) m_protection_res);
298	298	#endif
299	299	return m_protection_res;
300	300	}
r17788	r17789
302	302	WRITE8_MEMBER(igspoker_state::custom_io_w)
303	303	{
304	304	#ifdef VERBOSE
305		logerror("PC %06X: Protection write %02x\n",cpu_get_pc(&space.device()),data);
	305	logerror("PC %06X: Protection write %02x\n",space.device().safe_pc(),data);
306	306	#endif
307	307
308	308	switch (data)

trunk/src/mame/drivers/segaorun.c

r17788	r17789
483	483	{
484	484	if (!m_custom_io_r.isnull())
485	485	return m_custom_io_r(space, offset, mem_mask);
486		logerror("%06X:misc_io_r - unknown read access to address %04X\n", cpu_get_pc(&space.device()), offset * 2);
	486	logerror("%06X:misc_io_r - unknown read access to address %04X\n", space.device().safe_pc(), offset * 2);
487	487	return open_bus_r(space, 0, mem_mask);
488	488	}
489	489
r17788	r17789
499	499	m_custom_io_w(space, offset, data, mem_mask);
500	500	return;
501	501	}
502		logerror("%06X:misc_io_w - unknown write access to address %04X = %04X & %04X\n", cpu_get_pc(&space.device()), offset * 2, data, mem_mask);
	502	logerror("%06X:misc_io_w - unknown write access to address %04X = %04X & %04X\n", space.device().safe_pc(), offset * 2, data, mem_mask);
503	503	}
504	504
505	505
r17788	r17789
656	656	return watchdog_reset_r(space, 0);
657	657	}
658	658
659		logerror("%06X:outrun_custom_io_r - unknown read access to address %04X\n", cpu_get_pc(&space.device()), offset * 2);
	659	logerror("%06X:outrun_custom_io_r - unknown read access to address %04X\n", space.device().safe_pc(), offset * 2);
660	660	return open_bus_r(space, 0, mem_mask);
661	661	}
662	662
r17788	r17789
698	698	m_sprites->draw_write(space, offset, data, mem_mask);
699	699	return;
700	700	}
701		logerror("%06X:misc_io_w - unknown write access to address %04X = %04X & %04X\n", cpu_get_pc(&space.device()), offset * 2, data, mem_mask);
	701	logerror("%06X:misc_io_w - unknown write access to address %04X = %04X & %04X\n", space.device().safe_pc(), offset * 2, data, mem_mask);
702	702	}
703	703
704	704
r17788	r17789
727	727	return ioport(ports[m_adc_select])->read_safe(0x0010);
728	728	}
729	729	}
730		logerror("%06X:misc_io_r - unknown read access to address %04X\n", cpu_get_pc(&space.device()), offset * 2);
	730	logerror("%06X:misc_io_r - unknown read access to address %04X\n", space.device().safe_pc(), offset * 2);
731	731	return open_bus_r(space,0,mem_mask);
732	732	}
733	733
r17788	r17789
764	764	// ADC trigger
765	765	return;
766	766	}
767		logerror("%06X:misc_io_w - unknown write access to address %04X = %04X & %04X\n", cpu_get_pc(&space.device()), offset * 2, data, mem_mask);
	767	logerror("%06X:misc_io_w - unknown write access to address %04X = %04X & %04X\n", space.device().safe_pc(), offset * 2, data, mem_mask);
768	768	}
769	769
770	770

trunk/src/mame/drivers/namcona1.c

r17788	r17789
787	787	#if 0
788	788	if (offset >= 0x70000/2)
789	789	{
790		logerror("MD: %04x @ %x PC %x\n", ((data>>8)&0xff) | ((data<<8)&0xff00), offset*2, cpu_get_pc(&space.device()));
	790	logerror("MD: %04x @ %x PC %x\n", ((data>>8)&0xff) | ((data<<8)&0xff00), offset*2, space.device().safe_pc());
791	791	}
792	792	#endif
793	793
r17788	r17789
844	844	{
845	845	if ((data & 0x08) && !(m_mcu_port4 & 0x08))
846	846	{
847		logerror("launching 68k, PC=%x\n", cpu_get_pc(&space.device()));
	847	logerror("launching 68k, PC=%x\n", space.device().safe_pc());
848	848
849	849	// reset and launch the 68k
850	850	cputag_set_input_line(machine(), "maincpu", INPUT_LINE_RESET, CLEAR_LINE);

trunk/src/mame/drivers/cdi.c

r17788	r17789
44	44	va_start( v, s_fmt );
45	45	vsprintf( buf, s_fmt, v );
46	46	va_end( v );
47		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	47	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
48	48	}
49	49	}
50	50	#else

trunk/src/mame/drivers/dkong.c

r17788	r17789
642	642	WRITE8_MEMBER(dkong_state::s2650_data_w)
643	643	{
644	644	#if DEBUG_PROTECTION
645		logerror("write : pc = %04x, loopback = %02x\n",cpu_get_pc(&space.device()), data);
	645	logerror("write : pc = %04x, loopback = %02x\n",space.device().safe_pc(), data);
646	646	#endif
647	647
648	648	m_hunchloopback = data;
r17788	r17789
651	651	WRITE8_MEMBER(dkong_state::s2650_fo_w)
652	652	{
653	653	#if DEBUG_PROTECTION
654		logerror("write : pc = %04x, FO = %02x\n",cpu_get_pc(&space.device()), data);
	654	logerror("write : pc = %04x, FO = %02x\n",space.device().safe_pc(), data);
655	655	#endif
656	656
657	657	m_main_fo = data;
r17788	r17789
663	663	READ8_MEMBER(dkong_state::s2650_port0_r)
664	664	{
665	665	#if DEBUG_PROTECTION
666		logerror("port 0 : pc = %04x, loopback = %02x fo=%d\n",cpu_get_pc(&space.device()), m_hunchloopback, m_main_fo);
	666	logerror("port 0 : pc = %04x, loopback = %02x fo=%d\n",space.device().safe_pc(), m_hunchloopback, m_main_fo);
667	667	#endif
668	668
669	669	switch (m_protect_type)
r17788	r17789
680	680	else
681	681	return m_hunchloopback--;
682	682	}
683		fatalerror("Unhandled read from port 0 : pc = %4x\n",cpu_get_pc(&space.device()));
	683	fatalerror("Unhandled read from port 0 : pc = %4x\n",space.device().safe_pc());
684	684	}
685	685
686	686
r17788	r17789
688	688	{
689	689
690	690	#if DEBUG_PROTECTION
691		logerror("port 1 : pc = %04x, loopback = %02x fo=%d\n",cpu_get_pc(&space.device()), m_hunchloopback, m_main_fo);
	691	logerror("port 1 : pc = %04x, loopback = %02x fo=%d\n",space.device().safe_pc(), m_hunchloopback, m_main_fo);
692	692	#endif
693	693
694	694	switch (m_protect_type)
r17788	r17789
702	702	else
703	703	return ++m_prot_cnt;
704	704	}
705		fatalerror("Unhandled read from port 1 : pc = %4x\n",cpu_get_pc(&space.device()));
	705	fatalerror("Unhandled read from port 1 : pc = %4x\n",space.device().safe_pc());
706	706	}
707	707
708	708

trunk/src/mame/drivers/seicross.c

r17788	r17789
90	90	WRITE8_MEMBER(seicross_state::friskyt_portB_w)
91	91	{
92	92
93		//logerror("PC %04x: 8910 port B = %02x\n", cpu_get_pc(&space->device()), data);
	93	//logerror("PC %04x: 8910 port B = %02x\n", space->device().safe_pc(), data);
94	94	/* bit 0 is IRQ enable */
95	95	m_irq_mask = data & 1;
96	96

trunk/src/mame/drivers/system16.c

r17788	r17789
413	413	break;
414	414	default:
415	415	m_soundbank_ptr = NULL;
416		logerror("Invalid bank setting %02X (%04X)\n", data, cpu_get_pc(&space.device()));
	416	logerror("Invalid bank setting %02X (%04X)\n", data, space.device().safe_pc());
417	417	break;
418	418	}
419	419	}
r17788	r17789
1222	1222	break;
1223	1223	default:
1224	1224	m_soundbank_ptr = NULL;
1225		logerror("Invalid bank setting %02X (%04X)\n", data, cpu_get_pc(&space.device()));
	1225	logerror("Invalid bank setting %02X (%04X)\n", data, space.device().safe_pc());
1226	1226	break;
1227	1227	}
1228	1228	}

trunk/src/mame/drivers/nyny.c

r17788	r17789
464	464	{
465	465	/* not sure what this does */
466	466
467		/*logerror("%x PORT A write %x at  Y=%x X=%x\n", cpu_get_pc(&space->device()), data, space->machine().primary_screen->vpos(), space->machine().primary_screen->hpos());*/
	467	/*logerror("%x PORT A write %x at  Y=%x X=%x\n", space->device().safe_pc(), data, space->machine().primary_screen->vpos(), space->machine().primary_screen->hpos());*/
468	468	}
469	469
470	470

trunk/src/mame/drivers/model1.c

r17788	r17789
797	797	if(0 && offset)
798	798	return;
799	799	if(1 && m_dump)
800		logerror("TGP: md1_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()));
	800	logerror("TGP: md1_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, space.device().safe_pc());
801	801	}
802	802
803	803	WRITE16_MEMBER(model1_state::md0_w)
r17788	r17789
806	806	if(0 && offset)
807	807	return;
808	808	if(1 && m_dump)
809		logerror("TGP: md0_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()));
	809	logerror("TGP: md0_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, space.device().safe_pc());
810	810	}
811	811
812	812	WRITE16_MEMBER(model1_state::p_w)
r17788	r17789
814	814	UINT16 old = m_generic_paletteram_16[offset];
815	815	paletteram_xBBBBBGGGGGRRRRR_word_w(space, offset, data, mem_mask);
816	816	if(0 && m_generic_paletteram_16[offset] != old)
817		logerror("XVIDEO: p_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()));
	817	logerror("XVIDEO: p_w %x, %04x @ %04x (%x)\n", offset, data, mem_mask, space.device().safe_pc());
818	818	}
819	819
820	820	WRITE16_MEMBER(model1_state::mr_w)
821	821	{
822	822	COMBINE_DATA(m_mr+offset);
823	823	if(0 && offset == 0x1138/2)
824		logerror("MR.w %x, %04x @ %04x (%x)\n", offset*2+0x500000, data, mem_mask, cpu_get_pc(&space.device()));
	824	logerror("MR.w %x, %04x @ %04x (%x)\n", offset*2+0x500000, data, mem_mask, space.device().safe_pc());
825	825	}
826	826
827	827	WRITE16_MEMBER(model1_state::mr2_w)
r17788	r17789
829	829	COMBINE_DATA(m_mr2+offset);
830	830	#if 0
831	831	if(0 && offset == 0x6e8/2) {
832		logerror("MR.w %x, %04x @ %04x (%x)\n", offset*2+0x400000, data, mem_mask, cpu_get_pc(&space.device()));
	832	logerror("MR.w %x, %04x @ %04x (%x)\n", offset*2+0x400000, data, mem_mask, space.device().safe_pc());
833	833	}
834	834	if(offset/2 == 0x3680/4)
835		logerror("MW f80[r25], %04x%04x (%x)\n", m_mr2[0x3680/2+1], m_mr2[0x3680/2], cpu_get_pc(&space.device()));
	835	logerror("MW f80[r25], %04x%04x (%x)\n", m_mr2[0x3680/2+1], m_mr2[0x3680/2], space.device().safe_pc());
836	836	if(offset/2 == 0x06ca/4)
837		logerror("MW fca[r19], %04x%04x (%x)\n", m_mr2[0x06ca/2+1], m_mr2[0x06ca/2], cpu_get_pc(&space.device()));
	837	logerror("MW fca[r19], %04x%04x (%x)\n", m_mr2[0x06ca/2+1], m_mr2[0x06ca/2], space.device().safe_pc());
838	838	if(offset/2 == 0x1eca/4)
839		logerror("MW fca[r22], %04x%04x (%x)\n", m_mr2[0x1eca/2+1], m_mr2[0x1eca/2], cpu_get_pc(&space.device()));
	839	logerror("MW fca[r22], %04x%04x (%x)\n", m_mr2[0x1eca/2+1], m_mr2[0x1eca/2], space.device().safe_pc());
840	840	#endif
841	841
842	842	// wingwar scene position, pc=e1ce -> d735
843	843	if(offset/2 == 0x1f08/4)
844		logerror("MW  8[r10], %f (%x)\n", *(float *)(m_mr2+0x1f08/2), cpu_get_pc(&space.device()));
	844	logerror("MW  8[r10], %f (%x)\n", *(float *)(m_mr2+0x1f08/2), space.device().safe_pc());
845	845	if(offset/2 == 0x1f0c/4)
846		logerror("MW  c[r10], %f (%x)\n", *(float *)(m_mr2+0x1f0c/2), cpu_get_pc(&space.device()));
	846	logerror("MW  c[r10], %f (%x)\n", *(float *)(m_mr2+0x1f0c/2), space.device().safe_pc());
847	847	if(offset/2 == 0x1f10/4)
848		logerror("MW 10[r10], %f (%x)\n", *(float *)(m_mr2+0x1f10/2), cpu_get_pc(&space.device()));
	848	logerror("MW 10[r10], %f (%x)\n", *(float *)(m_mr2+0x1f10/2), space.device().safe_pc());
849	849	}
850	850
851	851	READ16_MEMBER(model1_state::snd_68k_ready_r)

trunk/src/mame/drivers/polepos.c

r17788	r17789
259	259	m_last_result = (INT8)m_last_signed * (UINT8)m_last_unsigned;
260	260	}
261	261
262		//  logerror("%04X: read IC25 @ %04X = %02X\n", cpu_get_pc(&space.device()), offset, result);
	262	//  logerror("%04X: read IC25 @ %04X = %02X\n", space.device().safe_pc(), offset, result);
263	263
264	264	return result | (result << 8);
265	265	}

trunk/src/mame/drivers/qdrmfgp.c

r17788	r17789
239	239	{
240	240	if (offset == 0x07)
241	241	{
242		switch (cpu_get_previouspc(&space.device()))
	242	switch (space.device().safe_pcbase())
243	243	{
244	244	case 0xdb4c:
245	245	if ((m_workram[0x5fa4/2] - cpu_get_reg(&space.device(), M68K_D0)) <= 0x10)

trunk/src/mame/drivers/cps1.c

r17788	r17789
355	355	return rom[offset] | 0xff00;
356	356	else
357	357	{
358		popmessage("%06x: read sound ROM byte %04x", cpu_get_pc(&space.device()), offset);
	358	popmessage("%06x: read sound ROM byte %04x", space.device().safe_pc(), offset);
359	359	return 0;
360	360	}
361	361	}

trunk/src/mame/drivers/namcos11.c

r17788	r17789
757	757
758	758	READ16_MEMBER(namcos11_state::c76_inputs_r)
759	759	{
760		//  logerror("'c76' Read port %d @ %06X\n", offset, cpu_get_pc(&space.device()));
	760	//  logerror("'c76' Read port %d @ %06X\n", offset, space.device().safe_pc());
761	761
762	762	switch (offset)
763	763	{
r17788	r17789
855	855	READ16_MEMBER(namcos11_state::c76_speedup_r)
856	856	{
857	857
858		if ((cpu_get_pc(&space.device()) == 0xc153) && (!(m_su_83 & 0xff00)))
	858	if ((space.device().safe_pc() == 0xc153) && (!(m_su_83 & 0xff00)))
859	859	{
860	860	device_spin_until_interrupt(&space.device());
861	861	}

trunk/src/mame/drivers/kickgoal.c

r17788	r17789
155	155	okim6295_device *oki = downcast<okim6295_device *>(device);
156	156	if (ACCESSING_BITS_0_7)
157	157	{
158		logerror("PC:%06x Writing %04x to Sound CPU\n",cpu_get_previouspc(&space->device()),data);
	158	logerror("PC:%06x Writing %04x to Sound CPU\n",space->device().safe_pcbase(),data);
159	159	if (data >= 0x40) {
160	160	if (data == 0xfe) {
161	161	oki->write(0,0x40);   /* Stop playing the melody */

trunk/src/mame/drivers/galaxian.c

r17788	r17789
1244	1244	case 0x0235:  return 0x02;
1245	1245	case 0x0311:  return 0xff;  /* not checked */
1246	1246	}
1247		logerror("Unknown protection read. Offset: %04X  PC=%04X\n",0xb000+offset,cpu_get_pc(&space.device()));
	1247	logerror("Unknown protection read. Offset: %04X  PC=%04X\n",0xb000+offset,space.device().safe_pc());
1248	1248	return 0xff;
1249	1249	}
1250	1250
r17788	r17789
1271	1271
1272	1272	READ8_MEMBER(galaxian_state::checkmaj_protection_r)
1273	1273	{
1274		switch (cpu_get_pc(&space.device()))
	1274	switch (space.device().safe_pc())
1275	1275	{
1276	1276	case 0x0f15:  return 0xf5;
1277	1277	case 0x0f8f:  return 0x7c;
r17788	r17789
1280	1280	case 0x10f1:  return 0xaa;
1281	1281	case 0x1402:  return 0xaa;
1282	1282	default:
1283		logerror("Unknown protection read. PC=%04X\n",cpu_get_pc(&space.device()));
	1283	logerror("Unknown protection read. PC=%04X\n",space.device().safe_pc());
1284	1284	}
1285	1285
1286	1286	return 0;

trunk/src/mame/drivers/bbusters.c

r17788	r17789
279	279	WRITE16_MEMBER(bbusters_state::gun_select_w)
280	280	{
281	281
282		logerror("%08x: gun r\n",cpu_get_pc(&space.device()));
	282	logerror("%08x: gun r\n",space.device().safe_pc());
283	283
284	284	device_set_input_line(&space.device(), 2, HOLD_LINE);
285	285

trunk/src/mame/drivers/hyprduel.c

r17788	r17789
296	296	int shift = (dst_offs & 0x80) ? 0 : 8;
297	297	UINT16 mask = (dst_offs & 0x80) ? 0x00ff : 0xff00;
298	298
299		//      logerror("CPU #0 PC %06X : Blitter regs %08X, %08X, %08X\n", cpu_get_pc(&space.device()), tmap, src_offs, dst_offs);
	299	//      logerror("CPU #0 PC %06X : Blitter regs %08X, %08X, %08X\n", space.device().safe_pc(), tmap, src_offs, dst_offs);
300	300
301	301	dst_offs >>= 7 + 1;
302	302	switch (tmap)
r17788	r17789
306	306	case 3:
307	307	break;
308	308	default:
309		logerror("CPU #0 PC %06X : Blitter unknown destination: %08X\n", cpu_get_pc(&space.device()), tmap);
	309	logerror("CPU #0 PC %06X : Blitter unknown destination: %08X\n", space.device().safe_pc(), tmap);
310	310	return;
311	311	}
312	312
r17788	r17789
316	316
317	317	src_offs %= src_len;
318	318	b1 = blt_read(src, src_offs);
319		//          logerror("CPU #0 PC %06X : Blitter opcode %02X at %06X\n", cpu_get_pc(&space.device()), b1, src_offs);
	319	//          logerror("CPU #0 PC %06X : Blitter opcode %02X at %06X\n", space.device().safe_pc(), b1, src_offs);
320	320	src_offs++;
321	321
322	322	count = ((~b1) & 0x3f) + 1;
r17788	r17789
400	400
401	401
402	402	default:
403		logerror("CPU #0 PC %06X : Blitter unknown opcode %02X at %06X\n", cpu_get_pc(&space.device()), b1, src_offs - 1);
	403	logerror("CPU #0 PC %06X : Blitter unknown opcode %02X at %06X\n", space.device().safe_pc(), b1, src_offs - 1);
404	404	return;
405	405	}
406	406

trunk/src/mame/drivers/flstory.c

r17788	r17789
154	154
155	155	READ8_MEMBER(flstory_state::rumba_mcu_r)
156	156	{
157		//printf("PC=%04x R %02x\n",cpu_get_pc(&space.device()),m_mcu_cmd);
	157	//printf("PC=%04x R %02x\n",space.device().safe_pc(),m_mcu_cmd);
158	158
159	159	if((m_mcu_cmd & 0xf0) == 0x00) // end packet cmd, value returned is meaningless (probably used for main <-> mcu comms syncronization)
160	160	return 0;
r17788	r17789
197	197	return 0;
198	198	}
199	199	//case 0x42: return 0x06;
200		//default:  printf("PC=%04x R %02x\n",cpu_get_pc(&space.device()),m_mcu_cmd); break;
	200	//default:  printf("PC=%04x R %02x\n",space.device().safe_pc(),m_mcu_cmd); break;
201	201	}
202	202
203	203	return 0;
r17788	r17789
265	265	*/
266	266
267	267	m_mcu_bb_res = data;
268		//printf("PC=%04x W %02x -> %02x\n",cpu_get_pc(&space.device()),m_mcu_cmd,data);
	268	//printf("PC=%04x W %02x -> %02x\n",space.device().safe_pc(),m_mcu_cmd,data);
269	269	break;
270	270	}
271	271	case 0xb4: // when the bird touches the top / bottom / left / right of the screen, for correct repositioning

trunk/src/mame/drivers/bmcbowl.c

r17788	r17789
203	203
204	204	READ16_MEMBER(bmcbowl_state::bmc_protection_r)
205	205	{
206		switch(cpu_get_previouspc(&space.device()))
	206	switch(space.device().safe_pcbase())
207	207	{
208	208	case 0xca68:
209	209	switch(cpu_get_reg(&space.device(), M68K_D2))
r17788	r17789
214	214	}
215	215	break;
216	216	}
217		logerror("Protection read @ %X\n",cpu_get_previouspc(&space.device()));
	217	logerror("Protection read @ %X\n",space.device().safe_pcbase());
218	218	return machine().rand();
219	219	}
220	220

trunk/src/mame/drivers/pcat_nit.c

r17788	r17789
151	151
152	152	WRITE8_MEMBER(pcat_nit_state::pcat_nit_rombank_w)
153	153	{
154		logerror( "rom bank #%02x at PC=%08X\n", data, cpu_get_pc(&space.device()) );
	154	logerror( "rom bank #%02x at PC=%08X\n", data, space.device().safe_pc() );
155	155	if ( data & 0x40 )
156	156	{
157	157	// rom bank

trunk/src/mame/drivers/segag80r.c

r17788	r17789
171	171	segag80r_state *state = space->machine().driver_data<segag80r_state>();
172	172
173	173	/* ignore anything but accesses via opcode $32 (LD $(XXYY),A) */
174		offs_t pc = cpu_get_previouspc(&space->device());
	174	offs_t pc = space->device().safe_pcbase();
175	175	if ((UINT16)pc == 0xffff || space->read_byte(pc) != 0x32)
176	176	return offset;
177	177

trunk/src/mame/drivers/tmnt.c

r17788	r17789
380	380	return data;
381	381
382	382	default:
383		popmessage("%06x: unknown protection read",cpu_get_pc(&space.device()));
384		logerror("%06x: read 1c0800 (D7=%02x 1058fc=%02x 105a0a=%02x)\n",cpu_get_pc(&space.device()),(UINT32)cpu_get_reg(&space.device(), M68K_D7),cmd,data);
	383	popmessage("%06x: unknown protection read",space.device().safe_pc());
	384	logerror("%06x: read 1c0800 (D7=%02x 1058fc=%02x 105a0a=%02x)\n",space.device().safe_pc(),(UINT32)cpu_get_reg(&space.device(), M68K_D7),cmd,data);
385	385	return 0xffff;
386	386	}
387	387	}

trunk/src/mame/drivers/taitojc.c

r17788	r17789
518	518
519	519	WRITE32_MEMBER(taitojc_state::dsp_shared_w)
520	520	{
521		//mame_printf_debug("dsp_shared: %08X, %04X at %08X\n", offset, data >> 16, cpu_get_pc(&space.device()));
	521	//mame_printf_debug("dsp_shared: %08X, %04X at %08X\n", offset, data >> 16, space.device().safe_pc());
522	522	if (ACCESSING_BITS_24_31)
523	523	{
524	524	m_dsp_shared_ram[offset] &= 0x00ff;
r17788	r17789
588	588	}
589	589	default:
590	590	{
591		//mame_printf_debug("hc11_reg_r: %02X at %08X\n", reg, cpu_get_pc(&space->device()));
	591	//mame_printf_debug("hc11_reg_r: %02X at %08X\n", reg, space->device().safe_pc());
592	592	break;
593	593	}
594	594	}
r17788	r17789
615	615	}
616	616	default:
617	617	{
618		//mame_printf_debug("hc11_reg_w: %02X, %02X at %08X\n", reg, data, cpu_get_pc(&space->device()));
	618	//mame_printf_debug("hc11_reg_w: %02X, %02X at %08X\n", reg, data, space->device().safe_pc());
619	619	break;
620	620	}
621	621	}
r17788	r17789
978	978	WRITE16_MEMBER(taitojc_state::dsp_texaddr_w)
979	979	{
980	980	m_dsp_tex_address = data;
981		//  mame_printf_debug("texaddr = %08X at %08X\n", data, cpu_get_pc(&space.device()));
	981	//  mame_printf_debug("texaddr = %08X at %08X\n", data, space.device().safe_pc());
982	982
983	983	m_texture_x = (((data >> 0) & 0x1f) << 1) | ((data >> 12) & 0x1);
984	984	m_texture_y = (((data >> 5) & 0x1f) << 1) | ((data >> 13) & 0x1);
r17788	r17789
1301	1301
1302	1302	READ16_MEMBER(taitojc_state::taitojc_dsp_idle_skip_r)
1303	1303	{
1304		if(cpu_get_pc(&space.device())==0x404c)
	1304	if(space.device().safe_pc()==0x404c)
1305	1305	device_spin_until_time(&space.device(), attotime::from_usec(500));
1306	1306
1307	1307	return m_dsp_shared_ram[0x7f0];
r17788	r17789
1309	1309
1310	1310	READ16_MEMBER(taitojc_state::dendego2_dsp_idle_skip_r)
1311	1311	{
1312		if(cpu_get_pc(&space.device())==0x402e)
	1312	if(space.device().safe_pc()==0x402e)
1313	1313	device_spin_until_time(&space.device(), attotime::from_usec(500));
1314	1314
1315	1315	return m_dsp_shared_ram[0x7f0];

trunk/src/mame/drivers/igs009.c

r17788	r17789
376	376	{
377	377	if ((m_nmi_enable ^ data) & (~0xdd))
378	378	{
379		logerror("PC %06X: nmi_and_coins = %02x\n",cpu_get_pc(&space.device()),data);
	379	logerror("PC %06X: nmi_and_coins = %02x\n",space.device().safe_pc(),data);
380	380	//      popmessage("%02x",data);
381	381	}
382	382
r17788	r17789
432	432
433	433	default:
434	434	//          popmessage("magic %x <- %04x",m_igs_magic[0],data);
435		logerror("%06x: warning, writing to igs_magic %02x = %02x\n", cpu_get_pc(&space.device()), m_igs_magic[0], data);
	435	logerror("%06x: warning, writing to igs_magic %02x = %02x\n", space.device().safe_pc(), m_igs_magic[0], data);
436	436	}
437	437	}
438	438
r17788	r17789
446	446	if ( !(m_igs_magic[1] & 0x04) )   return ioport("DSW3")->read();
447	447	if ( !(m_igs_magic[1] & 0x08) )   return ioport("DSW4")->read();
448	448	if ( !(m_igs_magic[1] & 0x10) )   return ioport("DSW5")->read();
449		logerror("%06x: warning, reading dsw with igs_magic[1] = %02x\n", cpu_get_pc(&space.device()), m_igs_magic[1]);
	449	logerror("%06x: warning, reading dsw with igs_magic[1] = %02x\n", space.device().safe_pc(), m_igs_magic[1]);
450	450	break;
451	451
452	452	default:
453		logerror("%06x: warning, reading with igs_magic = %02x\n", cpu_get_pc(&space.device()), m_igs_magic[0]);
	453	logerror("%06x: warning, reading with igs_magic = %02x\n", space.device().safe_pc(), m_igs_magic[0]);
454	454	}
455	455
456	456	return 0;

trunk/src/mame/drivers/spy.c

r17788	r17789
45	45	{
46	46	if (m_pmcbank)
47	47	{
48		//logerror("%04x read pmcram %04x\n", cpu_get_pc(&space.device()), offset);
	48	//logerror("%04x read pmcram %04x\n", space.device().safe_pc(), offset);
49	49	return m_pmcram[offset];
50	50	}
51	51	else
52	52	{
53		//logerror("%04x read pmc internal ram %04x\n", cpu_get_pc(&space.device()), offset);
	53	//logerror("%04x read pmc internal ram %04x\n", space.device().safe_pc(), offset);
54	54	return 0;
55	55	}
56	56	}
r17788	r17789
69	69	{
70	70	if (m_pmcbank)
71	71	{
72		//logerror("%04x pmcram %04x = %02x\n", cpu_get_pc(&space.device()), offset, data);
	72	//logerror("%04x pmcram %04x = %02x\n", space.device().safe_pc(), offset, data);
73	73	m_pmcram[offset] = data;
74	74	}
75	75	//else
76		//logerror("%04x pmc internal ram %04x = %02x\n", cpu_get_pc(&space.device()), offset, data);
	76	//logerror("%04x pmc internal ram %04x = %02x\n", space.device().safe_pc(), offset, data);
77	77	}
78	78	else
79	79	m_ram[offset] = data;
r17788	r17789
304	304	/* bit 7 = PMC-BK */
305	305	m_pmcbank = (data & 0x80) >> 7;
306	306
307		//logerror("%04x: 3f90_w %02x\n", cpu_get_pc(&space.device()), data);
	307	//logerror("%04x: 3f90_w %02x\n", space.device().safe_pc(), data);
308	308	/* bit 6 = PMC-START */
309	309	if ((data & 0x40) && !(m_old_3f90 & 0x40))
310	310	{

trunk/src/mame/drivers/psikyo.c

r17788	r17789
127	127	case 0x0:   return ioport("P1_P2")->read();
128	128	case 0x1:   return ioport("DSW")->read();
129	129	case 0x2:   return ioport("COIN")->read();
130		default:   logerror("PC %06X - Read input %02X !\n", cpu_get_pc(&space.device()), offset * 2);
	130	default:   logerror("PC %06X - Read input %02X !\n", space.device().safe_pc(), offset * 2);
131	131	return 0;
132	132	}
133	133	}
r17788	r17789
138	138	{
139	139	case 0x0:   return ioport("P1_P2")->read();
140	140	case 0x1:   return ioport("DSW")->read();
141		default:   logerror("PC %06X - Read input %02X !\n", cpu_get_pc(&space.device()), offset * 2);
	141	default:   logerror("PC %06X - Read input %02X !\n", space.device().safe_pc(), offset * 2);
142	142	return 0;
143	143	}
144	144	}
r17788	r17789
247	247	m_s1945_mcu_latching |= 4;
248	248	break;
249	249	default:
250		//          logerror("MCU: function %02x, direction %02x, latch1 %02x, latch2 %02x (%x)\n", data, m_s1945_mcu_direction, m_s1945_mcu_latch1, m_s1945_mcu_latch2, cpu_get_pc(&space.device()));
	250	//          logerror("MCU: function %02x, direction %02x, latch1 %02x, latch2 %02x (%x)\n", data, m_s1945_mcu_direction, m_s1945_mcu_latch1, m_s1945_mcu_latch2, space.device().safe_pc());
251	251	break;
252	252	}
253	253	break;
254	254	default:
255		//      logerror("MCU.w %x, %02x (%x)\n", offset, data, cpu_get_pc(&space.device()));
	255	//      logerror("MCU.w %x, %02x (%x)\n", offset, data, space.device().safe_pc());
256	256	;
257	257	}
258	258	}
r17788	r17789
291	291	case 0x0:   return ioport("P1_P2")->read();
292	292	case 0x1:   return (ioport("DSW")->read() & 0xffff000f) | s1945_mcu_r(space, offset - 1, mem_mask);
293	293	case 0x2:   return s1945_mcu_r(space, offset - 1, mem_mask);
294		default:   logerror("PC %06X - Read input %02X !\n", cpu_get_pc(&space.device()), offset * 2);
	294	default:   logerror("PC %06X - Read input %02X !\n", space.device().safe_pc(), offset * 2);
295	295	return 0;
296	296	}
297	297	}

trunk/src/mame/drivers/esd16.c

r17788	r17789
107	107	return ((m_eeprom->read_bit() & 0x01) << 15);
108	108	}
109	109
110		//  logerror("(0x%06x) unk EEPROM read: %04x\n", cpu_get_pc(&space.device()), mem_mask);
	110	//  logerror("(0x%06x) unk EEPROM read: %04x\n", space.device().safe_pc(), mem_mask);
111	111	return 0;
112	112	}
113	113
r17788	r17789
116	116	if (ACCESSING_BITS_8_15)
117	117	ioport("EEPROMOUT")->write(data, 0xffff);
118	118
119		//  logerror("(0x%06x) Unk EEPROM write: %04x %04x\n", cpu_get_pc(&space.device()), data, mem_mask);
	119	//  logerror("(0x%06x) Unk EEPROM write: %04x %04x\n", space.device().safe_pc(), data, mem_mask);
120	120	}
121	121
122	122

trunk/src/mame/drivers/model3.c

r17788	r17789
1183	1183	case 0x9c:      /* Unknown */
1184	1184	break;
1185	1185	default:
1186		logerror("dma_callback: %08X, %08X, %d at %08X", src, dst, length, cpu_get_pc(machine.device("maincpu")));
	1186	logerror("dma_callback: %08X, %08X, %d at %08X", src, dst, length, machine.device("maincpu")->safe_pc());
1187	1187	break;
1188	1188	}
1189	1189	}
r17788	r17789
1464	1464	}
1465	1465	break;
1466	1466	default:
1467		//mame_printf_debug("Lightgun: Unknown command %02X at %08X\n", (UINT32)(data >> 24), cpu_get_pc(&space.device()));
	1467	//mame_printf_debug("Lightgun: Unknown command %02X at %08X\n", (UINT32)(data >> 24), space.device().safe_pc());
1468	1468	break;
1469	1469	}
1470	1470	}
r17788	r17789
1491	1491
1492	1492	READ64_MEMBER(model3_state::model3_sys_r)
1493	1493	{
1494		//  printf("model3_sys_r: mask %llx @ %x (PC %x)\n", mem_mask, offset, cpu_get_pc(&space.device()));
	1494	//  printf("model3_sys_r: mask %llx @ %x (PC %x)\n", mem_mask, offset, space.device().safe_pc());
1495	1495
1496	1496	switch (offset)
1497	1497	{
r17788	r17789
1516	1516	else logerror("m3_sys: Unk sys_r @ 0x10: mask = %x\n", (UINT32)mem_mask);
1517	1517	break;
1518	1518	case 0x18/8:
1519		//          printf("read irq_state %x (PC %x)\n", m_irq_state, cpu_get_pc(&space.device()));
	1519	//          printf("read irq_state %x (PC %x)\n", m_irq_state, space.device().safe_pc());
1520	1520	return (UINT64)m_irq_state<<56 | 0xff000000;
1521	1521	}
1522	1522
r17788	r17789
1668	1668
1669	1669	READ64_MEMBER(model3_state::network_r)
1670	1670	{
1671		mame_printf_debug("network_r: %02X at %08X\n", offset, cpu_get_pc(&space.device()));
	1671	mame_printf_debug("network_r: %02X at %08X\n", offset, space.device().safe_pc());
1672	1672	return m_network_ram[offset];
1673	1673	}
1674	1674
1675	1675	WRITE64_MEMBER(model3_state::network_w)
1676	1676	{
1677	1677	COMBINE_DATA(m_network_ram + offset);
1678		mame_printf_debug("network_w: %02X, %08X%08X at %08X\n", offset, (UINT32)(data >> 32), (UINT32)(data), cpu_get_pc(&space.device()));
	1678	mame_printf_debug("network_w: %02X, %08X%08X at %08X\n", offset, (UINT32)(data >> 32), (UINT32)(data), space.device().safe_pc());
1679	1679	}
1680	1680
1681	1681

trunk/src/mame/drivers/xexex.c

r17788	r17789
163	163	READ16_MEMBER(xexex_state::xexex_waitskip_r)
164	164	{
165	165
166		if (cpu_get_pc(&space.device()) == 0x1158)
	166	if (space.device().safe_pc() == 0x1158)
167	167	{
168	168	device_spin_until_trigger(&space.device(), m_resume_trigger);
169	169	m_suspension_active = 1;

trunk/src/mame/drivers/epos.c

r17788	r17789
42	42	else
43	43	m_counter = (m_counter - 1) & 0x03;
44	44
45		//  logerror("PC %08x: ctr=%04x\n",cpu_get_pc(&space.device()), m_counter);
	45	//  logerror("PC %08x: ctr=%04x\n",space.device().safe_pc(), m_counter);
46	46
47	47	membank("bank1")->set_entry(m_counter);
48	48

trunk/src/mame/drivers/glass.c

r17788	r17789
320	320	READ16_MEMBER( glass_state::glass_mainram_r )
321	321	{
322	322	UINT16 ret = m_mainram[offset];
323		int pc = cpu_get_pc(&space.device());
	323	int pc = space.device().safe_pc();
324	324
325	325	if (offset == (0xfede96 - 0xfec000)>>1)
326	326	{
r17788	r17789
353	353
354	354	WRITE16_MEMBER( glass_state::glass_mainram_w )
355	355	{
356		int pc = cpu_get_pc(&space.device());
	356	int pc = space.device().safe_pc();
357	357
358	358	COMBINE_DATA(&m_mainram[offset]);
359	359

trunk/src/mame/drivers/neoprint.c

r17788	r17789
131	131
132	132	READ16_MEMBER(neoprint_state::neoprint_calendar_r)
133	133	{
134		//if(cpu_get_pc(&space.device()) != 0x4b38 )//&& cpu_get_pc(&space.device()) != 0x5f86 && cpu_get_pc(&space.device()) != 0x5f90)
135		//  printf("%08x\n",cpu_get_pc(&space.device()));
	134	//if(space.device().safe_pc() != 0x4b38 )//&& space.device().safe_pc() != 0x5f86 && space.device().safe_pc() != 0x5f90)
	135	//  printf("%08x\n",space.device().safe_pc());
136	136
137	137	return (upd4990a_databit_r(machine().device("upd4990a"), 0) << 15);
138	138	}
r17788	r17789
151	151
152	152	m_vblank = (machine().primary_screen->frame_number() & 0x1) ? 0x10 : 0x00;
153	153
154		//if(cpu_get_pc(&space.device()) != 0x1504 && cpu_get_pc(&space.device()) != 0x5f86 && cpu_get_pc(&space.device()) != 0x5f90)
155		//  printf("%08x\n",cpu_get_pc(&space.device()));
	154	//if(space.device().safe_pc() != 0x1504 && space.device().safe_pc() != 0x5f86 && space.device().safe_pc() != 0x5f90)
	155	//  printf("%08x\n",space.device().safe_pc());
156	156
157	157	return m_vblank| 4 | 3;
158	158	}
r17788	r17789
185	185	/* boost the interleave to let the audio CPU read the command */
186	186	machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(50));
187	187
188		//if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_command_w %04x - %04x\n", cpu_get_pc(&space.device()), data, mem_mask);
	188	//if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_command_w %04x - %04x\n", space.device().safe_pc(), data, mem_mask);
189	189	}
190	190	}
191	191
r17788	r17789
194	194	{
195	195	UINT8 ret = soundlatch_byte_r(space, 0);
196	196
197		//if (LOG_CPU_COMM) logerror(" AUD CPU PC   %04x: audio_command_r %02x\n", cpu_get_pc(&space.device()), ret);
	197	//if (LOG_CPU_COMM) logerror(" AUD CPU PC   %04x: audio_command_r %02x\n", space.device().safe_pc(), ret);
198	198
199	199	/* this is a guess */
200	200	audio_cpu_clear_nmi_w(space, 0, 0);
r17788	r17789
208	208	{
209	209
210	210
211		//if (LOG_CPU_COMM && (m_audio_result != data)) logerror(" AUD CPU PC   %04x: audio_result_w %02x\n", cpu_get_pc(&space.device()), data);
	211	//if (LOG_CPU_COMM && (m_audio_result != data)) logerror(" AUD CPU PC   %04x: audio_result_w %02x\n", space.device().safe_pc(), data);
212	212
213	213	m_audio_result = data;
214	214	}

trunk/src/mame/drivers/seattle.c

r17788	r17789
818	818	}
819	819
820	820	if (LOG_PCI)
821		logerror("%08X:PCI bridge read: reg %d type %d = %08X\n", cpu_get_pc(&space->device()), reg, type, result);
	821	logerror("%08X:PCI bridge read: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, result);
822	822	return result;
823	823	}
824	824
r17788	r17789
828	828	seattle_state *state = space->machine().driver_data<seattle_state>();
829	829	state->m_galileo.pci_bridge_regs[reg] = data;
830	830	if (LOG_PCI)
831		logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", cpu_get_pc(&space->device()), reg, type, data);
	831	logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, data);
832	832	}
833	833
834	834
r17788	r17789
856	856	}
857	857
858	858	if (LOG_PCI)
859		logerror("%08X:PCI 3dfx read: reg %d type %d = %08X\n", cpu_get_pc(&space->device()), reg, type, result);
	859	logerror("%08X:PCI 3dfx read: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, result);
860	860	return result;
861	861	}
862	862
r17788	r17789
879	879	break;
880	880	}
881	881	if (LOG_PCI)
882		logerror("%08X:PCI 3dfx write: reg %d type %d = %08X\n", cpu_get_pc(&space->device()), reg, type, data);
	882	logerror("%08X:PCI 3dfx write: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, data);
883	883	}
884	884
885	885
r17788	r17789
907	907	}
908	908
909	909	if (LOG_PCI)
910		logerror("%08X:PCI IDE read: reg %d type %d = %08X\n", cpu_get_pc(&space->device()), reg, type, result);
	910	logerror("%08X:PCI IDE read: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, result);
911	911	return result;
912	912	}
913	913
r17788	r17789
917	917	seattle_state *state = space->machine().driver_data<seattle_state>();
918	918	state->m_galileo.pci_ide_regs[reg] = data;
919	919	if (LOG_PCI)
920		logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", cpu_get_pc(&space->device()), reg, type, data);
	920	logerror("%08X:PCI bridge write: reg %d type %d = %08X\n", space->device().safe_pc(), reg, type, data);
921	921	}
922	922
923	923
r17788	r17789
1153	1153	device_eat_cycles(&space.device(), 100);
1154	1154
1155	1155	if (LOG_TIMERS)
1156		logerror("%08X:hires_timer_r = %08X\n", cpu_get_pc(&space.device()), result);
	1156	logerror("%08X:hires_timer_r = %08X\n", space.device().safe_pc(), result);
1157	1157	break;
1158	1158	}
1159	1159
r17788	r17789
1186	1186	else
1187	1187	{
1188	1188	result = ~0;
1189		logerror("%08X:PCIBus read: bus %d unit %d func %d reg %d type %d = %08X\n", cpu_get_pc(&space.device()), bus, unit, func, reg, type, result);
	1189	logerror("%08X:PCIBus read: bus %d unit %d func %d reg %d type %d = %08X\n", space.device().safe_pc(), bus, unit, func, reg, type, result);
1190	1190	}
1191	1191	break;
1192	1192	}
r17788	r17789
1196	1196	case GREG_INT_MASK:
1197	1197	case GREG_TIMER_CONTROL:
1198	1198	//          if (LOG_GALILEO)
1199		//              logerror("%08X:Galileo read from offset %03X = %08X\n", cpu_get_pc(&space.device()), offset*4, result);
	1199	//              logerror("%08X:Galileo read from offset %03X = %08X\n", space.device().safe_pc(), offset*4, result);
1200	1200	break;
1201	1201
1202	1202	default:
1203		logerror("%08X:Galileo read from offset %03X = %08X\n", cpu_get_pc(&space.device()), offset*4, result);
	1203	logerror("%08X:Galileo read from offset %03X = %08X\n", space.device().safe_pc(), offset*4, result);
1204	1204	break;
1205	1205	}
1206	1206
r17788	r17789
1225	1225	int which = offset % 4;
1226	1226
1227	1227	if (LOG_DMA)
1228		logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space.device()), offset*4, data, mem_mask);
	1228	logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
1229	1229
1230	1230	/* keep the read only activity bit */
1231	1231	galileo.reg[offset] &= ~0x4000;
r17788	r17789
1255	1255	if (!timer->active)
1256	1256	timer->count = data;
1257	1257	if (LOG_TIMERS)
1258		logerror("%08X:timer/counter %d count = %08X [start=%08X]\n", cpu_get_pc(&space.device()), offset % 4, data, timer->count);
	1258	logerror("%08X:timer/counter %d count = %08X [start=%08X]\n", space.device().safe_pc(), offset % 4, data, timer->count);
1259	1259	break;
1260	1260	}
1261	1261
r17788	r17789
1264	1264	int which, mask;
1265	1265
1266	1266	if (LOG_TIMERS)
1267		logerror("%08X:timer/counter control = %08X\n", cpu_get_pc(&space.device()), data);
	1267	logerror("%08X:timer/counter control = %08X\n", space.device().safe_pc(), data);
1268	1268	for (which = 0, mask = 0x01; which < 4; which++, mask <<= 2)
1269	1269	{
1270	1270	galileo_timer *timer = &galileo.timer[which];
r17788	r17789
1323	1323
1324	1324	/* anything else, just log */
1325	1325	else
1326		logerror("%08X:PCIBus write: bus %d unit %d func %d reg %d type %d = %08X\n", cpu_get_pc(&space.device()), bus, unit, func, reg, type, data);
	1326	logerror("%08X:PCIBus write: bus %d unit %d func %d reg %d type %d = %08X\n", space.device().safe_pc(), bus, unit, func, reg, type, data);
1327	1327	break;
1328	1328	}
1329	1329
r17788	r17789
1334	1334	case GREG_CONFIG_ADDRESS:
1335	1335	case GREG_INT_MASK:
1336	1336	if (LOG_GALILEO)
1337		logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space.device()), offset*4, data, mem_mask);
	1337	logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
1338	1338	break;
1339	1339
1340	1340	default:
1341		logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", cpu_get_pc(&space.device()), offset*4, data, mem_mask);
	1341	logerror("%08X:Galileo write to offset %03X = %08X & %08X\n", space.device().safe_pc(), offset*4, data, mem_mask);
1342	1342	break;
1343	1343	}
1344	1344	}
r17788	r17789
1372	1372
1373	1373	/* spin until we send the magic trigger */
1374	1374	device_spin_until_trigger(&space.device(), 45678);
1375		if (LOG_DMA) logerror("%08X:Stalling CPU on voodoo (already stalled)\n", cpu_get_pc(&space.device()));
	1375	if (LOG_DMA) logerror("%08X:Stalling CPU on voodoo (already stalled)\n", space.device().safe_pc());
1376	1376	}
1377	1377
1378	1378
r17788	r17789
1392	1392	}
1393	1393	else
1394	1394	{
1395		if (LOG_DMA) logerror("%08X:Stalling CPU on voodoo\n", cpu_get_pc(device->machine().device("maincpu")));
	1395	if (LOG_DMA) logerror("%08X:Stalling CPU on voodoo\n", device->machine().device("maincpu")->safe_pc());
1396	1396	device_spin_until_trigger(device->machine().device("maincpu"), 45678);
1397	1397	}
1398	1398	}
r17788	r17789
1451	1451	static const char *const portnames[] = { "AN0", "AN1", "AN2", "AN3", "AN4", "AN5", "AN6", "AN7" };
1452	1452
1453	1453	if (data < 8 || data > 15)
1454		logerror("%08X:Unexpected analog port select = %08X\n", cpu_get_pc(&space.device()), data);
	1454	logerror("%08X:Unexpected analog port select = %08X\n", space.device().safe_pc(), data);
1455	1455	m_pending_analog_read = ioport(portnames[data & 7])->read();
1456	1456	}
1457	1457

trunk/src/mame/drivers/galastrm.c

r17788	r17789
140	140	coin_counter_w(machine(), 1, data & 0x04000000);
141	141	m_coin_word = (data >> 16) &0xffff;
142	142	}
143		//logerror("CPU #0 PC %06x: write input %06x\n",cpu_get_pc(&device()),offset);
	143	//logerror("CPU #0 PC %06x: write input %06x\n",device->safe_pc(),offset);
144	144	}
145	145	}
146	146	}

trunk/src/mame/drivers/tetrisp2.c

r17788	r17789
189	189
190	190	memcpy(machine().root_device().memregion("oki")->base(), rom + (m_bank_lo * 0x80000), 0x20000);
191	191
192		//          logerror("PC:%06X sound bank_lo = %02X\n",cpu_get_pc(&space.device()),m_bank_lo);
	192	//          logerror("PC:%06X sound bank_lo = %02X\n",space.device().safe_pc(),m_bank_lo);
193	193	}
194	194	else
195	195	{
r17788	r17789
197	197
198	198	memcpy(machine().root_device().memregion("oki")->base() + 0x20000, rom + (m_bank_lo * 0x80000) + (m_bank_hi * 0x20000), 0x20000);
199	199
200		//          logerror("PC:%06X sound bank_hi = %02X\n",cpu_get_pc(&space.device()),m_bank_hi);
	200	//          logerror("PC:%06X sound bank_hi = %02X\n",space.device().safe_pc(),m_bank_hi);
201	201	}
202	202	}
203	203	}

trunk/src/mame/drivers/alpha68k.c

r17788	r17789
216	216
217	217	WRITE16_MEMBER(alpha68k_state::tnextspc_unknown_w)
218	218	{
219		logerror("tnextspc_unknown_w : PC = %04x - offset = %04x - data = %04x\n", cpu_get_pc(&space.device()), offset, data);
	219	logerror("tnextspc_unknown_w : PC = %04x - offset = %04x - data = %04x\n", space.device().safe_pc(), offset, data);
220	220	if (offset == 0)
221	221	alpha68k_flipscreen_w(machine(), data & 0x100);
222	222	}
223	223
224	224	WRITE16_MEMBER(alpha68k_state::alpha_microcontroller_w)
225	225	{
226		logerror("%04x:  Alpha write trigger at %04x (%04x)\n", cpu_get_pc(&space.device()), offset, data);
	226	logerror("%04x:  Alpha write trigger at %04x (%04x)\n", space.device().safe_pc(), offset, data);
227	227	/* 0x44 = coin clear signal to microcontroller? */
228	228	if (offset == 0x2d && ACCESSING_BITS_0_7)
229	229	alpha68k_flipscreen_w(machine(), data & 1);
r17788	r17789
404	404	break;
405	405	}
406	406
407		logerror("%04x:  Alpha read trigger at %04x\n", cpu_get_pc(&space.device()), offset);
	407	logerror("%04x:  Alpha read trigger at %04x\n", space.device().safe_pc(), offset);
408	408
409	409	return 0; /* Values returned don't matter */
410	410	}
r17788	r17789
498	498	break;
499	499	}
500	500
501		logerror("%04x:  Alpha read trigger at %04x\n", cpu_get_pc(&space.device()), offset);
	501	logerror("%04x:  Alpha read trigger at %04x\n", space.device().safe_pc(), offset);
502	502
503	503	return 0; /* Values returned don't matter */
504	504	}
r17788	r17789
643	643	break;
644	644	}
645	645
646		logerror("%04x:  Alpha read trigger at %04x\n", cpu_get_pc(&space.device()), offset);
	646	logerror("%04x:  Alpha read trigger at %04x\n", space.device().safe_pc(), offset);
647	647
648	648	return 0; /* Values returned don't matter */
649	649	}

trunk/src/mame/drivers/tmaster.c

r17788	r17789
613	613	WRITE16_MEMBER(tmaster_state::galgames_eeprom_w)
614	614	{
615	615	if (data & ~0x0003)
616		logerror("CPU #0 PC: %06X - Unknown EEPROM bit written %04X\n",cpu_get_pc(&space.device()),data);
	616	logerror("CPU #0 PC: %06X - Unknown EEPROM bit written %04X\n",space.device().safe_pc(),data);
617	617
618	618	if ( ACCESSING_BITS_0_7 )
619	619	{
r17788	r17789
706	706	default:
707	707	machine().device<eeprom_device>(galgames_eeprom_names[0])->set_cs_line(CLEAR_LINE);
708	708	galgames_update_rombank(machine(), 0);
709		logerror("%06x: unknown cart sel = %04x\n", cpu_get_pc(&space.device()), data);
	709	logerror("%06x: unknown cart sel = %04x\n", space.device().safe_pc(), data);
710	710	break;
711	711	}
712	712	}
r17788	r17789
728	728	{
729	729	membank(GALGAMES_BANK_000000_R)->set_entry(GALGAMES_RAM);   // ram
730	730	galgames_update_rombank(machine(), m_galgames_cart);
731		logerror("%06x: romram bank = %04x\n", cpu_get_pc(&space.device()), data);
	731	logerror("%06x: romram bank = %04x\n", space.device().safe_pc(), data);
732	732	}
733	733	else
734	734	{
735	735	membank(GALGAMES_BANK_000000_R)->set_entry(GALGAMES_ROM0);   // rom
736	736	membank(GALGAMES_BANK_200000_R)->set_entry(GALGAMES_RAM);   // ram
737		logerror("%06x: unknown romram bank = %04x\n", cpu_get_pc(&space.device()), data);
	737	logerror("%06x: unknown romram bank = %04x\n", space.device().safe_pc(), data);
738	738	}
739	739	}
740	740	}

trunk/src/mame/drivers/namcos22.c

r17788	r17789
1619	1619	break;
1620	1620
1621	1621	default:
1622		logerror( "%08x: master port#7: 0x%04x\n", cpu_get_previouspc(&space.device()), data );
	1622	logerror( "%08x: master port#7: 0x%04x\n", space.device().safe_pcbase(), data );
1623	1623	break;
1624	1624	}
1625	1625	break;
r17788	r17789
2378	2378	// this chip is also used for reading random values in some games
2379	2379	// for example in timecris to determine where certain enemies will emerge
2380	2380	// but it is not yet understood how this works
2381		//  printf("Hit keycus mask %x PC=%x\n", mem_mask, cpu_get_pc(&space.device()));
	2381	//  printf("Hit keycus mask %x PC=%x\n", mem_mask, space.device().safe_pc());
2382	2382
2383	2383	if (ACCESSING_BITS_0_15)
2384	2384	return m_keycus_id;
r17788	r17789
5409	5409	// for MCU BIOS v1.41
5410	5410	READ16_MEMBER(namcos22_state::mcu141_speedup_r)
5411	5411	{
5412		if ((cpu_get_pc(&space.device()) == 0xc12d) && (!(m_su_82 & 0xff00)))
	5412	if ((space.device().safe_pc() == 0xc12d) && (!(m_su_82 & 0xff00)))
5413	5413	{
5414	5414	device_spin_until_interrupt(&space.device());
5415	5415	}
r17788	r17789
5425	5425	// for MCU BIOS v1.30
5426	5426	READ16_MEMBER(namcos22_state::mcu130_speedup_r)
5427	5427	{
5428		if ((cpu_get_pc(&space.device()) == 0xc12a) && (!(m_su_82 & 0xff00)))
	5428	if ((space.device().safe_pc() == 0xc12a) && (!(m_su_82 & 0xff00)))
5429	5429	{
5430	5430	device_spin_until_interrupt(&space.device());
5431	5431	}
r17788	r17789
5436	5436	// for NSTX7702 v1.00 (C74)
5437	5437	READ16_MEMBER(namcos22_state::mcuc74_speedup_r)
5438	5438	{
5439		if (((cpu_get_pc(&space.device()) == 0xc0df) || (cpu_get_pc(&space.device()) == 0xc101)) && (!(m_su_82 & 0xff00)))
	5439	if (((space.device().safe_pc() == 0xc0df) || (space.device().safe_pc() == 0xc101)) && (!(m_su_82 & 0xff00)))
5440	5440	{
5441	5441	device_spin_until_interrupt(&space.device());
5442	5442	}

trunk/src/mame/drivers/pluto5.c

r17788	r17789
202	202
203	203	READ32_MEMBER(pluto5_state::pluto5_mem_r)
204	204	{
205		int pc = cpu_get_pc(&space.device());
	205	int pc = space.device().safe_pc();
206	206	int cs = m68340_get_cs(m_maincpu, offset * 4);
207	207
208	208	switch ( cs )
r17788	r17789
220	220
221	221	WRITE32_MEMBER(pluto5_state::pluto5_mem_w)
222	222	{
223		int pc = cpu_get_pc(&space.device());
	223	int pc = space.device().safe_pc();
224	224	int cs = m68340_get_cs(m_maincpu, offset * 4);
225	225
226	226	switch ( cs )

trunk/src/mame/drivers/galaxold.c

r17788	r17789
397	397	/* Send sound data to the sound cpu and cause an nmi */
398	398	READ8_MEMBER(galaxold_state::drivfrcg_port0_r)
399	399	{
400		switch (cpu_get_pc(&space.device()))
	400	switch (space.device().safe_pc())
401	401	{
402	402	case 0x002e:
403	403	case 0x0297:
r17788	r17789
895	895
896	896	READ8_MEMBER(galaxold_state::hexpoola_data_port_r)
897	897	{
898		switch (cpu_get_pc(&space.device()))
	898	switch (space.device().safe_pc())
899	899	{
900	900	case 0x0022:
901	901	return 0;
r17788	r17789
916	916
917	917	READ8_MEMBER(galaxold_state::bullsdrtg_data_port_r)
918	918	{
919		switch (cpu_get_pc(&space.device()))
	919	switch (space.device().safe_pc())
920	920	{
921	921	case 0x0083:
922	922	case 0x008c:
r17788	r17789
928	928	case 0x6b58:
929	929	return 1;
930	930	default:
931		logerror("Reading data port at PC=%04X\n", cpu_get_pc(&space.device()));
	931	logerror("Reading data port at PC=%04X\n", space.device().safe_pc());
932	932	break;
933	933	}
934	934

trunk/src/mame/drivers/ssv.c

r17788	r17789
526	526	if (input_sel & 0x0002)   return ioport("KEY1")->read();
527	527	if (input_sel & 0x0004)   return ioport("KEY2")->read();
528	528	if (input_sel & 0x0008)   return ioport("KEY3")->read();
529		logerror("CPU #0 PC %06X: unknown input read: %04X\n",cpu_get_pc(&space.device()),input_sel);
	529	logerror("CPU #0 PC %06X: unknown input read: %04X\n",space.device().safe_pc(),input_sel);
530	530	return 0xffff;
531	531	}
532	532
r17788	r17789
651	651	if (input_sel & 0x0004)   return ioport("KEY1")->read();
652	652	if (input_sel & 0x0008)   return ioport("KEY2")->read();
653	653	if (input_sel & 0x0010)   return ioport("KEY3")->read();
654		logerror("CPU #0 PC %06X: unknown input read: %04X\n",cpu_get_pc(&space.device()),input_sel);
	654	logerror("CPU #0 PC %06X: unknown input read: %04X\n",space.device().safe_pc(),input_sel);
655	655	return 0xffff;
656	656	}
657	657
r17788	r17789
699	699	if (input_sel & 0x0004)   return ioport("KEY1")->read();
700	700	if (input_sel & 0x0008)   return ioport("KEY2")->read();
701	701	if (input_sel & 0x0010)   return ioport("KEY3")->read();
702		logerror("CPU #0 PC %06X: unknown input read: %04X\n",cpu_get_pc(&space.device()),input_sel);
	702	logerror("CPU #0 PC %06X: unknown input read: %04X\n",space.device().safe_pc(),input_sel);
703	703	return 0xffff;
704	704	}
705	705

trunk/src/mame/drivers/dec0.c

r17788	r17789
200	200	break;
201	201
202	202	case 0xa: /* Mix Psel(?). */
203		logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
	203	logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
204	204	break;
205	205
206	206	case 0xc: /* Cblk - coin blockout.  Seems to be unused by the games */
r17788	r17789
208	208
209	209	case 0xe: /* Reset Intel 8751? - not sure, all the games write here at startup */
210	210	dec0_i8751_reset(machine());
211		logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
	211	logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
212	212	break;
213	213
214	214	default:
215		logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
	215	logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
216	216	break;
217	217	}
218	218	}
r17788	r17789
238	238	break;
239	239
240	240	case 0xa: /* Mix Psel(?). */
241		logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
	241	logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
242	242	break;
243	243
244	244	case 0xc: /* Cblk - coin blockout.  Seems to be unused by the games */
r17788	r17789
246	246	#endif
247	247
248	248	default:
249		logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",cpu_get_pc(&space.device()),data,0x30c010+(offset<<1));
	249	logerror("CPU #0 PC %06x: warning - write %02x to unmapped memory address %06x\n",space.device().safe_pc(),data,0x30c010+(offset<<1));
250	250	break;
251	251	}
252	252	}
r17788	r17789
358	358	case 6:      return 0x2;
359	359	}
360	360
361		logerror("%04x, Unknown protection read at 30c000 %d\n", cpu_get_pc(&space.device()), offset);
	361	logerror("%04x, Unknown protection read at 30c000 %d\n", space.device().safe_pc(), offset);
362	362	return 0;
363	363	}
364	364

trunk/src/mame/drivers/midvunit.c

r17788	r17789
253	253	/* timer is clocked at 100ns */
254	254	int which = (offset >> 4) & 1;
255	255	INT32 result = (m_timer[which]->time_elapsed() * m_timer_rate).as_double();
256		//      logerror("%06X:tms32031_control_r(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, result);
	256	//      logerror("%06X:tms32031_control_r(%02X) = %08X\n", space.device().safe_pc(), offset, result);
257	257	return result;
258	258	}
259	259
260	260	/* log anything else except the memory control register */
261	261	if (offset != 0x64)
262		logerror("%06X:tms32031_control_r(%02X)\n", cpu_get_pc(&space.device()), offset);
	262	logerror("%06X:tms32031_control_r(%02X)\n", space.device().safe_pc(), offset);
263	263
264	264	return m_tms32031_control[offset];
265	265	}
r17788	r17789
277	277	else if (offset == 0x20 || offset == 0x30)
278	278	{
279	279	int which = (offset >> 4) & 1;
280		//  logerror("%06X:tms32031_control_w(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, data);
	280	//  logerror("%06X:tms32031_control_w(%02X) = %08X\n", space.device().safe_pc(), offset, data);
281	281	if (data & 0x40)
282	282	m_timer[which]->reset();
283	283
r17788	r17789
288	288	m_timer_rate = 10000000.;
289	289	}
290	290	else
291		logerror("%06X:tms32031_control_w(%02X) = %08X\n", cpu_get_pc(&space.device()), offset, data);
	291	logerror("%06X:tms32031_control_w(%02X) = %08X\n", space.device().safe_pc(), offset, data);
292	292	}
293	293
294	294
r17788	r17789
409	409	}
410	410
411	411	if (offset != 0 && offset != 3)
412		logerror("%06X:midvplus_misc_r(%d) = %08X\n", cpu_get_pc(&space.device()), offset, result);
	412	logerror("%06X:midvplus_misc_r(%d) = %08X\n", space.device().safe_pc(), offset, result);
413	413	return result;
414	414	}
415	415
r17788	r17789
438	438	}
439	439
440	440	if (logit)
441		logerror("%06X:midvplus_misc_w(%d) = %08X\n", cpu_get_pc(&space.device()), offset, data);
	441	logerror("%06X:midvplus_misc_w(%d) = %08X\n", space.device().safe_pc(), offset, data);
442	442	}
443	443
444	444

trunk/src/mame/drivers/opwolf.c

r17788	r17789
501	501	msm5205_reset_w(device, 0);
502	502	}
503	503
504		//  logerror("CPU #1     b00%i-data=%2x   pc=%4x\n",offset,data,cpu_get_pc(&space->device()) );
	504	//  logerror("CPU #1     b00%i-data=%2x   pc=%4x\n",offset,data,space->device().safe_pc() );
505	505	}
506	506
507	507
r17788	r17789
524	524	msm5205_reset_w(device, 0);
525	525	}
526	526
527		//  logerror("CPU #1     c00%i-data=%2x   pc=%4x\n",offset,data,cpu_get_pc(&space->device()) );
	527	//  logerror("CPU #1     c00%i-data=%2x   pc=%4x\n",offset,data,space->device().safe_pc() );
528	528	}
529	529
530	530
531	531	WRITE8_MEMBER(opwolf_state::opwolf_adpcm_d_w)
532	532	{
533		//   logerror("CPU #1         d00%i-data=%2x   pc=%4x\n",offset,data,cpu_get_pc(&space.device()) );
	533	//   logerror("CPU #1         d00%i-data=%2x   pc=%4x\n",offset,data,space.device().safe_pc() );
534	534	}
535	535
536	536	WRITE8_MEMBER(opwolf_state::opwolf_adpcm_e_w)
537	537	{
538		//  logerror("CPU #1         e00%i-data=%2x   pc=%4x\n",offset,data,cpu_get_pc(&space.device()) );
	538	//  logerror("CPU #1         e00%i-data=%2x   pc=%4x\n",offset,data,space.device().safe_pc() );
539	539	}
540	540
541	541	static ADDRESS_MAP_START( opwolf_sound_z80_map, AS_PROGRAM, 8, opwolf_state )

trunk/src/mame/drivers/suna16.c

r17788	r17789
44	44	{
45	45	soundlatch_byte_w(space, 0, data & 0xff );
46	46	}
47		if (data & ~0xff)   logerror("CPU#0 PC %06X - Sound latch unknown bits: %04X\n", cpu_get_pc(&space.device()), data);
	47	if (data & ~0xff)   logerror("CPU#0 PC %06X - Sound latch unknown bits: %04X\n", space.device().safe_pc(), data);
48	48	}
49	49
50	50
r17788	r17789
58	58	set_led_status(machine(), 3, data & 0x08);
59	59	coin_counter_w(machine(), 0, data & 0x10);
60	60	}
61		if (data & ~0x1f)   logerror("CPU#0 PC %06X - Leds unknown bits: %04X\n", cpu_get_pc(&space.device()), data);
	61	if (data & ~0x1f)   logerror("CPU#0 PC %06X - Leds unknown bits: %04X\n", space.device().safe_pc(), data);
62	62	}
63	63
64	64
r17788	r17789
70	70	set_led_status(machine(), 0, data & 0x02);
71	71	set_led_status(machine(), 1, data & 0x04);
72	72	}
73		if (data & ~0x07)   logerror("CPU#0 PC %06X - Leds unknown bits: %04X\n", cpu_get_pc(&space.device()), data);
	73	if (data & ~0x07)   logerror("CPU#0 PC %06X - Leds unknown bits: %04X\n", space.device().safe_pc(), data);
74	74	}
75	75
76	76
r17788	r17789
80	80	{
81	81	coin_counter_w(machine(), 0, data & 0x04);
82	82	}
83		if (data & ~0x04)   logerror("CPU#0 PC %06X - Leds unknown bits: %04X\n", cpu_get_pc(&space.device()), data);
	83	if (data & ~0x04)   logerror("CPU#0 PC %06X - Leds unknown bits: %04X\n", space.device().safe_pc(), data);
84	84	}
85	85
86	86
r17788	r17789
161	161	case 0x00:   m_prot = m_prot ^ 0x0009;   break;
162	162	case 0x08:   m_prot = m_prot ^ 0x0002;   break;
163	163	case 0x0c:   m_prot = m_prot ^ 0x0003;   break;
164		//default:    logerror("CPU#0 PC %06X - Unknown protection value: %04X\n", cpu_get_pc(&space.device()), data);
	164	//default:    logerror("CPU#0 PC %06X - Unknown protection value: %04X\n", space.device().safe_pc(), data);
165	165	}
166	166	}
167	167	}
r17788	r17789
262	262	{
263	263	UINT8 *RAM = memregion("pcm1")->base();
264	264	int bank = data & 7;
265		if (bank & ~7)   logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", cpu_get_pc(&space.device()), data);
	265	if (bank & ~7)   logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", space.device().safe_pc(), data);
266	266	membank("bank1")->set_base(&RAM[bank * 0x10000 + 0x1000]);
267	267	}
268	268
r17788	r17789
270	270	{
271	271	UINT8 *RAM = memregion("pcm2")->base();
272	272	int bank = data & 7;
273		if (bank & ~7)   logerror("CPU#3 PC %06X - ROM bank unknown bits: %02X\n", cpu_get_pc(&space.device()), data);
	273	if (bank & ~7)   logerror("CPU#3 PC %06X - ROM bank unknown bits: %02X\n", space.device().safe_pc(), data);
274	274	membank("bank2")->set_base(&RAM[bank * 0x10000 + 0x1000]);
275	275	}
276	276
r17788	r17789
340	340	{
341	341	UINT8 *RAM = memregion("pcm1")->base();
342	342	int bank = data & 1;
343		if (bank & ~1)   logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", cpu_get_pc(&space.device()), data);
	343	if (bank & ~1)   logerror("CPU#2 PC %06X - ROM bank unknown bits: %02X\n", space.device().safe_pc(), data);
344	344	membank("bank1")->set_base(&RAM[bank * 0x10000 + 0x400]);
345	345	}
346	346

trunk/src/mame/drivers/bigevglf.c

r17788	r17789
81	81	}
82	82	WRITE8_MEMBER(bigevglf_state::beg_fromsound_w)/* write to D800 sets bit 1 in status */
83	83	{
84		machine().scheduler().synchronize(FUNC(from_sound_latch_callback), (cpu_get_pc(&space.device()) << 16) | data);
	84	machine().scheduler().synchronize(FUNC(from_sound_latch_callback), (space.device().safe_pc() << 16) | data);
85	85	}
86	86
87	87	READ8_MEMBER(bigevglf_state::beg_fromsound_r)

trunk/src/mame/drivers/cbuster.c

r17788	r17789
75	75
76	76	break;
77	77	}
78		logerror("Warning %04x- %02x written to control %02x\n", cpu_get_pc(&space.device()), data, offset);
	78	logerror("Warning %04x- %02x written to control %02x\n", space.device().safe_pc(), data, offset);
79	79	}
80	80
81	81	READ16_MEMBER(cbuster_state::twocrude_control_r)
r17788	r17789
90	90	return ioport("DSW")->read();
91	91
92	92	case 4: /* Protection */
93		logerror("%04x : protection control read at 30c000 %d\n", cpu_get_pc(&space.device()), offset);
	93	logerror("%04x : protection control read at 30c000 %d\n", space.device().safe_pc(), offset);
94	94	return m_prot;
95	95
96	96	case 6: /* Credits, VBL in byte 7 */

trunk/src/mame/drivers/ghosteo.c

r17788	r17789
559	559	UINT32 ret = s3c2410_lcd_r(s3c2410, offset+0x10/4, mem_mask);
560	560
561	561
562		int pc = cpu_get_pc(&space.device());
	562	int pc = space.device().safe_pc();
563	563
564	564	// these are vblank waits
565	565	if (pc == 0x3001c0e4 || pc == 0x3001c0d8)

trunk/src/mame/drivers/dunhuang.c

r17788	r17789
269	269	WRITE8_MEMBER(dunhuang_state::dunhuang_horiz_clear_w)
270	270	{
271	271	int i;
272		//  logerror("%06x: horiz clear, y = %02x, data = %02d\n", cpu_get_pc(&space.device()), m_clear_y,data);
	272	//  logerror("%06x: horiz clear, y = %02x, data = %02d\n", space.device().safe_pc(), m_clear_y,data);
273	273	for (i = 0; i < 0x40; i++)
274	274	{
275	275	int addr = m_clear_y * 0x40 + i;
r17788	r17789
285	285	WRITE8_MEMBER(dunhuang_state::dunhuang_vert_clear_w)
286	286	{
287	287	int i;
288		//  logerror("%06x: vert clear, x = %02x, y = %02x, data = %02x\n", cpu_get_pc(&space.device()), m_pos_x,m_pos_y,data);
	288	//  logerror("%06x: vert clear, x = %02x, y = %02x, data = %02x\n", space.device().safe_pc(), m_pos_x,m_pos_y,data);
289	289	for (i = 0; i < 0x08; i++)
290	290	{
291	291	int addr = (m_pos_x & 0x3f) + (i & 0x07) * 0x40;
r17788	r17789
343	343	int i,j, addr;
344	344	UINT8 *tile_addr;
345	345
346		//  logerror("%06x: block dst %x, src %x, xy %x %x, wh %x %x, clr %x\n", cpu_get_pc(&space.device()), m_block_dest, (m_block_addr_hi << 8) + m_block_addr_lo, m_block_x,m_block_y,m_block_w+1,m_block_h+1,m_block_c);
	346	//  logerror("%06x: block dst %x, src %x, xy %x %x, wh %x %x, clr %x\n", space.device().safe_pc(), m_block_dest, (m_block_addr_hi << 8) + m_block_addr_lo, m_block_x,m_block_y,m_block_w+1,m_block_h+1,m_block_c);
347	347
348	348	m_block_h = data;
349	349
r17788	r17789
382	382	break;
383	383
384	384	default:
385		popmessage("%06x: block dst=%x", cpu_get_pc(&space.device()), m_block_dest);
	385	popmessage("%06x: block dst=%x", space.device().safe_pc(), m_block_dest);
386	386	}
387	387	}
388	388

trunk/src/mame/drivers/ojankohs.c

r17788	r17789
127	127	ret &= ioport("KEY4")->read();
128	128	break;
129	129	default:   ret = 0xff;
130		logerror("PC:%04X unknown %02X\n", cpu_get_pc(&space.device()), m_portselect);
	130	logerror("PC:%04X unknown %02X\n", space.device().safe_pc(), m_portselect);
131	131	break;
132	132	}
133	133

trunk/src/mame/drivers/spdodgeb.c

r17788	r17789
211	211
212	212	READ8_MEMBER(spdodgeb_state::mcu63701_r)
213	213	{
214		//  logerror("CPU #0 PC %04x: read from port %02x of 63701 data address 3801\n",cpu_get_pc(&space.device()),offset);
	214	//  logerror("CPU #0 PC %04x: read from port %02x of 63701 data address 3801\n",space.device().safe_pc(),offset);
215	215
216	216	if (m_mcu63701_command == 0) return 0x6a;
217	217	else switch (offset)
r17788	r17789
227	227
228	228	WRITE8_MEMBER(spdodgeb_state::mcu63701_w)
229	229	{
230		//  logerror("CPU #0 PC %04x: write %02x to 63701 control address 3800\n",cpu_get_pc(&space.device()),data);
	230	//  logerror("CPU #0 PC %04x: write %02x to 63701 control address 3800\n",space.device().safe_pc(),data);
231	231	m_mcu63701_command = data;
232	232	mcu63705_update_inputs(machine());
233	233	}

trunk/src/mame/drivers/cvs.c

r17788	r17789
267	267	case 0x04:  ret = ioport("IN3")->read(); break;
268	268	case 0x06:  ret = ioport("DSW3")->read(); break;
269	269	case 0x07:  ret = ioport("DSW2")->read(); break;
270		default:    logerror("%04x : CVS: Reading unmapped input port 0x%02x\n", cpu_get_pc(&space.device()), offset & 0x0f); break;
	270	default:    logerror("%04x : CVS: Reading unmapped input port 0x%02x\n", space.device().safe_pc(), offset & 0x0f); break;
271	271	}
272	272
273	273	return ret;
r17788	r17789
375	375
376	376	/* assuming that d0-d2 are cleared here */
377	377	m_speech_rom_bit_address = (m_speech_rom_bit_address & 0xf800) | (data << 3);
378		LOG(("%04x : CVS: Speech Lo %02x Address = %04x\n", cpu_get_pc(&space.device()), data, m_speech_rom_bit_address >> 3));
	378	LOG(("%04x : CVS: Speech Lo %02x Address = %04x\n", space.device().safe_pc(), data, m_speech_rom_bit_address >> 3));
379	379	}
380	380
381	381	WRITE8_MEMBER(cvs_state::cvs_speech_rom_address_hi_w)
382	382	{
383	383	m_speech_rom_bit_address = (m_speech_rom_bit_address & 0x07ff) | (data << 11);
384		LOG(("%04x : CVS: Speech Hi %02x Address = %04x\n", cpu_get_pc(&space.device()), data, m_speech_rom_bit_address >> 3));
	384	LOG(("%04x : CVS: Speech Hi %02x Address = %04x\n", space.device().safe_pc(), data, m_speech_rom_bit_address >> 3));
385	385	}
386	386
387	387

trunk/src/mame/drivers/plygonet.c

r17788	r17789
200	200	if (mem_mask == 0x0000ff00)   { value <<= 8;  }
201	201	if (mem_mask == 0xff000000) { value <<= 24; }
202	202
203		logerror("Dsp HI Read (host-side) %08x (HI %04x) = %08x (@%x)\n", mem_mask, hi_addr, value, cpu_get_pc(&space.device()));
	203	logerror("Dsp HI Read (host-side) %08x (HI %04x) = %08x (@%x)\n", mem_mask, hi_addr, value, space.device().safe_pc());
204	204
205	205	return value;
206	206	}
r17788	r17789
214	214	{
215	215	logerror("68k WRITING %04x to shared ram %x (@%x)\n", (m_shared_ram[offset] & 0xffff0000) >> 16,
216	216	0xc000 + (offset<<1),
217		cpu_get_pc(&space.device()));
	217	space.device().safe_pc());
218	218	}
219	219	else if (mem_mask == 0x0000ffff)
220	220	{
221	221	logerror("68k WRITING %04x to shared ram %x (@%x)\n", (m_shared_ram[offset] & 0x0000ffff),
222	222	0xc000 +((offset<<1)+1),
223		cpu_get_pc(&space.device()));
	223	space.device().safe_pc());
224	224	}
225	225	else
226	226	{
r17788	r17789
229	229	0xc000 + (offset<<1),
230	230	0xc000 +((offset<<1)+1),
231	231	mem_mask,
232		cpu_get_pc(&space.device()));
	232	space.device().safe_pc());
233	233	}
234	234
235	235	/* write to the current dsp56k word */

trunk/src/mame/drivers/jackie.c

r17788	r17789
350	350	UINT8 *rom = memregion("gfx3")->base();
351	351
352	352	offset += m_exp_bank * 0x8000;
353		//  logerror("PC %06X: %04x = %02x\n",cpu_get_pc(&space.device()),offset,rom[offset]);
	353	//  logerror("PC %06X: %04x = %02x\n",space.device().safe_pc(),offset,rom[offset]);
354	354	return rom[offset];
355	355	}
356	356

trunk/src/mame/drivers/goal92.c

r17788	r17789
40	40	return ioport("DSW2")->read();
41	41
42	42	default:
43		logerror("reading unhandled goal92 inputs %04X %04X @ PC = %04X\n", offset, mem_mask,cpu_get_pc(&space.device()));
	43	logerror("reading unhandled goal92 inputs %04X %04X @ PC = %04X\n", offset, mem_mask,space.device().safe_pc());
44	44	}
45	45
46	46	return 0;

trunk/src/mame/drivers/blockhl.c

r17788	r17789
335	335	/* other bits unknown */
336	336
337	337	if ((lines & 0x84) != 0x80)
338		logerror("%04x: setlines %02x\n", cpu_get_pc(device), lines);
	338	logerror("%04x: setlines %02x\n", device->safe_pc(), lines);
339	339	}
340	340
341	341

trunk/src/mame/drivers/gcpinbal.c

r17788	r17789
101	101
102	102	}
103	103
104		//logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",cpu_get_pc(&space.device()),offset);
	104	//logerror("CPU #0 PC %06x: warning - read unmapped ioc offset %06x\n",space.device().safe_pc(),offset);
105	105
106	106	return m_ioc_ram[offset];
107	107	}
r17788	r17789
192	192	break;
193	193
194	194	default:
195		logerror("CPU #0 PC %06x: warning - write ioc offset %06x with %04x\n", cpu_get_pc(&space.device()), offset, data);
	195	logerror("CPU #0 PC %06x: warning - write ioc offset %06x with %04x\n", space.device().safe_pc(), offset, data);
196	196	break;
197	197	}
198	198

trunk/src/mame/drivers/segag80v.c

r17788	r17789
190	190	segag80v_state *state = space->machine().driver_data<segag80v_state>();
191	191
192	192	/* ignore anything but accesses via opcode $32 (LD $(XXYY),A) */
193		offs_t pc = cpu_get_previouspc(&space->device());
	193	offs_t pc = space->device().safe_pcbase();
194	194	if ((UINT16)pc == 0xffff || space->read_byte(pc) != 0x32)
195	195	return offset;
196	196
r17788	r17789
361	361	/* writing an 0x04 here enables interrupts */
362	362	/* some games write 0x00/0x01 here as well */
363	363	if (data != 0x00 && data != 0x01 && data != 0x04)
364		mame_printf_debug("%04X:unknown_w = %02X\n", cpu_get_pc(&space.device()), data);
	364	mame_printf_debug("%04X:unknown_w = %02X\n", space.device().safe_pc(), data);
365	365	}
366	366
367	367

trunk/src/mame/drivers/macs.c

r17788	r17789
131	131	case 5: return ioport("DSW3")->read();
132	132	case 6: return ioport("DSW4")->read();
133	133	case 7: return ioport("SYS1")->read();
134		default:   popmessage("Unmapped I/O read at PC = %06x offset = %02x",cpu_get_pc(&space.device()),offset+0xc0);
	134	default:   popmessage("Unmapped I/O read at PC = %06x offset = %02x",space.device().safe_pc(),offset+0xc0);
135	135	}
136	136
137	137	return 0xff;

trunk/src/mame/drivers/8080bw.c

r17788	r17789
1731	1731
1732	1732	READ8_MEMBER(_8080bw_state::indianbt_r)
1733	1733	{
1734		switch(cpu_get_pc(&space.device()))
	1734	switch(space.device().safe_pc())
1735	1735	{
1736	1736	case 0x5fed:   return 0x10;
1737	1737	case 0x5ffc:   return 0;
1738	1738	}
1739		logerror("unknown port 0 read @ %x\n",cpu_get_pc(&space.device()));
	1739	logerror("unknown port 0 read @ %x\n",space.device().safe_pc());
1740	1740	return machine().rand();
1741	1741	}
1742	1742

trunk/src/mame/drivers/xyonix.c

r17788	r17789
74	74
75	75	READ8_MEMBER(xyonix_state::xyonix_io_r)
76	76	{
77		int regPC = cpu_get_pc(&space.device());
	77	int regPC = space.device().safe_pc();
78	78
79	79	if (regPC == 0x27ba)
80	80	return 0x88;
r17788	r17789
126	126	WRITE8_MEMBER(xyonix_state::xyonix_io_w)
127	127	{
128	128
129		//logerror ("xyonix_port_e0_w %02x - PC = %04x\n", data, cpu_get_pc(&space.device()));
	129	//logerror ("xyonix_port_e0_w %02x - PC = %04x\n", data, space.device().safe_pc());
130	130	m_e0_data = data;
131	131	}
132	132

trunk/src/mame/drivers/1943.c

r17788	r17789
44	44	*/
45	45
46	46	int data = cpu_get_reg(&space.device(), Z80_BC) >> 8;
47		//  logerror("protection read, PC: %04x Result:%02x\n", cpu_get_pc(&space.device()), data);
	47	//  logerror("protection read, PC: %04x Result:%02x\n", space.device().safe_pc(), data);
48	48	return data;
49	49	}
50	50

trunk/src/mame/drivers/esripsys.c

r17788	r17789
553	553	/* Not used in later revisions */
554	554	WRITE8_MEMBER(esripsys_state::control_w)
555	555	{
556		logerror("Sound control write: %.2x (PC:0x%.4x)\n", data, cpu_get_previouspc(&space.device()));
	556	logerror("Sound control write: %.2x (PC:0x%.4x)\n", data, space.device().safe_pcbase());
557	557	}
558	558
559	559

trunk/src/mame/drivers/jalmah.c

r17788	r17789
972	972	memcpy(&oki[0x20000], &oki[(m_oki_rom * 0x80000) + ((m_oki_bank+m_oki_za) * 0x20000) + 0x40000], 0x20000);
973	973	}
974	974
975		//popmessage("PC=%06x %02x %02x %02x %08x",cpu_get_pc(&space.device()),m_oki_rom,m_oki_za,m_oki_bank,(m_oki_rom * 0x80000) + ((m_oki_bank+m_oki_za) * 0x20000) + 0x40000);
	975	//popmessage("PC=%06x %02x %02x %02x %08x",space.device().safe_pc(),m_oki_rom,m_oki_za,m_oki_bank,(m_oki_rom * 0x80000) + ((m_oki_bank+m_oki_za) * 0x20000) + 0x40000);
976	976	}
977	977
978	978	WRITE16_MEMBER(jalmah_state::jalmah_okibank_w)
r17788	r17789
986	986	memcpy(&oki[0x20000], &oki[(m_oki_rom * 0x80000) + ((m_oki_bank+m_oki_za) * 0x20000) + 0x40000], 0x20000);
987	987	}
988	988
989		//popmessage("PC=%06x %02x %02x %02x %08x",cpu_get_pc(&space.device()),m_oki_rom,m_oki_za,m_oki_bank,(m_oki_rom * 0x80000) + ((m_oki_bank+m_oki_za) * 0x20000) + 0x40000);
	989	//popmessage("PC=%06x %02x %02x %02x %08x",space.device().safe_pc(),m_oki_rom,m_oki_za,m_oki_bank,(m_oki_rom * 0x80000) + ((m_oki_bank+m_oki_za) * 0x20000) + 0x40000);
990	990	}
991	991
992	992	WRITE16_MEMBER(jalmah_state::jalmah_flip_screen_w)
r17788	r17789
1761	1761	res = resp[m_respcount++];
1762	1762	if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
1763	1763
1764		//  logerror("%04x: mcu_r %02x\n",cpu_get_pc(&space.device()),res);
	1764	//  logerror("%04x: mcu_r %02x\n",space.device().safe_pc(),res);
1765	1765
1766	1766	return res;
1767	1767	}
r17788	r17789
1979	1979	res = resp[m_respcount++];
1980	1980	if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
1981	1981
1982		//  logerror("%04x: mcu_r %02x\n",cpu_get_pc(&space.device()),res);
	1982	//  logerror("%04x: mcu_r %02x\n",space.device().safe_pc(),res);
1983	1983
1984	1984	return res;
1985	1985	}
r17788	r17789
2258	2258	res = resp[m_respcount++];
2259	2259	if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
2260	2260
2261		//  logerror("%04x: mcu_r %02x\n",cpu_get_pc(&space.device()),res);
	2261	//  logerror("%04x: mcu_r %02x\n",space.device().safe_pc(),res);
2262	2262
2263	2263	return res;
2264	2264	}
r17788	r17789
2395	2395	res = resp[m_respcount++];
2396	2396	if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
2397	2397
2398		//  popmessage("%04x: mcu_r %02x",cpu_get_pc(&space.device()),res);
	2398	//  popmessage("%04x: mcu_r %02x",space.device().safe_pc(),res);
2399	2399
2400	2400	return res;
2401	2401	}
r17788	r17789
2416	2416	res = resp[m_respcount++];
2417	2417	if (m_respcount >= sizeof(resp)/sizeof(resp[0])) m_respcount = 0;
2418	2418
2419		//  popmessage("%04x: mcu_r %02x",cpu_get_pc(&space.device()),res);
	2419	//  popmessage("%04x: mcu_r %02x",space.device().safe_pc(),res);
2420	2420
2421	2421	return res;
2422	2422	}

trunk/src/mame/drivers/spoker.c

r17788	r17789
132	132
133	133	if ((data) & (0x22))
134	134	{
135		logerror("PC %06X: nmi_and_coins = %02x\n",cpu_get_pc(&space.device()),data);
	135	logerror("PC %06X: nmi_and_coins = %02x\n",space.device().safe_pc(),data);
136	136	//      popmessage("%02x",data);
137	137	}
138	138
r17788	r17789
193	193
194	194	default:
195	195	//          popmessage("magic %x <- %04x",igs_magic[0],data);
196		logerror("%06x: warning, writing to igs_magic %02x = %02x\n", cpu_get_pc(&space.device()), m_igs_magic[0], data);
	196	logerror("%06x: warning, writing to igs_magic %02x = %02x\n", space.device().safe_pc(), m_igs_magic[0], data);
197	197	}
198	198	}
199	199
r17788	r17789
208	208	if ( !(m_igs_magic[1] & 0x04) )   return ioport("DSW3")->read();
209	209	if ( !(m_igs_magic[1] & 0x08) )   return ioport("DSW4")->read();
210	210	if ( !(m_igs_magic[1] & 0x10) )   return ioport("DSW5")->read();
211		logerror("%06x: warning, reading dsw with igs_magic[1] = %02x\n", cpu_get_pc(&space.device()), m_igs_magic[1]);
	211	logerror("%06x: warning, reading dsw with igs_magic[1] = %02x\n", space.device().safe_pc(), m_igs_magic[1]);
212	212	break;
213	213
214	214	default:
215		logerror("%06x: warning, reading with igs_magic = %02x\n", cpu_get_pc(&space.device()), m_igs_magic[0]);
	215	logerror("%06x: warning, reading with igs_magic = %02x\n", space.device().safe_pc(), m_igs_magic[0]);
216	216	}
217	217
218	218	return 0;

trunk/src/mame/drivers/aeroboto.c

r17788	r17789
34	34	/* serie of values to be returned from 3004, and display "PASS 201" if it is */
35	35	static const UINT8 res[4] = { 0xff, 0x9f, 0x1b, 0x03 };
36	36
37		logerror("PC %04x: read 3004\n", cpu_get_pc(&space.device()));
	37	logerror("PC %04x: read 3004\n", space.device().safe_pc());
38	38	return res[(m_count++) & 3];
39	39	}
40	40

trunk/src/mame/drivers/konamigv.c

r17788	r17789
585	585	READ32_MEMBER(konamigv_state::btc_trackball_r)
586	586	{
587	587
588		//  mame_printf_debug( "r %08x %08x %08x\n", cpu_get_pc(&space.device()), offset, mem_mask );
	588	//  mame_printf_debug( "r %08x %08x %08x\n", space.device().safe_pc(), offset, mem_mask );
589	589
590	590	if( offset == 1 && mem_mask == 0xffff0000 )
591	591	{
r17788	r17789
608	608
609	609	WRITE32_MEMBER(konamigv_state::btc_trackball_w)
610	610	{
611		//  mame_printf_debug( "w %08x %08x %08x %08x\n", cpu_get_pc(&space.device()), offset, data, mem_mask );
	611	//  mame_printf_debug( "w %08x %08x %08x %08x\n", space.device().safe_pc(), offset, data, mem_mask );
612	612	}
613	613
614	614	DRIVER_INIT_MEMBER(konamigv_state,btchamp)

trunk/src/mame/drivers/firetrap.c

r17788	r17789
194	194	UINT8 coin = 0;
195	195	UINT8 port = ioport("IN2")->read() & 0x70;
196	196
197		if (cpu_get_pc(&space.device()) == 0x1188)
	197	if (space.device().safe_pc() == 0x1188)
198	198	return ~m_coin_command_pending;
199	199
200	200	if (port != 0x70)
r17788	r17789
214	214
215	215	READ8_MEMBER(firetrap_state::firetrap_8751_r)
216	216	{
217		//logerror("PC:%04x read from 8751\n",cpu_get_pc(&space.device()));
	217	//logerror("PC:%04x read from 8751\n",space.device().safe_pc());
218	218	return m_i8751_return;
219	219	}
220	220
r17788	r17789
293	293	else
294	294	{
295	295	m_i8751_return = 0xff;
296		logerror("%04x: Unknown i8751 command %02x!\n",cpu_get_pc(&space.device()),data);
	296	logerror("%04x: Unknown i8751 command %02x!\n",space.device().safe_pc(),data);
297	297	}
298	298
299	299	/* Signal main cpu task is complete */

trunk/src/mame/drivers/thedeep.c

r17788	r17789
125	125	break;
126	126
127	127	default:
128		logerror( "pc %04x: protection_command %02x\n", cpu_get_pc(&space.device()),m_protection_command);
	128	logerror( "pc %04x: protection_command %02x\n", space.device().safe_pc(),m_protection_command);
129	129	}
130	130	}
131	131
r17788	r17789
143	143	WRITE8_MEMBER(thedeep_state::thedeep_e100_w)
144	144	{
145	145	if (data != 1)
146		logerror("pc %04x: e100 = %02x\n", cpu_get_pc(&space.device()),data);
	146	logerror("pc %04x: e100 = %02x\n", space.device().safe_pc(),data);
147	147	}
148	148
149	149	static ADDRESS_MAP_START( main_map, AS_PROGRAM, 8, thedeep_state )

trunk/src/mame/drivers/ksys573.c

r17788	r17789
873	873	break;
874	874	}
875	875
876		//      mame_printf_debug("ATAPI: read reg %d = %x (PC=%x)\n", reg, data, cpu_get_pc(&space.device()));
	876	//      mame_printf_debug("ATAPI: read reg %d = %x (PC=%x)\n", reg, data, space.device().safe_pc());
877	877
878	878	data <<= shift;
879	879	}
r17788	r17789
1031	1031	}
1032	1032
1033	1033	atapi_regs[reg] = data;
1034		//      mame_printf_debug("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, cpu_get_pc(&space.device()));
	1034	//      mame_printf_debug("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, space.device().safe_pc());
1035	1035
1036	1036	if (reg == ATAPI_REG_CMDSTATUS)
1037	1037	{
1038		//          mame_printf_debug("ATAPI command %x issued! (PC=%x)\n", data, cpu_get_pc(&space.device()));
	1038	//          mame_printf_debug("ATAPI command %x issued! (PC=%x)\n", data, space.device().safe_pc());
1039	1039
1040	1040	switch (data)
1041	1041	{
r17788	r17789
1246	1246
1247	1247	if( m_flash_bank < 0 )
1248	1248	{
1249		mame_printf_debug( "%08x: flash_r( %08x, %08x ) no bank selected %08x\n", cpu_get_pc(&space.device()), offset, mem_mask, m_control );
	1249	mame_printf_debug( "%08x: flash_r( %08x, %08x ) no bank selected %08x\n", space.device().safe_pc(), offset, mem_mask, m_control );
1250	1250	data = 0xffffffff;
1251	1251	}
1252	1252	else
r17788	r17789
1284	1284
1285	1285	if( m_flash_bank < 0 )
1286	1286	{
1287		mame_printf_debug( "%08x: flash_w( %08x, %08x, %08x ) no bank selected %08x\n", cpu_get_pc(&space.device()), offset, mem_mask, data, m_control );
	1287	mame_printf_debug( "%08x: flash_w( %08x, %08x, %08x ) no bank selected %08x\n", space.device().safe_pc(), offset, mem_mask, data, m_control );
1288	1288	}
1289	1289	else
1290	1290	{
r17788	r17789
2013	2013	}
2014	2014
2015	2015	verboselog( machine(), 2, "gx894pwbba_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
2016		//  printf( "%08x: gx894pwbba_r( %08x, %08x ) %08x\n", cpu_get_pc(&space.device()), offset, mem_mask, data );
	2016	//  printf( "%08x: gx894pwbba_r( %08x, %08x ) %08x\n", space.device().safe_pc(), offset, mem_mask, data );
2017	2017	return data;
2018	2018	}
2019	2019

trunk/src/mame/drivers/mcr68.c

r17788	r17789
228	228	m_protection_data[3] = m_protection_data[4];
229	229	m_protection_data[4] = data & 0xff;
230	230
231		logerror("%06X:protection_w=%02X\n", cpu_get_previouspc(&space.device()), data & 0xff);
	231	logerror("%06X:protection_w=%02X\n", space.device().safe_pcbase(), data & 0xff);
232	232	}
233	233	}
234	234

trunk/src/mame/drivers/pbaction.c

r17788	r17789
472	472	{
473	473
474	474	/* on startup, the game expect this location to NOT act as RAM */
475		if (cpu_get_pc(&space.device()) == 0xab80)
	475	if (space.device().safe_pc() == 0xab80)
476	476	return 0;
477	477
478	478	return m_work_ram[0];

trunk/src/mame/drivers/overdriv.c

r17788	r17789
64	64
65	65	WRITE16_MEMBER(overdriv_state::eeprom_w)
66	66	{
67		//logerror("%06x: write %04x to eeprom_w\n",cpu_get_pc(&space.device()),data);
	67	//logerror("%06x: write %04x to eeprom_w\n",space.device().safe_pc(),data);
68	68	if (ACCESSING_BITS_0_7)
69	69	{
70	70	/* bit 0 is data */
r17788	r17789
109	109	coin_counter_w(machine(), 0, data & 0x10);
110	110	coin_counter_w(machine(), 1, data & 0x20);
111	111
112		//logerror("%06x: write %04x to cpuA_ctrl_w\n",cpu_get_pc(&space.device()),data);
	112	//logerror("%06x: write %04x to cpuA_ctrl_w\n",space.device().safe_pc(),data);
113	113	}
114	114	}
115	115

trunk/src/mame/drivers/gsword.c

r17788	r17789
197	197	case 0x04: /* Player 2 Controller */
198	198	return space->machine().root_device().ioport("IN3")->read();
199	199	//  default:
200		//      logerror("8741-2 unknown read %d PC=%04x\n",offset,cpu_get_pc(&space->device()));
	200	//      logerror("8741-2 unknown read %d PC=%04x\n",offset,space->device().safe_pc());
201	201	}
202	202	/* unknown */
203	203	return 0;
r17788	r17789
215	215	return space->machine().root_device().ioport("IN3")->read();
216	216	}
217	217	/* unknown */
218		//  logerror("8741-3 unknown read %d PC=%04x\n",offset,cpu_get_pc(&space->device()));
	218	//  logerror("8741-3 unknown read %d PC=%04x\n",offset,space->device().safe_pc());
219	219	return 0;
220	220	}
221	221

trunk/src/mame/drivers/xmen.c

r17788	r17789
44	44	WRITE16_MEMBER(xmen_state::eeprom_w)
45	45	{
46	46
47		logerror("%06x: write %04x to 108000\n",cpu_get_pc(&space.device()),data);
	47	logerror("%06x: write %04x to 108000\n",space.device().safe_pc(),data);
48	48	if (ACCESSING_BITS_0_7)
49	49	{
50	50	/* bit 0 = coin counter */

trunk/src/mame/drivers/lethal.c

r17788	r17789
397	397	break;
398	398
399	399	default:
400		logerror("Unknown LE 48xx register write: %x to %x (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
	400	logerror("Unknown LE 48xx register write: %x to %x (PC=%x)\n", data, offset, space.device().safe_pc());
401	401	break;
402	402	}
403	403	}

trunk/src/mame/drivers/2mindril.c

r17788	r17789
69	69
70	70
71	71	//  if (offset * 2 == 0x4)
72		/*popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x", cpu_get_pc(&space.device()), m_iodata[0/2], m_iodata[2/2], m_iodata[4/2], m_iodata[6/2],
	72	/*popmessage("PC=%08x %04x %04x %04x %04x %04x %04x %04x %04x", space.device().safe_pc(), m_iodata[0/2], m_iodata[2/2], m_iodata[4/2], m_iodata[6/2],
73	73	m_iodata[8/2], m_iodata[0xa/2], m_iodata[0xc/2], m_iodata[0xe/2]);*/
74	74
75	75	switch(offset)
r17788	r17789
78	78	case 0x2/2:
79	79	{
80	80	int arm_pwr = ioport("IN0")->read();//throw
81		//popmessage("PC=%08x %02x",cpu_get_pc(&space.device()),arm_pwr);
	81	//popmessage("PC=%08x %02x",space.device().safe_pc(),arm_pwr);
82	82
83	83	if(arm_pwr > 0xe0) return ~0x1800;
84	84	if(arm_pwr > 0xc0) return ~0x1400;
r17788	r17789
88	88	}
89	89	case 0x4/2: return (m_defender_sensor) | (m_shutter_sensor);
90	90	case 0xe/2: return ioport("IN2")->read();//coins
91		//      default:  printf("PC=%08x [%04x] -> %04x R\n", cpu_get_pc(&space.device()), offset * 2, m_iodata[offset]);
	91	//      default:  printf("PC=%08x [%04x] -> %04x R\n", space.device().safe_pc(), offset * 2, m_iodata[offset]);
92	92	}
93	93
94	94	return 0xffff;
r17788	r17789
110	110	}
111	111
112	112	//  if(data != 0 && offset != 8)
113		//  printf("PC=%08x [%04x] <- %04x W\n", cpu_get_pc(&space.device()), offset * 2, data);
	113	//  printf("PC=%08x [%04x] <- %04x W\n", space.device().safe_pc(), offset * 2, data);
114	114	}
115	115
116	116	/*

trunk/src/mame/drivers/naughtyb.c

r17788	r17789
156	156	return seed00[m_prot_count] | seedxx;
157	157
158	158	#if 0
159		if ( cpu_get_pc(&space.device()) == (0x26F2 + 0x03) )
	159	if ( space.device().safe_pc() == (0x26F2 + 0x03) )
160	160	{
161	161	popflame_prot_count = 0;
162	162	return 0x01;
163	163	} /* Must not carry when rotated left */
164	164
165		if ( cpu_get_pc(&space.device()) == (0x26F9 + 0x03) )
	165	if ( space.device().safe_pc() == (0x26F9 + 0x03) )
166	166	return 0x80; /* Must carry when rotated left */
167	167
168		if ( cpu_get_pc(&space.device()) == (0x270F + 0x03) )
	168	if ( space.device().safe_pc() == (0x270F + 0x03) )
169	169	{
170	170	switch( popflame_prot_count++ )
171	171	{
r17788	r17789
175	175	case 3: return 0x38; /* x011 1xxx, matches 0x07 at $2693, stored in $400D */
176	176	}
177	177	}
178		logerror("CPU #0 PC %06x: unmapped protection read\n", cpu_get_pc(&space.device()));
	178	logerror("CPU #0 PC %06x: unmapped protection read\n", space.device().safe_pc());
179	179	return 0x00;
180	180	#endif
181	181	}

trunk/src/mame/drivers/taito_z.c

r17788	r17789
988	988
989	989	WRITE16_MEMBER(taitoz_state::cpua_ctrl_w)
990	990	{
991		//logerror("CPU #0 PC %06x: write %04x to cpu control\n", cpu_get_pc(&space.device()), data);
	991	//logerror("CPU #0 PC %06x: write %04x to cpu control\n", space.device().safe_pc(), data);
992	992
993	993	if (mem_mask == 0xff00) data >>= 8;
994	994	data &= 0xff;
r17788	r17789
1194	1194	return ioport("Y_ADJUST")->read();
1195	1195	}
1196	1196
1197		logerror("CPU #0 PC %06x: warning - read unmapped stick offset %06x\n", cpu_get_pc(&space.device()), offset);
	1197	logerror("CPU #0 PC %06x: warning - read unmapped stick offset %06x\n", space.device().safe_pc(), offset);
1198	1198
1199	1199	return 0xff;
1200	1200	}
r17788	r17789
1217	1217	return ioport("Y_ADJUST")->read();
1218	1218	}
1219	1219
1220		logerror("CPU #0 PC %06x: warning - read unmapped stick offset %06x\n", cpu_get_pc(&space.device()), offset);
	1220	logerror("CPU #0 PC %06x: warning - read unmapped stick offset %06x\n", space.device().safe_pc(), offset);
1221	1221
1222	1222	return 0xff;
1223	1223	}
r17788	r17789
1247	1247	return (steer & 0xff00) >> 8;
1248	1248	}
1249	1249
1250		logerror("CPU #0 PC %06x: warning - read unmapped steer input offset %06x\n", cpu_get_pc(&space.device()), offset);
	1250	logerror("CPU #0 PC %06x: warning - read unmapped steer input offset %06x\n", space.device().safe_pc(), offset);
1251	1251
1252	1252	return 0xff;
1253	1253	}
r17788	r17789
1318	1318	return steer & 0xff;
1319	1319	}
1320	1320
1321		logerror("CPU #0 PC %06x: warning - read unmapped steer input offset %02x\n", cpu_get_pc(&space.device()), offset);
	1321	logerror("CPU #0 PC %06x: warning - read unmapped steer input offset %02x\n", space.device().safe_pc(), offset);
1322	1322
1323	1323	return 0x00;
1324	1324	}
r17788	r17789
1335	1335	return 0x55;   /* motor cpu status ? */
1336	1336
1337	1337	default:
1338		logerror("CPU #0 PC %06x: warning - read motor cpu %03x\n",cpu_get_pc(&space.device()),offset);
	1338	logerror("CPU #0 PC %06x: warning - read motor cpu %03x\n",space.device().safe_pc(),offset);
1339	1339	return 0;
1340	1340	}
1341	1341	}
r17788	r17789
1353	1353	break;
1354	1354	}
1355	1355
1356		logerror("CPU #0 PC %06x: warning - write %04x to motor cpu %03x\n",cpu_get_pc(&space.device()),data,offset);
	1356	logerror("CPU #0 PC %06x: warning - write %04x to motor cpu %03x\n",space.device().safe_pc(),data,offset);
1357	1357	}
1358	1358
1359	1359

trunk/src/mame/drivers/gunbustr.c

r17788	r17789
117	117	coin_counter_w(machine(), 1, data & 0x04000000);
118	118	m_coin_word = (data >> 16) &0xffff;
119	119	}
120		//logerror("CPU #0 PC %06x: write input %06x\n",cpu_get_pc(&device()),offset);
	120	//logerror("CPU #0 PC %06x: write input %06x\n",device->safe_pc(),offset);
121	121	break;
122	122	}
123	123	}
r17788	r17789
434	434
435	435	READ32_MEMBER(gunbustr_state::main_cycle_r)
436	436	{
437		if (cpu_get_pc(&space.device())==0x55a && (m_ram[0x3acc/4]&0xff000000)==0)
	437	if (space.device().safe_pc()==0x55a && (m_ram[0x3acc/4]&0xff000000)==0)
438	438	device_spin_until_interrupt(&space.device());
439	439
440	440	return m_ram[0x3acc/4];

trunk/src/mame/drivers/msisaac.c

r17788	r17789
145	145	return 0x45;
146	146
147	147	default:
148		logerror("CPU#0 read from MCU pc=%4x, mcu_val=%2x\n", cpu_get_pc(&space.device()), m_mcu_val);
	148	logerror("CPU#0 read from MCU pc=%4x, mcu_val=%2x\n", space.device().safe_pc(), m_mcu_val);
149	149	return m_mcu_val;
150	150	}
151	151	#endif
r17788	r17789
166	166	buggychl_mcu_w(offset,data);
167	167	#else
168	168	//if(data != 0x0a && data != 0x42 && data != 0x02)
169		//  popmessage("PC = %04x %02x", cpu_get_pc(&space.device()), data);
	169	//  popmessage("PC = %04x %02x", space.device().safe_pc(), data);
170	170	m_mcu_val = data;
171	171	#endif
172	172	}

trunk/src/mame/drivers/pntnpuzl.c

r17788	r17789
231	231
232	232	WRITE16_MEMBER(pntnpuzl_state::pntnpuzl_280018_w)
233	233	{
234		// logerror("%04x: 280018: %04x\n",cpu_get_pc(&space.device()),data);
	234	// logerror("%04x: 280018: %04x\n",space.device().safe_pc(),data);
235	235	m_serial >>= 1;
236	236	if (data & 0x2000)
237	237	m_serial |= 0x400;

trunk/src/mame/drivers/gradius3.c

r17788	r17789
41	41	/* is this a bug in the game or something else? */
42	42	if (!ACCESSING_BITS_0_7)
43	43	k052109_w(m_k052109, offset, (data >> 8) & 0xff);
44		//      logerror("%06x half %04x = %04x\n",cpu_get_pc(&space.device()),offset,data);
	44	//      logerror("%06x half %04x = %04x\n",space.device().safe_pc(),offset,data);
45	45	}
46	46
47	47	READ16_MEMBER(gradius3_state::k051937_halfword_r)
r17788	r17789
88	88	m_irqAen = data & 0x20;
89	89
90	90	/* other bits unknown */
91		//logerror("%06x: write %04x to c0000\n",cpu_get_pc(&space.device()),data);
	91	//logerror("%06x: write %04x to c0000\n",space.device().safe_pc(),data);
92	92	}
93	93	}
94	94
r17788	r17789
124	124
125	125	if (m_irqBmask & 4)
126	126	{
127		logerror("%04x trigger cpu B irq 4 %02x\n",cpu_get_pc(&space.device()),data);
	127	logerror("%04x trigger cpu B irq 4 %02x\n",space.device().safe_pc(),data);
128	128	device_set_input_line(m_subcpu, 4, HOLD_LINE);
129	129	}
130	130	else
131		logerror("%04x MISSED cpu B irq 4 %02x\n",cpu_get_pc(&space.device()),data);
	131	logerror("%04x MISSED cpu B irq 4 %02x\n",space.device().safe_pc(),data);
132	132	}
133	133
134	134	WRITE16_MEMBER(gradius3_state::sound_command_w)

trunk/src/mame/drivers/mystwarr.c

r17788	r17789
235	235	{
236	236	if (offset & 0x0078)
237	237	{
238		//      mame_printf_debug("spr write %x to %x (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
	238	//      mame_printf_debug("spr write %x to %x (PC=%x)\n", data, offset, space.device().safe_pc());
239	239	COMBINE_DATA(m_spriteram+offset);
240	240	}
241	241	else

trunk/src/mame/drivers/ssfindo.c

r17788	r17789
354	354
355	355	static void ssfindo_speedups(address_space* space)
356	356	{
357		if (cpu_get_pc(&space->device())==0x2d6c8) // ssfindo
	357	if (space->device().safe_pc()==0x2d6c8) // ssfindo
358	358	device_spin_until_time(&space->device(), attotime::from_usec(20));
359		else if (cpu_get_pc(&space->device())==0x2d6bc) // ssfindo
	359	else if (space->device().safe_pc()==0x2d6bc) // ssfindo
360	360	device_spin_until_time(&space->device(), attotime::from_usec(20));
361	361	}
362	362
363	363	static void ppcar_speedups(address_space* space)
364	364	{
365		if (cpu_get_pc(&space->device())==0x000bc8) // ppcar
	365	if (space->device().safe_pc()==0x000bc8) // ppcar
366	366	device_spin_until_time(&space->device(), attotime::from_usec(20));
367		else if (cpu_get_pc(&space->device())==0x000bbc) // ppcar
	367	else if (space->device().safe_pc()==0x000bbc) // ppcar
368	368	device_spin_until_time(&space->device(), attotime::from_usec(20));
369	369	}
370	370
r17788	r17789
378	378
379	379	case IOLINES: //TODO: eeprom  24c01
380	380	#if 0
381		mame_printf_debug("IOLINESR %i @%x\n", offset, cpu_get_pc(&space.device()));
	381	mame_printf_debug("IOLINESR %i @%x\n", offset, space.device().safe_pc());
382	382	#endif
383	383
384	384	if(m_flashType == 1)
r17788	r17789
434	434	if(data&0xc0)
435	435	m_adrLatch=0;
436	436
437		if(cpu_get_pc(&space.device()) == 0xbac0 && m_flashType == 1)
	437	if(space.device().safe_pc() == 0xbac0 && m_flashType == 1)
438	438	{
439	439	m_flashN=data&1;
440	440	}
441	441
442	442	#if 0
443		logerror("IOLINESW %i = %x  @%x\n",offset,data,cpu_get_pc(&space.device()));
	443	logerror("IOLINESW %i = %x  @%x\n",offset,data,space.device().safe_pc());
444	444	#endif
445	445	break;
446	446
r17788	r17789
520	520	COMBINE_DATA(&temp);
521	521
522	522	#if 0
523		logerror("[io_w] = %x @%x [latch=%x]\n",data,cpu_get_pc(&space.device()),m_adrLatch);
	523	logerror("[io_w] = %x @%x [latch=%x]\n",data,space.device().safe_pc(),m_adrLatch);
524	524	#endif
525	525
526	526	if(m_adrLatch==1)

trunk/src/mame/drivers/segas24.c

r17788	r17789
669	669
670	670	READ16_MEMBER( segas24_state::iod_r )
671	671	{
672		logerror("IO daughterboard read %02x (%x)\n", offset, cpu_get_pc(&space.device()));
	672	logerror("IO daughterboard read %02x (%x)\n", offset, space.device().safe_pc());
673	673	return 0xffff;
674	674	}
675	675
676	676	WRITE16_MEMBER( segas24_state::iod_w )
677	677	{
678		logerror("IO daughterboard write %02x, %04x & %04x (%x)\n", offset, data, mem_mask, cpu_get_pc(&space.device()));
	678	logerror("IO daughterboard write %02x, %04x & %04x (%x)\n", offset, data, mem_mask, space.device().safe_pc());
679	679	}
680	680
681	681
r17788	r17789
783	783	int i;
784	784	UINT8 mxor = 0;
785	785	if(!mlatch_table) {
786		logerror("Protection: magic latch accessed but no table loaded (%s:%x)\n", space.device().tag(), cpu_get_pc(&space.device()));
	786	logerror("Protection: magic latch accessed but no table loaded (%s:%x)\n", space.device().tag(), space.device().safe_pc());
787	787	return;
788	788	}
789	789
r17788	r17789
794	794	if(mlatch & (1<<i))
795	795	mxor |= 1 << mlatch_table[i];
796	796	mlatch = data ^ mxor;
797		logerror("Magic latching %02x ^ %02x as %02x (%s:%x)\n", data & 0xff, mxor, mlatch, space.device().tag(), cpu_get_pc(&space.device()));
	797	logerror("Magic latching %02x ^ %02x as %02x (%s:%x)\n", data & 0xff, mxor, mlatch, space.device().tag(), space.device().safe_pc());
798	798	} else {
799		logerror("Magic latch reset (%s:%x)\n", space.device().tag(), cpu_get_pc(&space.device()));
	799	logerror("Magic latch reset (%s:%x)\n", space.device().tag(), space.device().safe_pc());
800	800	mlatch = 0x00;
801	801	}
802	802	}
r17788	r17789
1031	1031
1032	1032	READ16_MEMBER ( segas24_state::sys16_io_r )
1033	1033	{
1034		//  logerror("IO read %02x (%s:%x)\n", offset, space->device().tag(), cpu_get_pc(&space->device()));
	1034	//  logerror("IO read %02x (%s:%x)\n", offset, space->device().tag(), space->device().safe_pc());
1035	1035	if(offset < 8)
1036	1036	return (this->*io_r)(offset);
1037	1037	else if (offset < 0x20) {
r17788	r17789
1049	1049	case 0xf:
1050	1050	return io_dir;
1051	1051	default:
1052		logerror("IO control read %02x (%s:%x)\n", offset, space.device().tag(), cpu_get_pc(&space.device()));
	1052	logerror("IO control read %02x (%s:%x)\n", offset, space.device().tag(), space.device().safe_pc());
1053	1053	return 0xff;
1054	1054	}
1055	1055	} else
r17788	r17789
1061	1061	if(ACCESSING_BITS_0_7) {
1062	1062	if(offset < 8) {
1063	1063	if(!(io_dir & (1 << offset))) {
1064		logerror("IO port write on input-only port (%d, [%02x], %02x, %s:%x)\n", offset, io_dir, data & 0xff, space.device().tag(), cpu_get_pc(&space.device()));
	1064	logerror("IO port write on input-only port (%d, [%02x], %02x, %s:%x)\n", offset, io_dir, data & 0xff, space.device().tag(), space.device().safe_pc());
1065	1065	return;
1066	1066	}
1067	1067	(this->*io_w)(offset, data);
r17788	r17789
1075	1075	io_dir = data;
1076	1076	break;
1077	1077	default:
1078		logerror("IO control write %02x, %02x (%s:%x)\n", offset, data & 0xff, space.device().tag(), cpu_get_pc(&space.device()));
	1078	logerror("IO control write %02x, %02x (%s:%x)\n", offset, data & 0xff, space.device().tag(), space.device().safe_pc());
1079	1079	}
1080	1080	}
1081	1081	}

trunk/src/mame/drivers/konamigx.c

r17788	r17789
482	482	*/
483	483
484	484	konamigx_wrport1_1 = (data>>16)&0xff;
485		//      logerror("write %x to IRQ register (PC=%x)\n", konamigx_wrport1_1, cpu_get_pc(&space.device()));
	485	//      logerror("write %x to IRQ register (PC=%x)\n", konamigx_wrport1_1, space.device().safe_pc());
486	486
487	487	// gx_syncen is to ensure each IRQ is trigger at least once after being enabled
488	488	if (konamigx_wrport1_1 & 0x80) gx_syncen |= konamigx_wrport1_1 & 0x1f;
r17788	r17789
546	546	{
547	547	UINT32 data = gx_workram[waitskip.offs+offset];
548	548
549		if (cpu_get_pc(&space.device()) == waitskip.pc && (data & mem_mask) == (waitskip.data & mem_mask))
	549	if (space.device().safe_pc() == waitskip.pc && (data & mem_mask) == (waitskip.data & mem_mask))
550	550	{
551	551	device_spin_until_trigger(&space.device(), resume_trigger);
552	552	suspension_active = 1;
r17788	r17789
730	730	rv |= LSW<<8;
731	731	}
732	732
733		//  mame_printf_debug("Read 68k @ %x (PC=%x)\n", reg, cpu_get_pc(&space.device()));
	733	//  mame_printf_debug("Read 68k @ %x (PC=%x)\n", reg, space.device().safe_pc());
734	734
735	735	// we clearly have some problem because some games require these hacks
736	736	// perhaps 68000/68020 timing is skewed?
r17788	r17789
740	740	if (reg == 0) rv |= 0xff00;
741	741	break;
742	742	case 2: // Winning Spike
743		if (cpu_get_pc(&space.device()) == 0x2026fe) rv = 0xc0c0c0c0;
	743	if (space.device().safe_pc() == 0x2026fe) rv = 0xc0c0c0c0;
744	744	break;
745	745	case 3: // Run'n Gun 2
746		if (cpu_get_pc(&space.device()) == 0x24f0b6) rv = 0xffffffff;
747		if (cpu_get_pc(&space.device()) == 0x24f122) rv = 0xc0c0c0c0;
	746	if (space.device().safe_pc() == 0x24f0b6) rv = 0xffffffff;
	747	if (space.device().safe_pc() == 0x24f122) rv = 0xc0c0c0c0;
748	748	break;
749	749	case 4:   // Rushing Heroes
750		if (cpu_get_pc(&space.device()) == 0x20eda6) rv = 0xc0c0c0c0;
	750	if (space.device().safe_pc() == 0x20eda6) rv = 0xc0c0c0c0;
751	751	break;
752	752	case 5:   // Vs. Net Soccer ver. UAB
753		if (cpu_get_pc(&space.device()) == 0x24c5d2) rv = 0xffffffff;
754		if (cpu_get_pc(&space.device()) == 0x24c63e) rv = 0xc0c0c0c0;
	753	if (space.device().safe_pc() == 0x24c5d2) rv = 0xffffffff;
	754	if (space.device().safe_pc() == 0x24c63e) rv = 0xc0c0c0c0;
755	755	break;
756	756	case 6: // Slam Dunk 2
757		if (cpu_get_pc(&space.device()) == 0x24f1b0) rv = 0xffffffff;
758		if (cpu_get_pc(&space.device()) == 0x24f21c) rv = 0xc0c0c0c0;
	757	if (space.device().safe_pc() == 0x24f1b0) rv = 0xffffffff;
	758	if (space.device().safe_pc() == 0x24f21c) rv = 0xc0c0c0c0;
759	759	break;
760	760	case 7:   // Vs. Net Soccer ver. AAA
761		if (cpu_get_pc(&space.device()) == 0x24c6b6) rv = 0xffffffff;
762		if (cpu_get_pc(&space.device()) == 0x24c722) rv = 0xc0c0c0c0;
	761	if (space.device().safe_pc() == 0x24c6b6) rv = 0xffffffff;
	762	if (space.device().safe_pc() == 0x24c722) rv = 0xc0c0c0c0;
763	763	break;
764	764	case 8:   // Vs. Net Soccer ver. EAD
765		if (cpu_get_pc(&space.device()) == 0x24c416) rv = 0xffffffff;
766		if (cpu_get_pc(&space.device()) == 0x24c482) rv = 0xc0c0c0c0;
	765	if (space.device().safe_pc() == 0x24c416) rv = 0xffffffff;
	766	if (space.device().safe_pc() == 0x24c482) rv = 0xc0c0c0c0;
767	767	break;
768	768	case 9:   // Vs. Net Soccer ver. EAB
769		if (cpu_get_pc(&space.device()) == 0x24c400) rv = 0xffffffff;
770		if (cpu_get_pc(&space.device()) == 0x24c46c) rv = 0xc0c0c0c0;
	769	if (space.device().safe_pc() == 0x24c400) rv = 0xffffffff;
	770	if (space.device().safe_pc() == 0x24c46c) rv = 0xc0c0c0c0;
771	771	break;
772	772	case 10: // Vs. Net Soccer ver. JAB
773		if (cpu_get_pc(&space.device()) == 0x24c584) rv = 0xffffffff;
774		if (cpu_get_pc(&space.device()) == 0x24c5f0) rv = 0xc0c0c0c0;
	773	if (space.device().safe_pc() == 0x24c584) rv = 0xffffffff;
	774	if (space.device().safe_pc() == 0x24c5f0) rv = 0xc0c0c0c0;
775	775	break;
776	776	case 11: // Racin' Force
777	777	if (reg == 0)
778	778	{
779		if (cpu_get_pc(&space.device()) == 0x0202190)
	779	if (space.device().safe_pc() == 0x0202190)
780	780	rv |= 0x4000;
781	781	}
782	782	break;
r17788	r17789
784	784	case 12: // Open Golf / Golfing Greats 2
785	785	if (reg == 0)
786	786	{
787		if ((cpu_get_pc(&space.device()) == 0x0245e80) || (cpu_get_pc(&space.device()) == 0x02459d6) || (cpu_get_pc(&space.device()) == 0x0245e40) )
	787	if ((space.device().safe_pc() == 0x0245e80) || (space.device().safe_pc() == 0x02459d6) || (space.device().safe_pc() == 0x0245e40) )
788	788	rv |= 0x4000;
789	789	}
790	790	break;
791	791	case 13: // Soccer Superstars
792		//if(cpu_get_pc(&space.device()) != 0x236dce && cpu_get_pc(&space.device()) != 0x236d8a && cpu_get_pc(&space.device()) != 0x236d8a)
793		//  printf("Read 68k @ %x (PC=%x)\n", reg, cpu_get_pc(&space.device()));
794		if (cpu_get_pc(&space.device()) == 0x0236e04)  rv = 0xffffffff;
795		if (cpu_get_pc(&space.device()) == 0x0236e12)  rv = 0xffffffff;
	792	//if(space.device().safe_pc() != 0x236dce && space.device().safe_pc() != 0x236d8a && space.device().safe_pc() != 0x236d8a)
	793	//  printf("Read 68k @ %x (PC=%x)\n", reg, space.device().safe_pc());
	794	if (space.device().safe_pc() == 0x0236e04)  rv = 0xffffffff;
	795	if (space.device().safe_pc() == 0x0236e12)  rv = 0xffffffff;
796	796	break;
797	797	case 14: // Soccer Superstars ver. JAC
798		//if(cpu_get_pc(&space.device()) != 0x2367b4)
799		//  printf("Read 68k @ %x (PC=%x)\n", reg, cpu_get_pc(&space.device()));
800		if (cpu_get_pc(&space.device()) == 0x02367ea)  rv = 0xffffffff;
801		if (cpu_get_pc(&space.device()) == 0x02367f8)  rv = 0xffffffff;
	798	//if(space.device().safe_pc() != 0x2367b4)
	799	//  printf("Read 68k @ %x (PC=%x)\n", reg, space.device().safe_pc());
	800	if (space.device().safe_pc() == 0x02367ea)  rv = 0xffffffff;
	801	if (space.device().safe_pc() == 0x02367f8)  rv = 0xffffffff;
802	802	break;
803	803	case 15: // Soccer Superstars ver. JAA
804		//if(cpu_get_pc(&space.device()) != 0x23670a)
805		//  printf("Read 68k @ %x (PC=%x)\n", reg, cpu_get_pc(&space.device()));
806		if (cpu_get_pc(&space.device()) == 0x0236740)  rv = 0xffffffff;
807		if (cpu_get_pc(&space.device()) == 0x023674e)  rv = 0xffffffff;
	804	//if(space.device().safe_pc() != 0x23670a)
	805	//  printf("Read 68k @ %x (PC=%x)\n", reg, space.device().safe_pc());
	806	if (space.device().safe_pc() == 0x0236740)  rv = 0xffffffff;
	807	if (space.device().safe_pc() == 0x023674e)  rv = 0xffffffff;
808	808	break;
809	809	case 16: // Dragoon Might ver. JAA
810	810	{
811	811	UINT32 cur_pc;
812	812
813		cur_pc = cpu_get_pc(&space.device());
	813	cur_pc = space.device().safe_pc();
814	814
815	815	switch(cur_pc)
816	816	{
r17788	r17789
1114	1114	else if(last_prot_op == 0x515) // vsnetscr screen 1
1115	1115	{
1116	1116	int adr;
1117		//printf("GXT4: command %x %d (PC=%x)\n", last_prot_op, cc++, cpu_get_pc(&space.device()));
	1117	//printf("GXT4: command %x %d (PC=%x)\n", last_prot_op, cc++, space.device().safe_pc());
1118	1118	for (adr = 0; adr < 0x400; adr += 2)
1119	1119	space.write_word(0xc01c00+adr, space.read_word(0xc01800+adr));
1120	1120	}
1121	1121	else if(last_prot_op == 0x115d) // vsnetscr screen 2
1122	1122	{
1123	1123	int adr;
1124		//printf("GXT4: command %x %d (PC=%x)\n", last_prot_op, cc++, cpu_get_pc(&space.device()));
	1124	//printf("GXT4: command %x %d (PC=%x)\n", last_prot_op, cc++, space.device().safe_pc());
1125	1125	for (adr = 0; adr < 0x400; adr += 2)
1126	1126	space.write_word(0xc18c00+adr, space.read_word(0xc18800+adr));
1127	1127	}
1128	1128	else
1129	1129	{
1130		printf("GXT4: unknown protection command %x (PC=%x)\n", last_prot_op, cpu_get_pc(&space.device()));
	1130	printf("GXT4: unknown protection command %x (PC=%x)\n", last_prot_op, space.device().safe_pc());
1131	1131	}
1132	1132
1133	1133	if (konamigx_wrport1_1 & 0x10)

trunk/src/mame/drivers/dorachan.c

r17788	r17789
46	46	{
47	47	UINT8 ret = 0;
48	48
49		switch (cpu_get_previouspc(m_main_cpu))
	49	switch (m_main_cpu->safe_pcbase())
50	50	{
51	51	case 0x70ce: ret = 0xf2; break;
52	52	case 0x72a2: ret = 0xd5; break;
53	53	case 0x72b5: ret = 0xcb; break;
54	54
55	55	default:
56		mame_printf_debug("unhandled $2400 read @ %x\n", cpu_get_previouspc(m_main_cpu));
	56	mame_printf_debug("unhandled $2400 read @ %x\n", m_main_cpu->safe_pcbase());
57	57	break;
58	58	}
59	59

trunk/src/mame/drivers/parodius.c

r17788	r17789
76	76	{
77	77
78	78	if (m_videobank & 0xf8)
79		logerror("%04x: videobank = %02x\n",cpu_get_pc(&space.device()),data);
	79	logerror("%04x: videobank = %02x\n",space.device().safe_pc(),data);
80	80
81	81	/* bit 0 = select palette or work RAM at 0000-07ff */
82	82	/* bit 1 = select 052109 or 053245 at 2000-27ff */
r17788	r17789
88	88	{
89	89
90	90	if ((data & 0xf4) != 0x10)
91		logerror("%04x: 3fc0 = %02x\n",cpu_get_pc(&space.device()),data);
	91	logerror("%04x: 3fc0 = %02x\n",space.device().safe_pc(),data);
92	92
93	93	/* bit 0/1 = coin counters */
94	94	coin_counter_w(machine(), 0, data & 0x01);
r17788	r17789
427	427	static KONAMI_SETLINES_CALLBACK( parodius_banking )
428	428	{
429	429	if (lines & 0xf0)
430		logerror("%04x: setlines %02x\n", cpu_get_pc(device), lines);
	430	logerror("%04x: setlines %02x\n", device->safe_pc(), lines);
431	431
432	432	device->machine().root_device().membank("bank1")->set_entry((lines & 0x0f) ^ 0x0f);
433	433	}

trunk/src/mame/drivers/quizpun2.c

r17788	r17789
204	204	{
205	205	quizpun2_state *state = space->machine().driver_data<quizpun2_state>();
206	206	struct prot_t &prot = state->m_prot;
207		logerror("%04x: protection - %s (state %x, wait %x, param %02x, cmd %02x, addr %02x)\n", cpu_get_pc(&space->device()), warning,
	207	logerror("%04x: protection - %s (state %x, wait %x, param %02x, cmd %02x, addr %02x)\n", space->device().safe_pc(), warning,
208	208	prot.state,
209	209	prot.wait_param,
210	210	prot.param,

trunk/src/mame/drivers/segac2.c

r17788	r17789
497	497	static READ16_HANDLER( prot_r )
498	498	{
499	499	segac2_state *state = space->machine().driver_data<segac2_state>();
500		if (LOG_PROTECTION) logerror("%06X:protection r=%02X\n", cpu_get_previouspc(&space->device()), state->m_prot_func ? state->m_prot_read_buf : 0xff);
	500	if (LOG_PROTECTION) logerror("%06X:protection r=%02X\n", space->device().safe_pcbase(), state->m_prot_func ? state->m_prot_read_buf : 0xff);
501	501	return state->m_prot_read_buf | 0xf0;
502	502	}
503	503
r17788	r17789
523	523	/* determine the value to return, should a read occur */
524	524	if (state->m_prot_func)
525	525	state->m_prot_read_buf = state->m_prot_func(table_index);
526		if (LOG_PROTECTION) logerror("%06X:protection w=%02X, new result=%02X\n", cpu_get_previouspc(&space->device()), data & 0x0f, state->m_prot_read_buf);
	526	if (LOG_PROTECTION) logerror("%06X:protection w=%02X, new result=%02X\n", space->device().safe_pcbase(), data & 0x0f, state->m_prot_read_buf);
527	527
528	528	/* if the palette changed, force an update */
529	529	if (new_sp_palbase != state->m_sp_palbase || new_bg_palbase != state->m_bg_palbase)

trunk/src/mame/drivers/sandscrp.c

r17788	r17789
291	291	UINT8 *RAM = memregion("maincpu")->base();
292	292	int bank = data & 0x07;
293	293
294		if ( bank != data )   logerror("CPU #1 - PC %04X: Bank %02X\n",cpu_get_pc(&space.device()),data);
	294	if ( bank != data )   logerror("CPU #1 - PC %04X: Bank %02X\n",space.device().safe_pc(),data);
295	295
296	296	if (bank < 3)   RAM = &RAM[0x4000 * bank];
297	297	else         RAM = &RAM[0x4000 * (bank-3) + 0x10000];

trunk/src/mame/drivers/homedata.c

r17788	r17789
309	309	m_dac->write_signed8(data);
310	310	break;
311	311	default:
312		logerror("%04x: I/O write to port %04x\n", cpu_get_pc(&space.device()), offset);
	312	logerror("%04x: I/O write to port %04x\n", space.device().safe_pc(), offset);
313	313	break;
314	314	}
315	315	}
r17788	r17789
352	352	1 \ ROM bank
353	353	0 /
354	354	*/
355		//  logerror("%04x: port C wr %02x (STATUS %d DATA %d)\n", cpu_get_pc(&space.device()), data, BIT(data, 2), BIT(data, 6));
	355	//  logerror("%04x: port C wr %02x (STATUS %d DATA %d)\n", space.device().safe_pc(), data, BIT(data, 2), BIT(data, 6));
356	356
357	357	membank("bank2")->set_entry(data & 0x03);
358	358
r17788	r17789
379	379
380	380	m_vblank = 0;
381	381
382		//logerror("%04x: io_r %02x\n", cpu_get_pc(&space.device()), res);
	382	//logerror("%04x: io_r %02x\n", space.device().safe_pc(), res);
383	383
384	384	return res;
385	385	}
386	386
387	387	READ8_MEMBER(homedata_state::reikaids_snd_command_r)
388	388	{
389		//logerror("%04x: sndmcd_r (%02x)\n", cpu_get_pc(&space.device()), m_snd_command);
	389	//logerror("%04x: sndmcd_r (%02x)\n", space.device().safe_pc(), m_snd_command);
390	390	return m_snd_command;
391	391	}
392	392
393	393	WRITE8_MEMBER(homedata_state::reikaids_snd_command_w)
394	394	{
395	395	m_snd_command = data;
396		//logerror("%04x: coprocessor_command_w %02x\n", cpu_get_pc(&space.device()), data);
	396	//logerror("%04x: coprocessor_command_w %02x\n", space.device().safe_pc(), data);
397	397	}
398	398
399	399
r17788	r17789
407	407
408	408	WRITE8_MEMBER(homedata_state::pteacher_snd_command_w)
409	409	{
410		//logerror("%04x: snd_command_w %02x\n", cpu_get_pc(&space.device()), data);
	410	//logerror("%04x: snd_command_w %02x\n", space.device().safe_pc(), data);
411	411	m_from_cpu = data;
412	412	}
413	413
414	414	READ8_MEMBER(homedata_state::pteacher_snd_r)
415	415	{
416		//logerror("%04x: pteacher_snd_r %02x\n",cpu_get_pc(&space.device()),to_cpu);
	416	//logerror("%04x: pteacher_snd_r %02x\n",space.device().safe_pc(),to_cpu);
417	417	return m_to_cpu;
418	418	}
419	419
r17788	r17789
439	439	static const char *const keynames[] = { "KEY0", "KEY1", "KEY2", "KEY3", "KEY4", "KEY5" };
440	440	int dips = ioport("DSW")->read();
441	441
442		//  logerror("%04x: keyboard_r with port A = %02x\n",cpu_get_pc(&space.device()),upd7807_porta);
	442	//  logerror("%04x: keyboard_r with port A = %02x\n",space.device().safe_pc(),upd7807_porta);
443	443
444	444	if (m_upd7807_porta & 0x80)
445	445	{
r17788	r17789
462	462	if (!BIT(m_upd7807_portc, 6))
463	463	m_upd7807_porta = m_from_cpu;
464	464	else
465		logerror("%04x: read PA with PC *not* clear\n", cpu_get_pc(&space.device()));
	465	logerror("%04x: read PA with PC *not* clear\n", space.device().safe_pc());
466	466
467	467	return m_upd7807_porta;
468	468	}
r17788	r17789
470	470	WRITE8_MEMBER(homedata_state::pteacher_snd_answer_w)
471	471	{
472	472	m_to_cpu = data;
473		//logerror("%04x: to_cpu = %02x\n", cpu_get_pc(&space.device()), m_to_cpu);
	473	//logerror("%04x: to_cpu = %02x\n", space.device().safe_pc(), m_to_cpu);
474	474	}
475	475
476	476	WRITE8_MEMBER(homedata_state::pteacher_upd7807_porta_w)
r17788	r17789
491	491	0 input (coin)
492	492	*/
493	493
494		//  logerror("%04x: port C wr %02x\n", cpu_get_pc(&space.device()), data);
	494	//  logerror("%04x: port C wr %02x\n", space.device().safe_pc(), data);
495	495
496	496	membank("bank2")->set_entry((data & 0x0c) >> 2);
497	497

trunk/src/mame/drivers/jokrwild.c

r17788	r17789
184	184
185	185	READ8_MEMBER(jokrwild_state::rng_r)
186	186	{
187		if(cpu_get_pc(&space.device()) == 0xab32)
	187	if(space.device().safe_pc() == 0xab32)
188	188	return (offset == 0) ? 0x9e : 0x27;
189	189
190		if(cpu_get_pc(&space.device()) == 0xab3a)
	190	if(space.device().safe_pc() == 0xab3a)
191	191	return (offset == 2) ? 0x49 : 0x92;
192	192
193	193	return machine().rand() & 0xff;

trunk/src/mame/drivers/hng64.c

r17788	r17789
476	476	READ32_MEMBER(hng64_state::hng64_com_r)
477	477	{
478	478
479		logerror("com read  (PC=%08x): %08x %08x = %08x\n", cpu_get_pc(&space.device()), (offset*4)+0xc0000000, mem_mask, m_com_ram[offset]);
	479	logerror("com read  (PC=%08x): %08x %08x = %08x\n", space.device().safe_pc(), (offset*4)+0xc0000000, mem_mask, m_com_ram[offset]);
480	480	return m_com_ram[offset];
481	481	}
482	482
483	483	WRITE32_MEMBER(hng64_state::hng64_com_w)
484	484	{
485	485
486		logerror("com write (PC=%08x): %08x %08x = %08x\n", cpu_get_pc(&space.device()), (offset*4)+0xc0000000, mem_mask, data);
	486	logerror("com write (PC=%08x): %08x %08x = %08x\n", space.device().safe_pc(), (offset*4)+0xc0000000, mem_mask, data);
487	487	COMBINE_DATA(&m_com_ram[offset]);
488	488	}
489	489
490	490	WRITE32_MEMBER(hng64_state::hng64_com_share_w)
491	491	{
492	492
493		logerror("commw  (PC=%08x): %08x %08x %08x\n", cpu_get_pc(&space.device()), data, (offset*4)+0xc0001000, mem_mask);
	493	logerror("commw  (PC=%08x): %08x %08x %08x\n", space.device().safe_pc(), data, (offset*4)+0xc0001000, mem_mask);
494	494
495	495	if (offset == 0x0) COMBINE_DATA(&m_com_shared_a);
496	496	if (offset == 0x1) COMBINE_DATA(&m_com_shared_b);
r17788	r17789
498	498
499	499	READ32_MEMBER(hng64_state::hng64_com_share_r)
500	500	{
501		logerror("commr  (PC=%08x): %08x %08x\n", cpu_get_pc(&space.device()), (offset*4)+0xc0001000, mem_mask);
	501	logerror("commr  (PC=%08x): %08x %08x\n", space.device().safe_pc(), (offset*4)+0xc0001000, mem_mask);
502	502
503	503	//if(offset == 0x0) return m_com_shared_a;
504	504	//if(offset == 0x1) return m_com_shared_b;
r17788	r17789
529	529
530	530	#if 0
531	531	if((offset*4) != 0x1084)
532		printf("HNG64 port read (PC=%08x) 0x%08x\n", cpu_get_pc(&space.device()), offset*4);
	532	printf("HNG64 port read (PC=%08x) 0x%08x\n", space.device().safe_pc(), offset*4);
533	533	#endif
534	534
535	535	rtc_addr = offset >> 1;
r17788	r17789
605	605
606	606	#if 0
607	607	if(((offset*4) & 0xff00) == 0x1100)
608		printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], cpu_get_pc(&space.device()));
	608	printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], space.device().safe_pc());
609	609	#endif
610	610
611	611	switch(offset*4)
612	612	{
613	613	case 0x1084: //MIPS->MCU latch port
614	614	m_mcu_en = (data & 0xff); //command-based, i.e. doesn't control halt line and such?
615		//printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], cpu_get_pc(&space.device()));
	615	//printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], space.device().safe_pc());
616	616	break;
617	617	//0x110c global irq mask?
618	618	/* irq ack */
r17788	r17789
624	624	hng64_do_dma(&space);
625	625	break;
626	626	//default:
627		//  printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], cpu_get_pc(&space.device()));
	627	//  printf("HNG64 writing to SYSTEM Registers 0x%08x == 0x%08x. (PC=%08x)\n", offset*4, m_sysregs[offset], space.device().safe_pc());
628	628	}
629	629	}
630	630
r17788	r17789
751	751	READ32_MEMBER(hng64_state::hng64_dualport_r)
752	752	{
753	753
754		//printf("dualport R %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], cpu_get_pc(&space.device()));
	754	//printf("dualport R %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], space.device().safe_pc());
755	755
756	756	/*
757	757	command table:
r17788	r17789
789	789	WRITE32_MEMBER(hng64_state::hng64_dualport_w)
790	790	{
791	791
792		//printf("dualport WRITE %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], cpu_get_pc(&space.device()));
	792	//printf("dualport WRITE %08x %08x (PC=%08x)\n", offset*4, hng64_dualport[offset], space.device().safe_pc());
793	793	COMBINE_DATA (&m_dualport[offset]);
794	794	}
795	795
r17788	r17789
862	862	#if 0
863	863	READ32_MEMBER(hng64_state::dl_r)
864	864	{
865		//mame_printf_debug("dl R (%08x) : %x %x\n", cpu_get_pc(&space.device()), offset, hng64_dl[offset]);
866		//usrintf_showmessage("dl R (%08x) : %x %x", cpu_get_pc(&space.device()), offset, hng64_dl[offset]);
	865	//mame_printf_debug("dl R (%08x) : %x %x\n", space.device().safe_pc(), offset, hng64_dl[offset]);
	866	//usrintf_showmessage("dl R (%08x) : %x %x", space.device().safe_pc(), offset, hng64_dl[offset]);
867	867	return hng64_dl[offset];
868	868	}
869	869	#endif

trunk/src/mame/drivers/solomon.c

r17788	r17789
23	23
24	24	READ8_MEMBER(solomon_state::solomon_0xe603_r)
25	25	{
26		if (cpu_get_pc(&space.device()) == 0x161) // all the time .. return 0 to act as before  for coin / startup etc.
	26	if (space.device().safe_pc() == 0x161) // all the time .. return 0 to act as before  for coin / startup etc.
27	27	{
28	28	return 0;
29	29	}
30		else if (cpu_get_pc(&space.device()) == 0x4cf0) // stop it clearing the screen at certain scores
	30	else if (space.device().safe_pc() == 0x4cf0) // stop it clearing the screen at certain scores
31	31	{
32	32	return (cpu_get_reg(&space.device(), Z80_BC) & 0x08);
33	33	}
34	34	else
35	35	{
36		mame_printf_debug("unhandled solomon_0xe603_r %04x\n", cpu_get_pc(&space.device()));
	36	mame_printf_debug("unhandled solomon_0xe603_r %04x\n", space.device().safe_pc());
37	37	return 0;
38	38	}
39	39	}

trunk/src/mame/drivers/macrossp.c

r17788	r17789
320	320	READ32_MEMBER(macrossp_state::macrossp_soundstatus_r)
321	321	{
322	322
323		//  logerror("%08x read soundstatus\n", cpu_get_pc(&space.device()));
	323	//  logerror("%08x read soundstatus\n", space.device().safe_pc());
324	324
325	325	/* bit 1 is sound status */
326	326	/* bit 0 unknown - it is expected to toggle, vblank? */
r17788	r17789
335	335
336	336	if (ACCESSING_BITS_16_31)
337	337	{
338		//logerror("%08x write soundcmd %08x (%08x)\n",cpu_get_pc(&space.device()),data,mem_mask);
	338	//logerror("%08x write soundcmd %08x (%08x)\n",space.device().safe_pc(),data,mem_mask);
339	339	soundlatch_word_w(space, 0, data >> 16, 0xffff);
340	340	m_sndpending = 1;
341	341	device_set_input_line(m_audiocpu, 2, HOLD_LINE);
r17788	r17789
347	347	READ16_MEMBER(macrossp_state::macrossp_soundcmd_r)
348	348	{
349	349
350		//  logerror("%06x read soundcmd\n",cpu_get_pc(&space.device()));
	350	//  logerror("%06x read soundcmd\n",space.device().safe_pc());
351	351	m_sndpending = 0;
352	352	return soundlatch_word_r(space, offset, mem_mask);
353	353	}
r17788	r17789
770	770	*/
771	771
772	772	COMBINE_DATA(&m_mainram[0x10158 / 4]);
773		if (cpu_get_pc(&space.device()) == 0x001810A) device_spin_until_interrupt(&space.device());
	773	if (space.device().safe_pc() == 0x001810A) device_spin_until_interrupt(&space.device());
774	774	}
775	775
776	776	#ifdef UNUSED_FUNCTION
r17788	r17789
778	778	{
779	779
780	780	COMBINE_DATA(&m_mainram[0x00020 / 4]);
781		if (cpu_get_pc(&space.device()) == 0x1cc) device_spin_until_interrupt(&space.device());
	781	if (space.device().safe_pc() == 0x1cc) device_spin_until_interrupt(&space.device());
782	782	}
783	783	#endif
784	784

trunk/src/mame/drivers/gladiatr.c

r17788	r17789
995	995
996	996	READ8_MEMBER(gladiatr_state::f6a3_r)
997	997	{
998		if(cpu_get_previouspc(&space.device())==0x8e)
	998	if(space.device().safe_pcbase()==0x8e)
999	999	m_nvram[0x6a3]=1;
1000	1000
1001	1001	return m_nvram[0x6a3];

trunk/src/mame/drivers/goindol.c

r17788	r17789
52	52	WRITE8_MEMBER(goindol_state::prot_fc44_w)
53	53	{
54	54
55		logerror("%04x: prot_fc44_w(%02x)\n", cpu_get_pc(&space.device()), data);
	55	logerror("%04x: prot_fc44_w(%02x)\n", space.device().safe_pc(), data);
56	56	m_ram[0x0419] = 0x5b;
57	57	m_ram[0x041a] = 0x3f;
58	58	m_ram[0x041b] = 0x6d;
r17788	r17789
61	61	WRITE8_MEMBER(goindol_state::prot_fd99_w)
62	62	{
63	63
64		logerror("%04x: prot_fd99_w(%02x)\n", cpu_get_pc(&space.device()), data);
	64	logerror("%04x: prot_fd99_w(%02x)\n", space.device().safe_pc(), data);
65	65	m_ram[0x0421] = 0x3f;
66	66	}
67	67
68	68	WRITE8_MEMBER(goindol_state::prot_fc66_w)
69	69	{
70	70
71		logerror("%04x: prot_fc66_w(%02x)\n", cpu_get_pc(&space.device()), data);
	71	logerror("%04x: prot_fc66_w(%02x)\n", space.device().safe_pc(), data);
72	72	m_ram[0x0423] = 0x06;
73	73	}
74	74
75	75	WRITE8_MEMBER(goindol_state::prot_fcb0_w)
76	76	{
77	77
78		logerror("%04x: prot_fcb0_w(%02x)\n", cpu_get_pc(&space.device()), data);
	78	logerror("%04x: prot_fcb0_w(%02x)\n", space.device().safe_pc(), data);
79	79	m_ram[0x0425] = 0x06;
80	80	}
81	81

trunk/src/mame/drivers/hotblock.c

r17788	r17789
93	93
94	94	WRITE8_MEMBER(hotblock_state::hotblock_port4_w)
95	95	{
96		//  mame_printf_debug("port4_w: pc = %06x : data %04x\n", cpu_get_pc(&space.device()), data);
97		//  popmessage("port4_w: pc = %06x : data %04x", cpu_get_pc(&space.device()), data);
	96	//  mame_printf_debug("port4_w: pc = %06x : data %04x\n", space.device().safe_pc(), data);
	97	//  popmessage("port4_w: pc = %06x : data %04x", space.device().safe_pc(), data);
98	98
99	99	m_port4 = data;
100	100	}
r17788	r17789
103	103
104	104	WRITE8_MEMBER(hotblock_state::hotblock_port0_w)
105	105	{
106		//  popmessage("port4_w: pc = %06x : data %04x", cpu_get_pc(&space.device()), data);
	106	//  popmessage("port4_w: pc = %06x : data %04x", space.device().safe_pc(), data);
107	107
108	108	m_port0 = data;
109	109	}

trunk/src/mame/drivers/vendetta.c

r17788	r17789
784	784	static KONAMI_SETLINES_CALLBACK( vendetta_banking )
785	785	{
786	786	if (lines >= 0x1c)
787		logerror("PC = %04x : Unknown bank selected %02x\n", cpu_get_pc(device), lines);
	787	logerror("PC = %04x : Unknown bank selected %02x\n", device->safe_pc(), lines);
788	788	else
789	789	device->machine().root_device().membank("bank1")->set_entry(lines);
790	790	}

trunk/src/mame/drivers/segas16b.c

r17788	r17789
1124	1124	case 0x2000/2:
1125	1125	return ioport((offset & 1) ? "DSW1" : "DSW2")->read();
1126	1126	}
1127		logerror("%06X:standard_io_r - unknown read access to address %04X\n", cpu_get_pc(&space.device()), offset * 2);
	1127	logerror("%06X:standard_io_r - unknown read access to address %04X\n", space.device().safe_pc(), offset * 2);
1128	1128	return open_bus_r(space, 0, mem_mask);
1129	1129	}
1130	1130
r17788	r17789
1159	1159	coin_counter_w(machine(), 0, data & 0x01);
1160	1160	return;
1161	1161	}
1162		logerror("%06X:standard_io_w - unknown write access to address %04X = %04X & %04X\n", cpu_get_pc(&space.device()), offset * 2, data, mem_mask);
	1162	logerror("%06X:standard_io_w - unknown write access to address %04X = %04X & %04X\n", space.device().safe_pc(), offset * 2, data, mem_mask);
1163	1163	}
1164	1164
1165	1165

trunk/src/mame/drivers/saturn.c

r17788	r17789
290	290	{
291	291	case 0x5c/4:
292	292	//  Super Major League and Shin Megami Tensei - Akuma Zensho reads from there (undocumented), DMA status mirror?
293		if(LOG_SCU) logerror("(PC=%08x) DMA status reg read\n",cpu_get_pc(&space->device()));
	293	if(LOG_SCU) logerror("(PC=%08x) DMA status reg read\n",space->device().safe_pc());
294	294	res = state->m_scu_regs[0x7c/4];
295	295	break;
296	296	case 0x7c/4:
297		if(LOG_SCU) logerror("(PC=%08x) DMA status reg read\n",cpu_get_pc(&space->device()));
	297	if(LOG_SCU) logerror("(PC=%08x) DMA status reg read\n",space->device().safe_pc());
298	298	res = state->m_scu_regs[offset];
299	299	break;
300	300	case 0x80/4:
r17788	r17789
305	305	res = dsp_ram_addr_r();
306	306	break;
307	307	case 0xa0/4:
308		if(LOG_SCU) logerror("(PC=%08x) IRQ mask reg read %08x MASK=%08x\n",cpu_get_pc(&space->device()),mem_mask,state->m_scu_regs[0xa0/4]);
	308	if(LOG_SCU) logerror("(PC=%08x) IRQ mask reg read %08x MASK=%08x\n",space->device().safe_pc(),mem_mask,state->m_scu_regs[0xa0/4]);
309	309	res = state->m_scu.ism;
310	310	break;
311	311	case 0xa4/4:
312		if(LOG_SCU) logerror("(PC=%08x) IRQ status reg read %08x MASK=%08x\n",cpu_get_pc(&space->device()),mem_mask,state->m_scu_regs[0xa0/4]);
	312	if(LOG_SCU) logerror("(PC=%08x) IRQ status reg read %08x MASK=%08x\n",space->device().safe_pc(),mem_mask,state->m_scu_regs[0xa0/4]);
313	313	res = state->m_scu.ist;
314	314	break;
315	315	case 0xc8/4:
316		logerror("(PC=%08x) SCU version reg read\n",cpu_get_pc(&space->device()));
	316	logerror("(PC=%08x) SCU version reg read\n",space->device().safe_pc());
317	317	res = 0x00000004;/*SCU Version 4, OK? */
318	318	break;
319	319	default:
320		if(LOG_SCU) logerror("(PC=%08x) SCU reg read at %d = %08x\n",cpu_get_pc(&space->device()),offset,state->m_scu_regs[offset]);
	320	if(LOG_SCU) logerror("(PC=%08x) SCU reg read at %d = %08x\n",space->device().safe_pc(),offset,state->m_scu_regs[offset]);
321	321	res = state->m_scu_regs[offset];
322	322	break;
323	323	}
r17788	r17789
393	393	scu_test_pending_irq(space->machine());
394	394	break;
395	395	case 0xa4/4: /* IRQ control */
396		if(LOG_SCU) logerror("PC=%08x IRQ status reg set:%08x %08x\n",cpu_get_pc(&space->device()),state->m_scu_regs[41],mem_mask);
	396	if(LOG_SCU) logerror("PC=%08x IRQ status reg set:%08x %08x\n",space->device().safe_pc(),state->m_scu_regs[41],mem_mask);
397	397	state->m_scu.ist &= state->m_scu_regs[offset];
398	398	break;
399	399	case 0xa8/4: if(LOG_SCU) logerror("A-Bus IRQ ACK %08x\n",state->m_scu_regs[42]); break;
r17788	r17789
643	643	{
644	644	saturn_state *state = space->machine().driver_data<saturn_state>();
645	645
646		//logerror("cpu %s (PC=%08X) MINIT write = %08x\n", space->device().tag(), cpu_get_pc(&space->device()),data);
	646	//logerror("cpu %s (PC=%08X) MINIT write = %08x\n", space->device().tag(), space->device().safe_pc(),data);
647	647	space->machine().scheduler().boost_interleave(state->m_minit_boost_timeslice, attotime::from_usec(state->m_minit_boost));
648	648	space->machine().scheduler().trigger(1000);
649	649	sh2_set_frt_input(state->m_slave, PULSE_LINE);
r17788	r17789
653	653	{
654	654	saturn_state *state = space->machine().driver_data<saturn_state>();
655	655
656		//logerror("cpu %s (PC=%08X) SINIT write = %08x\n", space->device().tag(), cpu_get_pc(&space->device()),data);
	656	//logerror("cpu %s (PC=%08X) SINIT write = %08x\n", space->device().tag(), space->device().safe_pc(),data);
657	657	space->machine().scheduler().boost_interleave(state->m_sinit_boost_timeslice, attotime::from_usec(state->m_sinit_boost));
658	658	sh2_set_frt_input(state->m_maincpu, PULSE_LINE);
659	659	}

trunk/src/mame/drivers/pktgaldx.c

r17788	r17789
104	104
105	105	READ16_MEMBER(pktgaldx_state::pckgaldx_protection_r)
106	106	{
107		logerror("pckgaldx_protection_r address %06x\n",cpu_get_pc(&space.device()));
	107	logerror("pckgaldx_protection_r address %06x\n",space.device().safe_pc());
108	108	return -1;
109	109	}
110	110

trunk/src/mame/drivers/atarigx2.c

r17788	r17789
146	146	WRITE32_MEMBER(atarigx2_state::atarigx2_protection_w)
147	147	{
148	148	{
149		int pc = cpu_get_previouspc(&space.device());
	149	int pc = space.device().safe_pcbase();
150	150	//      if (pc == 0x11cbe || pc == 0x11c30)
151	151	//          logerror("%06X:Protection W@%04X = %04X  (result to %06X)\n", pc, offset, data, cpu_get_reg(&space.device(), M68K_A2));
152	152	//      else
r17788	r17789
1126	1126	result = machine().rand() << 16;
1127	1127	else
1128	1128	result = 0xffff << 16;
1129		logerror("%06X:Unhandled protection R@%04X = %04X\n", cpu_get_previouspc(&space.device()), offset, result);
	1129	logerror("%06X:Unhandled protection R@%04X = %04X\n", space.device().safe_pcbase(), offset, result);
1130	1130	}
1131	1131	}
1132	1132
1133	1133	if (ACCESSING_BITS_16_31)
1134		logerror("%06X:Protection R@%04X = %04X\n", cpu_get_previouspc(&space.device()), offset * 4, result >> 16);
	1134	logerror("%06X:Protection R@%04X = %04X\n", space.device().safe_pcbase(), offset * 4, result >> 16);
1135	1135	else
1136		logerror("%06X:Protection R@%04X = %04X\n", cpu_get_previouspc(&space.device()), offset * 4 + 2, result);
	1136	logerror("%06X:Protection R@%04X = %04X\n", space.device().safe_pcbase(), offset * 4 + 2, result);
1137	1137	return result;
1138	1138	}
1139	1139

trunk/src/mame/drivers/nwk-tr.c

r17788	r17789
394	394
395	395	default:
396	396	{
397		//printf("lanc1_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&space.device()));
	397	//printf("lanc1_r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
398	398	return 0xffffffff;
399	399	}
400	400	}
r17788	r17789
402	402
403	403	WRITE32_MEMBER(nwktr_state::lanc1_w)
404	404	{
405		//printf("lanc1_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	405	//printf("lanc1_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
406	406	}
407	407
408	408	READ32_MEMBER(nwktr_state::lanc2_r)
r17788	r17789
430	430	}
431	431	}
432	432
433		//printf("lanc2_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&space.device()));
	433	//printf("lanc2_r: %08X, %08X at %08X\n", offset, mem_mask, space.device().safe_pc());
434	434
435	435	return r;
436	436	}
r17788	r17789
454	454
455	455	m_fpga_uploaded = 1;
456	456
457		//printf("lanc2_fpga_w: %02X at %08X\n", value, cpu_get_pc(&space.device()));
	457	//printf("lanc2_fpga_w: %02X at %08X\n", value, space.device().safe_pc());
458	458	}
459	459	else if (ACCESSING_BITS_8_15)
460	460	{
r17788	r17789
473	473	}
474	474	else
475	475	{
476		//printf("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	476	//printf("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
477	477	}
478	478	}
479	479	if (offset == 4)
r17788	r17789
503	503	}
504	504	}
505	505
506		//printf("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	506	//printf("lanc2_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space.device().safe_pc());
507	507	}
508	508
509	509	/*****************************************************************************/

trunk/src/mame/drivers/taito_f3.c

r17788	r17789
64	64	if (offset < 6)
65	65	return ioport(iptnames[offset])->read();
66	66
67		logerror("CPU #0 PC %06x: warning - read unmapped control address %06x\n", cpu_get_pc(&space.device()), offset);
	67	logerror("CPU #0 PC %06x: warning - read unmapped control address %06x\n", space.device().safe_pc(), offset);
68	68	return 0xffffffff;
69	69	}
70	70
r17788	r17789
105	105	}
106	106	return;
107	107	}
108		logerror("CPU #0 PC %06x: warning - write unmapped control address %06x %08x\n",cpu_get_pc(&space.device()),offset,data);
	108	logerror("CPU #0 PC %06x: warning - write unmapped control address %06x %08x\n",space.device().safe_pc(),offset,data);
109	109	}
110	110
111	111	WRITE32_MEMBER(taito_f3_state::f3_sound_reset_0_w)

trunk/src/mame/drivers/m107.c

r17788	r17789
85	85	{
86	86	membank("bank1")->set_entry((data & 0x06) >> 1);
87	87	if (data & 0xf9)
88		logerror("%05x: bankswitch %04x\n", cpu_get_pc(&space.device()), data);
	88	logerror("%05x: bankswitch %04x\n", space.device().safe_pc(), data);
89	89	}
90	90	}
91	91

trunk/src/mame/drivers/ninjaw.c

r17788	r17789
344	344
345	345	parse_control(machine());
346	346
347		logerror("CPU #0 PC %06x: write %04x to cpu control\n", cpu_get_pc(&space.device()), data);
	347	logerror("CPU #0 PC %06x: write %04x to cpu control\n", space.device().safe_pc(), data);
348	348	}
349	349
350	350

trunk/src/mame/drivers/pacman.c

r17788	r17789
572	572	READ8_MEMBER(pacman_state::maketrax_special_port2_r)
573	573	{
574	574	int data = ioport("DSW1")->read();
575		int pc = cpu_get_previouspc(&space.device());
	575	int pc = space.device().safe_pcbase();
576	576
577	577	if ((pc == 0x1973) || (pc == 0x2389)) return data | 0x40;
578	578
r17788	r17789
592	592
593	593	READ8_MEMBER(pacman_state::maketrax_special_port3_r)
594	594	{
595		int pc = cpu_get_previouspc(&space.device());
	595	int pc = space.device().safe_pcbase();
596	596
597	597	if (pc == 0x040e) return 0x20;
598	598
r17788	r17789
614	614	READ8_MEMBER(pacman_state::korosuke_special_port2_r)
615	615	{
616	616	int data = ioport("DSW1")->read();
617		int pc = cpu_get_previouspc(&space.device());
	617	int pc = space.device().safe_pcbase();
618	618
619	619	if ((pc == 0x196e) || (pc == 0x2387)) return data | 0x40;
620	620
r17788	r17789
634	634
635	635	READ8_MEMBER(pacman_state::korosuke_special_port3_r)
636	636	{
637		int pc = cpu_get_previouspc(&space.device());
	637	int pc = space.device().safe_pcbase();
638	638
639	639	if (pc == 0x0445) return 0x20;
640	640
r17788	r17789
710	710
711	711	READ8_MEMBER(pacman_state::drivfrcp_port1_r)
712	712	{
713		switch (cpu_get_pc(&space.device()))
	713	switch (space.device().safe_pc())
714	714	{
715	715	case 0x0030:
716	716	case 0x0291:
r17788	r17789
722	722
723	723	READ8_MEMBER(pacman_state::_8bpm_port1_r)
724	724	{
725		switch (cpu_get_pc(&space.device()))
	725	switch (space.device().safe_pc())
726	726	{
727	727	case 0x0030:
728	728	case 0x0466:
r17788	r17789
734	734
735	735	READ8_MEMBER(pacman_state::porky_port1_r)
736	736	{
737		switch (cpu_get_pc(&space.device()))
	737	switch (space.device().safe_pc())
738	738	{
739	739	case 0x0034:
740	740	return 0x01;
r17788	r17789
6125	6125	switch (offset)
6126	6126	{
6127	6127	default:
6128		logerror("CPU0 %04x: Unhandled protection read, offset %04x\n", cpu_get_pc(&space.device()), offset);
	6128	logerror("CPU0 %04x: Unhandled protection read, offset %04x\n", space.device().safe_pc(), offset);
6129	6129	return 0x00;
6130	6130
6131	6131	case 0x0000: // unknown
r17788	r17789
6148	6148	m_cannonb_bit_to_read = 7;
6149	6149	return 0x00;
6150	6150	case 0x0001: // affects the ball hitting the blocks as well as jump address after bonus round
6151		if (cpu_get_pc(&space.device()) == 0x2b97)
	6151	if (space.device().safe_pc() == 0x2b97)
6152	6152	return (BIT(0x46, m_cannonb_bit_to_read--) << 7);
6153	6153	else
6154	6154	return 0xff;            /* value taken from the bootlegs */

trunk/src/mame/drivers/igs011.c

r17788	r17789
223	223	{
224	224	COMBINE_DATA(&m_priority);
225	225
226		//  logerror("%06x: priority = %02x\n", cpu_get_pc(&space.device()), m_priority);
	226	//  logerror("%06x: priority = %02x\n", space.device().safe_pc(), m_priority);
227	227
228	228	if (data & ~0x7)
229		logerror("%06x: warning, unknown bits written to priority = %02x\n", cpu_get_pc(&space.device()), m_priority);
	229	logerror("%06x: warning, unknown bits written to priority = %02x\n", space.device().safe_pc(), m_priority);
230	230	}
231	231
232	232
r17788	r17789
445	445	COMBINE_DATA(&blitter.flags);
446	446
447	447	#if LOG_BLITTER
448		logerror("%06x: blit x %03x, y %03x, w %03x, h %03x, gfx %03x%04x, depth %02x, pen %02x, flags %03x\n", cpu_get_pc(&space.device()),
	448	logerror("%06x: blit x %03x, y %03x, w %03x, h %03x, gfx %03x%04x, depth %02x, pen %02x, flags %03x\n", space.device().safe_pc(),
449	449	blitter.x,blitter.y,blitter.w,blitter.h,blitter.gfx_hi,blitter.gfx_lo,blitter.depth,blitter.pen,blitter.flags);
450	450	#endif
451	451
r17788	r17789
1374	1374	coin_counter_w(machine(), 0,data & 2);
1375	1375
1376	1376	if (data & ~0x2)
1377		logerror("%06x: warning, unknown bits written in coin counter = %02x\n", cpu_get_pc(&space.device()), data);
	1377	logerror("%06x: warning, unknown bits written in coin counter = %02x\n", space.device().safe_pc(), data);
1378	1378
1379	1379	break;
1380	1380
r17788	r17789
1387	1387
1388	1388	default:
1389	1389	//          popmessage("igs003 %x <- %04x",m_igs003_reg[0],data);
1390		logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0], data);
	1390	logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", space.device().safe_pc(), m_igs003_reg[0], data);
1391	1391	}
1392	1392	}
1393	1393	READ16_MEMBER(igs011_state::drgnwrld_igs003_r)
r17788	r17789
1421	1421	case 0x34:   return 0x32;
1422	1422
1423	1423	default:
1424		logerror("%06x: warning, reading with igs003_reg = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0]);
	1424	logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), m_igs003_reg[0]);
1425	1425	}
1426	1426
1427	1427	return 0;
r17788	r17789
1441	1441	}
1442	1442
1443	1443	if ( m_igs_input_sel & (~0xff) )
1444		logerror("%06x: warning, unknown bits written in igs_input_sel = %02x\n", cpu_get_pc(&space.device()), m_igs_input_sel);
	1444	logerror("%06x: warning, unknown bits written in igs_input_sel = %02x\n", space.device().safe_pc(), m_igs_input_sel);
1445	1445
1446	1446	//  popmessage("sel2 %02x",m_igs_input_sel&~0x1f);
1447	1447	}
r17788	r17789
1458	1458	if (~m_igs_input_sel & 0x08)   return ioport("KEY3")->read();
1459	1459	if (~m_igs_input_sel & 0x10)   return ioport("KEY4")->read();
1460	1460
1461		logerror("%06x: warning, reading with igs_input_sel = %02x\n", cpu_get_pc(&space.device()), m_igs_input_sel);
	1461	logerror("%06x: warning, reading with igs_input_sel = %02x\n", space.device().safe_pc(), m_igs_input_sel);
1462	1462	break;
1463	1463	}
1464	1464	return 0;
r17788	r17789
1486	1486	}
1487	1487
1488	1488	if ( m_igs_input_sel & ~0x7f )
1489		logerror("%06x: warning, unknown bits written in igs_input_sel = %02x\n", cpu_get_pc(&space.device()), m_igs_input_sel);
	1489	logerror("%06x: warning, unknown bits written in igs_input_sel = %02x\n", space.device().safe_pc(), m_igs_input_sel);
1490	1490
1491	1491	//          popmessage("sel2 %02x",m_igs_input_sel&~0x1f);
1492	1492	break;
r17788	r17789
1501	1501	}
1502	1502
1503	1503	if ( m_lhb2_pen_hi & ~0xf )
1504		logerror("%06x: warning, unknown bits written in lhb2_pen_hi = %02x\n", cpu_get_pc(&space.device()), m_lhb2_pen_hi);
	1504	logerror("%06x: warning, unknown bits written in lhb2_pen_hi = %02x\n", space.device().safe_pc(), m_lhb2_pen_hi);
1505	1505
1506	1506	//          popmessage("oki %02x",m_lhb2_pen_hi & 0x08);
1507	1507	break;
1508	1508
1509	1509	default:
1510		logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0], data);
	1510	logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", space.device().safe_pc(), m_igs003_reg[0], data);
1511	1511	}
1512	1512	}
1513	1513	READ16_MEMBER(igs011_state::lhb2_igs003_r)
r17788	r17789
1522	1522	if (~m_igs_input_sel & 0x10)   return ioport("KEY4")->read();
1523	1523	/* fall through */
1524	1524	default:
1525		logerror("%06x: warning, reading with igs003_reg = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0]);
	1525	logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), m_igs003_reg[0]);
1526	1526	break;
1527	1527
1528	1528	//      case 0x03:
r17788	r17789
1581	1581	}
1582	1582
1583	1583	if (data & ~0x33)
1584		logerror("%06x: warning, unknown bits written in coin counter = %02x\n", cpu_get_pc(&space.device()), data);
	1584	logerror("%06x: warning, unknown bits written in coin counter = %02x\n", space.device().safe_pc(), data);
1585	1585
1586	1586	//          popmessage("coin %02x",data);
1587	1587	break;
1588	1588
1589	1589	default:
1590		logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0], data);
	1590	logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", space.device().safe_pc(), m_igs003_reg[0], data);
1591	1591	}
1592	1592	}
1593	1593	READ16_MEMBER(igs011_state::wlcc_igs003_r)
r17788	r17789
1619	1619	case 0x34:   return 0x32;
1620	1620
1621	1621	default:
1622		logerror("%06x: warning, reading with igs003_reg = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0]);
	1622	logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), m_igs003_reg[0]);
1623	1623	}
1624	1624
1625	1625	return 0;
r17788	r17789
1647	1647	}
1648	1648
1649	1649	if ( m_igs_input_sel & 0x40 )
1650		logerror("%06x: warning, unknown bits written in igs_input_sel = %02x\n", cpu_get_pc(&space.device()), m_igs_input_sel);
	1650	logerror("%06x: warning, unknown bits written in igs_input_sel = %02x\n", space.device().safe_pc(), m_igs_input_sel);
1651	1651
1652	1652	//          popmessage("sel2 %02x",m_igs_input_sel&~0x1f);
1653	1653	break;
1654	1654
1655	1655	default:
1656		logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0], data);
	1656	logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", space.device().safe_pc(), m_igs003_reg[0], data);
1657	1657	}
1658	1658	}
1659	1659	READ16_MEMBER(igs011_state::xymg_igs003_r)
r17788	r17789
1693	1693	case 0x34:   return 0x32;
1694	1694
1695	1695	default:
1696		logerror("%06x: warning, reading with igs003_reg = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0]);
	1696	logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), m_igs003_reg[0]);
1697	1697	break;
1698	1698	}
1699	1699
r17788	r17789
1719	1719	}
1720	1720
1721	1721	if (data & ~0x3)
1722		logerror("%06x: warning, unknown bits written in coin counter = %02x\n", cpu_get_pc(&space.device()), data);
	1722	logerror("%06x: warning, unknown bits written in coin counter = %02x\n", space.device().safe_pc(), data);
1723	1723
1724	1724	break;
1725	1725
1726	1726	default:
1727	1727	//          popmessage("igs003 %x <- %04x",m_igs003_reg[0],data);
1728		logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0], data);
	1728	logerror("%06x: warning, writing to igs003_reg %02x = %02x\n", space.device().safe_pc(), m_igs003_reg[0], data);
1729	1729	}
1730	1730	}
1731	1731	READ16_MEMBER(igs011_state::vbowl_igs003_r)
r17788	r17789
1761	1761	case 0x34:   return 0x32;
1762	1762
1763	1763	default:
1764		logerror("%06x: warning, reading with igs003_reg = %02x\n", cpu_get_pc(&space.device()), m_igs003_reg[0]);
	1764	logerror("%06x: warning, reading with igs003_reg = %02x\n", space.device().safe_pc(), m_igs003_reg[0]);
1765	1765	}
1766	1766
1767	1767	return 0;
r17788	r17789
2507	2507	}
2508	2508
2509	2509	if (data & ~0x7)
2510		logerror("%06x: warning, unknown bits written to pen_hi = %04x\n", cpu_get_pc(&space.device()), m_priority);
	2510	logerror("%06x: warning, unknown bits written to pen_hi = %04x\n", space.device().safe_pc(), m_priority);
2511	2511	}
2512	2512
2513	2513	WRITE16_MEMBER(igs011_state::vbowl_link_0_w){ }

trunk/src/mame/drivers/srmp6.c

r17788	r17789
361	361	case 0x56/2: // written 8,9,8,9 successively
362	362
363	363	default:
364		logerror("video_regs_w (PC=%06X): %04x = %04x & %04x\n", cpu_get_previouspc(&space.device()), offset*2, data, mem_mask);
	364	logerror("video_regs_w (PC=%06X): %04x = %04x & %04x\n", space.device().safe_pcbase(), offset*2, data, mem_mask);
365	365	break;
366	366	}
367	367	COMBINE_DATA(&m_video_regs[offset]);
r17788	r17789
370	370	READ16_MEMBER(srmp6_state::video_regs_r)
371	371	{
372	372
373		logerror("video_regs_r (PC=%06X): %04x\n", cpu_get_previouspc(&space.device()), offset*2);
	373	logerror("video_regs_r (PC=%06X): %04x\n", space.device().safe_pcbase(), offset*2);
374	374	return m_video_regs[offset];
375	375	}
376	376

trunk/src/mame/drivers/sf.c

r17788	r17789
146	146	}
147	147	default:
148	148	{
149		logerror("Write protection at %06x (%04x)\n", cpu_get_pc(&space.device()), data & 0xffff);
	149	logerror("Write protection at %06x (%04x)\n", space.device().safe_pc(), data & 0xffff);
150	150	logerror("*** Unknown protection %d\n", space.read_byte(0xffc684));
151	151	break;
152	152	}

trunk/src/mame/drivers/konamim2.c

r17788	r17789
346	346	READ64_MEMBER(konamim2_state::unk4_r)
347	347	{
348	348	UINT64 r = 0;
349		//  logerror("unk4_r: %08X, %08X%08X at %08X\n", offset, (UINT32)(mem_mask>>32), (UINT32)(mem_mask), cpu_get_pc(&space.device()));
	349	//  logerror("unk4_r: %08X, %08X%08X at %08X\n", offset, (UINT32)(mem_mask>>32), (UINT32)(mem_mask), space.device().safe_pc());
350	350
351	351	if (ACCESSING_BITS_32_63)
352	352	{
r17788	r17789
363	363	WRITE64_MEMBER(konamim2_state::unk4_w)
364	364	{
365	365	//  logerror("unk4_w: %08X%08X, %08X, %08X%08X at %08X\n", (UINT32)(data >> 32), (UINT32)(data),
366		//      offset, (UINT32)(mem_mask>>32), (UINT32)(mem_mask), cpu_get_pc(&space.device()));
	366	//      offset, (UINT32)(mem_mask>>32), (UINT32)(mem_mask), space.device().safe_pc());
367	367
368	368	if (ACCESSING_BITS_0_31)
369	369	{
370	370	if (data & 0x800000)
371	371	{
372		//          mame_printf_debug("CPU '%s': CPU1 IRQ at %08X\n", device().tag(), cpu_get_pc(&space.device()));
	372	//          mame_printf_debug("CPU '%s': CPU1 IRQ at %08X\n", device().tag(), space.device().safe_pc());
373	373	cputag_set_input_line(machine(), "sub", INPUT_LINE_IRQ0, ASSERT_LINE);
374	374	}
375	375
r17788	r17789
902	902
903	903	default:
904	904	{
905		//                      mame_printf_debug("cde_r: %08X at %08X\n", reg*4, cpu_get_pc(&space.device()));
	905	//                      mame_printf_debug("cde_r: %08X at %08X\n", reg*4, space.device().safe_pc());
906	906	break;
907	907	}
908	908	}
r17788	r17789
936	936	{
937	937	case 0x028/4:      // Command write
938	938	{
939		//printf("cde_w: %08X, %08X at %08X\n", d, reg*4, cpu_get_pc(&space.device()));
	939	//printf("cde_w: %08X, %08X at %08X\n", d, reg*4, space.device().safe_pc());
940	940
941	941	if (d == 0x0180)
942	942	{
r17788	r17789
1064	1064
1065	1065	default:
1066	1066	{
1067		//                      mame_printf_debug("cde_w: %08X, %08X at %08X\n", d, reg*4, cpu_get_pc(&space.device()));
	1067	//                      mame_printf_debug("cde_w: %08X, %08X at %08X\n", d, reg*4, space.device().safe_pc());
1068	1068	break;
1069	1069	}
1070	1070	}

trunk/src/mame/drivers/cave.c

r17788	r17789
263	263	}
264	264	else
265	265	{
266		logerror("CPU #1 - PC %04X: Sound Buffer 2 Underflow Error\n", cpu_get_pc(&space.device()));
	266	logerror("CPU #1 - PC %04X: Sound Buffer 2 Underflow Error\n", space.device().safe_pc());
267	267	return 0xff;
268	268	}
269	269	}
r17788	r17789
276	276	if (m_soundbuf_len < 32)
277	277	m_soundbuf_len++;
278	278	else
279		logerror("CPU #1 - PC %04X: Sound Buffer 2 Overflow Error\n", cpu_get_pc(&space.device()));
	279	logerror("CPU #1 - PC %04X: Sound Buffer 2 Overflow Error\n", space.device().safe_pc());
280	280	}
281	281
282	282
r17788	r17789
1051	1051	WRITE8_MEMBER(cave_state::hotdogst_rombank_w)
1052	1052	{
1053	1053	if (data & ~0x0f)
1054		logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
	1054	logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
1055	1055
1056	1056	membank("bank2")->set_entry(data & 0x0f);
1057	1057	}
r17788	r17789
1088	1088	WRITE8_MEMBER(cave_state::mazinger_rombank_w)
1089	1089	{
1090	1090	if (data & ~0x07)
1091		logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
	1091	logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
1092	1092
1093	1093	membank("bank2")->set_entry(data & 0x07);
1094	1094	}
r17788	r17789
1119	1119	WRITE8_MEMBER(cave_state::metmqstr_rombank_w)
1120	1120	{
1121	1121	if (data & ~0x0f)
1122		logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
	1122	logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
1123	1123
1124	1124	membank("bank1")->set_entry(data & 0x0f);
1125	1125	}
r17788	r17789
1167	1167	WRITE8_MEMBER(cave_state::pwrinst2_rombank_w)
1168	1168	{
1169	1169	if (data & ~0x07)
1170		logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
	1170	logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
1171	1171
1172	1172	membank("bank1")->set_entry(data & 0x07);
1173	1173	}
r17788	r17789
1209	1209	WRITE8_MEMBER(cave_state::sailormn_rombank_w)
1210	1210	{
1211	1211	if (data & ~0x1f)
1212		logerror("CPU #1 - PC %04X: Bank %02X\n", cpu_get_pc(&space.device()), data);
	1212	logerror("CPU #1 - PC %04X: Bank %02X\n", space.device().safe_pc(), data);
1213	1213
1214	1214	membank("bank1")->set_entry(data & 0x1f);
1215	1215	}

trunk/src/mame/drivers/atarigt.c

r17788	r17789
283	283	Read ($38488)
284	284	*/
285	285
286		if (LOG_PROTECTION) logerror("%06X:Protection W@%06X = %04X\n", cpu_get_previouspc(&space->device()), offset, data);
	286	if (LOG_PROTECTION) logerror("%06X:Protection W@%06X = %04X\n", space->device().safe_pcbase(), offset, data);
287	287
288	288	/* track accesses */
289	289	tmek_update_mode(state, offset);
r17788	r17789
299	299	static void tmek_protection_r(address_space *space, offs_t offset, UINT16 *data)
300	300	{
301	301	atarigt_state *state = space->machine().driver_data<atarigt_state>();
302		if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", cpu_get_previouspc(&space->device()), offset);
	302	if (LOG_PROTECTION) logerror("%06X:Protection R@%06X\n", space->device().safe_pcbase(), offset);
303	303
304	304	/* track accesses */
305	305	tmek_update_mode(state, offset);
r17788	r17789
368	368	atarigt_state *state = space->machine().driver_data<atarigt_state>();
369	369	if (LOG_PROTECTION)
370	370	{
371		UINT32 pc = cpu_get_previouspc(&space->device());
	371	UINT32 pc = space->device().safe_pcbase();
372	372	switch (pc)
373	373	{
374	374	/* protection code from 20f90 - 21000 */
r17788	r17789
401	401
402	402	/* catch anything else */
403	403	default:
404		logerror("%06X:Unknown protection W@%06X = %04X\n", cpu_get_previouspc(&space->device()), offset, data);
	404	logerror("%06X:Unknown protection W@%06X = %04X\n", space->device().safe_pcbase(), offset, data);
405	405	break;
406	406	}
407	407	}
r17788	r17789
442	442
443	443	if (LOG_PROTECTION)
444	444	{
445		UINT32 pc = cpu_get_previouspc(&space->device());
	445	UINT32 pc = space->device().safe_pcbase();
446	446	UINT32 p1, p2, a6;
447	447	switch (pc)
448	448	{
r17788	r17789
505	505
506	506	/* catch anything else */
507	507	default:
508		logerror("%06X:Unknown protection R@%06X\n", cpu_get_previouspc(&space->device()), offset);
	508	logerror("%06X:Unknown protection R@%06X\n", space->device().safe_pcbase(), offset);
509	509	break;
510	510	}
511	511	}
r17788	r17789
1244	1244
1245	1245	WRITE32_MEMBER(atarigt_state::tmek_pf_w)
1246	1246	{
1247		offs_t pc = cpu_get_pc(&space.device());
	1247	offs_t pc = space.device().safe_pc();
1248	1248
1249	1249	/* protected version */
1250	1250	if (pc == 0x2EB3C || pc == 0x2EB48)
1251	1251	{
1252		logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", cpu_get_pc(&space.device()), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A4) - 2);
	1252	logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A4) - 2);
1253	1253	/* skip these writes to make more stuff visible */
1254	1254	return;
1255	1255	}
1256	1256
1257	1257	/* unprotected version */
1258	1258	if (pc == 0x25834 || pc == 0x25860)
1259		logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", cpu_get_pc(&space.device()), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A3) - 2);
	1259	logerror("%06X:PFW@%06X = %08X & %08X (src=%06X)\n", space.device().safe_pc(), 0xd72000 + offset*4, data, mem_mask, (UINT32)cpu_get_reg(&space.device(), M68K_A3) - 2);
1260	1260
1261	1261	atarigen_playfield32_w(&space, offset, data, mem_mask);
1262	1262	}

trunk/src/mame/drivers/rollerg.c

r17788	r17789
24	24
25	25	WRITE8_MEMBER(rollerg_state::rollerg_0010_w)
26	26	{
27		logerror("%04x: write %02x to 0010\n",cpu_get_pc(&space.device()), data);
	27	logerror("%04x: write %02x to 0010\n",space.device().safe_pc(), data);
28	28
29	29	/* bits 0/1 are coin counters */
30	30	coin_counter_w(machine(), 0, data & 0x01);

trunk/src/mame/drivers/pirates.c

r17788	r17789
123	123	/* bit 7 used (function unknown) */
124	124	}
125	125
126		//  logerror("%06x: out_w %04x\n",cpu_get_pc(&space.device()),data);
	126	//  logerror("%06x: out_w %04x\n",space.device().safe_pc(),data);
127	127	}
128	128
129	129	CUSTOM_INPUT_MEMBER(pirates_state::prot_r)
r17788	r17789
139	139	602e and 62a6 */
140	140	/* For Genix, see 6576 for setting values and 67c2,d3b4 and dbc2 for tests. */
141	141
142		pc = cpu_get_pc(machine().device("main"));
	142	pc = machine().device("main")->safe_pc();
143	143	if (pc == 0x6134)
144	144	{
145	145	bit = prot & 1;

trunk/src/mame/drivers/royalmah.c

r17788	r17789
395	395
396	396	m_suzume_bank = data;
397	397
398		logerror("%04x: bank %02x\n",cpu_get_pc(&space.device()),data);
	398	logerror("%04x: bank %02x\n",space.device().safe_pc(),data);
399	399
400	400	/* bits 6, 4 and 3 used for something input related? */
401	401
r17788	r17789
430	430	UINT8 *rom = memregion("maincpu")->base();
431	431	int address;
432	432
433		logerror("%04x: bank %02x\n",cpu_get_pc(&space.device()),data);
	433	logerror("%04x: bank %02x\n",space.device().safe_pc(),data);
434	434
435	435	if (data == 0) return;   // tontonb fix?
436	436
r17788	r17789
448	448	UINT8 *rom = memregion("maincpu")->base();
449	449	int address;
450	450
451		//logerror("%04x: bank %02x\n",cpu_get_pc(&space.device()),data);
	451	//logerror("%04x: bank %02x\n",space.device().safe_pc(),data);
452	452
453	453	m_dsw_select = data & 0x60;
454	454
r17788	r17789
896	896	case 0x9011:   return ioport("SYSTEM")->read();
897	897	}
898	898
899		logerror("%04X: unmapped input read at %04X\n", cpu_get_pc(&space.device()), offset);
	899	logerror("%04X: unmapped input read at %04X\n", space.device().safe_pc(), offset);
900	900	return 0xff;
901	901	}
902	902
r17788	r17789
925	925	return;
926	926	}
927	927
928		logerror("%04X: unmapped input write at %04X = %02X\n", cpu_get_pc(&space.device()), offset,data);
	928	logerror("%04X: unmapped input write at %04X = %02X\n", space.device().safe_pc(), offset,data);
929	929	}
930	930
931	931	WRITE8_MEMBER(royalmah_state::mjifb_videoram_w)
r17788	r17789
1005	1005	case 0x9011:   return ioport("SYSTEM")->read();
1006	1006	}
1007	1007
1008		logerror("%04X: unmapped input read at %04X\n", cpu_get_pc(&space.device()), offset);
	1008	logerror("%04X: unmapped input read at %04X\n", space.device().safe_pc(), offset);
1009	1009	return 0xff;
1010	1010	}
1011	1011
r17788	r17789
1031	1031	return;
1032	1032	}
1033	1033
1034		logerror("%04X: unmapped input write at %04X = %02X\n", cpu_get_pc(&space.device()), offset,data);
	1034	logerror("%04X: unmapped input write at %04X = %02X\n", space.device().safe_pc(), offset,data);
1035	1035	}
1036	1036
1037	1037	static ADDRESS_MAP_START( mjdejavu_map, AS_PROGRAM, 8, royalmah_state )
r17788	r17789
1123	1123	case 0x03: return ioport("DSW4")->read();
1124	1124	case 0x04: return ioport("DSWTOP")->read();
1125	1125	}
1126		logerror("%04X: unmapped dsw read %02X\n", cpu_get_pc(&space.device()), m_dsw_select);
	1126	logerror("%04X: unmapped dsw read %02X\n", space.device().safe_pc(), m_dsw_select);
1127	1127	return 0xff;
1128	1128	}
1129	1129
r17788	r17789
1192	1192	return rtc->read(space, offset & 0xf);
1193	1193	}
1194	1194
1195		logerror("%04X: unmapped IO read at %04X\n", cpu_get_pc(&space.device()), offset);
	1195	logerror("%04X: unmapped IO read at %04X\n", space.device().safe_pc(), offset);
1196	1196	return 0xff;
1197	1197	}
1198	1198
r17788	r17789
1215	1215	return;
1216	1216	}
1217	1217
1218		logerror("%04X: unmapped IO write at %04X = %02X\n", cpu_get_pc(&space.device()), offset,data);
	1218	logerror("%04X: unmapped IO write at %04X = %02X\n", space.device().safe_pc(), offset,data);
1219	1219	}
1220	1220
1221	1221	WRITE8_MEMBER(royalmah_state::mjvegasa_coin_counter_w)

trunk/src/mame/drivers/mquake.c

r17788	r17789
100	100	static WRITE16_HANDLER( output_w )
101	101	{
102	102	if (ACCESSING_BITS_0_7)
103		logerror("%06x:output_w(%x) = %02x\n", cpu_get_pc(&space->device()), offset, data);
	103	logerror("%06x:output_w(%x) = %02x\n", space->device().safe_pc(), offset, data);
104	104	}
105	105
106	106
r17788	r17789
108	108	{
109	109	if (offset == 1)
110	110	return space->machine().root_device().ioport("COINCHIP")->read();
111		logerror("%06x:coin_chip_r(%02x) & %04x\n", cpu_get_pc(&space->device()), offset, mem_mask);
	111	logerror("%06x:coin_chip_r(%02x) & %04x\n", space->device().safe_pc(), offset, mem_mask);
112	112	return 0xffff;
113	113	}
114	114
115	115	static WRITE16_HANDLER( coin_chip_w )
116	116	{
117		logerror("%06x:coin_chip_w(%02x) = %04x & %04x\n", cpu_get_pc(&space->device()), offset, data, mem_mask);
	117	logerror("%06x:coin_chip_w(%02x) = %04x & %04x\n", space->device().safe_pc(), offset, data, mem_mask);
118	118	}
119	119
120	120	// inputs at 282000, 282002 (full word)

trunk/src/mame/drivers/nmk16.c

r17788	r17789
229	229
230	230	WRITE16_MEMBER(nmk16_state::tharrier_mcu_control_w)
231	231	{
232		//  logerror("%04x: mcu_control_w %02x\n",cpu_get_pc(&space.device()),data);
	232	//  logerror("%04x: mcu_control_w %02x\n",space.device().safe_pc(),data);
233	233	}
234	234
235	235	READ16_MEMBER(nmk16_state::tharrier_mcu_r)
r17788	r17789
245	245
246	246	int res;
247	247
248		if (cpu_get_pc(&space.device())==0x8aa) res = (m_mainram[0x9064/2])|0x20; /* Task Force Harrier */
249		else if (cpu_get_pc(&space.device())==0x8ce) res = (m_mainram[0x9064/2])|0x60; /* Task Force Harrier */
	248	if (space.device().safe_pc()==0x8aa) res = (m_mainram[0x9064/2])|0x20; /* Task Force Harrier */
	249	else if (space.device().safe_pc()==0x8ce) res = (m_mainram[0x9064/2])|0x60; /* Task Force Harrier */
250	250	else
251	251	{
252	252	res = to_main[m_prot_count++];
r17788	r17789
4659	4659	flip_screen_set(data & 1);
4660	4660
4661	4661	if (data & (~1))
4662		logerror("%06x: unknown flip screen bit written %04x\n", cpu_get_pc(&space.device()), data);
	4662	logerror("%06x: unknown flip screen bit written %04x\n", space.device().safe_pc(), data);
4663	4663	}
4664	4664	#endif
4665	4665
r17788	r17789
4708	4708	if (data & (~3))
4709	4709	logerror("%s: invalid oki bank %02x\n", machine().describe_context(), data);
4710	4710
4711		//  logerror("%04x: oki bank %02x\n", cpu_get_pc(&space->device()), data);
	4711	//  logerror("%04x: oki bank %02x\n", space->device().safe_pc(), data);
4712	4712	}
4713	4713
4714	4714	static ADDRESS_MAP_START( twinactn_sound_cpu, AS_PROGRAM, 8, nmk16_state )

trunk/src/emu/debug/dvdisasm.c

r17788	r17789
202	202	case DCH_HOME:            // set the active column to the PC
203	203	{
204	204	const debug_view_disasm_source &source = downcast<const debug_view_disasm_source &>(*m_source);
205		offs_t pc = source.m_space->address_to_byte(cpu_get_pc(&source.m_device)) & source.m_space->logbytemask();
	205	offs_t pc = source.m_space->address_to_byte(source.m_device.safe_pc()) & source.m_space->logbytemask();
206	206
207	207	// figure out which row the pc is on
208	208	for (int curline = 0; curline < m_allocated.y; curline++)
r17788	r17789
468	468	{
469	469	const debug_view_disasm_source &source = downcast<const debug_view_disasm_source &>(*m_source);
470	470
471		offs_t pc = cpu_get_pc(&source.m_device);
	471	offs_t pc = source.m_device.safe_pc();
472	472	offs_t pcbyte = source.m_space->address_to_byte(pc) & source.m_space->logbytemask();
473	473
474	474	// update our context; if the expression is dirty, recompute

trunk/src/emu/cpu/m68000/68340ser.c

r17788	r17789
12	12
13	13	if (serial)
14	14	{
15		int pc = cpu_get_pc(&space->device());
	15	int pc = space->device().safe_pc();
16	16	logerror("%08x m68340_internal_serial_r %08x, (%08x)\n", pc, offset*4,mem_mask);
17	17	}
18	18
r17788	r17789
27	27
28	28	if (serial)
29	29	{
30		int pc = cpu_get_pc(&space->device());
	30	int pc = space->device().safe_pc();
31	31	logerror("%08x m68340_internal_serial_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
32	32	}
33	33

trunk/src/emu/cpu/m68000/68307sim.c

r17788	r17789
10	10	m68307_sim* sim = m68k->m68307SIM;
11	11	assert(sim != NULL);
12	12
13		int pc = cpu_get_pc(&space->device());
	13	int pc = space->device().safe_pc();
14	14
15	15	if (sim)
16	16	{
r17788	r17789
47	47	m68307_sim* sim = m68k->m68307SIM;
48	48	assert(sim != NULL);
49	49
50		int pc = cpu_get_pc(&space->device());
	50	int pc = space->device().safe_pc();
51	51
52	52	if (sim)
53	53	{
r17788	r17789
152	152
153	153	UINT16 m68307_sim::read_padat(address_space *space, UINT16 mem_mask)
154	154	{
155		int pc = cpu_get_pc(&space->device());
	155	int pc = space->device().safe_pc();
156	156	m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
157	157
158	158	if (m68k->m_m68307_porta_r)
r17788	r17789
179	179
180	180	void m68307_sim::write_padat(address_space *space, UINT16 data, UINT16 mem_mask)
181	181	{
182		int pc = cpu_get_pc(&space->device());
	182	int pc = space->device().safe_pc();
183	183	m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
184	184	COMBINE_DATA(&m_padat);
185	185
r17788	r17789
205	205
206	206	UINT16 m68307_sim::read_pbdat(address_space *space, UINT16 mem_mask)
207	207	{
208		int pc = cpu_get_pc(&space->device());
	208	int pc = space->device().safe_pc();
209	209	m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
210	210
211	211	if (m68k->m_m68307_portb_r)
r17788	r17789
232	232
233	233	void m68307_sim::write_pbdat(address_space *space, UINT16 data, UINT16 mem_mask)
234	234	{
235		int pc = cpu_get_pc(&space->device());
	235	int pc = space->device().safe_pc();
236	236	m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
237	237	COMBINE_DATA(&m_pbdat);
238	238

trunk/src/emu/cpu/m68000/68307bus.c

r17788	r17789
14	14
15	15	if (mbus)
16	16	{
17		int pc = cpu_get_pc(&space->device());
	17	int pc = space->device().safe_pc();
18	18
19	19
20	20	switch (offset)
r17788	r17789
61	61
62	62	if (mbus)
63	63	{
64		int pc = cpu_get_pc(&space->device());
	64	int pc = space->device().safe_pc();
65	65
66	66	switch (offset)
67	67	{

trunk/src/emu/cpu/m68000/68307ser.c

r17788	r17789
29	29	else
30	30	{
31	31
32		int pc = cpu_get_pc(&space->device());
	32	int pc = space->device().safe_pc();
33	33
34	34	switch (offset)
35	35	{
r17788	r17789
97	97	m68307_serial* serial = m68k->m68307SERIAL;
98	98	assert(serial != NULL);
99	99
100		int pc = cpu_get_pc(&space->device());
	100	int pc = space->device().safe_pc();
101	101
102	102	if (serial)
103	103	{

trunk/src/emu/cpu/m68000/68340dma.c

r17788	r17789
12	12
13	13	if (dma)
14	14	{
15		int pc = cpu_get_pc(&space->device());
	15	int pc = space->device().safe_pc();
16	16	logerror("%08x m68340_internal_dma_r %08x, (%08x)\n", pc, offset*4,mem_mask);
17	17	}
18	18
r17788	r17789
27	27
28	28	if (dma)
29	29	{
30		int pc = cpu_get_pc(&space->device());
	30	int pc = space->device().safe_pc();
31	31	logerror("%08x m68340_internal_dma_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
32	32	}
33	33	}

trunk/src/emu/cpu/m68000/68340tmu.c

r17788	r17789
13	13
14	14	if (timer)
15	15	{
16		int pc = cpu_get_pc(&space->device());
	16	int pc = space->device().safe_pc();
17	17	logerror("%08x m68340_internal_timer_r %08x, (%08x)\n", pc, offset*4,mem_mask);
18	18	}
19	19
r17788	r17789
28	28
29	29	if (timer)
30	30	{
31		int pc = cpu_get_pc(&space->device());
	31	int pc = space->device().safe_pc();
32	32	logerror("%08x m68340_internal_timer_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
33	33	}
34	34	}

trunk/src/emu/cpu/m68000/68307tmu.c

r17788	r17789
12	12
13	13	if (timer)
14	14	{
15		int pc = cpu_get_pc(&space->device());
	15	int pc = space->device().safe_pc();
16	16	int which = offset & 0x8;
17	17
18	18	switch (offset&0x7)
r17788	r17789
40	40
41	41	if (timer)
42	42	{
43		int pc = cpu_get_pc(&space->device());
	43	int pc = space->device().safe_pc();
44	44	int which = offset & 0x8;
45	45
46	46	switch (offset&0x7)

trunk/src/emu/cpu/m68000/m68kcpu.c

r17788	r17789
2077	2077	{
2078	2078	m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
2079	2079
2080		int pc = cpu_get_pc(&space->device());
	2080	int pc = space->device().safe_pc();
2081	2081	logerror("%08x m68307_internal_base_r %08x, (%04x)\n", pc, offset*2,mem_mask);
2082	2082
2083	2083	switch (offset<<1)
r17788	r17789
2096	2096	{
2097	2097	m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
2098	2098
2099		int pc = cpu_get_pc(&space->device());
	2099	int pc = space->device().safe_pc();
2100	2100	logerror("%08x m68307_internal_base_w %08x, %04x (%04x)\n", pc, offset*2,data,mem_mask);
2101	2101	int base = 0;
2102	2102	//int mask = 0;
r17788	r17789
2764	2764	static READ32_HANDLER( m68340_internal_base_r )
2765	2765	{
2766	2766	m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
2767		int pc = cpu_get_pc(&space->device());
	2767	int pc = space->device().safe_pc();
2768	2768	logerror("%08x m68340_internal_base_r %08x, (%08x)\n", pc, offset*4,mem_mask);
2769	2769	return m68k->m68340_base;
2770	2770	}
r17788	r17789
2773	2773	{
2774	2774	m68ki_cpu_core *m68k = m68k_get_safe_token(&space->device());
2775	2775
2776		int pc = cpu_get_pc(&space->device());
	2776	int pc = space->device().safe_pc();
2777	2777	logerror("%08x m68340_internal_base_w %08x, %08x (%08x)\n", pc, offset*4,data,mem_mask);
2778	2778
2779	2779	// other conditions?

trunk/src/emu/cpu/m68000/68340sim.c

r17788	r17789
12	12
13	13	if (sim)
14	14	{
15		int pc = cpu_get_pc(&space->device());
	15	int pc = space->device().safe_pc();
16	16
17	17	switch (offset<<1)
18	18	{
r17788	r17789
63	63
64	64	if (sim)
65	65	{
66		int pc = cpu_get_pc(&space->device());
	66	int pc = space->device().safe_pc();
67	67
68	68	switch (offset)
69	69	{
r17788	r17789
119	119
120	120	if (sim)
121	121	{
122		int pc = cpu_get_pc(&space->device());
	122	int pc = space->device().safe_pc();
123	123
124	124	switch (offset<<2)
125	125	{
r17788	r17789
149	149
150	150	if (sim)
151	151	{
152		int pc = cpu_get_pc(&space->device());
	152	int pc = space->device().safe_pc();
153	153
154	154	switch (offset<<1)
155	155	{
r17788	r17789
199	199
200	200	if (sim)
201	201	{
202		int pc = cpu_get_pc(&space->device());
	202	int pc = space->device().safe_pc();
203	203
204	204	switch (offset)
205	205	{
r17788	r17789
252	252
253	253	if (sim)
254	254	{
255		int pc = cpu_get_pc(&space->device());
	255	int pc = space->device().safe_pc();
256	256
257	257	switch (offset<<2)
258	258	{

trunk/src/emu/cpu/tms34010/tms34010.c

r17788	r17789
1224	1224	break;
1225	1225
1226	1226	case REG_PMASK:
1227		if (data) logerror("Plane masking not supported. PC=%08X\n", cpu_get_pc(&space->device()));
	1227	if (data) logerror("Plane masking not supported. PC=%08X\n", space->device().safe_pc());
1228	1228	break;
1229	1229
1230	1230	case REG_DPYCTL:
r17788	r17789
1375	1375
1376	1376	case REG020_PMASKL:
1377	1377	case REG020_PMASKH:
1378		if (data) logerror("Plane masking not supported. PC=%08X\n", cpu_get_pc(&space->device()));
	1378	if (data) logerror("Plane masking not supported. PC=%08X\n", space->device().safe_pc());
1379	1379	break;
1380	1380
1381	1381	case REG020_DPYCTL:

trunk/src/emu/cpu/tms34010/34010gfx.c

r17788	r17789
84	84	int diff, cycles = 3;
85	85
86	86	if (WINDOW_CHECKING(tms) == 2)
87		logerror("%08x: %s apply_window window mode %d not supported!\n", cpu_get_pc(tms->device), inst_name, WINDOW_CHECKING(tms));
	87	logerror("%08x: %s apply_window window mode %d not supported!\n", tms->device->safe_pc(), inst_name, WINDOW_CHECKING(tms));
88	88
89	89	CLR_V(tms);
90	90	if (WINDOW_CHECKING(tms) == 1)

trunk/src/emu/cpu/tlcs90/tlcs90.c

r17788	r17789
1967	1967	break;
1968	1968
1969	1969	default:
1970		fatalerror("%04x: unimplemented opcode, op=%02x\n",cpu_get_pc(device),cpustate->op);
	1970	fatalerror("%04x: unimplemented opcode, op=%02x\n",device->safe_pc(),cpustate->op);
1971	1971	}
1972	1972
1973	1973	if ( cpustate->op != EI )

trunk/src/emu/cpu/m6502/opsce02.h

r17788	r17789
291	291	t1=RDOPARG();                           \
292	292	t2=RDOPARG();                           \
293	293	t3=RDOPARG();                           \
294		logerror("m65ce02 at pc:%.4x reserved op aug %.2x %.2x %.2x\n", cpu_get_pc(cpustate->device),t1,t2,t3);
	294	logerror("m65ce02 at pc:%.4x reserved op aug %.2x %.2x %.2x\n", cpustate->device->safe_pc(),t1,t2,t3);
295	295
296	296	/* 65ce02 ******************************************************
297	297	*  BBR Branch if bit is reset

trunk/src/emu/cpu/sh2/sh2comn.c

r17788	r17789
522	522	//      logerror("sh2_internal_w:  Write %08x (%x), %08x @ %08x\n", 0xfffffe00+offset*4, offset, data, mem_mask);
523	523
524	524	//    if(offset != 0x20)
525		//        printf("sh2_internal_w:  Write %08x (%x), %08x @ %08x (PC %x)\n", 0xfffffe00+offset*4, offset, data, mem_mask, cpu_get_pc(&space->device()));
	525	//        printf("sh2_internal_w:  Write %08x (%x), %08x @ %08x (PC %x)\n", 0xfffffe00+offset*4, offset, data, mem_mask, space->device().safe_pc());
526	526
527	527	switch( offset )
528	528	{

trunk/src/emu/cpu/m6800/m6800.c

r17788	r17789
1601	1601	case IO_ICR2H:
1602	1602	case IO_ICR2L:
1603	1603	default:
1604		logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space->device().tag(),cpu_get_pc(&space->device()),offset);
	1604	logerror("M6801 '%s' PC %04x: warning - read from reserved internal register %02x\n",space->device().tag(),space->device().safe_pc(),offset);
1605	1605	}
1606	1606
1607	1607	return data;
r17788	r17789
1635	1635	write_port2(cpustate);
1636	1636
1637	1637	if (cpustate->port2_ddr & 2)
1638		logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->device().tag(),cpu_get_pc(&space->device()));
	1638	logerror("CPU '%s' PC %04x: warning - port 2 bit 1 set as output (OLVL) - not supported\n",space->device().tag(),space->device().safe_pc());
1639	1639	}
1640	1640	break;
1641	1641
r17788	r17789
1770	1770	case IO_ICRH:
1771	1771	case IO_ICRL:
1772	1772	case IO_RDR:
1773		//logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->device().tag(),cpu_get_pc(&space->device()),data,offset);
	1773	//logerror("CPU '%s' PC %04x: warning - write %02x to read only internal register %02x\n",space->device().tag(),space->device().safe_pc(),data,offset);
1774	1774	break;
1775	1775
1776	1776	case IO_P3CSR:
r17788	r17789
1832	1832	case IO_ICR2H:
1833	1833	case IO_ICR2L:
1834	1834	default:
1835		logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->device().tag(),cpu_get_pc(&space->device()),data,offset);
	1835	logerror("M6801 '%s' PC %04x: warning - write %02x to reserved internal register %02x\n",space->device().tag(),space->device().safe_pc(),data,offset);
1836	1836	break;
1837	1837	}
1838	1838	}

trunk/src/emu/video/hd63484.c

r17788	r17789
1468	1468
1469	1469	READ16_DEVICE_HANDLER( hd63484_status_r )
1470	1470	{
1471		//  if (cpu_get_pc(&space->device()) != 0xfced6 && cpu_get_pc(&space->device()) != 0xfe1d6)
1472		//      logerror("%05x: HD63484 status read\n",cpu_get_pc(&space->device()));
	1471	//  if (space->device().safe_pc() != 0xfced6 && space->device().safe_pc() != 0xfe1d6)
	1472	//      logerror("%05x: HD63484 status read\n",space->device().safe_pc());
1473	1473
1474	1474	return 0xff22 | (device->machine().rand() & 0x0004);   /* write FIFO ready + command end    +  (read FIFO ready or read FIFO not ready) */
1475	1475	}
r17788	r17789
1496	1496	hd63484->regno += 2;   /* autoincrement */
1497	1497
1498	1498	#if LOG_COMMANDS
1499		//  logerror("PC %05x: HD63484 register %02x write %04x\n", cpu_get_pc(&space->device()), hd63484->regno, hd63484->reg[hd63484->regno/2]);
	1499	//  logerror("PC %05x: HD63484 register %02x write %04x\n", space->device().safe_pc(), hd63484->regno, hd63484->reg[hd63484->regno/2]);
1500	1500	#endif
1501	1501
1502	1502	if (hd63484->regno == 0)   /* FIFO */
r17788	r17789
1513	1513	else if (hd63484->regno == 0)
1514	1514	{
1515	1515	#if LOG_COMMANDS
1516		//      logerror("%05x: HD63484 read FIFO\n", cpu_get_pc(&space->device()));
	1516	//      logerror("%05x: HD63484 read FIFO\n", space->device().safe_pc());
1517	1517	#endif
1518	1518	res = hd63484->readfifo;
1519	1519	}
1520	1520	else
1521	1521	{
1522	1522	#if LOG_COMMANDS
1523		//      logerror("%05x: HD63484 read register %02x\n", cpu_get_pc(&space->device()), hd63484->regno);
	1523	//      logerror("%05x: HD63484 read register %02x\n", space->device().safe_pc(), hd63484->regno);
1524	1524	#endif
1525	1525	res = 0;
1526	1526	}

trunk/src/emu/video/voodoo.c

r17788	r17789
3866	3866	/* don't log multiple identical status reads from the same address */
3867	3867	if (regnum == status)
3868	3868	{
3869		offs_t pc = cpu_get_pc(v->cpu);
	3869	offs_t pc = v->cpu->safe_pc();
3870	3870	if (pc == v->last_status_pc && result == v->last_status_value)
3871	3871	logit = FALSE;
3872	3872	v->last_status_pc = pc;

trunk/src/emu/video/pc_vga.c

r17788	r17789
1667	1667	data = vga_crtc_r(space, offset);
1668	1668	if(offset == 8)
1669	1669	{
1670		logerror("VGA: 0x3d8 read at %08x\n",cpu_get_pc(&space->device()));
	1670	logerror("VGA: 0x3d8 read at %08x\n",space->device().safe_pc());
1671	1671	data = 0; // TODO: PC-200 reads back CGA register here, everything else returns open bus OR CGA emulation of register 0x3d8
1672	1672	}
1673	1673

trunk/src/emu/distate.c

r17788	r17789
523	523	m_state_list.append(*entry);
524	524
525	525	// set the fast entry if applicable
526		if (index >= k_fast_state_min && index <= k_fast_state_max)
527		m_fast_state[index - k_fast_state_min] = entry;
	526	if (index >= FAST_STATE_MIN && index <= FAST_STATE_MAX)
	527	m_fast_state[index - FAST_STATE_MIN] = entry;
528	528
529	529	return *entry;
530	530	}
r17788	r17789
595	595	const device_state_entry *device_state_interface::state_find_entry(int index)
596	596	{
597	597	// use fast lookup if possible
598		if (index >= k_fast_state_min && index <= k_fast_state_max)
599		return m_fast_state[index - k_fast_state_min];
	598	if (index >= FAST_STATE_MIN && index <= FAST_STATE_MAX)
	599	return m_fast_state[index - FAST_STATE_MIN];
600	600
601	601	// otherwise, scan the first
602	602	for (const device_state_entry *entry = m_state_list.first(); entry != NULL; entry = entry->m_next)

trunk/src/emu/distate.h

r17788	r17789
186	186	const device_state_entry *state_find_entry(int index);
187	187
188	188	// constants
189		static const int k_fast_state_min = -4;                     // range for fast state
190		static const int k_fast_state_max = 256;                  // lookups
	189	static const int FAST_STATE_MIN = -4;                     // range for fast state
	190	static const int FAST_STATE_MAX = 256;                     // lookups
191	191
192	192	// state
193	193	simple_list<device_state_entry>         m_state_list;         // head of state list
194		device_state_entry *               m_fast_state[k_fast_state_max + 1 - k_fast_state_min];
	194	device_state_entry *               m_fast_state[FAST_STATE_MAX + 1 - FAST_STATE_MIN];
195	195	// fast access to common entries
196	196	};
197	197
r17788	r17789
205	205	//**************************************************************************
206	206
207	207	//-------------------------------------------------
	208	//  device_t::safe_pc - return the current PC
	209	//   or 0 if no state object exists
	210	//-------------------------------------------------
	211
	212	inline offs_t device_t::safe_pc()
	213	{
	214	return (m_state != NULL) ? m_state->pc() : 0;
	215	}
	216
	217
	218	//-------------------------------------------------
	219	//  device_t::safe_pcbase - return the current PC
	220	//   base or 0 if no state object exists
	221	//-------------------------------------------------
	222
	223	inline offs_t device_t::safe_pcbase()
	224	{
	225	return (m_state != NULL) ? m_state->pcbase() : 0;
	226	}
	227
	228
	229	//-------------------------------------------------
208	230	//  device_state - return a pointer to the device
209	231	//  state interface for this device
210	232	//-------------------------------------------------

trunk/src/emu/sound/nile.c

r17788	r17789
78	78
79	79	COMBINE_DATA(&info->ctrl);
80	80
81		//  printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, cpu_get_pc(&space->device()));
	81	//  printf("CTRL: %04x -> %04x (PC=%x)\n", ctrl, info->ctrl, space->device().safe_pc());
82	82
83	83	ctrl^=info->ctrl;
84	84	}
r17788	r17789
133	133	info->vpos[v] = info->frac[v] = info->lponce[v] = 0;
134	134	}
135	135
136		//printf("v%02d: %04x to reg %02d (PC=%x)\n", v, info->sound_regs[offset], r, cpu_get_pc(&space->device()));
	136	//printf("v%02d: %04x to reg %02d (PC=%x)\n", v, info->sound_regs[offset], r, space->device().safe_pc());
137	137	}
138	138
139	139	static STREAM_UPDATE( nile_update )

trunk/src/emu/devcpu.h

r17788	r17789
294	294
295	295	// CPU timing
296	296	#define cpu_get_reg(cpu, _reg)            device_state(cpu)->state(_reg)
297		#define   cpu_get_previouspc(cpu)            ((offs_t)device_state(cpu)->state(STATE_GENPCBASE))
298		#define   cpu_get_pc(cpu)                  ((offs_t)device_state(cpu)->state(STATE_GENPC))
299
300	297	#define cpu_set_reg(cpu, _reg, val)         device_state(cpu)->set_state(_reg, val)
301	298
302	299	// helpers for using machine/cputag instead of cpu objects

trunk/src/emu/device.h

r17788	r17789
230	230
231	231	// debugging
232	232	device_debug *debug() const { return m_debug; }
	233	offs_t safe_pc();
	234	offs_t safe_pcbase();
233	235
234	236	void set_default_bios(UINT8 bios) { m_default_bios = bios; }
235	237	void set_system_bios(UINT8 bios) { m_system_bios = bios; }

trunk/src/emu/machine/ldpr8210.c

r17788	r17789
544	544	break;
545	545
546	546	default:
547		mame_printf_debug("%03X:Unknown PR-8210 PIA read from offset %02X\n", cpu_get_pc(&space.device()), offset);
	547	mame_printf_debug("%03X:Unknown PR-8210 PIA read from offset %02X\n", space.device().safe_pc(), offset);
548	548	break;
549	549	}
550	550	return result;
r17788	r17789
616	616
617	617	// no other writes known
618	618	default:
619		mame_printf_debug("%03X:Unknown PR-8210 PIA write to offset %02X = %02X\n", cpu_get_pc(&space.device()), offset, data);
	619	mame_printf_debug("%03X:Unknown PR-8210 PIA write to offset %02X = %02X\n", space.device().safe_pc(), offset, data);
620	620	break;
621	621	}
622	622	}
r17788	r17789
1097	1097	{
1098	1098	int direction = (data & 0x08) ? 1 : -1;
1099	1099	if (LOG_SIMUTREK)
1100		printf("%3d:JUMP TRG (Simutrek PC=%03X)\n", screen().vpos(), cpu_get_pc(&space.device()));
	1100	printf("%3d:JUMP TRG (Simutrek PC=%03X)\n", screen().vpos(), space.device().safe_pc());
1101	1101	advance_slider(direction);
1102	1102	}
1103	1103
1104	1104	// bit $04 controls who owns the JUMP TRG command
1105	1105	if (LOG_SIMUTREK && ((data ^ prev) & 0x04))
1106		printf("%3d:Simutrek ownership line = %d (Simutrek PC=%03X)\n", screen().vpos(), (data >> 2) & 1, cpu_get_pc(&space.device()));
	1106	printf("%3d:Simutrek ownership line = %d (Simutrek PC=%03X)\n", screen().vpos(), (data >> 2) & 1, space.device().safe_pc());
1107	1107	m_controlnext = (~data >> 2) & 1;
1108	1108
1109	1109	// bits $03 control something (status?)

trunk/src/emu/machine/ldvp931.c

r17788	r17789
382	382
383	383	if (LOG_PORTS && (m_i8049_out0 ^ data) & 0xff)
384	384	{
385		printf("%03X:out0:", cpu_get_pc(&space.device()));
	385	printf("%03X:out0:", space.device().safe_pc());
386	386	if ( (data & 0x80)) printf(" ???");
387	387	if ( (data & 0x40)) printf(" LED1");
388	388	if ( (data & 0x20)) printf(" LED2");
r17788	r17789
422	422
423	423	if (LOG_PORTS && (m_i8049_out1 ^ data) & 0x08)
424	424	{
425		mame_printf_debug("%03X:out1:", cpu_get_pc(&space.device()));
	425	mame_printf_debug("%03X:out1:", space.device().safe_pc());
426	426	if (!(data & 0x08)) mame_printf_debug(" SMS");
427	427	mame_printf_debug("\n");
428	428	m_i8049_out1 = data;
r17788	r17789
570	570
571	571	if (LOG_PORTS && (m_i8049_port1 ^ data) & 0x1f)
572	572	{
573		printf("%03X:port1:", cpu_get_pc(&space.device()));
	573	printf("%03X:port1:", space.device().safe_pc());
574	574	if (!(data & 0x10)) printf(" SPEED");
575	575	if (!(data & 0x08)) printf(" TIMENABLE");
576	576	if (!(data & 0x04)) printf(" REV");

trunk/src/emu/machine/k056230.c

r17788	r17789
82	82	}
83	83	}
84	84
85		//  mame_printf_debug("k056230_r: %d at %08X\n", offset, cpu_get_pc(&space->device()));
	85	//  mame_printf_debug("k056230_r: %d at %08X\n", offset, space->device().safe_pc());
86	86
87	87	return 0;
88	88	}
r17788	r17789
132	132	break;
133	133	}
134	134	}
135		//  mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, cpu_get_pc(&space->device()));
	135	//  mame_printf_debug("k056230_w: %d, %02X at %08X\n", offset, data, space->device().safe_pc());
136	136	}
137	137
138	138	READ32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_r)
139	139	{
140		//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, cpu_get_pc(&space->device()));
	140	//mame_printf_debug("LANC_RAM_r: %08X, %08X at %08X\n", offset, mem_mask, space->device().safe_pc());
141	141	return m_ram[offset & 0x7ff];
142	142	}
143	143
144	144	WRITE32_DEVICE_HANDLER_TRAMPOLINE(k056230, lanc_ram_w)
145	145	{
146		//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, cpu_get_pc(&space->device()));
	146	//mame_printf_debug("LANC_RAM_w: %08X, %08X, %08X at %08X\n", data, offset, mem_mask, space->device().safe_pc());
147	147	COMBINE_DATA(m_ram + (offset & 0x7ff));
148	148	}

trunk/src/emu/machine/53c810.c

r17788	r17789
393	393
394	394	UINT8 lsi53c810_device::lsi53c810_reg_r( int offset )
395	395	{
396		//   logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, cpu_get_pc(&space->device()));
	396	//   logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, space->device().safe_pc());
397	397	switch(offset)
398	398	{
399	399	case 0x00:      /* SCNTL0 */
r17788	r17789
476	476
477	477	void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data)
478	478	{
479		//   logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, cpu_get_pc(&space->device()));
	479	//   logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, space->device().safe_pc());
480	480	switch(offset)
481	481	{
482	482	case 0x00:      /* SCNTL0 */

trunk/src/emu/machine/wd33c93.c

r17788	r17789
487	487
488	488	case 1:
489	489	{
490		LOG(( "WD33C93: PC=%08x - Write REG=%02x, data = %02x\n", cpu_get_pc(&space.device()), sasr, data ));
	490	LOG(( "WD33C93: PC=%08x - Write REG=%02x, data = %02x\n", space.device().safe_pc(), sasr, data ));
491	491
492	492	/* update the register */
493	493	regs[sasr] = data;
r17788	r17789
495	495	/* if we receive a command, schedule to process it */
496	496	if ( sasr == WD_COMMAND )
497	497	{
498		LOG(( "WDC33C93: PC=%08x - Executing command %08x - unit %d\n", cpu_get_pc(&space.device()), data, getunit() ));
	498	LOG(( "WDC33C93: PC=%08x - Executing command %08x - unit %d\n", space.device().safe_pc(), data, getunit() ));
499	499
500	500	/* signal we're processing it */
501	501	regs[WD_AUXILIARY_STATUS] |= ASR_CIP;
r17788	r17789
646	646	irq_callback(machine(), 0);
647	647	}
648	648
649		LOG(( "WD33C93: PC=%08x - Status read (%02x)\n", cpu_get_pc(&space.device()), regs[WD_SCSI_STATUS] ));
	649	LOG(( "WD33C93: PC=%08x - Status read (%02x)\n", space.device().safe_pc(), regs[WD_SCSI_STATUS] ));
650	650	}
651	651	else if ( sasr == WD_DATA )
652	652	{
r17788	r17789
715	715	}
716	716	}
717	717
718		LOG(( "WD33C93: PC=%08x - Data read (%02x)\n", cpu_get_pc(&space.device()), regs[WD_DATA] ));
	718	LOG(( "WD33C93: PC=%08x - Data read (%02x)\n", space.device().safe_pc(), regs[WD_DATA] ));
719	719
720	720	/* get the register value */
721	721	ret = regs[sasr];

trunk/src/emu/machine/ncr539x.c

r17788	r17789
346	346
347	347	#if VERBOSE
348	348	#if VERBOSE_READS
349		printf("539x: Read @ %s (%02x) (PC=%x) (status %02x irq_status %02x)\n", rdregs[offset], offset, cpu_get_pc(&space.device()), m_status, m_irq_status);
	349	printf("539x: Read @ %s (%02x) (PC=%x) (status %02x irq_status %02x)\n", rdregs[offset], offset, space.device().safe_pc(), m_status, m_irq_status);
350	350	#endif
351	351	#endif
352	352
r17788	r17789
377	377	update_fifo_internal_state(fifo_bytes);
378	378
379	379	#if VERBOSE
380		printf("Read %02x from FIFO[%d], FIFO now contains %d bytes (PC=%x, m_buffer_remaining %x)\n", rv, m_fifo_ptr-1, fifo_bytes, cpu_get_pc(&space.device()), m_buffer_remaining);
	380	printf("Read %02x from FIFO[%d], FIFO now contains %d bytes (PC=%x, m_buffer_remaining %x)\n", rv, m_fifo_ptr-1, fifo_bytes, space.device().safe_pc(), m_buffer_remaining);
381	381	#endif
382	382
383	383	if (fifo_bytes == 0)
r17788	r17789
484	484	WRITE8_MEMBER( ncr539x_device::write )
485	485	{
486	486	#if VERBOSE
487		if (offset != 2) printf("539x: Write %02x @ %s (%02x) (PC=%x)\n", data, wrregs[offset], offset, cpu_get_pc(&space.device()));
	487	if (offset != 2) printf("539x: Write %02x @ %s (%02x) (PC=%x)\n", data, wrregs[offset], offset, space.device().safe_pc());
488	488	#endif
489	489
490	490	switch (offset)

trunk/src/emu/machine/ldv1000.c

r17788	r17789
469	469	WRITE8_MEMBER( pioneer_ldv1000_device::z80_controller_w )
470	470	{
471	471	if (LOG_STATUS_CHANGES && data != m_status)
472		printf("%04X:CONTROLLER.W=%02X\n", cpu_get_pc(&space.device()), data);
	472	printf("%04X:CONTROLLER.W=%02X\n", space.device().safe_pc(), data);
473	473	m_status = data;
474	474	}
475	475

trunk/src/emu/machine/am53cf96.c

r17788	r17789
32	32
33	33	if (offset == REG_FIFO)
34	34	{
35		//      mame_printf_debug("53cf96: read FIFO PC=%x\n", cpu_get_pc(&space.device()));
	35	//      mame_printf_debug("53cf96: read FIFO PC=%x\n", space.device().safe_pc());
36	36	return 0;
37	37	}
38	38
39		//  logerror("53cf96: read reg %d = %x (PC=%x)\n", reg, rv>>shift, cpu_get_pc(&space.device()));
	39	//  logerror("53cf96: read reg %d = %x (PC=%x)\n", reg, rv>>shift, space.device().safe_pc());
40	40
41	41	if (offset == REG_IRQSTATE)
42	42	{
r17788	r17789
55	55
56	56	WRITE8_MEMBER( am53cf96_device::write )
57	57	{
58		//  logerror("53cf96: w %x to reg %d (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
	58	//  logerror("53cf96: w %x to reg %d (PC=%x)\n", data, offset, space.device().safe_pc());
59	59
60	60	// if writing to the target ID, cache it off for later
61	61	if (offset == REG_STATUS)
r17788	r17789
93	93	case 2: // reset device
94	94	scsi_regs[REG_IRQSTATE] = 8;   // indicate success
95	95
96		logerror("53cf96: reset  target ID = %d (PC = %x)\n", last_id, cpu_get_pc(&space.device()));
	96	logerror("53cf96: reset  target ID = %d (PC = %x)\n", last_id, space.device().safe_pc());
97	97	if (devices[last_id])
98	98	{
99	99	devices[last_id]->reset();
r17788	r17789
121	121	scsi_regs[REG_INTSTATE] = 4;
122	122	}
123	123
124		logerror("53cf96: command %x exec.  target ID = %d (PC = %x)\n", fifo[1], last_id, cpu_get_pc(&space.device()));
	124	logerror("53cf96: command %x exec.  target ID = %d (PC = %x)\n", fifo[1], last_id, space.device().safe_pc());
125	125	if (devices[last_id])
126	126	{
127	127	int length;

trunk/src/emu/machine/tmp68301.c

r17788	r17789
166	166
167	167	if (!ACCESSING_BITS_0_7)   return;
168	168
169		//  logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",cpu_get_pc(&space->device()),offset*2,data,mem_mask^0xffff);
	169	//  logerror("CPU #0 PC %06X: TMP68301 Reg %04X<-%04X & %04X\n",space->device().safe_pc(),offset*2,data,mem_mask^0xffff);
170	170
171	171	switch( offset * 2 )
172	172	{

trunk/src/mess/devices/sonydriv.c

r17788	r17789
271	271	if (LOG_SONY_EXTRA)
272	272	{
273	273	printf("sony.status(): action=%x pc=0x%08x%s\n",
274		action, (int) cpu_get_pc(device->machine().firstcpu), sony.floppy_enable ? "" : " (no drive enabled)");
	274	action, (int) device->machine().firstcpu->safe_pc(), sony.floppy_enable ? "" : " (no drive enabled)");
275	275	}
276	276
277	277	if ((! sony_enable2()) && sony.floppy_enable)
r17788	r17789
333	333	}
334	334	break;
335	335	case 0x0a:   /* At track 0: 0=track zero 1=not track zero */
336		logerror("sony.status(): reading Track 0 pc=0x%08x\n", (int) cpu_get_pc(device->machine().firstcpu));
	336	logerror("sony.status(): reading Track 0 pc=0x%08x\n", (int) device->machine().firstcpu->safe_pc());
337	337	if (cur_image)
338	338	result = floppy_tk00_r(&cur_image->device());
339	339	else
r17788	r17789
407	407	if (LOG_SONY)
408	408	{
409	409	logerror("sony_doaction(): action=%d pc=0x%08x%s\n",
410		action, (int) cpu_get_pc(device->machine().firstcpu), (sony.floppy_enable) ? "" : " (MOTOR OFF)");
	410	action, (int) device->machine().firstcpu->safe_pc(), (sony.floppy_enable) ? "" : " (MOTOR OFF)");
411	411	}
412	412
413	413	if (sony.floppy_enable)

trunk/src/mess/audio/mea8000.c

r17788	r17789
556	556	case 1:
557	557	/* ready to accept next frame */
558	558	#if 0
559		LOG(( "$%04x %f: mea8000_r ready=%i\n", cpu_get_previouspc( device->machine().firstcpu ), machine.time().as_double(), mea8000_accept_byte( mea8000 ) ));
	559	LOG(( "$%04x %f: mea8000_r ready=%i\n", device->machine().firstcpu ->safe_pcbase( ), machine.time().as_double(), mea8000_accept_byte( mea8000 ) ));
560	560	#endif
561	561	return mea8000_accept_byte(mea8000) << 7;
562	562
563	563	default:
564		logerror( "$%04x mea8000_r invalid read offset %i\n",  cpu_get_previouspc( device->machine().firstcpu ), offset );
	564	logerror( "$%04x mea8000_r invalid read offset %i\n",  device->machine().firstcpu ->safe_pcbase( ), offset );
565	565	}
566	566	return 0;
567	567	}
r17788	r17789
577	577	{
578	578	/* got pitch byte before first frame */
579	579	mea8000->pitch = 2 * data;
580		LOG(( "$%04x %f: mea8000_w pitch %i\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), mea8000->pitch ));
	580	LOG(( "$%04x %f: mea8000_w pitch %i\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), mea8000->pitch ));
581	581	mea8000->state = MEA8000_WAIT_FIRST;
582	582	mea8000->bufpos = 0;
583	583	}
584	584	else if (mea8000->bufpos == 4)
585	585	{
586	586	/* overflow */
587		LOG(( "$%04x %f: mea8000_w data overflow %02X\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), data ));
	587	LOG(( "$%04x %f: mea8000_w data overflow %02X\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), data ));
588	588	}
589	589	else
590	590	{
591	591	/* enqueue frame byte */
592		LOG(( "$%04x %f: mea8000_w data %02X in frame pos %i\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(),
	592	LOG(( "$%04x %f: mea8000_w data %02X in frame pos %i\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(),
593	593	data, mea8000->bufpos ));
594	594	mea8000->buf[mea8000->bufpos] = data;
595	595	mea8000->bufpos++;
r17788	r17789
623	623	mea8000_stop_frame(device->machine(), mea8000);
624	624
625	625	LOG(( "$%04x %f: mea8000_w command %02X stop=%i cont=%i roe=%i\n",
626		cpu_get_previouspc(device->machine().firstcpu), device->machine().time().as_double(), data,
	626	device->machine().firstcpu->safe_pcbase(), device->machine().time().as_double(), data,
627	627	stop, mea8000->cont, mea8000->roe ));
628	628
629	629	mea8000_update_req(device);
r17788	r17789
631	631	}
632	632
633	633	default:
634		logerror( "$%04x mea8000_w invalid write offset %i\n", cpu_get_previouspc( device->machine().firstcpu ), offset );
	634	logerror( "$%04x mea8000_w invalid write offset %i\n", device->machine().firstcpu ->safe_pcbase( ), offset );
635	635	}
636	636	}
637	637

trunk/src/mess/machine/dgn_beta.c

r17788	r17789
265	265	int                  MapPage;
266	266	char                page_num[10];
267	267
268		LOG_BANK_UPDATE(("\n\nUpdating banks %d to %d at PC=$%X\n",first,last,cpu_get_pc(&space_0->device())));
	268	LOG_BANK_UPDATE(("\n\nUpdating banks %d to %d at PC=$%X\n",first,last,space_0->device().safe_pc()));
269	269	for(Page=first;Page<=last;Page++)
270	270	{
271	271	sprintf(page_num,"bank%d",Page+1);

trunk/src/mess/machine/a2mockingboard.c

r17788	r17789
161	161
162	162	UINT8 a2bus_ayboard_device::read_cnxx(address_space &space, UINT8 offset)
163	163	{
164		//    printf("Mockingboard(%d): read @ Cn%02X (PC=%x)\n", m_slot, offset, cpu_get_pc(&space.device()));
	164	//    printf("Mockingboard(%d): read @ Cn%02X (PC=%x)\n", m_slot, offset, space.device().safe_pc());
165	165	if (m_isPhasor)
166	166	{
167	167	UINT8 retVal = 0;
r17788	r17789
227	227	viaSel = (offset & 0x80) ? 2 : 1;
228	228	}
229	229
230		//            printf("Phasor(%d): write %02x to Cn%02X (PC=%x) (native %d viaSel %d)\n", m_slot, data, offset, cpu_get_pc(&space.device()), m_PhasorNative ? 1 : 0, viaSel);
	230	//            printf("Phasor(%d): write %02x to Cn%02X (PC=%x) (native %d viaSel %d)\n", m_slot, data, offset, space.device().safe_pc(), m_PhasorNative ? 1 : 0, viaSel);
231	231
232	232	if (viaSel & 1)
233	233	{
r17788	r17789
251	251	}
252	252	else
253	253	{
254		printf("Mockingboard(%d): unk write %02x to Cn%02X (PC=%x)\n", m_slot, data, offset, cpu_get_pc(&space.device()));
	254	printf("Mockingboard(%d): unk write %02x to Cn%02X (PC=%x)\n", m_slot, data, offset, space.device().safe_pc());
255	255	}
256	256	}
257	257	}

trunk/src/mess/machine/pokemini.c

r17788	r17789
395	395	static const int timer_to_cycles_fast[8] = { 2, 8, 32, 64, 128, 256, 1024, 4096 };
396	396	static const int timer_to_cycles_slow[8] = { 128, 256, 512, 1024, 2048, 4096, 8192, 16384 };
397	397
398		//logerror( "%0X: Write to hardware address: %02X, %02X\n", cpu_get_pc( &space->device() ), offset, data );
	398	//logerror( "%0X: Write to hardware address: %02X, %02X\n", space->device() .safe_pc( ), offset, data );
399	399
400	400	switch( offset )
401	401	{
r17788	r17789
409	409	case 0x02:   /* CPU related?
410	410	Bit 0-7 R/W Unknown
411	411	*/
412		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", cpu_get_pc( device->machine().firstcpu ), offset, data );
	412	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", device->machine().firstcpu ->safe_pc( ), offset, data );
413	413	break;
414	414	case 0x08:   /* Seconds-timer control
415	415	Bit 0   R/W Timer enable
r17788	r17789
441	441	Bit 5   R   Battery status: 0 - battery OK, 1 - battery low
442	442	Bit 6-7     Unused
443	443	*/
444		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", cpu_get_pc( device->machine().firstcpu ), offset, data );
	444	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", device->machine().firstcpu ->safe_pc( ), offset, data );
445	445	break;
446	446	case 0x18:   /* Timer 1 pre-scale + enable
447	447	Bit 0-2 R/W low timer 1 prescaler select
r17788	r17789
956	956	*/
957	957	case 0x35:   /* Timer 1 sound-pivot (high, unused)
958	958	*/
959		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", cpu_get_pc( device->machine().firstcpu ), offset, data );
	959	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", device->machine().firstcpu ->safe_pc( ), offset, data );
960	960	break;
961	961	case 0x36:   /* Timer 1 counter (low), read only
962	962	*/
r17788	r17789
1035	1035	*/
1036	1036	case 0x3D:   /* Timer 2 sound-pivot (high, unused)
1037	1037	*/
1038		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", cpu_get_pc( device->machine().firstcpu ), offset, data );
	1038	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", device->machine().firstcpu ->safe_pc( ), offset, data );
1039	1039	break;
1040	1040	case 0x3E:   /* Timer 2 counter (low), read only
1041	1041	Bit 0-7 R/W Timer 2 counter value bit 0-7
r17788	r17789
1300	1300	Map size 2: 0x00 to 0x60
1301	1301	Bit 7       Unused
1302	1302	*/
1303		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", cpu_get_pc( device->machine().firstcpu ), offset, data );
	1303	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", device->machine().firstcpu ->safe_pc( ), offset, data );
1304	1304	break;
1305	1305	case 0x87:   /* Sprite tile data memory offset (low)
1306	1306	Bit 0-5     Always "0"
r17788	r17789
1341	1341	//      lcd_data_w( data );
1342	1342	break;
1343	1343	default:
1344		logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", cpu_get_pc( device->machine().firstcpu ), offset, data );
	1344	logerror( "%0X: Write to unknown hardware address: %02X, %02X\n", device->machine().firstcpu ->safe_pc( ), offset, data );
1345	1345	break;
1346	1346	}
1347	1347	state->m_pm_reg[offset] = data;

trunk/src/mess/machine/mos6530.c

r17788	r17789
227	227	if (!port->out_port_func.isnull())
228	228	port->out_port_func(0, data);
229	229	else
230		logerror("6530MIOT chip %s: Port %c is being written to but has no handler.  PC: %08X - %02X\n", device->tag(), 'A' + (offset & 1), cpu_get_pc(device->machine().firstcpu), data);
	230	logerror("6530MIOT chip %s: Port %c is being written to but has no handler.  PC: %08X - %02X\n", device->tag(), 'A' + (offset & 1), device->machine().firstcpu->safe_pc(), data);
231	231	}
232	232	}
233	233	}
r17788	r17789
289	289	port->in = port->in_port_func(0);
290	290	}
291	291	else
292		logerror("6530MIOT chip %s: Port %c is being read but has no handler.  PC: %08X\n", device->tag(), 'A' + (offset & 1), cpu_get_pc(device->machine().firstcpu));
	292	logerror("6530MIOT chip %s: Port %c is being read but has no handler.  PC: %08X\n", device->tag(), 'A' + (offset & 1), device->machine().firstcpu->safe_pc());
293	293
294	294	/* apply the DDR to the result */
295	295	val = (out & port->ddr) | (port->in & ~port->ddr);

trunk/src/mess/machine/mc6854.c

r17788	r17789
808	808	case 0: /* status register 1 */
809	809	mc6854_update_sr1( mc6854 );
810	810	LOG(( "%f $%04x mc6854_r: get SR1=$%02X (rda=%i,s2rq=%i,fd=%i,cts=%i,tu=%i,tdra=%i,irq=%i)\n",
811		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6854->sr1,
	811	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6854->sr1,
812	812	( mc6854->sr1 & RDA) ? 1 : 0, ( mc6854->sr1 & S2RQ) ? 1 : 0,
813	813	( mc6854->sr1 & FD ) ? 1 : 0, ( mc6854->sr1 & CTS ) ? 1 : 0,
814	814	( mc6854->sr1 & TU ) ? 1 : 0, ( mc6854->sr1 & TDRA) ? 1 : 0,
r17788	r17789
818	818	case 1: /* status register 2 */
819	819	mc6854_update_sr2( mc6854 );
820	820	LOG(( "%f $%04x mc6854_r: get SR2=$%02X (ap=%i,fv=%i,ridle=%i,rabt=%i,err=%i,dcd=%i,ovrn=%i,rda2=%i)\n",
821		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6854->sr2,
	821	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6854->sr2,
822	822	( mc6854->sr2 & AP   ) ? 1 : 0, ( mc6854->sr2 & FV  ) ? 1 : 0,
823	823	( mc6854->sr2 & RIDLE) ? 1 : 0, ( mc6854->sr2 & RABT) ? 1 : 0,
824	824	( mc6854->sr2 & ERR  ) ? 1 : 0, ( mc6854->sr2 & DCD ) ? 1 : 0,
r17788	r17789
830	830	{
831	831	UINT8 data = mc6854_rfifo_pop( device );
832	832	LOG(( "%f $%04x mc6854_r: get data $%02X\n",
833		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data ));
	833	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data ));
834	834	return data;
835	835	}
836	836
837	837	default:
838		logerror( "$%04x mc6854 invalid read offset %i\n", cpu_get_previouspc( device->machine().firstcpu ), offset );
	838	logerror( "$%04x mc6854 invalid read offset %i\n", device->machine().firstcpu ->safe_pcbase( ), offset );
839	839	}
840	840	return 0;
841	841	}
r17788	r17789
851	851	case 0: /* control register 1 */
852	852	mc6854->cr1 = data;
853	853	LOG(( "%f $%04x mc6854_w: set CR1=$%02X (ac=%i,irq=%c%c,%sreset=%c%c)\n",
854		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6854->cr1,
	854	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6854->cr1,
855	855	AC ? 1 : 0,
856	856	RIE ? 'r' : '-', TIE ? 't' : '-',
857	857	DISCONTINUE ? "discontinue," : "",
r17788	r17789
859	859	));
860	860	if ( mc6854->cr1 & 0xc )
861	861	logerror( "$%04x mc6854 DMA not handled (CR1=$%02X)\n",
862		cpu_get_previouspc( device->machine().firstcpu ), mc6854->cr1 );
	862	device->machine().firstcpu ->safe_pcbase( ), mc6854->cr1 );
863	863	if ( DISCONTINUE )
864	864	{
865	865	/* abort receive FIFO but keeps shift register & synchro */
r17788	r17789
888	888	/* control register 3 */
889	889	mc6854->cr3 = data;
890	890	LOG(( "%f $%04x mc6854_w: set CR3=$%02X (lcf=%i,aex=%i,idl=%i,fdse=%i,loop=%i,tst=%i,dtr=%i)\n",
891		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6854->cr3,
	891	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6854->cr3,
892	892	LCF ? (CEX ? 16 : 8) : 0,  AEX ? 1 : 0,
893	893	IDL0 ? 0 : 1, FDSE ? 1 : 0, LOOP ? 1 : 0,
894	894	TST ? 1 : 0, DTR ? 1 : 0
895	895	));
896	896	if ( LOOP )
897		logerror( "$%04x mc6854 loop mode not handled (CR3=$%02X)\n", cpu_get_previouspc( device->machine().firstcpu ), mc6854->cr3 );
	897	logerror( "$%04x mc6854 loop mode not handled (CR3=$%02X)\n", device->machine().firstcpu ->safe_pcbase( ), mc6854->cr3 );
898	898	if ( TST )
899		logerror( "$%04x mc6854 test mode not handled (CR3=$%02X)\n", cpu_get_previouspc( device->machine().firstcpu ), mc6854->cr3 );
	899	logerror( "$%04x mc6854 test mode not handled (CR3=$%02X)\n", device->machine().firstcpu ->safe_pcbase( ), mc6854->cr3 );
900	900
901	901	mc6854->out_dtr_func( DTR ? 1 : 0 );
902	902
r17788	r17789
906	906	/* control register 2 */
907	907	mc6854->cr2 = data;
908	908	LOG(( "%f $%04x mc6854_w: set CR2=$%02X (pse=%i,bytes=%i,fmidle=%i,%s,tlast=%i,clr=%c%c,rts=%i)\n",
909		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6854->cr2,
	909	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6854->cr2,
910	910	PSE ? 1 : 0,  TWOBYTES ? 2 : 1,  FMIDLE ? 1 : 0,
911	911	FCTDRA ? "fc" : "tdra", TLAST ? 1 : 0,
912	912	data & 0x20 ? 'r' : '-',  data & 0x40 ? 't' : '-',
913	913	RTS ? 1 : 0 ));
914	914	if ( PSE )
915		logerror( "$%04x mc6854 status prioritization not handled (CR2=$%02X)\n", cpu_get_previouspc( device->machine().firstcpu ), mc6854->cr2 );
	915	logerror( "$%04x mc6854 status prioritization not handled (CR2=$%02X)\n", device->machine().firstcpu ->safe_pcbase( ), mc6854->cr2 );
916	916	if ( TLAST )
917	917	mc6854_tfifo_terminate( device );
918	918	if ( data & 0x20 )
r17788	r17789
936	936	break;
937	937
938	938	case 2: /* transmitter data: continue data */
939		LOG(( "%f $%04xmc6854_w: push data=$%02X\n", device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data ));
	939	LOG(( "%f $%04xmc6854_w: push data=$%02X\n", device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data ));
940	940	mc6854_tfifo_push( device, data );
941	941	break;
942	942
r17788	r17789
945	945	{
946	946	/* control register 4 */
947	947	mc6854->cr4 = data;
948		LOG(( "%f $%04x mc6854_w: set CR4=$%02X (interframe=%i,tlen=%i,rlen=%i,%s%s)\n", device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6854->cr4,
	948	LOG(( "%f $%04x mc6854_w: set CR4=$%02X (interframe=%i,tlen=%i,rlen=%i,%s%s)\n", device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6854->cr4,
949	949	TWOINTER ? 2 : 1,
950	950	TWL, RWL,
951	951	ABT ? ( ABTEX ? "abort-ext," : "abort,") : "",
r17788	r17789
960	960	else
961	961	{
962	962	/* transmitter data: last data */
963		LOG(( "%f $%04x mc6854_w: push last-data=$%02X\n", device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data ));
	963	LOG(( "%f $%04x mc6854_w: push last-data=$%02X\n", device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data ));
964	964	mc6854_tfifo_push( device, data );
965	965	mc6854_tfifo_terminate( device );
966	966	}
967	967	break;
968	968
969	969	default:
970		logerror( "$%04x mc6854 invalid write offset %i (data=$%02X)\n", cpu_get_previouspc( device->machine().firstcpu ), offset, data );
	970	logerror( "$%04x mc6854 invalid write offset %i (data=$%02X)\n", device->machine().firstcpu ->safe_pcbase( ), offset, data );
971	971	}
972	972	}
973	973

trunk/src/mess/machine/gamecom.c

r17788	r17789
329	329	case SM8521_55: case SM8521_56: case SM8521_57: case SM8521_58:
330	330	case SM8521_59: case SM8521_5A: case SM8521_5B: case SM8521_5C:
331	331	case SM8521_5D:
332		logerror( "%X: Write to reserved address (0x%02X). Value written: 0x%02X\n", cpu_get_pc(m_maincpu), offset, data );
	332	logerror( "%X: Write to reserved address (0x%02X). Value written: 0x%02X\n", m_maincpu->safe_pc(), offset, data );
333	333	break;
334	334	}
335	335	m_p_ram[offset] = data;

trunk/src/mess/machine/mc6846.c

r17788	r17789
267	267	case 0:
268	268	case 4:
269	269	LOG (( "$%04x %f: mc6846 CSR read $%02X intr=%i (timer=%i, cp1=%i, cp2=%i)\n",
270		cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(),
	270	device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(),
271	271	mc6846->csr, (mc6846->csr >> 7) & 1,
272	272	mc6846->csr & 1, (mc6846->csr >> 1) & 1, (mc6846->csr >> 2) & 1 ));
273	273	mc6846->csr0_to_be_cleared = mc6846->csr & 1;
r17788	r17789
276	276	return mc6846->csr;
277	277
278	278	case 1:
279		LOG (( "$%04x %f: mc6846 PCR read $%02X\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), mc6846->pcr ));
	279	LOG (( "$%04x %f: mc6846 PCR read $%02X\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), mc6846->pcr ));
280	280	return mc6846->pcr;
281	281
282	282	case 2:
283		LOG (( "$%04x %f: mc6846 DDR read $%02X\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), mc6846->ddr ));
	283	LOG (( "$%04x %f: mc6846 DDR read $%02X\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), mc6846->ddr ));
284	284	return mc6846->ddr;
285	285
286	286	case 3:
287		LOG (( "$%04x %f: mc6846 PORT read $%02X\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), PORT ));
	287	LOG (( "$%04x %f: mc6846 PORT read $%02X\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), PORT ));
288	288	if ( ! (mc6846->pcr & 0x80) )
289	289	{
290	290	if ( mc6846->csr1_to_be_cleared )
r17788	r17789
298	298	return PORT;
299	299
300	300	case 5:
301		LOG (( "$%04x %f: mc6846 TCR read $%02X\n",cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), mc6846->tcr ));
	301	LOG (( "$%04x %f: mc6846 TCR read $%02X\n",device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), mc6846->tcr ));
302	302	return mc6846->tcr;
303	303
304	304	case 6:
305		LOG (( "$%04x %f: mc6846 COUNTER hi read $%02X\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), mc6846_counter( device ) >> 8 ));
	305	LOG (( "$%04x %f: mc6846 COUNTER hi read $%02X\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), mc6846_counter( device ) >> 8 ));
306	306	if ( mc6846->csr0_to_be_cleared )
307	307	{
308	308	mc6846->csr &= ~1;
r17788	r17789
312	312	return mc6846_counter( device ) >> 8;
313	313
314	314	case 7:
315		LOG (( "$%04x %f: mc6846 COUNTER low read $%02X\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), mc6846_counter( device ) & 0xff ));
	315	LOG (( "$%04x %f: mc6846 COUNTER low read $%02X\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), mc6846_counter( device ) & 0xff ));
316	316	if ( mc6846->csr0_to_be_cleared )
317	317	{
318	318	mc6846->csr &= ~1;
r17788	r17789
322	322	return mc6846_counter( device ) & 0xff;
323	323
324	324	default:
325		logerror( "$%04x mc6846 invalid read offset %i\n", cpu_get_previouspc( device->machine().firstcpu ), offset );
	325	logerror( "$%04x mc6846 invalid read offset %i\n", device->machine().firstcpu ->safe_pcbase( ), offset );
326	326	}
327	327	return 0;
328	328	}
r17788	r17789
353	353	"latcged,pos-edge", "latcged,pos-edge,intr"
354	354	};
355	355	LOG (( "$%04x %f: mc6846 PCR write $%02X reset=%i cp2=%s cp1=%s\n",
356		cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), data,
	356	device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), data,
357	357	(data >> 7) & 1, cp2[ (data >> 3) & 7 ], cp1[ data & 7 ] ));
358	358
359	359	}
r17788	r17789
366	366	mc6846_update_irq( device );
367	367	}
368	368	if ( data & 4 )
369		logerror( "$%04x mc6846 CP1 latching not implemented\n", cpu_get_previouspc( device->machine().firstcpu ) );
	369	logerror( "$%04x mc6846 CP1 latching not implemented\n", device->machine().firstcpu ->safe_pcbase( ) );
370	370	if (data & 0x20)
371	371	{
372	372	if (data & 0x10)
r17788	r17789
376	376	mc6846->iface->out_cp2_func( device, 0, mc6846->cp2_cpu );
377	377	}
378	378	else
379		logerror( "$%04x mc6846 acknowledge not implemented\n", cpu_get_previouspc( device->machine().firstcpu ) );
	379	logerror( "$%04x mc6846 acknowledge not implemented\n", device->machine().firstcpu ->safe_pcbase( ) );
380	380	}
381	381	break;
382	382
383	383	case 2:
384		LOG (( "$%04x %f: mc6846 DDR write $%02X\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), data ));
	384	LOG (( "$%04x %f: mc6846 DDR write $%02X\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), data ));
385	385	if ( ! (mc6846->pcr & 0x80) )
386	386	{
387	387	mc6846->ddr = data;
r17788	r17789
391	391	break;
392	392
393	393	case 3:
394		LOG (( "$%04x %f: mc6846 PORT write $%02X (mask=$%02X)\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), data,mc6846->ddr ));
	394	LOG (( "$%04x %f: mc6846 PORT write $%02X (mask=$%02X)\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), data,mc6846->ddr ));
395	395	if ( ! (mc6846->pcr & 0x80) )
396	396	{
397	397	mc6846->pdr = data;
r17788	r17789
400	400	if ( mc6846->csr1_to_be_cleared && (mc6846->csr & 2) )
401	401	{
402	402	mc6846->csr &= ~2;
403		LOG (( "$%04x %f: mc6846 CP1 intr reset\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double() ));
	403	LOG (( "$%04x %f: mc6846 CP1 intr reset\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double() ));
404	404	}
405	405	if ( mc6846->csr2_to_be_cleared && (mc6846->csr & 4) )
406	406	{
407	407	mc6846->csr &= ~4;
408		LOG (( "$%04x %f: mc6846 CP2 intr reset\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double() ));
	408	LOG (( "$%04x %f: mc6846 CP2 intr reset\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double() ));
409	409	}
410	410	mc6846->csr1_to_be_cleared = 0;
411	411	mc6846->csr2_to_be_cleared = 0;
r17788	r17789
421	421	"freq-cmp", "freq-cmp", "pulse-cmp", "pulse-cmp"
422	422	};
423	423	LOG (( "$%04x %f: mc6846 TCR write $%02X reset=%i clock=%s scale=%i mode=%s out=%s\n",
424		cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), data,
	424	device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), data,
425	425	(data >> 7) & 1, (data & 0x40) ? "extern" : "sys",
426	426	(data & 0x40) ? 1 : 8, mode[ (data >> 1) & 7 ],
427	427	(data & 1) ? "enabled" : "0" ));
r17788	r17789
455	455
456	456	case 7:
457	457	mc6846->latch = ( ((UINT16) mc6846->time_MSB) << 8 ) + data;
458		LOG (( "$%04x %f: mc6846 COUNT write %i\n", cpu_get_previouspc( device->machine().firstcpu ), device->machine().time().as_double(), mc6846->latch  ));
	458	LOG (( "$%04x %f: mc6846 COUNT write %i\n", device->machine().firstcpu ->safe_pcbase( ), device->machine().time().as_double(), mc6846->latch  ));
459	459	if (!(mc6846->tcr & 0x38))
460	460	{
461	461	/* timer initialization */
r17788	r17789
471	471	break;
472	472
473	473	default:
474		logerror( "$%04x mc6846 invalid write offset %i\n", cpu_get_previouspc( device->machine().firstcpu ), offset );
	474	logerror( "$%04x mc6846 invalid write offset %i\n", device->machine().firstcpu ->safe_pcbase( ), offset );
475	475	}
476	476	}
477	477

trunk/src/mess/machine/egret.c

r17788	r17789
137	137	if (xcvr_session != ((data>>1)&1))
138	138	{
139	139	#ifdef EGRET_SUPER_VERBOSE
140		printf("EG-> XCVR_SESSION: %d (PC=%x)\n", (data>>1)&1, cpu_get_pc(m_maincpu));
	140	printf("EG-> XCVR_SESSION: %d (PC=%x)\n", (data>>1)&1, m_maincpu->safe_pc());
141	141	#endif
142	142	xcvr_session = (data>>1) & 1;
143	143	}
144	144	if (via_data != ((data>>5)&1))
145	145	{
146	146	#ifdef EGRET_SUPER_VERBOSE
147		printf("EG-> VIA_DATA: %d (PC=%x)\n", (data>>5)&1, cpu_get_pc(m_maincpu));
	147	printf("EG-> VIA_DATA: %d (PC=%x)\n", (data>>5)&1, m_maincpu->safe_pc());
148	148	#endif
149	149	via_data = (data>>5) & 1;
150	150	}
151	151	if (via_clock != ((data>>4)&1))
152	152	{
153	153	#ifdef EGRET_SUPER_VERBOSE
154		printf("EG-> VIA_CLOCK: %d (PC=%x)\n", ((data>>4)&1)^1, cpu_get_pc(m_maincpu));
	154	printf("EG-> VIA_CLOCK: %d (PC=%x)\n", ((data>>4)&1)^1, m_maincpu->safe_pc());
155	155	#endif
156	156	via_clock = (data>>4) & 1;
157	157	via6522_device *via1 = machine().device<via6522_device>("via6522_0");

trunk/src/mess/machine/mface2.c

r17788	r17789
39	39	{
40	40	int pc;
41	41
42		pc = cpu_get_pc(machine().device("maincpu"));
	42	pc = machine().device("maincpu")->safe_pc();
43	43	/* there are two places where CALL &0065 can be found
44	44	in the multiface rom. At this address there is a RET.
45	45

trunk/src/mess/machine/wswan.c

r17788	r17789
289	289	UINT8 value = m_ws_portram[offset];
290	290
291	291	if ( offset != 2 )
292		logerror( "PC=%X: port read %02X\n", cpu_get_pc( machine().device("maincpu") ), offset );
	292	logerror( "PC=%X: port read %02X\n", machine().device("maincpu") ->safe_pc( ), offset );
293	293	switch( offset )
294	294	{
295	295	case 0x02:      /* Current line */
r17788	r17789
360	360	address_space *mem = m_maincpu->memory().space(AS_PROGRAM);
361	361	wswan_state *state = machine().driver_data<wswan_state>();
362	362	UINT8 input;
363		logerror( "PC=%X: port write %02X <- %02X\n", cpu_get_pc( &mem->device() ), offset, data );
	363	logerror( "PC=%X: port write %02X <- %02X\n", mem->device().safe_pc(), offset, data );
364	364	switch( offset )
365	365	{
366	366	case 0x00:   /* Display control
r17788	r17789
1254	1254	m_ws_portram[0xcb] = m_rtc.year;
1255	1255	break;
1256	1256	default:
1257		logerror( "%X: Unknown RTC command (%X) requested\n", cpu_get_pc( &mem->device() ), data );
	1257	logerror( "%X: Unknown RTC command (%X) requested\n", mem->device().safe_pc(), data );
1258	1258	}
1259	1259	break;
1260	1260	case 0xcb:   /* RTC Data */

trunk/src/mess/machine/z80ne.c

r17788	r17789
707	707	offs_t pc;
708	708
709	709	/* if PC is not in range, we are under integrated debugger control, DON'T SWAP */
710		pc = cpu_get_pc(device->machine().device("z80ne"));
	710	pc = device->machine().device("z80ne")->safe_pc();
711	711	if((pc >= 0xf000) && (pc <=0xffff))
712	712	{
713	713	LOG(("lx390_reset_bank, reset memory bank 1\n"));

trunk/src/mess/machine/apollo_kbd.c

r17788	r17789
149	149	if (cpu != NULL)
150	150	{
151	151	sprintf(statebuf, "%d.%03d %s pc=%08x - %s", s, ms, cpu->tag(),
152		cpu_get_previouspc(cpu), tag());
	152	cpu->safe_pcbase(), tag());
153	153	}
154	154	else
155	155	{

trunk/src/mess/machine/isa_hdc.c

r17788	r17789
796	796	}
797	797
798	798	if (LOG_HDC_CALL)
799		logerror("pc_HDC_r(): pc=%06X offs=%d result=0x%02x\n", cpu_get_pc(device->machine().firstcpu), offset, data);
	799	logerror("pc_HDC_r(): pc=%06X offs=%d result=0x%02x\n", device->machine().firstcpu->safe_pc(), offset, data);
800	800
801	801	return data;
802	802	}
r17788	r17789
805	805	{
806	806	isa8_hdc_device   *hdc  = downcast<isa8_hdc_device *>(device);
807	807	if (LOG_HDC_CALL)
808		logerror("pc_HDC_w(): pc=%06X offs=%d data=0x%02x\n", cpu_get_pc(device->machine().firstcpu), offset, data);
	808	logerror("pc_HDC_w(): pc=%06X offs=%d data=0x%02x\n", device->machine().firstcpu->safe_pc(), offset, data);
809	809
810	810	switch( offset )
811	811	{

trunk/src/mess/machine/dec_lk201.c

r17788	r17789
107	107
108	108	WRITE8_MEMBER( lk201_device::ddr_w )
109	109	{
110		//    printf("%02x to PORT %c DDR (PC=%x)\n", data, 'A' + offset, cpu_get_pc(m_maincpu));
	110	//    printf("%02x to PORT %c DDR (PC=%x)\n", data, 'A' + offset, m_maincpu->safe_pc());
111	111
112	112	send_port(space, offset, ports[offset] & data);
113	113
r17788	r17789
135	135	// add in ddr-masked version of port writes
136	136	incoming |= (ports[offset] & ddrs[offset]);
137	137
138		//    printf("PORT %c read = %02x (DDR = %02x latch = %02x) (PC=%x)\n", 'A' + offset, ports[offset], ddrs[offset], ports[offset], cpu_get_pc(m_maincpu));
	138	//    printf("PORT %c read = %02x (DDR = %02x latch = %02x) (PC=%x)\n", 'A' + offset, ports[offset], ddrs[offset], ports[offset], m_maincpu->safe_pc());
139	139
140	140	return incoming;
141	141	}
r17788	r17789
149	149
150	150	void lk201_device::send_port(address_space &space, UINT8 offset, UINT8 data)
151	151	{
152		//    printf("PORT %c write %02x (DDR = %02x) (PC=%x)\n", 'A' + offset, data, ddrs[offset], cpu_get_pc(m_maincpu));
	152	//    printf("PORT %c write %02x (DDR = %02x) (PC=%x)\n", 'A' + offset, data, ddrs[offset], m_maincpu->safe_pc());
153	153
154	154	switch (offset)
155	155	{
r17788	r17789
187	187	break;
188	188	}
189	189
190		//    printf("SCI read @ %x = %02x (PC=%x)\n", offset, incoming, cpu_get_pc(m_maincpu));
	190	//    printf("SCI read @ %x = %02x (PC=%x)\n", offset, incoming, m_maincpu->safe_pc());
191	191
192	192	return incoming;
193	193	}
r17788	r17789
212	212	break;
213	213	}
214	214
215		//    printf("SCI %02x to %x (PC=%x)\n", data, offset, cpu_get_pc(m_maincpu));
	215	//    printf("SCI %02x to %x (PC=%x)\n", data, offset, m_maincpu->safe_pc());
216	216	}
217	217
218	218	READ8_MEMBER( lk201_device::spi_r )
r17788	r17789
232	232	break;
233	233	}
234	234
235		//    printf("SPI read @ %x = %02x (PC=%x)\n", offset, incoming, cpu_get_pc(m_maincpu));
	235	//    printf("SPI read @ %x = %02x (PC=%x)\n", offset, incoming, m_maincpu->safe_pc());
236	236
237	237	return incoming;
238	238	}
r17788	r17789
251	251	break;
252	252	}
253	253
254		//    printf("SPI %02x to %x (PC=%x)\n", data, offset, cpu_get_pc(m_maincpu));
	254	//    printf("SPI %02x to %x (PC=%x)\n", data, offset, m_maincpu->safe_pc());
255	255	}
256	256
257	257	/*

trunk/src/mess/machine/nes.c

r17788	r17789
376	376	}
377	377
378	378	if (LOG_JOY)
379		logerror("joy 0 read, val: %02x, pc: %04x, bits read: %d, chan0: %08x\n", ret, cpu_get_pc(&space.device()), m_in_0.shift, m_in_0.i0);
	379	logerror("joy 0 read, val: %02x, pc: %04x, bits read: %d, chan0: %08x\n", ret, space.device().safe_pc(), m_in_0.shift, m_in_0.i0);
380	380
381	381	m_in_0.shift++;
382	382	}
r17788	r17789
465	465	}
466	466
467	467	if (LOG_JOY)
468		logerror("joy 1 read, val: %02x, pc: %04x, bits read: %d, chan0: %08x\n", ret, cpu_get_pc(&space.device()), m_in_1.shift, m_in_1.i0);
	468	logerror("joy 1 read, val: %02x, pc: %04x, bits read: %d, chan0: %08x\n", ret, space.device().safe_pc(), m_in_1.shift, m_in_1.i0);
469	469
470	470	m_in_1.shift++;
471	471	}

trunk/src/mess/machine/sym1.c

r17788	r17789
123	123	static WRITE8_DEVICE_HANDLER(sym1_riot_a_w)
124	124	{
125	125	sym1_state *state = device->machine().driver_data<sym1_state>();
126		logerror("%x: riot_a_w 0x%02x\n", cpu_get_pc( device->machine().device("maincpu") ), data);
	126	logerror("%x: riot_a_w 0x%02x\n", device->machine().device("maincpu") ->safe_pc( ), data);
127	127
128	128	/* save for later use */
129	129	state->m_riot_port_a = data;
r17788	r17789
133	133	static WRITE8_DEVICE_HANDLER(sym1_riot_b_w)
134	134	{
135	135	sym1_state *state = device->machine().driver_data<sym1_state>();
136		logerror("%x: riot_b_w 0x%02x\n", cpu_get_pc( device->machine().device("maincpu") ), data);
	136	logerror("%x: riot_b_w 0x%02x\n", device->machine().device("maincpu") ->safe_pc( ), data);
137	137
138	138	/* save for later use */
139	139	state->m_riot_port_b = data;

trunk/src/mess/machine/3c505.c

r17788	r17789
280	280	if (cpu != NULL)
281	281	{
282	282	sprintf(statebuf, "%d.%03d %s pc=%08x - %s", s, ms, cpu->tag(),
283		cpu_get_previouspc(cpu), tag());
	283	cpu->safe_pcbase(), tag());
284	284	}
285	285	else
286	286	{
r17788	r17789
1252	1252
1253	1253	void threecom3c505_device::write_control_port( UINT8 data)
1254	1254	{
1255		// if (cpu_get_previouspc(m_device->machine->firstcpu) == 0x3C4BAD48) verbose = 3;
1256		// if (cpu_get_previouspc(m_device->machine->firstcpu) == 0x010464DC) verbose = 3;
	1255	// if (m_device->machine->firstcpu->safe_pcbase() == 0x3C4BAD48) verbose = 3;
	1256	// if (m_device->machine->firstcpu->safe_pcbase() == 0x010464DC) verbose = 3;
1257	1257
1258	1258	if (verbose <= 2 && (data & (DMAE | TCEN /*| CMDE*/)) != 0)
1259	1259	{
r17788	r17789
1398	1398	// omit excessive logging
1399	1399	if (data == last_data)
1400	1400	{
1401		UINT32 pc = cpu_get_previouspc(machine().device(MAINCPU));
	1401	UINT32 pc = machine().device(MAINCPU)->safe_pcbase();
1402	1402	if (pc == last_pc) {
1403	1403	return data;
1404	1404	}

trunk/src/mess/machine/sc499.c

r17788	r17789
257	257	if (cpu != NULL)
258	258	{
259	259	sprintf(statebuf, "%d.%03d %s pc=%08x - %s", s, ms, cpu->tag(),
260		cpu_get_previouspc(cpu), tag());
	260	cpu->safe_pcbase(), tag());
261	261	}
262	262	else
263	263	{

trunk/src/mess/machine/bebox.c

r17788	r17789
170	170	if (LOG_CPUIMASK)
171	171	{
172	172	logerror("BeBox CPU #0 pc=0x%08X imask=0x%08x\n",
173		(unsigned) cpu_get_pc( &space->device()), state->m_cpu_imask[0]);
	173	(unsigned) space->device().safe_pc( ), state->m_cpu_imask[0]);
174	174	}
175	175	bebox_update_interrupts(space->machine());
176	176	}
r17788	r17789
188	188	if (LOG_CPUIMASK)
189	189	{
190	190	logerror("BeBox CPU #1 pc=0x%08X imask=0x%08x\n",
191		(unsigned) cpu_get_pc( &space->device() ), state->m_cpu_imask[1]);
	191	(unsigned) space->device() .safe_pc( ), state->m_cpu_imask[1]);
192	192	}
193	193	bebox_update_interrupts(space->machine());
194	194	}

trunk/src/mess/machine/intv.c

r17788	r17789
253	253	intvkbd_tms9927_w(space, offset-0xc0, data);
254	254	break;
255	255	default:
256		logerror("%04X: Unknown write %02x to 0x40%02x\n",cpu_get_pc(&space.device()),data,offset);
	256	logerror("%04X: Unknown write %02x to 0x40%02x\n",space.device().safe_pc(),data,offset);
257	257	break;
258	258	}
259	259	}

trunk/src/mess/machine/a2scsi.c

r17788	r17789
125	125
126	126	UINT8 a2bus_scsi_device::read_c0nx(address_space &space, UINT8 offset)
127	127	{
128		printf("Read c0n%x (PC=%x)\n", offset, cpu_get_pc(&space.device()));
	128	printf("Read c0n%x (PC=%x)\n", offset, space.device().safe_pc());
129	129
130	130	switch (offset)
131	131	{
r17788	r17789
153	153
154	154	void a2bus_scsi_device::write_c0nx(address_space &space, UINT8 offset, UINT8 data)
155	155	{
156		printf("Write %02x to c0n%x (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
	156	printf("Write %02x to c0n%x (PC=%x)\n", data, offset, space.device().safe_pc());
157	157
158	158	switch (offset)
159	159	{
r17788	r17789
206	206
207	207	void a2bus_scsi_device::write_cnxx(address_space &space, UINT8 offset, UINT8 data)
208	208	{
209		printf("Write %02x to cn%02x (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
	209	printf("Write %02x to cn%02x (PC=%x)\n", data, offset, space.device().safe_pc());
210	210	}
211	211
212	212	/*-------------------------------------------------

trunk/src/mess/machine/pc.c

r17788	r17789
532	532
533	533	WRITE8_MEMBER(pc_state::pc_nmi_enable_w)
534	534	{
535		logerror( "%08X: changing NMI state to %s\n", cpu_get_pc(&space.device()), data & 0x80 ? "enabled" : "disabled" );
	535	logerror( "%08X: changing NMI state to %s\n", space.device().safe_pc(), data & 0x80 ? "enabled" : "disabled" );
536	536
537	537	nmi_enabled = data & 0x80;
538	538	}

trunk/src/mess/machine/pce.c

r17788	r17789
1336	1336	if(offset & 0x200 && m_sys3_card && m_acard) // route Arcade Card handling ports
1337	1337	return pce_cd_acard_w(space,offset,data);
1338	1338
1339		logerror("%04X: write to CD interface offset %02X, data %02X\n", cpu_get_pc(&space.device()), offset, data );
	1339	logerror("%04X: write to CD interface offset %02X, data %02X\n", space.device().safe_pc(), offset, data );
1340	1340
1341	1341	switch( offset & 0xf )
1342	1342	{
r17788	r17789
1590	1590	if(offset & 0x200 && m_sys3_card && m_acard) // route Arcade Card handling ports
1591	1591	return pce_cd_acard_r(space,offset);
1592	1592
1593		logerror("%04X: read from CD interface offset %02X\n", cpu_get_pc(&space.device()), offset );
	1593	logerror("%04X: read from CD interface offset %02X\n", space.device().safe_pc(), offset );
1594	1594
1595	1595	if((offset & 0xc0) == 0xc0 && m_sys3_card) //System 3 Card header handling
1596	1596	{

trunk/src/mess/machine/dccons.c

r17788	r17789
261	261	}
262	262	#endif
263	263
264		mame_printf_debug("ATAPI: read reg %d = %x (PC=%x)\n", reg, data, cpu_get_pc(&space->device()));
	264	mame_printf_debug("ATAPI: read reg %d = %x (PC=%x)\n", reg, data, space->device().safe_pc());
265	265	}
266	266
267	267	//  printf( "atapi_r( %08x, %08x ) %08x\n", offset, mem_mask, data );
r17788	r17789
420	420	}
421	421	#endif
422	422	atapi_regs[reg] = data;
423		//      mame_printf_debug("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, cpu_get_pc(&space->device()));
	423	//      mame_printf_debug("ATAPI: reg %d = %x (offset %x mask %x PC=%x)\n", reg, data, offset, mem_mask, space->device().safe_pc());
424	424
425	425	if (reg == ATAPI_REG_CMDSTATUS)
426	426	{
427		printf("ATAPI command %x issued! (PC=%x)\n", data, cpu_get_pc(&space->device()));
	427	printf("ATAPI command %x issued! (PC=%x)\n", data, space->device().safe_pc());
428	428
429	429	switch (data)
430	430	{
r17788	r17789
603	603	off=offset << 1;
604	604	}
605	605
606		//  printf("gdrom_r: @ %x (off %x), mask %llx (PC %x)\n", offset, off, mem_mask, cpu_get_pc(&space->device()));
	606	//  printf("gdrom_r: @ %x (off %x), mask %llx (PC %x)\n", offset, off, mem_mask, space->device().safe_pc());
607	607
608	608	if (offset == 3)
609	609	{
r17788	r17789
632	632	off=offset << 1;
633	633	}
634	634
635		//  printf("GDROM: [%08x=%x]write %llx to %x, mask %llx (PC %x)\n", 0x5f7000+off*4, dat, data, offset, mem_mask, cpu_get_pc(&space->device()));
	635	//  printf("GDROM: [%08x=%x]write %llx to %x, mask %llx (PC %x)\n", 0x5f7000+off*4, dat, data, offset, mem_mask, space->device().safe_pc());
636	636
637	637	if (off >= 0x20)
638	638	{

trunk/src/mess/machine/sgi.c

r17788	r17789
20	20	va_start( v, s_fmt );
21	21	vsprintf( buf, s_fmt, v );
22	22	va_end( v );
23		logerror( "%08x: %s", (unsigned) cpu_get_pc(machine.device("maincpu")), buf );
	23	logerror( "%08x: %s", (unsigned) machine.device("maincpu")->safe_pc(), buf );
24	24	}
25	25	}
26	26

trunk/src/mess/machine/bbc.c

r17788	r17789
121	121	{
122	122	bbc_state *state = machine.driver_data<bbc_state>();
123	123	int PC;
124		PC = cpu_get_pc(machine.device("maincpu")); // this needs to be set to the 6502 program counter
	124	PC = machine.device("maincpu")->safe_pc(); // this needs to be set to the 6502 program counter
125	125	return (((PC >= 0xc000) && (PC <= 0xdfff)) || ((state->m_pagedRAM) && ((PC >= 0xa000) && (PC <= 0xafff))));
126	126	}
127	127
r17788	r17789
398	398	static int bbcm_vdudriverset(running_machine &machine)
399	399	{
400	400	int PC;
401		PC = cpu_get_pc(machine.device("maincpu"));
	401	PC = machine.device("maincpu")->safe_pc();
402	402	return ((PC >= 0xc000) && (PC <= 0xdfff));
403	403	}
404	404

trunk/src/mess/machine/mb8795.c

r17788	r17789
86	86
87	87	READ8_MEMBER(mb8795_device::txstat_r)
88	88	{
89		//  fprintf(stderr, "mb8795: txstat_r %02x (%08x)\n", txstat, cpu_get_pc(&space.device()));
	89	//  fprintf(stderr, "mb8795: txstat_r %02x (%08x)\n", txstat, space.device().safe_pc());
90	90	return txstat;
91	91	}
92	92
r17788	r17789
94	94	{
95	95	txstat = txstat & (0xf0 | ~data);
96	96	check_irq();
97		fprintf(stderr, "mb8795: txstat_w %02x (%08x)\n", txstat, cpu_get_pc(&space.device()));
	97	fprintf(stderr, "mb8795: txstat_w %02x (%08x)\n", txstat, space.device().safe_pc());
98	98	}
99	99
100	100	READ8_MEMBER(mb8795_device::txmask_r)
101	101	{
102		fprintf(stderr, "mb8795: txmask_r %02x (%08x)\n", txmask, cpu_get_pc(&space.device()));
	102	fprintf(stderr, "mb8795: txmask_r %02x (%08x)\n", txmask, space.device().safe_pc());
103	103	return txmask;
104	104	}
105	105
r17788	r17789
107	107	{
108	108	txmask = data & 0xaf;
109	109	check_irq();
110		fprintf(stderr, "mb8795: txmask_w %02x (%08x)\n", txmask, cpu_get_pc(&space.device()));
	110	fprintf(stderr, "mb8795: txmask_w %02x (%08x)\n", txmask, space.device().safe_pc());
111	111	}
112	112
113	113	READ8_MEMBER(mb8795_device::rxstat_r)
114	114	{
115		fprintf(stderr, "mb8795: rxstat_r %02x (%08x)\n", rxstat, cpu_get_pc(&space.device()));
	115	fprintf(stderr, "mb8795: rxstat_r %02x (%08x)\n", rxstat, space.device().safe_pc());
116	116	return rxstat;
117	117	}
118	118
r17788	r17789
120	120	{
121	121	rxstat = rxstat & (0x70 | ~data);
122	122	check_irq();
123		fprintf(stderr, "mb8795: rxstat_w %02x (%08x)\n", rxstat, cpu_get_pc(&space.device()));
	123	fprintf(stderr, "mb8795: rxstat_w %02x (%08x)\n", rxstat, space.device().safe_pc());
124	124	}
125	125
126	126	READ8_MEMBER(mb8795_device::rxmask_r)
127	127	{
128		fprintf(stderr, "mb8795: rxmask_r %02x (%08x)\n", rxmask, cpu_get_pc(&space.device()));
	128	fprintf(stderr, "mb8795: rxmask_r %02x (%08x)\n", rxmask, space.device().safe_pc());
129	129	return rxmask;
130	130	}
131	131
r17788	r17789
133	133	{
134	134	rxmask = data & 0x9f;
135	135	check_irq();
136		fprintf(stderr, "mb8795: rxmask_w %02x (%08x)\n", rxmask, cpu_get_pc(&space.device()));
	136	fprintf(stderr, "mb8795: rxmask_w %02x (%08x)\n", rxmask, space.device().safe_pc());
137	137	}
138	138
139	139	READ8_MEMBER(mb8795_device::txmode_r)
140	140	{
141		fprintf(stderr, "mb8795: txmode_r %02x (%08x)\n", txmode, cpu_get_pc(&space.device()));
	141	fprintf(stderr, "mb8795: txmode_r %02x (%08x)\n", txmode, space.device().safe_pc());
142	142	return txmode;
143	143	}
144	144
145	145	WRITE8_MEMBER(mb8795_device::txmode_w)
146	146	{
147	147	txmode = data;
148		fprintf(stderr, "mb8795: txmode_w %02x (%08x)\n", txmode, cpu_get_pc(&space.device()));
	148	fprintf(stderr, "mb8795: txmode_w %02x (%08x)\n", txmode, space.device().safe_pc());
149	149	}
150	150
151	151	READ8_MEMBER(mb8795_device::rxmode_r)
152	152	{
153		fprintf(stderr, "mb8795: rxmode_r %02x (%08x)\n", rxmode, cpu_get_pc(&space.device()));
	153	fprintf(stderr, "mb8795: rxmode_r %02x (%08x)\n", rxmode, space.device().safe_pc());
154	154	return rxmode;
155	155	}
156	156
157	157	WRITE8_MEMBER(mb8795_device::rxmode_w)
158	158	{
159	159	rxmode = data;
160		fprintf(stderr, "mb8795: rxmode_w %02x (%08x)\n", rxmode, cpu_get_pc(&space.device()));
	160	fprintf(stderr, "mb8795: rxmode_w %02x (%08x)\n", rxmode, space.device().safe_pc());
161	161	}
162	162
163	163	WRITE8_MEMBER(mb8795_device::reset_w)
r17788	r17789
168	168
169	169	READ8_MEMBER(mb8795_device::tdc_lsb_r)
170	170	{
171		fprintf(stderr, "mb8795: tdc_lsb_r %02x (%08x)\n", txcount & 0xff, cpu_get_pc(&space.device()));
	171	fprintf(stderr, "mb8795: tdc_lsb_r %02x (%08x)\n", txcount & 0xff, space.device().safe_pc());
172	172	return txcount;
173	173	}
174	174
r17788	r17789
177	177	if(offset < 6)
178	178	return mac[offset];
179	179	if(offset == 7) {
180		fprintf(stderr, "mb8795: tdc_msb_r %02x (%08x)\n", txcount >> 8, cpu_get_pc(&space.device()));
	180	fprintf(stderr, "mb8795: tdc_msb_r %02x (%08x)\n", txcount >> 8, space.device().safe_pc());
181	181	return (txcount >> 8) & 0x3f;
182	182	}
183	183	return 0;

trunk/src/mess/machine/cuda.c

r17788	r17789
108	108
109	109	void cuda_device::send_port(address_space &space, UINT8 offset, UINT8 data)
110	110	{
111		//    printf("PORT %c write %02x (DDR = %02x) (PC=%x)\n", 'A' + offset, data, ddrs[offset], cpu_get_pc(m_maincpu));
	111	//    printf("PORT %c write %02x (DDR = %02x) (PC=%x)\n", 'A' + offset, data, ddrs[offset], m_maincpu->safe_pc());
112	112
113	113	switch (offset)
114	114	{
r17788	r17789
138	138	if (treq != ((data>>1)&1))
139	139	{
140	140	#ifdef CUDA_SUPER_VERBOSE
141		printf("CU-> TREQ: %d (PC=%x)\n", (data>>1)&1, cpu_get_pc(m_maincpu));
	141	printf("CU-> TREQ: %d (PC=%x)\n", (data>>1)&1, m_maincpu->safe_pc());
142	142	#endif
143	143	treq = (data>>1) & 1;
144	144	}
145	145	if (via_data != ((data>>5)&1))
146	146	{
147	147	#ifdef CUDA_SUPER_VERBOSE
148		printf("CU-> VIA_DATA: %d (PC=%x)\n", (data>>5)&1, cpu_get_pc(m_maincpu));
	148	printf("CU-> VIA_DATA: %d (PC=%x)\n", (data>>5)&1, m_maincpu->safe_pc());
149	149	#endif
150	150	via_data = (data>>5) & 1;
151	151	}
152	152	if (via_clock != ((data>>4)&1))
153	153	{
154	154	#ifdef CUDA_SUPER_VERBOSE
155		printf("CU-> VIA_CLOCK: %d (PC=%x)\n", ((data>>4)&1)^1, cpu_get_pc(m_maincpu));
	155	printf("CU-> VIA_CLOCK: %d (PC=%x)\n", ((data>>4)&1)^1, m_maincpu->safe_pc());
156	156	#endif
157	157	via_clock = (data>>4) & 1;
158	158	via6522_device *via1 = machine().device<via6522_device>("via6522_0");
r17788	r17789
165	165	if ((data & 8) != reset_line)
166	166	{
167	167	#ifdef CUDA_SUPER_VERBOSE
168		printf("680x0 reset: %d -> %d (PC=%x)\n", (ports[2] & 8)>>3, (data & 8)>>3, cpu_get_pc(m_maincpu));
	168	printf("680x0 reset: %d -> %d (PC=%x)\n", (ports[2] & 8)>>3, (data & 8)>>3, m_maincpu->safe_pc());
169	169	#endif
170	170	reset_line = (data & 8);
171	171	// falling edge, should reset the machine too
r17788	r17789
193	193
194	194	WRITE8_MEMBER( cuda_device::ddr_w )
195	195	{
196		//    printf("%02x to PORT %c DDR (PC=%x)\n", data, 'A' + offset, cpu_get_pc(m_maincpu));
	196	//    printf("%02x to PORT %c DDR (PC=%x)\n", data, 'A' + offset, m_maincpu->safe_pc());
197	197
198	198	send_port(space, offset, ports[offset] & data);
199	199
r17788	r17789
251	251	incoming |= 0x01;
252	252	}
253	253
254		//    printf("PORT %c read = %02x (DDR = %02x latch = %02x) (PC=%x)\n", 'A' + offset, ports[offset], ddrs[offset], ports[offset], cpu_get_pc(m_maincpu));
	254	//    printf("PORT %c read = %02x (DDR = %02x latch = %02x) (PC=%x)\n", 'A' + offset, ports[offset], ddrs[offset], ports[offset], m_maincpu->safe_pc());
255	255
256	256	return incoming;
257	257	}
r17788	r17789
279	279	(data & 0x40) ? 1 : 0,
280	280	(data & 0x20) ? 1 : 0,
281	281	(data & 0x10) ? 1 : 0,
282		(data & 0x08) ? 1 : 0, cpu_get_pc(m_maincpu));
	282	(data & 0x08) ? 1 : 0, m_maincpu->safe_pc());
283	283	}
284	284	#endif
285	285	pll_ctrl = data;
r17788	r17789
300	300	{ attotime::from_seconds(8), attotime::from_msec(250.0f), attotime::from_msec(125.1f), attotime::from_msec(62.5f), attotime::from_msec(31.3f) },
301	301	};
302	302
303		//    printf("%02x to timer control (PC=%x)\n", data, cpu_get_pc(m_maincpu));
	303	//    printf("%02x to timer control (PC=%x)\n", data, m_maincpu->safe_pc());
304	304
305	305	if (data & 0x50)
306	306	{
r17788	r17789
334	334
335	335	WRITE8_MEMBER( cuda_device::timer_counter_w )
336	336	{
337		//    printf("%02x to timer counter (PC=%x)\n", data, cpu_get_pc(m_maincpu));
	337	//    printf("%02x to timer counter (PC=%x)\n", data, m_maincpu->safe_pc());
338	338	timer_counter = data;
339	339	ripple_counter = timer_counter;
340	340	}

trunk/src/mess/machine/hp48.c

r17788	r17789
166	166	UINT8 data = HP48_IO_8(0x16); /* byte to send */
167	167
168	168	LOG_SERIAL(( "%05x %f hp48_rs232_send_byte: start sending, data=%02x\n",
169		cpu_get_previouspc(machine.device("maincpu")), machine.time().as_double(), data ));
	169	machine.device("maincpu")->safe_pcbase(), machine.time().as_double(), data ));
170	170
171	171	/* set byte sending and send buffer full */
172	172	state->m_io[0x12] |= 3;
r17788	r17789
244	244	{
245	245	hp48_state *state = device->machine().driver_data<hp48_state>();
246	246	LOG(( "%05x %f hp48_reg_out: %03x\n",
247		cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), out ));
	247	device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), out ));
248	248
249	249	/* bits 0-8: keyboard lines */
250	250	state->m_out = out & 0x1ff;
r17788	r17789
282	282	{
283	283	int in = hp48_get_in(device->machine());
284	284	LOG(( "%05x %f hp48_reg_in: %04x\n",
285		cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), in ));
	285	device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), in ));
286	286	return in;
287	287	}
288	288
r17788	r17789
327	327	void hp48_rsi( device_t *device )
328	328	{
329	329	hp48_state *state = device->machine().driver_data<hp48_state>();
330		LOG(( "%05x %f hp48_rsi\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double() ));
	330	LOG(( "%05x %f hp48_rsi\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double() ));
331	331
332	332	/* enables interrupts on key repeat
333	333	(normally, there is only one interrupt, when the key is pressed)
r17788	r17789
370	370	{
371	371	hp48_state *state = space->machine().driver_data<hp48_state>();
372	372	LOG(( "%05x %f hp48_io_w: off=%02x data=%x\n",
373		cpu_get_previouspc(&space->device()), space->machine().time().as_double(), offset, data ));
	373	space->device().safe_pcbase(), space->machine().time().as_double(), offset, data ));
374	374
375	375	switch( offset )
376	376	{
r17788	r17789
413	413
414	414	/* cards */
415	415	case 0x0e:
416		LOG(( "%05x: card control write %02x\n", cpu_get_previouspc(&space->device()), data ));
	416	LOG(( "%05x: card control write %02x\n", space->device().safe_pcbase(), data ));
417	417
418	418	/* bit 0: software interrupt */
419	419	if ( data & 1 )
r17788	r17789
432	432	break;
433	433
434	434	case 0x0f:
435		LOG(( "%05x: card info write %02x\n", cpu_get_previouspc(&space->device()), data ));
	435	LOG(( "%05x: card info write %02x\n", space->device().safe_pcbase(), data ));
436	436	state->m_io[0x0f] = data;
437	437	break;
438	438
r17788	r17789
563	563	/* cards */
564	564	case 0x0e: /* detection */
565	565	data = state->m_io[0x0e];
566		LOG(( "%05x: card control read %02x\n", cpu_get_previouspc(&space->device()), data ));
	566	LOG(( "%05x: card control read %02x\n", space->device().safe_pcbase(), data ));
567	567	break;
568	568	case 0x0f: /* card info */
569	569	data = 0;
r17788	r17789
581	581	if ( state->m_port_size[0] && state->m_port_write[0] ) data |= 4;
582	582	if ( state->m_port_size[1] && state->m_port_write[1] ) data |= 8;
583	583	}
584		LOG(( "%05x: card info read %02x\n", cpu_get_previouspc(&space->device()), data ));
	584	LOG(( "%05x: card info read %02x\n", space->device().safe_pcbase(), data ));
585	585	break;
586	586
587	587
r17788	r17789
589	589	}
590	590
591	591	LOG(( "%05x %f hp48_io_r: off=%02x data=%x\n",
592		cpu_get_previouspc(&space->device()), space->machine().time().as_double(), offset, data ));
	592	space->device().safe_pcbase(), space->machine().time().as_double(), offset, data ));
593	593	return data;
594	594	}
595	595
r17788	r17789
603	603	offset &= 0x7e;
604	604	if ( state->m_bank_switch != offset )
605	605	{
606		LOG(( "%05x %f hp48_bank_r: off=%03x\n", cpu_get_previouspc(&space->device()), space->machine().time().as_double(), offset ));
	606	LOG(( "%05x %f hp48_bank_r: off=%03x\n", space->device().safe_pcbase(), space->machine().time().as_double(), offset ));
607	607	state->m_bank_switch = offset;
608	608	hp48_apply_modules(state);
609	609	}
r17788	r17789
834	834	/* RESET opcode */
835	835	void hp48_mem_reset( device_t *device )
836	836	{
837		LOG(( "%05x %f hp48_mem_reset\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double() ));
	837	LOG(( "%05x %f hp48_mem_reset\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double() ));
838	838	hp48_reset_modules(device->machine());
839	839	}
840	840
r17788	r17789
845	845	hp48_state *state = device->machine().driver_data<hp48_state>();
846	846	int i;
847	847
848		LOG(( "%05x %f hp48_mem_config: %05x\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), v ));
	848	LOG(( "%05x %f hp48_mem_config: %05x\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), v ));
849	849
850	850	/* find the highest priority unconfigured module (except non-configurable NCE1)... */
851	851	for ( i = 0; i < 5; i++ )
r17788	r17789
877	877	{
878	878	hp48_state *state = device->machine().driver_data<hp48_state>();
879	879	int i;
880		LOG(( "%05x %f hp48_mem_unconfig: %05x\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), v ));
	880	LOG(( "%05x %f hp48_mem_unconfig: %05x\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), v ));
881	881
882	882	/* find the highest priority fully configured module at address v (except NCE1)... */
883	883	for ( i = 0; i < 5; i++ )
r17788	r17789
921	921	}
922	922
923	923	LOG(( "%05x %f hp48_mem_id = %02x\n",
924		cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), data ));
	924	device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), data ));
925	925
926	926	return data; /* everything is configured */
927	927	}

trunk/src/mess/machine/macpci.c

r17788	r17789
53	53	{
54	54	//  macpci_state *mac = device->machine().driver_data<macpci_state>();
55	55
56		//    printf("VIA1 IN_A (PC %x)\n", cpu_get_pc(mac->m_maincpu));
	56	//    printf("VIA1 IN_A (PC %x)\n", mac->m_maincpu->safe_pc());
57	57
58	58	return 0x80;
59	59	}
r17788	r17789
65	65
66	66	val |= mac->m_cuda->get_treq()<<3;
67	67
68		//    printf("VIA1 IN B = %02x (PC %x)\n", val, cpu_get_pc(mac->m_maincpu));
	68	//    printf("VIA1 IN B = %02x (PC %x)\n", val, mac->m_maincpu->safe_pc());
69	69
70	70	return val;
71	71	}
r17788	r17789
74	74	{
75	75	//  macpci_state *mac = device->machine().driver_data<macpci_state>();
76	76
77		//    printf("VIA1 OUT A: %02x (PC %x)\n", data, cpu_get_pc(mac->m_maincpu));
	77	//    printf("VIA1 OUT A: %02x (PC %x)\n", data, mac->m_maincpu->safe_pc());
78	78	}
79	79
80	80	static WRITE8_DEVICE_HANDLER(mac_via_out_b)
81	81	{
82	82	macpci_state *mac = device->machine().driver_data<macpci_state>();
83	83
84		//    printf("VIA1 OUT B: %02x (PC %x)\n", data, cpu_get_pc(mac->m_maincpu));
	84	//    printf("VIA1 OUT B: %02x (PC %x)\n", data, mac->m_maincpu->safe_pc());
85	85
86	86	#if LOG_ADB
87		printf("PPC: New Cuda state: TIP %d BYTEACK %d (PC %x)\n", (data>>5)&1, (data>>4)&1, cpu_get_pc(mac->m_maincpu));
	87	printf("PPC: New Cuda state: TIP %d BYTEACK %d (PC %x)\n", (data>>5)&1, (data>>4)&1, mac->m_maincpu->safe_pc());
88	88	#endif
89	89	mac->m_cuda->set_byteack((data&0x10) ? 1 : 0);
90	90	mac->m_cuda->set_tip((data&0x20) ? 1 : 0);
r17788	r17789
98	98	offset &= 0x0f;
99	99
100	100	if (LOG_VIA)
101		printf("mac_via_r: offset=0x%02x (PC=%x)\n", offset, cpu_get_pc(m_maincpu));
	101	printf("mac_via_r: offset=0x%02x (PC=%x)\n", offset, m_maincpu->safe_pc());
102	102	data = m_via1->read(space, offset);
103	103
104	104	device_adjust_icount(m_maincpu, m_via_cycles);
r17788	r17789
112	112	offset &= 0x0f;
113	113
114	114	if (LOG_VIA)
115		printf("mac_via_w: offset=0x%02x data=0x%08x (PC=%x)\n", offset, data, cpu_get_pc(m_maincpu));
	115	printf("mac_via_w: offset=0x%02x data=0x%08x (PC=%x)\n", offset, data, m_maincpu->safe_pc());
116	116
117	117	if (ACCESSING_BITS_0_7)
118	118	m_via1->write(space, offset, data & 0xff);
r17788	r17789
181	181
182	182	READ32_MEMBER(macpci_state::mac_read_id)
183	183	{
184		printf("Mac read ID reg @ PC=%x\n", cpu_get_pc(m_maincpu));
	184	printf("Mac read ID reg @ PC=%x\n", m_maincpu->safe_pc());
185	185
186	186	switch (m_model)
187	187	{

trunk/src/mess/machine/c65.c

r17788	r17789
508	508	static void c65_fdc_w( running_machine &machine, int offset, int data )
509	509	{
510	510	c65_state *state = machine.driver_data<c65_state>();
511		DBG_LOG(machine, 1, "fdc write", ("%.5x %.2x %.2x\n", cpu_get_pc(machine.device("maincpu")), offset, data));
	511	DBG_LOG(machine, 1, "fdc write", ("%.5x %.2x %.2x\n", machine.device("maincpu")->safe_pc(), offset, data));
512	512	switch (offset & 0xf)
513	513	{
514	514	case 0:
r17788	r17789
593	593	data = state->m_fdc.reg[offset & 0xf];
594	594	break;
595	595	}
596		DBG_LOG(machine, 1, "fdc read", ("%.5x %.2x %.2x\n", cpu_get_pc(machine.device("maincpu")), offset, data));
	596	DBG_LOG(machine, 1, "fdc read", ("%.5x %.2x %.2x\n", machine.device("maincpu")->safe_pc(), offset, data));
597	597	return data;
598	598	}
599	599

trunk/src/mess/machine/ncr5380.c

r17788	r17789
237	237	}
238	238
239	239	if (VERBOSE)
240		logerror("NCR5380: read %s (reg %d) = %02x [PC=%x]\n", rnames[reg], reg, rv, cpu_get_pc(machine().firstcpu));
	240	logerror("NCR5380: read %s (reg %d) = %02x [PC=%x]\n", rnames[reg], reg, rv, machine().firstcpu->safe_pc());
241	241
242	242	return rv;
243	243	}
r17788	r17789
247	247	int reg = offset & 7;
248	248
249	249	if (VERBOSE)
250		logerror("NCR5380: %02x to %s (reg %d) [PC=%x]\n", data, wnames[reg], reg, cpu_get_pc(machine().firstcpu));
	250	logerror("NCR5380: %02x to %s (reg %d) [PC=%x]\n", data, wnames[reg], reg, machine().firstcpu->safe_pc());
251	251
252	252	switch( reg )
253	253	{
r17788	r17789
334	334	if (get_cmd_len(m_5380_Command[0]) == m_cmd_ptr)
335	335	{
336	336	if (VERBOSE)
337		logerror("NCR5380: Command (to ID %d): %x %x %x %x %x %x %x %x %x %x (PC %x)\n", m_last_id, m_5380_Command[0], m_5380_Command[1], m_5380_Command[2], m_5380_Command[3], m_5380_Command[4], m_5380_Command[5], m_5380_Command[6], m_5380_Command[7], m_5380_Command[8], m_5380_Command[9], cpu_get_pc(machine().firstcpu));
	337	logerror("NCR5380: Command (to ID %d): %x %x %x %x %x %x %x %x %x %x (PC %x)\n", m_last_id, m_5380_Command[0], m_5380_Command[1], m_5380_Command[2], m_5380_Command[3], m_5380_Command[4], m_5380_Command[5], m_5380_Command[6], m_5380_Command[7], m_5380_Command[8], m_5380_Command[9], machine().firstcpu->safe_pc());
338	338
339	339	m_scsi_devices[m_last_id]->SetCommand(&m_5380_Command[0], 16);
340	340	m_scsi_devices[m_last_id]->ExecCommand(&m_d_limit);

trunk/src/mess/machine/rm380z.c

r17788	r17789
29	29	switch ( offset )
30	30	{
31	31	case 0xFC:      // PORT0
32		//printf("FBFCw[%2.2x] FBFD [%2.2x] FBFE [%2.2x] PC [%4.4x] writenum [%4.4x]\n",data,m_fbfd,m_fbfe,cpu_get_pc(machine().device("maincpu")),writenum);
	32	//printf("FBFCw[%2.2x] FBFD [%2.2x] FBFE [%2.2x] PC [%4.4x] writenum [%4.4x]\n",data,m_fbfd,m_fbfe,machine().device("maincpu")->safe_pc(),writenum);
33	33	m_port0 = data;
34	34	if (data&0x01)
35	35	{
r17788	r17789
43	43	break;
44	44
45	45	case 0xFD:      // screen line counter (?)
46		//printf("FBFC [%2.2x] FBFDw[%2.2x] FBFE [%2.2x] PC [%4.4x] writenum [%4.4x]\n",m_port0,data,m_fbfe,cpu_get_pc(machine().device("maincpu")),writenum);
	46	//printf("FBFC [%2.2x] FBFDw[%2.2x] FBFE [%2.2x] PC [%4.4x] writenum [%4.4x]\n",m_port0,data,m_fbfe,machine().device("maincpu")->safe_pc(),writenum);
47	47
48	48	m_old_old_fbfd=m_old_fbfd;
49	49	m_old_fbfd=m_fbfd;
r17788	r17789
56	56	break;
57	57
58	58	case 0xFE:      // line on screen to write to divided by 2
59		//printf("FBFC [%2.2x] FBFD [%2.2x] FBFEw[%2.2x] PC [%4.4x] writenum [%4.4x]\n",m_port0,m_fbfd,data,cpu_get_pc(machine().device("maincpu")),writenum);
	59	//printf("FBFC [%2.2x] FBFD [%2.2x] FBFEw[%2.2x] PC [%4.4x] writenum [%4.4x]\n",m_port0,m_fbfd,data,machine().device("maincpu")->safe_pc(),writenum);
60	60	m_fbfe=data;
61	61	break;
62	62
r17788	r17789
81	81	data = m_port0_kbd;
82	82	//if (m_port0_kbd!=0) m_port0_kbd=0;
83	83	//m_port0_kbd=0;
84		//printf("read of port0 (kbd) from PC [%x]\n",cpu_get_pc(machine().device("maincpu")));
	84	//printf("read of port0 (kbd) from PC [%x]\n",machine().device("maincpu")->safe_pc());
85	85	break;
86	86
87	87	case 0xFD:      // "counter" (?)
r17788	r17789
91	91
92	92	case 0xFE:      // PORT1
93	93	data = m_port1;
94		//printf("read of port1 from PC [%x]\n",cpu_get_pc(machine().device("maincpu")));
	94	//printf("read of port1 from PC [%x]\n",machine().device("maincpu")->safe_pc());
95	95	break;
96	96
97	97	case 0xFF:      // user port
r17788	r17789
134	134
135	135	WRITE8_MEMBER( rm380z_state::rm380z_portlow_w )
136	136	{
137		//printf("port write [%x] [%x] at PC [%x]\n",offset,data,cpu_get_pc(machine().device("maincpu")));
	137	//printf("port write [%x] [%x] at PC [%x]\n",offset,data,machine().device("maincpu")->safe_pc());
138	138	}
139	139
140	140	READ8_MEMBER( rm380z_state::rm380z_porthi_r )

trunk/src/mess/machine/isa_ide_cd.c

r17788	r17789
127	127	}
128	128	if (m_cur_drive==1) return 0x00;
129	129	data = atapi_regs[reg];
130		//logerror("ATAPI: reg %d = %x (offset %x mask %x) [%08x][read]\n", reg, data, offset, mem_mask,cpu_get_pc(machine().device("maincpu")));
	130	//logerror("ATAPI: reg %d = %x (offset %x mask %x) [%08x][read]\n", reg, data, offset, mem_mask,machine().device("maincpu")->safe_pc());
131	131	data <<= shift;
132	132	}
133	133	return data;

trunk/src/mess/machine/a2cffa.c

r17788	r17789
233	233	{
234	234	if (!m_writeprotect)
235	235	{
236		//      printf("Write %02x to EEPROM at %x (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
	236	//      printf("Write %02x to EEPROM at %x (PC=%x)\n", data, offset, space.device().safe_pc());
237	237	m_eeprom[offset + 0x800] = data;
238	238	}
239	239	}

trunk/src/mess/machine/coco.c

r17788	r17789
261	261	address_space *program = m_maincpu->space(AS_PROGRAM);
262	262
263	263	// get the previous and current PC
264		UINT16 prev_pc = cpu_get_previouspc(m_maincpu);
265		UINT16 pc = cpu_get_pc(m_maincpu);
	264	UINT16 prev_pc = m_maincpu->safe_pcbase();
	265	UINT16 pc = m_maincpu->safe_pc();
266	266
267	267	// get the byte; and skip over header bytes
268	268	byte = program->read_byte(prev_pc);

trunk/src/mess/machine/gb.c

r17788	r17789
430	430
431	431	WRITE8_MEMBER(gb_state::gb_rom_bank_select_mbc3)
432	432	{
433		logerror( "0x%04X: write to mbc3 rom bank select register 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), offset, data );
	433	logerror( "0x%04X: write to mbc3 rom bank select register 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), offset, data );
434	434	data &= 0x7F; /* Only uses lower 7 bits */
435	435	/* Selecting bank 0 == selecting bank 1 */
436	436	if( data == 0 )
r17788	r17789
447	447	Writing into 2000-2FFF sets the lower 8 bits
448	448	Writing into 3000-3FFF sets the 9th bit
449	449	*/
450		logerror( "0x%04X: MBC5 ROM Bank select write 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), offset, data );
	450	logerror( "0x%04X: MBC5 ROM Bank select write 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), offset, data );
451	451	if( offset & 0x1000 )
452	452	{
453	453	m_ROMBank = (m_ROMBank & 0xFF ) | ( ( data & 0x01 ) << 8 );
r17788	r17789
462	462
463	463	WRITE8_MEMBER(gb_state::gb_ram_bank_select_mbc6)
464	464	{
465		logerror( "0x%04X: write to mbc6 ram enable area: %04X <- 0x%02X\n", cpu_get_pc( &space.device() ), offset, data );
	465	logerror( "0x%04X: write to mbc6 ram enable area: %04X <- 0x%02X\n", space.device() .safe_pc( ), offset, data );
466	466	}
467	467
468	468	WRITE8_MEMBER(gb_state::gb_rom_bank_select_mbc6_1)
469	469	{
470		logerror( "0x%04X: write to mbc6 rom area: 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), 0x2000 + offset, data );
	470	logerror( "0x%04X: write to mbc6 rom area: 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), 0x2000 + offset, data );
471	471	if ( offset & 0x0800 )
472	472	{
473	473	if ( data == 0x00 )
r17788	r17789
483	483
484	484	WRITE8_MEMBER(gb_state::gb_rom_bank_select_mbc6_2)
485	485	{
486		logerror( "0x%04X: write to mbc6 rom area: 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), 0x3000 + offset, data );
	486	logerror( "0x%04X: write to mbc6 rom area: 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), 0x3000 + offset, data );
487	487	if ( offset & 0x0800 )
488	488	{
489	489	if ( data == 0x00 )
r17788	r17789
499	499
500	500	WRITE8_MEMBER(gb_state::gb_rom_bank_select_mbc7)
501	501	{
502		logerror( "0x%04X: write to mbc7 rom select register: 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), 0x2000 + offset, data );
	502	logerror( "0x%04X: write to mbc7 rom select register: 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), 0x2000 + offset, data );
503	503	/* Bit 12 must be set for writing to the mbc register */
504	504	if ( offset & 0x0100 )
505	505	{
r17788	r17789
510	510
511	511	WRITE8_MEMBER(gb_state::gb_rom_bank_unknown_mbc7)
512	512	{
513		logerror( "0x%04X: write to mbc7 rom area: 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), 0x3000 + offset, data );
	513	logerror( "0x%04X: write to mbc7 rom area: 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), 0x3000 + offset, data );
514	514	/* Bit 12 must be set for writing to the mbc register */
515	515	if ( offset & 0x0100 )
516	516	{
r17788	r17789
528	528
529	529	WRITE8_MEMBER(gb_state::gb_rom_bank_select_wisdom)
530	530	{
531		logerror( "0x%04X: wisdom tree mapper write to address 0x%04X\n", cpu_get_pc( &space.device() ), offset );
	531	logerror( "0x%04X: wisdom tree mapper write to address 0x%04X\n", space.device() .safe_pc( ), offset );
532	532	/* The address determines the bank to select */
533	533	m_ROMBank = ( offset << 1 ) & 0x1FF;
534	534	membank( "bank5" )->set_base( m_ROMMap[ m_ROMBank ] );
r17788	r17789
549	549
550	550	WRITE8_MEMBER(gb_state::gb_ram_bank_select_mbc3)
551	551	{
552		logerror( "0x%04X: write mbc3 ram bank select register 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), offset, data );
	552	logerror( "0x%04X: write mbc3 ram bank select register 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), offset, data );
553	553	if( data & 0x8 )
554	554	{   /* RTC banks */
555	555	if ( m_CartType & TIMER )
r17788	r17789
573	573
574	574	WRITE8_MEMBER(gb_state::gb_ram_bank_select_mbc5)
575	575	{
576		logerror( "0x%04X: MBC5 RAM Bank select write 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), offset, data );
	576	logerror( "0x%04X: MBC5 RAM Bank select write 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), offset, data );
577	577	data &= 0x0F;
578	578	if( m_CartType & RUMBLE )
579	579	{
r17788	r17789
588	588	{
589	589	/* FIXME: Currently we don't handle this, but a value of 0xA will enable
590	590	* writing to the cart's RAM banks */
591		logerror( "0x%04X: Write to ram enable register 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), offset, data );
	591	logerror( "0x%04X: Write to ram enable register 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), offset, data );
592	592	}
593	593
594	594	WRITE8_MEMBER(gb_state::gb_mem_mode_select_mbc1)
r17788	r17789
599	599
600	600	WRITE8_MEMBER(gb_state::gb_mem_mode_select_mbc3)
601	601	{
602		logerror( "0x%04X: Write to mbc3 mem mode select register 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), offset, data );
	602	logerror( "0x%04X: Write to mbc3 mem mode select register 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), offset, data );
603	603	if( m_CartType & TIMER )
604	604	{
605	605	/* FIXME: RTC Latch goes here */
r17788	r17789
613	613
614	614	WRITE8_MEMBER(gb_state::gb_ram_tama5)
615	615	{
616		logerror( "0x%04X: TAMA5 write 0x%04X <- 0x%02X\n", cpu_get_pc( &space.device() ), 0xA000 + offset, data );
	616	logerror( "0x%04X: TAMA5 write 0x%04X <- 0x%02X\n", space.device() .safe_pc( ), 0xA000 + offset, data );
617	617	switch( offset & 0x0001 )
618	618	{
619	619	case 0x0000:    /* Write to data register */
r17788	r17789
657	657	}
658	658	case 0x80:      /* Unknown, some kind of read (when 07=01)/write (when 07=00/02) */
659	659	default:
660		logerror( "0x%04X: Unknown addressing mode\n", cpu_get_pc( &space.device() ) );
	660	logerror( "0x%04X: Unknown addressing mode\n", space.device() .safe_pc( ) );
661	661	break;
662	662	}
663	663	break;
r17788	r17789
684	684	m_MBC3RTCData[0] = ( m_gbTama5Byte & 0xF0 ) >> 4;
685	685	break;
686	686	default:
687		logerror( "0x%04X: Unknown tama5 command 0x%02X\n", cpu_get_pc( &space.device() ), data );
	687	logerror( "0x%04X: Unknown tama5 command 0x%02X\n", space.device() .safe_pc( ), data );
688	688	break;
689	689	}
690	690	m_gbLastTama5Command = data;
r17788	r17789
697	697
698	698	WRITE8_MEMBER(gb_state::gb_rom_bank_mmm01_0000_w)
699	699	{
700		logerror( "0x%04X: write 0x%02X to 0x%04X\n", cpu_get_pc( &space.device() ), data, offset+0x000 );
	700	logerror( "0x%04X: write 0x%02X to 0x%04X\n", space.device() .safe_pc( ), data, offset+0x000 );
701	701	if ( data & 0x40 )
702	702	{
703	703	m_mmm01_bank_offset = m_mmm01_reg1;
r17788	r17789
709	709
710	710	WRITE8_MEMBER(gb_state::gb_rom_bank_mmm01_2000_w)
711	711	{
712		logerror( "0x%04X: write 0x%02X to 0x%04X\n", cpu_get_pc( &space.device() ), data, offset+0x2000 );
	712	logerror( "0x%04X: write 0x%02X to 0x%04X\n", space.device() .safe_pc( ), data, offset+0x2000 );
713	713
714	714	m_mmm01_reg1 = data & m_ROMMask;
715	715	m_mmm01_bank = m_mmm01_reg1 & m_mmm01_bank_mask;
r17788	r17789
722	722
723	723	WRITE8_MEMBER(gb_state::gb_rom_bank_mmm01_4000_w)
724	724	{
725		logerror( "0x%04X: write 0x%02X to 0x%04X\n", cpu_get_pc( &space.device() ), data, offset+0x4000 );
	725	logerror( "0x%04X: write 0x%02X to 0x%04X\n", space.device() .safe_pc( ), data, offset+0x4000 );
726	726	}
727	727
728	728	WRITE8_MEMBER(gb_state::gb_rom_bank_mmm01_6000_w)
729	729	{
730		logerror( "0x%04X: write 0x%02X to 0x%04X\n", cpu_get_pc( &space.device() ), data, offset+0x6000 );
	730	logerror( "0x%04X: write 0x%02X to 0x%04X\n", space.device() .safe_pc( ), data, offset+0x6000 );
731	731	/* Not sure if this is correct, Taito Variety Pack sets these values */
732	732	/* Momotarou Collection 2 writes 01 and 21 here */
733	733	switch( data )

trunk/src/mess/machine/thomson.c

r17788	r17789
103	103	if ( bitpos >= to7_k7_bitsize )
104	104	bitpos = to7_k7_bitsize -1;
105	105	VLOG (( "$%04x %f to7_get_cassette: state=$%X pos=%f samppos=%i bit=%i\n",
106		cpu_get_previouspc(machine.device("maincpu")), machine.time().as_double(), state, pos, bitpos,
	106	machine.device("maincpu")->safe_pcbase(), machine.time().as_double(), state, pos, bitpos,
107	107	to7_k7_bits[ bitpos ] ));
108	108	return to7_k7_bits[ bitpos ];
109	109	}
r17788	r17789
124	124	}
125	125	k = ( chg >= 13 ) ? 1 : 0;
126	126	VLOG (( "$%04x %f to7_get_cassette: state=$%X pos=%f samppos=%i bit=%i (%i)\n",
127		cpu_get_previouspc(machine.device("maincpu")), machine.time().as_double(), state, pos, bitpos,
	127	machine.device("maincpu")->safe_pcbase(), machine.time().as_double(), state, pos, bitpos,
128	128	k, chg ));
129	129	return k;
130	130	}
r17788	r17789
152	152	double pos = img->get_position();
153	153
154	154	LOG (( "$%04x %f to7_set_cassette_motor: cassette motor %s bitpos=%i\n",
155		cpu_get_previouspc(device->machine().device("maincpu")), img->machine().time().as_double(), data ? "off" : "on",
	155	device->machine().device("maincpu")->safe_pcbase(), img->machine().time().as_double(), data ? "off" : "on",
156	156	(int) (pos / TO7_BIT_LENGTH) ));
157	157
158	158	if ( (state & CASSETTE_MASK_MOTOR) == CASSETTE_MOTOR_DISABLED && !data && pos > 0.3 )
r17788	r17789
203	203	hbit = hbit >= 0;
204	204
205	205	VLOG (( "$%04x %f mo5_get_cassette: state=$%X pos=%f hbitpos=%i hbit=%i\n",
206		cpu_get_previouspc(machine.device("maincpu")), machine.time().as_double(), state, pos,
	206	machine.device("maincpu")->safe_pcbase(), machine.time().as_double(), state, pos,
207	207	(int) (pos / MO5_HBIT_LENGTH), hbit ));
208	208	return hbit;
209	209	}
r17788	r17789
228	228	double pos = img->get_position();
229	229
230	230	LOG (( "$%04x %f mo5_set_cassette_motor: cassette motor %s hbitpos=%i\n",
231		cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), data ? "off" : "on",
	231	device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), data ? "off" : "on",
232	232	(int) (pos / MO5_HBIT_LENGTH) ));
233	233
234	234	if ( (state & CASSETTE_MASK_MOTOR) == CASSETTE_MOTOR_DISABLED &&  !data && pos > 0.3 )
r17788	r17789
734	734	int tx  = data & 1;
735	735	int dtr = ( data & 2 ) ? 1 : 0;
736	736
737		LOG_IO(( "$%04x %f to7_io_porta_out: tx=%i, dtr=%i\n",  cpu_get_previouspc(machine().device("maincpu")), machine().time().as_double(), tx, dtr ));
	737	LOG_IO(( "$%04x %f to7_io_porta_out: tx=%i, dtr=%i\n",  machine().device("maincpu")->safe_pcbase(), machine().time().as_double(), tx, dtr ));
738	738	if ( dtr )
739	739	m_connection_state |=  SERIAL_STATE_DTR;
740	740	else
r17788	r17789
758	758	else
759	759	cts = !printer->busy_r();
760	760
761		LOG_IO(( "$%04x %f to7_io_porta_in: mode=%i cts=%i, dsr=%i, rd=%i\n", cpu_get_previouspc(machine().device("maincpu")), machine().time().as_double(), to7_io_mode(machine()), cts, dsr, rd ));
	761	LOG_IO(( "$%04x %f to7_io_porta_in: mode=%i cts=%i, dsr=%i, rd=%i\n", machine().device("maincpu")->safe_pcbase(), machine().time().as_double(), to7_io_mode(machine()), cts, dsr, rd ));
762	762
763	763	return (dsr ? 0x20 : 0) | (cts ? 0x40 : 0) | (rd ? 0x80: 0);
764	764	}
r17788	r17789
769	769	{
770	770	centronics_device *printer = device->machine().device<centronics_device>("centronics");
771	771
772		LOG_IO(( "$%04x %f to7_io_portb_out: CENTRONICS set data=$%02X\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), data ));
	772	LOG_IO(( "$%04x %f to7_io_portb_out: CENTRONICS set data=$%02X\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), data ));
773	773
774	774	/* set 8-bit data */
775	775	printer->write( *device->machine().memory().first_space(), 0, data);
r17788	r17789
781	781	{
782	782	centronics_device *printer = device->machine().device<centronics_device>("centronics");
783	783
784		LOG_IO(( "$%04x %f to7_io_cb2_out: CENTRONICS set strobe=%i\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), data ));
	784	LOG_IO(( "$%04x %f to7_io_cb2_out: CENTRONICS set strobe=%i\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), data ));
785	785
786	786	/* send STROBE to printer */
787	787	printer->strobe_w(data);
r17788	r17789
1283	1283	/* bit 6:     parity error (ignored) */
1284	1284	/* bit 7:     interrupt */
1285	1285	LOG_MIDI(( "$%04x %f to7_midi_r: status $%02X (rdrf=%i, tdre=%i, ovrn=%i, irq=%i)\n",
1286		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), to7_midi_status,
	1286	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), to7_midi_status,
1287	1287	(to7_midi_status & ACIA_6850_RDRF) ? 1 : 0,
1288	1288	(to7_midi_status & ACIA_6850_TDRE) ? 1 : 0,
1289	1289	(to7_midi_status & ACIA_6850_OVRN) ? 1 : 0,
r17788	r17789
1303	1303	to7_midi_status &= ~ACIA_6850_OVRN;
1304	1304	to7_midi_overrun = 0;
1305	1305	LOG_MIDI(( "$%04x %f to7_midi_r: read data $%02X\n",
1306		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), data ));
	1306	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data ));
1307	1307	to7_midi_update_irq( space->machine() );
1308	1308	}
1309	1309	return data;
r17788	r17789
1312	1312
1313	1313	default:
1314	1314	logerror( "$%04x to7_midi_r: invalid offset %i\n",
1315		cpu_get_previouspc(space->machine().device("maincpu")),  offset );
	1315	space->machine().device("maincpu")->safe_pcbase(),  offset );
1316	1316	return 0;
1317	1317	}
1318	1318	}
r17788	r17789
1331	1331	if ( (data & 3) == 3 )
1332	1332	{
1333	1333	/* reset */
1334		LOG_MIDI(( "$%04x %f to7_midi_w: reset (data=$%02X)\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), data ));
	1334	LOG_MIDI(( "$%04x %f to7_midi_w: reset (data=$%02X)\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data ));
1335	1335	to7_midi_overrun = 0;
1336	1336	to7_midi_status = 2;
1337	1337	to7_midi_intr = 0;
r17788	r17789
1348	1348	static const int stop[8] = { 2,2,1,1,2,1,1,1 };
1349	1349	static const char parity[8] = { 'e','o','e','o','-','-','e','o' };
1350	1350	LOG_MIDI(( "$%04x %f to7_midi_w: set control to $%02X (bits=%i, stop=%i, parity=%c, intr in=%i out=%i)\n",
1351		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(),
	1351	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
1352	1352	data,
1353	1353	bits[ (data >> 2) & 7 ],
1354	1354	stop[ (data >> 2) & 7 ],
r17788	r17789
1362	1362
1363	1363
1364	1364	case 1: /* output data */
1365		LOG_MIDI(( "$%04x %f to7_midi_w: write data $%02X\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), data ));
	1365	LOG_MIDI(( "$%04x %f to7_midi_w: write data $%02X\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data ));
1366	1366	if ( data == 0x55 )
1367	1367	/* cable-detect: shortcut */
1368	1368	chardev_fake_in( to7_midi_chardev, 0x55 );
r17788	r17789
1376	1376
1377	1377
1378	1378	default:
1379		logerror( "$%04x to7_midi_w: invalid offset %i (data=$%02X) \n", cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	1379	logerror( "$%04x to7_midi_w: invalid offset %i (data=$%02X) \n", space->machine().device("maincpu")->safe_pcbase(), offset, data );
1380	1380	}
1381	1381	}
1382	1382
r17788	r17789
1546	1546	static WRITE8_DEVICE_HANDLER ( to770_sys_cb2_out )
1547	1547	{
1548	1548	/* video overlay: black pixels are transparent and show TV image underneath */
1549		LOG(( "$%04x to770_sys_cb2_out: video overlay %i\n", cpu_get_previouspc(device->machine().device("maincpu")), data ));
	1549	LOG(( "$%04x to770_sys_cb2_out: video overlay %i\n", device->machine().device("maincpu")->safe_pcbase(), data ));
1550	1550	}
1551	1551
1552	1552
r17788	r17789
1690	1690	case 2: return (lt3 << 7) | (inil << 6);
1691	1691	case 3: return (init << 7);
1692	1692	default:
1693		logerror( "$%04x to770_gatearray_r: invalid offset %i\n", cpu_get_previouspc(space->machine().device("maincpu")), offset );
	1693	logerror( "$%04x to770_gatearray_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(), offset );
1694	1694	return 0;
1695	1695	}
1696	1696	}
r17788	r17789
1921	1921	case 2: return (lt3 << 7) | (inil << 6);
1922	1922	case 3: return (init << 7);
1923	1923	default:
1924		logerror( "$%04x mo5_gatearray_r: invalid offset %i\n",  cpu_get_previouspc(space->machine().device("maincpu")), offset );
	1924	logerror( "$%04x mo5_gatearray_r: invalid offset %i\n",  space->machine().device("maincpu")->safe_pcbase(), offset );
1925	1925	return 0;
1926	1926	}
1927	1927	}
r17788	r17789
2203	2203
2204	2204	WRITE8_HANDLER ( to9_ieee_w )
2205	2205	{
2206		logerror( "$%04x %f to9_ieee_w: unhandled write $%02X to register %i\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), data, offset );
	2206	logerror( "$%04x %f to9_ieee_w: unhandled write $%02X to register %i\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data, offset );
2207	2207	}
2208	2208
2209	2209
2210	2210
2211	2211	READ8_HANDLER  ( to9_ieee_r )
2212	2212	{
2213		logerror( "$%04x %f to9_ieee_r: unhandled read from register %i\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), offset );
	2213	logerror( "$%04x %f to9_ieee_r: unhandled read from register %i\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), offset );
2214	2214	return 0;
2215	2215	}
2216	2216
r17788	r17789
2241	2241	case 2: return (lt3 << 7) | (inil << 6);
2242	2242	case 3: return (v.init << 7) | (init << 6); /* != TO7/70 */
2243	2243	default:
2244		logerror( "$%04x to9_gatearray_r: invalid offset %i\n", cpu_get_previouspc(space->machine().device("maincpu")), offset );
	2244	logerror( "$%04x to9_gatearray_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(), offset );
2245	2245	return 0;
2246	2246	}
2247	2247	}
r17788	r17789
2339	2339
2340	2340	WRITE8_HANDLER ( to9_vreg_w )
2341	2341	{
2342		LOG_VIDEO(( "$%04x %f to9_vreg_w: off=%i ($%04X) data=$%02X\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), offset, 0xe7da + offset, data ));
	2342	LOG_VIDEO(( "$%04x %f to9_vreg_w: off=%i ($%04X) data=$%02X\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), offset, 0xe7da + offset, data ));
2343	2343
2344	2344	switch ( offset )
2345	2345	{
r17788	r17789
2668	2668	/* bit 7:     interrupt */
2669	2669
2670	2670	LOG_KBD(( "$%04x %f to9_kbd_r: status $%02X (rdrf=%i, tdre=%i, ovrn=%i, pe=%i, irq=%i)\n",
2671		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), to9_kbd_status,
	2671	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), to9_kbd_status,
2672	2672	(to9_kbd_status & ACIA_6850_RDRF) ? 1 : 0,
2673	2673	(to9_kbd_status & ACIA_6850_TDRE) ? 1 : 0,
2674	2674	(to9_kbd_status & ACIA_6850_OVRN) ? 1 : 0,
r17788	r17789
2685	2685	else
2686	2686	to9_kbd_status &= ~(ACIA_6850_OVRN | ACIA_6850_RDRF);
2687	2687	to9_kbd_overrun = 0;
2688		LOG_KBD(( "$%04x %f to9_kbd_r: read data $%02X\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), to9_kbd_in ));
	2688	LOG_KBD(( "$%04x %f to9_kbd_r: read data $%02X\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), to9_kbd_in ));
2689	2689	to9_kbd_update_irq(space->machine());
2690	2690	}
2691	2691	return to9_kbd_in;
2692	2692
2693	2693	default:
2694		logerror( "$%04x to9_kbd_r: invalid offset %i\n", cpu_get_previouspc(space->machine().device("maincpu")),  offset );
	2694	logerror( "$%04x to9_kbd_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(),  offset );
2695	2695	return 0;
2696	2696	}
2697	2697	}
r17788	r17789
2713	2713	to9_kbd_overrun = 0;
2714	2714	to9_kbd_status = ACIA_6850_TDRE;
2715	2715	to9_kbd_intr = 0;
2716		LOG_KBD(( "$%04x %f to9_kbd_w: reset (data=$%02X)\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), data ));
	2716	LOG_KBD(( "$%04x %f to9_kbd_w: reset (data=$%02X)\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data ));
2717	2717	}
2718	2718	else
2719	2719	{
r17788	r17789
2727	2727	to9_kbd_intr = data >> 5;
2728	2728
2729	2729	LOG_KBD(( "$%04x %f to9_kbd_w: set control to $%02X (parity=%i, intr in=%i out=%i)\n",
2730		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(),
	2730	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
2731	2731	data, to9_kbd_parity, to9_kbd_intr >> 2,
2732	2732	(to9_kbd_intr & 3) ? 1 : 0 ));
2733	2733	}
r17788	r17789
2758	2758	case 0xFE: to9_kbd_periph = 0; break;
2759	2759
2760	2760	default:
2761		logerror( "$%04x %f to9_kbd_w: unknown kbd command %02X\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), data );
	2761	logerror( "$%04x %f to9_kbd_w: unknown kbd command %02X\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data );
2762	2762	}
2763	2763
2764	2764	thom_set_caps_led( space->machine(), !to9_kbd_caps );
2765	2765
2766	2766	LOG(( "$%04x %f to9_kbd_w: kbd command %02X (caps=%i, pad=%i, periph=%i)\n",
2767		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), data,
	2767	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data,
2768	2768	to9_kbd_caps, to9_kbd_pad, to9_kbd_periph ));
2769	2769
2770	2770	break;
2771	2771
2772	2772	default:
2773		logerror( "$%04x to9_kbd_w: invalid offset %i (data=$%02X) \n", cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	2773	logerror( "$%04x to9_kbd_w: invalid offset %i (data=$%02X) \n", space->machine().device("maincpu")->safe_pcbase(), offset, data );
2774	2774	}
2775	2775	}
2776	2776
r17788	r17789
3916	3916	break;
3917	3917
3918	3918	default:
3919		logerror( "$%04x to8_gatearray_r: invalid offset %i\n", cpu_get_previouspc(space->machine().device("maincpu")), offset );
	3919	logerror( "$%04x to8_gatearray_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(), offset );
3920	3920	res = 0;
3921	3921	}
3922	3922
3923	3923	LOG_VIDEO(( "$%04x %f to8_gatearray_r: off=%i ($%04X) res=$%02X lightpen=%i\n",
3924		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(),
	3924	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
3925	3925	offset, 0xe7e4 + offset, res, to7_lightpen ));
3926	3926
3927	3927	return res;
r17788	r17789
3932	3932	WRITE8_HANDLER ( to8_gatearray_w )
3933	3933	{
3934	3934	LOG_VIDEO(( "$%04x %f to8_gatearray_w: off=%i ($%04X) data=$%02X\n",
3935		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(),
	3935	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
3936	3936	offset, 0xe7e4 + offset, data ));
3937	3937
3938	3938	switch ( offset )
r17788	r17789
3964	3964
3965	3965	default:
3966	3966	logerror( "$%04x to8_gatearray_w: invalid offset %i (data=$%02X)\n",
3967		cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	3967	space->machine().device("maincpu")->safe_pcbase(), offset, data );
3968	3968	}
3969	3969	}
3970	3970
r17788	r17789
4019	4019	WRITE8_HANDLER ( to8_vreg_w )
4020	4020	{
4021	4021	LOG_VIDEO(( "$%04x %f to8_vreg_w: off=%i ($%04X) data=$%02X\n",
4022		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(),
	4022	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
4023	4023	offset, 0xe7da + offset, data ));
4024	4024
4025	4025	switch ( offset )
r17788	r17789
4075	4075	{
4076	4076	int ktest = to8_kbd_ktest (device->machine());
4077	4077
4078		LOG_KBD(( "$%04x %f: to8_sys_porta_in ktest=%i\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), ktest ));
	4078	LOG_KBD(( "$%04x %f: to8_sys_porta_in ktest=%i\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), ktest ));
4079	4079
4080	4080	return ktest;
4081	4081	}
r17788	r17789
4757	4757	{
4758	4758	centronics_device *printer = device->machine().device<centronics_device>("centronics");
4759	4759
4760		LOG (( "$%04x %f mo6_game_porta_out: CENTRONICS set data=$%02X\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), data ));
	4760	LOG (( "$%04x %f mo6_game_porta_out: CENTRONICS set data=$%02X\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), data ));
4761	4761
4762	4762	/* centronics data */
4763	4763	printer->write( *device->machine().memory().first_space(), 0, data);
r17788	r17789
4769	4769	{
4770	4770	centronics_device *printer = device->machine().device<centronics_device>("centronics");
4771	4771
4772		LOG (( "$%04x %f mo6_game_cb2_out: CENTRONICS set strobe=%i\n", cpu_get_previouspc(device->machine().device("maincpu")), device->machine().time().as_double(), data ));
	4772	LOG (( "$%04x %f mo6_game_cb2_out: CENTRONICS set strobe=%i\n", device->machine().device("maincpu")->safe_pcbase(), device->machine().time().as_double(), data ));
4773	4773
4774	4774	/* centronics strobe */
4775	4775	printer->strobe_w(data);
r17788	r17789
4975	4975	break;
4976	4976
4977	4977	default:
4978		logerror( "$%04x mo6_gatearray_r: invalid offset %i\n", cpu_get_previouspc(space->machine().device("maincpu")), offset );
	4978	logerror( "$%04x mo6_gatearray_r: invalid offset %i\n", space->machine().device("maincpu")->safe_pcbase(), offset );
4979	4979	res = 0;
4980	4980	}
4981	4981
4982	4982	LOG_VIDEO(( "$%04x %f mo6_gatearray_r: off=%i ($%04X) res=$%02X lightpen=%i\n",
4983		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(),
	4983	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
4984	4984	offset, 0xa7e4 + offset, res, to7_lightpen ));
4985	4985
4986	4986	return res;
r17788	r17789
4991	4991	WRITE8_HANDLER ( mo6_gatearray_w )
4992	4992	{
4993	4993	LOG_VIDEO(( "$%04x %f mo6_gatearray_w: off=%i ($%04X) data=$%02X\n",
4994		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(),
	4994	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
4995	4995	offset, 0xa7e4 + offset, data ));
4996	4996
4997	4997	switch ( offset )
r17788	r17789
5021	5021	break;
5022	5022
5023	5023	default:
5024		logerror( "$%04x mo6_gatearray_w: invalid offset %i (data=$%02X)\n", cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	5024	logerror( "$%04x mo6_gatearray_w: invalid offset %i (data=$%02X)\n", space->machine().device("maincpu")->safe_pcbase(), offset, data );
5025	5025	}
5026	5026	}
5027	5027
r17788	r17789
5061	5061	WRITE8_HANDLER ( mo6_vreg_w )
5062	5062	{
5063	5063	LOG_VIDEO(( "$%04x %f mo6_vreg_w: off=%i ($%04X) data=$%02X\n",
5064		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(),
	5064	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(),
5065	5065	offset, 0xa7da + offset, data ));
5066	5066
5067	5067	switch ( offset )
r17788	r17789
5219	5219	if ( to7_controller_type )
5220	5220	return to7_floppy_r ( space, offset );
5221	5221
5222		logerror( "$%04x %f mo5nr_net_r: read from reg %i\n", cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), offset );
	5222	logerror( "$%04x %f mo5nr_net_r: read from reg %i\n", space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), offset );
5223	5223
5224	5224	return 0;
5225	5225	}
r17788	r17789
5232	5232	to7_floppy_w ( space, offset, data );
5233	5233	else
5234	5234	logerror( "$%04x %f mo5nr_net_w: write $%02X to reg %i\n",
5235		cpu_get_previouspc(space->machine().device("maincpu")), space->machine().time().as_double(), data, offset );
	5235	space->machine().device("maincpu")->safe_pcbase(), space->machine().time().as_double(), data, offset );
5236	5236	}
5237	5237
5238	5238

trunk/src/mess/machine/psxcd.c

r17788	r17789
222	222	}
223	223
224	224	#ifdef debug_cdrom_registers
225		printf("cdrom: read byte %08x = %02x (PC=%x)\n",addr,ret,cpu_get_pc(machine().device("maincpu")));
	225	printf("cdrom: read byte %08x = %02x (PC=%x)\n",addr,ret,machine().device("maincpu")->safe_pc());
226	226	#endif
227	227
228	228	return ret;
r17788	r17789
235	235	void psxcd_device::write_byte(const unsigned int addr, const unsigned char byte)
236	236	{
237	237	#ifdef debug_cdrom_registers
238		printf("cdrom: write byte %08x = %02x (PC=%x)\n",addr,byte,cpu_get_pc(machine().device("maincpu")));
	238	printf("cdrom: write byte %08x = %02x (PC=%x)\n",addr,byte,machine().device("maincpu")->safe_pc());
239	239	#endif
240	240
241	241	switch (addr&3)

trunk/src/mess/machine/thomflop.c

r17788	r17789
280	280	else if ( offset == 8 )
281	281	return to7_5p14_select;
282	282	else
283		logerror ( "%f $%04x to7_5p14_r: invalid read offset %i\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset );
	283	logerror ( "%f $%04x to7_5p14_r: invalid read offset %i\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
284	284	return 0;
285	285	}
286	286
r17788	r17789
304	304	case 4: drive = 2; side = 0; break;
305	305	case 5: drive = 3; side = 1; break;
306	306	default:
307		logerror( "%f $%04x to7_5p14_w: invalid drive select pattern $%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data );
	307	logerror( "%f $%04x to7_5p14_w: invalid drive select pattern $%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data );
308	308	}
309	309
310	310	wd17xx_dden_w(fdc, BIT(data, 7));
r17788	r17789
317	317	wd17xx_set_drive( fdc, drive );
318	318	wd17xx_set_side( fdc, side );
319	319	LOG(( "%f $%04x to7_5p14_w: $%02X set drive=%i side=%i density=%s\n",
320		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")),
	320	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(),
321	321	data, drive, side, (BIT(data, 7) ? "FM" : "MFM")));
322	322	}
323	323	}
324	324	else
325	325	logerror ( "%f $%04x to7_5p14_w: invalid write offset %i (data=$%02X)\n",
326		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	326	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
327	327	}
328	328
329	329
r17788	r17789
366	366	else if ( offset >= 8 && offset <= 9 )
367	367	return to7_5p14sd_select;
368	368	else
369		logerror ( "%f $%04x to7_5p14sd_r: invalid read offset %i\n",  space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset );
	369	logerror ( "%f $%04x to7_5p14sd_r: invalid read offset %i\n",  space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
370	370	return 0;
371	371	}
372	372
r17788	r17789
410	410	mc6843_set_drive( space->machine().device("mc6843"), drive );
411	411	mc6843_set_side( space->machine().device("mc6843"), side );
412	412	LOG(( "%f $%04x to7_5p14sd_w: $%02X set drive=%i side=%i\n",
413		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data, drive, side ));
	413	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data, drive, side ));
414	414	}
415	415	}
416	416	else
417	417	logerror ( "%f $%04x to7_5p14sd_w: invalid write offset %i (data=$%02X)\n",
418		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	418	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
419	419	}
420	420
421	421	static void to7_5p14_index_pulse_callback( device_t *controller,device_t *image, int state )
r17788	r17789
592	592	data = to7qdd->data[ to7qdd->data_idx ];
593	593
594	594	VLOG(( "%f $%04x to7_qdd_read_byte: RDATA off=%i/%i data=$%02X\n",
595		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")),
	595	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(),
596	596	to7qdd->data_idx, to7qdd->data_size, data ));
597	597
598	598	to7qdd->data_idx++;
r17788	r17789
633	633	to7qdd->data_idx++;
634	634
635	635	VLOG (( "%f $%04x to7_qdd_write_byte: got $%02X offs=%i-%i\n",
636		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")), data,
	636	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(), data,
637	637	to7qdd->start_idx, to7qdd->data_idx ));
638	638
639	639	/* end of tentative id field */
r17788	r17789
647	647	UINT8 filler = 0xff;
648	648
649	649	LOG(( "%f $%04x to7_qdd_write_byte: got id field for sector=%i\n",
650		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")), sector ));
	650	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(), sector ));
651	651
652	652	floppy_drive_format_sector( to7_qdd_image(machine),
653	653	0, sector, 0, 0, sector, 128, filler );
r17788	r17789
677	677	int sector = (int) to7qdd->data[ i + 1 ] * 256 + (int) to7qdd->data[ i + 2 ];
678	678
679	679	LOG(( "%f $%04x to7_qdd_write_byte: goto data field for sector=%i\n",
680		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")), sector ));
	680	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(), sector ));
681	681
682	682	floppy_drive_write_sector_data( to7_qdd_image(machine), 0, sector, to7qdd->data + to7qdd->start_idx + 1, 128, 0 );
683	683	thom_floppy_active( machine, 1 );
r17788	r17789
700	700	case 0: /* MC6852 status */
701	701	to7_qdd_stat_update(space->machine());
702	702	VLOG(( "%f $%04x to7_qdd_r: STAT=$%02X irq=%i pe=%i ovr=%i und=%i tr=%i rd=%i ncts=%i\n",
703		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), to7qdd->status,
	703	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), to7qdd->status,
704	704	to7qdd->status & QDD_S_IRQ  ? 1 : 0,
705	705	to7qdd->status & QDD_S_PE   ? 1 : 0,
706	706	to7qdd->status & QDD_S_OVR  ? 1 : 0,
r17788	r17789
723	723	data |= 0x40; /* disk present */
724	724	if ( to7qdd->index_pulse )
725	725	data |= 0x80; /* disk start */
726		VLOG(( "%f $%04x to7_qdd_r: STATUS8 $%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	726	VLOG(( "%f $%04x to7_qdd_r: STATUS8 $%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
727	727	return data;
728	728	}
729	729
730	730	default:
731		logerror ( "%f $%04x to7_qdd_r: invalid read offset %i\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset );
	731	logerror ( "%f $%04x to7_qdd_r: invalid read offset %i\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
732	732	return 0;
733	733	}
734	734	}
r17788	r17789
750	750	to7qdd->ctrl1 = ( data & ~(QDD_C1_RRESET | QDD_C1_TRESET) ) |( data &  (QDD_C1_RRESET | QDD_C1_TRESET) & to7qdd->ctrl1 );
751	751	to7_qdd_stat_update(space->machine());
752	752	VLOG(( "%f $%04x to7_qdd_w: CTRL1=$%02X reset=%c%c %s%sirq=%c%c\n",
753		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data,
	753	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
754	754	data & QDD_C1_RRESET ? 'r' : '-', data & QDD_C1_TRESET ? 't' : '-',
755	755	data & QDD_C1_STRIPSYNC ? "strip-sync " : "",
756	756	data & QDD_C1_CLRSYNC ? "clear-sync " : "",
r17788	r17789
774	774	parity = par[ (data >> 3) & 7 ];
775	775	to7_qdd_stat_update(space->machine());
776	776	VLOG(( "%f $%04x to7_qdd_w: CTRL2=$%02X bits=%i par=%s blen=%i under=%s%s\n",
777		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data,
	777	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
778	778	bits, parname[ parity ], data & QDD_C2_BLEN ? 1 : 2,
779	779	data & QDD_C2_TSYNC ? "sync" : "ff",
780	780	data & QDD_C2_EIE ? "irq-err" : "" ));
r17788	r17789
792	792	to7qdd->status &= ~QDD_S_NCTS;
793	793	to7_qdd_stat_update(space->machine());
794	794	VLOG(( "%f $%04x to7_qdd_w: CTRL3=$%02X %s%ssync-len=%i sync-mode=%s\n",
795		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data,
	795	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
796	796	data & QDD_C3_CLRTUF ? "clr-tuf " : "",
797	797	data & QDD_C3_CLRCTS ? "clr-cts " : "",
798	798	data & QDD_C3_SYNCLEN ? 1 : 2,
r17788	r17789
804	804	break;
805	805
806	806	case 3: /* MC6852 data out => does not seem to be used */
807		VLOG(( "%f $%04x to7_qdd_w: ignored WDATA=$%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	807	VLOG(( "%f $%04x to7_qdd_w: ignored WDATA=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
808	808	break;
809	809
810	810	}
r17788	r17789
812	812
813	813	case 8: /* set drive */
814	814	to7qdd->drive = data;
815		VLOG(( "%f $%04x to7_qdd_w: DRIVE=$%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	815	VLOG(( "%f $%04x to7_qdd_w: DRIVE=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
816	816	break;
817	817
818	818	case 12: /* motor pulse ? */
819	819	thom_floppy_active( space->machine(), 0 );
820		VLOG(( "%f $%04x to7_qdd_w: MOTOR=$%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	820	VLOG(( "%f $%04x to7_qdd_w: MOTOR=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
821	821	break;
822	822
823	823	default:
824		logerror ( "%f $%04x to7_qdd_w: invalid write offset %i (data=$%02X)\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	824	logerror ( "%f $%04x to7_qdd_w: invalid write offset %i (data=$%02X)\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
825	825	}
826	826	}
827	827
r17788	r17789
1052	1052	UINT8 data = thmfc1->data[ thmfc1->data_idx ];
1053	1053
1054	1054	VLOG(( "%f $%04x thmfc_floppy_read_byte: off=%i/%i/%i data=$%02X\n",
1055		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")),
	1055	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(),
1056	1056	thmfc1->data_idx, thmfc1->data_finish - 1, thmfc1->data_size - 1,
1057	1057	data ));
1058	1058
r17788	r17789
1095	1095	data = thmfc1->data[ thmfc1->data_raw_idx ];
1096	1096
1097	1097	VLOG(( "%f $%04x thmfc_floppy_raw_read_byte: off=%i/%i data=$%02X\n",
1098		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")),
	1098	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(),
1099	1099	thmfc1->data_raw_idx, thmfc1->data_raw_size, data ));
1100	1100
1101	1101	thmfc1->data_raw_idx++;
r17788	r17789
1133	1133	}
1134	1134
1135	1135	VLOG (( "%f $%04x thmfc_floppy_qdd_write_byte: $%02X offs=%i-%i\n",
1136		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")), data,
	1136	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(), data,
1137	1137	thmfc1->data_idx,thmfc1->data_raw_idx ));
1138	1138
1139	1139	if ( thmfc1->data_raw_idx == thmfc1->data_idx + 3 &&
r17788	r17789
1145	1145	int sector = (int) thmfc1->data[ thmfc1->data_idx ] * 256 + (int) thmfc1->data[ thmfc1->data_idx + 1 ];
1146	1146	UINT8 filler = 0xff;
1147	1147
1148		LOG(( "%f $%04x thmfc_floppy_qdd_write_byte: id field, sector=%i\n", machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")), sector ));
	1148	LOG(( "%f $%04x thmfc_floppy_qdd_write_byte: id field, sector=%i\n", machine.time().as_double(), machine.device("maincpu")->safe_pcbase(), sector ));
1149	1149
1150	1150	floppy_drive_format_sector( thmfc_floppy_image(machine), 0, sector, 0, 0, sector, 128, filler );
1151	1151	thom_floppy_active( machine, 1 );
r17788	r17789
1175	1175	(int) thmfc1->data[ i + 2 ];
1176	1176
1177	1177	LOG(( "%f $%04x thmfc_floppy_qdd_write_byte: data field, sector=%i\n",
1178		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")), sector ));
	1178	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(), sector ));
1179	1179
1180	1180	floppy_drive_write_sector_data( img, 0, sector, thmfc1->data + thmfc1->data_idx, 128, 0 );
1181	1181	thom_floppy_active( machine, 1 );
r17788	r17789
1190	1190	else
1191	1191	{
1192	1192	thmfc1->data_raw_idx++;
1193		VLOG (( "%f $%04x thmfc_floppy_qdd_write_byte: ignored $%02X\n", machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")), data ));
	1193	VLOG (( "%f $%04x thmfc_floppy_qdd_write_byte: ignored $%02X\n", machine.time().as_double(), machine.device("maincpu")->safe_pcbase(), data ));
1194	1194	}
1195	1195
1196	1196	}
r17788	r17789
1201	1201	static void thmfc_floppy_write_byte ( running_machine &machine, UINT8 data )
1202	1202	{
1203	1203	VLOG (( "%f $%04x thmfc_floppy_write_byte: off=%i/%i data=$%02X\n",
1204		machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")),
	1204	machine.time().as_double(), machine.device("maincpu")->safe_pcbase(),
1205	1205	thmfc1->data_idx, thmfc1->data_size - 1, data ));
1206	1206
1207	1207	thmfc1->data_raw_size = 0;
r17788	r17789
1215	1215	/* intelligent formatting */
1216	1216	static void thmfc_floppy_format_byte ( running_machine &machine, UINT8 data )
1217	1217	{
1218		VLOG (( "%f $%04x thmfc_floppy_format_byte: $%02X\n", machine.time().as_double(), cpu_get_previouspc(machine.device("maincpu")), data ));
	1218	VLOG (( "%f $%04x thmfc_floppy_format_byte: $%02X\n", machine.time().as_double(), machine.device("maincpu")->safe_pcbase(), data ));
1219	1219
1220	1220	thmfc1->data_raw_size = 0;
1221	1221
r17788	r17789
1260	1260
1261	1261	case 0: /* STAT0 */
1262	1262	thmfc1->stat0 ^= THMFC1_STAT0_SYNCHRO | THMFC1_STAT0_BYTE_READY_POL;
1263		VLOG(( "%f $%04x thmfc_floppy_r: STAT0=$%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), thmfc1->stat0 ));
	1263	VLOG(( "%f $%04x thmfc_floppy_r: STAT0=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), thmfc1->stat0 ));
1264	1264	return thmfc1->stat0;
1265	1265
1266	1266	case 1: /* STAT1 */
r17788	r17789
1292	1292	data |= 0x10;
1293	1293	if (!floppy_wpt_r(&img->device()))
1294	1294	data |= 0x04;
1295		VLOG(( "%f $%04x thmfc_floppy_r: STAT1=$%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	1295	VLOG(( "%f $%04x thmfc_floppy_r: STAT1=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1296	1296	return data;
1297	1297	}
1298	1298
r17788	r17789
1310	1310	{
1311	1311	/* undocumented => emulate TO7 QDD controller ? */
1312	1312	UINT8 data = thmfc1->ipl << 7;
1313		VLOG(( "%f $%04x thmfc_floppy_r: STAT8=$%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	1313	VLOG(( "%f $%04x thmfc_floppy_r: STAT8=$%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1314	1314	return data;
1315	1315	}
1316	1316
1317	1317	default:
1318		logerror ( "%f $%04x thmfc_floppy_r: invalid read offset %i\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset );
	1318	logerror ( "%f $%04x thmfc_floppy_r: invalid read offset %i\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
1319	1319	return 0;
1320	1320	}
1321	1321	}
r17788	r17789
1333	1333	chrn_id id;
1334	1334	thmfc1->formatting = (data >> 2) & 1;
1335	1335	LOG (( "%f $%04x thmfc_floppy_w: CMD0=$%02X dens=%s wsync=%i dsync=%i fmt=%i op=%i\n",
1336		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data,
	1336	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1337	1337	(BIT(data, 5) ? "FM" : "MFM"),
1338	1338	wsync, (data >> 3) & 1,
1339	1339	thmfc1->formatting, data & 3 ));
r17788	r17789
1419	1419	if ( thmfc1->sector_size > 256 )
1420	1420	{
1421	1421	logerror( "$%04x thmfc_floppy_w: sector size %i > 256 not handled\n",
1422		cpu_get_previouspc(space->machine().device("maincpu")), thmfc1->sector_size );
	1422	space->machine().device("maincpu")->safe_pcbase(), thmfc1->sector_size );
1423	1423	thmfc1->sector_size = 256;
1424	1424	}
1425	1425
1426	1426	LOG (( "%f $%04x thmfc_floppy_w: CMD1=$%02X sect-size=%i comp=%i head=%i\n",
1427		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data,
	1427	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1428	1428	thmfc1->sector_size, (data >> 1) & 7, thmfc1->side ));
1429	1429	break;
1430	1430
r17788	r17789
1453	1453	thom_floppy_active( space->machine(), 0 );
1454	1454
1455	1455	LOG (( "%f $%04x thmfc_floppy_w: CMD2=$%02X drv=%i step=%i motor=%i\n",
1456		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data,
	1456	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1457	1457	thmfc1->drive, seek, motor ));
1458	1458
1459	1459	if ( seek )
r17788	r17789
1484	1484	{
1485	1485	/* TODO: implement other forms of raw track writing */
1486	1486	LOG (( "%f $%04x thmfc_floppy_w: ignored raw WDATA $%02X\n",
1487		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	1487	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1488	1488	}
1489	1489	break;
1490	1490
r17788	r17789
1492	1492	case 4: /* WCLK (unemulated) */
1493	1493	/* clock configuration: FF for data, 0A for synchro */
1494	1494	LOG (( "%f $%04x thmfc_floppy_w: WCLK=$%02X (%s)\n",
1495		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data,
	1495	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1496	1496	(data == 0xff) ? "data" : (data == 0x0A) ? "synchro" : "?" ));
1497	1497	break;
1498	1498
1499	1499	case 5: /* WSECT */
1500	1500	thmfc1->sector = data;
1501	1501	LOG (( "%f $%04x thmfc_floppy_w: WSECT=%i\n",
1502		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	1502	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1503	1503	break;
1504	1504
1505	1505	case 6: /* WTRCK */
1506	1506	thmfc1->track = data;
1507	1507	LOG (( "%f $%04x thmfc_floppy_w: WTRCK=%i (real=%i)\n",
1508		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data,
	1508	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data,
1509	1509	floppy_drive_get_current_track( thmfc_floppy_image(space->machine()) ) ));
1510	1510	break;
1511	1511
1512	1512	case 7: /* WCELL */
1513	1513	/* precompensation (unemulated) */
1514	1514	LOG (( "%f $%04x thmfc_floppy_w: WCELL=$%02X\n",
1515		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), data ));
	1515	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), data ));
1516	1516	break;
1517	1517
1518	1518	default:
1519	1519	logerror ( "%f $%04x thmfc_floppy_w: invalid write offset %i (data=$%02X)\n",
1520		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	1520	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
1521	1521	}
1522	1522	}
1523	1523
r17788	r17789
1717	1717	{
1718	1718	/* network ID of the computer */
1719	1719	UINT8 id = space->machine().root_device().ioport("fconfig")->read() >> 3;
1720		VLOG(( "%f $%04x to7_network_r: read id $%02X\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), id ));
	1720	VLOG(( "%f $%04x to7_network_r: read id $%02X\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), id ));
1721	1721	return id;
1722	1722	}
1723	1723
1724		logerror( "%f $%04x to7_network_r: invalid read offset %i\n", space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset );
	1724	logerror( "%f $%04x to7_network_r: invalid read offset %i\n", space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset );
1725	1725	return 0;
1726	1726	}
1727	1727
r17788	r17789
1734	1734	else
1735	1735	{
1736	1736	logerror( "%f $%04x to7_network_w: invalid write offset %i (data=$%02X)\n",
1737		space->machine().time().as_double(), cpu_get_previouspc(space->machine().device("maincpu")), offset, data );
	1737	space->machine().time().as_double(), space->machine().device("maincpu")->safe_pcbase(), offset, data );
1738	1738	}
1739	1739	}
1740	1740

trunk/src/mess/machine/oric.c

r17788	r17789
729	729	wd17xx_reset(fdc);
730	730	break;
731	731	case 0x0a:
732		//logerror("jasmin overlay ram w: %02x PC: %04x\n", data, cpu_get_pc(machine().device("maincpu")));
	732	//logerror("jasmin overlay ram w: %02x PC: %04x\n", data, machine().device("maincpu")->safe_pc());
733	733	m_port_3fa_w = data;
734	734	oric_jasmin_set_mem_0x0c000(machine());
735	735	break;
736	736	case 0x0b:
737		//logerror("jasmin romdis w: %02x PC: %04x\n", data, cpu_get_pc(machine().device("maincpu")));
	737	//logerror("jasmin romdis w: %02x PC: %04x\n", data, machine().device("maincpu")->safe_pc());
738	738	m_port_3fb_w = data;
739	739	oric_jasmin_set_mem_0x0c000(machine());
740	740	break;

trunk/src/mess/machine/ncr5390.c

r17788	r17789
550	550
551	551	READ8_MEMBER(ncr5390_device::tcount_lo_r)
552	552	{
553		logerror("%s: tcount_lo_r %02x (%08x)\n", tag(), tcount & 0xff, cpu_get_pc(&space.device()));
	553	logerror("%s: tcount_lo_r %02x (%08x)\n", tag(), tcount & 0xff, space.device().safe_pc());
554	554	return tcount;
555	555	}
556	556
r17788	r17789
558	558	{
559	559	tcount = (tcount & 0xff00) | data;
560	560	status &= ~S_TC0;
561		logerror("%s: tcount_lo_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device()));
	561	logerror("%s: tcount_lo_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
562	562	}
563	563
564	564	READ8_MEMBER(ncr5390_device::tcount_hi_r)
565	565	{
566		logerror("%s: tcount_hi_r %02x (%08x)\n", tag(), tcount >> 8, cpu_get_pc(&space.device()));
	566	logerror("%s: tcount_hi_r %02x (%08x)\n", tag(), tcount >> 8, space.device().safe_pc());
567	567	return tcount >> 8;
568	568	}
569	569
r17788	r17789
571	571	{
572	572	tcount = (tcount & 0x00ff) | (data << 8);
573	573	status &= ~S_TC0;
574		logerror("%s: tcount_hi_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device()));
	574	logerror("%s: tcount_hi_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
575	575	}
576	576
577	577	UINT8 ncr5390_device::fifo_pop()
r17788	r17789
611	611
612	612	READ8_MEMBER(ncr5390_device::command_r)
613	613	{
614		logerror("%s: command_r (%08x)\n", tag(), cpu_get_pc(&space.device()));
	614	logerror("%s: command_r (%08x)\n", tag(), space.device().safe_pc());
615	615	return command[0];
616	616	}
617	617
618	618	WRITE8_MEMBER(ncr5390_device::command_w)
619	619	{
620		//  logerror("%s: command_w %02x (%08x)\n", tag(), data, cpu_get_pc(&space.device()));
	620	//  logerror("%s: command_w %02x (%08x)\n", tag(), data, space.device().safe_pc());
621	621	if(command_pos == 2) {
622	622	status |= S_GROSS_ERROR;
623	623	check_irq();
r17788	r17789
756	756	{
757	757	UINT32 ctrl = scsi_bus->ctrl_r();
758	758	UINT8 res = status | (ctrl & S_MSG ? 4 : 0) | (ctrl & S_CTL ? 2 : 0) | (ctrl & S_INP ? 1 : 0);
759		logerror("%s: status_r %02x (%08x)\n", tag(), res, cpu_get_pc(&space.device()));
	759	logerror("%s: status_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
760	760	if(irq)
761	761	status &= ~(S_GROSS_ERROR|S_PARITY|S_TCC);
762	762	return res;
r17788	r17789
777	777	if(res)
778	778	command_pop_and_chain();
779	779
780		logerror("%s: istatus_r %02x (%08x)\n", tag(), res, cpu_get_pc(&space.device()));
	780	logerror("%s: istatus_r %02x (%08x)\n", tag(), res, space.device().safe_pc());
781	781	return res;
782	782	}
783	783
r17788	r17789
788	788
789	789	READ8_MEMBER(ncr5390_device::seq_step_r)
790	790	{
791		logerror("%s: seq_step_r %d (%08x)\n", tag(), seq, cpu_get_pc(&space.device()));
	791	logerror("%s: seq_step_r %d (%08x)\n", tag(), seq, space.device().safe_pc());
792	792	return seq;
793	793	}
794	794

trunk/src/mess/machine/nextmo.c

r17788	r17789
37	37
38	38	READ8_MEMBER(nextmo_device::r4_r)
39	39	{
40		logerror("nextmo: r4_r %02x (%08x)\n", r4, cpu_get_pc(&space.device()));
	40	logerror("nextmo: r4_r %02x (%08x)\n", r4, space.device().safe_pc());
41	41	return r4;
42	42	}
43	43
r17788	r17789
46	46	if(r4 & 1)
47	47	device_reset();
48	48	r4 = (r4 & (~data & 0xfc)) | (data & 3);
49		logerror("nextmo: r4_w %02x (%08x)\n", r4, cpu_get_pc(&space.device()));
	49	logerror("nextmo: r4_w %02x (%08x)\n", r4, space.device().safe_pc());
50	50	}
51	51
52	52	READ8_MEMBER(nextmo_device::r5_r)
53	53	{
54		logerror("nextmo: r5_r %02x (%08x)\n", r5, cpu_get_pc(&space.device()));
	54	logerror("nextmo: r5_r %02x (%08x)\n", r5, space.device().safe_pc());
55	55	return r5;
56	56	}
57	57
58	58	WRITE8_MEMBER(nextmo_device::r5_w)
59	59	{
60	60	r5 = data;
61		logerror("nextmo: r5_w %02x (%08x)\n", r5, cpu_get_pc(&space.device()));
	61	logerror("nextmo: r5_w %02x (%08x)\n", r5, space.device().safe_pc());
62	62	}
63	63
64	64	READ8_MEMBER(nextmo_device::r6_r)
65	65	{
66		logerror("nextmo: r6_r %02x (%08x)\n", r6, cpu_get_pc(&space.device()));
	66	logerror("nextmo: r6_r %02x (%08x)\n", r6, space.device().safe_pc());
67	67	return r6;
68	68	}
69	69
70	70	WRITE8_MEMBER(nextmo_device::r6_w)
71	71	{
72	72	r6 = data;
73		logerror("nextmo: r6_w %02x (%08x)\n", r6, cpu_get_pc(&space.device()));
	73	logerror("nextmo: r6_w %02x (%08x)\n", r6, space.device().safe_pc());
74	74	}
75	75
76	76	READ8_MEMBER(nextmo_device::r7_r)
77	77	{
78		logerror("nextmo: r7_r %02x (%08x)\n", r7, cpu_get_pc(&space.device()));
	78	logerror("nextmo: r7_r %02x (%08x)\n", r7, space.device().safe_pc());
79	79	return r7;
80	80	}
81	81
82	82	WRITE8_MEMBER(nextmo_device::r7_w)
83	83	{
84	84	r7 = data;
85		logerror("nextmo: r7_w %02x (%08x)\n", r7, cpu_get_pc(&space.device()));
	85	logerror("nextmo: r7_w %02x (%08x)\n", r7, space.device().safe_pc());
86	86	if(r7 & 0xc0) {
87	87	logerror("nextmo: start dma %02x %02x\n", r6, r7);
88	88	sector_pos = 0;
r17788	r17789
130	130
131	131	READ8_MEMBER(nextmo_device::r8_r)
132	132	{
133		logerror("nextmo: r8_r (%08x)\n", cpu_get_pc(&space.device()));
	133	logerror("nextmo: r8_r (%08x)\n", space.device().safe_pc());
134	134	return 0x00;
135	135	}
136	136
137	137	WRITE8_MEMBER(nextmo_device::r8_w)
138	138	{
139		logerror("nextmo: r8_w %02x (%08x)\n", data, cpu_get_pc(&space.device()));
	139	logerror("nextmo: r8_w %02x (%08x)\n", data, space.device().safe_pc());
140	140	}
141	141
142	142	READ8_MEMBER(nextmo_device::r9_r)
143	143	{
144		logerror("nextmo: r9_r (%08x)\n", cpu_get_pc(&space.device()));
	144	logerror("nextmo: r9_r (%08x)\n", space.device().safe_pc());
145	145	return 0x00;
146	146	}
147	147
148	148	WRITE8_MEMBER(nextmo_device::r9_w)
149	149	{
150		logerror("nextmo: r9_w %02x (%08x)\n", data, cpu_get_pc(&space.device()));
	150	logerror("nextmo: r9_w %02x (%08x)\n", data, space.device().safe_pc());
151	151	}
152	152
153	153	READ8_MEMBER(nextmo_device::ra_r)
154	154	{
155		logerror("nextmo: ra_r (%08x)\n", cpu_get_pc(&space.device()));
	155	logerror("nextmo: ra_r (%08x)\n", space.device().safe_pc());
156	156	return 0x00;
157	157	}
158	158
159	159	WRITE8_MEMBER(nextmo_device::ra_w)
160	160	{
161		logerror("nextmo: ra_w %02x (%08x)\n", data, cpu_get_pc(&space.device()));
	161	logerror("nextmo: ra_w %02x (%08x)\n", data, space.device().safe_pc());
162	162	}
163	163
164	164	READ8_MEMBER(nextmo_device::rb_r)
165	165	{
166		logerror("nextmo: rb_r (%08x)\n", cpu_get_pc(&space.device()));
	166	logerror("nextmo: rb_r (%08x)\n", space.device().safe_pc());
167	167	return 0x24;
168	168	}
169	169
170	170	WRITE8_MEMBER(nextmo_device::rb_w)
171	171	{
172		logerror("nextmo: rb_w %02x (%08x)\n", data, cpu_get_pc(&space.device()));
	172	logerror("nextmo: rb_w %02x (%08x)\n", data, space.device().safe_pc());
173	173	}
174	174
175	175	READ8_MEMBER(nextmo_device::r10_r)
176	176	{
177		logerror("nextmo: r10_r %d (%08x)\n", offset, cpu_get_pc(&space.device()));
	177	logerror("nextmo: r10_r %d (%08x)\n", offset, space.device().safe_pc());
178	178	return 0x00;
179	179	}
180	180
181	181	WRITE8_MEMBER(nextmo_device::r10_w)
182	182	{
183		logerror("nextmo: r10_w %d, %02x (%08x)\n", offset, data, cpu_get_pc(&space.device()));
	183	logerror("nextmo: r10_w %d, %02x (%08x)\n", offset, data, space.device().safe_pc());
184	184	}
185	185
186	186	void nextmo_device::check_ecc()

trunk/src/mess/machine/amigacrt.c

r17788	r17789
113	113	static WRITE16_HANDLER( amiga_ar1_chipmem_w )
114	114	{
115	115	amiga_state *state = space->machine().driver_data<amiga_state>();
116		int pc = cpu_get_pc(&space->device());
	116	int pc = space->device().safe_pc();
117	117
118	118	/* see if we're inside the AR1 rom */
119	119	if ( ((pc >> 16) & 0xff ) != 0xf0 )
r17788	r17789
192	192
193	193	static READ16_HANDLER( amiga_ar23_cia_r )
194	194	{
195		int pc = cpu_get_pc(&space->device());
	195	int pc = space->device().safe_pc();
196	196
197	197	if ( ACCESSING_BITS_0_7 && offset == 2048 && pc >= 0x40 && pc < 0x120 )
198	198	{
r17788	r17789
263	263	static void amiga_ar23_freeze( running_machine &machine )
264	264	{
265	265	amiga_state *state = machine.driver_data<amiga_state>();
266		int pc = cpu_get_pc(machine.device("maincpu"));
	266	int pc = machine.device("maincpu")->safe_pc();
267	267
268	268	/* only freeze if we're not inside the cart's ROM */
269	269	if ( ((pc >> 16) & 0xfe ) != 0x40 )
r17788	r17789
299	299	#if 0
300	300	static WRITE16_HANDLER( amiga_ar23_custom_w )
301	301	{
302		int pc = cpu_get_pc(&space->device());
	302	int pc = space->device().safe_pc();
303	303
304	304	/* see if we're inside the AR2 rom */
305	305	if ( ((pc >> 16) & 0xfe ) != 0x40 )
r17788	r17789
320	320	{
321	321	UINT16 data = amiga_custom_r( offset, mem_mask );
322	322
323		int pc = cpu_get_pc(&space->device());
	323	int pc = space->device().safe_pc();
324	324
325	325	/* see if we're inside the AR2 rom */
326	326	if ( ((pc >> 16) & 0xfe ) != 0x40 )

trunk/src/mess/machine/sms.c

r17788	r17789
1226	1226	{
1227	1227	m_bios_port = data;
1228	1228
1229		logerror("bios write %02x, pc: %04x\n", data, cpu_get_pc(&space.device()));
	1229	logerror("bios write %02x, pc: %04x\n", data, space.device().safe_pc());
1230	1230
1231	1231	setup_rom(&space);
1232	1232	}
r17788	r17789
2087	2087
2088	2088	WRITE8_MEMBER(sms_state::sms_store_control_w)
2089	2089	{
2090		logerror("0x%04X: sms_store_control write 0x%02X\n", cpu_get_pc(&space.device()), data);
	2090	logerror("0x%04X: sms_store_control write 0x%02X\n", space.device().safe_pc(), data);
2091	2091	if (data & 0x02)
2092	2092	{
2093	2093	machine().device<cpu_device>("maincpu")->resume(SUSPEND_REASON_HALT);

trunk/src/mess/machine/tandy1t.c

r17788	r17789
165	165
166	166	WRITE8_HANDLER ( pc_t1t_p37x_w )
167	167	{
168		//  DBG_LOG(2,"T1T_p37x_w",("%.5x #%d $%02x\n", cpu_get_pc( &space->device()),offset, data));
	168	//  DBG_LOG(2,"T1T_p37x_w",("%.5x #%d $%02x\n", space->device().safe_pc( ),offset, data));
169	169	if (offset!=4)
170		logerror("T1T_p37x_w %.5x #%d $%02x\n", cpu_get_pc( &space->device()),offset, data);
	170	logerror("T1T_p37x_w %.5x #%d $%02x\n", space->device().safe_pc( ),offset, data);
171	171	tandy.data[offset]=data;
172	172	switch( offset )
173	173	{
r17788	r17789
180	180	READ8_HANDLER ( pc_t1t_p37x_r )
181	181	{
182	182	int data = tandy.data[offset];
183		//  DBG_LOG(1,"T1T_p37x_r",("%.5x #%d $%02x\n", cpu_get_pc( &space->device()), offset, data));
	183	//  DBG_LOG(1,"T1T_p37x_r",("%.5x #%d $%02x\n", space->device().safe_pc( ), offset, data));
184	184	return data;
185	185	}
186	186

trunk/src/mess/machine/compis.c

r17788	r17789
550	550	case 0x0d:   m_i186.intr.in_service &= ~0x20;   break;
551	551	case 0x0e:   m_i186.intr.in_service &= ~0x40;   break;
552	552	case 0x0f:   m_i186.intr.in_service &= ~0x80;   break;
553		default:   logerror("%05X:ERROR - 80186 EOI with unknown vector %02X\n", cpu_get_pc(m_maincpu), data & 0x1f);
	553	default:   logerror("%05X:ERROR - 80186 EOI with unknown vector %02X\n", m_maincpu->safe_pc(), data & 0x1f);
554	554	}
555	555	if (LOG_INTERRUPTS) logerror("(%f) **** Got EOI for vector %02X\n", machine().time().as_double(), data & 0x1f);
556	556	}
r17788	r17789
718	718	diff = new_control ^ t->control;
719	719	if (diff & 0x001c)
720	720	logerror("%05X:ERROR! -unsupported timer mode %04X\n",
721		cpu_get_pc(m_maincpu), new_control);
	721	m_maincpu->safe_pc(), new_control);
722	722
723	723	/* if we have real changes, update things */
724	724	if (diff != 0)
r17788	r17789
820	820	diff = new_control ^ d->control;
821	821	if (diff & 0x6811)
822	822	logerror("%05X:ERROR! - unsupported DMA mode %04X\n",
823		cpu_get_pc(m_maincpu), new_control);
	823	m_maincpu->safe_pc(), new_control);
824	824
825	825	/* if we're going live, set a timer */
826	826	if ((diff & 0x0002) && (new_control & 0x0002))
r17788	r17789
877	877	switch (offset)
878	878	{
879	879	case 0x11:
880		logerror("%05X:ERROR - read from 80186 EOI\n", cpu_get_pc(m_maincpu));
	880	logerror("%05X:ERROR - read from 80186 EOI\n", m_maincpu->safe_pc());
881	881	break;
882	882
883	883	case 0x12:
884		if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", cpu_get_pc(m_maincpu));
	884	if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", m_maincpu->safe_pc());
885	885	if (m_i186.intr.poll_status & 0x8000)
886	886	int_callback(machine().device("maincpu"), 0);
887	887	return m_i186.intr.poll_status;
888	888
889	889	case 0x13:
890		if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", cpu_get_pc(m_maincpu));
	890	if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", m_maincpu->safe_pc());
891	891	return m_i186.intr.poll_status;
892	892
893	893	case 0x14:
894		if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", cpu_get_pc(m_maincpu));
	894	if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", m_maincpu->safe_pc());
895	895	temp  = (m_i186.intr.timer  >> 3) & 0x01;
896	896	temp |= (m_i186.intr.dma[0] >> 1) & 0x04;
897	897	temp |= (m_i186.intr.dma[1] >> 0) & 0x08;
r17788	r17789
902	902	return temp;
903	903
904	904	case 0x15:
905		if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", cpu_get_pc(m_maincpu));
	905	if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", m_maincpu->safe_pc());
906	906	return m_i186.intr.priority_mask;
907	907
908	908	case 0x16:
909		if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", cpu_get_pc(m_maincpu));
	909	if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", m_maincpu->safe_pc());
910	910	return m_i186.intr.in_service;
911	911
912	912	case 0x17:
913		if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", cpu_get_pc(m_maincpu));
	913	if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", m_maincpu->safe_pc());
914	914	temp = m_i186.intr.request & ~0x0001;
915	915	if (m_i186.intr.status & 0x0007)
916	916	temp |= 1;
917	917	return temp;
918	918
919	919	case 0x18:
920		if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", cpu_get_pc(m_maincpu));
	920	if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", m_maincpu->safe_pc());
921	921	return m_i186.intr.status;
922	922
923	923	case 0x19:
924		if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", cpu_get_pc(m_maincpu));
	924	if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", m_maincpu->safe_pc());
925	925	return m_i186.intr.timer;
926	926
927	927	case 0x1a:
928		if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", cpu_get_pc(m_maincpu));
	928	if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", m_maincpu->safe_pc());
929	929	return m_i186.intr.dma[0];
930	930
931	931	case 0x1b:
932		if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", cpu_get_pc(m_maincpu));
	932	if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", m_maincpu->safe_pc());
933	933	return m_i186.intr.dma[1];
934	934
935	935	case 0x1c:
936		if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", cpu_get_pc(m_maincpu));
	936	if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", m_maincpu->safe_pc());
937	937	return m_i186.intr.ext[0];
938	938
939	939	case 0x1d:
940		if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", cpu_get_pc(m_maincpu));
	940	if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", m_maincpu->safe_pc());
941	941	return m_i186.intr.ext[1];
942	942
943	943	case 0x1e:
944		if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", cpu_get_pc(m_maincpu));
	944	if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", m_maincpu->safe_pc());
945	945	return m_i186.intr.ext[2];
946	946
947	947	case 0x1f:
948		if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", cpu_get_pc(m_maincpu));
	948	if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", m_maincpu->safe_pc());
949	949	return m_i186.intr.ext[3];
950	950
951	951	case 0x28:
952	952	case 0x2c:
953	953	case 0x30:
954		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", cpu_get_pc(m_maincpu), (offset - 0x28) / 4);
	954	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", m_maincpu->safe_pc(), (offset - 0x28) / 4);
955	955	which = (offset - 0x28) / 4;
956	956	if (!(offset & 1))
957	957	internal_timer_sync(which);
r17788	r17789
960	960	case 0x29:
961	961	case 0x2d:
962	962	case 0x31:
963		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", cpu_get_pc(m_maincpu), (offset - 0x29) / 4);
	963	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", m_maincpu->safe_pc(), (offset - 0x29) / 4);
964	964	which = (offset - 0x29) / 4;
965	965	return m_i186.timer[which].maxA;
966	966
967	967	case 0x2a:
968	968	case 0x2e:
969		logerror("%05X:read 80186 Timer %d max B\n", cpu_get_pc(m_maincpu), (offset - 0x2a) / 4);
	969	logerror("%05X:read 80186 Timer %d max B\n", m_maincpu->safe_pc(), (offset - 0x2a) / 4);
970	970	which = (offset - 0x2a) / 4;
971	971	return m_i186.timer[which].maxB;
972	972
973	973	case 0x2b:
974	974	case 0x2f:
975	975	case 0x33:
976		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", cpu_get_pc(m_maincpu), (offset - 0x2b) / 4);
	976	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", m_maincpu->safe_pc(), (offset - 0x2b) / 4);
977	977	which = (offset - 0x2b) / 4;
978	978	return m_i186.timer[which].control;
979	979
980	980	case 0x50:
981		if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", cpu_get_pc(m_maincpu));
	981	if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", m_maincpu->safe_pc());
982	982	return m_i186.mem.upper;
983	983
984	984	case 0x51:
985		if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", cpu_get_pc(m_maincpu));
	985	if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", m_maincpu->safe_pc());
986	986	return m_i186.mem.lower;
987	987
988	988	case 0x52:
989		if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", cpu_get_pc(m_maincpu));
	989	if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", m_maincpu->safe_pc());
990	990	return m_i186.mem.peripheral;
991	991
992	992	case 0x53:
993		if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", cpu_get_pc(m_maincpu));
	993	if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", m_maincpu->safe_pc());
994	994	return m_i186.mem.middle;
995	995
996	996	case 0x54:
997		if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", cpu_get_pc(m_maincpu));
	997	if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", m_maincpu->safe_pc());
998	998	return m_i186.mem.middle_size;
999	999
1000	1000	case 0x60:
1001	1001	case 0x68:
1002		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", cpu_get_pc(m_maincpu), (offset - 0x60) / 8);
	1002	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", m_maincpu->safe_pc(), (offset - 0x60) / 8);
1003	1003	which = (offset - 0x60) / 8;
1004	1004	//          stream_update(dma_stream, 0);
1005	1005	return m_i186.dma[which].source;
1006	1006
1007	1007	case 0x61:
1008	1008	case 0x69:
1009		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", cpu_get_pc(m_maincpu), (offset - 0x61) / 8);
	1009	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", m_maincpu->safe_pc(), (offset - 0x61) / 8);
1010	1010	which = (offset - 0x61) / 8;
1011	1011	//          stream_update(dma_stream, 0);
1012	1012	return m_i186.dma[which].source >> 16;
1013	1013
1014	1014	case 0x62:
1015	1015	case 0x6a:
1016		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", cpu_get_pc(m_maincpu), (offset - 0x62) / 8);
	1016	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", m_maincpu->safe_pc(), (offset - 0x62) / 8);
1017	1017	which = (offset - 0x62) / 8;
1018	1018	//          stream_update(dma_stream, 0);
1019	1019	return m_i186.dma[which].dest;
1020	1020
1021	1021	case 0x63:
1022	1022	case 0x6b:
1023		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", cpu_get_pc(m_maincpu), (offset - 0x63) / 8);
	1023	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", m_maincpu->safe_pc(), (offset - 0x63) / 8);
1024	1024	which = (offset - 0x63) / 8;
1025	1025	//          stream_update(dma_stream, 0);
1026	1026	return m_i186.dma[which].dest >> 16;
1027	1027
1028	1028	case 0x64:
1029	1029	case 0x6c:
1030		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", cpu_get_pc(m_maincpu), (offset - 0x64) / 8);
	1030	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", m_maincpu->safe_pc(), (offset - 0x64) / 8);
1031	1031	which = (offset - 0x64) / 8;
1032	1032	//          stream_update(dma_stream, 0);
1033	1033	return m_i186.dma[which].count;
1034	1034
1035	1035	case 0x65:
1036	1036	case 0x6d:
1037		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", cpu_get_pc(m_maincpu), (offset - 0x65) / 8);
	1037	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", m_maincpu->safe_pc(), (offset - 0x65) / 8);
1038	1038	which = (offset - 0x65) / 8;
1039	1039	//          stream_update(dma_stream, 0);
1040	1040	return m_i186.dma[which].control;
1041	1041
1042	1042	default:
1043		logerror("%05X:read 80186 port %02X\n", cpu_get_pc(m_maincpu), offset);
	1043	logerror("%05X:read 80186 port %02X\n", m_maincpu->safe_pc(), offset);
1044	1044	break;
1045	1045	}
1046	1046	return 0x00;
r17788	r17789
1061	1061	switch (offset)
1062	1062	{
1063	1063	case 0x11:
1064		if (LOG_PORTS) logerror("%05X:80186 EOI = %04X\n", cpu_get_pc(m_maincpu), data16);
	1064	if (LOG_PORTS) logerror("%05X:80186 EOI = %04X\n", m_maincpu->safe_pc(), data16);
1065	1065	handle_eoi(0x8000);
1066	1066	update_interrupt_state(machine());
1067	1067	break;
1068	1068
1069	1069	case 0x12:
1070		logerror("%05X:ERROR - write to 80186 interrupt poll = %04X\n", cpu_get_pc(m_maincpu), data16);
	1070	logerror("%05X:ERROR - write to 80186 interrupt poll = %04X\n", m_maincpu->safe_pc(), data16);
1071	1071	break;
1072	1072
1073	1073	case 0x13:
1074		logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X\n", cpu_get_pc(m_maincpu), data16);
	1074	logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X\n", m_maincpu->safe_pc(), data16);
1075	1075	break;
1076	1076
1077	1077	case 0x14:
1078		if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X\n", cpu_get_pc(m_maincpu), data16);
	1078	if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X\n", m_maincpu->safe_pc(), data16);
1079	1079	m_i186.intr.timer  = (m_i186.intr.timer  & ~0x08) | ((data16 << 3) & 0x08);
1080	1080	m_i186.intr.dma[0] = (m_i186.intr.dma[0] & ~0x08) | ((data16 << 1) & 0x08);
1081	1081	m_i186.intr.dma[1] = (m_i186.intr.dma[1] & ~0x08) | ((data16 << 0) & 0x08);
r17788	r17789
1087	1087	break;
1088	1088
1089	1089	case 0x15:
1090		if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X\n", cpu_get_pc(m_maincpu), data16);
	1090	if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X\n", m_maincpu->safe_pc(), data16);
1091	1091	m_i186.intr.priority_mask = data16 & 0x0007;
1092	1092	update_interrupt_state(machine());
1093	1093	break;
1094	1094
1095	1095	case 0x16:
1096		if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X\n", cpu_get_pc(m_maincpu), data16);
	1096	if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X\n", m_maincpu->safe_pc(), data16);
1097	1097	m_i186.intr.in_service = data16 & 0x00ff;
1098	1098	update_interrupt_state(machine());
1099	1099	break;
1100	1100
1101	1101	case 0x17:
1102		if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X\n", cpu_get_pc(m_maincpu), data16);
	1102	if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X\n", m_maincpu->safe_pc(), data16);
1103	1103	m_i186.intr.request = (m_i186.intr.request & ~0x00c0) | (data16 & 0x00c0);
1104	1104	update_interrupt_state(machine());
1105	1105	break;
1106	1106
1107	1107	case 0x18:
1108		if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X\n", cpu_get_pc(m_maincpu), data16);
	1108	if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X\n", m_maincpu->safe_pc(), data16);
1109	1109	m_i186.intr.status = (m_i186.intr.status & ~0x8007) | (data16 & 0x8007);
1110	1110	update_interrupt_state(machine());
1111	1111	break;
1112	1112
1113	1113	case 0x19:
1114		if (LOG_PORTS) logerror("%05X:80186 timer interrupt control = %04X\n", cpu_get_pc(m_maincpu), data16);
	1114	if (LOG_PORTS) logerror("%05X:80186 timer interrupt control = %04X\n", m_maincpu->safe_pc(), data16);
1115	1115	m_i186.intr.timer = data16 & 0x000f;
1116	1116	break;
1117	1117
1118	1118	case 0x1a:
1119		if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", cpu_get_pc(m_maincpu), data16);
	1119	if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", m_maincpu->safe_pc(), data16);
1120	1120	m_i186.intr.dma[0] = data16 & 0x000f;
1121	1121	break;
1122	1122
1123	1123	case 0x1b:
1124		if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", cpu_get_pc(m_maincpu), data16);
	1124	if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", m_maincpu->safe_pc(), data16);
1125	1125	m_i186.intr.dma[1] = data16 & 0x000f;
1126	1126	break;
1127	1127
1128	1128	case 0x1c:
1129		if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", cpu_get_pc(m_maincpu), data16);
	1129	if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", m_maincpu->safe_pc(), data16);
1130	1130	m_i186.intr.ext[0] = data16 & 0x007f;
1131	1131	break;
1132	1132
1133	1133	case 0x1d:
1134		if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", cpu_get_pc(m_maincpu), data16);
	1134	if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", m_maincpu->safe_pc(), data16);
1135	1135	m_i186.intr.ext[1] = data16 & 0x007f;
1136	1136	break;
1137	1137
1138	1138	case 0x1e:
1139		if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", cpu_get_pc(m_maincpu), data16);
	1139	if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", m_maincpu->safe_pc(), data16);
1140	1140	m_i186.intr.ext[2] = data16 & 0x001f;
1141	1141	break;
1142	1142
1143	1143	case 0x1f:
1144		if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", cpu_get_pc(m_maincpu), data16);
	1144	if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", m_maincpu->safe_pc(), data16);
1145	1145	m_i186.intr.ext[3] = data16 & 0x001f;
1146	1146	break;
1147	1147
1148	1148	case 0x28:
1149	1149	case 0x2c:
1150	1150	case 0x30:
1151		if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x28) / 4, data16);
	1151	if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X\n", m_maincpu->safe_pc(), (offset - 0x28) / 4, data16);
1152	1152	which = (offset - 0x28) / 4;
1153	1153	internal_timer_update(which, data16, -1, -1, -1);
1154	1154	break;
r17788	r17789
1156	1156	case 0x29:
1157	1157	case 0x2d:
1158	1158	case 0x31:
1159		if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x29) / 4, data16);
	1159	if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X\n", m_maincpu->safe_pc(), (offset - 0x29) / 4, data16);
1160	1160	which = (offset - 0x29) / 4;
1161	1161	internal_timer_update(which, -1, data16, -1, -1);
1162	1162	break;
1163	1163
1164	1164	case 0x2a:
1165	1165	case 0x2e:
1166		if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x2a) / 4, data16);
	1166	if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X\n", m_maincpu->safe_pc(), (offset - 0x2a) / 4, data16);
1167	1167	which = (offset - 0x2a) / 4;
1168	1168	internal_timer_update(which, -1, -1, data16, -1);
1169	1169	break;
r17788	r17789
1171	1171	case 0x2b:
1172	1172	case 0x2f:
1173	1173	case 0x33:
1174		if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x2b) / 4, data16);
	1174	if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X\n", m_maincpu->safe_pc(), (offset - 0x2b) / 4, data16);
1175	1175	which = (offset - 0x2b) / 4;
1176	1176	internal_timer_update(which, -1, -1, -1, data16);
1177	1177	break;
1178	1178
1179	1179	case 0x50:
1180		if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X\n", cpu_get_pc(m_maincpu), data16);
	1180	if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X\n", m_maincpu->safe_pc(), data16);
1181	1181	m_i186.mem.upper = data16 | 0xc038;
1182	1182	break;
1183	1183
1184	1184	case 0x51:
1185		if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X\n", cpu_get_pc(m_maincpu), data16);
	1185	if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X\n", m_maincpu->safe_pc(), data16);
1186	1186	m_i186.mem.lower = (data16 & 0x3fff) | 0x0038; //printf("%X\n",m_i186.mem.lower);
1187	1187	break;
1188	1188
1189	1189	case 0x52:
1190		if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X\n", cpu_get_pc(m_maincpu), data16);
	1190	if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X\n", m_maincpu->safe_pc(), data16);
1191	1191	m_i186.mem.peripheral = data16 | 0x0038;
1192	1192	break;
1193	1193
1194	1194	case 0x53:
1195		if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X\n", cpu_get_pc(m_maincpu), data16);
	1195	if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X\n", m_maincpu->safe_pc(), data16);
1196	1196	m_i186.mem.middle = data16 | 0x01f8;
1197	1197	break;
1198	1198
1199	1199	case 0x54:
1200		if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X\n", cpu_get_pc(m_maincpu), data16);
	1200	if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X\n", m_maincpu->safe_pc(), data16);
1201	1201	m_i186.mem.middle_size = data16 | 0x8038;
1202	1202
1203	1203	temp = (m_i186.mem.peripheral & 0xffc0) << 4;
r17788	r17789
1221	1221
1222	1222	case 0x60:
1223	1223	case 0x68:
1224		if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x60) / 8, data16);
	1224	if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X\n", m_maincpu->safe_pc(), (offset - 0x60) / 8, data16);
1225	1225	which = (offset - 0x60) / 8;
1226	1226	//          stream_update(dma_stream, 0);
1227	1227	m_i186.dma[which].source = (m_i186.dma[which].source & ~0x0ffff) | (data16 & 0x0ffff);
r17788	r17789
1229	1229
1230	1230	case 0x61:
1231	1231	case 0x69:
1232		if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x61) / 8, data16);
	1232	if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X\n", m_maincpu->safe_pc(), (offset - 0x61) / 8, data16);
1233	1233	which = (offset - 0x61) / 8;
1234	1234	//          stream_update(dma_stream, 0);
1235	1235	m_i186.dma[which].source = (m_i186.dma[which].source & ~0xf0000) | ((data16 << 16) & 0xf0000);
r17788	r17789
1237	1237
1238	1238	case 0x62:
1239	1239	case 0x6a:
1240		if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x62) / 8, data16);
	1240	if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X\n", m_maincpu->safe_pc(), (offset - 0x62) / 8, data16);
1241	1241	which = (offset - 0x62) / 8;
1242	1242	//          stream_update(dma_stream, 0);
1243	1243	m_i186.dma[which].dest = (m_i186.dma[which].dest & ~0x0ffff) | (data16 & 0x0ffff);
r17788	r17789
1245	1245
1246	1246	case 0x63:
1247	1247	case 0x6b:
1248		if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x63) / 8, data16);
	1248	if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X\n", m_maincpu->safe_pc(), (offset - 0x63) / 8, data16);
1249	1249	which = (offset - 0x63) / 8;
1250	1250	//          stream_update(dma_stream, 0);
1251	1251	m_i186.dma[which].dest = (m_i186.dma[which].dest & ~0xf0000) | ((data16 << 16) & 0xf0000);
r17788	r17789
1253	1253
1254	1254	case 0x64:
1255	1255	case 0x6c:
1256		if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x64) / 8, data16);
	1256	if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X\n", m_maincpu->safe_pc(), (offset - 0x64) / 8, data16);
1257	1257	which = (offset - 0x64) / 8;
1258	1258	//          stream_update(dma_stream, 0);
1259	1259	m_i186.dma[which].count = data16;
r17788	r17789
1261	1261
1262	1262	case 0x65:
1263	1263	case 0x6d:
1264		if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X\n", cpu_get_pc(m_maincpu), (offset - 0x65) / 8, data16);
	1264	if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X\n", m_maincpu->safe_pc(), (offset - 0x65) / 8, data16);
1265	1265	which = (offset - 0x65) / 8;
1266	1266	//          stream_update(dma_stream, 0);
1267	1267	update_dma_control(which, data16);
1268	1268	break;
1269	1269
1270	1270	case 0x7f:
1271		if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X\n", cpu_get_pc(m_maincpu), data16);
	1271	if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X\n", m_maincpu->safe_pc(), data16);
1272	1272
1273	1273	/* we assume here there that this doesn't happen too often */
1274	1274	/* plus, we can't really remove the old memory range, so we also assume that it's */
r17788	r17789
1289	1289	break;
1290	1290
1291	1291	default:
1292		logerror("%05X:80186 port %02X = %04X\n", cpu_get_pc(m_maincpu), offset, data16);
	1292	logerror("%05X:80186 port %02X = %04X\n", m_maincpu->safe_pc(), offset, data16);
1293	1293	break;
1294	1294	}
1295	1295	}

trunk/src/mess/machine/mac.c

r17788	r17789
1049	1049	{
1050	1050	int reg = (offset>>3) & 0xf;
1051	1051
1052		//  logerror("macplus_scsi_w: data %x offset %x mask %x (PC=%x)\n", data, offset, mem_mask, cpu_get_pc(&space->device()));
	1052	//  logerror("macplus_scsi_w: data %x offset %x mask %x (PC=%x)\n", data, offset, mem_mask, space->device().safe_pc());
1053	1053
1054	1054	if ((reg == 0) && (offset == 0x100))
1055	1055	{
r17788	r17789
1158	1158	result = applefdc_r(fdc, (offset >> 8));
1159	1159
1160	1160	if (LOG_MAC_IWM)
1161		printf("mac_iwm_r: offset=0x%08x mem_mask %04x = %02x (PC %x)\n", offset, mem_mask, result, cpu_get_pc(m_maincpu));
	1161	printf("mac_iwm_r: offset=0x%08x mem_mask %04x = %02x (PC %x)\n", offset, mem_mask, result, m_maincpu->safe_pc());
1162	1162
1163	1163	return (result << 8) | result;
1164	1164	}
r17788	r17789
1168	1168	device_t *fdc = space.machine().device("fdc");
1169	1169
1170	1170	if (LOG_MAC_IWM)
1171		printf("mac_iwm_w: offset=0x%08x data=0x%04x mask %04x (PC=%x)\n", offset, data, mem_mask, cpu_get_pc(m_maincpu));
	1171	printf("mac_iwm_w: offset=0x%08x data=0x%04x mask %04x (PC=%x)\n", offset, data, mem_mask, m_maincpu->safe_pc());
1172	1172
1173	1173	if (ACCESSING_BITS_0_7)
1174	1174	applefdc_w(fdc, (offset >> 8), data & 0xff);
r17788	r17789
1266	1266	{
1267	1267	mac_state *mac = device->machine().driver_data<mac_state>();
1268	1268
1269		//  printf("VIA1 IN_A (PC %x)\n", cpu_get_pc(device->machine().device("maincpu")));
	1269	//  printf("VIA1 IN_A (PC %x)\n", device->machine().device("maincpu")->safe_pc());
1270	1270
1271	1271	switch (mac->m_model)
1272	1272	{
r17788	r17789
1376	1376	val |= 1;
1377	1377	}
1378	1378
1379		//  printf("VIA1 IN_B = %02x (PC %x)\n", val, cpu_get_pc(device->machine().device("maincpu")));
	1379	//  printf("VIA1 IN_B = %02x (PC %x)\n", val, device->machine().device("maincpu")->safe_pc());
1380	1380
1381	1381	return val;
1382	1382	}
r17788	r17789
1387	1387	device_t *fdc = device->machine().device("fdc");
1388	1388	mac_state *mac = device->machine().driver_data<mac_state>();
1389	1389
1390		//  printf("VIA1 OUT A: %02x (PC %x)\n", data, cpu_get_pc(device->machine().device("maincpu")));
	1390	//  printf("VIA1 OUT A: %02x (PC %x)\n", data, device->machine().device("maincpu")->safe_pc());
1391	1391
1392	1392	if (ADB_IS_PM_VIA1)
1393	1393	{
r17788	r17789
1431	1431	int new_rtc_rTCClk;
1432	1432	mac_state *mac = device->machine().driver_data<mac_state>();
1433	1433
1434		//  printf("VIA1 OUT B: %02x (PC %x)\n", data, cpu_get_pc(device->machine().device("maincpu")));
	1434	//  printf("VIA1 OUT B: %02x (PC %x)\n", data, device->machine().device("maincpu")->safe_pc());
1435	1435
1436	1436	if (ADB_IS_PM_VIA1)
1437	1437	{
r17788	r17789
1534	1534	else if (ADB_IS_EGRET)
1535	1535	{
1536	1536	#if LOG_ADB
1537		printf("68K: New Egret state: SS %d VF %d (PC %x)\n", (data>>5)&1, (data>>4)&1, cpu_get_pc(mac->m_maincpu));
	1537	printf("68K: New Egret state: SS %d VF %d (PC %x)\n", (data>>5)&1, (data>>4)&1, mac->m_maincpu->safe_pc());
1538	1538	#endif
1539	1539	mac->m_egret->set_via_full((data&0x10) ? 1 : 0);
1540	1540	mac->m_egret->set_sys_session((data&0x20) ? 1 : 0);
r17788	r17789
1542	1542	else if (ADB_IS_CUDA)
1543	1543	{
1544	1544	#if LOG_ADB
1545		printf("68K: New Cuda state: TIP %d BYTEACK %d (PC %x)\n", (data>>5)&1, (data>>4)&1, cpu_get_pc(mac->m_maincpu));
	1545	printf("68K: New Cuda state: TIP %d BYTEACK %d (PC %x)\n", (data>>5)&1, (data>>4)&1, mac->m_maincpu->safe_pc());
1546	1546	#endif
1547	1547	mac->m_cuda->set_byteack((data&0x10) ? 1 : 0);
1548	1548	mac->m_cuda->set_tip((data&0x20) ? 1 : 0);
r17788	r17789
1609	1609	data = m_via2->read(space, offset);
1610	1610
1611	1611	if (LOG_VIA)
1612		logerror("mac_via2_r: offset=0x%02x = %02x (PC=%x)\n", offset*2, data, cpu_get_pc(space.machine().device("maincpu")));
	1612	logerror("mac_via2_r: offset=0x%02x = %02x (PC=%x)\n", offset*2, data, space.machine().device("maincpu")->safe_pc());
1613	1613
1614	1614	return (data & 0xff) | (data << 8);
1615	1615	}
r17788	r17789
1620	1620	offset &= 0x0f;
1621	1621
1622	1622	if (LOG_VIA)
1623		logerror("mac_via2_w: offset=%x data=0x%08x mask=%x (PC=%x)\n", offset, data, mem_mask, cpu_get_pc(space.machine().device("maincpu")));
	1623	logerror("mac_via2_w: offset=%x data=0x%08x mask=%x (PC=%x)\n", offset, data, mem_mask, space.machine().device("maincpu")->safe_pc());
1624	1624
1625	1625	if (ACCESSING_BITS_0_7)
1626	1626	m_via2->write(space, offset, data & 0xff);
r17788	r17789
1654	1654	{
1655	1655	mac_state *mac =device->machine().driver_data<mac_state>();
1656	1656
1657		//  logerror("VIA2 IN B (PC %x)\n", cpu_get_pc(device->machine().device("maincpu")));
	1657	//  logerror("VIA2 IN B (PC %x)\n", device->machine().device("maincpu")->safe_pc());
1658	1658
1659	1659	if (ADB_IS_PM_VIA2)
1660	1660	{
r17788	r17789
1685	1685	{
1686	1686	mac_state *mac = device->machine().driver_data<mac_state>();
1687	1687
1688		//  logerror("VIA2 OUT A: %02x (PC %x)\n", data, cpu_get_pc(device->machine().device("maincpu")));
	1688	//  logerror("VIA2 OUT A: %02x (PC %x)\n", data, device->machine().device("maincpu")->safe_pc());
1689	1689	if (ADB_IS_PM_VIA2)
1690	1690	{
1691	1691	mac->m_pm_data_send = data;
r17788	r17789
1697	1697	{
1698	1698	mac_state *mac = device->machine().driver_data<mac_state>();
1699	1699
1700		//  logerror("VIA2 OUT B: %02x (PC %x)\n", data, cpu_get_pc(device->machine().device("maincpu")));
	1700	//  logerror("VIA2 OUT B: %02x (PC %x)\n", data, device->machine().device("maincpu")->safe_pc());
1701	1701
1702	1702	if (ADB_IS_PM_VIA2)
1703	1703	{
r17788	r17789
2012	2012
2013	2013	READ32_MEMBER(mac_state::mac_read_id)
2014	2014	{
2015		//    printf("Mac read ID reg @ PC=%x\n", cpu_get_pc(m_maincpu));
	2015	//    printf("Mac read ID reg @ PC=%x\n", m_maincpu->safe_pc());
2016	2016
2017	2017	switch (m_model)
2018	2018	{

trunk/src/mess/machine/a2videoterm.c

r17788	r17789
240	240
241	241	UINT8 a2bus_videx80_device::read_c0nx(address_space &space, UINT8 offset)
242	242	{
243		//    printf("Read c0n%x (PC=%x)\n", offset, cpu_get_pc(&space.device()));
	243	//    printf("Read c0n%x (PC=%x)\n", offset, space.device().safe_pc());
244	244
245	245	m_rambank = ((offset>>2) & 3) * 512;
246	246
r17788	r17789
259	259
260	260	void a2bus_videx80_device::write_c0nx(address_space &space, UINT8 offset, UINT8 data)
261	261	{
262		//    printf("Write %02x to c0n%x (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
	262	//    printf("Write %02x to c0n%x (PC=%x)\n", data, offset, space.device().safe_pc());
263	263
264	264	if (offset == 0)
265	265	{

trunk/src/mess/machine/amigacd.c

r17788	r17789
131	131	case 0x20:
132	132	{
133	133	UINT8   v = dmac_data.istr;
134		LOG(( "DMAC: PC=%08x - ISTR Read(%04x)\n", cpu_get_pc(&space->device()), dmac_data.istr ));
	134	LOG(( "DMAC: PC=%08x - ISTR Read(%04x)\n", space->device().safe_pc(), dmac_data.istr ));
135	135
136	136	dmac_data.istr &= ~0x0f;
137	137	return v;
r17788	r17789
140	140
141	141	case 0x21:
142	142	{
143		LOG(( "DMAC: PC=%08x - CNTR Read(%04x)\n", cpu_get_pc(&space->device()), dmac_data.cntr ));
	143	LOG(( "DMAC: PC=%08x - CNTR Read(%04x)\n", space->device().safe_pc(), dmac_data.cntr ));
144	144	return dmac_data.cntr;
145	145	}
146	146	break;
147	147
148	148	case 0x40:   /* wtc hi */
149	149	{
150		LOG(( "DMAC: PC=%08x - WTC HI Read\n", cpu_get_pc(&space->device()) ));
	150	LOG(( "DMAC: PC=%08x - WTC HI Read\n", space->device().safe_pc() ));
151	151	return (dmac_data.wtc >> 16);
152	152	}
153	153	break;
154	154
155	155	case 0x41:   /* wtc lo */
156	156	{
157		LOG(( "DMAC: PC=%08x - WTC LO Read\n", cpu_get_pc(&space->device()) ));
	157	LOG(( "DMAC: PC=%08x - WTC LO Read\n", space->device().safe_pc() ));
158	158	return dmac_data.wtc;
159	159	}
160	160	break;
161	161
162	162	case 0x42:   /* acr hi */
163	163	{
164		LOG(( "DMAC: PC=%08x - ACR HI Read\n", cpu_get_pc(&space->device()) ));
	164	LOG(( "DMAC: PC=%08x - ACR HI Read\n", space->device().safe_pc() ));
165	165	return (dmac_data.acr >> 16);
166	166	}
167	167	break;
168	168
169	169	case 0x43:   /* acr lo */
170	170	{
171		LOG(( "DMAC: PC=%08x - ACR LO Read\n", cpu_get_pc(&space->device()) ));
	171	LOG(( "DMAC: PC=%08x - ACR LO Read\n", space->device().safe_pc() ));
172	172	return dmac_data.acr;
173	173	}
174	174	break;
r17788	r17789
176	176	case 0x48:   /* wd33c93 SCSI expansion */
177	177	case 0x49:
178	178	{
179		LOG(( "DMAC: PC=%08x - WD33C93 Read(%d)\n", cpu_get_pc(&space->device()), offset & 1 ));
	179	LOG(( "DMAC: PC=%08x - WD33C93 Read(%d)\n", space->device().safe_pc(), offset & 1 ));
180	180	return 0x00;   /* Not available without SCSI expansion */
181	181	}
182	182	break;
183	183
184	184	case 0x50:
185	185	{
186		LOG(( "DMAC: PC=%08x - CDROM RESP Read\n", cpu_get_pc(&space->device()) ));
	186	LOG(( "DMAC: PC=%08x - CDROM RESP Read\n", space->device().safe_pc() ));
187	187	return matsucd_response_r(space->machine());
188	188	}
189	189	break;
r17788	r17789
192	192	case 0x52:
193	193	case 0x53:
194	194	{
195		LOG(( "DMAC: PC=%08x - XT IO Read(%d)\n", cpu_get_pc(&space->device()), (offset & 3)-1 ));
	195	LOG(( "DMAC: PC=%08x - XT IO Read(%d)\n", space->device().safe_pc(), (offset & 3)-1 ));
196	196	return 0xff;
197	197	}
198	198	break;
r17788	r17789
215	215	case 0x67:
216	216	{
217	217	device_t *tpi = space->machine().device("tpi6525");
218		LOG(( "DMAC: PC=%08x - TPI6525 Read(%d)\n", cpu_get_pc(&space->device()), (offset - 0x58) ));
	218	LOG(( "DMAC: PC=%08x - TPI6525 Read(%d)\n", space->device().safe_pc(), (offset - 0x58) ));
219	219	return tpi6525_r(tpi, offset - 0x58);
220	220	}
221	221	break;
222	222
223	223	case 0x70:   /* DMA start strobe */
224	224	{
225		LOG(( "DMAC: PC=%08x - DMA Start Strobe\n", cpu_get_pc(&space->device()) ));
	225	LOG(( "DMAC: PC=%08x - DMA Start Strobe\n", space->device().safe_pc() ));
226	226	dmac_data.dma_timer->adjust(attotime::from_msec( CD_SECTOR_TIME ));
227	227	}
228	228	break;
229	229
230	230	case 0x71:   /* DMA stop strobe */
231	231	{
232		LOG(( "DMAC: PC=%08x - DMA Stop Strobe\n", cpu_get_pc(&space->device()) ));
	232	LOG(( "DMAC: PC=%08x - DMA Stop Strobe\n", space->device().safe_pc() ));
233	233	dmac_data.dma_timer->reset(  );
234	234	}
235	235	break;
236	236
237	237	case 0x72:   /* Clear IRQ strobe */
238	238	{
239		LOG(( "DMAC: PC=%08x - IRQ Clear Strobe\n", cpu_get_pc(&space->device()) ));
	239	LOG(( "DMAC: PC=%08x - IRQ Clear Strobe\n", space->device().safe_pc() ));
240	240	dmac_data.istr &= ~ISTR_INT_P;
241	241	}
242	242	break;
243	243
244	244	case 0x74:   /* Flush strobe */
245	245	{
246		LOG(( "DMAC: PC=%08x - Flush Strobe\n", cpu_get_pc(&space->device()) ));
	246	LOG(( "DMAC: PC=%08x - Flush Strobe\n", space->device().safe_pc() ));
247	247	dmac_data.istr |= ISTR_FE_FLG;
248	248	}
249	249	break;
250	250
251	251	default:
252		logerror( "DMAC-READ: PC=%08x, offset = %02x\n", cpu_get_pc(&space->device()), offset );
	252	logerror( "DMAC-READ: PC=%08x, offset = %02x\n", space->device().safe_pc(), offset );
253	253	break;
254	254	}
255	255
r17788	r17789
264	264	{
265	265	case 0x21:   /* control write */
266	266	{
267		LOG(( "DMAC: PC=%08x - CNTR Write(%04x)\n", cpu_get_pc(&space->device()), data ));
	267	LOG(( "DMAC: PC=%08x - CNTR Write(%04x)\n", space->device().safe_pc(), data ));
268	268	dmac_data.cntr = data;
269	269	check_interrupts(space->machine());
270	270	}
r17788	r17789
272	272
273	273	case 0x40:   /* wtc hi */
274	274	{
275		LOG(( "DMAC: PC=%08x - WTC HI Write - data = %04x\n", cpu_get_pc(&space->device()), data ));
	275	LOG(( "DMAC: PC=%08x - WTC HI Write - data = %04x\n", space->device().safe_pc(), data ));
276	276	dmac_data.wtc &= 0x0000ffff;
277	277	dmac_data.wtc |= ((UINT32)data) << 16;
278	278	}
r17788	r17789
280	280
281	281	case 0x41:   /* wtc lo */
282	282	{
283		LOG(( "DMAC: PC=%08x - WTC LO Write - data = %04x\n", cpu_get_pc(&space->device()), data ));
	283	LOG(( "DMAC: PC=%08x - WTC LO Write - data = %04x\n", space->device().safe_pc(), data ));
284	284	dmac_data.wtc &= 0xffff0000;
285	285	dmac_data.wtc |= data;
286	286	}
r17788	r17789
288	288
289	289	case 0x42:   /* acr hi */
290	290	{
291		LOG(( "DMAC: PC=%08x - ACR HI Write - data = %04x\n", cpu_get_pc(&space->device()), data ));
	291	LOG(( "DMAC: PC=%08x - ACR HI Write - data = %04x\n", space->device().safe_pc(), data ));
292	292	dmac_data.acr &= 0x0000ffff;
293	293	dmac_data.acr |= ((UINT32)data) << 16;
294	294	}
r17788	r17789
296	296
297	297	case 0x43:   /* acr lo */
298	298	{
299		LOG(( "DMAC: PC=%08x - ACR LO Write - data = %04x\n", cpu_get_pc(&space->device()), data ));
	299	LOG(( "DMAC: PC=%08x - ACR LO Write - data = %04x\n", space->device().safe_pc(), data ));
300	300	dmac_data.acr &= 0xffff0000;
301	301	dmac_data.acr |= data;
302	302	}
r17788	r17789
304	304
305	305	case 0x47:   /* dawr */
306	306	{
307		LOG(( "DMAC: PC=%08x - DAWR Write - data = %04x\n", cpu_get_pc(&space->device()), data ));
	307	LOG(( "DMAC: PC=%08x - DAWR Write - data = %04x\n", space->device().safe_pc(), data ));
308	308	dmac_data.dawr = data;
309	309	}
310	310	break;
r17788	r17789
312	312	case 0x48:   /* wd33c93 SCSI expansion */
313	313	case 0x49:
314	314	{
315		LOG(( "DMAC: PC=%08x - WD33C93 Write(%d) - data = %04x\n", cpu_get_pc(&space->device()), offset & 1, data ));
	315	LOG(( "DMAC: PC=%08x - WD33C93 Write(%d) - data = %04x\n", space->device().safe_pc(), offset & 1, data ));
316	316	/* Not available without SCSI expansion */
317	317	}
318	318	break;
319	319
320	320	case 0x50:
321	321	{
322		LOG(( "DMAC: PC=%08x - CDROM CMD Write - data = %04x\n", cpu_get_pc(&space->device()), data ));
	322	LOG(( "DMAC: PC=%08x - CDROM CMD Write - data = %04x\n", space->device().safe_pc(), data ));
323	323	matsucd_command_w(space->machine(), data );
324	324	}
325	325	break;
r17788	r17789
342	342	case 0x67:
343	343	{
344	344	device_t *tpi = space->machine().device("tpi6525");
345		LOG(( "DMAC: PC=%08x - TPI6525 Write(%d) - data = %04x\n", cpu_get_pc(&space->device()), (offset - 0x58), data ));
	345	LOG(( "DMAC: PC=%08x - TPI6525 Write(%d) - data = %04x\n", space->device().safe_pc(), (offset - 0x58), data ));
346	346	tpi6525_w(tpi, offset - 0x58, data);
347	347	}
348	348	break;
349	349
350	350	case 0x70:   /* DMA start strobe */
351	351	{
352		LOG(( "DMAC: PC=%08x - DMA Start Strobe\n", cpu_get_pc(&space->device()) ));
	352	LOG(( "DMAC: PC=%08x - DMA Start Strobe\n", space->device().safe_pc() ));
353	353	dmac_data.dma_timer->adjust(attotime::from_msec( CD_SECTOR_TIME ));
354	354	}
355	355	break;
356	356
357	357	case 0x71:   /* DMA stop strobe */
358	358	{
359		LOG(( "DMAC: PC=%08x - DMA Stop Strobe\n", cpu_get_pc(&space->device()) ));
	359	LOG(( "DMAC: PC=%08x - DMA Stop Strobe\n", space->device().safe_pc() ));
360	360	dmac_data.dma_timer->reset(  );
361	361	}
362	362	break;
363	363
364	364	case 0x72:   /* Clear IRQ strobe */
365	365	{
366		LOG(( "DMAC: PC=%08x - IRQ Clear Strobe\n", cpu_get_pc(&space->device()) ));
	366	LOG(( "DMAC: PC=%08x - IRQ Clear Strobe\n", space->device().safe_pc() ));
367	367	dmac_data.istr &= ~ISTR_INT_P;
368	368	}
369	369	break;
370	370
371	371	case 0x74:   /* Flush Strobe */
372	372	{
373		LOG(( "DMAC: PC=%08x - Flush Strobe\n", cpu_get_pc(&space->device()) ));
	373	LOG(( "DMAC: PC=%08x - Flush Strobe\n", space->device().safe_pc() ));
374	374	dmac_data.istr |= ISTR_FE_FLG;
375	375	}
376	376	break;
377	377
378	378	default:
379		logerror( "DMAC-WRITE: PC=%08x, offset = %02x, data = %04x\n", cpu_get_pc(&space->device()), offset, data );
	379	logerror( "DMAC-WRITE: PC=%08x, offset = %02x, data = %04x\n", space->device().safe_pc(), offset, data );
380	380	break;
381	381	}
382	382	}

trunk/src/mess/machine/nubus_asntmc3b.c

r17788	r17789
165	165	}
166	166	else
167	167	{
168		fatalerror("asntmc3nb: write %08x to DP83902 @ %x with unhandled mask %08x (PC=%x)\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	168	fatalerror("asntmc3nb: write %08x to DP83902 @ %x with unhandled mask %08x (PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
169	169	}
170	170	}
171	171
r17788	r17789
183	183	}
184	184	else
185	185	{
186		fatalerror("asntmc3nb: read DP83902 @ %x with unhandled mask %08x (PC=%x)\n", offset, mem_mask, cpu_get_pc(&space.device()));
	186	fatalerror("asntmc3nb: read DP83902 @ %x with unhandled mask %08x (PC=%x)\n", offset, mem_mask, space.device().safe_pc());
187	187	}
188	188
189	189	return 0;

trunk/src/mess/machine/a2memexp.c

r17788	r17789
140	140	m_regs[2] = ((m_liveptr>>16) & 0xff) | m_bankhior;
141	141	}
142	142
143		//    printf("Read c0n%x (PC=%x) = %02x\n", offset, cpu_get_pc(&space.device()), retval);
	143	//    printf("Read c0n%x (PC=%x) = %02x\n", offset, space.device().safe_pc(), retval);
144	144
145	145	return retval;
146	146	}
r17788	r17789
152	152
153	153	void a2bus_memexp_device::write_c0nx(address_space &space, UINT8 offset, UINT8 data)
154	154	{
155		//    printf("Write %02x to c0n%x (PC=%x)\n", data, offset, cpu_get_pc(&space.device()));
	155	//    printf("Write %02x to c0n%x (PC=%x)\n", data, offset, space.device().safe_pc());
156	156
157	157	switch (offset)
158	158	{

trunk/src/mess/machine/lisa.c

r17788	r17789
1515	1515	if ((time_in_frame >= 364) && (time_in_frame <= 375))
1516	1516	{
1517	1517	answer = m_videoROM_ptr[m_videoROM_address|0x80] << 8;
1518		logerror("reading1 %06X=%04x PC=%06x time=%d\n", address, answer, cpu_get_pc(machine().device("maincpu")), time_in_frame);
	1518	logerror("reading1 %06X=%04x PC=%06x time=%d\n", address, answer, machine().device("maincpu")->safe_pc(), time_in_frame);
1519	1519	}
1520	1520	else
1521	1521	{
1522	1522	answer = m_videoROM_ptr[m_videoROM_address] << 8;
1523		logerror("reading2 %06X=%04x PC=%06x time=%d\n", address, answer, cpu_get_pc(machine().device("maincpu")), time_in_frame);
	1523	logerror("reading2 %06X=%04x PC=%06x time=%d\n", address, answer, machine().device("maincpu")->safe_pc(), time_in_frame);
1524	1524	}
1525	1525	}
1526	1526
r17788	r17789
1782	1782	state->m_seg &= ~2;
1783	1783	break;
1784	1784	case 0x0010:   /* SETUP register SET */
1785		logerror("setup SET PC=%x\n", cpu_get_pc(machine.device("maincpu")));
	1785	logerror("setup SET PC=%x\n", machine.device("maincpu")->safe_pc());
1786	1786	state->m_setup = 1;
1787	1787	break;
1788	1788	case 0x0012:   /* SETUP register RESET */
1789		logerror("setup UNSET PC=%x\n", cpu_get_pc(machine.device("maincpu")));
	1789	logerror("setup UNSET PC=%x\n", machine.device("maincpu")->safe_pc());
1790	1790	state->m_setup = 0;
1791	1791	break;
1792	1792	case 0x001A:   /* Enable Vertical Retrace Interrupt */
1793		logerror("enable retrace PC=%x\n", cpu_get_pc(machine.device("maincpu")));
	1793	logerror("enable retrace PC=%x\n", machine.device("maincpu")->safe_pc());
1794	1794	state->m_VTMSK = 1;
1795	1795	break;
1796	1796	case 0x0018:   /* Disable Vertical Retrace Interrupt */
1797		logerror("disable retrace PC=%x\n", cpu_get_pc(machine.device("maincpu")));
	1797	logerror("disable retrace PC=%x\n", machine.device("maincpu")->safe_pc());
1798	1798	state->m_VTMSK = 0;
1799	1799	set_VTIR(machine, 2);
1800	1800	break;
r17788	r17789
1928	1928	else
1929	1929	answer |= 0x04;
1930	1930	/* huh... we need to emulate some other bits */
1931		logerror("read status PC=%x val=%x\n", cpu_get_pc(machine().device("maincpu")), answer);
	1931	logerror("read status PC=%x val=%x\n", machine().device("maincpu")->safe_pc(), answer);
1932	1932
1933	1933	break;
1934	1934	}

trunk/src/mess/machine/pc1403.c

r17788	r17789
128	128	{
129	129	pc1403_state *state = device->machine().driver_data<pc1403_state>();
130	130	state->m_portc = data;
131		//    logerror("%g pc %.4x outc %.2x\n", device->machine().time().as_double(), cpu_get_pc(device->machine().device("maincpu")), data);
	131	//    logerror("%g pc %.4x outc %.2x\n", device->machine().time().as_double(), device->machine().device("maincpu")->safe_pc(), data);
132	132	}
133	133
134	134

trunk/src/mess/machine/mc6843.c

r17788	r17789
427	427	int cmd = mc6843->CMR & 0x0f;
428	428
429	429	LOG(( "%f $%04x mc6843_r: data input cmd=%s(%i), pos=%i/%i, GCR=%i, ",
430		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ),
	430	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ),
431	431	mc6843_cmd[cmd], cmd, mc6843->data_idx,
432	432	mc6843->data_size, mc6843->GCR ));
433	433
r17788	r17789
480	480	{
481	481	/* XXX TODO: other read modes */
482	482	data = mc6843->data[0];
483		logerror( "$%04x mc6843 read in unsupported command mode %i\n", cpu_get_previouspc( device->machine().firstcpu ), cmd );
	483	logerror( "$%04x mc6843 read in unsupported command mode %i\n", device->machine().firstcpu ->safe_pcbase( ), cmd );
484	484	}
485	485
486	486	LOG(( "data=%02X\n", data ));
r17788	r17789
491	491	case 1: /* Current-Track Address Register (CTAR) */
492	492	data = mc6843->CTAR;
493	493	LOG(( "%f $%04x mc6843_r: read CTAR %i (actual=%i)\n",
494		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data,
	494	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data,
495	495	floppy_drive_get_current_track( mc6843_floppy_image( device ) ) ));
496	496	break;
497	497
498	498	case 2: /* Interrupt Status Register (ISR) */
499	499	data = mc6843->ISR;
500	500	LOG(( "%f $%04x mc6843_r: read ISR %02X: cmd=%scomplete settle=%scomplete sense-rq=%i STRB=%i\n",
501		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data,
	501	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data,
502	502	(data & 1) ? "" : "not-" , (data & 2) ? "" : "not-",
503	503	(data >> 2) & 1, (data >> 3) & 1 ));
504	504
r17788	r17789
524	524
525	525	data = mc6843->STRA;
526	526	LOG(( "%f $%04x mc6843_r: read STRA %02X: data-rq=%i del-dta=%i ready=%i t0=%i wp=%i trk-dif=%i idx=%i busy=%i\n",
527		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data,
	527	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data,
528	528	data & 1, (data >> 1) & 1, (data >> 2) & 1, (data >> 3) & 1,
529	529	(data >> 4) & 1, (data >> 5) & 1, (data >> 6) & 1, (data >> 7) & 1 ));
530	530	break;
r17788	r17789
533	533	case 4: /* Status Register B (STRB) */
534	534	data = mc6843->STRB;
535	535	LOG(( "%f $%04x mc6843_r: read STRB %02X: data-err=%i CRC-err=%i dta--mrk-err=%i sect-mrk-err=%i seek-err=%i fi=%i wr-err=%i hard-err=%i\n",
536		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data,
	536	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data,
537	537	data & 1, (data >> 1) & 1, (data >> 2) & 1, (data >> 3) & 1,
538	538	(data >> 4) & 1, (data >> 5) & 1, (data >> 6) & 1, (data >> 7) & 1 ));
539	539
r17788	r17789
545	545	case 7: /* Logical-Track Address Register (LTAR) */
546	546	data = mc6843->LTAR;
547	547	LOG(( "%f $%04x mc6843_r: read LTAR %i (actual=%i)\n",
548		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data,
	548	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data,
549	549	floppy_drive_get_current_track( mc6843_floppy_image( device ) ) ));
550	550	break;
551	551
552	552	default:
553		logerror( "$%04x mc6843 invalid read offset %i\n", cpu_get_previouspc( device->machine().firstcpu ), offset );
	553	logerror( "$%04x mc6843 invalid read offset %i\n", device->machine().firstcpu ->safe_pcbase( ), offset );
554	554	}
555	555
556	556	return data;
r17788	r17789
567	567	int FWF = (mc6843->CMR >> 4) & 1;
568	568
569	569	LOG(( "%f $%04x mc6843_w: data output cmd=%s(%i), pos=%i/%i, GCR=%i, data=%02X\n",
570		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ),
	570	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ),
571	571	mc6843_cmd[cmd], cmd, mc6843->data_idx,
572	572	mc6843->data_size, mc6843->GCR, data ));
573	573
r17788	r17789
584	584	/* end of sector write */
585	585	device_t* img = mc6843_floppy_image( device );
586	586
587		LOG(( "%f $%04x mc6843_w: write sector %i\n", device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6843->data_id ));
	587	LOG(( "%f $%04x mc6843_w: write sector %i\n", device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6843->data_id ));
588	588
589	589	floppy_drive_write_sector_data(
590	590	img, mc6843->side, mc6843->data_id,
r17788	r17789
648	648	UINT8 track  = mc6843->data[1];
649	649	UINT8 sector = mc6843->data[3];
650	650	UINT8 filler = 0xe5; /* standard Thomson filler */
651		LOG(( "%f $%04x mc6843_w: address id detected track=%i sector=%i\n", device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), track, sector));
	651	LOG(( "%f $%04x mc6843_w: address id detected track=%i sector=%i\n", device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), track, sector));
652	652	floppy_drive_format_sector( img, mc6843->side, sector, track, 0, sector, 0, filler );
653	653	}
654	654	else
r17788	r17789
670	670	else
671	671	{
672	672	/* XXX TODO: other write modes */
673		logerror( "$%04x mc6843 write %02X in unsupported command mode %i (FWF=%i)\n", cpu_get_previouspc( device->machine().firstcpu ), data, cmd, FWF );
	673	logerror( "$%04x mc6843 write %02X in unsupported command mode %i (FWF=%i)\n", device->machine().firstcpu ->safe_pcbase( ), data, cmd, FWF );
674	674	}
675	675	break;
676	676	}
r17788	r17789
678	678	case 1: /* Current-Track Address Register (CTAR) */
679	679	mc6843->CTAR = data & 0x7f;
680	680	LOG(( "%f $%04x mc6843_w: set CTAR to %i %02X (actual=%i) \n",
681		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6843->CTAR, data,
	681	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6843->CTAR, data,
682	682	floppy_drive_get_current_track( mc6843_floppy_image( device ) ) ));
683	683	break;
684	684
r17788	r17789
687	687	int cmd = data & 15;
688	688
689	689	LOG(( "%f $%04x mc6843_w: set CMR to $%02X: cmd=%s(%i) FWF=%i DMA=%i ISR3-intr=%i fun-intr=%i\n",
690		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ),
	690	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ),
691	691	data, mc6843_cmd[cmd], cmd, (data >> 4) & 1, (data >> 5) & 1,
692	692	(data >> 6) & 1, (data >> 7) & 1 ));
693	693
r17788	r17789
734	734
735	735	/* assume CLK freq = 1MHz (IBM 3740 compatibility) */
736	736	LOG(( "%f $%04x mc6843_w: set SUR to $%02X: head settling time=%fms, track-to-track seek time=%f\n",
737		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ),
	737	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ),
738	738	data, 4.096 * (data & 15), 1.024 * ((data >> 4) & 15) ));
739	739	break;
740	740
741	741	case 4: /* Sector Address Register (SAR) */
742	742	mc6843->SAR = data & 0x1f;
743		LOG(( "%f $%04x mc6843_w: set SAR to %i (%02X)\n", device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6843->SAR, data ));
	743	LOG(( "%f $%04x mc6843_w: set SAR to %i (%02X)\n", device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6843->SAR, data ));
744	744	break;
745	745
746	746	case 5: /* General Count Register (GCR) */
747	747	mc6843->GCR = data & 0x7f;
748		LOG(( "%f $%04x mc6843_w: set GCR to %i (%02X)\n", device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6843->GCR, data ));
	748	LOG(( "%f $%04x mc6843_w: set GCR to %i (%02X)\n", device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6843->GCR, data ));
749	749	break;
750	750
751	751	case 6: /* CRC Control Register (CCR) */
752	752	mc6843->CCR = data & 3;
753	753	LOG(( "%f $%04x mc6843_w: set CCR to %02X: CRC=%s shift=%i\n",
754		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), data,
	754	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), data,
755	755	(data & 1) ? "enabled" : "disabled", (data >> 1) & 1 ));
756	756	break;
757	757
758	758	case 7: /* Logical-Track Address Register (LTAR) */
759	759	mc6843->LTAR = data & 0x7f;
760	760	LOG(( "%f $%04x mc6843_w: set LTAR to %i %02X (actual=%i)\n",
761		device->machine().time().as_double(), cpu_get_previouspc( device->machine().firstcpu ), mc6843->LTAR, data,
	761	device->machine().time().as_double(), device->machine().firstcpu ->safe_pcbase( ), mc6843->LTAR, data,
762	762	floppy_drive_get_current_track( mc6843_floppy_image( device ) ) ));
763	763	break;
764	764
765	765	default:
766		logerror( "$%04x mc6843 invalid write offset %i (data=$%02X)\n", cpu_get_previouspc( device->machine().firstcpu ), offset, data );
	766	logerror( "$%04x mc6843 invalid write offset %i (data=$%02X)\n", device->machine().firstcpu ->safe_pcbase( ), offset, data );
767	767	}
768	768	}
769	769

trunk/src/mess/machine/rmnimbus.c

r17788	r17789
375	375	case 0x0d:   state->m_i186.intr.in_service &= ~0x20;   break;
376	376	case 0x0e:   state->m_i186.intr.in_service &= ~0x40;   break;
377	377	case 0x0f:   state->m_i186.intr.in_service &= ~0x80;   break;
378		default:   logerror("%05X:ERROR - 80186 EOI with unknown vector %02X\n", cpu_get_pc(machine.device(MAINCPU_TAG)), data & 0x1f);
	378	default:   logerror("%05X:ERROR - 80186 EOI with unknown vector %02X\n", machine.device(MAINCPU_TAG)->safe_pc(), data & 0x1f);
379	379	}
380	380	if (LOG_INTERRUPTS) logerror("(%f) **** Got EOI for vector %02X\n", machine.time().as_double(), data & 0x1f);
381	381	}
r17788	r17789
589	589	diff = new_control ^ t->control;
590	590	if (diff & 0x001c)
591	591	logerror("%05X:ERROR! -unsupported timer mode %04X\n",
592		cpu_get_pc(machine.device(MAINCPU_TAG)), new_control);
	592	machine.device(MAINCPU_TAG)->safe_pc(), new_control);
593	593
594	594	/* if we have real changes, update things */
595	595	if (diff != 0)
r17788	r17789
690	690	diff = new_control ^ d->control;
691	691	if ((LOG_DMA) && (diff & 0x6811))
692	692	logerror("%05X:ERROR! - unsupported DMA mode %04X\n",
693		cpu_get_pc(machine.device(MAINCPU_TAG)), new_control);
	693	machine.device(MAINCPU_TAG)->safe_pc(), new_control);
694	694	#if 0
695	695	/* if we're going live, set a timer */
696	696	if ((diff & 0x0002) && (new_control & 0x0002))
r17788	r17789
745	745	if(!(dma->control & ST_STOP))
746	746	{
747	747	logerror("%05X:ERROR! - drq%d with dma channel stopped\n",
748		cpu_get_pc(machine.device(MAINCPU_TAG)), which);
	748	machine.device(MAINCPU_TAG)->safe_pc(), which);
749	749
750	750	return;
751	751	}
r17788	r17789
860	860	switch (offset)
861	861	{
862	862	case 0x11:
863		logerror("%05X:ERROR - read from 80186 EOI\n", cpu_get_pc(&space.device()));
	863	logerror("%05X:ERROR - read from 80186 EOI\n", space.device().safe_pc());
864	864	break;
865	865
866	866	case 0x12:
867		if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", cpu_get_pc(&space.device()));
	867	if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll\n", space.device().safe_pc());
868	868	if (m_i186.intr.poll_status & 0x8000)
869	869	int_callback(machine().device(MAINCPU_TAG), 0);
870	870	return m_i186.intr.poll_status;
871	871
872	872	case 0x13:
873		if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", cpu_get_pc(&space.device()));
	873	if (LOG_PORTS) logerror("%05X:read 80186 interrupt poll status\n", space.device().safe_pc());
874	874	return m_i186.intr.poll_status;
875	875
876	876	case 0x14:
877		if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", cpu_get_pc(&space.device()));
	877	if (LOG_PORTS) logerror("%05X:read 80186 interrupt mask\n", space.device().safe_pc());
878	878	temp  = (m_i186.intr.timer  >> 3) & 0x01;
879	879	temp |= (m_i186.intr.dma[0] >> 1) & 0x04;
880	880	temp |= (m_i186.intr.dma[1] >> 0) & 0x08;
r17788	r17789
885	885	return temp;
886	886
887	887	case 0x15:
888		if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", cpu_get_pc(&space.device()));
	888	if (LOG_PORTS) logerror("%05X:read 80186 interrupt priority mask\n", space.device().safe_pc());
889	889	return m_i186.intr.priority_mask;
890	890
891	891	case 0x16:
892		if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", cpu_get_pc(&space.device()));
	892	if (LOG_PORTS) logerror("%05X:read 80186 interrupt in-service\n", space.device().safe_pc());
893	893	return m_i186.intr.in_service;
894	894
895	895	case 0x17:
896		if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", cpu_get_pc(&space.device()));
	896	if (LOG_PORTS) logerror("%05X:read 80186 interrupt request\n", space.device().safe_pc());
897	897	temp = m_i186.intr.request & ~0x0001;
898	898	if (m_i186.intr.status & 0x0007)
899	899	temp |= 1;
900	900	return temp;
901	901
902	902	case 0x18:
903		if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", cpu_get_pc(&space.device()));
	903	if (LOG_PORTS) logerror("%05X:read 80186 interrupt status\n", space.device().safe_pc());
904	904	return m_i186.intr.status;
905	905
906	906	case 0x19:
907		if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", cpu_get_pc(&space.device()));
	907	if (LOG_PORTS) logerror("%05X:read 80186 timer interrupt control\n", space.device().safe_pc());
908	908	return m_i186.intr.timer;
909	909
910	910	case 0x1a:
911		if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", cpu_get_pc(&space.device()));
	911	if (LOG_PORTS) logerror("%05X:read 80186 DMA 0 interrupt control\n", space.device().safe_pc());
912	912	return m_i186.intr.dma[0];
913	913
914	914	case 0x1b:
915		if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", cpu_get_pc(&space.device()));
	915	if (LOG_PORTS) logerror("%05X:read 80186 DMA 1 interrupt control\n", space.device().safe_pc());
916	916	return m_i186.intr.dma[1];
917	917
918	918	case 0x1c:
919		if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", cpu_get_pc(&space.device()));
	919	if (LOG_PORTS) logerror("%05X:read 80186 INT 0 interrupt control\n", space.device().safe_pc());
920	920	return m_i186.intr.ext[0];
921	921
922	922	case 0x1d:
923		if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", cpu_get_pc(&space.device()));
	923	if (LOG_PORTS) logerror("%05X:read 80186 INT 1 interrupt control\n", space.device().safe_pc());
924	924	return m_i186.intr.ext[1];
925	925
926	926	case 0x1e:
927		if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", cpu_get_pc(&space.device()));
	927	if (LOG_PORTS) logerror("%05X:read 80186 INT 2 interrupt control\n", space.device().safe_pc());
928	928	return m_i186.intr.ext[2];
929	929
930	930	case 0x1f:
931		if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", cpu_get_pc(&space.device()));
	931	if (LOG_PORTS) logerror("%05X:read 80186 INT 3 interrupt control\n", space.device().safe_pc());
932	932	return m_i186.intr.ext[3];
933	933
934	934	case 0x28:
935	935	case 0x2c:
936	936	case 0x30:
937		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", cpu_get_pc(&space.device()), (offset - 0x28) / 4);
	937	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d count\n", space.device().safe_pc(), (offset - 0x28) / 4);
938	938	which = (offset - 0x28) / 4;
939	939	if (!(offset & 1))
940	940	internal_timer_sync(machine(), which);
r17788	r17789
943	943	case 0x29:
944	944	case 0x2d:
945	945	case 0x31:
946		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", cpu_get_pc(&space.device()), (offset - 0x29) / 4);
	946	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d max A\n", space.device().safe_pc(), (offset - 0x29) / 4);
947	947	which = (offset - 0x29) / 4;
948	948	return m_i186.timer[which].maxA;
949	949
950	950	case 0x2a:
951	951	case 0x2e:
952		logerror("%05X:read 80186 Timer %d max B\n", cpu_get_pc(&space.device()), (offset - 0x2a) / 4);
	952	logerror("%05X:read 80186 Timer %d max B\n", space.device().safe_pc(), (offset - 0x2a) / 4);
953	953	which = (offset - 0x2a) / 4;
954	954	return m_i186.timer[which].maxB;
955	955
956	956	case 0x2b:
957	957	case 0x2f:
958	958	case 0x33:
959		if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", cpu_get_pc(&space.device()), (offset - 0x2b) / 4);
	959	if (LOG_PORTS) logerror("%05X:read 80186 Timer %d control\n", space.device().safe_pc(), (offset - 0x2b) / 4);
960	960	which = (offset - 0x2b) / 4;
961	961	return m_i186.timer[which].control;
962	962
963	963	case 0x50:
964		if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", cpu_get_pc(&space.device()));
	964	if (LOG_PORTS) logerror("%05X:read 80186 upper chip select\n", space.device().safe_pc());
965	965	return m_i186.mem.upper;
966	966
967	967	case 0x51:
968		if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", cpu_get_pc(&space.device()));
	968	if (LOG_PORTS) logerror("%05X:read 80186 lower chip select\n", space.device().safe_pc());
969	969	return m_i186.mem.lower;
970	970
971	971	case 0x52:
972		if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", cpu_get_pc(&space.device()));
	972	if (LOG_PORTS) logerror("%05X:read 80186 peripheral chip select\n", space.device().safe_pc());
973	973	return m_i186.mem.peripheral;
974	974
975	975	case 0x53:
976		if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", cpu_get_pc(&space.device()));
	976	if (LOG_PORTS) logerror("%05X:read 80186 middle chip select\n", space.device().safe_pc());
977	977	return m_i186.mem.middle;
978	978
979	979	case 0x54:
980		if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", cpu_get_pc(&space.device()));
	980	if (LOG_PORTS) logerror("%05X:read 80186 middle P chip select\n", space.device().safe_pc());
981	981	return m_i186.mem.middle_size;
982	982
983	983	case 0x60:
984	984	case 0x68:
985		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", cpu_get_pc(&space.device()), (offset - 0x60) / 8);
	985	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower source address\n", space.device().safe_pc(), (offset - 0x60) / 8);
986	986	which = (offset - 0x60) / 8;
987	987	return m_i186.dma[which].source;
988	988
989	989	case 0x61:
990	990	case 0x69:
991		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", cpu_get_pc(&space.device()), (offset - 0x61) / 8);
	991	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper source address\n", space.device().safe_pc(), (offset - 0x61) / 8);
992	992	which = (offset - 0x61) / 8;
993	993	return m_i186.dma[which].source >> 16;
994	994
995	995	case 0x62:
996	996	case 0x6a:
997		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", cpu_get_pc(&space.device()), (offset - 0x62) / 8);
	997	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d lower dest address\n", space.device().safe_pc(), (offset - 0x62) / 8);
998	998	which = (offset - 0x62) / 8;
999	999	return m_i186.dma[which].dest;
1000	1000
1001	1001	case 0x63:
1002	1002	case 0x6b:
1003		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", cpu_get_pc(&space.device()), (offset - 0x63) / 8);
	1003	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d upper dest address\n", space.device().safe_pc(), (offset - 0x63) / 8);
1004	1004	which = (offset - 0x63) / 8;
1005	1005	return m_i186.dma[which].dest >> 16;
1006	1006
1007	1007	case 0x64:
1008	1008	case 0x6c:
1009		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", cpu_get_pc(&space.device()), (offset - 0x64) / 8);
	1009	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d transfer count\n", space.device().safe_pc(), (offset - 0x64) / 8);
1010	1010	which = (offset - 0x64) / 8;
1011	1011	return m_i186.dma[which].count;
1012	1012
1013	1013	case 0x65:
1014	1014	case 0x6d:
1015		if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", cpu_get_pc(&space.device()), (offset - 0x65) / 8);
	1015	if (LOG_PORTS) logerror("%05X:read 80186 DMA%d control\n", space.device().safe_pc(), (offset - 0x65) / 8);
1016	1016	which = (offset - 0x65) / 8;
1017	1017	return m_i186.dma[which].control;
1018	1018
1019	1019	default:
1020		logerror("%05X:read 80186 port %02X\n", cpu_get_pc(&space.device()), offset);
	1020	logerror("%05X:read 80186 port %02X\n", space.device().safe_pc(), offset);
1021	1021	break;
1022	1022	}
1023	1023	return 0x00;
r17788	r17789
1036	1036	switch (offset)
1037	1037	{
1038	1038	case 0x11:
1039		if (LOG_PORTS) logerror("%05X:80186 EOI = %04X\n", cpu_get_pc(&space.device()), data16);
	1039	if (LOG_PORTS) logerror("%05X:80186 EOI = %04X\n", space.device().safe_pc(), data16);
1040	1040	handle_eoi(machine(),0x8000);
1041	1041	update_interrupt_state(machine());
1042	1042	break;
1043	1043
1044	1044	case 0x12:
1045		logerror("%05X:ERROR - write to 80186 interrupt poll = %04X\n", cpu_get_pc(&space.device()), data16);
	1045	logerror("%05X:ERROR - write to 80186 interrupt poll = %04X\n", space.device().safe_pc(), data16);
1046	1046	break;
1047	1047
1048	1048	case 0x13:
1049		logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X\n", cpu_get_pc(&space.device()), data16);
	1049	logerror("%05X:ERROR - write to 80186 interrupt poll status = %04X\n", space.device().safe_pc(), data16);
1050	1050	break;
1051	1051
1052	1052	case 0x14:
1053		if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X\n", cpu_get_pc(&space.device()), data16);
	1053	if (LOG_PORTS) logerror("%05X:80186 interrupt mask = %04X\n", space.device().safe_pc(), data16);
1054	1054	m_i186.intr.timer  = (m_i186.intr.timer  & ~0x08) | ((data16 << 3) & 0x08);
1055	1055	m_i186.intr.dma[0] = (m_i186.intr.dma[0] & ~0x08) | ((data16 << 1) & 0x08);
1056	1056	m_i186.intr.dma[1] = (m_i186.intr.dma[1] & ~0x08) | ((data16 << 0) & 0x08);
r17788	r17789
1062	1062	break;
1063	1063
1064	1064	case 0x15:
1065		if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X\n", cpu_get_pc(&space.device()), data16);
	1065	if (LOG_PORTS) logerror("%05X:80186 interrupt priority mask = %04X\n", space.device().safe_pc(), data16);
1066	1066	m_i186.intr.priority_mask = data16 & 0x0007;
1067	1067	update_interrupt_state(machine());
1068	1068	break;
1069	1069
1070	1070	case 0x16:
1071		if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X\n", cpu_get_pc(&space.device()), data16);
	1071	if (LOG_PORTS) logerror("%05X:80186 interrupt in-service = %04X\n", space.device().safe_pc(), data16);
1072	1072	m_i186.intr.in_service = data16 & 0x00ff;
1073	1073	update_interrupt_state(machine());
1074	1074	break;
1075	1075
1076	1076	case 0x17:
1077		if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X\n", cpu_get_pc(&space.device()), data16);
	1077	if (LOG_PORTS) logerror("%05X:80186 interrupt request = %04X\n", space.device().safe_pc(), data16);
1078	1078	m_i186.intr.request = (m_i186.intr.request & ~0x00c0) | (data16 & 0x00c0);
1079	1079	update_interrupt_state(machine());
1080	1080	break;
1081	1081
1082	1082	case 0x18:
1083		if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X\n", cpu_get_pc(&space.device()), data16);
	1083	if (LOG_PORTS) logerror("%05X:WARNING - wrote to 80186 interrupt status = %04X\n", space.device().safe_pc(), data16);
1084	1084	m_i186.intr.status = (m_i186.intr.status & ~0x8007) | (data16 & 0x8007);
1085	1085	update_interrupt_state(machine());
1086	1086	break;
1087	1087
1088	1088	case 0x19:
1089		if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", cpu_get_pc(&space.device()), data16);
	1089	if (LOG_PORTS) logerror("%05X:80186 timer interrupt contol = %04X\n", space.device().safe_pc(), data16);
1090	1090	m_i186.intr.timer = data16 & 0x000f;
1091	1091	break;
1092	1092
1093	1093	case 0x1a:
1094		if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", cpu_get_pc(&space.device()), data16);
	1094	if (LOG_PORTS) logerror("%05X:80186 DMA 0 interrupt control = %04X\n", space.device().safe_pc(), data16);
1095	1095	m_i186.intr.dma[0] = data16 & 0x000f;
1096	1096	break;
1097	1097
1098	1098	case 0x1b:
1099		if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", cpu_get_pc(&space.device()), data16);
	1099	if (LOG_PORTS) logerror("%05X:80186 DMA 1 interrupt control = %04X\n", space.device().safe_pc(), data16);
1100	1100	m_i186.intr.dma[1] = data16 & 0x000f;
1101	1101	break;
1102	1102
1103	1103	case 0x1c:
1104		if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", cpu_get_pc(&space.device()), data16);
	1104	if (LOG_PORTS) logerror("%05X:80186 INT 0 interrupt control = %04X\n", space.device().safe_pc(), data16);
1105	1105	m_i186.intr.ext[0] = data16 & 0x007f;
1106	1106	break;
1107	1107
1108	1108	case 0x1d:
1109		if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", cpu_get_pc(&space.device()), data16);
	1109	if (LOG_PORTS) logerror("%05X:80186 INT 1 interrupt control = %04X\n", space.device().safe_pc(), data16);
1110	1110	m_i186.intr.ext[1] = data16 & 0x007f;
1111	1111	break;
1112	1112
1113	1113	case 0x1e:
1114		if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", cpu_get_pc(&space.device()), data16);
	1114	if (LOG_PORTS) logerror("%05X:80186 INT 2 interrupt control = %04X\n", space.device().safe_pc(), data16);
1115	1115	m_i186.intr.ext[2] = data16 & 0x001f;
1116	1116	break;
1117	1117
1118	1118	case 0x1f:
1119		if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", cpu_get_pc(&space.device()), data16);
	1119	if (LOG_PORTS) logerror("%05X:80186 INT 3 interrupt control = %04X\n", space.device().safe_pc(), data16);
1120	1120	m_i186.intr.ext[3] = data16 & 0x001f;
1121	1121	break;
1122	1122
1123	1123	case 0x28:
1124	1124	case 0x2c:
1125	1125	case 0x30:
1126		if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X\n", cpu_get_pc(&space.device()), (offset - 0x28) / 4, data16);
	1126	if (LOG_PORTS) logerror("%05X:80186 Timer %d count = %04X\n", space.device().safe_pc(), (offset - 0x28) / 4, data16);
1127	1127	which = (offset - 0x28) / 4;
1128	1128	internal_timer_update(machine(),which, data16, -1, -1, -1);
1129	1129	break;
r17788	r17789
1131	1131	case 0x29:
1132	1132	case 0x2d:
1133	1133	case 0x31:
1134		if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X\n", cpu_get_pc(&space.device()), (offset - 0x29) / 4, data16);
	1134	if (LOG_PORTS) logerror("%05X:80186 Timer %d max A = %04X\n", space.device().safe_pc(), (offset - 0x29) / 4, data16);
1135	1135	which = (offset - 0x29) / 4;
1136	1136	internal_timer_update(machine(),which, -1, data16, -1, -1);
1137	1137	break;
1138	1138
1139	1139	case 0x2a:
1140	1140	case 0x2e:
1141		if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X\n", cpu_get_pc(&space.device()), (offset - 0x2a) / 4, data16);
	1141	if (LOG_PORTS) logerror("%05X:80186 Timer %d max B = %04X\n", space.device().safe_pc(), (offset - 0x2a) / 4, data16);
1142	1142	which = (offset - 0x2a) / 4;
1143	1143	internal_timer_update(machine(),which, -1, -1, data16, -1);
1144	1144	break;
r17788	r17789
1146	1146	case 0x2b:
1147	1147	case 0x2f:
1148	1148	case 0x33:
1149		if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X\n", cpu_get_pc(&space.device()), (offset - 0x2b) / 4, data16);
	1149	if (LOG_PORTS) logerror("%05X:80186 Timer %d control = %04X\n", space.device().safe_pc(), (offset - 0x2b) / 4, data16);
1150	1150	which = (offset - 0x2b) / 4;
1151	1151	internal_timer_update(machine(),which, -1, -1, -1, data16);
1152	1152	break;
1153	1153
1154	1154	case 0x50:
1155		if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X\n", cpu_get_pc(&space.device()), data16);
	1155	if (LOG_PORTS) logerror("%05X:80186 upper chip select = %04X\n", space.device().safe_pc(), data16);
1156	1156	m_i186.mem.upper = data16 | 0xc038;
1157	1157	break;
1158	1158
1159	1159	case 0x51:
1160		if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X\n", cpu_get_pc(&space.device()), data16);
	1160	if (LOG_PORTS) logerror("%05X:80186 lower chip select = %04X\n", space.device().safe_pc(), data16);
1161	1161	m_i186.mem.lower = (data16 & 0x3fff) | 0x0038; printf("%X",m_i186.mem.lower);
1162	1162	break;
1163	1163
1164	1164	case 0x52:
1165		if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X\n", cpu_get_pc(&space.device()), data16);
	1165	if (LOG_PORTS) logerror("%05X:80186 peripheral chip select = %04X\n", space.device().safe_pc(), data16);
1166	1166	m_i186.mem.peripheral = data16 | 0x0038;
1167	1167	break;
1168	1168
1169	1169	case 0x53:
1170		if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X\n", cpu_get_pc(&space.device()), data16);
	1170	if (LOG_PORTS) logerror("%05X:80186 middle chip select = %04X\n", space.device().safe_pc(), data16);
1171	1171	m_i186.mem.middle = data16 | 0x01f8;
1172	1172	break;
1173	1173
1174	1174	case 0x54:
1175		if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X\n", cpu_get_pc(&space.device()), data16);
	1175	if (LOG_PORTS) logerror("%05X:80186 middle P chip select = %04X\n", space.device().safe_pc(), data16);
1176	1176	m_i186.mem.middle_size = data16 | 0x8038;
1177	1177
1178	1178	/* we need to do this at a time when the I86 context is swapped in */
r17788	r17789
1183	1183
1184	1184	case 0x60:
1185	1185	case 0x68:
1186		if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X\n", cpu_get_pc(&space.device()), (offset - 0x60) / 8, data16);
	1186	if (LOG_PORTS) logerror("%05X:80186 DMA%d lower source address = %04X\n", space.device().safe_pc(), (offset - 0x60) / 8, data16);
1187	1187	which = (offset - 0x60) / 8;
1188	1188	m_i186.dma[which].source = (m_i186.dma[which].source & ~0x0ffff) | (data16 & 0x0ffff);
1189	1189	break;
1190	1190
1191	1191	case 0x61:
1192	1192	case 0x69:
1193		if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X\n", cpu_get_pc(&space.device()), (offset - 0x61) / 8, data16);
	1193	if (LOG_PORTS) logerror("%05X:80186 DMA%d upper source address = %04X\n", space.device().safe_pc(), (offset - 0x61) / 8, data16);
1194	1194	which = (offset - 0x61) / 8;
1195	1195	m_i186.dma[which].source = (m_i186.dma[which].source & ~0xf0000) | ((data16 << 16) & 0xf0000);
1196	1196	break;
1197	1197
1198	1198	case 0x62:
1199	1199	case 0x6a:
1200		if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X\n", cpu_get_pc(&space.device()), (offset - 0x62) / 8, data16);
	1200	if (LOG_PORTS) logerror("%05X:80186 DMA%d lower dest address = %04X\n", space.device().safe_pc(), (offset - 0x62) / 8, data16);
1201	1201	which = (offset - 0x62) / 8;
1202	1202	m_i186.dma[which].dest = (m_i186.dma[which].dest & ~0x0ffff) | (data16 & 0x0ffff);
1203	1203	break;
1204	1204
1205	1205	case 0x63:
1206	1206	case 0x6b:
1207		if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X\n", cpu_get_pc(&space.device()), (offset - 0x63) / 8, data16);
	1207	if (LOG_PORTS) logerror("%05X:80186 DMA%d upper dest address = %04X\n", space.device().safe_pc(), (offset - 0x63) / 8, data16);
1208	1208	which = (offset - 0x63) / 8;
1209	1209	m_i186.dma[which].dest = (m_i186.dma[which].dest & ~0xf0000) | ((data16 << 16) & 0xf0000);
1210	1210	break;
1211	1211
1212	1212	case 0x64:
1213	1213	case 0x6c:
1214		if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X\n", cpu_get_pc(&space.device()), (offset - 0x64) / 8, data16);
	1214	if (LOG_PORTS) logerror("%05X:80186 DMA%d transfer count = %04X\n", space.device().safe_pc(), (offset - 0x64) / 8, data16);
1215	1215	which = (offset - 0x64) / 8;
1216	1216	m_i186.dma[which].count = data16;
1217	1217	break;
1218	1218
1219	1219	case 0x65:
1220	1220	case 0x6d:
1221		if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X\n", cpu_get_pc(&space.device()), (offset - 0x65) / 8, data16);
	1221	if (LOG_PORTS) logerror("%05X:80186 DMA%d control = %04X\n", space.device().safe_pc(), (offset - 0x65) / 8, data16);
1222	1222	which = (offset - 0x65) / 8;
1223	1223	update_dma_control(machine(), which, data16);
1224	1224	break;
1225	1225
1226	1226	case 0x7f:
1227		if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X\n", cpu_get_pc(&space.device()), data16);
	1227	if (LOG_PORTS) logerror("%05X:80186 relocation register = %04X\n", space.device().safe_pc(), data16);
1228	1228
1229	1229	/* we assume here there that this doesn't happen too often */
1230	1230	/* plus, we can't really remove the old memory range, so we also assume that it's */
r17788	r17789
1244	1244	break;
1245	1245
1246	1246	default:
1247		logerror("%05X:80186 port %02X = %04X\n", cpu_get_pc(&space.device()), offset, data16);
	1247	logerror("%05X:80186 port %02X = %04X\n", space.device().safe_pc(), offset, data16);
1248	1248	break;
1249	1249	}
1250	1250	}
r17788	r17789
2082	2082
2083	2083	READ16_MEMBER(rmnimbus_state::nimbus_io_r)
2084	2084	{
2085		int pc=cpu_get_pc(&space.device());
	2085	int pc=space.device().safe_pc();
2086	2086
2087	2087	logerror("Nimbus IOR at pc=%08X from %04X mask=%04X, data=%04X\n",pc,(offset*2)+0x30,mem_mask,m_IOPorts[offset]);
2088	2088
r17788	r17789
2095	2095
2096	2096	WRITE16_MEMBER(rmnimbus_state::nimbus_io_w)
2097	2097	{
2098		int pc=cpu_get_pc(&space.device());
	2098	int pc=space.device().safe_pc();
2099	2099
2100	2100	logerror("Nimbus IOW at %08X write of %04X to %04X mask=%04X\n",pc,data,(offset*2)+0x30,mem_mask);
2101	2101
r17788	r17789
2314	2314	device_t *fdc = machine().device(FDC_TAG);
2315	2315	scsibus_device *hdc = machine().device<scsibus_device>(SCSIBUS_TAG);
2316	2316
2317		int pc=cpu_get_pc(&space.device());
	2317	int pc=space.device().safe_pc();
2318	2318	rmnimbus_state *state = machine().driver_data<rmnimbus_state>();
2319	2319	device_t *drive = machine().device(nimbus_wd17xx_interface.floppy_drive_tags[FDC_DRIVE()]);
2320	2320
r17788	r17789
2381	2381	{
2382	2382	device_t *fdc = machine().device(FDC_TAG);
2383	2383	scsibus_device *hdc = machine().device<scsibus_device>(SCSIBUS_TAG);
2384		int                 pc=cpu_get_pc(&space.device());
	2384	int                 pc=space.device().safe_pc();
2385	2385	UINT8               reg400_old = m_nimbus_drives.reg400;
2386	2386
2387	2387	if(LOG_DISK_FDD && ((offset*2)<=0x10))
r17788	r17789
2557	2557
2558	2558	READ8_MEMBER(rmnimbus_state::nimbus_pc8031_r)
2559	2559	{
2560		int pc=cpu_get_pc(&space.device());
	2560	int pc=space.device().safe_pc();
2561	2561	UINT8   result;
2562	2562
2563	2563	switch(offset*2)
r17788	r17789
2581	2581
2582	2582	WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_w)
2583	2583	{
2584		int pc=cpu_get_pc(&space.device());
	2584	int pc=space.device().safe_pc();
2585	2585
2586	2586	switch(offset*2)
2587	2587	{
r17788	r17789
2607	2607
2608	2608	READ8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_r)
2609	2609	{
2610		int pc=cpu_get_pc(&space.device());
	2610	int pc=space.device().safe_pc();
2611	2611	UINT8   result = 0;
2612	2612
2613	2613	switch (offset & 0x01)
r17788	r17789
2632	2632
2633	2633	WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_iou_w)
2634	2634	{
2635		int pc=cpu_get_pc(&space.device());
	2635	int pc=space.device().safe_pc();
2636	2636
2637	2637	if(LOG_PC8031)
2638	2638	logerror("8031 PCIOW %04X write of %02X to %04X\n",pc,data,offset);
r17788	r17789
2672	2672	READ8_MEMBER(rmnimbus_state::nimbus_pc8031_port_r)
2673	2673	{
2674	2674	device_t *er59256 = machine().device(ER59256_TAG);
2675		int pc=cpu_get_pc(&space.device());
	2675	int pc=space.device().safe_pc();
2676	2676	UINT8   result = 0;
2677	2677
2678	2678	if(LOG_PC8031_PORT)
r17788	r17789
2689	2689	WRITE8_MEMBER(rmnimbus_state::nimbus_pc8031_port_w)
2690	2690	{
2691	2691	device_t *er59256 = machine().device(ER59256_TAG);
2692		int pc=cpu_get_pc(&space.device());
	2692	int pc=space.device().safe_pc();
2693	2693
2694	2694	switch (offset)
2695	2695	{
r17788	r17789
2705	2705	/* IO Unit */
2706	2706	READ8_MEMBER(rmnimbus_state::nimbus_iou_r)
2707	2707	{
2708		int pc=cpu_get_pc(&space.device());
	2708	int pc=space.device().safe_pc();
2709	2709	UINT8   result=0;
2710	2710
2711	2711	if(offset==0)
r17788	r17789
2721	2721
2722	2722	WRITE8_MEMBER(rmnimbus_state::nimbus_iou_w)
2723	2723	{
2724		int pc=cpu_get_pc(&space.device());
	2724	int pc=space.device().safe_pc();
2725	2725	device_t *msm5205 = machine().device(MSM5205_TAG);
2726	2726
2727	2727	if(LOG_IOU)
r17788	r17789
2782	2782
2783	2783	WRITE8_MEMBER(rmnimbus_state::nimbus_sound_ay8910_w)
2784	2784	{
2785		int pc=cpu_get_pc(&space.device());
	2785	int pc=space.device().safe_pc();
2786	2786	device_t *ay8910 = machine().device(AY8910_TAG);
2787	2787
2788	2788	if(LOG_SOUND)
r17788	r17789
2854	2854	rmnimbus_state *drvstate = machine.driver_data<rmnimbus_state>();
2855	2855	UINT8   x = 0;
2856	2856	UINT8   y = 0;
2857		//  int     pc=cpu_get_pc(machine.device(MAINCPU_TAG));
	2857	//  int     pc=machine.device(MAINCPU_TAG)->safe_pc();
2858	2858
2859	2859	UINT8   intstate_x;
2860	2860	UINT8   intstate_y;
r17788	r17789
3000	3000
3001	3001	*/
3002	3002	UINT8 result;
3003		//int pc=cpu_get_pc(machine().device(MAINCPU_TAG));
	3003	//int pc=machine().device(MAINCPU_TAG)->safe_pc();
3004	3004	_mouse_joy_state *state = &m_nimbus_mouse;
3005	3005
3006	3006	if (ioport("config")->read() & 0x01)

trunk/src/mess/machine/apple2.c

r17788	r17789
1450	1450	if (offset == 0xa)  // RAM
1451	1451	{
1452	1452	apple2_setvar(space.machine(), VAR_TK2000RAM, ~0);
1453		printf("TK2000: RAM (PC %x)\n", cpu_get_pc(m_maincpu));
	1453	printf("TK2000: RAM (PC %x)\n", m_maincpu->safe_pc());
1454	1454	}
1455	1455	else if (offset == 0xb) // ROM
1456	1456	{
1457	1457	apple2_setvar(space.machine(), 0, ~VAR_TK2000RAM);
1458		printf("TK2000: ROM (PC %x)\n", cpu_get_pc(m_maincpu));
	1458	printf("TK2000: ROM (PC %x)\n", m_maincpu->safe_pc());
1459	1459	}
1460	1460	}
1461	1461

trunk/src/mess/machine/omti8621.c

r17788	r17789
218	218	int ms = (t % osd_ticks_per_second()) / 1000;
219	219
220	220	sprintf(statebuf, "%d.%03d %s pc=%08x - %s", s, ms, cpu->tag(),
221		cpu_get_previouspc(cpu), device->tag());
	221	cpu->safe_pcbase(), device->tag());
222	222	} else {
223	223	strcpy(statebuf, "(no context)");
224	224	}

trunk/src/mess/video/stic.c

r17788	r17789
157	157	case STIC_CSR + STIC_CSR1:
158	158	case STIC_CSR + STIC_CSR2:
159	159	case STIC_CSR + STIC_CSR3:
160		logerror("Setting color_stack[%x] = %x (%x)\n", offset & (STIC_CSRS - 1),data & STIC_CSR_BG, cpu_get_pc(&space.device()));
	160	logerror("Setting color_stack[%x] = %x (%x)\n", offset & (STIC_CSRS - 1),data & STIC_CSR_BG, space.device().safe_pc());
161	161	break;
162	162	/* Border Color */
163	163	case STIC_BCR:

trunk/src/mess/video/nubus_wsportrait.c

r17788	r17789
254	254
255	255	if (m_count == 3)
256	256	{
257		//              printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", m_clutoffs, m_colors[0], m_colors[1], m_colors[2], cpu_get_pc(&space.device()) );
	257	//              printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", m_clutoffs, m_colors[0], m_colors[1], m_colors[2], space.device().safe_pc() );
258	258	m_palette[m_clutoffs] = MAKE_RGB(m_colors[2], m_colors[2], m_colors[2]);
259	259	m_clutoffs++;
260	260	if (m_clutoffs > 255)

trunk/src/mess/video/nubus_cb264.c

r17788	r17789
247	247	break;
248	248
249	249	default:
250		//          printf("cb264_w: %x to reg %x (mask %x PC %x)\n", data, offset*4, mem_mask, cpu_get_pc(&space->device()));
	250	//          printf("cb264_w: %x to reg %x (mask %x PC %x)\n", data, offset*4, mem_mask, space->device().safe_pc());
251	251	break;
252	252	}
253	253	}
r17788	r17789
265	265	return m_cb264_toggle;   // bit 0 is vblank?
266	266
267	267	default:
268		logerror("cb264_r: reg %x (mask %x PC %x)\n", offset*4, mem_mask, cpu_get_pc(&space.device()));
	268	logerror("cb264_r: reg %x (mask %x PC %x)\n", offset*4, mem_mask, space.device().safe_pc());
269	269	break;
270	270	}
271	271

trunk/src/mess/video/mac.c

r17788	r17789
714	714
715	715	READ32_MEMBER(mac_state::dafb_r)
716	716	{
717		//  if (offset != 0x108/4) printf("DAFB: Read @ %x (mask %x PC=%x)\n", offset*4, mem_mask, cpu_get_pc(m_maincpu));
	717	//  if (offset != 0x108/4) printf("DAFB: Read @ %x (mask %x PC=%x)\n", offset*4, mem_mask, m_maincpu->safe_pc());
718	718
719	719	switch (offset<<2)
720	720	{
r17788	r17789
745	745
746	746	WRITE32_MEMBER(mac_state::dafb_w)
747	747	{
748		//  if (offset != 0x10c/4) printf("DAFB: Write %08x @ %x (mask %x PC=%x)\n", data, offset*4, mem_mask, cpu_get_pc(m_maincpu));
	748	//  if (offset != 0x10c/4) printf("DAFB: Write %08x @ %x (mask %x PC=%x)\n", data, offset*4, mem_mask, m_maincpu->safe_pc());
749	749
750	750	switch (offset<<2)
751	751	{
r17788	r17789
809	809
810	810	READ32_MEMBER(mac_state::dafb_dac_r)
811	811	{
812		//  printf("DAFB: Read DAC @ %x (mask %x PC=%x)\n", offset*4, mem_mask, cpu_get_pc(m_maincpu));
	812	//  printf("DAFB: Read DAC @ %x (mask %x PC=%x)\n", offset*4, mem_mask, m_maincpu->safe_pc());
813	813
814	814	return 0;
815	815	}
816	816
817	817	WRITE32_MEMBER(mac_state::dafb_dac_w)
818	818	{
819		//  if ((offset > 0) && (offset != 0x10/4)) printf("DAFB: Write %08x to DAC @ %x (mask %x PC=%x)\n", data, offset*4, mem_mask, cpu_get_pc(m_maincpu));
	819	//  if ((offset > 0) && (offset != 0x10/4)) printf("DAFB: Write %08x to DAC @ %x (mask %x PC=%x)\n", data, offset*4, mem_mask, m_maincpu->safe_pc());
820	820
821	821	switch (offset<<2)
822	822	{
r17788	r17789
1018	1018	break;
1019	1019
1020	1020	default:
1021		//            printf("macwd_r: @ %x, mask %08x (PC=%x)\n", offset, mem_mask, cpu_get_pc(m_maincpu));
	1021	//            printf("macwd_r: @ %x, mask %08x (PC=%x)\n", offset, mem_mask, m_maincpu->safe_pc());
1022	1022	break;
1023	1023	}
1024	1024	return 0;
r17788	r17789
1052	1052	break;
1053	1053
1054	1054	default:
1055		//            printf("macwd_w: %x @ %x, mask %08x (PC=%x)\n", data, offset, mem_mask, cpu_get_pc(m_maincpu));
	1055	//            printf("macwd_w: %x @ %x, mask %08x (PC=%x)\n", data, offset, mem_mask, m_maincpu->safe_pc());
1056	1056	break;
1057	1057	}
1058	1058	}

trunk/src/mess/video/rm380z.c

r17788	r17789
196	196	{
197	197	rm380z_state *state = machine().driver_data<rm380z_state>();
198	198
199		//printf("vramw [%2.2x][%2.2x] port0 [%2.2x] fbfd [%2.2x] fbfe [%2.2x] PC [%4.4x]\n",offset,data,state->m_port0,m_fbfd,m_fbfe,cpu_get_pc(machine().device("maincpu")));
	199	//printf("vramw [%2.2x][%2.2x] port0 [%2.2x] fbfd [%2.2x] fbfe [%2.2x] PC [%4.4x]\n",offset,data,state->m_port0,m_fbfd,m_fbfe,machine().device("maincpu")->safe_pc());
200	200
201	201	int lineWidth=0x80;
202	202	if (m_videomode==RM380Z_VIDEOMODE_40COL)

trunk/src/mess/video/newport.c

r17788	r17789
38	38	va_start( v, s_fmt );
39	39	vsprintf( buf, s_fmt, v );
40	40	va_end( v );
41		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	41	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
42	42	}
43	43	}
44	44

trunk/src/mess/video/nubus_specpdq.c

r17788	r17789
291	291	break;
292	292
293	293	case 0x120000:   // DAC address
294		//          printf("%08x to DAC control (PC=%x)\n", data, cpu_get_pc(&space.device()));
	294	//          printf("%08x to DAC control (PC=%x)\n", data, space.device().safe_pc());
295	295	m_clutoffs = ((data>>8)&0xff)^0xff;
296	296	break;
297	297
r17788	r17789
300	300
301	301	if (m_count == 3)
302	302	{
303		//              printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", m_clutoffs, m_colors[0], m_colors[1], m_colors[2], cpu_get_pc(&space.device()) );
	303	//              printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", m_clutoffs, m_colors[0], m_colors[1], m_colors[2], space.device().safe_pc() );
304	304	palette_set_color(space.machine(), m_clutoffs, MAKE_RGB(m_colors[0], m_colors[1], m_colors[2]));
305	305	m_palette[m_clutoffs] = MAKE_RGB(m_colors[0], m_colors[1], m_colors[2]);
306	306	m_clutoffs++;
r17788	r17789
386	386
387	387	// blitter control
388	388	case 0x182006:
389		//          printf("%08x (%d) to blitter ctrl 1 (PC=%x)\n", data^0xffffffff, data^0xffffffff, cpu_get_pc(&space.device()));
	389	//          printf("%08x (%d) to blitter ctrl 1 (PC=%x)\n", data^0xffffffff, data^0xffffffff, space.device().safe_pc());
390	390	break;
391	391
392	392	case 0x182008:
393		//          printf("%08x (%d) to blitter ctrl 2 (PC=%x)\n", data^0xffffffff, data^0xffffffff, cpu_get_pc(&space.device()));
	393	//          printf("%08x (%d) to blitter ctrl 2 (PC=%x)\n", data^0xffffffff, data^0xffffffff, space.device().safe_pc());
394	394	m_patofsx = (data ^ 0xffffffff) & 7;
395	395	m_patofsy = ((data ^ 0xffffffff)>>3) & 7;
396	396	break;
397	397
398	398	case 0x18200e:
399		//          printf("%08x (%d) to blitter ctrl 3 (PC=%x)\n", data^0xffffffff, data^0xffffffff, cpu_get_pc(&space.device()));
	399	//          printf("%08x (%d) to blitter ctrl 3 (PC=%x)\n", data^0xffffffff, data^0xffffffff, space.device().safe_pc());
400	400	m_width = data ^ 0xffffffff;
401	401	break;
402	402
403	403	case 0x18200b:
404		//          printf("%08x (%d) to blitter ctrl 4 (PC=%x)\n", data^0xffffffff, data^0xffffffff, cpu_get_pc(&space.device()));
	404	//          printf("%08x (%d) to blitter ctrl 4 (PC=%x)\n", data^0xffffffff, data^0xffffffff, space.device().safe_pc());
405	405	m_height = (data ^ 0xffffffff) & 0xffff;
406	406	break;
407	407
408	408	case 0x18200a:
409	409	data ^= 0xffffffff;
410		//          printf("%08x to blitter ctrl 5 (PC=%x)\n", data, cpu_get_pc(&space.device()));
	410	//          printf("%08x to blitter ctrl 5 (PC=%x)\n", data, space.device().safe_pc());
411	411	m_vram_src = data>>2;
412	412	break;
413	413
414	414	case 0x182009:
415	415	data ^= 0xffffffff;
416		//          printf("%08x to blitter ctrl 6 (PC=%x)\n", data, cpu_get_pc(&space.device()));
	416	//          printf("%08x to blitter ctrl 6 (PC=%x)\n", data, space.device().safe_pc());
417	417	m_vram_addr = data>>2;
418	418	break;
419	419
420	420	case 0x182007:
421	421	data ^= 0xffffffff;
422		//          printf("%08x to blitter ctrl 7 (PC=%x)\n", data, cpu_get_pc(&space.device()));
	422	//          printf("%08x to blitter ctrl 7 (PC=%x)\n", data, space.device().safe_pc());
423	423
424	424	// fill rectangle
425	425	if (data == 2)
r17788	r17789
460	460	break;
461	461
462	462	default:
463		//          printf("specpdq_w: %08x @ %x (mask %08x  PC=%x)\n", data^0xffffffff, offset, mem_mask, cpu_get_pc(&space.device()));
	463	//          printf("specpdq_w: %08x @ %x (mask %08x  PC=%x)\n", data^0xffffffff, offset, mem_mask, space.device().safe_pc());
464	464	break;
465	465	}
466	466	}
467	467
468	468	READ32_MEMBER( nubus_specpdq_device::specpdq_r )
469	469	{
470		//  if (offset != 0xc005c && offset != 0xc005e) printf("specpdq_r: @ %x (mask %08x  PC=%x)\n", offset, mem_mask, cpu_get_pc(&space.device()));
	470	//  if (offset != 0xc005c && offset != 0xc005e) printf("specpdq_r: @ %x (mask %08x  PC=%x)\n", offset, mem_mask, space.device().safe_pc());
471	471
472	472	if (offset >= 0xc0000 && offset < 0x100000)
473	473	{

trunk/src/mess/video/x68k.c

r17788	r17789
461	461	}
462	462	break;
463	463	}
464		//  logerror("CRTC: [%08x] Wrote %04x to CRTC register %i\n",cpu_get_pc(space->machine().device("maincpu")),data,offset);
	464	//  logerror("CRTC: [%08x] Wrote %04x to CRTC register %i\n",space->machine().device("maincpu")->safe_pc(),data,offset);
465	465	}
466	466
467	467	READ16_HANDLER( x68k_crtc_r )
r17788	r17789
478	478
479	479	if(offset < 24)
480	480	{
481		//      logerror("CRTC: [%08x] Read %04x from CRTC register %i\n",cpu_get_pc(space->machine().device("maincpu")),state->m_crtc.reg[offset],offset);
	481	//      logerror("CRTC: [%08x] Read %04x from CRTC register %i\n",space->machine().device("maincpu")->safe_pc(),state->m_crtc.reg[offset],offset);
482	482	switch(offset)
483	483	{
484	484	case 9:

trunk/src/mess/video/crtc_ega.c

r17788	r17789
80	80
81	81	WRITE8_MEMBER( crtc_ega_device::register_w )
82	82	{
83		if (LOG)  logerror("CRTC_EGA PC %04x: reg 0x%02x = 0x%02x\n", cpu_get_pc(machine().firstcpu), m_register_address_latch, data);
	83	if (LOG)  logerror("CRTC_EGA PC %04x: reg 0x%02x = 0x%02x\n", machine().firstcpu->safe_pc(), m_register_address_latch, data);
84	84
85	85	switch (m_register_address_latch)
86	86	{

trunk/src/mess/video/nubus_48gc.c

r17788	r17789
335	335
336	336	READ32_MEMBER( jmfb_device::mac_48gc_r )
337	337	{
338		//  printf("48gc_r: @ %x, mask %08x [PC=%x]\n", offset, mem_mask, cpu_get_pc(machine().device("maincpu")));
	338	//  printf("48gc_r: @ %x, mask %08x [PC=%x]\n", offset, mem_mask, machine().device("maincpu")->safe_pc());
339	339
340	340	switch (offset)
341	341	{

trunk/src/mess/video/nubus_m2hires.c

r17788	r17789
257	257	break;
258	258
259	259	case 0x5038:   // DAC control
260		//          printf("%08x to DAC control (PC=%x)\n", data, cpu_get_pc(&space.device()));
	260	//          printf("%08x to DAC control (PC=%x)\n", data, space.device().safe_pc());
261	261	m_clutoffs = (data>>24)&0xff;
262	262	break;
263	263
r17788	r17789
266	266
267	267	if (m_count == 3)
268	268	{
269		//              printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", m_clutoffs, m_colors[0], m_colors[1], m_colors[2], cpu_get_pc(&space.device()) );
	269	//              printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", m_clutoffs, m_colors[0], m_colors[1], m_colors[2], space.device().safe_pc() );
270	270	m_palette[m_clutoffs] = MAKE_RGB(m_colors[0], m_colors[1], m_colors[2]);
271	271	m_clutoffs++;
272	272	if (m_clutoffs > 255)
r17788	r17789
287	287	break;
288	288
289	289	default:
290		//          printf("m2hires_w: %08x @ %x, mask %08x (PC=%x)\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	290	//          printf("m2hires_w: %08x @ %x, mask %08x (PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
291	291	break;
292	292	}
293	293	}
r17788	r17789
301	301	}
302	302	/*  else
303	303	{
304		printf("m2hires_r: @ %x, mask %08x (PC=%x)\n", offset, mem_mask, cpu_get_pc(&space.device()));
	304	printf("m2hires_r: @ %x, mask %08x (PC=%x)\n", offset, mem_mask, space.device().safe_pc());
305	305	}*/
306	306
307	307	return 0;

trunk/src/mess/video/ssystem3.c

r17788	r17789
18	18	state->m_lcd.data[state->m_lcd.count/8]&=~(1<<(state->m_lcd.count&7));
19	19	if (data) state->m_lcd.data[state->m_lcd.count/8]|=1<<(state->m_lcd.count&7);
20	20	if (state->m_lcd.count+1==40) {
21		logerror("%.4x lcd %02x%02x%02x%02x%02x\n",(int)cpu_get_pc(machine.device("maincpu")),
	21	logerror("%.4x lcd %02x%02x%02x%02x%02x\n",(int)machine.device("maincpu")->safe_pc(),
22	22	state->m_lcd.data[0], state->m_lcd.data[1], state->m_lcd.data[2], state->m_lcd.data[3], state->m_lcd.data[4]);
23	23	}
24	24	state->m_lcd.count=(state->m_lcd.count+1)%40;

trunk/src/mess/video/rmnimbus.c

r17788	r17789
105	105	READ16_MEMBER(rmnimbus_state::nimbus_video_io_r)
106	106	{
107	107	rmnimbus_state *state = machine().driver_data<rmnimbus_state>();
108		int     pc=cpu_get_pc(&space.device());
	108	int     pc=space.device().safe_pc();
109	109	UINT16  result;
110	110
111	111	switch (offset)
r17788	r17789
266	266	WRITE16_MEMBER(rmnimbus_state::nimbus_video_io_w)
267	267	{
268	268	rmnimbus_state *state = machine().driver_data<rmnimbus_state>();
269		int pc=cpu_get_pc(&space.device());
	269	int pc=space.device().safe_pc();
270	270
271	271	if(offset<reg028)
272	272	{

trunk/src/mess/video/nubus_spec8.c

r17788	r17789
267	267	{
268	268	int actual_color = BITSWAP8(m_clutoffs, 0, 1, 2, 3, 4, 5, 6, 7);
269	269
270		//              printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", actual_color, m_colors[0], m_colors[1], m_colors[2], cpu_get_pc(&space.device()) );
	270	//              printf("RAMDAC: color %d = %02x %02x %02x (PC=%x)\n", actual_color, m_colors[0], m_colors[1], m_colors[2], space.device().safe_pc() );
271	271	m_palette[actual_color] = MAKE_RGB(m_colors[0], m_colors[1], m_colors[2]);
272	272	m_clutoffs++;
273	273	if (m_clutoffs > 255)
r17788	r17789
313	313	break;
314	314
315	315	default:
316		//          if (offset >= 0x3800) printf("spec8s3_w: %08x @ %x (mask %08x  PC=%x)\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	316	//          if (offset >= 0x3800) printf("spec8s3_w: %08x @ %x (mask %08x  PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
317	317	break;
318	318	}
319	319	}
r17788	r17789
341	341	return 0;
342	342
343	343	default:
344		//          if (offset >= 0x3800) printf("spec8s3_r: @ %x (mask %08x  PC=%x)\n", offset, mem_mask, cpu_get_pc(&space.device()));
	344	//          if (offset >= 0x3800) printf("spec8s3_r: @ %x (mask %08x  PC=%x)\n", offset, mem_mask, space.device().safe_pc());
345	345	break;
346	346	}
347	347	return 0;

trunk/src/mess/video/gba.c

r17788	r17789
22	22	va_start( v, s_fmt );
23	23	vsprintf( buf, s_fmt, v );
24	24	va_end( v );
25		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	25	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
26	26	}
27	27	}
28	28

trunk/src/mess/drivers/rainbow.c

r17788	r17789
331	331
332	332	WRITE8_MEMBER( rainbow_state::diagnostic_w )
333	333	{
334		//    printf("%02x to diag port (PC=%x)\n", data, cpu_get_pc(&space.device()));
	334	//    printf("%02x to diag port (PC=%x)\n", data, space.device().safe_pc());
335	335
336	336	if (!(data & 1))
337	337	{

trunk/src/mess/drivers/pc9801.c

r17788	r17789
719	719	printf("Read to undefined port [%02x]\n",offset+0x40);
720	720	else
721	721	{
722		//printf("Read to 8251 kbd port [%02x] %08x\n",offset+0x40,cpu_get_pc(m_maincpu));
	722	//printf("Read to 8251 kbd port [%02x] %08x\n",offset+0x40,m_maincpu->safe_pc());
723	723	if(offset == 1)
724	724	{
725	725	UINT8 res;

trunk/src/mess/drivers/pc88va.c

r17788	r17789
641	641	case SPROV:  m_cmd = SPROV; /* TODO: where it returns the info? */ break;
642	642
643	643	/* TODO: 0x89 shouldn't trigger, should be one of the above commands */
644		default:   m_cmd = 0x00; printf("PC=%05x: Unknown IDP %02x cmd set\n",cpu_get_pc(&space.device()),data); break;
	644	default:   m_cmd = 0x00; printf("PC=%05x: Unknown IDP %02x cmd set\n",space.device().safe_pc(),data); break;
645	645	}
646	646	}
647	647

trunk/src/mess/drivers/vii.c

r17788	r17789
167	167	va_start( v, s_fmt );
168	168	vsprintf( buf, s_fmt, v );
169	169	va_end( v );
170		logerror( "%04x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	170	logerror( "%04x: %s", machine.device("maincpu")->safe_pc(), buf );
171	171	}
172	172	}
173	173	#else

trunk/src/mess/drivers/x1.c

r17788	r17789
1632	1632	else if(offset >= 0x4000 && offset <= 0xffff)   { return m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)]; }
1633	1633	else
1634	1634	{
1635		//logerror("(PC=%06x) Read i/o address %04x\n",cpu_get_pc(&space->device()),offset);
	1635	//logerror("(PC=%06x) Read i/o address %04x\n",space->device().safe_pc(),offset);
1636	1636	}
1637	1637	return 0xff;
1638	1638	}
r17788	r17789
1675	1675	else if(offset >= 0x4000 && offset <= 0xffff)   { m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)] = data; }
1676	1676	else
1677	1677	{
1678		//logerror("(PC=%06x) Write %02x at i/o address %04x\n",cpu_get_pc(&space->device()),data,offset);
	1678	//logerror("(PC=%06x) Write %02x at i/o address %04x\n",space->device().safe_pc(),data,offset);
1679	1679	}
1680	1680	}
1681	1681
r17788	r17789
1722	1722	else if(offset >= 0x4000 && offset <= 0xffff)   { return m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)]; }
1723	1723	else
1724	1724	{
1725		//logerror("(PC=%06x) Read i/o address %04x\n",cpu_get_pc(&space->device()),offset);
	1725	//logerror("(PC=%06x) Read i/o address %04x\n",space->device().safe_pc(),offset);
1726	1726	}
1727	1727	return 0xff;
1728	1728	}
r17788	r17789
1778	1778	else if(offset >= 0x4000 && offset <= 0xffff)   { m_gfx_bitmap_ram[offset-0x4000+(m_scrn_reg.gfx_bank*0xc000)] = data; }
1779	1779	else
1780	1780	{
1781		//logerror("(PC=%06x) Write %02x at i/o address %04x\n",cpu_get_pc(&space->device()),data,offset);
	1781	//logerror("(PC=%06x) Write %02x at i/o address %04x\n",space->device().safe_pc(),data,offset);
1782	1782	}
1783	1783	}
1784	1784

trunk/src/mess/drivers/sgi_ip6.c

r17788	r17789
55	55	va_start( v, s_fmt );
56	56	vsprintf( buf, s_fmt, v );
57	57	va_end( v );
58		logerror("%08x: %s", cpu_get_pc(machine.device("maincpu")), buf);
	58	logerror("%08x: %s", machine.device("maincpu")->safe_pc(), buf);
59	59	}
60	60	}
61	61	#else

trunk/src/mess/drivers/smc777.c

r17788	r17789
633	633	else if(low_offs >= 0x18 && low_offs <= 0x19) { logerror("6845 read %02x",low_offs & 1); }
634	634	else if(low_offs >= 0x1a && low_offs <= 0x1b) { return key_r(space,low_offs & 1); }
635	635	else if(low_offs == 0x1c)                 { return system_input_r(space,0); }
636		else if(low_offs == 0x1d)                 { logerror("System and control data R PC=%04x\n",cpu_get_pc(&space.device())); return 0xff; }
	636	else if(low_offs == 0x1d)                 { logerror("System and control data R PC=%04x\n",space.device().safe_pc()); return 0xff; }
637	637	else if(low_offs == 0x20)                 { return display_reg_r(space,0); }
638	638	else if(low_offs == 0x21)                 { return smc777_irq_mask_r(space,0); }
639		else if(low_offs == 0x25)                 { logerror("RTC read PC=%04x\n",cpu_get_pc(&space.device())); return 0xff; }
640		else if(low_offs == 0x26)                 { logerror("RS-232c RX %04x\n",cpu_get_pc(&space.device())); return 0xff; }
	639	else if(low_offs == 0x25)                 { logerror("RTC read PC=%04x\n",space.device().safe_pc()); return 0xff; }
	640	else if(low_offs == 0x26)                 { logerror("RS-232c RX %04x\n",space.device().safe_pc()); return 0xff; }
641	641	else if(low_offs >= 0x28 && low_offs <= 0x2c) { logerror("FDC 2 read %02x\n",low_offs & 7); return 0xff; }
642	642	else if(low_offs >= 0x2d && low_offs <= 0x2f) { logerror("RS-232c no. 2 read %02x\n",low_offs & 3); return 0xff; }
643	643	else if(low_offs >= 0x30 && low_offs <= 0x34) { return smc777_fdc1_r(space,low_offs & 7); }
r17788	r17789
655	655	else if(low_offs == 0x7e || low_offs == 0x7f) { logerror("Kanji ROM read %02x\n",low_offs & 1); }
656	656	else if(low_offs >= 0x80)                 { return smc777_fbuf_r(space,offset & 0xff7f); }
657	657
658		logerror("Undefined read at %04x offset = %02x\n",cpu_get_pc(&space.device()),low_offs);
	658	logerror("Undefined read at %04x offset = %02x\n",space.device().safe_pc(),low_offs);
659	659	return 0xff;
660	660	}
661	661
r17788	r17789
697	697	else if(low_offs == 0x75)                 { logerror("VTR Controller ROM write %02x\n",data); }
698	698	else if(low_offs == 0x7e || low_offs == 0x7f) { logerror("Kanji ROM write [%02x] %02x\n",low_offs & 1,data); }
699	699	else if(low_offs >= 0x80)                 { smc777_fbuf_w(space,offset & 0xff7f,data); }
700		else                                { logerror("Undefined write at %04x offset = %02x data = %02x\n",cpu_get_pc(&space.device()),low_offs,data); }
	700	else                                { logerror("Undefined write at %04x offset = %02x data = %02x\n",space.device().safe_pc(),low_offs,data); }
701	701	}
702	702
703	703	static ADDRESS_MAP_START( smc777_io , AS_IO, 8, smc777_state )

trunk/src/mess/drivers/ip22.c

r17788	r17789
144	144	va_start( v, s_fmt );
145	145	vsprintf( buf, s_fmt, v );
146	146	va_end( v );
147		logerror("%08x: %s", cpu_get_pc(machine.device("maincpu")), buf);
	147	logerror("%08x: %s", machine.device("maincpu")->safe_pc(), buf);
148	148	}
149	149	}
150	150
r17788	r17789
253	253	return ret8;
254	254	case 0x030/4:
255	255	//verboselog(( machine, 2, "Serial 1 Command Transfer Read, 0x1fbd9830: %02x\n", 0x04 );
256		switch(cpu_get_pc(&space.device()))
	256	switch(space.device().safe_pc())
257	257	{
258	258	case 0x9fc1d9e4:   // interpreter (ip244415)
259	259	case 0x9fc1d9e0:   // DRC (ip244415)
r17788	r17789
499	499	return 0;
500	500	}
501	501	default:
502		//verboselog((machine, 0, "Unknown HPC3 HD0 Read: %08x (%08x) [%x] PC=%x\n", 0x1fbc0000 + ( offset << 2 ), mem_mask, offset, cpu_get_pc(&space.device()) );
	502	//verboselog((machine, 0, "Unknown HPC3 HD0 Read: %08x (%08x) [%x] PC=%x\n", 0x1fbc0000 + ( offset << 2 ), mem_mask, offset, space.device().safe_pc() );
503	503	return 0;
504	504	}
505	505	return 0;
r17788	r17789
1370	1370
1371	1371	dump_chain(space, drvstate->m_HPC3.nSCSI0Descriptor);
1372	1372
1373		printf("PC is %08x\n", cpu_get_pc(machine.device("maincpu")));
	1373	printf("PC is %08x\n", machine.device("maincpu")->safe_pc());
1374	1374	printf("DMA to device: length %x xie %d eox %d\n", length, xie, eox);
1375	1375
1376	1376	if (length <= 0x4000)

trunk/src/mess/drivers/a2600.c

r17788	r17789
655	655	{
656	656	a2600_state *state = machine.driver_data<a2600_state>();
657	657	//printf("ModeFV %04x\n",offset);
658		if (!state->m_FVlocked && ( cpu_get_pc(machine.device("maincpu")) & 0x1F00 ) == 0x1F00 )
	658	if (!state->m_FVlocked && ( machine.device("maincpu")->safe_pc() & 0x1F00 ) == 0x1F00 )
659	659	{
660	660	state->m_FVlocked = 1;
661	661	state->m_current_bank = state->m_current_bank ^ 0x01;
r17788	r17789
673	673	state->m_current_bank ^= 1;
674	674	break;
675	675	default:
676		printf("%04X: write to unknown mapper address %02X\n", cpu_get_pc(machine.device("maincpu")), 0xfa0 + offset );
	676	printf("%04X: write to unknown mapper address %02X\n", machine.device("maincpu")->safe_pc(), 0xfa0 + offset );
677	677	break;
678	678	}
679	679	state->m_bank_base[1] = CART + 0x1000 * state->m_current_bank;
r17788	r17789
805	805	{
806	806	UINT8 data = ( offset & 0x800 ) ? m_bank_base[2][offset & 0x7FF] : m_bank_base[1][offset];
807	807
808		//logerror("%04X: read from modeSS area offset = %04X\n", cpu_get_pc(machine().device("maincpu")), offset);
	808	//logerror("%04X: read from modeSS area offset = %04X\n", machine().device("maincpu")->safe_pc(), offset);
809	809	/* Check for control register "write" */
810	810	if ( offset == 0xFF8 )
811	811	{
812		//logerror("%04X: write to modeSS control register data = %02X\n", cpu_get_pc(machine().device("maincpu")), m_modeSS_byte);
	812	//logerror("%04X: write to modeSS control register data = %02X\n", machine().device("maincpu")->safe_pc(), m_modeSS_byte);
813	813	m_modeSS_write_enabled = m_modeSS_byte & 0x02;
814	814	m_modeSS_write_delay = m_modeSS_byte >> 5;
815	815	switch ( m_modeSS_byte & 0x1C )
r17788	r17789
862	862	{
863	863	/* Cassette port read */
864	864	double tap_val = machine().device<cassette_image_device>(CASSETTE_TAG)->input();
865		//logerror("%04X: Cassette port read, tap_val = %f\n", cpu_get_pc(machine().device("maincpu")), tap_val);
	865	//logerror("%04X: Cassette port read, tap_val = %f\n", machine().device("maincpu")->safe_pc(), tap_val);
866	866	if ( tap_val < 0 )
867	867	{
868	868	data = 0x00;
r17788	r17789
878	878	if ( m_modeSS_write_enabled )
879	879	{
880	880	int diff = machine().device<cpu_device>("maincpu")->total_cycles() - m_modeSS_byte_started;
881		//logerror("%04X: offset = %04X, %d\n", cpu_get_pc(machine().device("maincpu")), offset, diff);
	881	//logerror("%04X: offset = %04X, %d\n", machine().device("maincpu")->safe_pc(), offset, diff);
882	882	if ( diff - m_modeSS_diff_adjust == 5 )
883	883	{
884		//logerror("%04X: RAM write offset = %04X, data = %02X\n", cpu_get_pc(machine().device("maincpu")), offset, m_modeSS_byte );
	884	//logerror("%04X: RAM write offset = %04X, data = %02X\n", machine().device("maincpu")->safe_pc(), offset, m_modeSS_byte );
885	885	if ( offset & 0x800 )
886	886	{
887	887	if ( m_modeSS_high_ram_enabled )
r17788	r17789
919	919	}
920	920	/* Because the mame core caches opcode data and doesn't perform reads like normal */
921	921	/* we have to put in this little hack here to get Suicide Mission to work. */
922		if ( offset != 0xFF8 && ( cpu_get_pc(machine().device("maincpu")) & 0x1FFF ) == 0x1FF8 )
	922	if ( offset != 0xFF8 && ( machine().device("maincpu")->safe_pc() & 0x1FFF ) == 0x1FF8 )
923	923	{
924	924	modeSS_r( space, 0xFF8 );
925	925	}
r17788	r17789
984	984	UINT8   data_fetcher = offset & 0x07;
985	985	UINT8   data = 0xFF;
986	986
987		logerror("%04X: Read from DPC offset $%02X\n", cpu_get_pc(machine().device("maincpu")), offset);
	987	logerror("%04X: Read from DPC offset $%02X\n", machine().device("maincpu")->safe_pc(), offset);
988	988	if ( offset < 0x08 )
989	989	{
990	990	switch( offset & 0x06 )
r17788	r17789
1091	1091	m_dpc.movamt = data;
1092	1092	break;
1093	1093	case 0x28:         /* Not used */
1094		logerror("%04X: Write to unused DPC register $%02X, data $%02X\n", cpu_get_pc(machine().device("maincpu")), offset, data);
	1094	logerror("%04X: Write to unused DPC register $%02X, data $%02X\n", machine().device("maincpu")->safe_pc(), offset, data);
1095	1095	break;
1096	1096	case 0x30:         /* Random number generator reset */
1097	1097	m_dpc.shift_reg = 0;
1098	1098	break;
1099	1099	case 0x38:         /* Not used */
1100		logerror("%04X: Write to unused DPC register $%02X, data $%02X\n", cpu_get_pc(machine().device("maincpu")), offset, data);
	1100	logerror("%04X: Write to unused DPC register $%02X, data $%02X\n", machine().device("maincpu")->safe_pc(), offset, data);
1101	1101	break;
1102	1102	}
1103	1103	}
r17788	r17789
1498	1498	UINT16   last_address, prev_address;
1499	1499	UINT8   last_byte, prev_byte;
1500	1500
1501		last_address = cpu_get_pc(machine().device("maincpu")) - 1;
	1501	last_address = machine().device("maincpu")->safe_pc() - 1;
1502	1502	if ( ! ( last_address & 0x1080 ) )
1503	1503	{
1504	1504	return offset;

trunk/src/mess/drivers/rex6000.c

r17788	r17789
141	141	}
142	142	else
143	143	{
144		//logerror("%04x: unkonwn memory bank %x\n", cpu_get_pc(m_maincpu), bank);
	144	//logerror("%04x: unkonwn memory bank %x\n", m_maincpu->safe_pc(), bank);
145	145	return BANK_UNKNOWN;
146	146	}
147	147	}

trunk/src/mess/drivers/ex800.c

r17788	r17789
215	215
216	216	READ8_MEMBER(ex800_state::ex800_porta_r)
217	217	{
218		logerror("PA R @%x\n", cpu_get_pc(&space.device()));
	218	logerror("PA R @%x\n", space.device().safe_pc());
219	219	return machine().rand();
220	220	}
221	221
222	222	READ8_MEMBER(ex800_state::ex800_portb_r)
223	223	{
224		logerror("PB R @%x\n", cpu_get_pc(&space.device()));
	224	logerror("PB R @%x\n", space.device().safe_pc());
225	225	return machine().rand();
226	226	}
227	227
228	228	READ8_MEMBER(ex800_state::ex800_portc_r)
229	229	{
230		logerror("PC R @%x\n", cpu_get_pc(&space.device()));
	230	logerror("PC R @%x\n", space.device().safe_pc());
231	231	return machine().rand();
232	232	}
233	233
r17788	r17789
236	236	if (PA6) logerror("BNK0 selected.\n");
237	237	if (PA7) logerror("BNK1 selected.\n");
238	238
239		logerror("PA W %x @%x\n", data, cpu_get_pc(&space.device()));
	239	logerror("PA W %x @%x\n", data, space.device().safe_pc());
240	240	}
241	241
242	242	WRITE8_MEMBER(ex800_state::ex800_portb_w)
243	243	{
244	244	if (data & 3)
245		logerror("PB0/1 Line feed @%x\n", cpu_get_pc(&space.device()));
	245	logerror("PB0/1 Line feed @%x\n", space.device().safe_pc());
246	246	if (!(data & 4))
247		logerror("PB2 Line feed @%x\n", cpu_get_pc(&space.device()));
	247	logerror("PB2 Line feed @%x\n", space.device().safe_pc());
248	248	if (data & 8)
249		logerror("PB3 Online LED on @%x\n", cpu_get_pc(&space.device()));
	249	logerror("PB3 Online LED on @%x\n", space.device().safe_pc());
250	250	else
251		logerror("PB3 Online LED off @%x\n", cpu_get_pc(&space.device()));
	251	logerror("PB3 Online LED off @%x\n", space.device().safe_pc());
252	252	if (data & 16)
253		logerror("PB4 Serial @%x\n", cpu_get_pc(&space.device()));
	253	logerror("PB4 Serial @%x\n", space.device().safe_pc());
254	254	if (data & 32)
255		logerror("PB4 Serial @%x\n", cpu_get_pc(&space.device()));
	255	logerror("PB4 Serial @%x\n", space.device().safe_pc());
256	256	if (data & 64)
257		logerror("PB4 Serial @%x\n", cpu_get_pc(&space.device()));
	257	logerror("PB4 Serial @%x\n", space.device().safe_pc());
258	258	if (data & 128)
259		logerror("PB3 Paper empty LED on @%x\n", cpu_get_pc(&space.device()));
	259	logerror("PB3 Paper empty LED on @%x\n", space.device().safe_pc());
260	260	else
261		logerror("PB3 Paper empty LED off @%x\n", cpu_get_pc(&space.device()));
	261	logerror("PB3 Paper empty LED off @%x\n", space.device().safe_pc());
262	262
263		//  logerror("PB W %x @%x\n", data, cpu_get_pc(&space.device()));
	263	//  logerror("PB W %x @%x\n", data, space.device().safe_pc());
264	264	}
265	265
266	266	WRITE8_MEMBER(ex800_state::ex800_portc_w)
r17788	r17789
271	271	else
272	272	beep_set_state(speaker, 1);
273	273
274		logerror("PC W %x @%x\n", data, cpu_get_pc(&space.device()));
	274	logerror("PC W %x @%x\n", data, space.device().safe_pc());
275	275	}
276	276
277	277
r17788	r17789
279	279
280	280	READ8_MEMBER(ex800_state::ex800_devsel_r)
281	281	{
282		logerror("DEVSEL R @%x with offset %x\n", cpu_get_pc(&space.device()), offset);
	282	logerror("DEVSEL R @%x with offset %x\n", space.device().safe_pc(), offset);
283	283	return machine().rand();
284	284	}
285	285
286	286	WRITE8_MEMBER(ex800_state::ex800_devsel_w)
287	287	{
288		logerror("DEVSEL W %x @%x with offset %x\n", data, cpu_get_pc(&space.device()), offset);
	288	logerror("DEVSEL W %x @%x with offset %x\n", data, space.device().safe_pc(), offset);
289	289	}
290	290
291	291	READ8_MEMBER(ex800_state::ex800_gate5a_r)
292	292	{
293		logerror("GATE5A R @%x with offset %x\n", cpu_get_pc(&space.device()), offset);
	293	logerror("GATE5A R @%x with offset %x\n", space.device().safe_pc(), offset);
294	294	return machine().rand();
295	295	}
296	296
297	297	WRITE8_MEMBER(ex800_state::ex800_gate5a_w)
298	298	{
299		logerror("GATE5A W %x @%x with offset %x\n", data, cpu_get_pc(&space.device()), offset);
	299	logerror("GATE5A W %x @%x with offset %x\n", data, space.device().safe_pc(), offset);
300	300	}
301	301
302	302	READ8_MEMBER(ex800_state::ex800_iosel_r)
303	303	{
304		logerror("IOSEL R @%x with offset %x\n", cpu_get_pc(&space.device()), offset);
	304	logerror("IOSEL R @%x with offset %x\n", space.device().safe_pc(), offset);
305	305	return machine().rand();
306	306	}
307	307
308	308	WRITE8_MEMBER(ex800_state::ex800_iosel_w)
309	309	{
310		logerror("IOSEL W %x @%x with offset %x\n", data, cpu_get_pc(&space.device()), offset);
	310	logerror("IOSEL W %x @%x with offset %x\n", data, space.device().safe_pc(), offset);
311	311	}
312	312
313	313	READ8_MEMBER(ex800_state::ex800_gate7a_r)
314	314	{
315		logerror("GATE7A R @%x with offset %x\n", cpu_get_pc(&space.device()), offset);
	315	logerror("GATE7A R @%x with offset %x\n", space.device().safe_pc(), offset);
316	316	return machine().rand();
317	317	}
318	318
319	319	WRITE8_MEMBER(ex800_state::ex800_gate7a_w)
320	320	{
321		logerror("GATE7A W %x @%x with offset %x\n", data, cpu_get_pc(&space.device()), offset);
	321	logerror("GATE7A W %x @%x with offset %x\n", data, space.device().safe_pc(), offset);
322	322	}
323	323
324	324

trunk/src/mess/drivers/vboy.c

r17788	r17789
793	793	case 0x42:   //XPCTRL
794	794	return m_vip_regs.XPCTRL;
795	795	case 0x44:   //VER
796		printf("%08x read VER\n",cpu_get_pc(m_maincpu));
	796	printf("%08x read VER\n",m_maincpu->safe_pc());
797	797	return m_vip_regs.VER;
798	798	case 0x48:   //SPT0
799	799	return m_vip_regs.SPT[0];

trunk/src/mess/drivers/ssystem3.c

r17788	r17789
92	92	if (d) state->m_playfield.data|=1<<(state->m_playfield.bit^7);
93	93	state->m_playfield.bit++;
94	94	if (state->m_playfield.bit==8) {
95		logerror("%.4x playfield wrote %d %02x\n", (int)cpu_get_pc(machine.device("maincpu")), state->m_playfield.count, state->m_playfield.data);
	95	logerror("%.4x playfield wrote %d %02x\n", (int)machine.device("maincpu")->safe_pc(), state->m_playfield.count, state->m_playfield.data);
96	96	state->m_playfield.u.data[state->m_playfield.count]=state->m_playfield.data;
97	97	state->m_playfield.bit=0;
98	98	state->m_playfield.count=(state->m_playfield.count+1)%ARRAY_LENGTH(state->m_playfield.u.data);

trunk/src/mess/drivers/camplynx.c

r17788	r17789
121	121	if (data & 4)
122	122	membank("bank1")->set_entry(2);
123	123	else
124		logerror("%04X: Cannot understand bankswitch command %X\n",cpu_get_pc(m_maincpu), data);
	124	logerror("%04X: Cannot understand bankswitch command %X\n",m_maincpu->safe_pc(), data);
125	125	}
126	126
127	127	WRITE8_MEMBER( camplynx_state::lynx128k_bank_w )
r17788	r17789
157	157	membank("bank8")->set_base(base + 0x2e000);
158	158	}
159	159	else
160		logerror("%04X: Cannot understand bankswitch command %X\n",cpu_get_pc(m_maincpu), data);
	160	logerror("%04X: Cannot understand bankswitch command %X\n",m_maincpu->safe_pc(), data);
161	161
162	162	/* Set write banks */
163	163	bank = data & 0xd0;
r17788	r17789
186	186	membank("bank18")->set_base(base + 0x2e000);
187	187	}
188	188	else
189		logerror("%04X: Cannot understand bankswitch command %X\n",cpu_get_pc(m_maincpu), data);
	189	logerror("%04X: Cannot understand bankswitch command %X\n",m_maincpu->safe_pc(), data);
190	190	}
191	191
192	192	static ADDRESS_MAP_START( lynx48k_mem, AS_PROGRAM, 8, camplynx_state )

trunk/src/mess/drivers/ng_aes.c

r17788	r17789
333	333	//  case 0x33: break; // coui lockout
334	334
335	335	default:
336		logerror("PC: %x  Unmapped I/O control write.  Offset: %x  Data: %x\n", cpu_get_pc(&space.device()), offset, data);
	336	logerror("PC: %x  Unmapped I/O control write.  Offset: %x  Data: %x\n", space.device().safe_pc(), offset, data);
337	337	break;
338	338	}
339	339	}
r17788	r17789
513	513	/* boost the interleave to let the audio CPU read the command */
514	514	machine().scheduler().boost_interleave(attotime::zero, attotime::from_usec(50));
515	515
516		if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_command_w %04x - %04x\n", cpu_get_pc(&space.device()), data, mem_mask);
	516	if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_command_w %04x - %04x\n", space.device().safe_pc(), data, mem_mask);
517	517	}
518	518	}
519	519
r17788	r17789
522	522	{
523	523	UINT8 ret = soundlatch_byte_r(space, 0);
524	524
525		if (LOG_CPU_COMM) logerror(" AUD CPU PC   %04x: audio_command_r %02x\n", cpu_get_pc(&space.device()), ret);
	525	if (LOG_CPU_COMM) logerror(" AUD CPU PC   %04x: audio_command_r %02x\n", space.device().safe_pc(), ret);
526	526
527	527	/* this is a guess */
528	528	audio_cpu_clear_nmi_w(space, 0, 0);
r17788	r17789
534	534	WRITE8_MEMBER(ng_aes_state::audio_result_w)
535	535	{
536	536
537		if (LOG_CPU_COMM && (m_audio_result != data)) logerror(" AUD CPU PC   %04x: audio_result_w %02x\n", cpu_get_pc(&space.device()), data);
	537	if (LOG_CPU_COMM && (m_audio_result != data)) logerror(" AUD CPU PC   %04x: audio_result_w %02x\n", space.device().safe_pc(), data);
538	538
539	539	m_audio_result = data;
540	540	}
r17788	r17789
545	545	neogeo_state *state = field.machine().driver_data<neogeo_state>();
546	546	UINT32 ret = state->m_audio_result;
547	547
548		//  if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_result_r %02x\n", cpu_get_pc(field.machine().device("maincpu")), ret);
	548	//  if (LOG_CPU_COMM) logerror("MAIN CPU PC %06x: audio_result_r %02x\n", field.machine(->safe_pc().device("maincpu")), ret);
549	549
550	550	return ret;
551	551	}
r17788	r17789
588	588	UINT32 len = memregion("maincpu")->bytes();
589	589
590	590	if ((len <= 0x100000) && (data & 0x07))
591		logerror("PC %06x: warning: bankswitch to %02x but no banks available\n", cpu_get_pc(&space.device()), data);
	591	logerror("PC %06x: warning: bankswitch to %02x but no banks available\n", space.device().safe_pc(), data);
592	592	else
593	593	{
594	594	bank_address = ((data & 0x07) + 1) * 0x100000;
595	595
596	596	if (bank_address >= len)
597	597	{
598		logerror("PC %06x: warning: bankswitch to empty bank %02x\n", cpu_get_pc(&space.device()), data);
	598	logerror("PC %06x: warning: bankswitch to empty bank %02x\n", space.device().safe_pc(), data);
599	599	bank_address = 0x100000;
600	600	}
601	601
r17788	r17789
642	642	{
643	643	neogeo_state *state = space->machine().driver_data<neogeo_state>();
644	644
645		if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", cpu_get_pc(&space->device()), region, bank);
	645	if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: audio_cpu_bank_select: Region: %d   Bank: %02x\n", space->device().safe_pc(), region, bank);
646	646
647	647	state->m_audio_cpu_banks[region] = bank;
648	648
r17788	r17789
698	698
699	699	cputag_set_input_line(space->machine(), "audiocpu", INPUT_LINE_RESET, PULSE_LINE);
700	700
701		if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", cpu_get_pc(&space->device()), state->m_audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
	701	if (LOG_AUDIO_CPU_BANKING) logerror("Audio CPU PC %03x: selectign %s ROM\n", space->device().safe_pc(), state->m_audio_cpu_rom_source ? "CARTRIDGE" : "BIOS");
702	702	}
703	703	}
704	704
r17788	r17789
779	779	case 0x02: /* unknown - HC32 middle pin 1 */
780	780	case 0x03: /* unknown - uPD4990 pin ? */
781	781	case 0x04: /* unknown - HC32 middle pin 10 */
782		logerror("PC: %x  Unmapped system control write.  Offset: %x  Data: %x\n", cpu_get_pc(&space.device()), offset & 0x07, bit);
	782	logerror("PC: %x  Unmapped system control write.  Offset: %x  Data: %x\n", space.device().safe_pc(), offset & 0x07, bit);
783	783	break;
784	784	}
785	785
786		if (LOG_VIDEO_SYSTEM && ((offset & 0x07) != 0x06)) logerror("PC: %x  System control write.  Offset: %x  Data: %x\n", cpu_get_pc(&space.device()), offset & 0x07, bit);
	786	if (LOG_VIDEO_SYSTEM && ((offset & 0x07) != 0x06)) logerror("PC: %x  System control write.  Offset: %x  Data: %x\n", space.device().safe_pc(), offset & 0x07, bit);
787	787	}
788	788	}
789	789

trunk/src/mess/drivers/gp2x.c

r17788	r17789
250	250	break;
251	251
252	252	default:
253		logerror("NAND: read unk command %x (PC %x)\n", m_nand_cmd, cpu_get_pc(m_maincpu));
	253	logerror("NAND: read unk command %x (PC %x)\n", m_nand_cmd, m_maincpu->safe_pc());
254	254	break;
255	255	}
256	256	}
r17788	r17789
266	266	{
267	267	case 4:   // command
268	268	m_nand_cmd = data;
269		//          printf("NAND: command %x (PC %x0)\n", data, cpu_get_pc(m_maincpu));
	269	//          printf("NAND: command %x (PC %x0)\n", data, m_maincpu->safe_pc());
270	270	m_nand_stage = 0;
271	271	m_nand_subword_stage = 0;
272	272	break;

trunk/src/mess/drivers/pasopia7.c

r17788	r17789
615	615	return pasopia7_fdc_r(space, offset & 7);
616	616	else
617	617	{
618		logerror("(PC=%06x) Read i/o address %02x\n",cpu_get_pc(m_maincpu),io_port);
	618	logerror("(PC=%06x) Read i/o address %02x\n",m_maincpu->safe_pc(),io_port);
619	619	}
620	620
621	621	return 0xff;
r17788	r17789
672	672	pasopia7_fdc_w(space, offset & 7, data);
673	673	else
674	674	{
675		logerror("(PC=%06x) Write i/o address %02x = %02x\n",cpu_get_pc(m_maincpu),offset,data);
	675	logerror("(PC=%06x) Write i/o address %02x = %02x\n",m_maincpu->safe_pc(),offset,data);
676	676	}
677	677	}
678	678

trunk/src/mess/drivers/esq1.c

r17788	r17789
205	205	int bank = ((data >> 1) & 0x7);
206	206	esq1_state *state = device->machine().driver_data<esq1_state>();
207	207	//  printf("DP [%02x]: %d mlo %d mhi %d tape %d\n", data, data&1, (data>>4)&1, (data>>5)&1, (data>>6)&3);
208		//  printf("[%02x] bank %d => offset %x (PC=%x)\n", data, bank, bank * 0x1000, cpu_get_pc(device->machine().firstcpu));
	208	//  printf("[%02x] bank %d => offset %x (PC=%x)\n", data, bank, bank * 0x1000, device->machine().firstcpu->safe_pc());
209	209	state->membank("osbank")->set_base(state->memregion("osrom")->base() + (bank * 0x1000) );
210	210
211	211	state->m_seq_bank = (data & 0x8) ? 0x8000 : 0x0000;

trunk/src/mess/drivers/nc.c

r17788	r17789
1426	1426	}
1427	1427
1428	1428	/* bit 5 is used in disk interface */
1429		LOG_DEBUG(("bit 5: PC: %04x %02x\n", cpu_get_pc(machine().device("maincpu")), data & (1 << 5)));
	1429	LOG_DEBUG(("bit 5: PC: %04x %02x\n", machine().device("maincpu")->safe_pc(), data & (1 << 5)));
1430	1430	}
1431	1431
1432	1432
r17788	r17789
1445	1445	WRITE8_MEMBER(nc_state::nc200_memory_card_wait_state_w)
1446	1446	{
1447	1447	device_t *fdc = machine().device("upd765");
1448		LOG_DEBUG(("nc200 memory card wait state: PC: %04x %02x\n", cpu_get_pc(machine().device("maincpu")), data));
	1448	LOG_DEBUG(("nc200 memory card wait state: PC: %04x %02x\n", machine().device("maincpu")->safe_pc(), data));
1449	1449	#if 0
1450	1450	floppy_drive_set_motor_state(0, 1);
1451	1451	floppy_drive_set_ready_state(0, 1, 1);
r17788	r17789
1458	1458	/* bit 0 seems to be the same as nc100 */
1459	1459	WRITE8_MEMBER(nc_state::nc200_poweroff_control_w)
1460	1460	{
1461		LOG_DEBUG(("nc200 power off: PC: %04x %02x\n", cpu_get_pc(machine().device("maincpu")), data));
	1461	LOG_DEBUG(("nc200 power off: PC: %04x %02x\n", machine().device("maincpu")->safe_pc(), data));
1462	1462
1463	1463	nc200_video_set_backlight(machine(), ((data ^ (1 << 2)) >> 2) & 0x01);
1464	1464	}

trunk/src/mess/drivers/mac.c

r17788	r17789
182	182	{
183	183	if (offset == 2)
184	184	{
185		//        printf("Sonora: read monitor ID at PC=%x\n", cpu_get_pc(m_maincpu));
	185	//        printf("Sonora: read monitor ID at PC=%x\n", m_maincpu->safe_pc());
186	186	return (6 << 4);   // 640x480 RGB monitor
187	187	}
188	188
r17788	r17789
240	240	{
241	241	data &= ~0x38;
242	242	data |= (space.machine().root_device().ioport("MONTYPE")->read_safe(2)<<3);
243		//            printf("rbv_r montype: %02x (PC %x)\n", data, cpu_get_pc(space.cpu));
	243	//            printf("rbv_r montype: %02x (PC %x)\n", data, space.cpu->safe_pc());
244	244	}
245	245
246	246	// bit 7 of these registers always reads as 0 on RBV
r17788	r17789
256	256	switch (offset)
257	257	{
258	258	case 13:   // IFR
259		//              printf("Read IER = %02x (PC=%x) 2=%02x\n", m_rbv_ier, cpu_get_pc(m_maincpu), m_rbv_regs[2]);
	259	//              printf("Read IER = %02x (PC=%x) 2=%02x\n", m_rbv_ier, m_maincpu->safe_pc(), m_rbv_regs[2]);
260	260	data = m_rbv_ifr;
261	261	break;
262	262
263	263	case 14:   // IER
264		//              printf("Read IFR = %02x (PC=%x) 2=%02x\n", m_rbv_ifr, cpu_get_pc(m_maincpu), m_rbv_regs[2]);
	264	//              printf("Read IFR = %02x (PC=%x) 2=%02x\n", m_rbv_ifr, m_maincpu->safe_pc(), m_rbv_regs[2]);
265	265	data = m_rbv_ier;
266	266	break;
267	267
r17788	r17789
271	271	}
272	272	}
273	273
274		//  printf("rbv_r: %x = %02x (PC=%x)\n", offset, data, cpu_get_pc(m_maincpu));
	274	//  printf("rbv_r: %x = %02x (PC=%x)\n", offset, data, m_maincpu->safe_pc());
275	275
276	276	return data;
277	277	}
r17788	r17789
281	281	if (offset < 0x100)
282	282	{
283	283	//      if (offset == 0x10)
284		//      printf("rbv_w: %02x to offset %x (PC=%x)\n", data, offset, cpu_get_pc(m_maincpu));
	284	//      printf("rbv_w: %02x to offset %x (PC=%x)\n", data, offset, m_maincpu->safe_pc());
285	285	switch (offset)
286	286	{
287	287	case 0x00:
r17788	r17789
364	364	switch (offset)
365	365	{
366	366	case 13:   // IFR
367		//              printf("%02x to IFR (PC=%x)\n", data, cpu_get_pc(m_maincpu));
	367	//              printf("%02x to IFR (PC=%x)\n", data, m_maincpu->safe_pc());
368	368	if (data & 0x80)
369	369	{
370	370	data = 0x7f;
r17788	r17789
373	373	break;
374	374
375	375	case 14:   // IER
376		//              printf("%02x to IER (PC=%x)\n", data, cpu_get_pc(m_maincpu));
	376	//              printf("%02x to IER (PC=%x)\n", data, m_maincpu->safe_pc());
377	377	if (data & 0x80)   // 1 bits write 1s
378	378	{
379	379	m_rbv_ier |= data & 0x7f;
r17788	r17789
440	440
441	441	READ8_MEMBER(mac_state::scciop_r)
442	442	{
443		//  printf("scciop_r @ %x (PC=%x)\n", offset, cpu_get_pc(m_maincpu));
	443	//  printf("scciop_r @ %x (PC=%x)\n", offset, m_maincpu->safe_pc());
444	444	return 0;
445	445	}
446	446
447	447	WRITE8_MEMBER(mac_state::scciop_w)
448	448	{
449		//  printf("scciop_w %x @ %x (PC=%x)\n", data, offset, cpu_get_pc(m_maincpu));
	449	//  printf("scciop_w %x @ %x (PC=%x)\n", data, offset, m_maincpu->safe_pc());
450	450	}
451	451
452	452	READ8_MEMBER(mac_state::swimiop_r)
453	453	{
454		//  printf("swimiop_r @ %x (PC=%x)\n", offset, cpu_get_pc(m_maincpu));
	454	//  printf("swimiop_r @ %x (PC=%x)\n", offset, m_maincpu->safe_pc());
455	455	return 0;
456	456	}
457	457
458	458	WRITE8_MEMBER(mac_state::swimiop_w)
459	459	{
460		//  printf("swimiop_w %x @ %x (PC=%x)\n", data, offset, cpu_get_pc(m_maincpu));
	460	//  printf("swimiop_w %x @ %x (PC=%x)\n", data, offset, m_maincpu->safe_pc());
461	461	}
462	462
463	463	READ8_MEMBER(mac_state::pmac_diag_r)
r17788	r17789
478	478
479	479	WRITE8_MEMBER(mac_state::amic_dma_w)
480	480	{
481		//  printf("amic_dma_w: %02x at %x (PC=%x)\n", data, offset+0x1000, cpu_get_pc(m_maincpu));
	481	//  printf("amic_dma_w: %02x at %x (PC=%x)\n", data, offset+0x1000, m_maincpu->safe_pc());
482	482	}
483	483
484	484	// HMC has one register: a 35-bit shift register which is accessed one bit at a time (see pmac6100 code at 4030383c which makes this obvious)

trunk/src/mess/drivers/sgi_ip2.c

r17788	r17789
117	117	va_start( v, s_fmt );
118	118	vsprintf( buf, s_fmt, v );
119	119	va_end( v );
120		logerror("%08x: %s", cpu_get_pc(machine.device("maincpu")), buf);
	120	logerror("%08x: %s", machine.device("maincpu")->safe_pc(), buf);
121	121	}
122	122	}
123	123	#else

trunk/src/mess/drivers/cxhumax.c

r17788	r17789
150	150	UINT32 data = m_scratch_reg;
151	151	verboselog( machine(), 9, "(SCRATCH) %08X -> %08X\n", 0xE0400024 + (offset << 2), data);
152	152
153		if((cpu_get_pc(m_maincpu)==0xF0003BB8) || (cpu_get_pc(m_maincpu)==0x01003724) || (cpu_get_pc(m_maincpu)==0x00005d8c)) { // HDCI-2000
	153	if((m_maincpu->safe_pc()==0xF0003BB8) || (m_maincpu->safe_pc()==0x01003724) || (m_maincpu->safe_pc()==0x00005d8c)) { // HDCI-2000
154	154	//we're in disabled debug_printf
155	155	unsigned char* buf = (unsigned char *)alloca(200);
156	156	unsigned char temp;

trunk/src/mess/drivers/next.c

r17788	r17789
79	79	READ8_MEMBER( next_state::io_r )
80	80	{
81	81	if(!space.debugger_access())
82		printf("io_r %08x (%08x)\n",offset+0x02000000, cpu_get_pc(&space.device()));
	82	printf("io_r %08x (%08x)\n",offset+0x02000000, space.device().safe_pc());
83	83
84	84	if(offset == 0xc0)
85	85	return 0;
r17788	r17789
90	90	WRITE8_MEMBER( next_state::io_w )
91	91	{
92	92	if(!space.debugger_access())
93		printf("io_w %08x, %02x (%08x)\n",offset+0x02000000,data, cpu_get_pc(&space.device()));
	93	printf("io_w %08x, %02x (%08x)\n",offset+0x02000000,data, space.device().safe_pc());
94	94	}
95	95
96	96	/* map ROM at 0x01000000-0x0101ffff? */
97	97	READ32_MEMBER( next_state::rom_map_r )
98	98	{
99	99	if(0 && !space.debugger_access())
100		printf("%08x ROM MAP?\n",cpu_get_pc(&space.device()));
	100	printf("%08x ROM MAP?\n",space.device().safe_pc());
101	101	return 0x01000000;
102	102	}
103	103
104	104	READ32_MEMBER( next_state::scr2_r )
105	105	{
106	106	if(0 && !space.debugger_access())
107		printf("%08x\n",cpu_get_pc(&space.device()));
	107	printf("%08x\n",space.device().safe_pc());
108	108	/*
109	109	x--- ---- ---- ---- ---- ---- ---- ---- dsp reset
110	110	-x-- ---- ---- ---- ---- ---- ---- ---- dsp block end
r17788	r17789
141	141	WRITE32_MEMBER( next_state::scr2_w )
142	142	{
143	143	if(0 && !space.debugger_access())
144		printf("scr2_w %08x (%08x)\n", data, cpu_get_pc(&space.device()));
	144	printf("scr2_w %08x (%08x)\n", data, space.device().safe_pc());
145	145	COMBINE_DATA(&scr2);
146	146
147	147	rtc->ce_w(BIT(scr2, 8));
r17788	r17789
456	456	}
457	457
458	458	const char *name = dma_name(slot);
459		logerror("dma_regs_r %s:%d %08x (%08x)\n", name, reg, res, cpu_get_pc(&space.device()));
	459	logerror("dma_regs_r %s:%d %08x (%08x)\n", name, reg, res, space.device().safe_pc());
460	460
461	461	return res;
462	462	}
r17788	r17789
468	468
469	469	const char *name = dma_name(slot);
470	470
471		logerror("dma_regs_w %s:%d %08x (%08x)\n", name, reg, data, cpu_get_pc(&space.device()));
	471	logerror("dma_regs_w %s:%d %08x (%08x)\n", name, reg, data, space.device().safe_pc());
472	472	switch(reg) {
473	473	case 0:
474	474	dma_slots[slot].start = data;
r17788	r17789
493	493
494	494	const char *name = dma_name(slot);
495	495
496		if(cpu_get_pc(&space.device()) != 0x409bb4e)
497		logerror("dma_ctrl_r %s:%d %02x (%08x)\n", name, reg, dma_slots[slot].state, cpu_get_pc(&space.device()));
	496	if(space.device().safe_pc() != 0x409bb4e)
	497	logerror("dma_ctrl_r %s:%d %02x (%08x)\n", name, reg, dma_slots[slot].state, space.device().safe_pc());
498	498
499	499	return reg ? 0 : dma_slots[slot].state << 24;
500	500	}
r17788	r17789
504	504	int slot = offset >> 2;
505	505	int reg = offset & 3;
506	506	const char *name = dma_name(slot);
507		logerror("dma_ctrl_w %s:%d %08x @ %08x (%08x)\n", name, reg, data, mem_mask, cpu_get_pc(&space.device()));
	507	logerror("dma_ctrl_w %s:%d %08x @ %08x (%08x)\n", name, reg, data, mem_mask, space.device().safe_pc());
508	508	if(!reg) {
509	509	if(ACCESSING_BITS_16_23)
510	510	dma_do_ctrl_w(slot, data >> 16);
r17788	r17789
517	517	{
518	518	const char *name = dma_name(slot);
519	519	#if 0
520		fprintf(stderr, "dma_ctrl_w %s %02x (%08x)\n", name, data, cpu_get_pc(maincpu));
	520	fprintf(stderr, "dma_ctrl_w %s %02x (%08x)\n", name, data, maincpu->safe_pc());
521	521
522	522	fprintf(stderr, "  ->%s%s%s%s%s%s%s\n",
523	523	data & DMA_SETENABLE ? " enable" : "",
r17788	r17789
529	529	data & DMA_INITBUFTURBO ? " initbufturbo" : "");
530	530	#endif
531	531	if(data & DMA_SETENABLE)
532		logerror("dma enable %s %s %08x (%08x)\n", name, data & DMA_SETREAD ? "read" : "write", (dma_slots[slot].limit-dma_slots[slot].start) & 0x7fffffff, cpu_get_pc(maincpu));
	532	logerror("dma enable %s %s %08x (%08x)\n", name, data & DMA_SETREAD ? "read" : "write", (dma_slots[slot].limit-dma_slots[slot].start) & 0x7fffffff, maincpu->safe_pc());
533	533
534	534	dma_slot &ds = dma_slots[slot];
535	535	if(data & (DMA_RESET|DMA_INITBUF|DMA_INITBUFTURBO)) {
r17788	r17789
561	561	READ32_MEMBER( next_state::scsictrl_r )
562	562	{
563	563	UINT32 res = (scsictrl << 24) | (scsistat << 16);
564		logerror("scsictrl_read %08x @ %08x (%08x)\n", res, mem_mask, cpu_get_pc(&space.device()));
	564	logerror("scsictrl_read %08x @ %08x (%08x)\n", res, mem_mask, space.device().safe_pc());
565	565	return res;
566	566	}
567	567
r17788	r17789
581	581	scsictrl & 0x04 ? " flush" : "",
582	582	scsictrl & 0x02 ? " reset" : "",
583	583	scsictrl & 0x01 ? "wd3392" : "ncr5390",
584		cpu_get_pc(&space.device()));
	584	space.device().safe_pc());
585	585	}
586	586	if(ACCESSING_BITS_16_23) {
587	587	scsistat = data >> 16;
588		logerror("SCSIstat %02x (%08x)\n", data, cpu_get_pc(&space.device()));
	588	logerror("SCSIstat %02x (%08x)\n", data, space.device().safe_pc());
589	589	}
590	590	}
591	591
r17788	r17789
608	608
609	609	WRITE32_MEMBER( next_state::fdc_control_w )
610	610	{
611		logerror("FDC write %02x (%08x)\n", data >> 24, cpu_get_pc(&space.device()));
	611	logerror("FDC write %02x (%08x)\n", data >> 24, space.device().safe_pc());
612	612	}
613	613
614	614	READ32_MEMBER( next_state::fdc_control_r )
r17788	r17789
647	647
648	648	READ32_MEMBER( next_state::phy_r )
649	649	{
650		logerror("phy_r %d %08x (%08x)\n", offset, phy[offset], cpu_get_pc(&space.device()));
	650	logerror("phy_r %d %08x (%08x)\n", offset, phy[offset], space.device().safe_pc());
651	651	return phy[offset] | (0 << 24);
652	652	}
653	653
654	654	WRITE32_MEMBER( next_state::phy_w )
655	655	{
656	656	COMBINE_DATA(phy+offset);
657		logerror("phy_w %d %08x (%08x)\n", offset, phy[offset], cpu_get_pc(&space.device()));
	657	logerror("phy_w %d %08x (%08x)\n", offset, phy[offset], space.device().safe_pc());
658	658	}
659	659
660	660	void next_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)

trunk/src/mess/drivers/apollo.c

r17788	r17789
129	129	int s = t / osd_ticks_per_second();
130	130	int ms = (t % osd_ticks_per_second()) / 1000;
131	131
132		sprintf(statebuf, "%d.%03d %s pc=%08x", s, ms, cpu->tag(), cpu_get_previouspc(cpu));
	132	sprintf(statebuf, "%d.%03d %s pc=%08x", s, ms, cpu->tag(), cpu->safe_pcbase());
133	133	} else {
134	134	strcpy(statebuf, "(no context)");
135	135	}
r17788	r17789
551	551	WRITE32_MEMBER(apollo_state::apollo_rom_w)
552	552	{
553	553	offs_t address =  offset * 4;
554		offs_t pc = cpu_get_previouspc(&space.device());
	554	offs_t pc = space.device().safe_pcbase();
555	555
556	556	if (pc == 0x00002c1c && address == 0x00000004 && VERBOSE < 2) {
557	557	// don't log invalid code in 3500_boot_12191_7.bin

trunk/src/mess/drivers/dc.c

r17788	r17789
44	44
45	45	static READ64_HANDLER( dcus_idle_skip_r )
46	46	{
47		if (cpu_get_pc(&space->device())==0xc0ba52a)
	47	if (space->device().safe_pc()==0xc0ba52a)
48	48	device_spin_until_time(&space->device(), attotime::from_usec(2500));
49	49	//  device_spinuntil_int(&space->device());
50	50
r17788	r17789
53	53
54	54	static READ64_HANDLER( dcjp_idle_skip_r )
55	55	{
56		if (cpu_get_pc(&space->device())==0xc0bac62)
	56	if (space->device().safe_pc()==0xc0bac62)
57	57	device_spin_until_time(&space->device(), attotime::from_usec(2500));
58	58	//  device_spinuntil_int(&space->device());
59	59

trunk/src/mess/drivers/rvoice.c

r17788	r17789
132	132	READ8_MEMBER(rvoice_state::main_hd63701_internal_registers_r)
133	133	{
134	134	UINT8 data = 0;
135		logerror("main hd637B01Y0: %04x: read from 0x%02X: ", cpu_get_pc(&space.device()), offset);
	135	logerror("main hd637B01Y0: %04x: read from 0x%02X: ", space.device().safe_pc(), offset);
136	136	switch(offset)
137	137	{
138	138	case 0x00: // Port 1 DDR
r17788	r17789
214	214
215	215	WRITE8_MEMBER(rvoice_state::main_hd63701_internal_registers_w)
216	216	{
217		logerror("main hd637B01Y0: %04x: write to 0x%02X: ", cpu_get_pc(&space.device()), offset);
	217	logerror("main hd637B01Y0: %04x: write to 0x%02X: ", space.device().safe_pc(), offset);
218	218	switch(offset)
219	219	{
220	220	case 0x00: // Port 1 DDR

trunk/src/mess/drivers/pasogo.c

r17788	r17789
177	177	}
178	178
179	179	if (log)
180		logerror("%.5x vg230 %02x read %.2x\n",(int) cpu_get_pc(m_maincpu),vg230->index,data);
	180	logerror("%.5x vg230 %02x read %.2x\n",(int) m_maincpu->safe_pc(),vg230->index,data);
181	181	//    data=machine.root_device().memregion("maincpu")->base()[0x4000+offset];
182	182	}
183	183	else
r17788	r17789
221	221	}
222	222
223	223	if (log)
224		logerror("%.5x vg230 %02x write %.2x\n",(int)cpu_get_pc(m_maincpu),vg230->index,data);
	224	logerror("%.5x vg230 %02x write %.2x\n",(int)m_maincpu->safe_pc(),vg230->index,data);
225	225	}
226	226	else
227	227	vg230->index=data;
r17788	r17789
288	288	ems->mapper[ems->index].address=(ems->mapper[ems->index].data[0]<<14)|((ems->mapper[ems->index].data[1]&0xf)<<22);
289	289	ems->mapper[ems->index].on=ems->mapper[ems->index].data[1]&0x80;
290	290	ems->mapper[ems->index].type=(ems->mapper[ems->index].data[1]&0x70)>>4;
291		logerror("%.5x ems mapper %d(%05x)on:%d type:%d address:%07x\n",(int)cpu_get_pc(m_maincpu),ems->index, ems->data<<12,
	291	logerror("%.5x ems mapper %d(%05x)on:%d type:%d address:%07x\n",(int)m_maincpu->safe_pc(),ems->index, ems->data<<12,
292	292	ems->mapper[ems->index].on, ems->mapper[ems->index].type, ems->mapper[ems->index].address );
293	293
294	294	switch (ems->mapper[ems->index].type)

trunk/src/mess/drivers/x68k.c

r17788	r17789
1039	1039	logerror("FDC: Drive #%i: Drive selection set to %02x\n",data & 0x03,data);
1040	1040	break;
1041	1041	default:
1042		//      logerror("FDC: [%08x] Wrote %04x to invalid FDC port %04x\n",cpu_get_pc(&space->device()),data,offset);
	1042	//      logerror("FDC: [%08x] Wrote %04x to invalid FDC port %04x\n",space->device().safe_pc(),data,offset);
1043	1043	break;
1044	1044	}
1045	1045	}
r17788	r17789
1255	1255	state->m_sysport.sram_writeprotect = data;
1256	1256	break;
1257	1257	default:
1258		//      logerror("SYS: [%08x] Wrote %04x to invalid or unimplemented system port %04x\n",cpu_get_pc(&space->device()),data,offset);
	1258	//      logerror("SYS: [%08x] Wrote %04x to invalid or unimplemented system port %04x\n",space->device().safe_pc(),data,offset);
1259	1259	break;
1260	1260	}
1261	1261	}
r17788	r17789
1296	1296
1297	1297	// Initial settings indicate that IRQs are generated for FM (YM2151), Receive buffer error or full,
1298	1298	// MFP Timer C, and the power switch
1299		//  logerror("MFP: [%08x] Reading offset %i\n",cpu_get_pc(&space->device()),offset);
	1299	//  logerror("MFP: [%08x] Reading offset %i\n",space->device().safe_pc(),offset);
1300	1300	switch(offset)
1301	1301	{
1302	1302	#if 0
r17788	r17789
1310	1310	//          ret |= 0x08;  // FM IRQ signal
1311	1311	if(machine.primary_screen->hpos() > state->m_crtc.width - 32)
1312	1312	ret |= 0x80;  // Hsync signal
1313		//      logerror("MFP: [%08x] Reading offset %i (ret=%02x)\n",cpu_get_pc(&space->device()),offset,ret);
	1313	//      logerror("MFP: [%08x] Reading offset %i (ret=%02x)\n",space->device().safe_pc(),offset,ret);
1314	1314	return ret;  // bit 5 is always 1
1315	1315	case 3:
1316	1316	return state->m_mfp.iera;
r17788	r17789
1477	1477	// Keyboard control command.
1478	1478	state->m_mfp.usart.send_buffer = data;
1479	1479	x68k_keyboard_ctrl_w(state, data);
1480		//          logerror("MFP: [%08x] USART Sent data %04x\n",cpu_get_pc(&space->device()),data);
	1480	//          logerror("MFP: [%08x] USART Sent data %04x\n",space->device().safe_pc(),data);
1481	1481	}
1482	1482	break;
1483	1483	default:

trunk/src/mess/drivers/socrates.c

r17788	r17789
268	268
269	269	WRITE8_MEMBER(socrates_state::kbmcu_strobe) // strobe the keyboard MCU
270	270	{
271		//logerror("0x%04X: kbmcu written with %02X!\n", cpu_get_pc(m_maincpu), data); //if (cpu_get_pc(m_maincpu) != 0x31D)
	271	//logerror("0x%04X: kbmcu written with %02X!\n", m_maincpu->safe_pc(), data); //if (m_maincpu->safe_pc() != 0x31D)
272	272	// if two writes happen within one frame, reset the keyboard latches
273	273	m_kbmcu_rscount++;
274	274	if (m_kbmcu_rscount > 1)

trunk/src/mess/drivers/pc8801.c

r17788	r17789
1887	1887
1888	1888	READ8_MEMBER(pc8801_state::upd765_tc_r)
1889	1889	{
1890		//printf("%04x 1\n",cpu_get_pc(m_fdccpu));
	1890	//printf("%04x 1\n",m_fdccpu->safe_pc());
1891	1891
1892	1892	upd765_tc_w(machine().device("upd765"), 1);
1893	1893	//TODO: I'm not convinced that this works correctly with current hook-up ... 1000 usec is needed by Aploon, a bigger value breaks Alpha.

trunk/src/mess/drivers/gp32.c

r17788	r17789
314	314	}
315	315	break;
316	316	}
317		verboselog( machine(), 9, "(LCD) %08X -> %08X (PC %08X)\n", 0x14A00000 + (offset << 2), data, cpu_get_pc( &space.device()));
	317	verboselog( machine(), 9, "(LCD) %08X -> %08X (PC %08X)\n", 0x14A00000 + (offset << 2), data, space.device().safe_pc( ));
318	318	return data;
319	319	}
320	320
r17788	r17789
378	378	WRITE32_MEMBER(gp32_state::s3c240x_lcd_w)
379	379	{
380	380	UINT32 old_value = m_s3c240x_lcd_regs[offset];
381		verboselog( machine(), 9, "(LCD) %08X <- %08X (PC %08X)\n", 0x14A00000 + (offset << 2), data, cpu_get_pc( &space.device()));
	381	verboselog( machine(), 9, "(LCD) %08X <- %08X (PC %08X)\n", 0x14A00000 + (offset << 2), data, space.device().safe_pc( ));
382	382	COMBINE_DATA(&m_s3c240x_lcd_regs[offset]);
383	383	switch (offset)
384	384	{
r17788	r17789
400	400	READ32_MEMBER(gp32_state::s3c240x_lcd_palette_r)
401	401	{
402	402	UINT32 data = m_s3c240x_lcd_palette[offset];
403		verboselog( machine(), 9, "(LCD) %08X -> %08X (PC %08X)\n", 0x14A00400 + (offset << 2), data, cpu_get_pc( &space.device()));
	403	verboselog( machine(), 9, "(LCD) %08X -> %08X (PC %08X)\n", 0x14A00400 + (offset << 2), data, space.device().safe_pc( ));
404	404	return data;
405	405	}
406	406
407	407	WRITE32_MEMBER(gp32_state::s3c240x_lcd_palette_w)
408	408	{
409		verboselog( machine(), 9, "(LCD) %08X <- %08X (PC %08X)\n", 0x14A00400 + (offset << 2), data, cpu_get_pc( &space.device()));
	409	verboselog( machine(), 9, "(LCD) %08X <- %08X (PC %08X)\n", 0x14A00400 + (offset << 2), data, space.device().safe_pc( ));
410	410	COMBINE_DATA(&m_s3c240x_lcd_palette[offset]);
411	411	if (mem_mask != 0xffffffff)
412	412	{
r17788	r17789
455	455	READ32_MEMBER(gp32_state::s3c240x_clkpow_r)
456	456	{
457	457	UINT32 data = m_s3c240x_clkpow_regs[offset];
458		verboselog( machine(), 9, "(CLKPOW) %08X -> %08X (PC %08X)\n", 0x14800000 + (offset << 2), data, cpu_get_pc( &space.device()));
	458	verboselog( machine(), 9, "(CLKPOW) %08X -> %08X (PC %08X)\n", 0x14800000 + (offset << 2), data, space.device().safe_pc( ));
459	459	return data;
460	460	}
461	461
462	462	WRITE32_MEMBER(gp32_state::s3c240x_clkpow_w)
463	463	{
464		verboselog( machine(), 9, "(CLKPOW) %08X <- %08X (PC %08X)\n", 0x14800000 + (offset << 2), data, cpu_get_pc( &space.device()));
	464	verboselog( machine(), 9, "(CLKPOW) %08X <- %08X (PC %08X)\n", 0x14800000 + (offset << 2), data, space.device().safe_pc( ));
465	465	COMBINE_DATA(&m_s3c240x_clkpow_regs[offset]);
466	466	switch (offset)
467	467	{
r17788	r17789
522	522	READ32_MEMBER(gp32_state::s3c240x_irq_r)
523	523	{
524	524	UINT32 data = m_s3c240x_irq_regs[offset];
525		verboselog( machine(), 9, "(IRQ) %08X -> %08X (PC %08X)\n", 0x14400000 + (offset << 2), data, cpu_get_pc( &space.device()));
	525	verboselog( machine(), 9, "(IRQ) %08X -> %08X (PC %08X)\n", 0x14400000 + (offset << 2), data, space.device().safe_pc( ));
526	526	return data;
527	527	}
528	528
529	529	WRITE32_MEMBER(gp32_state::s3c240x_irq_w)
530	530	{
531	531	UINT32 old_value = m_s3c240x_irq_regs[offset];
532		verboselog( machine(), 9, "(IRQ) %08X <- %08X (PC %08X)\n", 0x14400000 + (offset << 2), data, cpu_get_pc( &space.device()));
	532	verboselog( machine(), 9, "(IRQ) %08X <- %08X (PC %08X)\n", 0x14400000 + (offset << 2), data, space.device().safe_pc( ));
533	533	COMBINE_DATA(&m_s3c240x_irq_regs[offset]);
534	534	switch (offset)
535	535	{
r17788	r17789
579	579	READ32_MEMBER(gp32_state::s3c240x_pwm_r)
580	580	{
581	581	UINT32 data = m_s3c240x_pwm_regs[offset];
582		verboselog( machine(), 9, "(PWM) %08X -> %08X (PC %08X)\n", 0x15100000 + (offset << 2), data, cpu_get_pc( &space.device()));
	582	verboselog( machine(), 9, "(PWM) %08X -> %08X (PC %08X)\n", 0x15100000 + (offset << 2), data, space.device().safe_pc( ));
583	583	return data;
584	584	}
585	585
r17788	r17789
644	644	WRITE32_MEMBER(gp32_state::s3c240x_pwm_w)
645	645	{
646	646	UINT32 old_value = m_s3c240x_pwm_regs[offset];
647		verboselog( machine(), 9, "(PWM) %08X <- %08X (PC %08X)\n", 0x15100000 + (offset << 2), data, cpu_get_pc( &space.device()));
	647	verboselog( machine(), 9, "(PWM) %08X <- %08X (PC %08X)\n", 0x15100000 + (offset << 2), data, space.device().safe_pc( ));
648	648	COMBINE_DATA(&m_s3c240x_pwm_regs[offset]);
649	649	switch (offset)
650	650	{
r17788	r17789
839	839	READ32_MEMBER(gp32_state::s3c240x_dma_r)
840	840	{
841	841	UINT32 data = m_s3c240x_dma_regs[offset];
842		verboselog( machine(), 9, "(DMA) %08X -> %08X (PC %08X)\n", 0x14600000 + (offset << 2), data, cpu_get_pc( &space.device()));
	842	verboselog( machine(), 9, "(DMA) %08X -> %08X (PC %08X)\n", 0x14600000 + (offset << 2), data, space.device().safe_pc( ));
843	843	return data;
844	844	}
845	845
846	846	WRITE32_MEMBER(gp32_state::s3c240x_dma_w)
847	847	{
848	848	UINT32 old_value = m_s3c240x_dma_regs[offset];
849		verboselog( machine(), 9, "(DMA) %08X <- %08X (PC %08X)\n", 0x14600000 + (offset << 2), data, cpu_get_pc( &space.device()));
	849	verboselog( machine(), 9, "(DMA) %08X <- %08X (PC %08X)\n", 0x14600000 + (offset << 2), data, space.device().safe_pc( ));
850	850	COMBINE_DATA(&m_s3c240x_dma_regs[offset]);
851	851	switch (offset)
852	852	{
r17788	r17789
1103	1103	}
1104	1104	break;
1105	1105	}
1106		verboselog( machine(), 9, "(GPIO) %08X -> %08X (PC %08X)\n", 0x15600000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1106	verboselog( machine(), 9, "(GPIO) %08X -> %08X (PC %08X)\n", 0x15600000 + (offset << 2), data, space.device().safe_pc( ));
1107	1107	return data;
1108	1108	}
1109	1109
1110	1110	WRITE32_MEMBER(gp32_state::s3c240x_gpio_w)
1111	1111	{
1112	1112	COMBINE_DATA(&m_s3c240x_gpio[offset]);
1113		verboselog( machine(), 9, "(GPIO) %08X <- %08X (PC %08X)\n", 0x15600000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1113	verboselog( machine(), 9, "(GPIO) %08X <- %08X (PC %08X)\n", 0x15600000 + (offset << 2), data, space.device().safe_pc( ));
1114	1114	switch (offset)
1115	1115	{
1116	1116	// PBCON
r17788	r17789
1170	1170	READ32_MEMBER(gp32_state::s3c240x_memcon_r)
1171	1171	{
1172	1172	UINT32 data = m_s3c240x_memcon_regs[offset];
1173		verboselog( machine(), 9, "(MEMCON) %08X -> %08X (PC %08X)\n", 0x14000000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1173	verboselog( machine(), 9, "(MEMCON) %08X -> %08X (PC %08X)\n", 0x14000000 + (offset << 2), data, space.device().safe_pc( ));
1174	1174	return data;
1175	1175	}
1176	1176
1177	1177	WRITE32_MEMBER(gp32_state::s3c240x_memcon_w)
1178	1178	{
1179		verboselog( machine(), 9, "(MEMCON) %08X <- %08X (PC %08X)\n", 0x14000000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1179	verboselog( machine(), 9, "(MEMCON) %08X <- %08X (PC %08X)\n", 0x14000000 + (offset << 2), data, space.device().safe_pc( ));
1180	1180	COMBINE_DATA(&m_s3c240x_memcon_regs[offset]);
1181	1181	}
1182	1182
r17788	r17789
1186	1186	READ32_MEMBER(gp32_state::s3c240x_usb_host_r)
1187	1187	{
1188	1188	UINT32 data = m_s3c240x_usb_host_regs[offset];
1189		verboselog( machine(), 9, "(USB H) %08X -> %08X (PC %08X)\n", 0x14200000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1189	verboselog( machine(), 9, "(USB H) %08X -> %08X (PC %08X)\n", 0x14200000 + (offset << 2), data, space.device().safe_pc( ));
1190	1190	return data;
1191	1191	}
1192	1192
1193	1193	WRITE32_MEMBER(gp32_state::s3c240x_usb_host_w)
1194	1194	{
1195		verboselog( machine(), 9, "(USB H) %08X <- %08X (PC %08X)\n", 0x14200000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1195	verboselog( machine(), 9, "(USB H) %08X <- %08X (PC %08X)\n", 0x14200000 + (offset << 2), data, space.device().safe_pc( ));
1196	1196	COMBINE_DATA(&m_s3c240x_usb_host_regs[offset]);
1197	1197	}
1198	1198
r17788	r17789
1211	1211	}
1212	1212	break;
1213	1213	}
1214		verboselog( machine(), 9, "(UART 0) %08X -> %08X (PC %08X)\n", 0x15000000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1214	verboselog( machine(), 9, "(UART 0) %08X -> %08X (PC %08X)\n", 0x15000000 + (offset << 2), data, space.device().safe_pc( ));
1215	1215	return data;
1216	1216	}
1217	1217
1218	1218	WRITE32_MEMBER(gp32_state::s3c240x_uart_0_w)
1219	1219	{
1220		verboselog( machine(), 9, "(UART 0) %08X <- %08X (PC %08X)\n", 0x15000000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1220	verboselog( machine(), 9, "(UART 0) %08X <- %08X (PC %08X)\n", 0x15000000 + (offset << 2), data, space.device().safe_pc( ));
1221	1221	COMBINE_DATA(&m_s3c240x_uart_0_regs[offset]);
1222	1222	}
1223	1223
r17788	r17789
1236	1236	}
1237	1237	break;
1238	1238	}
1239		verboselog( machine(), 9, "(UART 1) %08X -> %08X (PC %08X)\n", 0x15004000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1239	verboselog( machine(), 9, "(UART 1) %08X -> %08X (PC %08X)\n", 0x15004000 + (offset << 2), data, space.device().safe_pc( ));
1240	1240	return data;
1241	1241	}
1242	1242
1243	1243	WRITE32_MEMBER(gp32_state::s3c240x_uart_1_w)
1244	1244	{
1245		verboselog( machine(), 9, "(UART 1) %08X <- %08X (PC %08X)\n", 0x15004000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1245	verboselog( machine(), 9, "(UART 1) %08X <- %08X (PC %08X)\n", 0x15004000 + (offset << 2), data, space.device().safe_pc( ));
1246	1246	COMBINE_DATA(&m_s3c240x_uart_1_regs[offset]);
1247	1247	}
1248	1248
r17788	r17789
1252	1252	READ32_MEMBER(gp32_state::s3c240x_usb_device_r)
1253	1253	{
1254	1254	UINT32 data = m_s3c240x_usb_device_regs[offset];
1255		verboselog( machine(), 9, "(USB D) %08X -> %08X (PC %08X)\n", 0x15200140 + (offset << 2), data, cpu_get_pc( &space.device()));
	1255	verboselog( machine(), 9, "(USB D) %08X -> %08X (PC %08X)\n", 0x15200140 + (offset << 2), data, space.device().safe_pc( ));
1256	1256	return data;
1257	1257	}
1258	1258
1259	1259	WRITE32_MEMBER(gp32_state::s3c240x_usb_device_w)
1260	1260	{
1261		verboselog( machine(), 9, "(USB D) %08X <- %08X (PC %08X)\n", 0x15200140 + (offset << 2), data, cpu_get_pc( &space.device()));
	1261	verboselog( machine(), 9, "(USB D) %08X <- %08X (PC %08X)\n", 0x15200140 + (offset << 2), data, space.device().safe_pc( ));
1262	1262	COMBINE_DATA(&m_s3c240x_usb_device_regs[offset]);
1263	1263	}
1264	1264
r17788	r17789
1268	1268	READ32_MEMBER(gp32_state::s3c240x_watchdog_r)
1269	1269	{
1270	1270	UINT32 data = m_s3c240x_watchdog_regs[offset];
1271		verboselog( machine(), 9, "(WDOG) %08X -> %08X (PC %08X)\n", 0x15300000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1271	verboselog( machine(), 9, "(WDOG) %08X -> %08X (PC %08X)\n", 0x15300000 + (offset << 2), data, space.device().safe_pc( ));
1272	1272	return data;
1273	1273	}
1274	1274
1275	1275	WRITE32_MEMBER(gp32_state::s3c240x_watchdog_w)
1276	1276	{
1277		verboselog( machine(), 9, "(WDOG) %08X <- %08X (PC %08X)\n", 0x15300000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1277	verboselog( machine(), 9, "(WDOG) %08X <- %08X (PC %08X)\n", 0x15300000 + (offset << 2), data, space.device().safe_pc( ));
1278	1278	COMBINE_DATA(&m_s3c240x_watchdog_regs[offset]);
1279	1279	}
1280	1280
r17788	r17789
1388	1388	}
1389	1389	break;
1390	1390	}
1391		verboselog( machine(), 9, "(IIC) %08X -> %08X (PC %08X)\n", 0x15400000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1391	verboselog( machine(), 9, "(IIC) %08X -> %08X (PC %08X)\n", 0x15400000 + (offset << 2), data, space.device().safe_pc( ));
1392	1392	return data;
1393	1393	}
1394	1394
1395	1395	WRITE32_MEMBER(gp32_state::s3c240x_iic_w)
1396	1396	{
1397		verboselog( machine(), 9, "(IIC) %08X <- %08X (PC %08X)\n", 0x15400000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1397	verboselog( machine(), 9, "(IIC) %08X <- %08X (PC %08X)\n", 0x15400000 + (offset << 2), data, space.device().safe_pc( ));
1398	1398	COMBINE_DATA(&m_s3c240x_iic_regs[offset]);
1399	1399	switch (offset)
1400	1400	{
r17788	r17789
1542	1542	break;
1543	1543	}
1544	1544	#endif
1545		verboselog( machine(), 9, "(IIS) %08X -> %08X (PC %08X)\n", 0x15508000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1545	verboselog( machine(), 9, "(IIS) %08X -> %08X (PC %08X)\n", 0x15508000 + (offset << 2), data, space.device().safe_pc( ));
1546	1546	return data;
1547	1547	}
1548	1548
1549	1549	WRITE32_MEMBER(gp32_state::s3c240x_iis_w)
1550	1550	{
1551	1551	UINT32 old_value = m_s3c240x_iis_regs[offset];
1552		verboselog( machine(), 9, "(IIS) %08X <- %08X (PC %08X)\n", 0x15508000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1552	verboselog( machine(), 9, "(IIS) %08X <- %08X (PC %08X)\n", 0x15508000 + (offset << 2), data, space.device().safe_pc( ));
1553	1553	COMBINE_DATA(&m_s3c240x_iis_regs[offset]);
1554	1554	switch (offset)
1555	1555	{
r17788	r17789
1596	1596	READ32_MEMBER(gp32_state::s3c240x_rtc_r)
1597	1597	{
1598	1598	UINT32 data = m_s3c240x_rtc_regs[offset];
1599		verboselog( machine(), 9, "(RTC) %08X -> %08X (PC %08X)\n", 0x15700040 + (offset << 2), data, cpu_get_pc( &space.device()));
	1599	verboselog( machine(), 9, "(RTC) %08X -> %08X (PC %08X)\n", 0x15700040 + (offset << 2), data, space.device().safe_pc( ));
1600	1600	return data;
1601	1601	}
1602	1602
1603	1603	WRITE32_MEMBER(gp32_state::s3c240x_rtc_w)
1604	1604	{
1605		verboselog( machine(), 9, "(RTC) %08X <- %08X (PC %08X)\n", 0x15700040 + (offset << 2), data, cpu_get_pc( &space.device()));
	1605	verboselog( machine(), 9, "(RTC) %08X <- %08X (PC %08X)\n", 0x15700040 + (offset << 2), data, space.device().safe_pc( ));
1606	1606	COMBINE_DATA(&m_s3c240x_rtc_regs[offset]);
1607	1607	}
1608	1608
r17788	r17789
1612	1612	READ32_MEMBER(gp32_state::s3c240x_adc_r)
1613	1613	{
1614	1614	UINT32 data = m_s3c240x_adc_regs[offset];
1615		verboselog( machine(), 9, "(ADC) %08X -> %08X (PC %08X)\n", 0x15800000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1615	verboselog( machine(), 9, "(ADC) %08X -> %08X (PC %08X)\n", 0x15800000 + (offset << 2), data, space.device().safe_pc( ));
1616	1616	return data;
1617	1617	}
1618	1618
1619	1619	WRITE32_MEMBER(gp32_state::s3c240x_adc_w)
1620	1620	{
1621		verboselog( machine(), 9, "(ADC) %08X <- %08X (PC %08X)\n", 0x15800000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1621	verboselog( machine(), 9, "(ADC) %08X <- %08X (PC %08X)\n", 0x15800000 + (offset << 2), data, space.device().safe_pc( ));
1622	1622	COMBINE_DATA(&m_s3c240x_adc_regs[offset]);
1623	1623	}
1624	1624
r17788	r17789
1628	1628	READ32_MEMBER(gp32_state::s3c240x_spi_r)
1629	1629	{
1630	1630	UINT32 data = m_s3c240x_spi_regs[offset];
1631		verboselog( machine(), 9, "(SPI) %08X -> %08X (PC %08X)\n", 0x15900000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1631	verboselog( machine(), 9, "(SPI) %08X -> %08X (PC %08X)\n", 0x15900000 + (offset << 2), data, space.device().safe_pc( ));
1632	1632	return data;
1633	1633	}
1634	1634
1635	1635	WRITE32_MEMBER(gp32_state::s3c240x_spi_w)
1636	1636	{
1637		verboselog( machine(), 9, "(SPI) %08X <- %08X (PC %08X)\n", 0x15900000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1637	verboselog( machine(), 9, "(SPI) %08X <- %08X (PC %08X)\n", 0x15900000 + (offset << 2), data, space.device().safe_pc( ));
1638	1638	COMBINE_DATA(&m_s3c240x_spi_regs[offset]);
1639	1639	}
1640	1640
r17788	r17789
1644	1644	READ32_MEMBER(gp32_state::s3c240x_mmc_r)
1645	1645	{
1646	1646	UINT32 data = m_s3c240x_mmc_regs[offset];
1647		verboselog( machine(), 9, "(MMC) %08X -> %08X (PC %08X)\n", 0x15A00000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1647	verboselog( machine(), 9, "(MMC) %08X -> %08X (PC %08X)\n", 0x15A00000 + (offset << 2), data, space.device().safe_pc( ));
1648	1648	return data;
1649	1649	}
1650	1650
1651	1651	WRITE32_MEMBER(gp32_state::s3c240x_mmc_w)
1652	1652	{
1653		verboselog( machine(), 9, "(MMC) %08X <- %08X (PC %08X)\n", 0x15A00000 + (offset << 2), data, cpu_get_pc( &space.device()));
	1653	verboselog( machine(), 9, "(MMC) %08X <- %08X (PC %08X)\n", 0x15A00000 + (offset << 2), data, space.device().safe_pc( ));
1654	1654	COMBINE_DATA(&m_s3c240x_mmc_regs[offset]);
1655	1655	}
1656	1656

trunk/src/mess/drivers/supracan.c

r17788	r17789
212	212	va_start( v, s_fmt );
213	213	vsprintf( buf, s_fmt, v );
214	214	va_end( v );
215		logerror( "%06x: %s: %s", cpu_get_pc(machine.device(tag)), tag, buf );
	215	logerror( "%06x: %s: %s", machine.device(tag)->safe_pc(), tag, buf );
216	216	}
217	217	}
218	218

trunk/src/mess/drivers/craft.c

r17788	r17789
24	24	va_start( v, s_fmt );
25	25	vsprintf( buf, s_fmt, v );
26	26	va_end( v );
27		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	27	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
28	28	}
29	29	}
30	30	#else

trunk/src/mess/drivers/bebox.c

r17788	r17789
79	79	pci_bus_device *device = space->machine().device<pci_bus_device>("pcibus");
80	80
81	81	// 2e94 is the real address, 2e84 is where the PC appears to be under full DRC
82		if ((cpu_get_pc(&space->device()) == 0xfff02e94) || (cpu_get_pc(&space->device()) == 0xfff02e84))
	82	if ((space->device().safe_pc() == 0xfff02e94) || (space->device().safe_pc() == 0xfff02e84))
83	83	{
84	84	return 0x108000ff;   // indicate slave CPU
85	85	}

trunk/src/mess/drivers/vk100.c

r17788	r17789
561	561	{
562	562	UINT8 dipswitchLUT[8] = { 1,3,5,7,6,4,2,0 }; // the dipswitches map in a weird order to offsets
563	563	#ifdef SYSTAT_A_VERBOSE
564		if (cpu_get_pc(m_maincpu) != 0x31D) logerror("0x%04X: SYSTAT_A Read!\n", cpu_get_pc(m_maincpu));
	564	if (m_maincpu->safe_pc() != 0x31D) logerror("0x%04X: SYSTAT_A Read!\n", m_maincpu->safe_pc());
565	565	#endif
566	566	return ((m_vgGO?0:1)<<7)|(vram_read(machine())<<3)|(((ioport("SWITCHES")->read()>>dipswitchLUT[offset])&1)?0x4:0)|(m_vsync?0x2:0);
567	567	}
r17788	r17789
585	585	READ8_MEMBER(vk100_state::SYSTAT_B)
586	586	{
587	587	#ifdef SYSTAT_B_VERBOSE
588		logerror("0x%04X: SYSTAT_B Read!\n", cpu_get_pc(m_maincpu));
	588	logerror("0x%04X: SYSTAT_B Read!\n", m_maincpu->safe_pc());
589	589	#endif
590	590	return (m_ACTS<<7)|0x7F;
591	591	}

trunk/src/mess/drivers/esq5505.c

r17788	r17789
136	136
137	137	READ16_MEMBER(esq5505_state::es5510_dsp_r)
138	138	{
139		//  logerror("%06x: DSP read offset %04x (data is %04x)\n",cpu_get_pc(&space->device()),offset,es5510_dsp_ram[offset]);
	139	//  logerror("%06x: DSP read offset %04x (data is %04x)\n",space->device().safe_pc(),offset,es5510_dsp_ram[offset]);
140	140
141	141	switch(offset)
142	142	{
r17788	r17789
299	299	floppy->ss_w((data & 2)>>1);
300	300	}
301	301
302		//    printf("DUART output: %02x (PC=%x)\n", data, cpu_get_pc(state->m_maincpu));
	302	//    printf("DUART output: %02x (PC=%x)\n", data, state->m_maincpu->safe_pc());
303	303	}
304	304
305	305	static void duart_tx(device_t *device, int channel, UINT8 data)
r17788	r17789
308	308
309	309	if (channel == 1)
310	310	{
311		//        printf("ch %d: [%02x] (PC=%x)\n", channel, data, cpu_get_pc(state->m_maincpu));
	311	//        printf("ch %d: [%02x] (PC=%x)\n", channel, data, state->m_maincpu->safe_pc());
312	312	switch (state->m_system_type)
313	313	{
314	314	case GENERIC:

trunk/src/mess/drivers/scv.c

r17788	r17789
290	290
291	291	WRITE8_MEMBER( scv_state::scv_portc_w )
292	292	{
293		//logerror("%04x: scv_portc_w: data = 0x%02x\n", cpu_get_pc(machine().device("maincpu")), data );
	293	//logerror("%04x: scv_portc_w: data = 0x%02x\n", machine().device("maincpu")->safe_pc(), data );
294	294	m_portc = data;
295	295
296	296	scv_set_banks( machine() );

trunk/src/mess/drivers/ip20.c

r17788	r17789
74	74	va_start( v, s_fmt );
75	75	vsprintf( buf, s_fmt, v );
76	76	va_end( v );
77		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	77	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
78	78	}
79	79	}
80	80
r17788	r17789
443	443	// INT/INT2/INT3 interrupt controllers
444	444	READ32_MEMBER(ip20_state::int_r)
445	445	{
446		mame_printf_info("INT: read @ ofs %x (mask %x) (PC=%x)\n", offset, mem_mask, cpu_get_pc(&space.device()));
	446	mame_printf_info("INT: read @ ofs %x (mask %x) (PC=%x)\n", offset, mem_mask, space.device().safe_pc());
447	447	return 0;
448	448	}
449	449
450	450	WRITE32_MEMBER(ip20_state::int_w)
451	451	{
452		mame_printf_info("INT: write %x to ofs %x (mask %x) (PC=%x)\n", data, offset, mem_mask, cpu_get_pc(&space.device()));
	452	mame_printf_info("INT: write %x to ofs %x (mask %x) (PC=%x)\n", data, offset, mem_mask, space.device().safe_pc());
453	453	}
454	454
455	455	static ADDRESS_MAP_START( ip204415_map, AS_PROGRAM, 32, ip20_state )

trunk/src/mess/drivers/gba.c

r17788	r17789
35	35	va_start( v, s_fmt );
36	36	vsprintf( buf, s_fmt, v );
37	37	va_end( v );
38		logerror( "%08x: %s", cpu_get_pc(machine.device("maincpu")), buf );
	38	logerror( "%08x: %s", machine.device("maincpu")->safe_pc(), buf );
39	39	}
40	40	}
41	41
r17788	r17789
869	869	double time, ticks;
870	870	int timer = offset-(0x100/4);
871	871
872		//              printf("Read timer reg %x (PC=%x)\n", timer, cpu_get_pc(&space.device()));
	872	//              printf("Read timer reg %x (PC=%x)\n", timer, space.device().safe_pc());
873	873
874	874	// update times for
875	875	if (m_timer_regs[timer] & 0x800000)
r17788	r17789
1670	1670
1671	1671	m_timer_regs[offset] = (m_timer_regs[offset] & ~(mem_mask & 0xFFFF0000)) | (data & (mem_mask & 0xFFFF0000));
1672	1672
1673		//              printf("%x to timer %d (mask %x PC %x)\n", data, offset, ~mem_mask, cpu_get_pc(&space.device()));
	1673	//              printf("%x to timer %d (mask %x PC %x)\n", data, offset, ~mem_mask, space.device().safe_pc());
1674	1674
1675	1675	if (ACCESSING_BITS_0_15)
1676	1676	{
r17788	r17789
1829	1829	case 0x0200/4:
1830	1830	if( (mem_mask) & 0x0000ffff )
1831	1831	{
1832		//              printf("IE (%08x) = %04x raw %x (%08x) (scan %d PC %x)\n", 0x04000000 + ( offset << 2 ), data & mem_mask, data, ~mem_mask, machine.primary_screen->vpos(), cpu_get_pc(&space.device()));
	1832	//              printf("IE (%08x) = %04x raw %x (%08x) (scan %d PC %x)\n", 0x04000000 + ( offset << 2 ), data & mem_mask, data, ~mem_mask, machine.primary_screen->vpos(), space.device().safe_pc());
1833	1833	m_IE = ( m_IE & ~mem_mask ) | ( data & mem_mask );
1834	1834	#if 0
1835	1835	if (m_IE & m_IF)
r17788	r17789
2318	2318	//          printf("eeprom_r: @ %x, mask %08x (state %d) (PC=%x) = %08x\n", offset, ~mem_mask, m_eeprom_state, activecpu_get_pc(), out);
2319	2319	return out;
2320	2320	}
2321		//  printf("eeprom_r: @ %x, mask %08x (state %d) (PC=%x) = %d\n", offset, ~mem_mask, m_eeprom_state, cpu_get_pc(&space.device()), 0);
	2321	//  printf("eeprom_r: @ %x, mask %08x (state %d) (PC=%x) = %d\n", offset, ~mem_mask, m_eeprom_state, space.device().safe_pc(), 0);
2322	2322	return 0;
2323	2323	}
2324	2324
r17788	r17789
2330	2330	data >>= 16;
2331	2331	}
2332	2332
2333		//  printf("eeprom_w: %x @ %x (state %d) (PC=%x)\n", data, offset, m_eeprom_state, cpu_get_pc(&space.device()));
	2333	//  printf("eeprom_w: %x @ %x (state %d) (PC=%x)\n", data, offset, m_eeprom_state, space.device().safe_pc());
2334	2334
2335	2335	switch (m_eeprom_state)
2336	2336	{
r17788	r17789
2395	2395
2396	2396	if (m_eeprom_bits == 0)
2397	2397	{
2398		mame_printf_verbose("%08x: EEPROM: %02x to %x\n", cpu_get_pc(machine().device("maincpu")), m_eep_data, m_eeprom_addr );
	2398	mame_printf_verbose("%08x: EEPROM: %02x to %x\n", machine().device("maincpu")->safe_pc(), m_eep_data, m_eeprom_addr );
2399	2399	if (m_eeprom_addr >= sizeof( m_gba_eeprom))
2400	2400	{
2401	2401	fatalerror( "eeprom: invalid address (%x)\n", m_eeprom_addr);

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