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r17730 Saturday 8th September, 2012 at 19:10:58 UTC by Ville Linde
sharc: Minor optimizations
[src/emu/cpu/sharc]sharc.c sharcops.c

trunk/src/emu/cpu/sharc/sharc.c
r17729r17730
6666   UINT32 ext_count;
6767} DMA_REGS;
6868
69typedef struct
70{
71   UINT32 addr;
72   UINT32 code;
73   UINT32 loop_type;
74} LADDR;
75
6976typedef struct _SHARC_REGS SHARC_REGS;
7077struct _SHARC_REGS
7178{
r17729r17730
8491   UINT32 daddr;
8592   UINT32 pcstk;
8693   UINT32 pcstkp;
87   UINT32 laddr;
94   LADDR laddr;
8895   UINT32 curlcntr;
8996   UINT32 lcntr;
9097
r17729r17730
131138   void (*opcode_handler)(SHARC_REGS *cpustate);
132139   int icount;
133140   UINT64 opcode;
134   UINT64 fetch_opcode;
135   UINT64 decode_opcode;
136141
137142   UINT32 nfaddr;
138143
r17729r17730
197202   cpustate->daddr = newpc;
198203   cpustate->faddr = newpc+1;
199204   cpustate->nfaddr = newpc+2;
200
201   // next instruction to be executed
202   cpustate->decode_opcode = ROPCODE(cpustate->daddr);
203   // next instruction to be decoded
204   cpustate->fetch_opcode = ROPCODE(cpustate->faddr);
205205}
206206
207207INLINE void CHANGE_PC_DELAYED(SHARC_REGS *cpustate, UINT32 newpc)
r17729r17730
449449   device->save_item(NAME(cpustate->daddr));
450450   device->save_item(NAME(cpustate->pcstk));
451451   device->save_item(NAME(cpustate->pcstkp));
452   device->save_item(NAME(cpustate->laddr));
452   device->save_item(NAME(cpustate->laddr.addr));
453   device->save_item(NAME(cpustate->laddr.code));
454   device->save_item(NAME(cpustate->laddr.loop_type));
453455   device->save_item(NAME(cpustate->curlcntr));
454456   device->save_item(NAME(cpustate->lcntr));
455457
r17729r17730
510512   device->save_pointer(NAME(cpustate->internal_ram), 2 * 0x10000);
511513
512514   device->save_item(NAME(cpustate->opcode));
513   device->save_item(NAME(cpustate->fetch_opcode));
514   device->save_item(NAME(cpustate->decode_opcode));
515515
516516   device->save_item(NAME(cpustate->nfaddr));
517517
r17729r17730
600600
601601static void sharc_set_irq_line(SHARC_REGS *cpustate, int irqline, int state)
602602{
603   if (state)
603   if (state == ASSERT_LINE)
604604   {
605605      cpustate->irq_active |= 1 << (8-irqline);
606606   }
607   else
608   {
609      cpustate->irq_active &= ~(1 << (8-irqline));
610   }
607611}
608612
609613void sharc_set_flag_input(device_t *device, int flag_num, int state)
r17729r17730
696700      cpustate->idle = 0;
697701   }
698702
699   // fill the initial pipeline
700
701   // next executed instruction
702   cpustate->opcode = ROPCODE(cpustate->daddr);
703   cpustate->opcode_handler = sharc_op[(cpustate->opcode >> 39) & 0x1ff];
704
705   // next decoded instruction
706   cpustate->fetch_opcode = ROPCODE(cpustate->faddr);
707
708703   while (cpustate->icount > 0 && !cpustate->idle)
709704   {
710705      cpustate->pc = cpustate->daddr;
r17729r17730
716711      cpustate->astat_old_old = cpustate->astat_old;
717712      cpustate->astat_old = cpustate->astat;
718713
719      cpustate->decode_opcode = cpustate->fetch_opcode;
714      cpustate->opcode = ROPCODE(cpustate->pc);
720715
721      // fetch next instruction
722      cpustate->fetch_opcode = ROPCODE(cpustate->faddr);
723
724716      debugger_instruction_hook(device, cpustate->pc);
725717
726718      // handle looping
727      if (cpustate->pc == (cpustate->laddr & 0xffffff))
719      if (cpustate->pc == cpustate->laddr.addr)
728720      {
729         switch (cpustate->laddr >> 30)
721         switch (cpustate->laddr.loop_type)
730722         {
731723            case 0:      // arithmetic condition-based
732724            {
733               int condition = (cpustate->laddr >> 24) & 0x1f;
725               int condition = cpustate->laddr.code;
734726
735727               {
736728                  UINT32 looptop = TOP_PC(cpustate);
r17729r17730
779771            }
780772         }
781773      }
774     
775      sharc_op[(cpustate->opcode >> 39) & 0x1ff](cpustate);
782776
783      // execute current instruction
784      cpustate->opcode_handler(cpustate);
785777
786      // decode next instruction
787      cpustate->opcode = cpustate->decode_opcode;
788      cpustate->opcode_handler = sharc_op[(cpustate->opcode >> 39) & 0x1ff];
789778
790779
791
792
793780      // System register latency effect
794781      if (cpustate->systemreg_latency_cycles > 0)
795782      {
trunk/src/emu/cpu/sharc/sharcops.c
r17729r17730
11061106   return cpustate->pcstack[cpustate->pcstkp];
11071107}
11081108
1109INLINE void PUSH_LOOP(SHARC_REGS *cpustate, UINT32 pc, UINT32 count)
1109INLINE void PUSH_LOOP(SHARC_REGS *cpustate, UINT32 addr, UINT32 code, UINT32 type, UINT32 count)
11101110{
11111111   cpustate->lstkp++;
11121112   if(cpustate->lstkp >= 6)
r17729r17730
11241124   }
11251125
11261126   cpustate->lcstack[cpustate->lstkp] = count;
1127   cpustate->lastack[cpustate->lstkp] = pc;
1127   cpustate->lastack[cpustate->lstkp] = (type << 30) | (code << 24) | addr;
11281128   cpustate->curlcntr = count;
1129   cpustate->laddr = pc;
1129
1130   cpustate->laddr.addr = addr;
1131   cpustate->laddr.code = code;
1132   cpustate->laddr.loop_type = type;
11301133}
11311134
11321135INLINE void POP_LOOP(SHARC_REGS *cpustate)
r17729r17730
11481151   }
11491152
11501153   cpustate->curlcntr = cpustate->lcstack[cpustate->lstkp];
1151   cpustate->laddr = cpustate->lastack[cpustate->lstkp];
1154
1155   cpustate->laddr.addr = cpustate->lastack[cpustate->lstkp] & 0xffffff;
1156   cpustate->laddr.code = (cpustate->lastack[cpustate->lstkp] >> 24) & 0x1f;
1157   cpustate->laddr.loop_type = (cpustate->lastack[cpustate->lstkp] >> 30) & 0x3;
11521158}
11531159
11541160INLINE void PUSH_STATUS_STACK(SHARC_REGS *cpustate)
r17729r17730
23912397   if (cpustate->lcntr > 0)
23922398   {
23932399      PUSH_PC(cpustate, cpustate->pc+1);
2394      PUSH_LOOP(cpustate, address | (type << 30) | (cond << 24), cpustate->lcntr);
2400      PUSH_LOOP(cpustate, address, cond, type, cpustate->lcntr);
23952401   }
23962402}
23972403
r17729r17730
24252431   if (cpustate->lcntr > 0)
24262432   {
24272433      PUSH_PC(cpustate, cpustate->pc+1);
2428      PUSH_LOOP(cpustate, address | (type << 30) | (cond << 24), cpustate->lcntr);
2434      PUSH_LOOP(cpustate, address, cond, type, cpustate->lcntr);
24292435   }
24302436}
24312437
r17729r17730
24402446   UINT32 address = (cpustate->pc + offset);
24412447
24422448   PUSH_PC(cpustate, cpustate->pc+1);
2443   PUSH_LOOP(cpustate, address | (cond << 24), 0);
2449   PUSH_LOOP(cpustate, address, cond, 0, 0);
24442450}
24452451
24462452/*****************************************************************************/
r17729r17730
27372743   cpustate->faddr = cpustate->pc+1;
27382744   cpustate->nfaddr = cpustate->pc+2;
27392745
2740   cpustate->decode_opcode = ROPCODE(cpustate->daddr);
2741   cpustate->fetch_opcode = ROPCODE(cpustate->faddr);
2742
27432746   cpustate->idle = 1;
27442747}
27452748

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