trunk/src/mame/machine/snes.c
r17643 | r17644 | |
725 | 725 | if (data) //if a HDMA is enabled, data is inited at the next scanline |
726 | 726 | space->machine().scheduler().timer_set(space->machine().primary_screen->time_until_pos(snes_ppu.beam.current_vert + 1), FUNC(snes_reset_hdma)); |
727 | 727 | break; |
728 | | case MEMSEL: /* Access cycle designation in memory (2) area */ |
729 | | cpu_set_reg(state->m_maincpu, _5A22_FASTROM, data & 1); |
730 | | break; |
731 | 728 | case TIMEUP: // IRQ Flag is cleared on both read and write |
732 | 729 | device_set_input_line(state->m_maincpu, G65816_LINE_IRQ, CLEAR_LINE ); |
733 | 730 | snes_ram[TIMEUP] = 0; |
trunk/src/emu/cpu/g65816/g65816.c
r17643 | r17644 | |
627 | 627 | cpustate->rdmpy = remainder; |
628 | 628 | } |
629 | 629 | |
| 630 | static WRITE8_HANDLER( memsel_w ) |
| 631 | { |
| 632 | g65816i_cpu_struct *cpustate = get_safe_token(&space->device()); |
| 633 | cpustate->fastROM = data & 1; |
| 634 | } |
| 635 | |
630 | 636 | static READ8_HANDLER( rddivl_r ) |
631 | 637 | { |
632 | 638 | g65816i_cpu_struct *cpustate = get_safe_token(&space->device()); |
r17643 | r17644 | |
659 | 665 | AM_RANGE(0x4205, 0x4205) AM_MIRROR(0x3f0000) AM_WRITE_LEGACY(wrdivh_w) |
660 | 666 | AM_RANGE(0x4206, 0x4206) AM_MIRROR(0x3f0000) AM_WRITE_LEGACY(wrdvdd_w) |
661 | 667 | |
| 668 | AM_RANGE(0x420d, 0x420d) AM_MIRROR(0x3f0000) AM_WRITE_LEGACY(memsel_w) |
| 669 | |
662 | 670 | AM_RANGE(0x4214, 0x4214) AM_MIRROR(0x3f0000) AM_READ_LEGACY(rddivl_r) |
663 | 671 | AM_RANGE(0x4215, 0x4215) AM_MIRROR(0x3f0000) AM_READ_LEGACY(rddivh_r) |
664 | 672 | AM_RANGE(0x4216, 0x4216) AM_MIRROR(0x3f0000) AM_READ_LEGACY(rdmpyl_r) |