MAME SVN History

199869 Revisions

r17581 Thursday 30th August, 2012 at 14:27:14 UTC by Miodrag Milanović
Removed legacy inline_config support and updated devices using it (no whatsnew)

[src/emu]	devlegcy.c devlegcy.h
[src/emu/machine]	68681.c 74148.c 74148.h 74153.c 74153.h idectrl.c idectrl.h latch8.c latch8.h smc91c9x.c smc91c9x.h
[src/emu/video]	tlc34076.c tlc34076.h voodoo.c voodoo.h
[src/mame/audio]	namco54.c namco54.h
[src/mame/drivers]	artmagic.c atlantis.c btoads.c calchase.c carpolo.c chihiro.c cobra.c coolpool.c djmain.c funkball.c galaga.c gamecstl.c gticlub.c hornet.c itech8.c jaguar.c kinst.c magictg.c mediagx.c midqslvr.c midvunit.c nwk-tr.c polepos.c qdrmfgp.c queen.c savquest.c seattle.c skeetsht.c taitogn.c taitotz.c taitowlf.c tickee.c twinkle.c vcombat.c vegas.c vertigo.c viper.c voyager.c xtheball.c xtom3d.c zn.c
[src/mame/machine]	decocass.c namco06.c namco06.h
[src/mess/drivers]	aim65.c bebox.c cybiko.c sitcom.c
[src/mess/machine]	a2cffa.c c64_ide64.c isa_ide.c kc_d004.c omti8621.c sst39vfx.c sst39vfx.h
[src/mess/machine/ti99]	tn_ide.c
[src/mess/video]	dl1416.c dl1416.h

trunk/src/mame/audio/namco54.c
r17580	r17581
164	164
165	165	static DEVICE_START( namco_54xx )
166	166	{
167		namco_54xx_config config = (namco_54xx_config )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	167	namco_54xx_config config = (namco_54xx_config )device->static_config();
168	168	namco_54xx_state *state = get_safe_token(device);
169	169	astring tempstring;
170	170
r17580	r17581
191	191
192	192	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_54xx_state); break;
193	193
194		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(namco_54xx_config); break;
195
196	194	case DEVINFO_PTR_ROM_REGION: info->romregion = ROM_NAME(namco_54xx); break;
197	195
198	196	case DEVINFO_PTR_MACHINE_CONFIG: info->machine_config = MACHINE_CONFIG_NAME(namco_54xx); break;

trunk/src/mame/audio/namco54.h
r17580	r17581
13	13	};
14	14
15	15
16		#define MCFG_NAMCO_54XX_ADD(_tag, _clock, _~~dis~~c~~rete, _~~fi~~rstnode~~) \
	16	#define MCFG_NAMCO_54XX_ADD(_tag, _clock, _config) \
17	17	MCFG_DEVICE_ADD(_tag, NAMCO_54XX, _clock) \
18		MCFG_DEVICE_CONFIG_DATAPTR(namco_54xx_config, discrete, _discrete) \
19		MCFG_DEVICE_CONFIG_DATA32(namco_54xx_config, firstnode, _firstnode)
	18	MCFG_DEVICE_CONFIG(_config)
20	19
21	20
22	21	WRITE8_DEVICE_HANDLER( namco_54xx_write );

trunk/src/mame/machine/namco06.c
r17580	r17581
220	220
221	221	static DEVICE_START( namco_06xx )
222	222	{
223		const namco_06xx_config config = (const namco_06xx_config )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	223	const namco_06xx_config config = (const namco_06xx_config )device->static_config();
224	224	namco_06xx_state *state = get_safe_token(device);
225	225	int devnum;
226	226
r17580	r17581
299	299
300	300	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(namco_06xx_state); break;
301	301
302		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(namco_06xx_config); break;
303
304	302	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(namco_06xx); break;
305	303
306	304	case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(namco_06xx); break;

trunk/src/mame/machine/namco06.h
r17580	r17581
15	15	};
16	16
17	17
18		#define MCFG_NAMCO_06XX_ADD(_tag, _clock, _nmi~~cpu, _chip0, _chip1, _chip2, _chip3~~) \
	18	#define MCFG_NAMCO_06XX_ADD(_tag, _clock, _config) \
19	19	MCFG_DEVICE_ADD(_tag, NAMCO_06XX, _clock) \
20		MCFG_DEVICE_CONFIG_DATAPTR(namco_06xx_config, nmicpu, _nmicpu) \
21		MCFG_DEVICE_CONFIG_DATAPTR(namco_06xx_config, chip0, _chip0) \
22		MCFG_DEVICE_CONFIG_DATAPTR(namco_06xx_config, chip1, _chip1) \
23		MCFG_DEVICE_CONFIG_DATAPTR(namco_06xx_config, chip2, _chip2) \
24		MCFG_DEVICE_CONFIG_DATAPTR(namco_06xx_config, chip3, _chip3)
	20	MCFG_DEVICE_CONFIG(_config)
25	21
26	22
27	23	READ8_DEVICE_HANDLER( namco_06xx_data_r );

trunk/src/mame/machine/decocass.c
r17580	r17581
2228	2228	/* validate some basic stuff */
2229	2229	assert(device != NULL);
2230	2230	assert(device->static_config() == NULL);
2231		assert(downcast<const legacy_device_base *>(device)->inline_config() == NULL);
2232	2231
2233	2232	/* fetch the data pointer */
2234	2233	tape->timer = device->machine().scheduler().timer_alloc(FUNC(tape_clock_callback), (void *)device);

trunk/src/mame/drivers/skeetsht.c
r17580	r17581
265	265
266	266	MCFG_MACHINE_RESET(skeetsht)
267	267
268		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	268	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
269	269
270	270	MCFG_SCREEN_ADD("screen", RASTER)
271	271	MCFG_SCREEN_RAW_PARAMS(48000000 / 8, 1564, 0, 1004, 328, 0, 300) // FIXME

trunk/src/mame/drivers/hornet.c
r17580	r17581
975	975	"rscreen", 1
976	976	};
977	977
	978	static const voodoo_config hornet_voodoo_intf =
	979	{
	980	2, // fbmem;
	981	4,// tmumem0;
	982	0,// tmumem1;
	983	"screen",// screen;
	984	"dsp",// cputag;
	985	voodoo_vblank_0,// vblank;
	986	NULL,// stall;
	987	};
	988
978	989	static MACHINE_CONFIG_START( hornet, hornet_state )
979	990
980	991	/* basic machine hardware */
r17580	r17581
996	1007
997	1008	MCFG_EEPROM_93C46_ADD("eeprom")
998	1009
999		MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, 2, "screen")
1000		MCFG_3DFX_VOODOO_CPU("dsp")
1001		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
1002		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank_0)
	1010	MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, hornet_voodoo_intf)
1003	1011
1004	1012	MCFG_K033906_ADD("k033906_1", hornet_k033906_intf_0)
1005	1013
r17580	r17581
1048	1056	}
1049	1057	}
1050	1058
	1059	static const voodoo_config voodoo_l_intf =
	1060	{
	1061	2, // fbmem;
	1062	4,// tmumem0;
	1063	0,// tmumem1;
	1064	"lscreen",// screen;
	1065	"dsp",// cputag;
	1066	voodoo_vblank_0,// vblank;
	1067	NULL,// stall;
	1068	};
	1069
	1070	static const voodoo_config voodoo_r_intf =
	1071	{
	1072	2, // fbmem;
	1073	4,// tmumem0;
	1074	0,// tmumem1;
	1075	"rscreen",// screen;
	1076	"dsp2",// cputag;
	1077	voodoo_vblank_1,// vblank;
	1078	NULL,// stall;
	1079	};
	1080
1051	1081	static MACHINE_CONFIG_DERIVED( hornet_2board, hornet )
1052	1082
1053	1083	MCFG_CPU_ADD("dsp2", ADSP21062, 36000000)
r17580	r17581
1062	1092	MCFG_K037122_ADD("k037122_2", hornet_k037122_intf_r)
1063	1093
1064	1094	MCFG_DEVICE_REMOVE("voodoo0")
1065		MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, 2, "lscreen")
1066		MCFG_3DFX_VOODOO_CPU("dsp")
1067		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
1068		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank_0)
	1095	MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, voodoo_l_intf)
	1096	MCFG_3DFX_VOODOO_1_ADD("voodoo1", STD_VOODOO_1_CLOCK, voodoo_r_intf)
1069	1097
1070		MCFG_3DFX_VOODOO_1_ADD("voodoo1", STD_VOODOO_1_CLOCK, 2, "rscreen")
1071		MCFG_3DFX_VOODOO_CPU("dsp2")
1072		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
1073		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank_1)
1074
1075	1098	MCFG_K033906_ADD("k033906_2", hornet_k033906_intf_1)
1076	1099
1077	1100	/* video hardware */
r17580	r17581
1101	1124	static MACHINE_CONFIG_DERIVED( hornet_2board_v2, hornet_2board )
1102	1125
1103	1126	MCFG_DEVICE_REMOVE("voodoo0")
1104		MCFG_3DFX_VOODOO_2_ADD("voodoo0", STD_VOODOO_2_CLOCK, 2, "lscreen")
1105		MCFG_3DFX_VOODOO_CPU("dsp")
1106		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
1107		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank_0)
	1127	MCFG_3DFX_VOODOO_2_ADD("voodoo0", STD_VOODOO_2_CLOCK, voodoo_l_intf)
1108	1128
1109	1129	MCFG_DEVICE_REMOVE("voodoo1")
1110		MCFG_3DFX_VOODOO_2_ADD("voodoo1", STD_VOODOO_2_CLOCK, 2, "rscreen")
1111		MCFG_3DFX_VOODOO_CPU("dsp2")
1112		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
1113		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank_1)
	1130	MCFG_3DFX_VOODOO_2_ADD("voodoo1", STD_VOODOO_2_CLOCK, voodoo_r_intf)
1114	1131	MACHINE_CONFIG_END
1115	1132
1116	1133	static MACHINE_CONFIG_DERIVED( sscope2, hornet_2board_v2)

trunk/src/mame/drivers/mediagx.c
r17580	r17581
1151	1151	0
1152	1152	};
1153	1153
	1154	static const ide_config ide_intf =
	1155	{
	1156	ide_interrupt,
	1157	NULL,
	1158	0
	1159	};
	1160
1154	1161	static MACHINE_CONFIG_START( mediagx, mediagx_state )
1155	1162
1156	1163	/* basic machine hardware */
r17580	r17581
1174	1181
1175	1182	MCFG_PIC8259_ADD( "pic8259_slave", mediagx_pic8259_2_config )
1176	1183
1177		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	1184	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
1178	1185
1179	1186	MCFG_TIMER_ADD("sound_timer", sound_timer_callback)
1180	1187

trunk/src/mame/drivers/carpolo.c
r17580	r17581
223	223	GFXDECODE_ENTRY( "gfx3", 0, alphalayout, 122+216, 4 )
224	224	GFXDECODE_END
225	225
	226	static const ttl74148_config carpolo_ttl74148_intf =
	227	{
	228	carpolo_74148_3s_cb
	229	};
226	230
	231	static const ttl74153_config carpolo_ttl74153_intf =
	232	{
	233	NULL
	234	};
	235
227	236	/*************************************
228	237	*
229	238	* Machine driver
r17580	r17581
257	266	MCFG_7474_ADD("7474_1a_1", NULL, NULL, NULL)
258	267	MCFG_7474_ADD("7474_1a_2", NULL, NULL, NULL)
259	268
260		MCFG_74148_ADD("74148_3s", carpolo_74148_3s_cb)
261		MCFG_74153_ADD("74153_1k", NULL)
	269	MCFG_74148_ADD("74148_3s", carpolo_ttl74148_intf)
	270	MCFG_74153_ADD("74153_1k", carpolo_ttl74153_intf)
262	271
263	272	/* video hardware */
264	273	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mame/drivers/zn.c
r17580	r17581
1523	1523	devtag_reset(machine, "ide");
1524	1524	}
1525	1525
	1526	static const ide_config ide_intf =
	1527	{
	1528	atpsx_interrupt,
	1529	NULL,
	1530	0
	1531	};
	1532
1526	1533	static MACHINE_CONFIG_DERIVED( coh1000w, zn1_2mb_vram )
1527	1534	MCFG_MACHINE_RESET( coh1000w )
1528	1535
1529		MCFG_IDE_CONTROLLER_ADD("ide", ~~atpsx~~_int~~errupt~~, ide_devices, "hdd", NULL, true)
	1536	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
1530	1537	MCFG_PSX_DMA_CHANNEL_READ( "maincpu", 5, psx_dma_read_delegate( FUNC( atpsx_dma_read ), (zn_state *) owner ) )
1531	1538	MCFG_PSX_DMA_CHANNEL_WRITE( "maincpu", 5, psx_dma_write_delegate( FUNC( atpsx_dma_write ), (zn_state *) owner ) )
1532	1539	MACHINE_CONFIG_END
r17580	r17581
2197	2204	MCFG_MACHINE_RESET( coh1000a )
2198	2205	MACHINE_CONFIG_END
2199	2206
	2207	static const ide_config jdredd_ide_intf =
	2208	{
	2209	jdredd_ide_interrupt,
	2210	NULL,
	2211	0
	2212	};
	2213
2200	2214	static MACHINE_CONFIG_DERIVED( coh1000a_ide, zn1_2mb_vram )
2201	2215
2202	2216	MCFG_DEVICE_MODIFY( "gpu" )
r17580	r17581
2204	2218
2205	2219	MCFG_MACHINE_RESET( coh1000a )
2206	2220
2207		MCFG_IDE_CONTROLLER_ADD("ide", jdredd_ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	2221	MCFG_IDE_CONTROLLER_ADD("ide", jdredd_ide_intf, ide_devices, "hdd", NULL, true)
2208	2222	MACHINE_CONFIG_END
2209	2223
2210	2224	/*

trunk/src/mame/drivers/vertigo.c
r17580	r17581
98	98	INPUT_PORTS_END
99	99
100	100
101
	101	static const ttl74148_config vertigo_ttl74148_intf =
	102	{
	103	vertigo_update_irq
	104	};
102	105	/*************************************
103	106	*
104	107	* Machine driver
r17580	r17581
116	119
117	120	MCFG_PIT8254_ADD( "pit8254", vertigo_pit8254_config )
118	121
119		MCFG_74148_ADD( "74148", vertigo_~~upda~~te_irq )
	122	MCFG_74148_ADD( "74148", vertigo_ttl74148_intf )
120	123
121	124	/* motor controller */
122	125	/*

trunk/src/mame/drivers/xtheball.c
r17580	r17581
345	345	MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH)
346	346
347	347	/* video hardware */
348		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	348	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
349	349
350	350	MCFG_SCREEN_ADD("screen", RASTER)
351	351	MCFG_SCREEN_RAW_PARAMS(10000000, 640, 114, 626, 257, 24, 248)

trunk/src/mame/drivers/atlantis.c
r17580	r17581
140	140	16384 /* data cache size */
141	141	};
142	142
	143	static const ide_config ide_intf =
	144	{
	145	ide_interrupt,
	146	NULL,
	147	0
	148	};
143	149
144	150	static MACHINE_CONFIG_START( mwskins, atlantis_state )
145	151
r17580	r17581
151	157	MCFG_MACHINE_START(mwskins)
152	158	MCFG_MACHINE_RESET(mwskins)
153	159
154		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	160	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
155	161
156	162	/* video hardware */
157	163	MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)

trunk/src/mame/drivers/viper.c
r17580	r17581
1929	1929	//mpc8240_interrupt(device->machine, MPC8240_IRQ3);
1930	1930	}
1931	1931
1932		static void voodoo_vblank(~~const~~ device_t *device, int pa~~ram~~)
	1932	static void voodoo_vblank(device_t *device, int state)
1933	1933	{
1934	1934	mpc8240_interrupt(device->machine(), MPC8240_IRQ4);
1935	1935	}
r17580	r17581
1967	1967	ide_features[67*2+1] = 0x00;
1968	1968	}
1969	1969
	1970	static const ide_config ide_intf =
	1971	{
	1972	ide_interrupt,
	1973	NULL,
	1974	0
	1975	};
	1976
	1977	static const voodoo_config voodoo_intf =
	1978	{
	1979	8, // fbmem;
	1980	0,// tmumem0;
	1981	0,// tmumem1;
	1982	"screen",// screen;
	1983	"maincpu",// cputag;
	1984	voodoo_vblank,// vblank;
	1985	NULL,// stall;
	1986	};
	1987
1970	1988	static MACHINE_CONFIG_START( viper, viper_state )
1971	1989
1972	1990	/* basic machine hardware */
r17580	r17581
1982	2000	MCFG_PCI_BUS_LEGACY_DEVICE(0, "mpc8240", mpc8240_pci_r, mpc8240_pci_w)
1983	2001	MCFG_PCI_BUS_LEGACY_DEVICE(12, "voodoo", voodoo3_pci_r, voodoo3_pci_w)
1984	2002
1985		MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
1986		MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, 8, "screen")
1987		MCFG_3DFX_VOODOO_CPU("maincpu")
1988		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank)
	2003	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
	2004	MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, voodoo_intf)
1989	2005
1990	2006	/* video hardware */
1991	2007	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mame/drivers/kinst.c
r17580	r17581
662	662	16384 /* data cache size */
663	663	};
664	664
	665	static const ide_config ide_intf =
	666	{
	667	ide_interrupt,
	668	NULL,
	669	0
	670	};
665	671
666	672	static MACHINE_CONFIG_START( kinst, kinst_state )
667	673
r17580	r17581
674	680	MCFG_MACHINE_START(kinst)
675	681	MCFG_MACHINE_RESET(kinst)
676	682
677		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	683	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
678	684
679	685	/* video hardware */
680	686	MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)

trunk/src/mame/drivers/btoads.c
r17580	r17581
332	332	MCFG_NVRAM_ADD_1FILL("nvram")
333	333
334	334	/* video hardware */
335		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	335	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
336	336
337	337	MCFG_SCREEN_ADD("screen", RASTER)
338	338	MCFG_SCREEN_RAW_PARAMS(VIDEO_CLOCK/2, 640, 0, 512, 257, 0, 224)

trunk/src/mame/drivers/voyager.c
r17580	r17581
763	763	pic8259_ir1_w(drvstate->m_pic8259_1, state);
764	764	}
765	765
	766	static const ide_config ide_intf =
	767	{
	768	ide_interrupt,
	769	NULL,
	770	0
	771	};
	772
766	773	static MACHINE_CONFIG_START( voyager, voyager_state )
767	774	MCFG_CPU_ADD("maincpu", PENTIUM, 133000000) // actually AMD Duron CPU of unknown clock
768	775	MCFG_CPU_PROGRAM_MAP(voyager_map)
r17580	r17581
776	783	MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
777	784	MCFG_PIC8259_ADD( "pic8259_1", voyager_pic8259_1_config )
778	785	MCFG_PIC8259_ADD( "pic8259_2", voyager_pic8259_2_config )
779		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	786	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
780	787
781	788	MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
782	789	MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)

trunk/src/mame/drivers/chihiro.c
r17580	r17581
1822	1822	SLOT_INTERFACE("bb", IDE_BASEBOARD)
1823	1823	SLOT_INTERFACE_END
1824	1824
	1825	static const ide_config ide_intf =
	1826	{
	1827	ide_interrupt,
	1828	"maincpu",
	1829	AS_PROGRAM
	1830	};
	1831
1825	1832	static MACHINE_CONFIG_START( chihiro_base, chihiro_state )
1826	1833
1827	1834	/* basic machine hardware */
r17580	r17581
1843	1850	MCFG_PIC8259_ADD( "pic8259_1", chihiro_pic8259_1_config )
1844	1851	MCFG_PIC8259_ADD( "pic8259_2", chihiro_pic8259_2_config )
1845	1852	MCFG_PIT8254_ADD( "pit8254", chihiro_pit8254_config )
1846		MCFG_IDE_CONTROLLER_ADD( "ide", ide_interrupt , ide_baseboard, NULL, "bb", true)
1847		MCFG_IDE_BUS_MASTER_SPACE( "ide", "maincpu", PROGRAM )
	1853	MCFG_IDE_CONTROLLER_ADD( "ide", ide_intf , ide_baseboard, NULL, "bb", true)
1848	1854
1849	1855	/* video hardware */
1850	1856	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mame/drivers/jaguar.c
r17580	r17581
1732	1732	jaguar_dsp_cpu_int
1733	1733	};
1734	1734
	1735	static const ide_config ide_intf =
	1736	{
	1737	jaguar_external_int,
	1738	NULL,
	1739	0
	1740	};
1735	1741
1736	1742	static MACHINE_CONFIG_START( cojagr3k, cojag_state )
1737	1743
r17580	r17581
1751	1757	MCFG_MACHINE_RESET(cojag)
1752	1758	MCFG_NVRAM_ADD_1FILL("nvram")
1753	1759
1754		MCFG_IDE_CONTROLLER_ADD("ide", ~~jaguar_~~e~~xternal~~_int, ide_devices, "hdd", NULL, true)
	1760	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
1755	1761
1756	1762	MCFG_TIMER_ADD("serial_timer", jaguar_serial_callback)
1757	1763

trunk/src/mame/drivers/queen.c
r17580	r17581
671	671
672	672
673	673
	674	static const ide_config ide_intf =
	675	{
	676	ide_interrupt,
	677	NULL,
	678	0
	679	};
674	680
675
676	681	static MACHINE_CONFIG_START( queen, queen_state )
677	682	MCFG_CPU_ADD("maincpu", PENTIUM, 533000000/16) // Celeron or Pentium 3, 533 Mhz
678	683	MCFG_CPU_PROGRAM_MAP(queen_map)
r17580	r17581
693	698	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
694	699	MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
695	700
696		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	701	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
697	702
698	703	/* video hardware */
699	704	MCFG_FRAGMENT_ADD( pcvideo_vga )

trunk/src/mame/drivers/taitotz.c
r17580	r17581
2470	2470	DEVCB_DRIVER_MEMBER(taitotz_state, tlcs900_port_write),
2471	2471	};
2472	2472
	2473	static const ide_config ide_intf =
	2474	{
	2475	ide_interrupt,
	2476	NULL,
	2477	0
	2478	};
2473	2479
2474	2480	static MACHINE_CONFIG_START( taitotz, taitotz_state )
2475	2481	/* IBM EMPPC603eBG-100 */
r17580	r17581
2490	2496	MCFG_MACHINE_START( taitotz )
2491	2497	MCFG_MACHINE_RESET( taitotz )
2492	2498
2493		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	2499	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
2494	2500	MCFG_NVRAM_ADD_0FILL("nvram")
2495	2501
2496	2502	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mame/drivers/djmain.c
r17580	r17581
1448	1448	djmain_tile_callback, "none"
1449	1449	};
1450	1450
	1451	static const ide_config ide_intf =
	1452	{
	1453	ide_interrupt,
	1454	NULL,
	1455	0
	1456	};
	1457
1451	1458	static MACHINE_CONFIG_START( djmain, djmain_state )
1452	1459
1453	1460	/* basic machine hardware */
r17580	r17581
1460	1467	MCFG_MACHINE_START(djmain)
1461	1468	MCFG_MACHINE_RESET(djmain)
1462	1469
1463		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	1470	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
1464	1471
1465	1472	/* video hardware */
1466	1473	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mame/drivers/tickee.c
r17580	r17581
774	774	MCFG_TICKET_DISPENSER_ADD("ticket2", attotime::from_msec(100), TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH)
775	775
776	776	/* video hardware */
777		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	777	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
778	778
779	779	MCFG_VIDEO_START(tickee)
780	780
r17580	r17581
814	814	MCFG_NVRAM_ADD_1FILL("nvram")
815	815
816	816	/* video hardware */
817		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	817	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
818	818
819	819	MCFG_VIDEO_START(tickee)
820	820
r17580	r17581
844	844	MCFG_TICKET_DISPENSER_ADD("ticket2", attotime::from_msec(100), TICKET_MOTOR_ACTIVE_LOW, TICKET_STATUS_ACTIVE_HIGH)
845	845
846	846	/* video hardware */
847		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	847	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
848	848
849	849	MCFG_SCREEN_ADD("screen", RASTER)
850	850	MCFG_SCREEN_RAW_PARAMS(VIDEO_CLOCK/2, 444, 0, 320, 233, 0, 200)

trunk/src/mame/drivers/vcombat.c
r17580	r17581
604	604	MCFG_QUANTUM_PERFECT_CPU("maincpu")
605	605	#endif
606	606
607		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	607	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
608	608
609	609	/* Disabled for now as it can't handle multiple screens */
610	610	// MCFG_MC6845_ADD("crtc", MC6845, 6000000 / 16, mc6845_intf)
r17580	r17581
641	641	MCFG_NVRAM_ADD_0FILL("nvram")
642	642	MCFG_MACHINE_RESET(shadfgtr)
643	643
644		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	644	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
645	645
646	646	MCFG_MC6845_ADD("crtc", MC6845, XTAL_20MHz / 4 / 16, mc6845_intf)
647	647

trunk/src/mame/drivers/savquest.c
r17580	r17581
536	536	machine.root_device().membank("bank1")->set_base(machine.root_device().memregion("bios")->base() + 0x20000);
537	537	}
538	538
	539	static const ide_config ide_intf =
	540	{
	541	ide_interrupt,
	542	NULL,
	543	0
	544	};
539	545
540	546	static MACHINE_CONFIG_START( savquest, savquest_state )
541	547	MCFG_CPU_ADD("maincpu", PENTIUM, 450000000) // actually Pentium II 450
r17580	r17581
557	563	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
558	564	MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
559	565
560		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	566	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
561	567
562	568	/* video hardware */
563	569	MCFG_FRAGMENT_ADD( pcvideo_vga )

trunk/src/mame/drivers/cobra.c
r17580	r17581
3185	3185	cobra->m_renderer->gfx_reset(machine);
3186	3186	}
3187	3187
	3188	static const ide_config ide_intf =
	3189	{
	3190	ide_interrupt,
	3191	NULL,
	3192	0
	3193	};
	3194
3188	3195	static MACHINE_CONFIG_START( cobra, cobra_state )
3189	3196
3190	3197	/* basic machine hardware */
r17580	r17581
3207	3214	MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)
3208	3215	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, mpc106_pci_r, mpc106_pci_w)
3209	3216
3210		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	3217	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
3211	3218
3212	3219	/* video hardware */
3213	3220	MCFG_VIDEO_START(cobra)

trunk/src/mame/drivers/twinkle.c
r17580	r17581
901	901	DEVCB_NULL
902	902	};
903	903
	904	static const ide_config ide_intf =
	905	{
	906	ide_interrupt,
	907	NULL,
	908	0
	909	};
	910
904	911	static MACHINE_CONFIG_START( twinkle, twinkle_state )
905	912	/* basic machine hardware */
906	913	MCFG_CPU_ADD( "maincpu", CXD8530CQ, XTAL_67_7376MHz )
r17580	r17581
921	928	MCFG_SCSIDEV_ADD("scsi:cdrom", SCSICD, SCSI_ID_4)
922	929	MCFG_AM53CF96_ADD("scsi:am53cf96", am53cf96_intf)
923	930
924		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	931	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
925	932	MCFG_RTC65271_ADD("rtc", twinkle_rtc)
926	933
927	934	/* video hardware */

trunk/src/mame/drivers/artmagic.c
r17580	r17581
849	849	MCFG_NVRAM_ADD_1FILL("nvram")
850	850
851	851	/* video hardware */
852		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	852	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
853	853
854	854	MCFG_VIDEO_START(artmagic)
855	855

trunk/src/mame/drivers/midqslvr.c
r17580	r17581
685	685	machine.root_device().membank("video_bank2")->set_base(machine.root_device().memregion("video_bios")->base() + 0x4000);
686	686	}
687	687
	688	static const ide_config ide_intf =
	689	{
	690	ide_interrupt,
	691	NULL,
	692	0
	693	};
688	694
689	695	static MACHINE_CONFIG_START( midqslvr, midqslvr_state )
690	696	MCFG_CPU_ADD("maincpu", PENTIUM, 333000000) // actually Celeron 333
r17580	r17581
706	712	MCFG_PCI_BUS_LEGACY_DEVICE( 0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
707	713	MCFG_PCI_BUS_LEGACY_DEVICE(31, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
708	714
709		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	715	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
710	716
711	717	/* video hardware */
712	718	MCFG_FRAGMENT_ADD( pcvideo_vga )

trunk/src/mame/drivers/coolpool.c
r17580	r17581
898	898	MCFG_TIMER_ADD("nvram_timer", nvram_write_timeout)
899	899
900	900	/* video hardware */
901		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	901	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
902	902
903	903	MCFG_SCREEN_ADD("screen", RASTER)
904	904	MCFG_SCREEN_RAW_PARAMS(XTAL_40MHz/6, 424, 0, 320, 262, 0, 240)

trunk/src/mame/drivers/calchase.c
r17580	r17581
917	917	pic8259_ir1_w(drvstate->m_pic8259_1, state);
918	918	}
919	919
	920	static const ide_config ide_intf =
	921	{
	922	ide_interrupt,
	923	NULL,
	924	0
	925	};
	926
920	927	static MACHINE_CONFIG_START( calchase, calchase_state )
921	928	MCFG_CPU_ADD("maincpu", PENTIUM, 133000000) // Cyrix 686MX-PR200 CPU
922	929	MCFG_CPU_PROGRAM_MAP(calchase_map)
r17580	r17581
930	937	MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
931	938	MCFG_PIC8259_ADD( "pic8259_1", calchase_pic8259_1_config )
932	939	MCFG_PIC8259_ADD( "pic8259_2", calchase_pic8259_2_config )
933		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	940	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
934	941
935	942	MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
936	943	MCFG_PCI_BUS_LEGACY_ADD("pcibus", 0)

trunk/src/mame/drivers/vegas.c
r17580	r17581
770	770	switch (offset)
771	771	{
772	772	case 0x00: /* ID register: 0x0002 = SST-2, 0x121a = 3dfx */
773		if (voodoo_type == VOODOO_2)
	773	if (voodoo_type == TYPE_VOODOO_2)
774	774	result = 0x0002121a;
775	775	else
776	776	result = 0x0003121a;
r17580	r17581
805	805	switch (offset)
806	806	{
807	807	case 0x04: /* address register */
808		if (voodoo_type == VOODOO_2)
	808	if (voodoo_type == TYPE_VOODOO_2)
809	809	state->m_pci_3dfx_regs[offset] &= 0xff000000;
810	810	else
811	811	state->m_pci_3dfx_regs[offset] &= 0xfe000000;
r17580	r17581
813	813	break;
814	814
815	815	case 0x05: /* address register */
816		if (voodoo_type >= VOODOO_BANSHEE)
	816	if (voodoo_type >= TYPE_VOODOO_BANSHEE)
817	817	{
818	818	state->m_pci_3dfx_regs[offset] &= 0xfe000000;
819	819	remap_dynamic_addresses(space->machine());
r17580	r17581
821	821	break;
822	822
823	823	case 0x06: /* I/O register */
824		if (voodoo_type >= VOODOO_BANSHEE)
	824	if (voodoo_type >= TYPE_VOODOO_BANSHEE)
825	825	{
826	826	state->m_pci_3dfx_regs[offset] &= 0xffffff00;
827	827	remap_dynamic_addresses(space->machine());
r17580	r17581
829	829	break;
830	830
831	831	case 0x0c: /* romBaseAddr register */
832		if (voodoo_type >= VOODOO_BANSHEE)
	832	if (voodoo_type >= TYPE_VOODOO_BANSHEE)
833	833	{
834	834	state->m_pci_3dfx_regs[offset] &= 0xffff0000;
835	835	remap_dynamic_addresses(space->machine());
r17580	r17581
1657	1657	base = state->m_pci_3dfx_regs[0x04] & 0xfffffff0;
1658	1658	if (base >= state->m_rambase.bytes() && base < 0x20000000)
1659	1659	{
1660		if (voodoo_type == VOODOO_2)
	1660	if (voodoo_type == TYPE_VOODOO_2)
1661	1661	add_dynamic_device_address(state, state->m_voodoo, base + 0x000000, base + 0xffffff, voodoo_r, voodoo_w);
1662	1662	else
1663	1663	add_dynamic_device_address(state, state->m_voodoo, base + 0x000000, base + 0x1ffffff, banshee_r, banshee_w);
1664	1664	}
1665	1665
1666		if (voodoo_type >= VOODOO_BANSHEE)
	1666	if (voodoo_type >= TYPE_VOODOO_BANSHEE)
1667	1667	{
1668	1668	base = state->m_pci_3dfx_regs[0x05] & 0xfffffff0;
1669	1669	if (base >= state->m_rambase.bytes() && base < 0x20000000)
r17580	r17581
2222	2222	SYSTEM_CLOCK /* system clock rate */
2223	2223	};
2224	2224
	2225	static const ide_config ide_intf =
	2226	{
	2227	ide_interrupt,
	2228	"maincpu",
	2229	AS_PROGRAM
	2230	};
	2231
	2232	static const smc91c9x_config ethernet_intf =
	2233	{
	2234	ethernet_interrupt
	2235	};
	2236
	2237	static const voodoo_config voodoo_intf =
	2238	{
	2239	2, // fbmem;
	2240	4,// tmumem0;
	2241	4,// tmumem1;
	2242	"screen",// screen;
	2243	"maincpu",// cputag;
	2244	vblank_assert,// vblank;
	2245	NULL,// stall;
	2246	};
	2247
2225	2248	static MACHINE_CONFIG_START( vegascore, vegas_state )
2226	2249
2227	2250	/* basic machine hardware */
r17580	r17581
2233	2256	MCFG_MACHINE_RESET(vegas)
2234	2257	MCFG_M48T37_ADD("timekeeper")
2235	2258
2236		MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
2237		MCFG_IDE_BUS_MASTER_SPACE("ide", "maincpu", PROGRAM)
	2259	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
2238	2260
2239		MCFG_SMC91C94_ADD("ethernet", ethernet_int~~errupt~~)
	2261	MCFG_SMC91C94_ADD("ethernet", ethernet_intf)
2240	2262
2241		MCFG_3DFX_VOODOO_2_ADD("voodoo", STD_VOODOO_2_CLOCK, 2, "screen")
2242		MCFG_3DFX_VOODOO_CPU("maincpu")
2243		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
2244		MCFG_3DFX_VOODOO_TMU_MEMORY(1, 4)
2245		MCFG_3DFX_VOODOO_VBLANK(vblank_assert)
	2263	MCFG_3DFX_VOODOO_2_ADD("voodoo", STD_VOODOO_2_CLOCK, voodoo_intf)
2246	2264
2247	2265	/* video hardware */
2248	2266	MCFG_SCREEN_ADD("screen", RASTER)
r17580	r17581
2274	2292	MACHINE_CONFIG_END
2275	2293
2276	2294
	2295	static const voodoo_config vegasban_voodoo_intf =
	2296	{
	2297	16, // fbmem;
	2298	0,// tmumem0;
	2299	0,// tmumem1;
	2300	"screen",// screen;
	2301	"maincpu",// cputag;
	2302	vblank_assert,// vblank;
	2303	NULL,// stall;
	2304	};
2277	2305	static MACHINE_CONFIG_DERIVED( vegasban, vegascore )
2278	2306	MCFG_FRAGMENT_ADD(dcs2_audio_2104)
2279	2307
r17580	r17581
2281	2309	MCFG_CPU_PROGRAM_MAP(vegas_map_32mb)
2282	2310
2283	2311	MCFG_DEVICE_REMOVE("voodoo")
2284		MCFG_3DFX_VOODOO_BANSHEE_ADD("voodoo", STD_VOODOO_BANSHEE_CLOCK, 16, "screen")
2285		MCFG_3DFX_VOODOO_CPU("maincpu")
2286		MCFG_3DFX_VOODOO_VBLANK(vblank_assert)
	2312	MCFG_3DFX_VOODOO_BANSHEE_ADD("voodoo", STD_VOODOO_BANSHEE_CLOCK, vegasban_voodoo_intf)
2287	2313	MACHINE_CONFIG_END
2288	2314
2289	2315
r17580	r17581
2293	2319	MCFG_CPU_PROGRAM_MAP(vegas_map_8mb)
2294	2320
2295	2321	MCFG_DEVICE_REMOVE("voodoo")
2296		MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, 16, "screen")
2297		MCFG_3DFX_VOODOO_CPU("maincpu")
2298		MCFG_3DFX_VOODOO_VBLANK(vblank_assert)
	2322	MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, vegasban_voodoo_intf)
2299	2323	MACHINE_CONFIG_END
2300	2324
2301	2325
r17580	r17581
2307	2331	MCFG_CPU_PROGRAM_MAP(vegas_map_32mb)
2308	2332
2309	2333	MCFG_DEVICE_REMOVE("voodoo")
2310		MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, 16, "screen")
2311		MCFG_3DFX_VOODOO_CPU("maincpu")
2312		MCFG_3DFX_VOODOO_VBLANK(vblank_assert)
	2334	MCFG_3DFX_VOODOO_3_ADD("voodoo", STD_VOODOO_3_CLOCK, vegasban_voodoo_intf)
2313	2335	MACHINE_CONFIG_END
2314	2336
2315	2337

trunk/src/mame/drivers/magictg.c
r17580	r17581
898	898	0,//timer_enable_callback /* callback for timer fired */
899	899	};
900	900
	901	static const voodoo_config voodoo_1_intf =
	902	{
	903	2, // fbmem;
	904	4,// tmumem0;
	905	0,// tmumem1;
	906	"screen",// screen;
	907	"mips",// cputag;
	908	NULL,// vblank;
	909	NULL,// stall;
	910	};
901	911
	912	static const voodoo_config voodoo_2_intf =
	913	{
	914	2, // fbmem;
	915	4,// tmumem0;
	916	0,// tmumem1;
	917	"screen",// screen;
	918	"mips",// cputag;
	919	NULL,//vblank_assert vblank;
	920	NULL,// voodoo_stall stall;
	921	};
902	922	/*************************************
903	923	*
904	924	* Machine driver
r17580	r17581
933	953	#endif
934	954	MCFG_PCI_BUS_LEGACY_DEVICE(9, "zr36120", zr36120_pci_r, zr36120_pci_w)
935	955
936		MCFG_3DFX_VOODOO_1_ADD("voodoo_0", STD_VOODOO_1_CLOCK, 2, "screen")
937		MCFG_3DFX_VOODOO_CPU("mips")
938		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
	956	MCFG_3DFX_VOODOO_1_ADD("voodoo_0", STD_VOODOO_1_CLOCK, voodoo_1_intf)
939	957
940		MCFG_3DFX_VOODOO_1_ADD("voodoo_1", STD_VOODOO_1_CLOCK, 2, "screen")
941		MCFG_3DFX_VOODOO_CPU("mips")
942		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
943		// MCFG_3DFX_VOODOO_VBLANK(vblank_assert)
944		// MCFG_3DFX_VOODOO_STALL(voodoo_stall)
	958	MCFG_3DFX_VOODOO_1_ADD("voodoo_1", STD_VOODOO_1_CLOCK, voodoo_2_intf)
945	959
946	960	MCFG_SCREEN_ADD("screen", RASTER)
947	961	MCFG_SCREEN_REFRESH_RATE(60)

trunk/src/mame/drivers/xtom3d.c
r17580	r17581
677	677	machine.root_device().membank("video_bank2")->set_base(machine.root_device().memregion("video_bios")->base() + 0x4000);
678	678	}
679	679
	680	static const ide_config ide_intf =
	681	{
	682	ide_interrupt,
	683	NULL,
	684	0
	685	};
680	686
681	687	static MACHINE_CONFIG_START( xtom3d, xtom3d_state )
682	688	MCFG_CPU_ADD("maincpu", PENTIUM, 450000000/16) // actually Pentium II 450
r17580	r17581
698	704	MCFG_PCI_BUS_LEGACY_DEVICE(0, NULL, intel82439tx_pci_r, intel82439tx_pci_w)
699	705	MCFG_PCI_BUS_LEGACY_DEVICE(7, NULL, intel82371ab_pci_r, intel82371ab_pci_w)
700	706
701		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	707	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
702	708
703	709	/* video hardware */
704	710	MCFG_FRAGMENT_ADD( pcvideo_vga )

trunk/src/mame/drivers/gticlub.c
r17580	r17581
882	882	cputag_set_input_line(machine, "dsp2", INPUT_LINE_RESET, ASSERT_LINE);
883	883	}
884	884
	885	static const voodoo_config voodoo_l_intf =
	886	{
	887	2, // fbmem;
	888	2,// tmumem0;
	889	2,// tmumem1;
	890	"lscreen",// screen;
	891	"dsp",// cputag;
	892	voodoo_vblank_0,// vblank;
	893	NULL,// stall;
	894	};
	895
	896	static const voodoo_config voodoo_r_intf =
	897	{
	898	2, // fbmem;
	899	2,// tmumem0;
	900	2,// tmumem1;
	901	"rscreen",// screen;
	902	"dsp2",// cputag;
	903	voodoo_vblank_1,// vblank;
	904	NULL,// stall;
	905	};
	906
885	907	static MACHINE_CONFIG_START( hangplt, gticlub_state )
886	908
887	909	/* basic machine hardware */
r17580	r17581
909	931	MCFG_ADC1038_ADD("adc1038", thunderh_adc1038_intf)
910	932	MCFG_K056230_ADD("k056230", gticlub_k056230_intf)
911	933
912		MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, 2, "lscreen")
913		MCFG_3DFX_VOODOO_CPU("dsp")
914		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 2)
915		MCFG_3DFX_VOODOO_TMU_MEMORY(1, 2)
916		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank_0)
	934	MCFG_3DFX_VOODOO_1_ADD("voodoo0", STD_VOODOO_1_CLOCK, voodoo_l_intf)
	935	MCFG_3DFX_VOODOO_1_ADD("voodoo1", STD_VOODOO_1_CLOCK, voodoo_r_intf)
917	936
918		MCFG_3DFX_VOODOO_1_ADD("voodoo1", STD_VOODOO_1_CLOCK, 2, "rscreen")
919		MCFG_3DFX_VOODOO_CPU("dsp2")
920		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 2)
921		MCFG_3DFX_VOODOO_TMU_MEMORY(1, 2)
922		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank_1)
923
924	937	MCFG_K033906_ADD("k033906_1", hangplt_k033906_intf_0)
925	938	MCFG_K033906_ADD("k033906_2", hangplt_k033906_intf_1)
926	939

trunk/src/mame/drivers/polepos.c
r17580	r17581
863	863	1 /* stereo */
864	864	};
865	865
	866	const namco_06xx_config polepos_namco_06xx_intf =
	867	{
	868	"maincpu", "51xx", "53xx", "52xx", "54xx"
	869	};
866	870
	871	const namco_54xx_config polepos_namco_54xx_intf =
	872	{
	873	"discrete", NODE_01
	874	};
	875
867	876	/*********************************************************************
868	877	* Machine driver
869	878	*********************************************************************/
r17580	r17581
884	893	MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/8/2, namco_51xx_intf) /* 1.536 MHz */
885	894	MCFG_NAMCO_52XX_ADD("52xx", MASTER_CLOCK/8/2, namco_52xx_intf) /* 1.536 MHz */
886	895	MCFG_NAMCO_53XX_ADD("53xx", MASTER_CLOCK/8/2, namco_53xx_intf) /* 1.536 MHz */
887		MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/8/2, ~~"di~~sc~~rete", NODE~~_01) /* 1.536 MHz */
	896	MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/8/2, polepos_namco_54xx_intf) /* 1.536 MHz */
888	897
889		MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/8/64, ~~"mai~~nc~~pu", "51~~xx~~", "53xx", "52xx", "54xx"~~)
	898	MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/8/64, polepos_namco_06xx_intf)
890	899
891	900	MCFG_WATCHDOG_VBLANK_INIT(16) // 128V clocks the same as VBLANK
892	901
r17580	r17581
945	954	}
946	955	};
947	956
	957	const namco_06xx_config topracern_namco_06xx_intf =
	958	{
	959	"maincpu", "51xx", NULL, NULL, NULL
	960	};
948	961
949	962	static MACHINE_CONFIG_START( topracern, polepos_state )
950	963
r17580	r17581
961	974
962	975	/* todo, remove these devices too, this bootleg doesn't have them, but the emulation doesn't boot without them.. */
963	976	MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/8/2, namco_51xx_bl_intf) /* 1.536 MHz */
964		MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/8/64, "mainc~~pu", "51~~xx~~", NULL, NULL, NULL~~)
	977	MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/8/64, topracern_namco_06xx_intf)
965	978
966	979	MCFG_WATCHDOG_VBLANK_INIT(16) // 128V clocks the same as VBLANK
967	980

trunk/src/mame/drivers/qdrmfgp.c
r17580	r17581
667	667	* Machine driver
668	668	*
669	669	*************************************/
	670	static const ide_config ide_intf =
	671	{
	672	ide_interrupt,
	673	NULL,
	674	0
	675	};
670	676
671	677	static MACHINE_CONFIG_START( qdrmfgp, qdrmfgp_state )
672	678
r17580	r17581
679	685	MCFG_MACHINE_RESET(qdrmfgp)
680	686	MCFG_NVRAM_ADD_1FILL("nvram")
681	687
682		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	688	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
683	689
684	690	/* video hardware */
685	691	MCFG_SCREEN_ADD("screen", RASTER)
r17580	r17581
704	710	MCFG_SOUND_ROUTE(1, "rspeaker", 1.0)
705	711	MACHINE_CONFIG_END
706	712
	713	static const ide_config qdrmfgp2_ide_intf =
	714	{
	715	gp2_ide_interrupt,
	716	NULL,
	717	0
	718	};
707	719	static MACHINE_CONFIG_START( qdrmfgp2, qdrmfgp_state )
708	720
709	721	/* basic machine hardware */
r17580	r17581
715	727	MCFG_MACHINE_RESET(qdrmfgp)
716	728	MCFG_NVRAM_ADD_1FILL("nvram")
717	729
718		MCFG_IDE_CONTROLLER_ADD("ide", gp2_ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	730	MCFG_IDE_CONTROLLER_ADD("ide", qdrmfgp2_ide_intf, ide_devices, "hdd", NULL, true)
719	731
720	732	/* video hardware */
721	733	MCFG_SCREEN_ADD("screen", RASTER)

trunk/src/mame/drivers/itech8.c
r17580	r17581
1694	1694	MCFG_TICKET_DISPENSER_ADD("ticket", attotime::from_msec(200), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_LOW)
1695	1695
1696	1696	/* video hardware */
1697		MCFG_TLC34076_ADD("tlc34076", ~~TLC~~34076_6_~~BIT~~)
	1697	MCFG_TLC34076_ADD("tlc34076", tlc34076_6_bit_intf)
1698	1698
1699	1699	MCFG_VIDEO_ATTRIBUTES(VIDEO_UPDATE_BEFORE_VBLANK)
1700	1700	MCFG_VIDEO_START(itech8)

trunk/src/mame/drivers/seattle.c
r17580	r17581
2523	2523	SYSTEM_CLOCK /* system clock rate */
2524	2524	};
2525	2525
	2526	static const ide_config ide_intf =
	2527	{
	2528	ide_interrupt,
	2529	"maincpu",
	2530	AS_PROGRAM
	2531	};
	2532
	2533	static const voodoo_config voodoo_intf =
	2534	{
	2535	2, // fbmem;
	2536	4,// tmumem0;
	2537	0,// tmumem1;
	2538	"screen",// screen;
	2539	"maincpu",// cputag;
	2540	vblank_assert,// vblank;
	2541	voodoo_stall,// stall;
	2542	};
	2543
2526	2544	static MACHINE_CONFIG_START( seattle_common, seattle_state )
2527	2545
2528	2546	/* basic machine hardware */
r17580	r17581
2534	2552	MCFG_MACHINE_RESET(seattle)
2535	2553	MCFG_NVRAM_ADD_1FILL("nvram")
2536	2554
2537		MCFG_IDE_CONTROLLER_ADD("ide", ide_interrupt, ide_devices, "hdd", NULL, true)
2538		MCFG_IDE_BUS_MASTER_SPACE("ide", "maincpu", PROGRAM)
	2555	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
2539	2556
2540		MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, 2, "screen")
2541		MCFG_3DFX_VOODOO_CPU("maincpu")
2542		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
2543		MCFG_3DFX_VOODOO_VBLANK(vblank_assert)
2544		MCFG_3DFX_VOODOO_STALL(voodoo_stall)
	2557	MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_intf)
2545	2558
2546	2559	/* video hardware */
2547	2560	MCFG_SCREEN_ADD("screen", RASTER)
r17580	r17581
2571	2584	MCFG_CPU_PROGRAM_MAP(seattle_map)
2572	2585	MACHINE_CONFIG_END
2573	2586
	2587	static const smc91c9x_config ethernet_intf =
	2588	{
	2589	ethernet_interrupt
	2590	};
2574	2591
2575	2592	static MACHINE_CONFIG_DERIVED( seattle150_widget, seattle150 )
2576		MCFG_SMC91C94_ADD("ethernet", ethernet_int~~errupt~~)
	2593	MCFG_SMC91C94_ADD("ethernet", ethernet_intf)
2577	2594	MACHINE_CONFIG_END
2578	2595
2579	2596
r17580	r17581
2587	2604
2588	2605
2589	2606	static MACHINE_CONFIG_DERIVED( seattle200_widget, seattle200 )
2590		MCFG_SMC91C94_ADD("ethernet", ethernet_int~~errupt~~)
	2607	MCFG_SMC91C94_ADD("ethernet", ethernet_intf)
2591	2608	MACHINE_CONFIG_END
2592	2609
	2610	static const voodoo_config voodoo_2_intf =
	2611	{
	2612	2, // fbmem;
	2613	4,// tmumem0;
	2614	4,// tmumem1;
	2615	"screen",// screen;
	2616	"maincpu",// cputag;
	2617	vblank_assert,// vblank;
	2618	voodoo_stall,// stall;
	2619	};
2593	2620
2594	2621	static MACHINE_CONFIG_DERIVED( flagstaff, seattle_common )
2595	2622	MCFG_FRAGMENT_ADD(cage_seattle)
r17580	r17581
2598	2625	MCFG_CPU_CONFIG(r5000_config)
2599	2626	MCFG_CPU_PROGRAM_MAP(seattle_map)
2600	2627
2601		MCFG_SMC91C94_ADD("ethernet", ethernet_int~~errupt~~)
	2628	MCFG_SMC91C94_ADD("ethernet", ethernet_intf)
2602	2629
2603		MCFG_3DFX_VOODOO_MODIFY("voodoo")
2604		MCFG_3DFX_VOODOO_TMU_MEMORY(1, 4)
	2630	MCFG_DEVICE_REMOVE("voodoo")
	2631	MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_2_intf)
2605	2632	MACHINE_CONFIG_END
2606	2633
2607	2634

trunk/src/mame/drivers/midvunit.c
r17580	r17581
1043	1043	MCFG_FRAGMENT_ADD(dcs_audio_2k)
1044	1044	MACHINE_CONFIG_END
1045	1045
	1046	static const ide_config ide_intf =
	1047	{
	1048	NULL,
	1049	NULL,
	1050	0
	1051	};
1046	1052
1047	1053	static MACHINE_CONFIG_DERIVED( midvplus, midvcommon )
1048	1054
r17580	r17581
1055	1061	MCFG_DEVICE_REMOVE("nvram")
1056	1062	MCFG_NVRAM_HANDLER(midway_serial_pic2)
1057	1063
1058		MCFG_IDE_CONTROLLER_ADD("ide", ~~NULL~~, ide_devices, "hdd", NULL, true)
	1064	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
1059	1065
1060	1066	/* sound hardware */
1061	1067	MCFG_FRAGMENT_ADD(dcs2_audio_2115)

trunk/src/mame/drivers/galaga.c
r17580	r17581
1655	1655	device_set_input_line(device, 0, ASSERT_LINE);
1656	1656	}
1657	1657
	1658	const namco_06xx_config bosco_namco_06xx_0_intf =
	1659	{
	1660	"maincpu", "51xx", NULL, "50xx_1", "54xx"
	1661	};
	1662
	1663	const namco_06xx_config bosco_namco_06xx_1_intf =
	1664	{
	1665	"sub", "50xx_2", "52xx", NULL, NULL
	1666	};
	1667
	1668	const namco_54xx_config namco_54xx_intf =
	1669	{
	1670	"discrete", NODE_01
	1671	};
	1672
1658	1673	static MACHINE_CONFIG_START( bosco, bosco_state )
1659	1674
1660	1675	/* basic machine hardware */
r17580	r17581
1673	1688	MCFG_NAMCO_50XX_ADD("50xx_2", MASTER_CLOCK/6/2) /* 1.536 MHz */
1674	1689	MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf) /* 1.536 MHz */
1675	1690	MCFG_NAMCO_52XX_ADD("52xx", MASTER_CLOCK/6/2, namco_52xx_intf) /* 1.536 MHz */
1676		MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, ~~"dis~~c~~rete", NODE~~_01) /* 1.536 MHz */
	1691	MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, namco_54xx_intf) /* 1.536 MHz */
1677	1692
1678		MCFG_NAMCO_06XX_ADD("06xx_0", MASTER_CLOCK/6/64, "maincpu", "51xx", NULL, "50xx_1", "54xx")
1679		MCFG_NAMCO_06XX_ADD("06xx_1", MASTER_CLOCK/6/64, "sub", "50xx_2", "52xx", NULL, NULL)
	1693	MCFG_NAMCO_06XX_ADD("06xx_0", MASTER_CLOCK/6/64, bosco_namco_06xx_0_intf)
	1694	MCFG_NAMCO_06XX_ADD("06xx_1", MASTER_CLOCK/6/64, bosco_namco_06xx_1_intf)
1680	1695
1681	1696	MCFG_WATCHDOG_VBLANK_INIT(8)
1682	1697	MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
r17580	r17581
1710	1725	MACHINE_CONFIG_END
1711	1726
1712	1727
	1728	const namco_06xx_config galaga_namco_06xx_intf =
	1729	{
	1730	"maincpu", "51xx", NULL, NULL, "54xx"
	1731	};
	1732
1713	1733	static MACHINE_CONFIG_START( galaga, galaga_state )
1714	1734
1715	1735	/* basic machine hardware */
r17580	r17581
1725	1745	MCFG_CPU_PROGRAM_MAP(galaga_map)
1726	1746
1727	1747	MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf) /* 1.536 MHz */
1728		MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, ~~"dis~~c~~rete", NODE~~_01) /* 1.536 MHz */
	1748	MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, namco_54xx_intf) /* 1.536 MHz */
1729	1749
1730		MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, "mainc~~pu", "51~~xx~~", NULL, NULL, "54xx"~~)
	1750	MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, galaga_namco_06xx_intf)
1731	1751
1732	1752	MCFG_WATCHDOG_VBLANK_INIT(8)
1733	1753	MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
r17580	r17581
1760	1780	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90)
1761	1781	MACHINE_CONFIG_END
1762	1782
	1783	const namco_06xx_config galagab_namco_06xx_intf =
	1784	{
	1785	"maincpu", "51xx", NULL, NULL, NULL
	1786	};
	1787
1763	1788	static MACHINE_CONFIG_DERIVED( galagab, galaga )
1764	1789
1765	1790	/* basic machine hardware */
r17580	r17581
1768	1793	MCFG_DEVICE_REMOVE("06xx")
1769	1794
1770	1795	/* FIXME: bootlegs should not have any Namco custom chip. However, this workaround is needed atm */
1771		MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, "mainc~~pu", "51~~xx~~", NULL, NULL, NULL~~)
	1796	MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, galagab_namco_06xx_intf)
1772	1797
1773	1798	MCFG_CPU_ADD("sub3", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
1774	1799	MCFG_CPU_PROGRAM_MAP(galaga_mem4)
r17580	r17581
1777	1802	MCFG_DEVICE_REMOVE("discrete")
1778	1803	MACHINE_CONFIG_END
1779	1804
	1805	const namco_06xx_config xevious_namco_06xx_intf =
	1806	{
	1807	"maincpu", "51xx", NULL, "50xx", "54xx"
	1808	};
1780	1809
1781	1810	static MACHINE_CONFIG_START( xevious, xevious_state )
1782	1811
r17580	r17581
1794	1823
1795	1824	MCFG_NAMCO_50XX_ADD("50xx", MASTER_CLOCK/6/2) /* 1.536 MHz */
1796	1825	MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf) /* 1.536 MHz */
1797		MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, ~~"dis~~c~~rete", NODE~~_01) /* 1.536 MHz */
	1826	MCFG_NAMCO_54XX_ADD("54xx", MASTER_CLOCK/6/2, namco_54xx_intf) /* 1.536 MHz */
1798	1827
1799		MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, ~~"ma~~inc~~pu", "51xx", NULL, "5~~0xx~~", "54xx"~~)
	1828	MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, xevious_namco_06xx_intf)
1800	1829
1801	1830	MCFG_WATCHDOG_VBLANK_INIT(8)
1802	1831	MCFG_QUANTUM_TIME(attotime::from_hz(60000)) /* 1000 CPU slices per frame - an high value to ensure proper */
r17580	r17581
1828	1857	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.90)
1829	1858	MACHINE_CONFIG_END
1830	1859
	1860	const namco_06xx_config battles_namco_06xx_intf =
	1861	{
	1862	"maincpu", "51xx", NULL, NULL, NULL
	1863	};
	1864
1831	1865	static MACHINE_CONFIG_DERIVED( battles, xevious )
1832	1866
1833	1867	/* basic machine hardware */
r17580	r17581
1837	1871	MCFG_DEVICE_REMOVE("06xx")
1838	1872
1839	1873	/* FIXME: bootlegs should not have any Namco custom chip. However, this workaround is needed atm */
1840		MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, "mainc~~pu", "51~~xx~~", NULL, NULL, NULL~~)
	1874	MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, battles_namco_06xx_intf)
1841	1875
1842	1876	MCFG_CPU_ADD("sub3", Z80, MASTER_CLOCK/6) /* 3.072 MHz */
1843	1877	MCFG_CPU_PROGRAM_MAP(battles_mem4)
r17580	r17581
1857	1891	MCFG_SOUND_ROUTE(ALL_OUTPUTS, "mono", 0.80)
1858	1892	MACHINE_CONFIG_END
1859	1893
	1894	const namco_06xx_config digdug_namco_06xx_intf =
	1895	{
	1896	"maincpu", "51xx", "53xx", NULL, NULL
	1897	};
1860	1898
1861	1899	static MACHINE_CONFIG_START( digdug, digdug_state )
1862	1900
r17580	r17581
1875	1913	MCFG_NAMCO_51XX_ADD("51xx", MASTER_CLOCK/6/2, namco_51xx_intf) /* 1.536 MHz */
1876	1914	MCFG_NAMCO_53XX_ADD("53xx", MASTER_CLOCK/6/2, namco_53xx_intf) /* 1.536 MHz */
1877	1915
1878		MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, ~~"ma~~inc~~pu", "51~~xx~~", "53xx", NULL, NULL~~)
	1916	MCFG_NAMCO_06XX_ADD("06xx", MASTER_CLOCK/6/64, digdug_namco_06xx_intf)
1879	1917
1880	1918	MCFG_QUANTUM_TIME(attotime::from_hz(6000)) /* 100 CPU slices per frame - an high value to ensure proper */
1881	1919	/* synchronization of the CPUs */

trunk/src/mame/drivers/taitowlf.c
r17580	r17581
616	616	}
617	617	#endif
618	618
	619	static const ide_config ide_intf =
	620	{
	621	ide_interrupt,
	622	NULL,
	623	0
	624	};
	625
619	626	static MACHINE_CONFIG_START( taitowlf, taitowlf_state )
620	627
621	628	/* basic machine hardware */
r17580	r17581
635	642	MCFG_I8237_ADD( "dma8237_2", XTAL_14_31818MHz/3, dma8237_2_config )
636	643	MCFG_PIC8259_ADD( "pic8259_1", taitowlf_pic8259_1_config )
637	644	MCFG_PIC8259_ADD( "pic8259_2", taitowlf_pic8259_2_config )
638		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	645	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
639	646	MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
640	647
641	648	/* video hardware */

trunk/src/mame/drivers/taitogn.c
r17580	r17581
938	938	}
939	939	}
940	940
	941	static const ide_config ide_intf =
	942	{
	943	NULL,
	944	NULL,
	945	0
	946	};
	947
941	948	static MACHINE_CONFIG_START( coh3002t, taitogn_state )
942	949	/* basic machine hardware */
943	950	MCFG_CPU_ADD( "maincpu", CXD8661R, XTAL_100MHz )
r17580	r17581
956	963	MCFG_MACHINE_RESET( coh3002t )
957	964
958	965	MCFG_AT28C16_ADD( "at28c16", 0 )
959		MCFG_IDE_CONTROLLER_ADD( "card", 0, ide_devices, "hdd", NULL, true)
	966	MCFG_IDE_CONTROLLER_ADD( "card", ide_intf, ide_devices, "hdd", NULL, true)
960	967
961	968	MCFG_MB3773_ADD("mb3773")
962	969

trunk/src/mame/drivers/funkball.c
r17580	r17581
116	116	required_device<i8237_device> m_dma8237_2;
117	117	required_device<pic8259_device> m_pic8259_1;
118	118	required_device<pic8259_device> m_pic8259_2;
119		required_device<voodoo_device> m_voodoo;
	119	required_device<voodoo_1_device> m_voodoo;
120	120
121	121	required_shared_ptr<UINT32> m_unk_ram;
122	122
r17580	r17581
1140	1140	return 0;
1141	1141	}
1142	1142
	1143	static const ide_config ide_intf =
	1144	{
	1145	ide_interrupt,
	1146	NULL,
	1147	0
	1148	};
	1149
	1150	static const voodoo_config voodoo_intf =
	1151	{
	1152	2, // fbmem;
	1153	4,// tmumem0;
	1154	0,// tmumem1;
	1155	"screen",// screen;
	1156	"maincpu",// cputag;
	1157	NULL,// vblank;
	1158	NULL,// stall;
	1159	};
	1160
1143	1161	static MACHINE_CONFIG_START( funkball, funkball_state )
1144	1162	MCFG_CPU_ADD("maincpu", MEDIAGX, 66666666*3.5) // 66,6 MHz x 3.5
1145	1163	MCFG_CPU_PROGRAM_MAP(funkball_map)
r17580	r17581
1160	1178	MCFG_PCI_BUS_LEGACY_DEVICE(7, "voodoo_0", voodoo_0_pci_r, voodoo_0_pci_w)
1161	1179	MCFG_PCI_BUS_LEGACY_DEVICE(18, NULL, cx5510_pci_r, cx5510_pci_w)
1162	1180
1163		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	1181	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
1164	1182
1165	1183	/* video hardware */
1166		MCFG_3DFX_VOODOO_1_ADD("voodoo_0", STD_VOODOO_1_CLOCK, 2, "screen")
1167		MCFG_3DFX_VOODOO_CPU("maincpu")
1168		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 4)
	1184	MCFG_3DFX_VOODOO_1_ADD("voodoo_0", STD_VOODOO_1_CLOCK, voodoo_intf)
1169	1185
1170	1186	MCFG_SCREEN_ADD("screen", RASTER)
1171	1187	MCFG_SCREEN_REFRESH_RATE(60)

trunk/src/mame/drivers/gamecstl.c
r17580	r17581
685	685	}
686	686	};
687	687
	688	static const ide_config ide_intf =
	689	{
	690	ide_interrupt,
	691	NULL,
	692	0
	693	};
	694
688	695	static MACHINE_CONFIG_START( gamecstl, gamecstl_state )
689	696
690	697	/* basic machine hardware */
r17580	r17581
709	716
710	717	MCFG_PIC8259_ADD( "pic8259_2", gamecstl_pic8259_2_config )
711	718
712		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_devices, "hdd", NULL, true)
	719	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_devices, "hdd", NULL, true)
713	720
714	721	MCFG_MC146818_ADD( "rtc", MC146818_STANDARD )
715	722

trunk/src/mame/drivers/nwk-tr.c
r17580	r17581
677	677	cputag_set_input_line(machine, "dsp", INPUT_LINE_RESET, ASSERT_LINE);
678	678	}
679	679
	680	static const voodoo_config voodoo_intf =
	681	{
	682	2, // fbmem;
	683	2,// tmumem0;
	684	2,// tmumem1;
	685	"screen",// screen;
	686	"dsp",// cputag;
	687	voodoo_vblank_0,// vblank;
	688	NULL,// stall;
	689	};
	690
680	691	static MACHINE_CONFIG_START( nwktr, nwktr_state )
681	692
682	693	/* basic machine hardware */
r17580	r17581
695	706	MCFG_MACHINE_START(nwktr)
696	707	MCFG_MACHINE_RESET(nwktr)
697	708
698		MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, 2, "screen")
699		MCFG_3DFX_VOODOO_CPU("dsp")
700		MCFG_3DFX_VOODOO_TMU_MEMORY(0, 2)
701		MCFG_3DFX_VOODOO_TMU_MEMORY(1, 2)
702		MCFG_3DFX_VOODOO_VBLANK(voodoo_vblank_0)
	709	MCFG_3DFX_VOODOO_1_ADD("voodoo", STD_VOODOO_1_CLOCK, voodoo_intf)
703	710
704	711	MCFG_K033906_ADD("k033906_1", nwktr_k033906_interface)
705	712

trunk/src/emu/video/tlc34076.c
r17580	r17581
35	35	rgb_t pens[0x100];
36	36	};
37	37
	38	const tlc34076_config tlc34076_6_bit_intf =
	39	{
	40	TLC34076_6_BIT
	41	};
38	42
	43
39	44	/*************************************
40	45	*
41	46	* Inline functions
r17580	r17581
262	267
263	268	static DEVICE_START( tlc34076 )
264	269	{
265		tlc34076_config config = (tlc34076_config )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	270	tlc34076_config config = (tlc34076_config )device->static_config();
266	271	tlc34076_state *state = get_safe_token(device);
267	272
268	273	state->dacbits = config->res_sel ? 8 : 6;
r17580	r17581
282	287	{
283	288	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(tlc34076_state); break;
284	289
285		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(tlc34076_config); break;
286
287	290	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(tlc34076); break;
288	291
289	292	case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(tlc34076); break;

trunk/src/emu/video/tlc34076.h
r17580	r17581
23	23	int res_sel;
24	24	};
25	25
	26	extern const tlc34076_config tlc34076_6_bit_intf;
	27
26	28	DECLARE_LEGACY_DEVICE(TLC34076, tlc34076);
27	29
28	30
r17580	r17581
30	32	DEVICE CONFIGURATION MACROS
31	33	***************************************************************************/
32	34
33		#define MCFG_TLC34076_ADD(_tag, _~~res_sel~~) \
	35	#define MCFG_TLC34076_ADD(_tag, _config) \
34	36	MCFG_DEVICE_ADD(_tag, TLC34076, 0) \
35		MCFG_DEVICE_CONFIG~~_DATA32~~(~~tlc34076~~_config~~, res_sel, _res_sel~~)
	37	MCFG_DEVICE_CONFIG(_config)
36	38
37	39
38	40	/***************************************************************************

trunk/src/emu/video/voodoo.c
r17580	r17581
314	314	INLINE voodoo_state get_safe_token(device_t device)
315	315	{
316	316	assert(device != NULL);
317		assert(device->type() == VOODOO_GRA~~PHIC~~S);
	317	assert((device->type() == VOODOO_1) \|\| (device->type() == VOODOO_2) \|\| (device->type() == VOODOO_BANSHEE) \|\| (device->type() == VOODOO_3));
318	318
319	319	return (voodoo_state )downcast<legacy_device_base >(device)->token();
320	320	}
r17580	r17581
339	339	v->fbi.video_changed = FALSE;
340	340
341	341	/* if we are blank, just fill with black */
342		if (v->type <= VOODOO_2 && FBIINIT1_SOFTWARE_BLANK(v->reg[fbiInit1].u))
	342	if (v->type <= TYPE_VOODOO_2 && FBIINIT1_SOFTWARE_BLANK(v->reg[fbiInit1].u))
343	343	{
344	344	bitmap.fill(0, cliprect);
345	345	return changed;
r17580	r17581
351	351	UINT8 rtable[32], gtable[64], btable[32];
352	352
353	353	/* Voodoo/Voodoo-2 have an internal 33-entry CLUT */
354		if (v->type <= VOODOO_2)
	354	if (v->type <= TYPE_VOODOO_2)
355	355	{
356	356	/* kludge: some of the Midway games write 0 to the last entry when they obviously mean FF */
357	357	if ((v->fbi.clut[32] & 0xffffff) == 0 && (v->fbi.clut[31] & 0xffffff) != 0)
r17580	r17581
512	512
513	513	/* init the pens */
514	514	f->clut_dirty = TRUE;
515		if (v->type <= VOODOO_2)
	515	if (v->type <= TYPE_VOODOO_2)
516	516	{
517	517	for (pen = 0; pen < 32; pen++)
518	518	v->fbi.clut[pen] = MAKE_ARGB(pen, pal5bit(pen), pal5bit(pen), pal5bit(pen));
r17580	r17581
533	533	f->fifo.size = f->fifo.in = f->fifo.out = 0;
534	534
535	535	/* set the fog delta mask */
536		f->fogdelta_mask = (v->type < VOODOO_2) ? 0xff : 0xfc;
	536	f->fogdelta_mask = (v->type < TYPE_VOODOO_2) ? 0xff : 0xfc;
537	537	}
538	538
539	539
r17580	r17581
589	589	t->mask = tmem - 1;
590	590	t->reg = reg;
591	591	t->regdirty = TRUE;
592		t->bilinear_mask = (v->type >= VOODOO_2) ? 0xff : 0xf0;
	592	t->bilinear_mask = (v->type >= TYPE_VOODOO_2) ? 0xff : 0xf0;
593	593
594	594	/* mark the NCC tables dirty and configure their registers */
595	595	t->ncc[0].dirty = t->ncc[1].dirty = TRUE;
r17580	r17581
603	603	t->texel[3] = v->tmushare.int8;
604	604	t->texel[4] = v->tmushare.ai44;
605	605	t->texel[5] = t->palette;
606		t->texel[6] = (v->type >= VOODOO_2) ? t->palettea : NULL;
	606	t->texel[6] = (v->type >= TYPE_VOODOO_2) ? t->palettea : NULL;
607	607	t->texel[7] = NULL;
608	608	t->texel[8] = v->tmushare.rgb332;
609	609	t->texel[9] = t->ncc[0].texel;
r17580	r17581
617	617
618	618	/* attach the palette to NCC table 0 */
619	619	t->ncc[0].palette = t->palette;
620		if (v->type >= VOODOO_2)
	620	if (v->type >= TYPE_VOODOO_2)
621	621	t->ncc[0].palettea = t->palettea;
622	622
623	623	/* set up texture address calculations */
624		if (v->type <= VOODOO_2)
	624	if (v->type <= TYPE_VOODOO_2)
625	625	{
626	626	t->texaddr_mask = 0x0fffff;
627	627	t->texaddr_shift = 3;
r17580	r17581
647	647	}
648	648
649	649	/* recompute video memory to get the FBI FIFO base recomputed */
650		if (v->type <= VOODOO_2)
	650	if (v->type <= TYPE_VOODOO_2)
651	651	recompute_video_memory(v);
652	652	}
653	653
r17580	r17581
799	799	}
800	800
801	801	/* register states: banshee */
802		if (v->type >= VOODOO_BANSHEE)
	802	if (v->type >= TYPE_VOODOO_BANSHEE)
803	803	{
804	804	device->save_item(NAME(v->banshee.io));
805	805	device->save_item(NAME(v->banshee.agp));
r17580	r17581
883	883	v->reg[fbiSwapHistory].u = (v->reg[fbiSwapHistory].u << 4) \| count;
884	884
885	885	/* rotate the buffers */
886		if (v->type <= VOODOO_2)
	886	if (v->type <= TYPE_VOODOO_2)
887	887	{
888		if (v->type < VOODOO_2 \|\| !v->fbi.vblank_dont_swap)
	888	if (v->type < TYPE_VOODOO_2 \|\| !v->fbi.vblank_dont_swap)
889	889	{
890	890	if (v->fbi.rgboffs[2] == ~0)
891	891	{
r17580	r17581
1000	1000	v->fbi.vblank = FALSE;
1001	1001
1002	1002	// TODO: Vblank IRQ enable is VOODOO3 only?
1003		if (v->type >= VOODOO_3)
	1003	if (v->type >= TYPE_VOODOO_3)
1004	1004	{
1005	1005	if (v->reg[intrCtrl].u & 0x8) // call IRQ handler if VSYNC interrupt (falling) is enabled
1006	1006	{
r17580	r17581
1056	1056	v->fbi.vblank = TRUE;
1057	1057
1058	1058	// TODO: Vblank IRQ enable is VOODOO3 only?
1059		if (v->type >= VOODOO_3)
	1059	if (v->type >= TYPE_VOODOO_3)
1060	1060	{
1061	1061	if (v->reg[intrCtrl].u & 0x4) // call IRQ handler if VSYNC interrupt (rising) is enabled
1062	1062	{
r17580	r17581
1118	1118
1119	1119	/* memory config is determined differently between V1 and V2 */
1120	1120	memory_config = FBIINIT2_ENABLE_TRIPLE_BUF(v->reg[fbiInit2].u);
1121		if (v->type == VOODOO_2 && memory_config == 0)
	1121	if (v->type == TYPE_VOODOO_2 && memory_config == 0)
1122	1122	memory_config = FBIINIT5_BUFFER_ALLOCATION(v->reg[fbiInit5].u);
1123	1123
1124	1124	/* tiles are 64x16/32; x_tiles specifies how many half-tiles */
1125		v->fbi.tile_width = (v->type == VOODOO_1) ? 64 : 32;
1126		v->fbi.tile_height = (v->type == VOODOO_1) ? 16 : 32;
	1125	v->fbi.tile_width = (v->type == TYPE_VOODOO_1) ? 64 : 32;
	1126	v->fbi.tile_height = (v->type == TYPE_VOODOO_1) ? 16 : 32;
1127	1127	v->fbi.x_tiles = FBIINIT1_X_VIDEO_TILES(v->reg[fbiInit1].u);
1128		if (v->type == VOODOO_2)
	1128	if (v->type == TYPE_VOODOO_2)
1129	1129	{
1130	1130	v->fbi.x_tiles = (v->fbi.x_tiles << 1) \|
1131	1131	(FBIINIT1_X_VIDEO_TILES_BIT5(v->reg[fbiInit1].u) << 5) \|
r17580	r17581
1722	1722
1723	1723	if (LOG_CMDFIFO) logerror(" PACKET TYPE 1: count=%d inc=%d reg=%04X\n", count, inc, target);
1724	1724
1725		if (v->type >= VOODOO_BANSHEE && (target & 0x800))
	1725	if (v->type >= TYPE_VOODOO_BANSHEE && (target & 0x800))
1726	1726	{
1727	1727	// Banshee/Voodoo3 2D register writes
1728	1728
r17580	r17581
1900	1900
1901	1901	if (LOG_CMDFIFO) logerror(" PACKET TYPE 4: mask=%X reg=%04X pad=%d\n", (command >> 15) & 0x3fff, target, command >> 29);
1902	1902
1903		if (v->type >= VOODOO_BANSHEE && (target & 0x800))
	1903	if (v->type >= TYPE_VOODOO_BANSHEE && (target & 0x800))
1904	1904	{
1905	1905	// Banshee/Voodoo3 2D register writes
1906	1906
r17580	r17581
2447	2447	/* mask off invalid bits for different cards */
2448	2448	case fbzColorPath:
2449	2449	poly_wait(v->poly, v->regnames[regnum]);
2450		if (v->type < VOODOO_2)
	2450	if (v->type < TYPE_VOODOO_2)
2451	2451	data &= 0x0fffffff;
2452	2452	if (chips & 1) v->reg[fbzColorPath].u = data;
2453	2453	break;
2454	2454
2455	2455	case fbzMode:
2456	2456	poly_wait(v->poly, v->regnames[regnum]);
2457		if (v->type < VOODOO_2)
	2457	if (v->type < TYPE_VOODOO_2)
2458	2458	data &= 0x001fffff;
2459	2459	if (chips & 1) v->reg[fbzMode].u = data;
2460	2460	break;
2461	2461
2462	2462	case fogMode:
2463	2463	poly_wait(v->poly, v->regnames[regnum]);
2464		if (v->type < VOODOO_2)
	2464	if (v->type < TYPE_VOODOO_2)
2465	2465	data &= 0x0000003f;
2466	2466	if (chips & 1) v->reg[fogMode].u = data;
2467	2467	break;
r17580	r17581
2519	2519
2520	2520	/* gamma table access -- Voodoo/Voodoo2 only */
2521	2521	case clutData:
2522		if (v->type <= VOODOO_2 && (chips & 1))
	2522	if (v->type <= TYPE_VOODOO_2 && (chips & 1))
2523	2523	{
2524	2524	poly_wait(v->poly, v->regnames[regnum]);
2525	2525	if (!FBIINIT1_VIDEO_TIMING_RESET(v->reg[fbiInit1].u))
r17580	r17581
2538	2538
2539	2539	/* external DAC access -- Voodoo/Voodoo2 only */
2540	2540	case dacData:
2541		if (v->type <= VOODOO_2 && (chips & 1))
	2541	if (v->type <= TYPE_VOODOO_2 && (chips & 1))
2542	2542	{
2543	2543	poly_wait(v->poly, v->regnames[regnum]);
2544	2544	if (!(data & 0x800))
r17580	r17581
2553	2553	case vSync:
2554	2554	case backPorch:
2555	2555	case videoDimensions:
2556		if (v->type <= VOODOO_2 && (chips & 1))
	2556	if (v->type <= TYPE_VOODOO_2 && (chips & 1))
2557	2557	{
2558	2558	poly_wait(v->poly, v->regnames[regnum]);
2559	2559	v->reg[regnum].u = data;
r17580	r17581
2565	2565	attoseconds_t stddiff, meddiff, vgadiff;
2566	2566	rectangle visarea;
2567	2567
2568		if (v->type == VOODOO_2)
	2568	if (v->type == TYPE_VOODOO_2)
2569	2569	{
2570	2570	htotal = ((v->reg[hSync].u >> 16) & 0x7ff) + 1 + (v->reg[hSync].u & 0x1ff) + 1;
2571	2571	vtotal = ((v->reg[vSync].u >> 16) & 0x1fff) + (v->reg[vSync].u & 0x1fff);
r17580	r17581
2645	2645	/* fbiInit0 can only be written if initEnable says we can -- Voodoo/Voodoo2 only */
2646	2646	case fbiInit0:
2647	2647	poly_wait(v->poly, v->regnames[regnum]);
2648		if (v->type <= VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
	2648	if (v->type <= TYPE_VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
2649	2649	{
2650	2650	v->reg[fbiInit0].u = data;
2651	2651	if (FBIINIT0_GRAPHICS_RESET(data))
r17580	r17581
2659	2659	/* fbiInit5-7 are Voodoo 2-only; ignore them on anything else */
2660	2660	case fbiInit5:
2661	2661	case fbiInit6:
2662		if (v->type < VOODOO_2)
	2662	if (v->type < TYPE_VOODOO_2)
2663	2663	break;
2664	2664	/* else fall through... */
2665	2665
r17580	r17581
2669	2669	case fbiInit2:
2670	2670	case fbiInit4:
2671	2671	poly_wait(v->poly, v->regnames[regnum]);
2672		if (v->type <= VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
	2672	if (v->type <= TYPE_VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
2673	2673	{
2674	2674	v->reg[regnum].u = data;
2675	2675	recompute_video_memory(v);
r17580	r17581
2679	2679
2680	2680	case fbiInit3:
2681	2681	poly_wait(v->poly, v->regnames[regnum]);
2682		if (v->type <= VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
	2682	if (v->type <= TYPE_VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
2683	2683	{
2684	2684	v->reg[regnum].u = data;
2685	2685	v->alt_regmap = FBIINIT3_TRI_REGISTER_REMAP(data);
r17580	r17581
2690	2690
2691	2691	case fbiInit7:
2692	2692	/* case swapPending: -- Banshee */
2693		if (v->type == VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
	2693	if (v->type == TYPE_VOODOO_2 && (chips & 1) && INITEN_ENABLE_HW_INIT(v->pci.init_enable))
2694	2694	{
2695	2695	poly_wait(v->poly, v->regnames[regnum]);
2696	2696	v->reg[regnum].u = data;
2697	2697	v->fbi.cmdfifo[0].enable = FBIINIT7_CMDFIFO_ENABLE(data);
2698	2698	v->fbi.cmdfifo[0].count_holes = !FBIINIT7_DISABLE_CMDFIFO_HOLES(data);
2699	2699	}
2700		else if (v->type >= VOODOO_BANSHEE)
	2700	else if (v->type >= TYPE_VOODOO_BANSHEE)
2701	2701	v->fbi.swaps_pending++;
2702	2702	break;
2703	2703
2704	2704	/* cmdFifo -- Voodoo2 only */
2705	2705	case cmdFifoBaseAddr:
2706		if (v->type == VOODOO_2 && (chips & 1))
	2706	if (v->type == TYPE_VOODOO_2 && (chips & 1))
2707	2707	{
2708	2708	poly_wait(v->poly, v->regnames[regnum]);
2709	2709	v->reg[regnum].u = data;
r17580	r17581
2713	2713	break;
2714	2714
2715	2715	case cmdFifoBump:
2716		if (v->type == VOODOO_2 && (chips & 1))
	2716	if (v->type == TYPE_VOODOO_2 && (chips & 1))
2717	2717	fatalerror("cmdFifoBump");
2718	2718	break;
2719	2719
2720	2720	case cmdFifoRdPtr:
2721		if (v->type == VOODOO_2 && (chips & 1))
	2721	if (v->type == TYPE_VOODOO_2 && (chips & 1))
2722	2722	v->fbi.cmdfifo[0].rdptr = data;
2723	2723	break;
2724	2724
2725	2725	case cmdFifoAMin:
2726	2726	/* case colBufferAddr: -- Banshee */
2727		if (v->type == VOODOO_2 && (chips & 1))
	2727	if (v->type == TYPE_VOODOO_2 && (chips & 1))
2728	2728	v->fbi.cmdfifo[0].amin = data;
2729		else if (v->type >= VOODOO_BANSHEE && (chips & 1))
	2729	else if (v->type >= TYPE_VOODOO_BANSHEE && (chips & 1))
2730	2730	v->fbi.rgboffs[1] = data & v->fbi.mask & ~0x0f;
2731	2731	break;
2732	2732
2733	2733	case cmdFifoAMax:
2734	2734	/* case colBufferStride: -- Banshee */
2735		if (v->type == VOODOO_2 && (chips & 1))
	2735	if (v->type == TYPE_VOODOO_2 && (chips & 1))
2736	2736	v->fbi.cmdfifo[0].amax = data;
2737		else if (v->type >= VOODOO_BANSHEE && (chips & 1))
	2737	else if (v->type >= TYPE_VOODOO_BANSHEE && (chips & 1))
2738	2738	{
2739	2739	if (data & 0x8000)
2740	2740	v->fbi.rowpixels = (data & 0x7f) << 6;
r17580	r17581
2745	2745
2746	2746	case cmdFifoDepth:
2747	2747	/* case auxBufferAddr: -- Banshee */
2748		if (v->type == VOODOO_2 && (chips & 1))
	2748	if (v->type == TYPE_VOODOO_2 && (chips & 1))
2749	2749	v->fbi.cmdfifo[0].depth = data;
2750		else if (v->type >= VOODOO_BANSHEE && (chips & 1))
	2750	else if (v->type >= TYPE_VOODOO_BANSHEE && (chips & 1))
2751	2751	v->fbi.auxoffs = data & v->fbi.mask & ~0x0f;
2752	2752	break;
2753	2753
2754	2754	case cmdFifoHoles:
2755	2755	/* case auxBufferStride: -- Banshee */
2756		if (v->type == VOODOO_2 && (chips & 1))
	2756	if (v->type == TYPE_VOODOO_2 && (chips & 1))
2757	2757	v->fbi.cmdfifo[0].holes = data;
2758		else if (v->type >= VOODOO_BANSHEE && (chips & 1))
	2758	else if (v->type >= TYPE_VOODOO_BANSHEE && (chips & 1))
2759	2759	{
2760	2760	int rowpixels;
2761	2761
r17580	r17581
3121	3121	mask &= ~(0xf0 + LFB_DEPTH_PRESENT_MSW);
3122	3122
3123	3123	/* select the target buffer */
3124		destbuf = (v->type >= VOODOO_BANSHEE) ? (!forcefront) : LFBMODE_WRITE_BUFFER_SELECT(v->reg[lfbMode].u);
	3124	destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? (!forcefront) : LFBMODE_WRITE_BUFFER_SELECT(v->reg[lfbMode].u);
3125	3125	switch (destbuf)
3126	3126	{
3127	3127	case 0: /* front buffer */
r17580	r17581
3317	3317	UINT8 *dest;
3318	3318
3319	3319	/* extract info */
3320		if (v->type <= VOODOO_2)
	3320	if (v->type <= TYPE_VOODOO_2)
3321	3321	{
3322	3322	lod = (offset >> 15) & 0x0f;
3323	3323	tt = (offset >> 7) & 0xff;
r17580	r17581
3362	3362	UINT16 *dest;
3363	3363
3364	3364	/* extract info */
3365		if (v->type <= VOODOO_2)
	3365	if (v->type <= TYPE_VOODOO_2)
3366	3366	{
3367	3367	lod = (offset >> 15) & 0x0f;
3368	3368	tt = (offset >> 7) & 0xff;
r17580	r17581
3554	3554	UINT8 access;
3555	3555
3556	3556	/* some special stuff for Voodoo 2 */
3557		if (v->type >= VOODOO_2)
	3557	if (v->type >= TYPE_VOODOO_2)
3558	3558	{
3559	3559	/* we might be in CMDFIFO mode */
3560	3560	if (FBIINIT7_CMDFIFO_ENABLE(v->reg[fbiInit7].u))
r17580	r17581
3762	3762	result \|= 1 << 9;
3763	3763
3764	3764	/* Banshee is different starting here */
3765		if (v->type < VOODOO_BANSHEE)
	3765	if (v->type < TYPE_VOODOO_BANSHEE)
3766	3766	{
3767	3767	/* bits 11:10 specifies which buffer is visible */
3768	3768	result \|= v->fbi.frontbuf << 10;
r17580	r17581
3906	3906	y = (offset >> 9) & 0x3ff;
3907	3907
3908	3908	/* select the target buffer */
3909		destbuf = (v->type >= VOODOO_BANSHEE) ? (!forcefront) : LFBMODE_READ_BUFFER_SELECT(v->reg[lfbMode].u);
	3909	destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? (!forcefront) : LFBMODE_READ_BUFFER_SELECT(v->reg[lfbMode].u);
3910	3910	switch (destbuf)
3911	3911	{
3912	3912	case 0: /* front buffer */
r17580	r17581
4807	4807	device start callback
4808	4808	-------------------------------------------------*/
4809	4809
4810		static ~~DEVICE_START(~~ voodoo )
	4810	static void common_start_voodoo(device_t *device, UINT8 type)
4811	4811	{
4812		const voodoo_config config = (const voodoo_config )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	4812	const voodoo_config config = (const voodoo_config )device->static_config();
4813	4813	voodoo_state *v = get_safe_token(device);
4814	4814	const raster_info *info;
4815	4815	void fbmem, tmumem[2];
4816	4816	UINT32 tmumem0;
4817	4817	int val;
4818	4818
4819		/* validate some basic stuff */
4820		assert(device->static_config() == NULL);
4821		assert(downcast<const legacy_device_base *>(device)->inline_config() != NULL);
4822
4823	4819	/* validate configuration */
4824	4820	assert(config->screen != NULL);
4825	4821	assert(config->cputag != NULL);
4826		assert(config->type >= VOODOO_1 && config->type < MAX_VOODOO_TYPES);
4827	4822	assert(config->fbmem > 0);
4828		assert(config->type >= VOODOO_BANSHEE \|\| config->tmumem0 > 0);
4829	4823
4830	4824	/* store a pointer back to the device */
4831	4825	v->device = device;
	4826	v->type = type;
4832	4827
4833	4828	/* copy config data */
4834	4829	v->freq = device->clock();
r17580	r17581
4869	4864	}
4870	4865
4871	4866	/* configure type-specific values */
4872		switch (~~config~~->type)
	4867	switch (v->type)
4873	4868	{
4874		case VOODOO_1:
	4869	case TYPE_VOODOO_1:
4875	4870	v->regaccess = voodoo_register_access;
4876	4871	v->regnames = voodoo_reg_name;
4877	4872	v->alt_regmap = 0;
4878	4873	v->fbi.lfb_stride = 10;
4879	4874	break;
4880	4875
4881		case VOODOO_2:
	4876	case TYPE_VOODOO_2:
4882	4877	v->regaccess = voodoo2_register_access;
4883	4878	v->regnames = voodoo_reg_name;
4884	4879	v->alt_regmap = 0;
4885	4880	v->fbi.lfb_stride = 10;
4886	4881	break;
4887	4882
4888		case VOODOO_BANSHEE:
	4883	case TYPE_VOODOO_BANSHEE:
4889	4884	v->regaccess = banshee_register_access;
4890	4885	v->regnames = banshee_reg_name;
4891	4886	v->alt_regmap = 1;
4892	4887	v->fbi.lfb_stride = 11;
4893	4888	break;
4894	4889
4895		case VOODOO_3:
	4890	case TYPE_VOODOO_3:
4896	4891	v->regaccess = banshee_register_access;
4897	4892	v->regnames = banshee_reg_name;
4898	4893	v->alt_regmap = 1;
r17580	r17581
4918	4913	assert_always(v->screen != NULL, "Unable to find screen attached to voodoo");
4919	4914	v->cpu = device->machine().device(config->cputag);
4920	4915	assert_always(v->cpu != NULL, "Unable to find CPU attached to voodoo");
4921		v->type = config->type;
4922	4916	v->chipmask = 0x01;
4923	4917	v->attoseconds_per_cycle = ATTOSECONDS_PER_SECOND / v->freq;
4924	4918	v->trigger = 51324 + v->index;
r17580	r17581
4936	4930
4937	4931	/* allocate memory */
4938	4932	tmumem0 = config->tmumem0;
4939		if (~~config~~->type <= VOODOO_2)
	4933	if (v->type <= TYPE_VOODOO_2)
4940	4934	{
4941	4935	/* separate FB/TMU memory */
4942	4936	fbmem = auto_alloc_array(device->machine(), UINT8, config->fbmem << 20);
r17580	r17581
4959	4953	/* set up the TMUs */
4960	4954	init_tmu(v, &v->tmu[0], &v->reg[0x100], tmumem[0], tmumem0 << 20);
4961	4955	v->chipmask \|= 0x02;
4962		if (config->tmumem1 != 0 \|\| v->type == VOODOO_3)
	4956	if (config->tmumem1 != 0 \|\| v->type == TYPE_VOODOO_3)
4963	4957	{
4964	4958	init_tmu(v, &v->tmu[1], &v->reg[0x200], tmumem[1], config->tmumem1 << 20);
4965	4959	v->chipmask \|= 0x04;
r17580	r17581
4991	4985	init_save_state(device);
4992	4986	}
4993	4987
	4988	static DEVICE_START( voodoo_1 )
	4989	{
	4990	common_start_voodoo(device, TYPE_VOODOO_1);
	4991	}
	4992	static DEVICE_START( voodoo_2 )
	4993	{
	4994	common_start_voodoo(device, TYPE_VOODOO_2);
	4995	}
4994	4996
	4997	static DEVICE_START( voodoo_banshee )
	4998	{
	4999	common_start_voodoo(device, TYPE_VOODOO_BANSHEE);
	5000	}
	5001
	5002	static DEVICE_START( voodoo_3 )
	5003	{
	5004	common_start_voodoo(device, TYPE_VOODOO_3);
	5005	}
	5006
4995	5007	/*-------------------------------------------------
4996	5008	device exit callback
4997	5009	-------------------------------------------------*/
r17580	r17581
5021	5033	device definition
5022	5034	-------------------------------------------------*/
5023	5035
5024		INLINE const char get_voodoo_name(const device_t device)
5025		{
5026		const voodoo_config config = (device != NULL) ? (const voodoo_config )downcast<const legacy_device_base *>(device)->inline_config() : NULL;
5027		switch (config->type)
5028		{
5029		default:
5030		case VOODOO_1: return "3dfx Voodoo Graphics";
5031		case VOODOO_2: return "3dfx Voodoo 2";
5032		case VOODOO_BANSHEE: return "3dfx Voodoo Banshee";
5033		case VOODOO_3: return "3dfx Voodoo 3";
5034		}
5035		}
5036
5037	5036	DEVICE_GET_INFO(voodoo)
5038	5037	{
5039	5038	switch (state)
5040	5039	{
5041	5040	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(voodoo_state); break;
5042	5041
5043		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(voodoo_config); break;
5044
5045		case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(voodoo); break;
5046
5047	5042	case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(voodoo); break;
5048	5043
5049	5044	case DEVINFO_FCT_STOP: info->stop = DEVICE_STOP_NAME(voodoo); break;
	5045	}
	5046	}
5050	5047
5051		case DEVINFO_STR_NAME: strcpy(info->s, get_voodoo_name(device)); break;
	5048
	5049	DEVICE_GET_INFO(voodoo_1)
	5050	{
	5051	switch (state)
	5052	{
	5053	case DEVINFO_STR_NAME: strcpy(info->s, "3dfx Voodoo Graphics"); break;
	5054	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(voodoo_1); break;
	5055	default: DEVICE_GET_INFO_CALL(voodoo); break;
5052	5056	}
5053	5057	}
5054	5058
	5059	DEVICE_GET_INFO(voodoo_2)
	5060	{
	5061	switch (state)
	5062	{
	5063	case DEVINFO_STR_NAME: strcpy(info->s, "3dfx Voodoo 2"); break;
	5064	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(voodoo_2); break;
	5065	default: DEVICE_GET_INFO_CALL(voodoo); break;
	5066	}
	5067	}
	5068	DEVICE_GET_INFO(voodoo_banshee)
	5069	{
	5070	switch (state)
	5071	{
	5072	case DEVINFO_STR_NAME: strcpy(info->s, "3dfx Voodoo Banshee"); break;
	5073	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(voodoo_banshee); break;
	5074	default: DEVICE_GET_INFO_CALL(voodoo); break;
	5075	}
	5076	}
	5077
	5078	DEVICE_GET_INFO(voodoo_3)
	5079	{
	5080	switch (state)
	5081	{
	5082	case DEVINFO_STR_NAME: strcpy(info->s, "3dfx Voodoo 3"); break;
	5083	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(voodoo_3); break;
	5084	default: DEVICE_GET_INFO_CALL(voodoo); break;
	5085	}
	5086	}
	5087
	5088
5055	5089	/***************************************************************************
5056	5090	COMMAND HANDLERS
5057	5091	***************************************************************************/
r17580	r17581
5081	5115	if (FBZMODE_RGB_BUFFER_MASK(v->reg[fbzMode].u))
5082	5116	{
5083	5117	/* determine the draw buffer */
5084		int destbuf = (v->type >= VOODOO_BANSHEE) ? 1 : FBZMODE_DRAW_BUFFER(v->reg[fbzMode].u);
	5118	int destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? 1 : FBZMODE_DRAW_BUFFER(v->reg[fbzMode].u);
5085	5119	switch (destbuf)
5086	5120	{
5087	5121	case 0: /* front buffer */
r17580	r17581
5219	5253	// poly_wait(v->poly, "triangle");
5220	5254
5221	5255	/* determine the draw buffer */
5222		destbuf = (v->type >= VOODOO_BANSHEE) ? 1 : FBZMODE_DRAW_BUFFER(v->reg[fbzMode].u);
	5256	destbuf = (v->type >= TYPE_VOODOO_BANSHEE) ? 1 : FBZMODE_DRAW_BUFFER(v->reg[fbzMode].u);
5223	5257	switch (destbuf)
5224	5258	{
5225	5259	case 0: /* front buffer */
r17580	r17581
5679	5713	}
5680	5714	}
5681	5715
5682		DEFINE_LEGACY_DEVICE(VOODOO_GRAPHICS, voodoo);
	5716	DEFINE_LEGACY_DEVICE(VOODOO_1, voodoo_1);
	5717	DEFINE_LEGACY_DEVICE(VOODOO_2, voodoo_2);
	5718	DEFINE_LEGACY_DEVICE(VOODOO_BANSHEE, voodoo_banshee);
	5719	DEFINE_LEGACY_DEVICE(VOODOO_3, voodoo_3);
5683	5720
5684
5685	5721	/***************************************************************************
5686	5722	GENERIC RASTERIZERS
5687	5723	***************************************************************************/

trunk/src/emu/video/voodoo.h
r17580	r17581
48	48	/***************************************************************************
49	49	CONSTANTS
50	50	***************************************************************************/
51
52	51	/* enumeration specifying which model of Voodoo we are emulating */
53	52	enum
54	53	{
55		VOODOO_1,
56		VOODOO_2,
57		VOODOO_BANSHEE,
58		VOODOO_3,
59		MAX_VOODOO_TYPES
	54	TYPE_VOODOO_1,
	55	TYPE_VOODOO_2,
	56	TYPE_VOODOO_BANSHEE,
	57	TYPE_VOODOO_3
60	58	};
61	59
62
63	60	#define STD_VOODOO_1_CLOCK 50000000
64	61	#define STD_VOODOO_2_CLOCK 90000000
65	62	#define STD_VOODOO_BANSHEE_CLOCK 90000000
r17580	r17581
77	74	typedef struct _voodoo_config voodoo_config;
78	75	struct _voodoo_config
79	76	{
80		int type;
81	77	UINT8 fbmem;
82	78	UINT8 tmumem0;
83	79	UINT8 tmumem1;
r17580	r17581
93	89	DEVICE CONFIGURATION MACROS
94	90	***************************************************************************/
95	91
96		#define MCFG_3DFX_VOODOO_ADD(_tag, _type, _clock, _fbmem, _screen) \
97		MCFG_DEVICE_ADD(_tag, VOODOO_GRAPHICS, _clock) \
98		MCFG_DEVICE_CONFIG_DATA32(voodoo_config, type, _type) \
99		MCFG_DEVICE_CONFIG_DATA32(voodoo_config, fbmem, _fbmem) \
100		MCFG_DEVICE_CONFIG_DATAPTR(voodoo_config, screen, _screen)
	92	#define MCFG_3DFX_VOODOO_1_ADD(_tag, _clock, _config) \
	93	MCFG_DEVICE_ADD(_tag, VOODOO_1, _clock) \
	94	MCFG_DEVICE_CONFIG(_config)
101	95
102		#define MCFG_3DFX_VOODOO_1_ADD(_tag, _clock, _fbmem, _screen) \
103		MCFG_3DFX_VOODOO_ADD(_tag, VOODOO_1, _clock, _fbmem, _screen)
	96	#define MCFG_3DFX_VOODOO_2_ADD(_tag, _clock, _config) \
	97	MCFG_DEVICE_ADD(_tag, VOODOO_2, _clock) \
	98	MCFG_DEVICE_CONFIG(_config)
104	99
105		#define MCFG_3DFX_VOODOO_2_ADD(_tag, _clock, _fbmem, _screen) \
106		MCFG_3DFX_VOODOO_ADD(_tag, VOODOO_2, _clock, _fbmem, _screen)
	100	#define MCFG_3DFX_VOODOO_BANSHEE_ADD(_tag, _clock, _config) \
	101	MCFG_DEVICE_ADD(_tag, VOODOO_BANSHEE, _clock) \
	102	MCFG_DEVICE_CONFIG(_config)
107	103
108		#define MCFG_3DFX_VOODOO_BANSHEE_ADD(_tag, _clock, _fbmem, _screen) \
109		MCFG_3DFX_VOODOO_ADD(_tag, VOODOO_BANSHEE, _clock, _fbmem, _screen)
	104	#define MCFG_3DFX_VOODOO_3_ADD(_tag, _clock, _config) \
	105	MCFG_DEVICE_ADD(_tag, VOODOO_3, _clock) \
	106	MCFG_DEVICE_CONFIG(_config)
110	107
111		#define MCFG_3DFX_VOODOO_3_ADD(_tag, _clock, _fbmem, _screen) \
112		MCFG_3DFX_VOODOO_ADD(_tag, VOODOO_3, _clock, _fbmem, _screen)
113
114		#define MCFG_3DFX_VOODOO_TMU_MEMORY(_tmu, _tmumem) \
115		MCFG_DEVICE_CONFIG_DATA32(voodoo_config, tmumem##_tmu, _tmumem)
116
117		#define MCFG_3DFX_VOODOO_VBLANK(_vblank) \
118		MCFG_DEVICE_CONFIG_DATAPTR(voodoo_config, vblank, _vblank)
119
120		#define MCFG_3DFX_VOODOO_STALL(_stall) \
121		MCFG_DEVICE_CONFIG_DATAPTR(voodoo_config, stall, _stall)
122
123		#define MCFG_3DFX_VOODOO_CPU(_cputag) \
124		MCFG_DEVICE_CONFIG_DATAPTR(voodoo_config, cputag, _cputag)
125
126		#define MCFG_3DFX_VOODOO_MODIFY(_tag) \
127		MCFG_DEVICE_MODIFY(_tag)
128
129
130
131	108	/***************************************************************************
132	109	FUNCTION PROTOTYPES
133	110	***************************************************************************/
r17580	r17581
151	128
152	129	/* ----- device interface ----- */
153	130
154		DECLARE_LEGACY_DEVICE(VOODOO_GRAPHICS, voodoo);
155
	131	DECLARE_LEGACY_DEVICE(VOODOO_1, voodoo_1);
	132	DECLARE_LEGACY_DEVICE(VOODOO_2, voodoo_2);
	133	DECLARE_LEGACY_DEVICE(VOODOO_BANSHEE, voodoo_banshee);
	134	DECLARE_LEGACY_DEVICE(VOODOO_3, voodoo_3);
156	135	#endif

trunk/src/emu/devlegcy.c
r17580	r17581
52	52	legacy_device_base::legacy_device_base(const machine_config &mconfig, device_type type, const char tag, device_t owner, UINT32 clock, device_get_config_func get_config)
53	53	: device_t(mconfig, type, "Legacy Device", tag, owner, clock),
54	54	m_get_config_func(get_config),
55		m_inline_config(NULL),
56	55	m_token(NULL)
57	56	{
58		// allocate a buffer for the inline configuration
59		UINT32 configlen = (UINT32)get_legacy_int(DEVINFO_INT_INLINE_CONFIG_BYTES);
60		if (configlen != 0)
61		m_inline_config = global_alloc_array_clear(UINT8, configlen);
62
63	57	// set the proper name
64	58	m_name = get_legacy_string(DEVINFO_STR_NAME);
65	59	m_shortname = get_legacy_string(DEVINFO_STR_SHORTNAME);
r17580	r17581
79	73	legacy_device_base::~legacy_device_base()
80	74	{
81	75	global_free(m_token);
82		global_free(m_inline_config);
83	76	}
84	77
85	78
r17580	r17581
137	130
138	131
139	132	//-------------------------------------------------
140		// static_set_inline32 - configuration helper to
141		// set a 32-bit value in the inline configuration
142		//-------------------------------------------------
143
144		void legacy_device_base::static_set_inline32(device_t &device, UINT32 offset, UINT32 size, UINT32 value)
145		{
146		legacy_device_base &legacy = downcast<legacy_device_base &>(device);
147		void dest = reinterpret_cast<UINT8 >(legacy.m_inline_config) + offset;
148		if (size == 1)
149		reinterpret_cast<UINT8 >(dest) = value;
150		else if (size == 2)
151		reinterpret_cast<UINT16 >(dest) = value;
152		else if (size == 4)
153		reinterpret_cast<UINT32 >(dest) = value;
154		else
155		throw emu_fatalerror("Unexpected size %d in legacy_device_base::static_set_inline32", size);
156		}
157
158
159		//-------------------------------------------------
160		// static_set_inline64 - configuration helper to
161		// set a 64-bit value in the inline configuration
162		//-------------------------------------------------
163
164		void legacy_device_base::static_set_inline64(device_t &device, UINT32 offset, UINT32 size, UINT64 value)
165		{
166		legacy_device_base &legacy = downcast<legacy_device_base &>(device);
167		void dest = reinterpret_cast<UINT8 >(legacy.m_inline_config) + offset;
168		if (size == 1)
169		reinterpret_cast<UINT8 >(dest) = value;
170		else if (size == 2)
171		reinterpret_cast<UINT16 >(dest) = value;
172		else if (size == 4)
173		reinterpret_cast<UINT32 >(dest) = value;
174		else if (size == 8)
175		reinterpret_cast<UINT64 >(dest) = value;
176		else
177		throw emu_fatalerror("Unexpected size %d in legacy_device_base::static_set_inline64", size);
178		}
179
180
181		//-------------------------------------------------
182		// static_set_inline_float - configuration helper
183		// to set a floating-point value in the inline
184		// configuration
185		//-------------------------------------------------
186
187		void legacy_device_base::static_set_inline_float(device_t &device, UINT32 offset, UINT32 size, float value)
188		{
189		legacy_device_base &legacy = downcast<legacy_device_base &>(device);
190		void dest = reinterpret_cast<UINT8 >(legacy.m_inline_config) + offset;
191		if (size == 4)
192		reinterpret_cast<float >(dest) = value;
193		else
194		throw emu_fatalerror("Unexpected size %d in legacy_device_base::static_set_inline_float", size);
195		}
196
197
198		//-------------------------------------------------
199	133	// device_start - called to start up a device
200	134	//-------------------------------------------------
201	135

trunk/src/emu/devlegcy.h
r17580	r17581
48	48	// CONSTANTS
49	49	//**************************************************************************
50	50
51		#define DEVINFO_IMAGE_CREATE_OPTMAX 32
52
53	51	// state constants passed to the device_get_config_func
54	52	enum
55	53	{
r17580	r17581
57	55	DEVINFO_INT_FIRST = 0x00000,
58	56
59	57	DEVINFO_INT_TOKEN_BYTES = DEVINFO_INT_FIRST, // R/O: bytes to allocate for the token
60		DEVINFO_INT_INLINE_CONFIG_BYTES, // R/O: bytes to allocate for the inline configuration
61	58
62	59	DEVINFO_INT_ENDIANNESS, // R/O: either ENDIANNESS_BIG or ENDIANNESS_LITTLE
63	60	DEVINFO_INT_DATABUS_WIDTH, // R/O: data bus size for each address space (8,16,32,64)
r17580	r17581
194	191	#define DEVICE_RESET(name) void DEVICE_RESET_NAME(name)(device_t *device)
195	192	#define DEVICE_RESET_CALL(name) DEVICE_RESET_NAME(name)(device)
196	193
197
198	194	//**************************************************************************
199		// DEVICE_CONFIGURATION_MACROS
200		//**************************************************************************
201
202		#define structsizeof(_struct, _field) sizeof(((_struct *)NULL)->_field)
203
204		// inline device configurations that require 32 bits of storage in the token
205		#define MCFG_DEVICE_CONFIG_DATA32_EXPLICIT(_size, _offset, _val) \
206		legacy_device_base::static_set_inline32(*device, _offset, _size, (UINT32)(_val));
207
208		#define MCFG_DEVICE_CONFIG_DATA32(_struct, _field, _val) \
209		MCFG_DEVICE_CONFIG_DATA32_EXPLICIT(structsizeof(_struct, _field), offsetof(_struct, _field), _val)
210
211		#define MCFG_DEVICE_CONFIG_DATA32_ARRAY(_struct, _field, _index, _val) \
212		MCFG_DEVICE_CONFIG_DATA32_EXPLICIT(structsizeof(_struct, _field[0]), offsetof(_struct, _field) + (_index) * structsizeof(_struct, _field[0]), _val)
213
214		#define MCFG_DEVICE_CONFIG_DATA32_ARRAY_MEMBER(_struct, _field, _index, _memstruct, _member, _val) \
215		MCFG_DEVICE_CONFIG_DATA32_EXPLICIT(structsizeof(_memstruct, _member), offsetof(_struct, _field) + (_index) * structsizeof(_struct, _field[0]) + offsetof(_memstruct, _member), _val)
216
217
218		// inline device configurations that require 64 bits of storage in the token
219		#define MCFG_DEVICE_CONFIG_DATA64_EXPLICIT(_size, _offset, _val) \
220		legacy_device_base::static_set_inline64(*device, _offset, _size, (UINT64)(_val));
221
222		#define MCFG_DEVICE_CONFIG_DATA64(_struct, _field, _val) \
223		MCFG_DEVICE_CONFIG_DATA64_EXPLICIT(structsizeof(_struct, _field), offsetof(_struct, _field), _val)
224
225		#define MCFG_DEVICE_CONFIG_DATA64_ARRAY(_struct, _field, _index, _val) \
226		MCFG_DEVICE_CONFIG_DATA64_EXPLICIT(structsizeof(_struct, _field[0]), offsetof(_struct, _field) + (_index) * structsizeof(_struct, _field[0]), _val)
227
228		#define MCFG_DEVICE_CONFIG_DATA64_ARRAY_MEMBER(_struct, _field, _index, _memstruct, _member, _val) \
229		MCFG_DEVICE_CONFIG_DATA64_EXPLICIT(structsizeof(_memstruct, _member), offsetof(_struct, _field) + (_index) * structsizeof(_struct, _field[0]) + offsetof(_memstruct, _member), _val)
230
231
232		// inline device configurations that require a pointer-sized amount of storage in the token
233		#ifdef PTR64
234		#define MCFG_DEVICE_CONFIG_DATAPTR_EXPLICIT(_struct, _size, _offset) MCFG_DEVICE_CONFIG_DATA64_EXPLICIT(_struct, _size, _offset)
235		#define MCFG_DEVICE_CONFIG_DATAPTR(_struct, _field, _val) MCFG_DEVICE_CONFIG_DATA64(_struct, _field, _val)
236		#define MCFG_DEVICE_CONFIG_DATAPTR_ARRAY(_struct, _field, _index, _val) MCFG_DEVICE_CONFIG_DATA64_ARRAY(_struct, _field, _index, _val)
237		#define MCFG_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(_struct, _field, _index, _memstruct, _member, _val) MCFG_DEVICE_CONFIG_DATA64_ARRAY_MEMBER(_struct, _field, _index, _memstruct, _member, _val)
238		#else
239		#define MCFG_DEVICE_CONFIG_DATAPTR_EXPLICIT(_struct, _size, _offset) MCFG_DEVICE_CONFIG_DATA32_EXPLICIT(_struct, _size, _offset)
240		#define MCFG_DEVICE_CONFIG_DATAPTR(_struct, _field, _val) MCFG_DEVICE_CONFIG_DATA32(_struct, _field, _val)
241		#define MCFG_DEVICE_CONFIG_DATAPTR_ARRAY(_struct, _field, _index, _val) MCFG_DEVICE_CONFIG_DATA32_ARRAY(_struct, _field, _index, _val)
242		#define MCFG_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(_struct, _field, _index, _memstruct, _member, _val) MCFG_DEVICE_CONFIG_DATA32_ARRAY_MEMBER(_struct, _field, _index, _memstruct, _member, _val)
243		#endif
244
245
246
247		//**************************************************************************
248	195	// TYPE DEFINITIONS
249	196	//**************************************************************************
250	197
r17580	r17581
299	246	virtual ~legacy_device_base();
300	247
301	248	public:
302		// access to legacy inline configuartion
303		void *inline_config() const { return m_inline_config; }
304
305		// inline configuration helpers
306		static void static_set_inline32(device_t &device, UINT32 offset, UINT32 size, UINT32 value);
307		static void static_set_inline64(device_t &device, UINT32 offset, UINT32 size, UINT64 value);
308		static void static_set_inline_float(device_t &device, UINT32 offset, UINT32 size, float value);
309
310	249	// access to legacy token
311	250	void *token() const { assert(m_token != NULL); return m_token; }
312	251
r17580	r17581
327	266
328	267	// configuration state
329	268	device_get_config_func m_get_config_func;
330		void * m_inline_config;
331	269
332	270	// internal state
333	271	void * m_token;

trunk/src/emu/machine/74153.c
r17580	r17581
136	136
137	137	static DEVICE_START( ttl74153 )
138	138	{
139		ttl74153_config config = (ttl74153_config )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	139	ttl74153_config config = (ttl74153_config )device->static_config();
140	140	ttl74153_state *state = get_safe_token(device);
141	141	state->output_cb = config->output_cb;
142	142
r17580	r17581
183	183
184	184	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(ttl74153_state); break;
185	185
186		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(ttl74153_config); break;
187
188	186	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(ttl74153); break;
189	187
190	188	case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(ttl74153); break;

trunk/src/emu/machine/74153.h
r17580	r17581
46	46	};
47	47
48	48
49		#define MCFG_74153_ADD(_tag, _~~output_~~cb) \
	49	#define MCFG_74153_ADD(_tag, _config) \
50	50	MCFG_DEVICE_ADD(_tag, TTL74153, 0) \
51		MCFG_DEVICE_CONFIG~~_DATAPTR~~(~~ttl74153~~_config~~, output_cb, _output_cb~~)
	51	MCFG_DEVICE_CONFIG(_config)
52	52
53	53
54	54

trunk/src/emu/machine/smc91c9x.c
r17580	r17581
509	509
510	510	static DEVICE_START( smc91c9x )
511	511	{
512		const smc91c9x_config config = (const smc91c9x_config )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	512	const smc91c9x_config config = (const smc91c9x_config )device->static_config();
513	513	smc91c9x_state *smc = get_safe_token(device);
514	514
515	515	/* validate some basic stuff */
516	516	assert(device != NULL);
517		assert(device->static_config() == NULL);
518		assert(downcast<const legacy_device_base *>(device)->inline_config() != NULL);
519	517
520	518	/* store a pointer back to the device */
521	519	smc->device = device;
r17580	r17581
596	594	{
597	595	/* --- the following bits of info are returned as 64-bit signed integers --- */
598	596	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(smc91c9x_state); break;
599		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(smc91c9x_config); break;
600	597
601	598	/* --- the following bits of info are returned as pointers to data or functions --- */
602	599	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(smc91c9x); break;

trunk/src/emu/machine/smc91c9x.h
r17580	r17581
31	31	DEVICE CONFIGURATION MACROS
32	32	***************************************************************************/
33	33
34		#define MCFG_SMC91C94_ADD(_tag, _c~~allback~~) \
	34	#define MCFG_SMC91C94_ADD(_tag, _config) \
35	35	MCFG_DEVICE_ADD(_tag, SMC91C94, 0) \
36		MCFG_DEVICE_CONFIG~~_DATAPTR~~(~~smc91c9x~~_config~~, interrupt, _callback~~)
	36	MCFG_DEVICE_CONFIG(_config)
37	37
38		#define MCFG_SMC91C96_ADD(_tag, _c~~allback~~) \
	38	#define MCFG_SMC91C96_ADD(_tag, _config) \
39	39	MCFG_DEVICE_ADD(_tag, SMC91C96, 0) \
40		MCFG_DEVICE_CONFIG~~_DATAPTR~~(~~smc91c9x~~_config~~, interrupt, _callback~~)
	40	MCFG_DEVICE_CONFIG(_config)
41	41
42	42
43	43

trunk/src/emu/machine/latch8.c
r17580	r17581
186	186	int i;
187	187
188	188	/* validate arguments */
189		latch8->intf = (latch8_config )downcast<~~const~~ legacy_device~~_base~~ >(device)->inline_config();
	189	latch8->intf = (latch8_config )&downcast<latch8_device >(device)->m_inline_config;
190	190
191	191	latch8->value = 0x0;
192	192
r17580	r17581
238	238	{
239	239	/* --- the following bits of info are returned as 64-bit signed integers --- */
240	240	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(latch8_t); break;
241		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(latch8_config); break;
242	241
243	242	/* --- the following bits of info are returned as pointers to data or functions --- */
244	243	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(latch8);break;
r17580	r17581
254	253	}
255	254	}
256	255
	256	latch8_device::latch8_device(const machine_config &mconfig, device_type type, const char tag, device_t owner, UINT32 clock)
	257	: legacy_device_base(mconfig, type, tag, owner, clock, DEVICE_GET_INFO_NAME(latch8))
	258	{
	259	memset((void*)&m_inline_config,0,sizeof(m_inline_config));
	260	}
257	261
258		~~DEFINE~~_LEGA~~CY_DEVICE(LA~~TCH8, latch8);
	262	const device_type LATCH8 = &legacy_device_creator<latch8_device>;

trunk/src/emu/machine/latch8.h
r17580	r17581
17	17
18	18	#include "devlegcy.h"
19	19
20		DECLARE_LEGACY_DEVICE(LATCH8, latch8);
21
22	20	/***************************************************************************
23	21	TYPE DEFINITIONS
24	22	***************************************************************************/
r17580	r17581
45	43	latch8_devread devread[8];
46	44	};
47	45
	46
	47	DEVICE_GET_INFO( latch8 );
	48
	49	class latch8_device : public legacy_device_base
	50	{
	51	public:
	52	latch8_device(const machine_config &mconfig, device_type type, const char tag, device_t owner, UINT32 clock);
	53
	54	latch8_config m_inline_config;
	55
	56	void set_maskout(UINT32 maskout) { m_inline_config.maskout = maskout; }
	57	void set_xorvalue(UINT32 xorvalue) { m_inline_config.xorvalue = xorvalue; }
	58	void set_nosync(UINT32 nosync) { m_inline_config.nosync = nosync; }
	59
	60	void set_discrete_node(const char *dev_tag, int bit, UINT32 node) { m_inline_config.node_device[bit] = dev_tag; m_inline_config.node_map[bit] = node; }
	61	void set_devread(int bit, const char *tag, read8_device_func handler, int from_bit)
	62	{
	63	m_inline_config.devread[bit].from_bit = from_bit;
	64	m_inline_config.devread[bit].tag = tag;
	65	m_inline_config.devread[bit].devread_handler = handler;
	66	}
	67	void set_read(int bit, read8_space_func handler, int from_bit)
	68	{
	69	m_inline_config.devread[bit].from_bit = from_bit;
	70	m_inline_config.devread[bit].read_handler = handler;
	71	}
	72	};
	73
	74	extern const device_type LATCH8;
48	75	/***************************************************************************
49	76	DEVICE CONFIGURATION MACROS
50	77	***************************************************************************/
r17580	r17581
55	82
56	83	/* Bit mask specifying bits to be masked out */
57	84	#define MCFG_LATCH8_MASKOUT(_maskout) \
58		~~MCFG~~_~~DEVICE_CONFIG_DATA32(~~latch8_~~conf~~ig, maskout, _maskout)
	85	static_cast<latch8_device *>(device)->set_maskout(_maskout);
59	86
60	87	/* Bit mask specifying bits to be inverted */
61	88	#define MCFG_LATCH8_INVERT(_xor) \
62		~~MCFG~~_~~DEVICE_CONFIG_DATA32(~~latch8_~~conf~~ig, xorvalue, _xor)
	89	static_cast<latch8_device *>(device)->set_xorvalue(_xor);
63	90
64	91	/* Bit mask specifying bits not needing cpu synchronization. */
65	92	#define MCFG_LATCH8_NOSYNC(_nosync) \
66		~~MCFG~~_~~DEVICE_CONFIG_DATA32(~~latch8_~~conf~~ig, nosync, _nosync)
	93	static_cast<latch8_device *>(device)->set_nosync(_nosync);
67	94
68	95	/* Write bit to discrete node */
69	96	#define MCFG_LATCH8_DISCRETE_NODE(_device, _bit, _node) \
70		MCFG_DEVICE_CONFIG_DATAPTR_ARRAY(latch8_config, node_device, _bit, _device) \
71		MCFG_DEVICE_CONFIG_DATA32_ARRAY(latch8_config, node_map, _bit, _node)
	97	static_cast<latch8_device *>(device)->set_discrete_node(_device, _bit, _node);
72	98
73	99	/* Upon read, replace bits by reading from another device handler */
74	100	#define MCFG_LATCH8_DEVREAD(_bit, _tag, _handler, _from_bit) \
75		MCFG_DEVICE_CONFIG_DATA32_ARRAY_MEMBER(latch8_config, devread, _bit, latch8_devread, from_bit, _from_bit) \
76		MCFG_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(latch8_config, devread, _bit, latch8_devread, tag, _tag) \
77		MCFG_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(latch8_config, devread, _bit, latch8_devread, devread_handler, _handler) \
	101	static_cast<latch8_device *>(device)->set_devread(_bit, _tag, _handler, _from_bit);
78	102
79	103	/* Upon read, replace bits by reading from another machine handler */
80	104	#define MCFG_LATCH8_READ(_bit, _handler, _from_bit) \
81		MCFG_DEVICE_CONFIG_DATA32_ARRAY_MEMBER(latch8_config, devread, _bit, latch8_devread, from_bit, _from_bit) \
82		MCFG_DEVICE_CONFIG_DATAPTR_ARRAY_MEMBER(latch8_config, devread, _bit, latch8_devread, read_handler, _handler) \
	105	static_cast<latch8_device *>(device)->set_read(_bit, _handler, _from_bit);
83	106
84	107	/* Accessor macros */
85	108

trunk/src/emu/machine/idectrl.c
r17580	r17581
203	203
204	204	INLINE void signal_interrupt(ide_state *ide)
205	205	{
206		const ide_config config = (const ide_config )~~downcast<const legacy_dev~~i~~ce_base *>(i~~de->device)->i~~nline~~_config();
	206	const ide_config config = (const ide_config )ide->device->static_config();
207	207
208	208	LOG(("IDE interrupt assert\n"));
209	209
r17580	r17581
217	217
218	218	INLINE void clear_interrupt(ide_state *ide)
219	219	{
220		const ide_config config = (const ide_config )~~downcast<const legacy_dev~~i~~ce_base *>(i~~de->device)->i~~nline~~_config();
	220	const ide_config config = (const ide_config )ide->device->static_config();
221	221
222	222	LOG(("IDE interrupt clear\n"));
223	223
r17580	r17581
1839	1839
1840	1840	/* validate some basic stuff */
1841	1841	assert(device != NULL);
1842		assert(device->static_config() == NULL);
1843		assert(downcast<const legacy_device_base *>(device)->inline_config() != NULL);
	1842	assert(device->static_config() != NULL);
1844	1843
1845	1844	/* store a pointer back to the device */
1846	1845	ide->device = device;
1847	1846
1848	1847	/* set MAME harddisk handle */
1849		config = (const ide_config )d~~owncast<const l~~e~~gacy_de~~vice~~_base >(device)~~->i~~nline~~_config();
	1848	config = (const ide_config *)device->static_config();
1850	1849
1851	1850	ide->drive[0].slot = device->owner()->subdevice<ide_slot_device>("drive_0");
1852	1851	ide->drive[1].slot = device->owner()->subdevice<ide_slot_device>("drive_1");
r17580	r17581
1954	1953	{
1955	1954	/* --- the following bits of info are returned as 64-bit signed integers --- */
1956	1955	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(ide_state); break;
1957		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(ide_config); break;
1958	1956
1959	1957	/* --- the following bits of info are returned as pointers to data or functions --- */
1960	1958	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(ide_controller); break;

trunk/src/emu/machine/74148.c
r17580	r17581
180	180
181	181	static DEVICE_START( ttl74148 )
182	182	{
183		ttl74148_config config = (ttl74148_config )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	183	ttl74148_config config = (ttl74148_config )device->static_config();
184	184	ttl74148_state *state = get_safe_token(device);
185	185	state->output_cb = config->output_cb;
186	186
r17580	r17581
221	221	{
222	222	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(ttl74148_state); break;
223	223
224		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(ttl74148_config); break;
225
226	224	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(ttl74148); break;
227	225
228	226	case DEVINFO_FCT_RESET: info->reset = DEVICE_RESET_NAME(ttl74148); break;

trunk/src/emu/machine/idectrl.h
r17580	r17581
146	146	DEVICE CONFIGURATION MACROS
147	147	***************************************************************************/
148	148
149		#define MCFG_IDE_CONTROLLER_ADD(_tag, _c~~allback~~, _slotintf, _master, _slave, _fixed) \
	149	#define MCFG_IDE_CONTROLLER_ADD(_tag, _config, _slotintf, _master, _slave, _fixed) \
150	150	MCFG_DEVICE_ADD(_tag, IDE_CONTROLLER, 0) \
151		MCFG_DEVICE_CONFIG~~_DATAPTR~~(~~ide~~_config~~, interrupt, _callback~~) \
	151	MCFG_DEVICE_CONFIG(_config) \
152	152	MCFG_IDE_SLOT_ADD("drive_0", _slotintf, _master, NULL, _fixed) \
153	153	MCFG_IDE_SLOT_ADD("drive_1", _slotintf, _slave, NULL, _fixed) \
154	154
155		#define MCFG_IDE_BUS_MASTER_SPACE(_tag, _cpu, _space) \
156		MCFG_DEVICE_MODIFY(_tag) \
157		MCFG_DEVICE_CONFIG_DATAPTR(ide_config, bmcpu, _cpu) \
158		MCFG_DEVICE_CONFIG_DATA32(ide_config, bmspace, AS_##_space)
159
160	155	#define MCFG_IDE_SLOT_ADD(_tag, _slot_intf, _def_slot, _def_inp, _fixed) \
161	156	MCFG_DEVICE_ADD(_tag, IDE_SLOT, 0) \
162	157	MCFG_DEVICE_SLOT_INTERFACE(_slot_intf, _def_slot, _def_inp, _fixed) \

trunk/src/emu/machine/68681.c
r17580	r17581
913	913	{
914	914	/* --- the following bits of info are returned as 64-bit signed integers --- */
915	915	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(duart68681_state); break;
916		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(duart68681_config); break;
917	916
918	917	/* --- the following bits of info are returned as pointers to data or functions --- */
919	918	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(duart68681); break;

trunk/src/emu/machine/74148.h
r17580	r17581
51	51	};
52	52
53	53
54		#define MCFG_74148_ADD(_tag, _~~output_~~cb) \
	54	#define MCFG_74148_ADD(_tag, _config) \
55	55	MCFG_DEVICE_ADD(_tag, TTL74148, 0) \
56		MCFG_DEVICE_CONFIG~~_DATAPTR~~(~~ttl74148~~_config~~, output_cb, _output_cb~~)
	56	MCFG_DEVICE_CONFIG(_config)
57	57
58	58
59	59	/* must call ttl74148_update() after setting the inputs */

trunk/src/mess/machine/sst39vfx.c
r17580	r17581
49	49	assert(device != NULL);
50	50	assert(device->type() == SST39VF020 \|\| device->type() == SST39VF400A);
51	51
52		return (const sst39vfx_config ) d~~owncast<const l~~e~~gacy_de~~vice~~_base >(device)~~->i~~nline~~_config();
	52	return (const sst39vfx_config *)device->static_config();
53	53	}
54	54
55	55
r17580	r17581
189	189	{
190	190	/* --- the following bits of info are returned as 64-bit signed integers --- */
191	191	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(sst39vfx_t); break;
192		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(sst39vfx_config); break;
193	192
194	193	/* --- the following bits of info are returned as pointers to data or functions --- */
195	194	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(sst39vf020); break;

trunk/src/mess/machine/sst39vfx.h
r17580	r17581
31	31
32	32	DECLARE_LEGACY_DEVICE(SST39VF020, sst39vf020);
33	33
34		#define MCFG_SST39VF020_ADD(_tag,_c~~pu_datawidth,_cpu_e~~ndi~~aness~~) \
	34	#define MCFG_SST39VF020_ADD(_tag, _config) \
35	35	MCFG_DEVICE_ADD(_tag, SST39VF020, 0) \
36		MCFG_DEVICE_CONFIG_DATA32(sst39vfx_config, cpu_datawidth, _cpu_datawidth) \
37		MCFG_DEVICE_CONFIG_DATA32(sst39vfx_config, cpu_endianess, _cpu_endianess)
	36	MCFG_DEVICE_CONFIG(_config)
38	37
39	38	#define MCFG_SST39VF020_REMOVE(_tag) \
40	39	MCFG_DEVICE_REMOVE(_tag)
41	40
42	41	DECLARE_LEGACY_DEVICE(SST39VF400A, sst39vf400a);
43	42
44		#define MCFG_SST39VF400A_ADD(_tag,_c~~pu_datawidth,_cpu_e~~ndi~~aness~~) \
	43	#define MCFG_SST39VF400A_ADD(_tag,_config) \
45	44	MCFG_DEVICE_ADD(_tag, SST39VF400A, 0) \
46		MCFG_DEVICE_CONFIG_DATA32(sst39vfx_config, cpu_datawidth, _cpu_datawidth) \
47		MCFG_DEVICE_CONFIG_DATA32(sst39vfx_config, cpu_endianess, _cpu_endianess)
	45	MCFG_DEVICE_CONFIG(_config)
48	46
49	47	#define MCFG_SST39VF400A_REMOVE(_tag) \
50	48	MCFG_DEVICE_REMOVE(_tag)

trunk/src/mess/machine/c64_ide64.c
r17580	r17581
46	46	//-------------------------------------------------
47	47	// MACHINE_CONFIG_FRAGMENT( c64_ide64 )
48	48	//-------------------------------------------------
	49	static const ide_config ide_intf =
	50	{
	51	NULL,
	52	NULL,
	53	0
	54	};
49	55
50	56	static MACHINE_CONFIG_FRAGMENT( c64_ide64 )
51	57	MCFG_ATMEL_29C010_ADD(AT29C010A_TAG)
52	58	MCFG_DS1302_ADD(DS1302_TAG, XTAL_32_768kHz)
53	59
54		MCFG_IDE_CONTROLLER_ADD(IDE_TAG, ~~NULL~~, ide_image_devices, "hdd", "hdd", false)
	60	MCFG_IDE_CONTROLLER_ADD(IDE_TAG, ide_intf, ide_image_devices, "hdd", "hdd", false)
55	61	MACHINE_CONFIG_END
56	62
57	63

trunk/src/mess/machine/isa_ide.c
r17580	r17581
40	40	}
41	41	}
42	42
	43	static const ide_config ide_intf =
	44	{
	45	ide_interrupt,
	46	NULL,
	47	0
	48	};
43	49
44	50	static MACHINE_CONFIG_FRAGMENT( ide )
45		MCFG_IDE_CONTROLLER_ADD("ide", ide_int~~errupt~~, ide_image_devices, "hdd", "hdd", false)
	51	MCFG_IDE_CONTROLLER_ADD("ide", ide_intf, ide_image_devices, "hdd", "hdd", false)
46	52	MACHINE_CONFIG_END
47	53
48	54	static INPUT_PORTS_START( ide )

trunk/src/mess/machine/ti99/tn_ide.c
r17580	r17581
334	334	DEVCB_DEVICE_LINE_MEMBER(DEVICE_SELF_OWNER, nouspikel_ide_interface_device, clock_interrupt_callback)
335	335	};
336	336
	337	static const ide_config ide_intf =
	338	{
	339	ide_interrupt_callback,
	340	NULL,
	341	0
	342	};
	343
337	344	MACHINE_CONFIG_FRAGMENT( tn_ide )
338	345	MCFG_RTC65271_ADD( "ide_rtc", ide_rtc_cfg )
339		MCFG_IDE_CONTROLLER_ADD( "ide", ide_int~~errupt_callback~~, ide_image_devices, "hdd", NULL, false) // see idectrl.c
	346	MCFG_IDE_CONTROLLER_ADD( "ide", ide_intf, ide_image_devices, "hdd", NULL, false) // see idectrl.c
340	347	// MCFG_IDE_CONTROLLER_REGIONS(":peribox:idehd0:drive", NULL)
341	348	MACHINE_CONFIG_END
342	349

trunk/src/mess/machine/a2cffa.c
r17580	r17581
31	31	#define CFFA2_ROM_REGION "cffa2_rom"
32	32	#define CFFA2_IDE_TAG "cffa2_ide"
33	33
	34	static const ide_config ide_intf =
	35	{
	36	NULL,
	37	NULL,
	38	0
	39	};
	40
34	41	MACHINE_CONFIG_FRAGMENT( cffa2 )
35		MCFG_IDE_CONTROLLER_ADD(CFFA2_IDE_TAG, ~~NULL~~, ide_image_devices, "hdd", "hdd", false)
	42	MCFG_IDE_CONTROLLER_ADD(CFFA2_IDE_TAG, ide_intf, ide_image_devices, "hdd", "hdd", false)
36	43	MACHINE_CONFIG_END
37	44
38	45	ROM_START( cffa2 )

trunk/src/mess/machine/kc_d004.c
r17580	r17581
122	122	MCFG_LEGACY_FLOPPY_4_DRIVES_ADD(kc_d004_floppy_interface)
123	123	MACHINE_CONFIG_END
124	124
	125	static const ide_config ide_intf =
	126	{
	127	NULL,
	128	NULL,
	129	0
	130	};
125	131
126	132	static MACHINE_CONFIG_FRAGMENT(kc_d004_gide)
127	133	MCFG_FRAGMENT_ADD(kc_d004)
r17580	r17581
129	135	MCFG_CPU_MODIFY(Z80_TAG)
130	136	MCFG_CPU_IO_MAP(kc_d004_gide_io)
131	137
132		MCFG_IDE_CONTROLLER_ADD(IDE_TAG, ~~NULL~~, ide_image_devices, "hdd", "hdd", false)
	138	MCFG_IDE_CONTROLLER_ADD(IDE_TAG, ide_intf, ide_image_devices, "hdd", "hdd", false)
133	139	MACHINE_CONFIG_END
134	140
135	141

trunk/src/mess/machine/omti8621.c
r17580	r17581
1344	1344	{
1345	1345	/* --- the following bits of info are returned as 64-bit signed integers --- */
1346	1346	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(omti8621_state); break;
1347		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(omti8621_config); break;
1348	1347
1349	1348	/* --- the following bits of info are returned as pointers to data or functions --- */
1350	1349	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME(omti8621); break;

trunk/src/mess/video/dl1416.c
r17580	r17581
114	114	INLINE dl1416_state get_safe_token(device_t device)
115	115	{
116	116	assert(device != NULL);
117		assert(device->type() == DL1416);
	117	assert(device->type() == DL1416B \|\| device->type() == DL1416T);
118	118
119	119	return (dl1416_state )downcast<legacy_device_base >(device)->token();
120	120	}
r17580	r17581
128	128	{
129	129	dl1416_state *dl1416 = get_safe_token(device);
130	130
131		/* validate arguments */
132		assert(((const dl1416_interface )(downcast<const legacy_device_base >(device)->inline_config()))->type >= DL1416B);
133		assert(((const dl1416_interface )(downcast<const legacy_device_base >(device)->inline_config()))->type < MAX_DL1416_TYPES);
134
135	131	/* register for state saving */
136	132	state_save_register_item(device->machine(), "dl1416", device->tag(), 0, dl1416->chip_enable);
137	133	state_save_register_item(device->machine(), "dl1416", device->tag(), 0, dl1416->cursor_enable);
r17580	r17581
144	140	{
145	141	int i, pattern;
146	142	dl1416_state *chip = get_safe_token(device);
147		const dl1416_interface intf = (const dl1416_interface )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	143	const dl1416_interface intf = (const dl1416_interface )device->static_config();
148	144	/* disable all lines */
149	145	chip->chip_enable = FALSE;
150	146	chip->write_enable = FALSE;
r17580	r17581
181	177	{
182	178	/* --- the following bits of info are returned as 64-bit signed integers --- */
183	179	case DEVINFO_INT_TOKEN_BYTES: info->i = sizeof(dl1416_state); break;
184		case DEVINFO_INT_INLINE_CONFIG_BYTES: info->i = sizeof(dl1416_interface); break;
185	180
186	181	/* --- the following bits of info are returned as pointers to data or functions --- */
187	182	case DEVINFO_FCT_START: info->start = DEVICE_START_NAME( dl1416 ); break;
r17580	r17581
197	192	}
198	193	}
199	194
	195	DEVICE_GET_INFO( dl1416b )
	196	{
	197	switch (state)
	198	{
	199	/* --- the following bits of info are returned as NULL-terminated strings --- */
	200	case DEVINFO_STR_NAME: strcpy(info->s, "DL1416B"); break;
	201	default: DEVICE_GET_INFO_CALL(dl1416); break;
	202	}
	203	}
200	204
	205	DEVICE_GET_INFO( dl1416t )
	206	{
	207	switch (state)
	208	{
	209	/* --- the following bits of info are returned as NULL-terminated strings --- */
	210	case DEVINFO_STR_NAME: strcpy(info->s, "DL1416T"); break;
	211	default: DEVICE_GET_INFO_CALL(dl1416); break;
	212	}
	213	}
	214
201	215	/*****************************************************************************
202	216	IMPLEMENTATION
203	217	*****************************************************************************/
r17580	r17581
227	241	WRITE8_DEVICE_HANDLER( dl1416_data_w )
228	242	{
229	243	dl1416_state *chip = get_safe_token(device);
230		const dl1416_interface intf = (const dl1416_interface )d~~owncast<const l~~e~~gacy_de~~vice~~_base *>(device)~~->i~~nline~~_config();
	244	const dl1416_interface intf = (const dl1416_interface )device->static_config();
231	245
232	246	offset &= 0x03; /* A0-A1 */
233	247	data &= 0x7f; /* D0-D6 */
r17580	r17581
240	254
241	255	if (chip->cursor_enable) /* cursor enable is set */
242	256	{
243		swi~~tch~~ (i~~ntf~~->type)
	257	if (device->type() == DL1416B)
244	258	{
245		~~case DL1416B:~~ /* DL1416B uses offset to decide cursor pos to change and D0 to hold new state */
	259	/* DL1416B uses offset to decide cursor pos to change and D0 to hold new state */
246	260
247	261	/* The cursor will be set if D0 is high and the original */
248	262	/* character restored otherwise */
r17580	r17581
266	280	if (intf->update)
267	281	intf->update(device, offset, pattern);
268	282	}
269		break;
	283	}
	284	else {
	285	/* DL1416T uses a bitmap of 4 data bits D0,D1,D2,D3 to decide cursor pos to change and new state */
270	286
271		case DL1416T: /* DL1416T uses a bitmap of 4 data bits D0,D1,D2,D3 to decide cursor pos to change and new state */
272
273	287	for (i = 0; i < 4; i++)
274	288	{
275	289	/* The cursor will be set if D0-D3 is high and the original */
r17580	r17581
294	308	if (intf->update)
295	309	intf->update(device, i, pattern);
296	310	}
297		}
298		break;
	311	}
299	312	}
300	313	}
301	314	else /* cursor enable is not set, so standard write */
r17580	r17581
322	335	}
323	336	}
324	337
325		DEFINE_LEGACY_DEVICE(DL1416, dl1416);
	338	DEFINE_LEGACY_DEVICE(DL1416B, dl1416b);
	339	DEFINE_LEGACY_DEVICE(DL1416T, dl1416t);

trunk/src/mess/video/dl1416.h
r17580	r17581
16	16
17	17	#include "devcb.h"
18	18
19
20	19	/***************************************************************************
21		CONSTANTS
22		***************************************************************************/
23
24		enum
25		{
26		DL1416B,
27		DL1416T,
28		MAX_DL1416_TYPES
29		};
30
31
32		/***************************************************************************
33	20	TYPE DEFINITIONS
34	21	***************************************************************************/
35	22
r17580	r17581
38	25	typedef struct _dl1416_interface dl1416_interface;
39	26	struct _dl1416_interface
40	27	{
41		int type;
42	28	dl1416_update_func update;
43	29	};
44	30
r17580	r17581
47	33	DEVICE CONFIGURATION MACROS
48	34	***************************************************************************/
49	35
50		#define MCFG_DL1416_ADD(_tag, _type, _update) \
51		MCFG_DEVICE_ADD(_tag, DL1416, 0) \
52		MCFG_DEVICE_CONFIG_DATA32(dl1416_interface, type, _type) \
53		MCFG_DEVICE_CONFIG_DATAPTR(dl1416_interface, update, _update)
	36	#define MCFG_DL1416B_ADD(_tag, _config) \
	37	MCFG_DEVICE_ADD(_tag, DL1416B, 0) \
	38	MCFG_DEVICE_CONFIG(_config)
54	39
55		#define MCFG_DL1416B_ADD(_tag, _update) \
56		MCFG_DL1416_ADD(_tag, DL1416B, _update)
	40	#define MCFG_DL1416T_ADD(_tag, _config) \
	41	MCFG_DEVICE_ADD(_tag, DL1416T, 0) \
	42	MCFG_DEVICE_CONFIG(_config)
57	43
58		#define MCFG_DL1416T_ADD(_tag, _update) \
59		MCFG_DL1416_ADD(_tag, DL1416T, _update)
60	44
61
62	45	/***************************************************************************
63	46	FUNCTION PROTOTYPES
64	47	***************************************************************************/
r17580	r17581
70	53	WRITE8_DEVICE_HANDLER( dl1416_data_w );
71	54
72	55	/* device get info callback */
73		DECLARE_LEGACY_DEVICE(DL1416, dl1416);
	56	DECLARE_LEGACY_DEVICE(DL1416B, dl1416b);
	57	DECLARE_LEGACY_DEVICE(DL1416T, dl1416t);
74	58
75	59	#endif /* DL1416_H_ */

trunk/src/mess/drivers/aim65.c
r17580	r17581
226	226	NULL
227	227	};
228	228
	229	const dl1416_interface aim65_ds1_intf =
	230	{
	231	aim65_update_ds1
	232	};
229	233
	234	const dl1416_interface aim65_ds2_intf =
	235	{
	236	aim65_update_ds2
	237	};
	238
	239	const dl1416_interface aim65_ds3_intf =
	240	{
	241	aim65_update_ds3
	242	};
	243
	244	const dl1416_interface aim65_ds4_intf =
	245	{
	246	aim65_update_ds4
	247	};
	248
	249	const dl1416_interface aim65_ds5_intf =
	250	{
	251	aim65_update_ds5
	252	};
	253
230	254	/***************************************************************************
231	255	MACHINE DRIVERS
232	256	***************************************************************************/
r17580	r17581
241	265	MCFG_DEFAULT_LAYOUT(layout_aim65)
242	266
243	267	/* alpha-numeric display */
244		MCFG_DL1416T_ADD("ds1", aim65_update_ds1)
245		MCFG_DL1416T_ADD("ds2", aim65_update_ds2)
246		MCFG_DL1416T_ADD("ds3", aim65_update_ds3)
247		MCFG_DL1416T_ADD("ds4", aim65_update_ds4)
248		MCFG_DL1416T_ADD("ds5", aim65_update_ds5)
	268	MCFG_DL1416T_ADD("ds1", aim65_ds1_intf)
	269	MCFG_DL1416T_ADD("ds2", aim65_ds2_intf)
	270	MCFG_DL1416T_ADD("ds3", aim65_ds3_intf)
	271	MCFG_DL1416T_ADD("ds4", aim65_ds4_intf)
	272	MCFG_DL1416T_ADD("ds5", aim65_ds5_intf)
249	273
250	274	/* Sound - wave sound only */
251	275	MCFG_SPEAKER_STANDARD_MONO("mono")

trunk/src/mess/drivers/sitcom.c
r17580	r17581
82	82	dl1416_cu_w(m_ds1, 1);
83	83	}
84	84
85		void sitcom_update_ds0(device_t *device, ~~UINT8~~ ~~offse~~t, int data)
	85	void sitcom_update_ds0(device_t *device, int digit, int data)
86	86	{
87		output_set_digit_value(~~offse~~t, data);
	87	output_set_digit_value(digit, data);
88	88	}
89	89
90		void sitcom_update_ds1(device_t *device, ~~UINT8~~ ~~offse~~t, int data)
	90	void sitcom_update_ds1(device_t *device, int digit, int data)
91	91	{
92		output_set_digit_value(4 + ~~offse~~t, data);
	92	output_set_digit_value(4 + digit, data);
93	93	}
94	94
	95	const dl1416_interface sitcom_ds0_intf =
	96	{
	97	sitcom_update_ds0
	98	};
95	99
	100	const dl1416_interface sitcom_ds1_intf =
	101	{
	102	sitcom_update_ds1
	103	};
	104
96	105	// SID line used as serial input from a pc
97	106	READ_LINE_MEMBER( sitcom_state::sid_line )
98	107	{
r17580	r17581
120	129	MCFG_CPU_CONFIG(sitcom_cpu_config)
121	130
122	131	/* video hardware */
123		MCFG_DL1416B_ADD("ds0", sitcom_update_ds0)
124		MCFG_DL1416B_ADD("ds1", sitcom_update_ds1)
	132	MCFG_DL1416B_ADD("ds0", sitcom_ds0_intf)
	133	MCFG_DL1416B_ADD("ds1", sitcom_ds1_intf)
125	134	MCFG_DEFAULT_LAYOUT(layout_sitcom)
126	135	MACHINE_CONFIG_END
127	136

trunk/src/mess/drivers/bebox.c
r17580	r17581
153	153	SLOT_INTERFACE("cirrus", CIRRUS)
154	154	SLOT_INTERFACE_END
155	155
	156	static const ide_config ide_intf =
	157	{
	158	bebox_ide_interrupt,
	159	NULL,
	160	0
	161	};
	162
156	163	static MACHINE_CONFIG_START( bebox, bebox_state )
157	164	/* basic machine hardware */
158	165	MCFG_CPU_ADD("ppc1", PPC603, 66000000) /* 66 MHz */
r17580	r17581
195	202	MCFG_SCSIDEV_ADD("scsi:cdrom", SCSICD, SCSI_ID_3)
196	203	MCFG_LSI53C810_ADD( "scsi:lsi53c810", lsi53c810_intf)
197	204
198		MCFG_IDE_CONTROLLER_ADD( "ide", ~~bebox_~~ide_int~~errupt~~, ide_image_devices, "hdd", NULL, false ) /* FIXME */
	205	MCFG_IDE_CONTROLLER_ADD( "ide", ide_intf, ide_image_devices, "hdd", NULL, false ) /* FIXME */
199	206
200	207	/* pci */
201	208	MCFG_PCI_BUS_ADD("pcibus", 0)

trunk/src/mess/drivers/cybiko.c
r17580	r17581
345	345	MCFG_RAM_EXTRA_OPTIONS("1M")
346	346	MACHINE_CONFIG_END
347	347
	348	const sst39vfx_config cybyko_sst39vfx_intf =
	349	{
	350	16, ENDIANNESS_BIG
	351	};
	352
348	353	static MACHINE_CONFIG_DERIVED( cybikov2, cybikov1)
349	354	// cpu
350	355	MCFG_CPU_REPLACE("maincpu", H8S2246, 11059200)
r17580	r17581
353	358	// machine
354	359	MCFG_MACHINE_START(cybikov2)
355	360	MCFG_MACHINE_RESET(cybikov2)
356		MCFG_SST39VF020_ADD("flash2", ~~16, ENDIANNESS~~_~~BIG~~)
	361	MCFG_SST39VF020_ADD("flash2", cybyko_sst39vfx_intf)
357	362
358	363	/* internal ram */
359	364	MCFG_RAM_MODIFY(RAM_TAG)
r17580	r17581
370	375	MCFG_MACHINE_START(cybikoxt)
371	376	MCFG_MACHINE_RESET(cybikoxt)
372	377	MCFG_DEVICE_REMOVE("flash1")
373		MCFG_SST39VF400A_ADD("flash2", ~~16, ENDIANNESS~~_~~BIG~~)
	378	MCFG_SST39VF400A_ADD("flash2", cybyko_sst39vfx_intf)
374	379
375	380	/* internal ram */
376	381	MCFG_RAM_MODIFY(RAM_TAG)

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