trunk/src/emu/machine/53c810.c
r17519 | r17520 | |
7 | 7 | #define DMA_MAX_ICOUNT 512 /* Maximum number of DMA Scripts opcodes to run */ |
8 | 8 | #define DASM_OPCODES 0 |
9 | 9 | |
10 | | static scsidev_device *devices[8]; /* SCSI IDs 0-7 */ |
11 | | static const struct LSI53C810interface *intf; |
12 | | static UINT8 last_id; |
13 | | |
14 | | static struct { |
15 | | UINT8 scntl0; |
16 | | UINT8 scntl1; |
17 | | UINT8 scntl2; |
18 | | UINT8 scntl3; |
19 | | UINT8 scid; |
20 | | UINT8 sxfer; |
21 | | UINT8 socl; |
22 | | UINT8 istat; |
23 | | UINT8 dstat; |
24 | | UINT8 sstat0; |
25 | | UINT8 sstat1; |
26 | | UINT8 sstat2; |
27 | | UINT8 dien; |
28 | | UINT8 dcntl; |
29 | | UINT8 dmode; |
30 | | UINT32 temp; |
31 | | UINT32 dsa; |
32 | | UINT32 dsp; |
33 | | UINT32 dsps; |
34 | | UINT32 dcmd; |
35 | | UINT8 sien0; |
36 | | UINT8 sien1; |
37 | | UINT8 stime0; |
38 | | UINT8 respid; |
39 | | UINT8 stest1; |
40 | | UINT8 scratch_a[4]; |
41 | | UINT8 scratch_b[4]; |
42 | | int dma_icount; |
43 | | int halted; |
44 | | int carry; |
45 | | UINT32 (* fetch)(UINT32 dsp); |
46 | | void (* irq_callback)(running_machine &machine); |
47 | | void (* dma_callback)(UINT32, UINT32, int, int); |
48 | | } lsi810; |
49 | | |
50 | | typedef void (*opcode_handler)(running_machine &machine); |
51 | | #define OPCODE_HANDLER(name) void name(running_machine &machine) |
52 | | static opcode_handler dma_opcode[256]; |
53 | | |
54 | | INLINE UINT32 FETCH(running_machine &machine) |
| 10 | UINT32 lsi53c810_device::FETCH() |
55 | 11 | { |
56 | | UINT32 r = intf->fetch(machine, lsi810.dsp); |
57 | | lsi810.dsp += 4; |
| 12 | UINT32 r = fetch(machine(), dsp); |
| 13 | dsp += 4; |
58 | 14 | return r; |
59 | 15 | } |
60 | 16 | |
61 | | #ifdef UNUSED_FUNCTION |
62 | | static UINT32 sign_extend24(UINT32 val) |
| 17 | void lsi53c810_device::dmaop_invalid() |
63 | 18 | { |
64 | | if (val & 0x00800000) |
65 | | val |= 0xFF000000; |
66 | | else |
67 | | val &= ~0xFF000000; |
68 | | return val; |
| 19 | fatalerror("LSI53C810: Invalid SCRIPTS DMA opcode %08X at %08X", dcmd, dsp); |
69 | 20 | } |
70 | | #endif |
71 | 21 | |
72 | | static OPCODE_HANDLER( dmaop_invalid ) |
| 22 | void lsi53c810_device::dmaop_move_memory() |
73 | 23 | { |
74 | | fatalerror("LSI53C810: Invalid SCRIPTS DMA opcode %08X at %08X", lsi810.dcmd, lsi810.dsp); |
75 | | } |
76 | | |
77 | | static OPCODE_HANDLER( dmaop_move_memory ) |
78 | | { |
79 | | UINT32 src = FETCH(machine); |
80 | | UINT32 dst = FETCH(machine); |
| 24 | UINT32 src = FETCH(); |
| 25 | UINT32 dst = FETCH(); |
81 | 26 | int count; |
82 | 27 | |
83 | | count = lsi810.dcmd & 0xffffff; |
84 | | if(intf->dma_callback != NULL) { |
85 | | intf->dma_callback(machine, src, dst, count, 1); |
| 28 | count = dcmd & 0xffffff; |
| 29 | if(dma_callback != NULL) { |
| 30 | dma_callback(machine(), src, dst, count, 1); |
86 | 31 | } |
87 | 32 | } |
88 | 33 | |
89 | | static OPCODE_HANDLER( dmaop_interrupt ) |
| 34 | void lsi53c810_device::dmaop_interrupt() |
90 | 35 | { |
91 | | if(lsi810.dcmd & 0x100000) { |
| 36 | if(dcmd & 0x100000) { |
92 | 37 | fatalerror("LSI53C810: INTFLY opcode not implemented"); |
93 | 38 | } |
94 | | lsi810.dsps = FETCH(machine); |
| 39 | dsps = FETCH(); |
95 | 40 | |
96 | | lsi810.istat |= 0x1; /* DMA interrupt pending */ |
97 | | lsi810.dstat |= 0x4; /* SIR (SCRIPTS Interrupt Instruction Received) */ |
| 41 | istat |= 0x1; /* DMA interrupt pending */ |
| 42 | dstat |= 0x4; /* SIR (SCRIPTS Interrupt Instruction Received) */ |
98 | 43 | |
99 | | if(intf->irq_callback != NULL) { |
100 | | intf->irq_callback(machine, 1); |
| 44 | if(irq_callback != NULL) { |
| 45 | irq_callback(machine(), 1); |
101 | 46 | } |
102 | | lsi810.dma_icount = 0; |
103 | | lsi810.halted = 1; |
| 47 | dma_icount = 0; |
| 48 | halted = 1; |
104 | 49 | } |
105 | 50 | |
106 | | static OPCODE_HANDLER( dmaop_block_move ) |
| 51 | void lsi53c810_device::dmaop_block_move() |
107 | 52 | { |
108 | 53 | UINT32 address; |
109 | 54 | UINT32 count; |
110 | 55 | INT32 dsps; |
111 | 56 | |
112 | | address = FETCH(machine); |
113 | | count = lsi810.dcmd & 0x00ffffff; |
| 57 | address = FETCH(); |
| 58 | count = dcmd & 0x00ffffff; |
114 | 59 | |
115 | 60 | // normal indirect |
116 | | if (lsi810.dcmd & 0x20000000) |
117 | | address = intf->fetch(machine, address); |
| 61 | if (dcmd & 0x20000000) |
| 62 | address = fetch(machine(), address); |
118 | 63 | |
119 | 64 | // table indirect |
120 | | if (lsi810.dcmd & 0x10000000) |
| 65 | if (dcmd & 0x10000000) |
121 | 66 | { |
122 | 67 | dsps = (INT32)address&0xffffff; |
123 | 68 | // sign extend |
r17519 | r17520 | |
125 | 70 | { |
126 | 71 | dsps |= 0xff000000; |
127 | 72 | } |
128 | | logerror("table offset: %x, DSA = %x\n", dsps, lsi810.dsa); |
129 | | dsps += lsi810.dsa; |
| 73 | logerror("table offset: %x, DSA = %x\n", dsps, dsa); |
| 74 | dsps += dsa; |
130 | 75 | |
131 | 76 | logerror("Loading from table at %x\n", dsps); |
132 | | count = lsi810.fetch(dsps); |
133 | | address = lsi810.fetch(dsps+4); |
| 77 | count = fetch(machine(),dsps); |
| 78 | address = fetch(machine(),dsps+4); |
134 | 79 | } |
135 | 80 | |
136 | | logerror("block move: address %x count %x phase %x\n", address, count, (lsi810.dcmd>>24)&7); |
| 81 | logerror("block move: address %x count %x phase %x\n", address, count, (dcmd>>24)&7); |
137 | 82 | |
138 | | if (lsi810.scntl0 & 0x01) |
| 83 | if (scntl0 & 0x01) |
139 | 84 | { |
140 | 85 | /* target mode */ |
141 | 86 | fatalerror("LSI53C810: dmaop_block_move not implemented in target mode"); |
r17519 | r17520 | |
147 | 92 | } |
148 | 93 | } |
149 | 94 | |
150 | | static OPCODE_HANDLER( dmaop_select ) |
| 95 | void lsi53c810_device::dmaop_select() |
151 | 96 | { |
152 | 97 | // UINT32 operand; |
153 | 98 | |
154 | | // operand = FETCH(machine); |
| 99 | // operand = FETCH(); |
155 | 100 | |
156 | | if (lsi810.scntl0 & 0x01) |
| 101 | if (scntl0 & 0x01) |
157 | 102 | { |
158 | 103 | /* target mode */ |
159 | | logerror("LSI53C810: reselect ID #%d\n", (lsi810.dcmd >> 16) & 0x07); |
| 104 | logerror("LSI53C810: reselect ID #%d\n", (dcmd >> 16) & 0x07); |
160 | 105 | } |
161 | 106 | else |
162 | 107 | { |
163 | 108 | /* initiator mode */ |
164 | | logerror("53c810: SELECT: our ID %d, target ID %d\n", lsi810.scid&7, (lsi810.dcmd>>16)&7); |
| 109 | logerror("53c810: SELECT: our ID %d, target ID %d\n", scid&7, (dcmd>>16)&7); |
165 | 110 | |
166 | | lsi810.sstat1 &= ~0x07; // clear current bus phase |
167 | | if (lsi810.dcmd & 0x01000000) // select with ATN |
| 111 | sstat1 &= ~0x07; // clear current bus phase |
| 112 | if (dcmd & 0x01000000) // select with ATN |
168 | 113 | { |
169 | 114 | mame_printf_debug("53c810: want select with ATN, setting message phase\n"); |
170 | | lsi810.sstat1 |= 0x7; // ATN means we want message in phase |
| 115 | sstat1 |= 0x7; // ATN means we want message in phase |
171 | 116 | } |
172 | 117 | } |
173 | 118 | } |
174 | 119 | |
175 | | static OPCODE_HANDLER( dmaop_wait_disconnect ) |
| 120 | void lsi53c810_device::dmaop_wait_disconnect() |
176 | 121 | { |
177 | 122 | // UINT32 operand; |
178 | 123 | |
179 | | // operand = FETCH(machine); |
| 124 | // operand = FETCH(); |
180 | 125 | |
181 | | if (lsi810.scntl0 & 0x01) |
| 126 | if (scntl0 & 0x01) |
182 | 127 | { |
183 | 128 | /* target mode */ |
184 | 129 | fatalerror("LSI53C810: dmaop_wait_disconnect not implemented in target mode"); |
r17519 | r17520 | |
190 | 135 | } |
191 | 136 | } |
192 | 137 | |
193 | | static OPCODE_HANDLER( dmaop_wait_reselect ) |
| 138 | void lsi53c810_device::dmaop_wait_reselect() |
194 | 139 | { |
195 | 140 | // UINT32 operand; |
196 | 141 | |
197 | | // operand = FETCH(machine); |
| 142 | // operand = FETCH(); |
198 | 143 | |
199 | | if (lsi810.scntl0 & 0x01) |
| 144 | if (scntl0 & 0x01) |
200 | 145 | { |
201 | 146 | /* target mode */ |
202 | 147 | fatalerror("LSI53C810: dmaop_wait_reselect not implemented in target mode"); |
r17519 | r17520 | |
208 | 153 | } |
209 | 154 | } |
210 | 155 | |
211 | | static OPCODE_HANDLER( dmaop_set ) |
| 156 | void lsi53c810_device::dmaop_set() |
212 | 157 | { |
213 | 158 | // UINT32 operand; |
214 | 159 | |
215 | | // operand = FETCH(machine); |
| 160 | // operand = FETCH(); |
216 | 161 | |
217 | 162 | /* initiator mode */ |
218 | | if (lsi810.dcmd & 0x8) |
| 163 | if (dcmd & 0x8) |
219 | 164 | { |
220 | 165 | // set ATN in SOCL |
221 | | lsi810.socl |= 0x08; |
| 166 | socl |= 0x08; |
222 | 167 | } |
223 | | if (lsi810.dcmd & 0x40) |
| 168 | if (dcmd & 0x40) |
224 | 169 | { |
225 | 170 | // set ACK in SOCL |
226 | | lsi810.socl |= 0x40; |
| 171 | socl |= 0x40; |
227 | 172 | } |
228 | | if (lsi810.dcmd & 0x200) |
| 173 | if (dcmd & 0x200) |
229 | 174 | { |
230 | 175 | // set target mode |
231 | | lsi810.scntl0 |= 0x01; |
| 176 | scntl0 |= 0x01; |
232 | 177 | } |
233 | | if (lsi810.dcmd & 0x400) |
| 178 | if (dcmd & 0x400) |
234 | 179 | { |
235 | 180 | // set carry in ALU |
236 | | lsi810.carry = 1; |
| 181 | carry = 1; |
237 | 182 | } |
238 | 183 | } |
239 | 184 | |
240 | | static OPCODE_HANDLER( dmaop_clear ) |
| 185 | void lsi53c810_device::dmaop_clear() |
241 | 186 | { |
242 | 187 | // UINT32 operand; |
243 | 188 | |
244 | | // operand = FETCH(machine); |
| 189 | // operand = FETCH(); |
245 | 190 | |
246 | 191 | /* initiator mode */ |
247 | | if (lsi810.dcmd & 0x8) |
| 192 | if (dcmd & 0x8) |
248 | 193 | { |
249 | 194 | // clear ATN in SOCL |
250 | | lsi810.socl &= ~0x08; |
| 195 | socl &= ~0x08; |
251 | 196 | } |
252 | | if (lsi810.dcmd & 0x40) |
| 197 | if (dcmd & 0x40) |
253 | 198 | { |
254 | 199 | // clear ACK in SOCL |
255 | | lsi810.socl &= ~0x40; |
| 200 | socl &= ~0x40; |
256 | 201 | } |
257 | | if (lsi810.dcmd & 0x200) |
| 202 | if (dcmd & 0x200) |
258 | 203 | { |
259 | 204 | // clear target mode |
260 | | lsi810.scntl0 &= ~0x01; |
| 205 | scntl0 &= ~0x01; |
261 | 206 | } |
262 | | if (lsi810.dcmd & 0x400) |
| 207 | if (dcmd & 0x400) |
263 | 208 | { |
264 | 209 | // clear carry in ALU |
265 | | lsi810.carry = 0; |
| 210 | carry = 0; |
266 | 211 | } |
267 | 212 | } |
268 | 213 | |
269 | | static OPCODE_HANDLER( dmaop_move_from_sfbr ) |
| 214 | void lsi53c810_device::dmaop_move_from_sfbr() |
270 | 215 | { |
271 | 216 | fatalerror("LSI53C810: dmaop_move_from_sfbr not implemented in target mode"); |
272 | 217 | } |
273 | 218 | |
274 | | static OPCODE_HANDLER( dmaop_move_to_sfbr ) |
| 219 | void lsi53c810_device::dmaop_move_to_sfbr() |
275 | 220 | { |
276 | 221 | fatalerror("LSI53C810: dmaop_move_to_sfbr not implemented"); |
277 | 222 | } |
278 | 223 | |
279 | | static OPCODE_HANDLER( dmaop_read_modify_write ) |
| 224 | void lsi53c810_device::dmaop_read_modify_write() |
280 | 225 | { |
281 | 226 | fatalerror("LSI53C810: dmaop_read_modify_write not implemented"); |
282 | 227 | } |
283 | 228 | |
284 | | static int scripts_compute_branch(void) |
| 229 | int lsi53c810_device::scripts_compute_branch() |
285 | 230 | { |
286 | 231 | int dtest, ptest, wanted, passed; |
287 | 232 | |
r17519 | r17520 | |
292 | 237 | // | |compare phase |
293 | 238 | // |desired phase: message in |
294 | 239 | |
295 | | if (lsi810.dcmd & 0x00200000) |
| 240 | if (dcmd & 0x00200000) |
296 | 241 | { |
297 | 242 | fatalerror("LSI53C810: jump with carry test not implemented"); |
298 | 243 | } |
299 | 244 | |
300 | | if (lsi810.dcmd & 0x00100000) |
| 245 | if (dcmd & 0x00100000) |
301 | 246 | { |
302 | 247 | fatalerror("LSI53C810: jump with interrupt on the fly not implemented"); |
303 | 248 | } |
304 | 249 | |
305 | 250 | // set desired result to take jump |
306 | | wanted = (lsi810.dcmd & 0x00080000) ? 1 : 0; |
| 251 | wanted = (dcmd & 0x00080000) ? 1 : 0; |
307 | 252 | // default to passing the tests in case they're disabled |
308 | 253 | dtest = ptest = wanted; |
309 | 254 | |
310 | 255 | // phase test? |
311 | | if (lsi810.dcmd & 0x00020000) |
| 256 | if (dcmd & 0x00020000) |
312 | 257 | { |
313 | | logerror("53c810: phase test. current: %x. target: %x\n", lsi810.sstat1 & 7, (lsi810.dcmd>>24)&7); |
| 258 | logerror("53c810: phase test. current: %x. target: %x\n", sstat1 & 7, (dcmd>>24)&7); |
314 | 259 | |
315 | 260 | // do the phases match? |
316 | | if (((lsi810.dcmd>>24)&7) == (lsi810.sstat1 & 7)) |
| 261 | if (((dcmd>>24)&7) == (sstat1 & 7)) |
317 | 262 | { |
318 | 263 | ptest = 1; |
319 | 264 | } |
r17519 | r17520 | |
324 | 269 | } |
325 | 270 | |
326 | 271 | // data test? |
327 | | if (lsi810.dcmd & 0x00040000) |
| 272 | if (dcmd & 0x00040000) |
328 | 273 | { |
329 | | logerror("53c810: data test. target: %x [not yet implemented]\n", lsi810.dcmd&0xff); |
| 274 | logerror("53c810: data test. target: %x [not yet implemented]\n", dcmd&0xff); |
330 | 275 | } |
331 | 276 | |
332 | 277 | // if all conditions go, take the jump |
r17519 | r17520 | |
341 | 286 | return passed; |
342 | 287 | } |
343 | 288 | |
344 | | static UINT32 scripts_get_jump_dest(running_machine &machine) |
| 289 | UINT32 lsi53c810_device::scripts_get_jump_dest() |
345 | 290 | { |
346 | 291 | INT32 dsps; |
347 | 292 | UINT32 dest; |
348 | 293 | |
349 | | dsps = FETCH(machine); |
| 294 | dsps = FETCH(); |
350 | 295 | |
351 | 296 | /* relative or absolute addressing? */ |
352 | | if (lsi810.dcmd & 0x00800000) |
| 297 | if (dcmd & 0x00800000) |
353 | 298 | { |
354 | 299 | // sign-extend the 24-bit value |
355 | 300 | if (dsps & 0x00800000) |
r17519 | r17520 | |
357 | 302 | dsps |= 0xff000000; |
358 | 303 | } |
359 | 304 | |
360 | | logerror("dsps = %x, dsp = %x\n", dsps, lsi810.dsp); |
361 | | dsps += lsi810.dsp; |
| 305 | logerror("dsps = %x, dsp = %x\n", dsps, dsp); |
| 306 | dsps += dsp; |
362 | 307 | } |
363 | 308 | |
364 | 309 | dest = (UINT32)dsps; |
365 | 310 | |
366 | | logerror("cur DSP %x, dest %x\n", lsi810.dsp, dest); |
| 311 | logerror("cur DSP %x, dest %x\n", dsp, dest); |
367 | 312 | |
368 | 313 | return dest; |
369 | 314 | } |
370 | 315 | |
371 | | static OPCODE_HANDLER( dmaop_jump ) |
| 316 | void lsi53c810_device::dmaop_jump() |
372 | 317 | { |
373 | 318 | if (scripts_compute_branch()) |
374 | 319 | { |
375 | | lsi810.dsp = scripts_get_jump_dest(machine); |
| 320 | dsp = scripts_get_jump_dest(); |
376 | 321 | } |
377 | 322 | else |
378 | 323 | { |
379 | | FETCH(machine); // skip operand to continue on |
| 324 | FETCH(); // skip operand to continue on |
380 | 325 | } |
381 | 326 | } |
382 | 327 | |
383 | | static OPCODE_HANDLER( dmaop_call ) |
| 328 | void lsi53c810_device::dmaop_call() |
384 | 329 | { |
385 | 330 | if (scripts_compute_branch()) |
386 | 331 | { |
387 | 332 | // save return address |
388 | | lsi810.temp = lsi810.dsp; |
| 333 | temp = dsp; |
389 | 334 | |
390 | 335 | // and go |
391 | | lsi810.dsp = scripts_get_jump_dest(machine); |
| 336 | dsp = scripts_get_jump_dest(); |
392 | 337 | } |
393 | 338 | else |
394 | 339 | { |
395 | | FETCH(machine); // skip operand to continue on |
| 340 | FETCH(); // skip operand to continue on |
396 | 341 | } |
397 | 342 | } |
398 | 343 | |
399 | | static OPCODE_HANDLER( dmaop_return ) |
| 344 | void lsi53c810_device::dmaop_return() |
400 | 345 | { |
401 | 346 | // is this correct? return only happens if the condition is true? |
402 | 347 | if (scripts_compute_branch()) |
403 | 348 | { |
404 | 349 | // restore return address |
405 | | lsi810.dsp = lsi810.temp; |
| 350 | dsp = temp; |
406 | 351 | } |
407 | 352 | else |
408 | 353 | { |
409 | | FETCH(machine); // skip operand to continue on |
| 354 | FETCH(); // skip operand to continue on |
410 | 355 | } |
411 | 356 | } |
412 | 357 | |
413 | | static OPCODE_HANDLER( dmaop_store ) |
| 358 | void lsi53c810_device::dmaop_store() |
414 | 359 | { |
415 | 360 | fatalerror("LSI53C810: dmaop_store not implemented"); |
416 | 361 | } |
417 | 362 | |
418 | | static OPCODE_HANDLER( dmaop_load ) |
| 363 | void lsi53c810_device::dmaop_load() |
419 | 364 | { |
420 | 365 | fatalerror("LSI53C810: dmaop_load not implemented"); |
421 | 366 | } |
422 | 367 | |
423 | 368 | |
424 | 369 | |
425 | | static void dma_exec(running_machine &machine) |
| 370 | void lsi53c810_device::dma_exec() |
426 | 371 | { |
427 | | lsi810.dma_icount = DMA_MAX_ICOUNT; |
| 372 | dma_icount = DMA_MAX_ICOUNT; |
428 | 373 | |
429 | | while(lsi810.dma_icount > 0) |
| 374 | while(dma_icount > 0) |
430 | 375 | { |
431 | 376 | int op; |
432 | 377 | |
433 | 378 | if (DASM_OPCODES) |
434 | 379 | { |
435 | 380 | char buf[256]; |
436 | | lsi53c810_dasm(machine, buf, lsi810.dsp); |
437 | | logerror("0x%08X: %s\n", lsi810.dsp, buf); |
| 381 | lsi53c810_dasm(buf, dsp); |
| 382 | logerror("0x%08X: %s\n", dsp, buf); |
438 | 383 | } |
439 | 384 | |
440 | | lsi810.dcmd = FETCH(machine); |
| 385 | dcmd = FETCH(); |
441 | 386 | |
442 | | op = (lsi810.dcmd >> 24) & 0xff; |
443 | | dma_opcode[op](machine); |
| 387 | op = (dcmd >> 24) & 0xff; |
| 388 | dma_opcode[op](); |
444 | 389 | |
445 | | lsi810.dma_icount--; |
| 390 | dma_icount--; |
446 | 391 | } |
447 | 392 | } |
448 | 393 | |
449 | | READ8_HANDLER( lsi53c810_reg_r ) |
| 394 | UINT8 lsi53c810_device::lsi53c810_reg_r( int offset ) |
450 | 395 | { |
451 | | logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, cpu_get_pc(&space->device())); |
| 396 | // logerror("53c810: read reg %d:0x%x (PC=%x)\n", offset, offset, cpu_get_pc(&space->device())); |
452 | 397 | switch(offset) |
453 | 398 | { |
454 | 399 | case 0x00: /* SCNTL0 */ |
455 | | return lsi810.scntl0; |
| 400 | return scntl0; |
456 | 401 | case 0x01: /* SCNTL1 */ |
457 | | return lsi810.scntl1; |
| 402 | return scntl1; |
458 | 403 | case 0x02: /* SCNTL2 */ |
459 | | return lsi810.scntl2; |
| 404 | return scntl2; |
460 | 405 | case 0x03: /* SCNTL3 */ |
461 | | return lsi810.scntl3; |
| 406 | return scntl3; |
462 | 407 | case 0x04: /* SCID */ |
463 | | return lsi810.scid; |
| 408 | return scid; |
464 | 409 | case 0x05: /* SXFER */ |
465 | | return lsi810.sxfer; |
| 410 | return sxfer; |
466 | 411 | case 0x09: /* SOCL */ |
467 | | return lsi810.socl; |
| 412 | return socl; |
468 | 413 | case 0x0c: /* DSTAT */ |
469 | | return lsi810.dstat; |
| 414 | return dstat; |
470 | 415 | case 0x0d: /* SSTAT0 */ |
471 | | return lsi810.sstat0; |
| 416 | return sstat0; |
472 | 417 | case 0x0e: /* SSTAT1 */ |
473 | | return lsi810.sstat1; |
| 418 | return sstat1; |
474 | 419 | case 0x0f: /* SSTAT2 */ |
475 | | return lsi810.sstat2; |
| 420 | return sstat2; |
476 | 421 | case 0x10: /* DSA [7-0] */ |
477 | | return lsi810.dsa & 0xff; |
| 422 | return dsa & 0xff; |
478 | 423 | case 0x11: /* DSA [15-8] */ |
479 | | return (lsi810.dsa >> 8) & 0xff; |
| 424 | return (dsa >> 8) & 0xff; |
480 | 425 | case 0x12: /* DSA [23-16] */ |
481 | | return (lsi810.dsa >> 16) & 0xff; |
| 426 | return (dsa >> 16) & 0xff; |
482 | 427 | case 0x13: /* DSA [31-24] */ |
483 | | return (lsi810.dsa >> 24) & 0xff; |
| 428 | return (dsa >> 24) & 0xff; |
484 | 429 | case 0x14: /* ISTAT */ |
485 | 430 | // clear the interrupt on service |
486 | | if(intf->irq_callback != NULL) |
| 431 | if(irq_callback != NULL) |
487 | 432 | { |
488 | | intf->irq_callback(space->machine(), 0); |
| 433 | irq_callback(machine(), 0); |
489 | 434 | } |
490 | 435 | |
491 | | return lsi810.istat; |
| 436 | return istat; |
492 | 437 | case 0x2c: /* DSP [7-0] */ |
493 | | return lsi810.dsp & 0xff; |
| 438 | return dsp & 0xff; |
494 | 439 | case 0x2d: /* DSP [15-8] */ |
495 | | return (lsi810.dsp >> 8) & 0xff; |
| 440 | return (dsp >> 8) & 0xff; |
496 | 441 | case 0x2e: /* DSP [23-16] */ |
497 | | return (lsi810.dsp >> 16) & 0xff; |
| 442 | return (dsp >> 16) & 0xff; |
498 | 443 | case 0x2f: /* DSP [31-24] */ |
499 | | return (lsi810.dsp >> 24) & 0xff; |
| 444 | return (dsp >> 24) & 0xff; |
500 | 445 | case 0x34: /* SCRATCH A */ |
501 | 446 | case 0x35: |
502 | 447 | case 0x36: |
503 | 448 | case 0x37: |
504 | | return lsi810.scratch_a[offset % 4]; |
| 449 | return scratch_a[offset % 4]; |
505 | 450 | case 0x39: /* DIEN */ |
506 | | return lsi810.dien; |
| 451 | return dien; |
507 | 452 | case 0x3b: /* DCNTL */ |
508 | | return lsi810.dcntl; |
| 453 | return dcntl; |
509 | 454 | case 0x40: /* SIEN0 */ |
510 | | return lsi810.sien0; |
| 455 | return sien0; |
511 | 456 | case 0x41: /* SIEN1 */ |
512 | | return lsi810.sien1; |
| 457 | return sien1; |
513 | 458 | case 0x48: /* STIME0 */ |
514 | | return lsi810.stime0; |
| 459 | return stime0; |
515 | 460 | case 0x4a: /* RESPID */ |
516 | | return lsi810.respid; |
| 461 | return respid; |
517 | 462 | case 0x4d: /* STEST1 */ |
518 | | return lsi810.stest1; |
| 463 | return stest1; |
519 | 464 | case 0x5c: /* SCRATCH B */ |
520 | 465 | case 0x5d: |
521 | 466 | case 0x5e: |
522 | 467 | case 0x5f: |
523 | | return lsi810.scratch_b[offset % 4]; |
| 468 | return scratch_b[offset % 4]; |
524 | 469 | |
525 | 470 | default: |
526 | 471 | fatalerror("LSI53C810: reg_r: Unknown reg %02X", offset); |
r17519 | r17520 | |
529 | 474 | return 0; |
530 | 475 | } |
531 | 476 | |
532 | | WRITE8_HANDLER( lsi53c810_reg_w ) |
| 477 | void lsi53c810_device::lsi53c810_reg_w(int offset, UINT8 data) |
533 | 478 | { |
534 | | logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, cpu_get_pc(&space->device())); |
| 479 | // logerror("53c810: %02x to reg %d:0x%x (PC=%x)\n", data, offset, offset, cpu_get_pc(&space->device())); |
535 | 480 | switch(offset) |
536 | 481 | { |
537 | 482 | case 0x00: /* SCNTL0 */ |
538 | | lsi810.scntl0 = data; |
| 483 | scntl0 = data; |
539 | 484 | break; |
540 | 485 | case 0x01: /* SCNTL1 */ |
541 | | lsi810.scntl1 = data; |
| 486 | scntl1 = data; |
542 | 487 | break; |
543 | 488 | case 0x02: /* SCNTL2 */ |
544 | | lsi810.scntl2 = data; |
| 489 | scntl2 = data; |
545 | 490 | break; |
546 | 491 | case 0x03: /* SCNTL3 */ |
547 | | lsi810.scntl3 = data; |
| 492 | scntl3 = data; |
548 | 493 | break; |
549 | 494 | case 0x04: /* SCID */ |
550 | | lsi810.scid = data; |
| 495 | scid = data; |
551 | 496 | break; |
552 | 497 | case 0x05: /* SXFER */ |
553 | | lsi810.sxfer = data; |
| 498 | sxfer = data; |
554 | 499 | break; |
555 | 500 | case 0x09: /* SOCL */ |
556 | | lsi810.socl = data; |
| 501 | socl = data; |
557 | 502 | break; |
558 | 503 | case 0x0d: /* SSTAT0 */ |
559 | | lsi810.sstat0 = data; |
| 504 | sstat0 = data; |
560 | 505 | break; |
561 | 506 | case 0x0e: /* SSTAT1 */ |
562 | | lsi810.sstat1 = data; |
| 507 | sstat1 = data; |
563 | 508 | break; |
564 | 509 | case 0x0f: /* SSTAT2 */ |
565 | | lsi810.sstat2 = data; |
| 510 | sstat2 = data; |
566 | 511 | break; |
567 | 512 | case 0x10: /* DSA [7-0] */ |
568 | | lsi810.dsa &= 0xffffff00; |
569 | | lsi810.dsa |= data; |
| 513 | dsa &= 0xffffff00; |
| 514 | dsa |= data; |
570 | 515 | break; |
571 | 516 | case 0x11: /* DSA [15-8] */ |
572 | | lsi810.dsa &= 0xffff00ff; |
573 | | lsi810.dsa |= data << 8; |
| 517 | dsa &= 0xffff00ff; |
| 518 | dsa |= data << 8; |
574 | 519 | break; |
575 | 520 | case 0x12: /* DSA [23-16] */ |
576 | | lsi810.dsa &= 0xff00ffff; |
577 | | lsi810.dsa |= data << 16; |
| 521 | dsa &= 0xff00ffff; |
| 522 | dsa |= data << 16; |
578 | 523 | break; |
579 | 524 | case 0x13: /* DSA [31-24] */ |
580 | | lsi810.dsa &= 0x00ffffff; |
581 | | lsi810.dsa |= data << 24; |
| 525 | dsa &= 0x00ffffff; |
| 526 | dsa |= data << 24; |
582 | 527 | break; |
583 | 528 | case 0x14: /* ISTAT */ |
584 | | lsi810.istat = data; |
| 529 | istat = data; |
585 | 530 | break; |
586 | 531 | case 0x2c: /* DSP [7-0] */ |
587 | | lsi810.dsp &= 0xffffff00; |
588 | | lsi810.dsp |= data; |
| 532 | dsp &= 0xffffff00; |
| 533 | dsp |= data; |
589 | 534 | break; |
590 | 535 | case 0x2d: /* DSP [15-8] */ |
591 | | lsi810.dsp &= 0xffff00ff; |
592 | | lsi810.dsp |= data << 8; |
| 536 | dsp &= 0xffff00ff; |
| 537 | dsp |= data << 8; |
593 | 538 | break; |
594 | 539 | case 0x2e: /* DSP [23-16] */ |
595 | | lsi810.dsp &= 0xff00ffff; |
596 | | lsi810.dsp |= data << 16; |
| 540 | dsp &= 0xff00ffff; |
| 541 | dsp |= data << 16; |
597 | 542 | break; |
598 | 543 | case 0x2f: /* DSP [31-24] */ |
599 | | lsi810.dsp &= 0x00ffffff; |
600 | | lsi810.dsp |= data << 24; |
601 | | lsi810.halted = 0; |
602 | | if((lsi810.dmode & 0x1) == 0 && !lsi810.halted) { |
603 | | dma_exec(space->machine()); |
| 544 | dsp &= 0x00ffffff; |
| 545 | dsp |= data << 24; |
| 546 | halted = 0; |
| 547 | if((dmode & 0x1) == 0 && !halted) { |
| 548 | dma_exec(); |
604 | 549 | } |
605 | 550 | break; |
606 | 551 | case 0x34: /* SCRATCH A */ |
607 | 552 | case 0x35: |
608 | 553 | case 0x36: |
609 | 554 | case 0x37: |
610 | | lsi810.scratch_a[offset % 4] = data; |
| 555 | scratch_a[offset % 4] = data; |
611 | 556 | break; |
612 | 557 | case 0x38: /* DMODE */ |
613 | | lsi810.dmode = data; |
| 558 | dmode = data; |
614 | 559 | break; |
615 | 560 | case 0x39: /* DIEN */ |
616 | | lsi810.dien = data; |
| 561 | dien = data; |
617 | 562 | break; |
618 | 563 | case 0x3b: /* DCNTL */ |
619 | | lsi810.dcntl = data; |
| 564 | dcntl = data; |
620 | 565 | |
621 | | if(lsi810.dcntl & 0x14 && !lsi810.halted) /* single-step & start DMA */ |
| 566 | if(dcntl & 0x14 && !halted) /* single-step & start DMA */ |
622 | 567 | { |
623 | 568 | int op; |
624 | | lsi810.dcmd = FETCH(space->machine()); |
625 | | op = (lsi810.dcmd >> 24) & 0xff; |
626 | | dma_opcode[op](space->machine()); |
| 569 | dcmd = FETCH(); |
| 570 | op = (dcmd >> 24) & 0xff; |
| 571 | dma_opcode[op](); |
627 | 572 | |
628 | | lsi810.istat |= 0x3; /* DMA interrupt pending */ |
629 | | lsi810.dstat |= 0x8; /* SSI (Single Step Interrupt) */ |
630 | | if(intf->irq_callback != NULL) { |
631 | | intf->irq_callback(space->machine(), 1); |
| 573 | istat |= 0x3; /* DMA interrupt pending */ |
| 574 | dstat |= 0x8; /* SSI (Single Step Interrupt) */ |
| 575 | if(irq_callback != NULL) { |
| 576 | irq_callback(machine(), 1); |
632 | 577 | } |
633 | 578 | } |
634 | | else if(lsi810.dcntl & 0x04 && !lsi810.halted) /* manual start DMA */ |
| 579 | else if(dcntl & 0x04 && !halted) /* manual start DMA */ |
635 | 580 | { |
636 | | dma_exec(space->machine()); |
| 581 | dma_exec(); |
637 | 582 | } |
638 | 583 | break; |
639 | 584 | case 0x40: /* SIEN0 */ |
640 | | lsi810.sien0 = data; |
| 585 | sien0 = data; |
641 | 586 | break; |
642 | 587 | case 0x41: /* SIEN1 */ |
643 | | lsi810.sien1 = data; |
| 588 | sien1 = data; |
644 | 589 | break; |
645 | 590 | case 0x48: /* STIME0 */ |
646 | | lsi810.stime0 = data; |
| 591 | stime0 = data; |
647 | 592 | break; |
648 | 593 | case 0x4a: /* RESPID */ |
649 | | lsi810.respid = data; |
| 594 | respid = data; |
650 | 595 | break; |
651 | 596 | case 0x4d: /* STEST1 */ |
652 | | lsi810.stest1 = data; |
| 597 | stest1 = data; |
653 | 598 | break; |
654 | 599 | case 0x5c: /* SCRATCH B */ |
655 | 600 | case 0x5d: |
656 | 601 | case 0x5e: |
657 | 602 | case 0x5f: |
658 | | lsi810.scratch_b[offset % 4] = data; |
| 603 | scratch_b[offset % 4] = data; |
659 | 604 | break; |
660 | 605 | |
661 | 606 | default: |
r17519 | r17520 | |
663 | 608 | } |
664 | 609 | } |
665 | 610 | |
666 | | static void add_opcode(UINT8 op, UINT8 mask, opcode_handler handler) |
| 611 | void lsi53c810_device::add_opcode(UINT8 op, UINT8 mask, opcode_handler_delegate handler) |
667 | 612 | { |
668 | 613 | int i; |
669 | 614 | for(i=0; i < 256; i++) { |
r17519 | r17520 | |
673 | 618 | } |
674 | 619 | } |
675 | 620 | |
676 | | void lsi53c810_init(running_machine &machine, const struct LSI53C810interface *interface) |
| 621 | lsi53c810_device::lsi53c810_device(const machine_config &mconfig, const char *tag, device_t *owner, UINT32 clock) |
| 622 | : device_t(mconfig, LSI53C810, "53C810 SCSI", tag, owner, clock) |
677 | 623 | { |
678 | | int i; |
| 624 | } |
679 | 625 | |
680 | | // save interface pointer for later |
681 | | intf = interface; |
| 626 | void lsi53c810_device::device_config_complete() |
| 627 | { |
| 628 | // inherit a copy of the static data |
| 629 | const LSI53C810interface *intf = reinterpret_cast<const LSI53C810interface *>(static_config()); |
| 630 | if (intf != NULL) |
| 631 | { |
| 632 | *static_cast<LSI53C810interface *>(this) = *intf; |
| 633 | } |
| 634 | } |
682 | 635 | |
683 | | memset(&lsi810, 0, sizeof(lsi810)); |
| 636 | void lsi53c810_device::device_start() |
| 637 | { |
| 638 | int i; |
| 639 | |
684 | 640 | for(i = 0; i < 256; i++) |
685 | 641 | { |
686 | | dma_opcode[i] = dmaop_invalid; |
| 642 | dma_opcode[i] = opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_invalid ), this); |
687 | 643 | } |
688 | 644 | |
689 | | add_opcode(0x00, 0xc0, dmaop_block_move); |
690 | | add_opcode(0x40, 0xf8, dmaop_select); |
691 | | add_opcode(0x48, 0xf8, dmaop_wait_disconnect); |
692 | | add_opcode(0x50, 0xf8, dmaop_wait_reselect); |
693 | | add_opcode(0x58, 0xf8, dmaop_set); |
694 | | add_opcode(0x60, 0xf8, dmaop_clear); |
695 | | add_opcode(0x68, 0xf8, dmaop_move_from_sfbr); |
696 | | add_opcode(0x70, 0xf8, dmaop_move_to_sfbr); |
697 | | add_opcode(0x78, 0xf8, dmaop_read_modify_write); |
698 | | add_opcode(0x80, 0xf8, dmaop_jump); |
699 | | add_opcode(0x88, 0xf8, dmaop_call); |
700 | | add_opcode(0x90, 0xf8, dmaop_return); |
701 | | add_opcode(0x98, 0xf8, dmaop_interrupt); |
702 | | add_opcode(0xc0, 0xfe, dmaop_move_memory); |
703 | | add_opcode(0xe0, 0xed, dmaop_store); |
704 | | add_opcode(0xe1, 0xed, dmaop_load); |
| 645 | add_opcode(0x00, 0xc0, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_block_move ), this)); |
| 646 | add_opcode(0x40, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_select ), this)); |
| 647 | add_opcode(0x48, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_wait_disconnect ), this)); |
| 648 | add_opcode(0x50, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_wait_reselect ), this)); |
| 649 | add_opcode(0x58, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_set ), this)); |
| 650 | add_opcode(0x60, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_clear ), this)); |
| 651 | add_opcode(0x68, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_move_from_sfbr ), this)); |
| 652 | add_opcode(0x70, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_move_to_sfbr ), this)); |
| 653 | add_opcode(0x78, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_read_modify_write ), this)); |
| 654 | add_opcode(0x80, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_jump ), this)); |
| 655 | add_opcode(0x88, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_call ), this)); |
| 656 | add_opcode(0x90, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_return ), this)); |
| 657 | add_opcode(0x98, 0xf8, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_interrupt ), this)); |
| 658 | add_opcode(0xc0, 0xfe, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_move_memory ), this)); |
| 659 | add_opcode(0xe0, 0xed, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_store ), this)); |
| 660 | add_opcode(0xe1, 0xed, opcode_handler_delegate(FUNC( lsi53c810_device::dmaop_load ), this)); |
705 | 661 | |
706 | 662 | memset(devices, 0, sizeof(devices)); |
707 | 663 | |
708 | 664 | // try to open the devices |
709 | | for (i = 0; i < interface->scsidevs->devs_present; i++) |
| 665 | for (i = 0; i < scsidevs->devs_present; i++) |
710 | 666 | { |
711 | | scsidev_device *device = machine.device<scsidev_device>( interface->scsidevs->devices[i].tag ); |
| 667 | scsidev_device *device = owner()->subdevice<scsidev_device>( scsidevs->devices[i].tag ); |
712 | 668 | devices[device->GetDeviceID()] = device; |
713 | 669 | } |
714 | 670 | } |
715 | 671 | |
716 | | void lsi53c810_read_data(int bytes, UINT8 *pData) |
| 672 | void lsi53c810_device::lsi53c810_read_data(int bytes, UINT8 *pData) |
717 | 673 | { |
718 | 674 | if (devices[last_id]) |
719 | 675 | { |
r17519 | r17520 | |
725 | 681 | } |
726 | 682 | } |
727 | 683 | |
728 | | void lsi53c810_write_data(int bytes, UINT8 *pData) |
| 684 | void lsi53c810_device::lsi53c810_write_data(int bytes, UINT8 *pData) |
729 | 685 | { |
730 | 686 | if (devices[last_id]) |
731 | 687 | { |
r17519 | r17520 | |
743 | 699 | * |
744 | 700 | *************************************/ |
745 | 701 | |
746 | | static UINT32 lsi53c810_dasm_fetch(running_machine &machine, UINT32 pc) |
| 702 | UINT32 lsi53c810_device::lsi53c810_dasm_fetch(UINT32 pc) |
747 | 703 | { |
748 | | return intf->fetch(machine, pc); |
| 704 | return fetch(machine(), pc); |
749 | 705 | } |
750 | 706 | |
751 | | unsigned lsi53c810_dasm(running_machine &machine, char *buf, UINT32 pc) |
| 707 | unsigned lsi53c810_device::lsi53c810_dasm(char *buf, UINT32 pc) |
752 | 708 | { |
753 | 709 | unsigned result = 0; |
754 | 710 | const char *op_mnemonic = NULL; |
755 | | UINT32 op = lsi53c810_dasm_fetch(machine, pc); |
| 711 | UINT32 op = lsi53c810_dasm_fetch(pc); |
756 | 712 | UINT32 dest; |
757 | 713 | int i; |
758 | 714 | |
r17519 | r17520 | |
765 | 721 | if ((op & 0xF8000000) == 0x40000000) |
766 | 722 | { |
767 | 723 | /* SELECT */ |
768 | | dest = lsi53c810_dasm_fetch(machine, pc + 4); |
| 724 | dest = lsi53c810_dasm_fetch(pc + 4); |
769 | 725 | |
770 | 726 | buf += sprintf(buf, "SELECT%s %d, 0x%08X", |
771 | 727 | (op & 0x01000000) ? " ATN" : "", |
r17519 | r17520 | |
824 | 780 | case 0x98000000: op_mnemonic = "INT"; break; |
825 | 781 | } |
826 | 782 | |
827 | | dest = lsi53c810_dasm_fetch(machine, pc + 4); |
| 783 | dest = lsi53c810_dasm_fetch(pc + 4); |
828 | 784 | |
829 | 785 | if (op & 0x00800000) |
830 | 786 | { |
r17519 | r17520 | |
870 | 826 | else if ((op & 0xE0000000) == 0x00000000) |
871 | 827 | { |
872 | 828 | /* MOVE FROM */ |
873 | | dest = lsi53c810_dasm_fetch(machine, pc + 4); |
| 829 | dest = lsi53c810_dasm_fetch(pc + 4); |
874 | 830 | |
875 | 831 | buf += sprintf(buf, "MOVE FROM 0x%08X, WHEN %s", |
876 | 832 | dest, phases[(op >> 24) & 0x07]); |
r17519 | r17520 | |
880 | 836 | else if ((op & 0xE0000000) == 0x20000000) |
881 | 837 | { |
882 | 838 | /* MOVE PTR */ |
883 | | dest = lsi53c810_dasm_fetch(machine, pc + 4); |
| 839 | dest = lsi53c810_dasm_fetch(pc + 4); |
884 | 840 | |
885 | 841 | buf += sprintf(buf, "MOVE 0x%08X, PTR 0x%08X, WHEN %s", |
886 | 842 | (op & 0x00FFFFFF), dest, phases[(op >> 24) & 0x07]); |
r17519 | r17520 | |
894 | 850 | return result; |
895 | 851 | } |
896 | 852 | |
| 853 | const device_type LSI53C810 = &device_creator<lsi53c810_device>; |
trunk/src/mess/machine/bebox.c
r17519 | r17520 | |
287 | 287 | } |
288 | 288 | |
289 | 289 | |
290 | | static void bebox_set_irq_bit(running_machine &machine, unsigned int interrupt_bit, int val) |
| 290 | void bebox_set_irq_bit(running_machine &machine, unsigned int interrupt_bit, int val) |
291 | 291 | { |
292 | 292 | bebox_state *state = machine.driver_data<bebox_state>(); |
293 | 293 | static const char *const interrupt_names[32] = |
r17519 | r17520 | |
840 | 840 | |
841 | 841 | static READ64_HANDLER( scsi53c810_r ) |
842 | 842 | { |
| 843 | bebox_state *state = space->machine().driver_data<bebox_state>(); |
843 | 844 | int reg = offset*8; |
844 | 845 | UINT64 r = 0; |
845 | 846 | if (!(mem_mask & U64(0xff00000000000000))) { |
846 | | r |= (UINT64)lsi53c810_reg_r(space, reg+0) << 56; |
| 847 | r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+0) << 56; |
847 | 848 | } |
848 | 849 | if (!(mem_mask & U64(0x00ff000000000000))) { |
849 | | r |= (UINT64)lsi53c810_reg_r(space, reg+1) << 48; |
| 850 | r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+1) << 48; |
850 | 851 | } |
851 | 852 | if (!(mem_mask & U64(0x0000ff0000000000))) { |
852 | | r |= (UINT64)lsi53c810_reg_r(space, reg+2) << 40; |
| 853 | r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+2) << 40; |
853 | 854 | } |
854 | 855 | if (!(mem_mask & U64(0x000000ff00000000))) { |
855 | | r |= (UINT64)lsi53c810_reg_r(space, reg+3) << 32; |
| 856 | r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+3) << 32; |
856 | 857 | } |
857 | 858 | if (!(mem_mask & U64(0x00000000ff000000))) { |
858 | | r |= (UINT64)lsi53c810_reg_r(space, reg+4) << 24; |
| 859 | r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+4) << 24; |
859 | 860 | } |
860 | 861 | if (!(mem_mask & U64(0x0000000000ff0000))) { |
861 | | r |= (UINT64)lsi53c810_reg_r(space, reg+5) << 16; |
| 862 | r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+5) << 16; |
862 | 863 | } |
863 | 864 | if (!(mem_mask & U64(0x000000000000ff00))) { |
864 | | r |= (UINT64)lsi53c810_reg_r(space, reg+6) << 8; |
| 865 | r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+6) << 8; |
865 | 866 | } |
866 | 867 | if (!(mem_mask & U64(0x00000000000000ff))) { |
867 | | r |= (UINT64)lsi53c810_reg_r(space, reg+7) << 0; |
| 868 | r |= (UINT64)state->m_lsi53c810->lsi53c810_reg_r(reg+7) << 0; |
868 | 869 | } |
869 | 870 | |
870 | 871 | return r; |
r17519 | r17520 | |
873 | 874 | |
874 | 875 | static WRITE64_HANDLER( scsi53c810_w ) |
875 | 876 | { |
| 877 | bebox_state *state = space->machine().driver_data<bebox_state>(); |
876 | 878 | int reg = offset*8; |
877 | 879 | if (!(mem_mask & U64(0xff00000000000000))) { |
878 | | lsi53c810_reg_w(space, reg+0, data >> 56); |
| 880 | state->m_lsi53c810->lsi53c810_reg_w(reg+0, data >> 56); |
879 | 881 | } |
880 | 882 | if (!(mem_mask & U64(0x00ff000000000000))) { |
881 | | lsi53c810_reg_w(space, reg+1, data >> 48); |
| 883 | state->m_lsi53c810->lsi53c810_reg_w(reg+1, data >> 48); |
882 | 884 | } |
883 | 885 | if (!(mem_mask & U64(0x0000ff0000000000))) { |
884 | | lsi53c810_reg_w(space, reg+2, data >> 40); |
| 886 | state->m_lsi53c810->lsi53c810_reg_w(reg+2, data >> 40); |
885 | 887 | } |
886 | 888 | if (!(mem_mask & U64(0x000000ff00000000))) { |
887 | | lsi53c810_reg_w(space, reg+3, data >> 32); |
| 889 | state->m_lsi53c810->lsi53c810_reg_w(reg+3, data >> 32); |
888 | 890 | } |
889 | 891 | if (!(mem_mask & U64(0x00000000ff000000))) { |
890 | | lsi53c810_reg_w(space, reg+4, data >> 24); |
| 892 | state->m_lsi53c810->lsi53c810_reg_w(reg+4, data >> 24); |
891 | 893 | } |
892 | 894 | if (!(mem_mask & U64(0x0000000000ff0000))) { |
893 | | lsi53c810_reg_w(space, reg+5, data >> 16); |
| 895 | state->m_lsi53c810->lsi53c810_reg_w(reg+5, data >> 16); |
894 | 896 | } |
895 | 897 | if (!(mem_mask & U64(0x000000000000ff00))) { |
896 | | lsi53c810_reg_w(space, reg+6, data >> 8); |
| 898 | state->m_lsi53c810->lsi53c810_reg_w(reg+6, data >> 8); |
897 | 899 | } |
898 | 900 | if (!(mem_mask & U64(0x00000000000000ff))) { |
899 | | lsi53c810_reg_w(space, reg+7, data >> 0); |
| 901 | state->m_lsi53c810->lsi53c810_reg_w(reg+7, data >> 0); |
900 | 902 | } |
901 | 903 | } |
902 | 904 | |
903 | 905 | |
904 | | #define BYTE_REVERSE32(x) (((x >> 24) & 0xff) | \ |
905 | | ((x >> 8) & 0xff00) | \ |
906 | | ((x << 8) & 0xff0000) | \ |
907 | | ((x << 24) & 0xff000000)) |
908 | | |
909 | | static UINT32 scsi53c810_fetch(running_machine &machine, UINT32 dsp) |
910 | | { |
911 | | UINT32 result; |
912 | | result = machine.device("ppc1")->memory().space(AS_PROGRAM)->read_dword(dsp & 0x7FFFFFFF); |
913 | | return BYTE_REVERSE32(result); |
914 | | } |
915 | | |
916 | | |
917 | | static void scsi53c810_irq_callback(running_machine &machine, int value) |
918 | | { |
919 | | bebox_set_irq_bit(machine, 21, value); |
920 | | } |
921 | | |
922 | | |
923 | | static void scsi53c810_dma_callback(running_machine &machine, UINT32 src, UINT32 dst, int length, int byteswap) |
924 | | { |
925 | | } |
926 | | |
927 | | |
928 | 906 | UINT32 scsi53c810_pci_read(device_t *busdevice, device_t *device, int function, int offset, UINT32 mem_mask) |
929 | 907 | { |
930 | 908 | bebox_state *state = device->machine().driver_data<bebox_state>(); |
r17519 | r17520 | |
990 | 968 | } |
991 | 969 | |
992 | 970 | |
993 | | static const SCSIConfigTable dev_table = |
994 | | { |
995 | | 2, /* 2 SCSI devices */ |
996 | | { |
997 | | { "harddisk1" }, |
998 | | { "cdrom" } |
999 | | } |
1000 | | }; |
1001 | | |
1002 | | static const struct LSI53C810interface scsi53c810_intf = |
1003 | | { |
1004 | | &dev_table, /* SCSI device table */ |
1005 | | &scsi53c810_irq_callback, |
1006 | | &scsi53c810_dma_callback, |
1007 | | &scsi53c810_fetch, |
1008 | | }; |
1009 | | |
1010 | | |
1011 | 971 | static TIMER_CALLBACK( bebox_get_devices ) { |
1012 | 972 | bebox_state *state = machine.driver_data<bebox_state>(); |
1013 | 973 | state->m_devices.pic8259_master = machine.device("pic8259_master"); |
r17519 | r17520 | |
1042 | 1002 | MACHINE_START( bebox ) |
1043 | 1003 | { |
1044 | 1004 | pc_fdc_init(machine, &bebox_fdc_interface); |
1045 | | /* SCSI */ |
1046 | | lsi53c810_init(machine, &scsi53c810_intf); |
1047 | 1005 | } |
1048 | 1006 | |
1049 | 1007 | DRIVER_INIT_MEMBER(bebox_state,bebox) |