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r17435 Friday 24th August, 2012 at 00:40:54 UTC by Tafoid
Get all the handlers into the device state.  From Haze (nw)
[src/mame/includes]megadriv.h
[src/mame/machine]mega32x.c mega32x.h
[src/mess/drivers]megadriv.c

trunk/src/mame/machine/mega32x.c
r17434r17435
284284/**********************************************************************************************/
285285
286286
287static READ16_HANDLER( _32x_common_vdp_regs_r );
288static WRITE16_HANDLER( _32x_common_vdp_regs_w );
289287
290288static UINT16 _32x_autofill_length;
291289static UINT16 _32x_autofill_address;
r17434r17435
296294
297295
298296
299static READ16_HANDLER( _32x_68k_palette_r )
297READ16_MEMBER( sega_32x_device::_32x_68k_palette_r )
300298{
301299   return _32x_palette[offset];
302300}
303301
304static WRITE16_HANDLER( _32x_68k_palette_w )
302WRITE16_MEMBER( sega_32x_device::_32x_68k_palette_w )
305303{
306304   int r,g,b, p;
307305
r17434r17435
315313
316314   _32x_palette_lookup[offset] = (r << 10) | (g << 5) | (b << 0) | (p << 15);
317315
318   palette_set_color_rgb(space->machine(),offset+0x40,pal5bit(r),pal5bit(g),pal5bit(b));
316   palette_set_color_rgb(space.machine(),offset+0x40,pal5bit(r),pal5bit(g),pal5bit(b));
319317
320318}
321319
322static READ16_HANDLER( _32x_68k_dram_r )
320READ16_MEMBER( sega_32x_device::_32x_68k_dram_r )
323321{
324322   return _32x_access_dram[offset];
325323}
326324
327static WRITE16_HANDLER( _32x_68k_dram_w )
325WRITE16_MEMBER( sega_32x_device::_32x_68k_dram_w )
328326{
329327   if ((mem_mask&0xffff) == 0xffff)
330328   {
r17434r17435
354352   }
355353}
356354
357static READ16_HANDLER( _32x_68k_dram_overwrite_r )
355READ16_MEMBER( sega_32x_device::_32x_68k_dram_overwrite_r )
358356{
359357   return _32x_access_dram[offset];
360358}
361359
362static WRITE16_HANDLER( _32x_68k_dram_overwrite_w )
360WRITE16_MEMBER( sega_32x_device::_32x_68k_dram_overwrite_w )
363361{
364362   //COMBINE_DATA(&_32x_access_dram[offset+0x10000]);
365363
r17434r17435
413411static UINT16 a15106_reg;
414412
415413
416static READ16_HANDLER( _32x_68k_a15106_r )
414READ16_MEMBER( sega_32x_device::_32x_68k_a15106_r )
417415{
418416   UINT16 retval;
419417
r17434r17435
424422   return retval;
425423}
426424
427static WRITE16_HANDLER( _32x_68k_a15106_w )
425WRITE16_MEMBER( sega_32x_device::_32x_68k_a15106_w )
428426{
429427   if (ACCESSING_BITS_0_7)
430428   {
r17434r17435
435433
436434         // install the game rom in the normal 0x000000-0x03fffff space used by the genesis - this allows VDP DMA operations to work as they have to be from this area or RAM
437435         // it should also UNMAP the banked rom area...
438         space->install_rom(0x0000100, 0x03fffff, space->machine().root_device().memregion("gamecart")->base() + 0x100);
436         space.install_rom(0x0000100, 0x03fffff, space.machine().root_device().memregion("gamecart")->base() + 0x100);
439437      }
440438      else
441439      {
r17434r17435
443441
444442         // this is actually blank / nop area
445443         // we should also map the banked area back (we don't currently unmap it tho)
446         space->install_rom(0x0000100, 0x03fffff, space->machine().root_device().memregion("maincpu")->base()+0x100);
444         space.install_rom(0x0000100, 0x03fffff, space.machine().root_device().memregion("maincpu")->base()+0x100);
447445      }
448446
449447      if((a15106_reg & 4) == 0) // clears the FIFO state
r17434r17435
474472
475473static UINT16 dreq_src_addr[2],dreq_dst_addr[2],dreq_size;
476474
477static READ16_HANDLER( _32x_dreq_common_r )
475READ16_MEMBER( sega_32x_device::_32x_dreq_common_r )
478476{
479   address_space* _68kspace = space->machine().device("maincpu")->memory().space(AS_PROGRAM);
477   address_space* _68kspace = space.machine().device("maincpu")->memory().space(AS_PROGRAM);
480478
481479   switch (offset)
482480   {
r17434r17435
492490         return dreq_size;
493491
494492      case 0x0a/2: // a15112 / 4012
495         if (space == _68kspace)
493         if (&space == _68kspace)
496494         {
497495            printf("attempting to READ FIFO with 68k!\n");
498496            return 0xffff;
r17434r17435
508506            printf("Fifo block a isn't filled!\n");
509507
510508         if (current_fifo_readblock == fifo_block_b && !fifo_block_b_full)
511            printf("%08x Fifo block b isn't filled!\n",cpu_get_pc(&space->device()));
509            printf("%08x Fifo block b isn't filled!\n",cpu_get_pc(&space.device()));
512510
513511
514512         if (current_fifo_read_pos==4)
r17434r17435
545543   return 0x0000;
546544}
547545
548static WRITE16_HANDLER( _32x_dreq_common_w )
546WRITE16_MEMBER( sega_32x_device::_32x_dreq_common_w )
549547{
550   address_space* _68kspace = space->machine().device("maincpu")->memory().space(AS_PROGRAM);
548   address_space* _68kspace = space.machine().device("maincpu")->memory().space(AS_PROGRAM);
551549
552550   switch (offset)
553551   {
554552      case 0x00/2: // a15108 / 4008
555553      case 0x02/2: // a1510a / 400a
556         if (space != _68kspace)
554         if (&space != _68kspace)
557555         {
558556            printf("attempting to WRITE DREQ SRC with SH2!\n");
559557            return;
r17434r17435
568566
569567      case 0x04/2: // a1510c / 400c
570568      case 0x06/2: // a1510e / 400e
571         if (space != _68kspace)
569         if (&space != _68kspace)
572570         {
573571            printf("attempting to WRITE DREQ DST with SH2!\n");
574572            return;
r17434r17435
582580         break;
583581
584582      case 0x08/2: // a15110 / 4010
585         if (space != _68kspace)
583         if (&space != _68kspace)
586584         {
587585            printf("attempting to WRITE DREQ SIZE with SH2!\n");
588586            return;
r17434r17435
596594         break;
597595
598596      case 0x0a/2: // a15112 / 4012 - FIFO Write (68k only!)
599         if (space != _68kspace)
597         if (&space != _68kspace)
600598         {
601599            printf("attempting to WRITE FIFO with SH2!\n");
602600            return;
r17434r17435
633631                  current_fifo_block = fifo_block_b;
634632                  current_fifo_readblock = fifo_block_a;
635633                  // incase we have a stalled DMA in progress, let the SH2 know there is data available
636                  sh2_notify_dma_data_available(space->machine().device(_32X_MASTER_TAG));
637                  sh2_notify_dma_data_available(space->machine().device(_32X_SLAVE_TAG));
634                  sh2_notify_dma_data_available(space.machine().device(_32X_MASTER_TAG));
635                  sh2_notify_dma_data_available(space.machine().device(_32X_SLAVE_TAG));
638636
639637               }
640638               current_fifo_write_pos = 0;
r17434r17435
648646                  current_fifo_block = fifo_block_a;
649647                  current_fifo_readblock = fifo_block_b;
650648                  // incase we have a stalled DMA in progress, let the SH2 know there is data available
651                  sh2_notify_dma_data_available(space->machine().device(_32X_MASTER_TAG));
652                  sh2_notify_dma_data_available(space->machine().device(_32X_SLAVE_TAG));
649                  sh2_notify_dma_data_available(space.machine().device(_32X_MASTER_TAG));
650                  sh2_notify_dma_data_available(space.machine().device(_32X_SLAVE_TAG));
653651
654652               }
655653
r17434r17435
664662
665663static UINT8 sega_tv;
666664
667static READ16_HANDLER( _32x_68k_a1511a_r )
665READ16_MEMBER( sega_32x_device::_32x_68k_a1511a_r )
668666{
669667   return sega_tv;
670668}
671669
672static WRITE16_HANDLER( _32x_68k_a1511a_w )
670WRITE16_MEMBER( sega_32x_device::_32x_68k_a1511a_w )
673671{
674672   sega_tv = data & 1;
675673
r17434r17435
682680
683681static UINT16 hint_vector[2];
684682
685static READ16_HANDLER( _32x_68k_hint_vector_r )
683READ16_MEMBER( sega_32x_device::_32x_68k_hint_vector_r )
686684{
687685   return hint_vector[offset];
688686}
689687
690static WRITE16_HANDLER( _32x_68k_hint_vector_w )
688WRITE16_MEMBER( sega_32x_device::_32x_68k_hint_vector_w )
691689{
692690   hint_vector[offset] = data;
693691}
694692
695693// returns MARS, the system ID of the 32x
696static READ16_HANDLER( _32x_68k_MARS_r )
694READ16_MEMBER( sega_32x_device::_32x_68k_MARS_r )
697695{
698696    switch (offset)
699697    {
r17434r17435
715713
716714static UINT16 a15100_reg;
717715
718static READ16_HANDLER( _32x_68k_a15100_r )
716READ16_MEMBER( sega_32x_device::_32x_68k_a15100_r )
719717{
720718   return (_32x_access_auth<<15) | 0x0080;
721719}
722720
723static WRITE16_HANDLER( _32x_68k_a15100_w )
721WRITE16_MEMBER( sega_32x_device::_32x_68k_a15100_w )
724722{
725723   if (ACCESSING_BITS_0_7)
726724   {
r17434r17435
735733      if (data & 0x01)
736734      {
737735         _32x_adapter_enabled = 1;
738         space->install_rom(0x0880000, 0x08fffff, space->machine().root_device().memregion("gamecart")->base()); // 'fixed' 512kb rom bank
736         space.install_rom(0x0880000, 0x08fffff, space.machine().root_device().memregion("gamecart")->base()); // 'fixed' 512kb rom bank
739737
740         space->install_read_bank(0x0900000, 0x09fffff, "bank12"); // 'bankable' 1024kb rom bank
741         space->machine().root_device().membank("bank12")->set_base(space->machine().root_device().memregion("gamecart")->base()+((_32x_68k_a15104_reg&0x3)*0x100000) );
738         space.install_read_bank(0x0900000, 0x09fffff, "bank12"); // 'bankable' 1024kb rom bank
739         space.machine().root_device().membank("bank12")->set_base(space.machine().root_device().memregion("gamecart")->base()+((_32x_68k_a15104_reg&0x3)*0x100000) );
742740
743         space->install_rom(0x0000000, 0x03fffff, space->machine().root_device().memregion("32x_68k_bios")->base());
741         space.install_rom(0x0000000, 0x03fffff, space.machine().root_device().memregion("32x_68k_bios")->base());
744742
745743         /* VDP area */
746         space->install_legacy_readwrite_handler(0x0a15180, 0x0a1518b, FUNC(_32x_common_vdp_regs_r), FUNC(_32x_common_vdp_regs_w)); // common / shared VDP regs
747         space->install_legacy_readwrite_handler(0x0a15200, 0x0a153ff, FUNC(_32x_68k_palette_r), FUNC(_32x_68k_palette_w)); // access to 'palette' xRRRRRGGGGGBBBBB
748         space->install_legacy_readwrite_handler(0x0840000, 0x085ffff, FUNC(_32x_68k_dram_r), FUNC(_32x_68k_dram_w)); // access to 'display ram' (framebuffer)
749         space->install_legacy_readwrite_handler(0x0860000, 0x087ffff, FUNC(_32x_68k_dram_overwrite_r), FUNC(_32x_68k_dram_overwrite_w)); // access to 'display ram' (framebuffer)
744         space.install_readwrite_handler(0x0a15180, 0x0a1518b, read16_delegate(FUNC(sega_32x_device::_32x_common_vdp_regs_r), this),      write16_delegate(FUNC(sega_32x_device::_32x_common_vdp_regs_w),this)); // common / shared VDP regs
745         space.install_readwrite_handler(0x0a15200, 0x0a153ff, read16_delegate(FUNC(sega_32x_device::_32x_68k_palette_r), this),         write16_delegate(FUNC(sega_32x_device::_32x_68k_palette_w),this)); // access to 'palette' xRRRRRGGGGGBBBBB
746         space.install_readwrite_handler(0x0840000, 0x085ffff, read16_delegate(FUNC(sega_32x_device::_32x_68k_dram_r), this),         write16_delegate(FUNC(sega_32x_device::_32x_68k_dram_w),this)); // access to 'display ram' (framebuffer)
747         space.install_readwrite_handler(0x0860000, 0x087ffff, read16_delegate(FUNC(sega_32x_device::_32x_68k_dram_overwrite_r),this),   write16_delegate(FUNC(sega_32x_device::_32x_68k_dram_overwrite_w),this)); // access to 'display ram' (framebuffer)
750748
751749
752750
753         space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x000070, 0x000073, FUNC(_32x_68k_hint_vector_r), FUNC(_32x_68k_hint_vector_w)); // h interrupt vector
751         space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x000070, 0x000073, read16_delegate(FUNC(sega_32x_device::_32x_68k_hint_vector_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_hint_vector_w),this)); // h interrupt vector
754752      }
755753      else
756754      {
757755         _32x_adapter_enabled = 0;
758756
759         space->install_rom(0x0000000, 0x03fffff, space->machine().root_device().memregion("gamecart")->base());
760         space->machine().device("maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x000070, 0x000073, FUNC(_32x_68k_hint_vector_r), FUNC(_32x_68k_hint_vector_w)); // h interrupt vector
757         space.install_rom(0x0000000, 0x03fffff, space.machine().root_device().memregion("gamecart")->base());
758         space.machine().device("maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x000070, 0x000073, read16_delegate(FUNC(sega_32x_device::_32x_68k_hint_vector_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_hint_vector_w),this)); // h interrupt vector
761759      }
762760   }
763761
r17434r17435
775773
776774static int _32x_68k_a15102_reg;
777775
778static READ16_HANDLER( _32x_68k_a15102_r )
776READ16_MEMBER( sega_32x_device::_32x_68k_a15102_r )
779777{
780778   //printf("_32x_68k_a15102_r\n");
781779   return _32x_68k_a15102_reg;
782780}
783781
784static WRITE16_HANDLER( _32x_68k_a15102_w )
782WRITE16_MEMBER( sega_32x_device::_32x_68k_a15102_w )
785783{
786784   if (ACCESSING_BITS_0_7)
787785   {
r17434r17435
807805/**********************************************************************************************/
808806
809807
810static READ16_HANDLER( _32x_68k_a15104_r )
808READ16_MEMBER( sega_32x_device::_32x_68k_a15104_r )
811809{
812810   return _32x_68k_a15104_reg;
813811}
814812
815static WRITE16_HANDLER( _32x_68k_a15104_w )
813WRITE16_MEMBER( sega_32x_device::_32x_68k_a15104_w )
816814{
817815   if (ACCESSING_BITS_0_7)
818816   {
r17434r17435
824822      _32x_68k_a15104_reg = (_32x_68k_a15104_reg & 0x00ff) | (data & 0xff00);
825823   }
826824
827   space->machine().root_device().membank("bank12")->set_base(space->machine().root_device().memregion("gamecart")->base()+((_32x_68k_a15104_reg&0x3)*0x100000) );
825   space.machine().root_device().membank("bank12")->set_base(space.machine().root_device().memregion("gamecart")->base()+((_32x_68k_a15104_reg&0x3)*0x100000) );
828826}
829827
830828/**********************************************************************************************/
r17434r17435
838836/**********************************************************************************************/
839837
840838// reads
841static READ16_HANDLER( _32x_68k_commsram_r )
839READ16_MEMBER( sega_32x_device::_32x_68k_commsram_r )
842840{
843   if (_32X_COMMS_PORT_SYNC) space->machine().scheduler().synchronize();
841   if (_32X_COMMS_PORT_SYNC) space.machine().scheduler().synchronize();
844842   return commsram[offset];
845843}
846844
847845// writes
848static WRITE16_HANDLER( _32x_68k_commsram_w )
846WRITE16_MEMBER( sega_32x_device::_32x_68k_commsram_w )
849847{
850848   COMBINE_DATA(&commsram[offset]);
851   if (_32X_COMMS_PORT_SYNC) space->machine().scheduler().synchronize();
849   if (_32X_COMMS_PORT_SYNC) space.machine().scheduler().synchronize();
852850}
853851
854852/**********************************************************************************************/
r17434r17435
943941   _32xdev->m_32x_pwm_timer->adjust(attotime::from_hz((PWM_CLOCK) / (pwm_cycle - 1)));
944942}
945943
946static READ16_HANDLER( _32x_pwm_r )
944READ16_MEMBER( sega_32x_device::_32x_pwm_r )
947945{
948946   switch(offset)
949947   {
r17434r17435
958956   return 0xffff;
959957}
960958
961static WRITE16_HANDLER( _32x_pwm_w )
959WRITE16_MEMBER( sega_32x_device::_32x_pwm_w )
962960{
963961
964962   switch(offset)
r17434r17435
966964      case 0x00/2:
967965         pwm_ctrl = data & 0xffff;
968966         pwm_tm_reg = (pwm_ctrl & 0xf00) >> 8;
969         calculate_pwm_timer(space->machine());
967         calculate_pwm_timer(space.machine());
970968         break;
971969      case 0x02/2:
972970         pwm_cycle = pwm_cycle_reg = data & 0xfff;
973         calculate_pwm_timer(space->machine());
971         calculate_pwm_timer(space.machine());
974972         break;
975973      case 0x04/2:
976974         if(lch_index_w < PWM_FIFO_SIZE)
r17434r17435
10141012   }
10151013}
10161014
1017static WRITE16_HANDLER( _32x_68k_pwm_w )
1015WRITE16_MEMBER( sega_32x_device::_32x_68k_pwm_w )
10181016{
10191017   if(offset == 0/2)
10201018      _32x_pwm_w(space,offset,(data & 0x7f) | (pwm_ctrl & 0xff80),mem_mask);
r17434r17435
10501048   return value4;
10511049}
10521050
1053static READ16_HANDLER( _32x_common_vdp_regs_r )
1051READ16_MEMBER( sega_32x_device::_32x_common_vdp_regs_r )
10541052{
10551053   // what happens if the z80 accesses it, what authorization do we use?
10561054
r17434r17435
11381136}
11391137
11401138
1141static WRITE16_HANDLER( _32x_common_vdp_regs_w )
1139WRITE16_MEMBER( sega_32x_device::_32x_common_vdp_regs_w )
11421140{
11431141   // what happens if the z80 accesses it, what authorization do we use? which address space do we get?? the z80 *can* write here and to the framebuffer via the window
11441142
1145   address_space* _68kspace = space->machine().device("maincpu")->memory().space(AS_PROGRAM);
1143   address_space* _68kspace = space.machine().device("maincpu")->memory().space(AS_PROGRAM);
11461144
1147   if (space!= _68kspace)
1145   if (&space!= _68kspace)
11481146   {
11491147      if (_32x_access_auth!=1)
11501148         return;
11511149   }
11521150
1153   if (space== _68kspace)
1151   if (&space== _68kspace)
11541152   {
11551153      if (_32x_access_auth!=0)
11561154         return;
r17434r17435
12701268/**********************************************************************************************/
12711269
12721270/* MASTER */
1273static READ16_HANDLER( _32x_sh2_master_4000_r )
1271READ16_MEMBER( sega_32x_device::_32x_sh2_master_4000_r )
12741272{
12751273   UINT16 retvalue = 0x0200;
12761274   retvalue |= _32x_access_auth << 15;
r17434r17435
12841282   return retvalue;
12851283}
12861284
1287static WRITE16_HANDLER( _32x_sh2_master_4000_w )
1285WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_4000_w )
12881286{
12891287   if (ACCESSING_BITS_8_15)
12901288   {
r17434r17435
13021300      //if (sh2_master_hint_enable) printf("sh2_master_hint_enable enable!\n");
13031301      //if (sh2_master_pwmint_enable) printf("sh2_master_pwn_enable enable!\n");
13041302
1305      _32x_check_irqs(space->machine());
1303      _32x_check_irqs(space.machine());
13061304   }
13071305}
13081306
13091307/* SLAVE */
13101308
1311static READ16_HANDLER( _32x_sh2_slave_4000_r )
1309READ16_MEMBER( sega_32x_device::_32x_sh2_slave_4000_r )
13121310{
13131311   UINT16 retvalue = 0x0200;
13141312   retvalue |= _32x_access_auth << 15;
r17434r17435
13221320}
13231321
13241322
1325static WRITE16_HANDLER( _32x_sh2_slave_4000_w )
1323WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4000_w )
13261324{
13271325   if (ACCESSING_BITS_8_15)
13281326   {
r17434r17435
13401338      //if (sh2_slave_hint_enable) printf("sh2_slave_hint_enable enable!\n");
13411339      //if (sh2_slave_pwmint_enable) printf("sh2_slave_pwm_enable enable!\n");
13421340
1343      _32x_check_irqs(space->machine());
1341      _32x_check_irqs(space.machine());
13441342
13451343   }
13461344}
r17434r17435
13511349// Shouldn't be used
13521350/**********************************************************************************************/
13531351
1354static READ16_HANDLER( _32x_sh2_common_4002_r )
1352READ16_MEMBER( sega_32x_device::_32x_sh2_common_4002_r )
13551353{
13561354   printf("reading 4002!\n");
13571355   return 0x0000;
13581356}
13591357
1360static WRITE16_HANDLER( _32x_sh2_common_4002_w )
1358WRITE16_MEMBER( sega_32x_device::_32x_sh2_common_4002_w )
13611359{
13621360   printf("write 4002!\n");
13631361}
r17434r17435
13681366// H Count Register (H Interrupt)
13691367// 0 = every line
13701368/**********************************************************************************************/
1371static READ16_HANDLER( _32x_sh2_common_4004_r )
1369READ16_MEMBER( sega_32x_device::_32x_sh2_common_4004_r )
13721370{
13731371   return _32x_hcount_reg;
13741372}
13751373
1376static WRITE16_HANDLER( _32x_sh2_common_4004_w )
1374WRITE16_MEMBER( sega_32x_device::_32x_sh2_common_4004_w )
13771375{
13781376   _32x_hcount_reg = data & 0xff;
13791377}
r17434r17435
13841382// DReq Control Register
13851383/**********************************************************************************************/
13861384
1387static READ16_HANDLER( _32x_sh2_common_4006_r )
1385READ16_MEMBER( sega_32x_device::_32x_sh2_common_4006_r )
13881386{
13891387   //printf("DREQ read!\n"); // tempo reads it, shut up for now
13901388   return _32x_68k_a15106_r(space,offset,mem_mask);
13911389}
13921390
1393static WRITE16_HANDLER( _32x_sh2_common_4006_w )
1391WRITE16_MEMBER( sega_32x_device::_32x_sh2_common_4006_w )
13941392{
13951393   printf("DREQ write!\n"); //register is read only on SH-2 side
13961394}
r17434r17435
14011399// VRES (md reset button interrupt) clear
14021400/**********************************************************************************************/
14031401
1404static WRITE16_HANDLER( _32x_sh2_master_4014_w ){ device_set_input_line(_32x_master_cpu,SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
1405static WRITE16_HANDLER( _32x_sh2_slave_4014_w ) { device_set_input_line(_32x_slave_cpu, SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
1402WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_4014_w ){ device_set_input_line(_32x_master_cpu,SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
1403WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4014_w ) { device_set_input_line(_32x_slave_cpu, SH2_VRES_IRQ_LEVEL,CLEAR_LINE);}
14061404
14071405/**********************************************************************************************/
14081406// SH2 side 4016
14091407// VINT (vertical interrupt) clear
14101408/**********************************************************************************************/
14111409
1412static WRITE16_HANDLER( _32x_sh2_master_4016_w ){ sh2_master_vint_pending = 0; _32x_check_irqs(space->machine()); }
1413static WRITE16_HANDLER( _32x_sh2_slave_4016_w ) { sh2_slave_vint_pending = 0; _32x_check_irqs(space->machine()); }
1410WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_4016_w ){ sh2_master_vint_pending = 0; _32x_check_irqs(space.machine()); }
1411WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4016_w ) { sh2_slave_vint_pending = 0; _32x_check_irqs(space.machine()); }
14141412
14151413/**********************************************************************************************/
14161414// SH2 side 4018
14171415// HINT (horizontal interrupt) clear
14181416/**********************************************************************************************/
14191417
1420static WRITE16_HANDLER( _32x_sh2_master_4018_w ){ device_set_input_line(_32x_master_cpu,SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
1421static WRITE16_HANDLER( _32x_sh2_slave_4018_w ) { device_set_input_line(_32x_slave_cpu, SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
1418WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_4018_w ){ device_set_input_line(_32x_master_cpu,SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
1419WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_4018_w ) { device_set_input_line(_32x_slave_cpu, SH2_HINT_IRQ_LEVEL,CLEAR_LINE);}
14221420
14231421/**********************************************************************************************/
14241422// SH2 side 401A
r17434r17435
14261424// Note: flag cleared here is a guess, according to After Burner behaviour
14271425/**********************************************************************************************/
14281426
1429static WRITE16_HANDLER( _32x_sh2_master_401a_w ){ _32x_68k_a15102_reg &= ~1; device_set_input_line(_32x_master_cpu,SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
1430static WRITE16_HANDLER( _32x_sh2_slave_401a_w ) { _32x_68k_a15102_reg &= ~2; device_set_input_line(_32x_slave_cpu, SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
1427WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_401a_w ){ _32x_68k_a15102_reg &= ~1; device_set_input_line(_32x_master_cpu,SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
1428WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_401a_w ) { _32x_68k_a15102_reg &= ~2; device_set_input_line(_32x_slave_cpu, SH2_CINT_IRQ_LEVEL,CLEAR_LINE);}
14311429
14321430/**********************************************************************************************/
14331431// SH2 side 401C
14341432// PINT (PWM timer interrupt) clear
14351433/**********************************************************************************************/
14361434
1437static WRITE16_HANDLER( _32x_sh2_master_401c_w ){ device_set_input_line(_32x_master_cpu,SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
1438static WRITE16_HANDLER( _32x_sh2_slave_401c_w ) { device_set_input_line(_32x_slave_cpu, SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
1435WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_401c_w ){ device_set_input_line(_32x_master_cpu,SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
1436WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_401c_w ) { device_set_input_line(_32x_slave_cpu, SH2_PINT_IRQ_LEVEL,CLEAR_LINE);}
14391437
14401438/**********************************************************************************************/
14411439// SH2 side 401E
14421440// ?? unknown / unused
14431441/**********************************************************************************************/
14441442
1445static WRITE16_HANDLER( _32x_sh2_master_401e_w )
1443WRITE16_MEMBER( sega_32x_device::_32x_sh2_master_401e_w )
14461444{
14471445   printf("_32x_sh2_master_401e_w\n");
14481446}
14491447
1450static WRITE16_HANDLER( _32x_sh2_slave_401e_w )
1448WRITE16_MEMBER( sega_32x_device::_32x_sh2_slave_401e_w )
14511449{
14521450   printf("_32x_sh2_slave_401e_w\n");
14531451}
r17434r17435
15271525   UINT32 retvalue = 0x00000000;                                                   \
15281526   if (ACCESSING_BITS_16_31)                                                       \
15291527   {                                                                               \
1530      UINT16 ret = _32x_sh2_##NAMEA##_r(&space,0,(mem_mask>>16)&0xffff);         \
1528      UINT16 ret = _32x_sh2_##NAMEA##_r(space,0,(mem_mask>>16)&0xffff);         \
15311529      retvalue |= ret << 16;                                                      \
15321530   }                                                                               \
15331531   if (ACCESSING_BITS_0_15)                                                        \
15341532   {                                                                               \
1535      UINT16 ret = _32x_sh2_##NAMEB##_r(&space,0,(mem_mask>>0)&0xffff);          \
1533      UINT16 ret = _32x_sh2_##NAMEB##_r(space,0,(mem_mask>>0)&0xffff);          \
15361534      retvalue |= ret << 0;                                                       \
15371535   }                                                                               \
15381536                                                                                    \
r17434r17435
15441542{                                                                                       \
15451543   if (ACCESSING_BITS_16_31)                                                           \
15461544   {                                                                                   \
1547      _32x_sh2_##NAMEA##_w(&space,0,(data>>16)&0xffff,(mem_mask>>16)&0xffff);        \
1545      _32x_sh2_##NAMEA##_w(space,0,(data>>16)&0xffff,(mem_mask>>16)&0xffff);        \
15481546   }                                                                                   \
15491547   if (ACCESSING_BITS_0_15)                                                            \
15501548   {                                                                                   \
1551      _32x_sh2_##NAMEB##_w(&space,0,(data>>0)&0xffff,(mem_mask>>0)&0xffff);          \
1549      _32x_sh2_##NAMEB##_w(space,0,(data>>0)&0xffff,(mem_mask>>0)&0xffff);          \
15521550   }                                                                                   \
15531551}                                                                                       \
15541552
r17434r17435
15881586   AM_RANGE(0x00004000, 0x00004003) AM_READWRITE(_32x_sh2_master_4000_common_4002_r, _32x_sh2_master_4000_common_4002_w )
15891587   AM_RANGE(0x00004004, 0x00004007) AM_READWRITE(_32x_sh2_common_4004_common_4006_r, _32x_sh2_common_4004_common_4006_w)
15901588
1591   AM_RANGE(0x00004008, 0x00004013) AM_READWRITE16_LEGACY(_32x_dreq_common_r, _32x_dreq_common_w, 0xffffffff )
1589   AM_RANGE(0x00004008, 0x00004013) AM_READWRITE16(_32x_dreq_common_r, _32x_dreq_common_w, 0xffffffff )
15921590
15931591   AM_RANGE(0x00004014, 0x00004017) AM_READNOP AM_WRITE(_32x_sh2_master_4014_master_4016_w ) // IRQ clear
15941592   AM_RANGE(0x00004018, 0x0000401b) AM_READNOP AM_WRITE(_32x_sh2_master_4018_master_401a_w ) // IRQ clear
15951593   AM_RANGE(0x0000401c, 0x0000401f) AM_READNOP AM_WRITE(_32x_sh2_master_401c_master_401e_w ) // IRQ clear
15961594
1597   AM_RANGE(0x00004020, 0x0000402f) AM_READWRITE16_LEGACY(_32x_68k_commsram_r, _32x_68k_commsram_w, 0xffffffff )
1598   AM_RANGE(0x00004030, 0x0000403f) AM_READWRITE16_LEGACY(_32x_pwm_r, _32x_pwm_w, 0xffffffff )
1595   AM_RANGE(0x00004020, 0x0000402f) AM_READWRITE16(_32x_68k_commsram_r, _32x_68k_commsram_w, 0xffffffff )
1596   AM_RANGE(0x00004030, 0x0000403f) AM_READWRITE16(_32x_pwm_r, _32x_pwm_w, 0xffffffff )
15991597
1600   AM_RANGE(0x00004100, 0x0000410b) AM_READWRITE16_LEGACY(_32x_common_vdp_regs_r, _32x_common_vdp_regs_w , 0xffffffff)
1601   AM_RANGE(0x00004200, 0x000043ff) AM_READWRITE16_LEGACY(_32x_68k_palette_r, _32x_68k_palette_w, 0xffffffff)
1598   AM_RANGE(0x00004100, 0x0000410b) AM_READWRITE16(_32x_common_vdp_regs_r, _32x_common_vdp_regs_w , 0xffffffff)
1599   AM_RANGE(0x00004200, 0x000043ff) AM_READWRITE16(_32x_68k_palette_r, _32x_68k_palette_w, 0xffffffff)
1600   
1601   AM_RANGE(0x04000000, 0x0401ffff) AM_READWRITE16(_32x_68k_dram_r, _32x_68k_dram_w, 0xffffffff)
1602   AM_RANGE(0x04020000, 0x0403ffff) AM_READWRITE16(_32x_68k_dram_overwrite_r, _32x_68k_dram_overwrite_w, 0xffffffff)
16021603
1603   AM_RANGE(0x04000000, 0x0401ffff) AM_READWRITE16_LEGACY(_32x_68k_dram_r, _32x_68k_dram_w, 0xffffffff)
1604   AM_RANGE(0x04020000, 0x0403ffff) AM_READWRITE16_LEGACY(_32x_68k_dram_overwrite_r, _32x_68k_dram_overwrite_w, 0xffffffff)
1605
16061604   AM_RANGE(0x06000000, 0x0603ffff) AM_RAM AM_SHARE("sh2_shared")
16071605   AM_RANGE(0x02000000, 0x023fffff) AM_ROM AM_REGION(":gamecart_sh2", 0) // program is writeable (wwfraw)
16081606
r17434r17435
16171615   AM_RANGE(0x00004000, 0x00004003) AM_READWRITE(_32x_sh2_slave_4000_common_4002_r, _32x_sh2_slave_4000_common_4002_w )
16181616   AM_RANGE(0x00004004, 0x00004007) AM_READWRITE(_32x_sh2_common_4004_common_4006_r, _32x_sh2_common_4004_common_4006_w)
16191617
1620   AM_RANGE(0x00004008, 0x00004013) AM_READWRITE16_LEGACY(_32x_dreq_common_r, _32x_dreq_common_w, 0xffffffff )
1618   AM_RANGE(0x00004008, 0x00004013) AM_READWRITE16(_32x_dreq_common_r, _32x_dreq_common_w, 0xffffffff )
16211619
16221620   AM_RANGE(0x00004014, 0x00004017) AM_READNOP AM_WRITE(_32x_sh2_slave_4014_slave_4016_w ) // IRQ clear
16231621   AM_RANGE(0x00004018, 0x0000401b) AM_READNOP AM_WRITE(_32x_sh2_slave_4018_slave_401a_w ) // IRQ clear
16241622   AM_RANGE(0x0000401c, 0x0000401f) AM_READNOP AM_WRITE(_32x_sh2_slave_401c_slave_401e_w ) // IRQ clear
16251623
1626   AM_RANGE(0x00004020, 0x0000402f) AM_READWRITE16_LEGACY(_32x_68k_commsram_r, _32x_68k_commsram_w, 0xffffffff )
1627   AM_RANGE(0x00004030, 0x0000403f) AM_READWRITE16_LEGACY(_32x_pwm_r, _32x_pwm_w, 0xffffffff )
1624   AM_RANGE(0x00004020, 0x0000402f) AM_READWRITE16(_32x_68k_commsram_r, _32x_68k_commsram_w, 0xffffffff )
1625   AM_RANGE(0x00004030, 0x0000403f) AM_READWRITE16(_32x_pwm_r, _32x_pwm_w, 0xffffffff )
16281626
1629   AM_RANGE(0x00004100, 0x0000410b) AM_READWRITE16_LEGACY(_32x_common_vdp_regs_r, _32x_common_vdp_regs_w , 0xffffffff)
1630   AM_RANGE(0x00004200, 0x000043ff) AM_READWRITE16_LEGACY(_32x_68k_palette_r, _32x_68k_palette_w, 0xffffffff)
1627   AM_RANGE(0x00004100, 0x0000410b) AM_READWRITE16(_32x_common_vdp_regs_r, _32x_common_vdp_regs_w , 0xffffffff)
1628   AM_RANGE(0x00004200, 0x000043ff) AM_READWRITE16(_32x_68k_palette_r, _32x_68k_palette_w, 0xffffffff)
16311629
1632   AM_RANGE(0x04000000, 0x0401ffff) AM_READWRITE16_LEGACY(_32x_68k_dram_r, _32x_68k_dram_w, 0xffffffff)
1633   AM_RANGE(0x04020000, 0x0403ffff) AM_READWRITE16_LEGACY(_32x_68k_dram_overwrite_r, _32x_68k_dram_overwrite_w, 0xffffffff)
1630   AM_RANGE(0x04000000, 0x0401ffff) AM_READWRITE16(_32x_68k_dram_r, _32x_68k_dram_w, 0xffffffff)
1631   AM_RANGE(0x04020000, 0x0403ffff) AM_READWRITE16(_32x_68k_dram_overwrite_r, _32x_68k_dram_overwrite_w, 0xffffffff)
16341632
16351633   AM_RANGE(0x06000000, 0x0603ffff) AM_RAM AM_SHARE("sh2_shared")
16361634   AM_RANGE(0x02000000, 0x023fffff) AM_ROM AM_REGION(":gamecart_sh2", 0) // program is writeable (wwfraw)
r17434r17435
16441642
16451643
16461644
1647DRIVER_INIT_MEMBER(md_cons_state,_32x)
1648{
16491645
1650
1651
1652   _32x_adapter_enabled = 0;
1653
1654   if (_32x_adapter_enabled == 0)
1655   {
1656      machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_rom(0x0000000, 0x03fffff, machine().root_device().memregion(":gamecart")->base());
1657      machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0x000070, 0x000073, FUNC(_32x_68k_hint_vector_r), FUNC(_32x_68k_hint_vector_w)); // h interrupt vector
1658   };
1659
1660
1661   a15100_reg = 0x0000;
1662   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa15100, 0xa15101, FUNC(_32x_68k_a15100_r), FUNC(_32x_68k_a15100_w)); // framebuffer control regs
1663   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa15102, 0xa15103, FUNC(_32x_68k_a15102_r), FUNC(_32x_68k_a15102_w)); // send irq to sh2
1664   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa15104, 0xa15105, FUNC(_32x_68k_a15104_r), FUNC(_32x_68k_a15104_w)); // 68k BANK rom set
1665   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa15106, 0xa15107, FUNC(_32x_68k_a15106_r), FUNC(_32x_68k_a15106_w)); // dreq stuff
1666   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa15108, 0xa15113, FUNC(_32x_dreq_common_r), FUNC(_32x_dreq_common_w)); // dreq src / dst / length /fifo
1667
1668   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa1511a, 0xa1511b, FUNC(_32x_68k_a1511a_r), FUNC(_32x_68k_a1511a_w)); // SEGA TV
1669
1670   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa15120, 0xa1512f, FUNC(_32x_68k_commsram_r), FUNC(_32x_68k_commsram_w)); // comms reg 0-7
1671   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_readwrite_handler(0xa15130, 0xa1513f, FUNC(_32x_pwm_r), FUNC(_32x_68k_pwm_w));
1672
1673   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_legacy_read_handler(0x0a130ec, 0x0a130ef, FUNC(_32x_68k_MARS_r)); // system ID
1674
1675
1676
1677// checking if these help brutal, they don't.
1678   sh2drc_set_options(machine().device(_32X_MASTER_TAG), SH2DRC_COMPATIBLE_OPTIONS);
1679   sh2drc_set_options(machine().device(_32X_SLAVE_TAG), SH2DRC_COMPATIBLE_OPTIONS);
1680
1681   DRIVER_INIT_CALL(megadriv);
1682}
1683
16841646void _32x_check_irqs(running_machine& machine)
16851647{
16861648
r17434r17435
19981960
19991961   _32x_hcount_compare_val = -1;
20001962
1963
1964// moved from init
1965
1966   _32x_adapter_enabled = 0;
1967
1968   if (_32x_adapter_enabled == 0)
1969   {
1970      machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_rom(0x0000000, 0x03fffff, machine().root_device().memregion(":gamecart")->base());
1971      machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0x000070, 0x000073, read16_delegate(FUNC(sega_32x_device::_32x_68k_hint_vector_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_hint_vector_w),this)); // h interrupt vector
1972   };
1973
1974
1975   a15100_reg = 0x0000;
1976   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xa15100, 0xa15101, read16_delegate(FUNC(sega_32x_device::_32x_68k_a15100_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_a15100_w),this)); // framebuffer control regs
1977   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xa15102, 0xa15103, read16_delegate(FUNC(sega_32x_device::_32x_68k_a15102_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_a15102_w),this)); // send irq to sh2
1978   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xa15104, 0xa15105, read16_delegate(FUNC(sega_32x_device::_32x_68k_a15104_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_a15104_w),this)); // 68k BANK rom set
1979   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xa15106, 0xa15107, read16_delegate(FUNC(sega_32x_device::_32x_68k_a15106_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_a15106_w),this)); // dreq stuff
1980   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xa15108, 0xa15113, read16_delegate(FUNC(sega_32x_device::_32x_dreq_common_r),this), write16_delegate(FUNC(sega_32x_device::_32x_dreq_common_w),this)); // dreq src / dst / length /fifo
1981   
1982   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xa1511a, 0xa1511b, read16_delegate(FUNC(sega_32x_device::_32x_68k_a1511a_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_a1511a_w),this)); // SEGA TV
1983
1984   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xa15120, 0xa1512f, read16_delegate(FUNC(sega_32x_device::_32x_68k_commsram_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_commsram_w),this)); // comms reg 0-7
1985   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_readwrite_handler(0xa15130, 0xa1513f, read16_delegate(FUNC(sega_32x_device::_32x_pwm_r),this), write16_delegate(FUNC(sega_32x_device::_32x_68k_pwm_w),this));
1986
1987   machine().device(":maincpu")->memory().space(AS_PROGRAM)->install_read_handler(0x0a130ec, 0x0a130ef, read16_delegate(FUNC(sega_32x_device::_32x_68k_MARS_r),this)); // system ID
1988
1989
1990
1991// checking if these help brutal, they don't.
1992   sh2drc_set_options(machine().device(_32X_MASTER_TAG), SH2DRC_COMPATIBLE_OPTIONS);
1993   sh2drc_set_options(machine().device(_32X_SLAVE_TAG), SH2DRC_COMPATIBLE_OPTIONS);
1994
1995
20011996// install these now, otherwise we'll get the following (incorrect) warnings on startup..
20021997//   SH-2 device ':sega32x:32x_slave_sh2': program space memory map entry 0-3FFF references non-existant region ':slave'
20031998//   SH-2 device ':sega32x:32x_master_sh2': program space memory map entry 0-3FFF references non-existant region ':master'
trunk/src/mame/machine/mega32x.h
r17434r17435
3535   DECLARE_WRITE32_MEMBER( _32x_sh2_slave_401c_slave_401e_w );
3636     
3737
38   DECLARE_READ16_MEMBER( _32x_68k_palette_r );
39   DECLARE_WRITE16_MEMBER( _32x_68k_palette_w );
40   DECLARE_READ16_MEMBER( _32x_68k_dram_r );
41   DECLARE_WRITE16_MEMBER( _32x_68k_dram_w );
42   DECLARE_READ16_MEMBER( _32x_68k_dram_overwrite_r );
43   DECLARE_WRITE16_MEMBER( _32x_68k_dram_overwrite_w );
44   DECLARE_READ16_MEMBER( _32x_68k_a15106_r );
45   DECLARE_WRITE16_MEMBER( _32x_68k_a15106_w );
46   DECLARE_READ16_MEMBER( _32x_dreq_common_r );
47   DECLARE_WRITE16_MEMBER( _32x_dreq_common_w );
48   DECLARE_READ16_MEMBER( _32x_68k_a1511a_r );
49   DECLARE_WRITE16_MEMBER( _32x_68k_a1511a_w );
50   DECLARE_READ16_MEMBER( _32x_68k_hint_vector_r );
51   DECLARE_WRITE16_MEMBER( _32x_68k_hint_vector_w );
52   DECLARE_READ16_MEMBER( _32x_68k_MARS_r );
53   DECLARE_READ16_MEMBER( _32x_68k_a15100_r );
54   DECLARE_WRITE16_MEMBER( _32x_68k_a15100_w );
55   DECLARE_READ16_MEMBER( _32x_68k_a15102_r );
56   DECLARE_WRITE16_MEMBER( _32x_68k_a15102_w );
57   DECLARE_READ16_MEMBER( _32x_68k_a15104_r );
58   DECLARE_WRITE16_MEMBER( _32x_68k_a15104_w );
59   DECLARE_READ16_MEMBER( _32x_68k_commsram_r );
60   DECLARE_WRITE16_MEMBER( _32x_68k_commsram_w );
61   DECLARE_READ16_MEMBER( _32x_pwm_r );
62   DECLARE_WRITE16_MEMBER( _32x_pwm_w );
63   DECLARE_WRITE16_MEMBER( _32x_68k_pwm_w );
64   DECLARE_READ16_MEMBER( _32x_common_vdp_regs_r );
65   DECLARE_WRITE16_MEMBER( _32x_common_vdp_regs_w );
66   DECLARE_READ16_MEMBER( _32x_sh2_master_4000_r );
67   DECLARE_WRITE16_MEMBER( _32x_sh2_master_4000_w );
68   DECLARE_READ16_MEMBER( _32x_sh2_slave_4000_r );
69   DECLARE_WRITE16_MEMBER( _32x_sh2_slave_4000_w );
70   DECLARE_READ16_MEMBER( _32x_sh2_common_4002_r );
71   DECLARE_WRITE16_MEMBER( _32x_sh2_common_4002_w );
72   DECLARE_READ16_MEMBER( _32x_sh2_common_4004_r );
73   DECLARE_WRITE16_MEMBER( _32x_sh2_common_4004_w );
74   DECLARE_READ16_MEMBER( _32x_sh2_common_4006_r );
75   DECLARE_WRITE16_MEMBER( _32x_sh2_common_4006_w );
76   DECLARE_WRITE16_MEMBER( _32x_sh2_master_4014_w );
77   DECLARE_WRITE16_MEMBER( _32x_sh2_slave_4014_w );
78   DECLARE_WRITE16_MEMBER( _32x_sh2_master_4016_w );
79   DECLARE_WRITE16_MEMBER( _32x_sh2_slave_4016_w );
80   DECLARE_WRITE16_MEMBER( _32x_sh2_master_4018_w );
81   DECLARE_WRITE16_MEMBER( _32x_sh2_slave_4018_w ) ;
82   DECLARE_WRITE16_MEMBER( _32x_sh2_master_401a_w );
83   DECLARE_WRITE16_MEMBER( _32x_sh2_slave_401a_w );
84   DECLARE_WRITE16_MEMBER( _32x_sh2_master_401c_w );
85   DECLARE_WRITE16_MEMBER( _32x_sh2_slave_401c_w );
86   DECLARE_WRITE16_MEMBER( _32x_sh2_master_401e_w );
87   DECLARE_WRITE16_MEMBER( _32x_sh2_slave_401e_w );
88   
3889   emu_timer *m_32x_pwm_timer;
3990protected:
4091   virtual void device_start();
trunk/src/mame/includes/megadriv.h
r17434r17435
371371
372372   DECLARE_DRIVER_INIT(genesis);
373373   DECLARE_DRIVER_INIT(mess_md_common);
374   DECLARE_DRIVER_INIT(_32x);
375374   DECLARE_DRIVER_INIT(md_eur);
376375   DECLARE_DRIVER_INIT(md_jpn);
377   DECLARE_DRIVER_INIT(mess_32x);
378   DECLARE_DRIVER_INIT(mess_32x_eur);
379   DECLARE_DRIVER_INIT(mess_32x_jpn);
376
380377};
381378
382379class pico_state : public md_cons_state
trunk/src/mess/drivers/megadriv.c
r17434r17435
440440
441441/****************************************** SegaCD & 32X emulation ****************************************/
442442
443/* Very preliminary skeleton code from David Haywood, borrowed for MESS by Fabio Priuli */
444/* These are only included to document BIOS informations currently available */
445443
446DRIVER_INIT_MEMBER(md_cons_state,mess_32x)
447{
448   DRIVER_INIT_CALL(_32x);
449   DRIVER_INIT_CALL(mess_md_common);
450   megadrive_region_export = 1;
451   megadrive_region_pal = 0;
452}
453
454DRIVER_INIT_MEMBER(md_cons_state,mess_32x_eur)
455{
456   DRIVER_INIT_CALL(_32x);
457   DRIVER_INIT_CALL(mess_md_common);
458   megadrive_region_export = 1;
459   megadrive_region_pal = 1;
460}
461
462
463DRIVER_INIT_MEMBER(md_cons_state,mess_32x_jpn)
464{
465   DRIVER_INIT_CALL(_32x);
466   DRIVER_INIT_CALL(mess_md_common);
467   megadrive_region_export = 0;
468   megadrive_region_pal = 0;
469}
470
471444static MACHINE_CONFIG_DERIVED( ms_32x, genesis_32x )
472445   MCFG_FRAGMENT_ADD( _32x_cartslot )
473446   MCFG_NVRAM_HANDLER_CLEAR()
r17434r17435
896869CONS( 1988, mdsvpj,     genesis,   0,      ms_megdsvp,      md, md_cons_state,     md_jpn,    "Sega",   "Mega Drive (Japan, NTSC, for SVP cart)", 0)
897870
898871// the 32X plugged in the cart slot, games plugged into the 32x.  Maybe it should be handled as an expansion device?
899CONS( 1994, 32x,        0,         0,      ms_32x,          md, md_cons_state, mess_32x,      "Sega",   "32X (USA, NTSC)", GAME_NOT_WORKING )
900CONS( 1994, 32xe,       32x,       0,      ms_32x_pal,      md, md_cons_state, mess_32x_eur,  "Sega",   "32X (Europe, PAL)", GAME_NOT_WORKING )
901CONS( 1994, 32xj,       32x,       0,      ms_32x,          md, md_cons_state, mess_32x_jpn,  "Sega",   "32X (Japan, NTSC)", GAME_NOT_WORKING )
872CONS( 1994, 32x,        0,         0,      ms_32x,          md, md_cons_state, genesis,      "Sega",   "Genesis with 32X (USA, NTSC)", GAME_NOT_WORKING )
873CONS( 1994, 32xe,       32x,       0,      ms_32x_pal,      md, md_cons_state, md_eur,       "Sega",   "Mega Drive with 32X (Europe, PAL)", GAME_NOT_WORKING )
874CONS( 1994, 32xj,       32x,       0,      ms_32x,          md, md_cons_state, md_jpn,       "Sega",   "Mega Drive with 32X (Japan, NTSC)", GAME_NOT_WORKING )
902875
903876// the SegaCD plugged into the expansion port..
904877CONS( 1992, segacd,     0,         0,      genesis_scd_scd, md, md_cons_state,     genesis,   "Sega",   "Sega CD (USA, NTSC)", GAME_NOT_WORKING )
r17434r17435
915888CONS( 1993, wmegam2,    xeye,      0,      genesis_scd,     md, md_cons_state,     md_jpn,    "Victor", "Wondermega M2 (Japan, NTSC)", GAME_NOT_WORKING )
916889CONS( 1994, cdx,        0,         0,      genesis_scd,     md, md_cons_state,     genesis,   "Sega",   "CDX (USA, NTSC)", GAME_NOT_WORKING )
917890CONS( 1994, multmega,   cdx,       0,      genesis_scd,     md, md_cons_state,     md_eur,    "Sega",   "Multi-Mega (Europe, PAL)", GAME_NOT_WORKING )
918CONS( 1994, 32x_scd,    0,         0,      genesis_32x_scd, md, md_cons_state,      mess_32x,  "Sega",   "Sega CD (USA, NTSC, w/32X)", GAME_NOT_WORKING )
891CONS( 1994, 32x_scd,    0,         0,      genesis_32x_scd, md, md_cons_state,      genesis,  "Sega",   "Sega CD (USA, NTSC, w/32X)", GAME_NOT_WORKING )
919892
920893// this is a standalone system based on the md-like hardware (same vdp etc.)
921894

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