trunk/src/mame/machine/snes.c
r17410 | r17411 | |
775 | 775 | space->machine().scheduler().timer_set(space->machine().primary_screen->time_until_pos(snes_ppu.beam.current_vert + 1), FUNC(snes_reset_hdma)); |
776 | 776 | break; |
777 | 777 | case MEMSEL: /* Access cycle designation in memory (2) area */ |
778 | | /* FIXME: Need to adjust the speed only during access of banks 0x80+ |
779 | | * Currently we are just increasing it no matter what */ |
780 | | // state->m_maincpu->set_clock_scale((data & 0x1) ? 1.335820896 : 1.0 ); |
781 | | #ifdef SNES_DBG_REG_W |
782 | | if ((data & 0x1) != (snes_ram[MEMSEL] & 0x1)) |
783 | | mame_printf_debug( "CPU speed: %f Mhz\n", (data & 0x1) ? 3.58 : 2.68 ); |
784 | | #endif |
| 778 | cpu_set_reg(state->m_maincpu, _5A22_FASTROM, data & 1); |
785 | 779 | break; |
786 | 780 | case TIMEUP: // IRQ Flag is cleared on both read and write |
787 | 781 | snes_ram[TIMEUP] = 0; |
trunk/src/emu/cpu/g65816/g65816.c
r17410 | r17411 | |
365 | 365 | device->save_item(NAME(cpustate->ir)); |
366 | 366 | device->save_item(NAME(cpustate->irq_delay)); |
367 | 367 | device->save_item(NAME(cpustate->stopped)); |
| 368 | device->save_item(NAME(cpustate->fastROM)); |
368 | 369 | |
369 | 370 | device->machine().save().register_postload(save_prepost_delegate(FUNC(g65816_restore_state), cpustate)); |
370 | 371 | } |
r17410 | r17411 | |
496 | 497 | cpustate->flag_m & MFLAG_SET ? 'M':'.', |
497 | 498 | cpustate->flag_x & XFLAG_SET ? 'X':'.', |
498 | 499 | cpustate->flag_d & DFLAG_SET ? 'D':'.', |
| 500 | |
499 | 501 | cpustate->flag_i & IFLAG_SET ? 'I':'.', |
500 | 502 | cpustate->flag_z == 0 ? 'Z':'.', |
501 | 503 | cpustate->flag_c & CFLAG_SET ? 'C':'.'); |
r17410 | r17411 | |
525 | 527 | } |
526 | 528 | |
527 | 529 | /* |
528 | | SNES specific, used to handle master cycles |
| 530 | SNES specific, used to handle master cycles, based off byuu's BSNES code |
529 | 531 | */ |
530 | 532 | |
531 | 533 | int bus_5A22_cycle_burst(g65816i_cpu_struct *cpustate, uint addr) |
r17410 | r17411 | |
534 | 536 | return 0; |
535 | 537 | |
536 | 538 | if(addr & 0x408000) { |
537 | | if(addr & 0x800000) return (1) ? 6 : 8; // TODO: fastROM setting |
| 539 | if(addr & 0x800000) return (cpustate->fastROM & 1) ? 6 : 8; |
538 | 540 | return 8; |
539 | 541 | } |
540 | 542 | if((addr + 0x6000) & 0x4000) return 8; |
r17410 | r17411 | |
553 | 555 | cpustate->cpu_type = CPU_TYPE_5A22; |
554 | 556 | } |
555 | 557 | |
| 558 | CPU_SET_INFO( _5a22 ) |
| 559 | { |
| 560 | g65816i_cpu_struct *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; |
556 | 561 | |
| 562 | switch (state) |
| 563 | { |
| 564 | case CPUINFO_INT_REGISTER + _5A22_FASTROM: g65816_set_reg(cpustate, _5A22_FASTROM, info->i); break; |
| 565 | |
| 566 | default: CPU_SET_INFO_CALL(g65816); break; |
| 567 | } |
| 568 | } |
| 569 | |
557 | 570 | CPU_GET_INFO( _5a22 ) |
558 | 571 | { |
| 572 | g65816i_cpu_struct *cpustate = (device != NULL && device->token() != NULL) ? get_safe_token(device) : NULL; |
| 573 | |
559 | 574 | switch (state) |
560 | 575 | { |
561 | 576 | /* --- the following bits of info are returned as pointers to data or functions --- */ |
| 577 | case CPUINFO_FCT_SET_INFO: info->setinfo = CPU_SET_INFO_NAME(_5a22); break; |
562 | 578 | case CPUINFO_FCT_INIT: info->init = CPU_INIT_NAME(5a22); break; |
563 | 579 | |
564 | 580 | /* --- the following bits of info are returned as NULL-terminated strings --- */ |
565 | 581 | case DEVINFO_STR_NAME: strcpy(info->s, "5A22"); break; |
| 582 | case CPUINFO_INT_REGISTER + _5A22_FASTROM: info->i = g65816_get_reg(cpustate, _5A22_FASTROM); break; |
| 583 | case CPUINFO_STR_REGISTER + _5A22_FASTROM: sprintf(info->s, "fastROM:%d", cpustate->fastROM & 1 ? 1 : 0); break; |
566 | 584 | |
567 | 585 | default: CPU_GET_INFO_CALL(g65816); break; |
568 | 586 | } |
569 | 587 | } |
570 | 588 | |
| 589 | |
571 | 590 | DEFINE_LEGACY_CPU_DEVICE(G65816, g65816); |
572 | 591 | DEFINE_LEGACY_CPU_DEVICE(_5A22, _5a22); |
573 | 592 | |
trunk/src/emu/cpu/g65816/g65816op.h
r17410 | r17411 | |
2304 | 2304 | case G65816_NMI_STATE: return LINE_NMI; |
2305 | 2305 | case G65816_IRQ_STATE: return LINE_IRQ; |
2306 | 2306 | case STATE_GENPCBASE: return REGISTER_PPC; |
| 2307 | case _5A22_FASTROM: return cpustate->fastROM; |
2307 | 2308 | } |
2308 | 2309 | return 0; |
2309 | 2310 | } |
r17410 | r17411 | |
2337 | 2338 | case G65816_PB: REGISTER_PB = MAKE_UINT_8(val); break; |
2338 | 2339 | case G65816_NMI_STATE: FTABLE_SET_LINE(cpustate, G65816_LINE_NMI, val == 0 ? CLEAR_LINE : ASSERT_LINE); break; |
2339 | 2340 | case G65816_IRQ_STATE: FTABLE_SET_LINE(cpustate, G65816_LINE_IRQ, val == 0 ? CLEAR_LINE : ASSERT_LINE); break; |
| 2341 | case _5A22_FASTROM: cpustate->fastROM = val; break; |
2340 | 2342 | } |
2341 | 2343 | } |
2342 | 2344 | |
trunk/src/emu/cpu/g65816/g65816.h
r17410 | r17411 | |
53 | 53 | { |
54 | 54 | G65816_PC=1, G65816_S, G65816_P, G65816_A, G65816_X, G65816_Y, |
55 | 55 | G65816_PB, G65816_DB, G65816_D, G65816_E, |
56 | | G65816_NMI_STATE, G65816_IRQ_STATE |
| 56 | G65816_NMI_STATE, G65816_IRQ_STATE, |
| 57 | _5A22_FASTROM |
57 | 58 | }; |
58 | 59 | |
59 | 60 | /* Main interface function */ |